| From a407105bbac2be1b34addecd46d8c2fa03c2e5ab Mon Sep 17 00:00:00 2001 |
| From: Jesse Barnes <jbarnes@virtuousgeek.org> |
| Date: Thu, 2 May 2013 15:30:47 -0700 |
| Subject: drm/i915: fix Haswell pfit power well check v2 |
| |
| We can't read the pfit regs if the power well is off, so use the cached |
| value. |
| |
| v2: re-add lost comment (Jesse) |
| make sure the crtc using the fitter is actually enabled (Jesse) |
| |
| Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> |
| [danvet: Drop now unused dev_priv, as spotted by Mika.] |
| Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> |
| Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
| Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
| Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> |
| |
| (cherry picked from commit 2b87f3b1bab1df814057ff551f4fc49c22a7fde9) |
| Signed-off-by: Darren Hart <dvhart@linux.intel.com> |
| --- |
| drivers/gpu/drm/i915/intel_display.c | 3 +-- |
| 1 file changed, 1 insertion(+), 2 deletions(-) |
| |
| diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c |
| index 5c89c0a293e5..d3c76234abda 100644 |
| --- a/drivers/gpu/drm/i915/intel_display.c |
| +++ b/drivers/gpu/drm/i915/intel_display.c |
| @@ -5918,7 +5918,6 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc, |
| |
| static void haswell_modeset_global_resources(struct drm_device *dev) |
| { |
| - struct drm_i915_private *dev_priv = dev->dev_private; |
| bool enable = false; |
| struct intel_crtc *crtc; |
| struct intel_encoder *encoder; |
| @@ -5930,7 +5929,7 @@ static void haswell_modeset_global_resources(struct drm_device *dev) |
| * sequence that's not yet available. Just in case desktop eDP |
| * on PORT D is possible on haswell, too. */ |
| /* Even the eDP panel fitter is outside the always-on well. */ |
| - if (I915_READ(PF_WIN_SZ(crtc->pipe))) |
| + if (crtc->config.pch_pfit.size && crtc->base.enabled) |
| enable = true; |
| } |
| |
| -- |
| 1.8.5.rc3 |
| |
