blob: 0dc7e7cd3d03633062752796a9da998f15ac89ad [file] [log] [blame]
From 262b273f372d6546a823ee867dbb69a1b3451377 Mon Sep 17 00:00:00 2001
From: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Sat, 1 Jun 2013 17:17:04 +0200
Subject: drm/i915: set default value for config->pixel_multiplier
This way we can simplify the code quite a bit.
Also add a WARN in the sdvo code to complain about a bogus value
and kill the readout code in intel_ddi.c that Jesse sneaked in.
HW state readout for the pixel multiplier will work a bit differently
in the end.
v2: Rebase on top of the fdi pixel mutliplier handling fix.
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit ef1b460d1bab7e5b04c34f88c3dfa042528e7c27)
Signed-off-by: Darren Hart <dvhart@linux.intel.com>
---
drivers/gpu/drm/i915/intel_ddi.c | 1 -
drivers/gpu/drm/i915/intel_display.c | 29 ++++++++++-------------------
drivers/gpu/drm/i915/intel_sdvo.c | 1 +
3 files changed, 11 insertions(+), 20 deletions(-)
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1286,7 +1286,6 @@ static void intel_ddi_get_config(struct
flags |= DRM_MODE_FLAG_NVSYNC;
pipe_config->adjusted_mode.flags |= flags;
- pipe_config->pixel_multiplier = 1;
}
static void intel_ddi_destroy(struct drm_encoder *encoder)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3999,8 +3999,7 @@ retry:
link_bw = intel_fdi_link_freq(dev) * MHz(100)/KHz(1)/10;
fdi_dotclock = adjusted_mode->clock;
- if (pipe_config->pixel_multiplier > 1)
- fdi_dotclock /= pipe_config->pixel_multiplier;
+ fdi_dotclock /= pipe_config->pixel_multiplier;
lane = ironlake_get_lanes_required(fdi_dotclock, link_bw,
pipe_config->pipe_bpp);
@@ -4454,11 +4453,8 @@ static void vlv_update_pll(struct intel_
if (wait_for(((I915_READ(DPLL(pipe)) & DPLL_LOCK_VLV) == DPLL_LOCK_VLV), 1))
DRM_ERROR("DPLL %d failed to lock\n", pipe);
- dpll_md = 0;
- if (crtc->config.pixel_multiplier > 1) {
- dpll_md = (crtc->config.pixel_multiplier - 1)
- << DPLL_MD_UDI_MULTIPLIER_SHIFT;
- }
+ dpll_md = (crtc->config.pixel_multiplier - 1)
+ << DPLL_MD_UDI_MULTIPLIER_SHIFT;
I915_WRITE(DPLL_MD(pipe), dpll_md);
POSTING_READ(DPLL_MD(pipe));
@@ -4492,8 +4488,7 @@ static void i9xx_update_pll(struct intel
else
dpll |= DPLLB_MODE_DAC_SERIAL;
- if ((crtc->config.pixel_multiplier > 1) &&
- (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev))) {
+ if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
dpll |= (crtc->config.pixel_multiplier - 1)
<< SDVO_MULTIPLIER_SHIFT_HIRES;
}
@@ -4556,11 +4551,8 @@ static void i9xx_update_pll(struct intel
udelay(150);
if (INTEL_INFO(dev)->gen >= 4) {
- u32 dpll_md = 0;
- if (crtc->config.pixel_multiplier > 1) {
- dpll_md = (crtc->config.pixel_multiplier - 1)
- << DPLL_MD_UDI_MULTIPLIER_SHIFT;
- }
+ u32 dpll_md = (crtc->config.pixel_multiplier - 1)
+ << DPLL_MD_UDI_MULTIPLIER_SHIFT;
I915_WRITE(DPLL_MD(pipe), dpll_md);
} else {
/* The pixel multiplier can only be updated once the
@@ -5613,10 +5605,8 @@ static uint32_t ironlake_compute_dpll(st
else
dpll |= DPLLB_MODE_DAC_SERIAL;
- if (intel_crtc->config.pixel_multiplier > 1) {
- dpll |= (intel_crtc->config.pixel_multiplier - 1)
- << PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT;
- }
+ dpll |= (intel_crtc->config.pixel_multiplier - 1)
+ << PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT;
if (is_sdvo)
dpll |= DPLL_DVO_HIGH_SPEED;
@@ -7787,8 +7777,9 @@ intel_modeset_pipe_config(struct drm_crt
goto fail;
encoder_retry:
- /* Ensure the port clock default is reset when retrying. */
+ /* Ensure the port clock defaults are reset when retrying. */
pipe_config->port_clock = 0;
+ pipe_config->pixel_multiplier = 1;
/* Pass our mode to the connectors and the CRTC to give them a chance to
* adjust it according to limitations or connector properties, and also
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -1219,6 +1219,7 @@ static void intel_sdvo_mode_set(struct i
switch (intel_crtc->config.pixel_multiplier) {
default:
+ WARN(1, "unknown pixel mutlipler specified\n");
case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;