| From 2337a349c0c9e4d013563851c7e8220e13094334 Mon Sep 17 00:00:00 2001 |
| From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com> |
| Date: Tue, 25 Jun 2013 19:21:06 +0300 |
| Subject: drm/i915: GEN6_RP_INTERRUPT_LIMITS doesn't seem to exist on VLV |
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| |
| I can't find GEN6_RP_INTERRUPT_LIMITS (0xA014) anywhere in VLV docs. |
| Reading it always returns zero from what I can tell, and eliminating |
| it doesn't seem to make any difference to the behaviour of the system. |
| |
| Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> |
| Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> |
| Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> |
| (cherry picked from commit 7a67092a25d854a4f5c53a6495d33e250896f9db) |
| Signed-off-by: Darren Hart <dvhart@linux.intel.com> |
| --- |
| drivers/gpu/drm/i915/intel_pm.c | 8 ++------ |
| 1 file changed, 2 insertions(+), 6 deletions(-) |
| |
| diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c |
| index b3622a2f6c4f..5da417f9c8c7 100644 |
| --- a/drivers/gpu/drm/i915/intel_pm.c |
| +++ b/drivers/gpu/drm/i915/intel_pm.c |
| @@ -3104,7 +3104,8 @@ static void vlv_update_rps_cur_delay(struct drm_i915_private *dev_priv) |
| void valleyview_set_rps(struct drm_device *dev, u8 val) |
| { |
| struct drm_i915_private *dev_priv = dev->dev_private; |
| - u32 limits = gen6_rps_limits(dev_priv, &val); |
| + |
| + gen6_rps_limits(dev_priv, &val); |
| |
| WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock)); |
| WARN_ON(val > dev_priv->rps.max_delay); |
| @@ -3123,11 +3124,6 @@ void valleyview_set_rps(struct drm_device *dev, u8 val) |
| |
| vlv_punit_write(dev_priv, PUNIT_REG_GPU_FREQ_REQ, val); |
| |
| - /* Make sure we continue to get interrupts |
| - * until we hit the minimum or maximum frequencies. |
| - */ |
| - I915_WRITE(GEN6_RP_INTERRUPT_LIMITS, limits); |
| - |
| dev_priv->rps.cur_delay = val; |
| |
| trace_intel_gpu_freq_change(vlv_gpu_freq(dev_priv->mem_freq, val)); |
| -- |
| 1.8.5.rc3 |
| |