| From 5ec64f92dc305cd6378f496d9dd09825bfe8a248 Mon Sep 17 00:00:00 2001 |
| From: Chris Wilson <chris@chris-wilson.co.uk> |
| Date: Thu, 8 Aug 2013 14:41:11 +0100 |
| Subject: drm/i915: Allow the user to set bo into the DISPLAY cache domain |
| MIME-Version: 1.0 |
| Content-Type: text/plain; charset=UTF-8 |
| Content-Transfer-Encoding: 8bit |
| |
| This is primarily for the benefit of the create2 ioctl so that the |
| caller can avoid the later step of rebinding the bo with new PTE bits. |
| After introducing WT (and possibly GFDT) cacheing for display targets, |
| not everything in the display is earmarked as UC, and more importantly |
| what is is controlled by the kernel. |
| |
| Note that set_cache_level/get_cache_level for DISPLAY is not necessarily |
| idempotent; get_cache_level may return UC for architectures that have no |
| special cache domain for the display engine. |
| |
| Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> |
| Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> |
| Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> |
| (cherry picked from commit 4257d3ba3b87a84adb2f840620cb63512f0bab22) |
| Signed-off-by: Darren Hart <dvhart@linux.intel.com> |
| --- |
| drivers/gpu/drm/i915/i915_gem.c | 7 +++++++ |
| 1 file changed, 7 insertions(+) |
| |
| diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c |
| index 8e41b2c6eb1d..3d9e248bf422 100644 |
| --- a/drivers/gpu/drm/i915/i915_gem.c |
| +++ b/drivers/gpu/drm/i915/i915_gem.c |
| @@ -3465,6 +3465,10 @@ int i915_gem_get_caching_ioctl(struct drm_device *dev, void *data, |
| args->caching = I915_CACHING_CACHED; |
| break; |
| |
| + case I915_CACHE_WT: |
| + args->caching = I915_CACHING_DISPLAY; |
| + break; |
| + |
| default: |
| args->caching = I915_CACHING_NONE; |
| break; |
| @@ -3491,6 +3495,9 @@ int i915_gem_set_caching_ioctl(struct drm_device *dev, void *data, |
| case I915_CACHING_CACHED: |
| level = I915_CACHE_LLC; |
| break; |
| + case I915_CACHING_DISPLAY: |
| + level = HAS_WT(dev) ? I915_CACHE_WT : I915_CACHE_NONE; |
| + break; |
| default: |
| return -EINVAL; |
| } |
| -- |
| 1.8.5.rc3 |
| |
