blob: 66997b86c07ad366184243364f4bb0590180dbec [file] [log] [blame]
From 9dd76b13fb11febbced5bf6de00cb01004a3b76a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
Date: Wed, 4 Sep 2013 18:30:06 +0300
Subject: drm/i915: Fix up pipe vs. double wide confusion
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Double wide mode is only available on pipe A, except on GDG where
pipe B is also double wide capable.
Signed-off-by: Ville Syrjรคlรค <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit b397c96b6d6478910cd4263af3124ee07d304e8b)
Signed-off-by: Darren Hart <dvhart@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 7681f219d2fb..91e2431c0b7e 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4149,10 +4149,10 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
* Enable pixel doubling when the dot clock
* is > 90% of the (display) core speed.
*
- * XXX: No double-wide on 915GM pipe B. Is that
- * the only reason for the pipe == PIPE_A check?
+ * GDG double wide on either pipe,
+ * otherwise pipe A only.
*/
- if (crtc->pipe == PIPE_A &&
+ if ((crtc->pipe == PIPE_A || IS_I915G(dev)) &&
adjusted_mode->clock > clock_limit * 9 / 10) {
clock_limit *= 2;
pipe_config->double_wide = true;
--
1.8.5.rc3