| From 4fba07883417697ba339a4968d6b200068e0de2a Mon Sep 17 00:00:00 2001 |
| From: Chris Wilson <chris@chris-wilson.co.uk> |
| Date: Wed, 25 Sep 2013 10:23:19 +0100 |
| Subject: drm/i915: Show WT caching in debugfs |
| |
| Add the missing cache-level to the describe_obj() function for debug and |
| error reporting. |
| |
| Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> |
| Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> |
| (cherry picked from commit f56383cb9fc8d7165bd7d2136b4c4af98c41177c) |
| Signed-off-by: Darren Hart <dvhart@linux.intel.com> |
| --- |
| drivers/gpu/drm/i915/i915_drv.h | 2 +- |
| drivers/gpu/drm/i915/i915_gpu_error.c | 1 + |
| 2 files changed, 2 insertions(+), 1 deletion(-) |
| |
| diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h |
| index 7ccb0cd35474..08e96a8c01aa 100644 |
| --- a/drivers/gpu/drm/i915/i915_drv.h |
| +++ b/drivers/gpu/drm/i915/i915_drv.h |
| @@ -324,7 +324,7 @@ struct drm_i915_error_state { |
| u32 dirty:1; |
| u32 purgeable:1; |
| s32 ring:4; |
| - u32 cache_level:2; |
| + u32 cache_level:3; |
| } **active_bo, **pinned_bo; |
| u32 *active_bo_count, *pinned_bo_count; |
| struct intel_overlay_error_state *overlay; |
| diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c |
| index c3ff6bd220dc..0a49b651e510 100644 |
| --- a/drivers/gpu/drm/i915/i915_gpu_error.c |
| +++ b/drivers/gpu/drm/i915/i915_gpu_error.c |
| @@ -1012,6 +1012,7 @@ const char *i915_cache_level_str(int type) |
| case I915_CACHE_NONE: return " uncached"; |
| case I915_CACHE_LLC: return " snooped or LLC"; |
| case I915_CACHE_L3_LLC: return " L3+LLC"; |
| + case I915_CACHE_WT: return " WT"; |
| default: return ""; |
| } |
| } |
| -- |
| 1.8.5.rc3 |
| |
