| From 3ff3229bfc038391126a902070fc02dc073cccf6 Mon Sep 17 00:00:00 2001 |
| From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com> |
| Date: Fri, 4 Oct 2013 14:53:40 +0300 |
| Subject: drm: Remove pci_vendor and pci_device from struct drm_device |
| MIME-Version: 1.0 |
| Content-Type: text/plain; charset=UTF-8 |
| Content-Transfer-Encoding: 8bit |
| |
| We can get the PCI vendor and device IDs via dev->pdev. So we can drop |
| the duplicated information. |
| |
| Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> |
| Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> |
| Reviewed-by: Alex Deucher <alexander.deucher@amd.com> |
| Signed-off-by: Dave Airlie <airlied@redhat.com> |
| (cherry picked from commit ffbab09bf939975b62ec233c426bf7df0dd4cea8) |
| Signed-off-by: Darren Hart <dvhart@linux.intel.com> |
| --- |
| drivers/gpu/drm/drm_pci.c | 3 -- |
| drivers/gpu/drm/gma500/psb_drv.h | 8 +++--- |
| drivers/gpu/drm/i915/i915_dma.c | 2 - |
| drivers/gpu/drm/i915/i915_drv.h | 36 ++++++++++++++-------------- |
| drivers/gpu/drm/i915/i915_gpu_error.c | 2 - |
| drivers/gpu/drm/i915/intel_tv.c | 2 - |
| drivers/gpu/drm/nouveau/dispnv04/arb.c | 8 +++--- |
| drivers/gpu/drm/nouveau/dispnv04/dfp.c | 4 +-- |
| drivers/gpu/drm/nouveau/dispnv04/disp.h | 6 ++-- |
| drivers/gpu/drm/nouveau/dispnv04/hw.c | 4 +-- |
| drivers/gpu/drm/nouveau/nouveau_abi16.c | 4 +-- |
| drivers/gpu/drm/nouveau/nouveau_bios.c | 4 +-- |
| drivers/gpu/drm/nouveau/nouveau_connector.c | 4 +-- |
| drivers/gpu/drm/radeon/radeon_bios.c | 6 ++-- |
| drivers/gpu/drm/radeon/radeon_kms.c | 2 - |
| include/drm/drmP.h | 2 - |
| 16 files changed, 46 insertions(+), 51 deletions(-) |
| |
| --- a/drivers/gpu/drm/drm_pci.c |
| +++ b/drivers/gpu/drm/drm_pci.c |
| @@ -335,9 +335,6 @@ int drm_get_pci_dev(struct pci_dev *pdev |
| goto err_g1; |
| |
| dev->pdev = pdev; |
| - dev->pci_device = pdev->device; |
| - dev->pci_vendor = pdev->vendor; |
| - |
| #ifdef __alpha__ |
| dev->hose = pdev->sysdata; |
| #endif |
| --- a/drivers/gpu/drm/gma500/psb_drv.h |
| +++ b/drivers/gpu/drm/gma500/psb_drv.h |
| @@ -43,10 +43,10 @@ enum { |
| CHIP_MFLD_0130 = 3, /* Medfield */ |
| }; |
| |
| -#define IS_PSB(dev) (((dev)->pci_device & 0xfffe) == 0x8108) |
| -#define IS_MRST(dev) (((dev)->pci_device & 0xfffc) == 0x4100) |
| -#define IS_MFLD(dev) (((dev)->pci_device & 0xfff8) == 0x0130) |
| -#define IS_CDV(dev) (((dev)->pci_device & 0xfff0) == 0x0be0) |
| +#define IS_PSB(dev) (((dev)->pdev->device & 0xfffe) == 0x8108) |
| +#define IS_MRST(dev) (((dev)->pdev->device & 0xfffc) == 0x4100) |
| +#define IS_MFLD(dev) (((dev)->pdev->device & 0xfff8) == 0x0130) |
| +#define IS_CDV(dev) (((dev)->pdev->device & 0xfff0) == 0x0be0) |
| |
| /* |
| * Driver definitions |
| --- a/drivers/gpu/drm/i915/i915_dma.c |
| +++ b/drivers/gpu/drm/i915/i915_dma.c |
| @@ -939,7 +939,7 @@ static int i915_getparam(struct drm_devi |
| value = READ_BREADCRUMB(dev_priv); |
| break; |
| case I915_PARAM_CHIPSET_ID: |
| - value = dev->pci_device; |
| + value = dev->pdev->device; |
| break; |
| case I915_PARAM_HAS_GEM: |
| value = 1; |
| --- a/drivers/gpu/drm/i915/i915_drv.h |
| +++ b/drivers/gpu/drm/i915/i915_drv.h |
| @@ -1615,39 +1615,39 @@ struct drm_i915_file_private { |
| |
| #define INTEL_INFO(dev) (to_i915(dev)->info) |
| |
| -#define IS_I830(dev) ((dev)->pci_device == 0x3577) |
| -#define IS_845G(dev) ((dev)->pci_device == 0x2562) |
| +#define IS_I830(dev) ((dev)->pdev->device == 0x3577) |
| +#define IS_845G(dev) ((dev)->pdev->device == 0x2562) |
| #define IS_I85X(dev) (INTEL_INFO(dev)->is_i85x) |
| -#define IS_I865G(dev) ((dev)->pci_device == 0x2572) |
| +#define IS_I865G(dev) ((dev)->pdev->device == 0x2572) |
| #define IS_I915G(dev) (INTEL_INFO(dev)->is_i915g) |
| -#define IS_I915GM(dev) ((dev)->pci_device == 0x2592) |
| -#define IS_I945G(dev) ((dev)->pci_device == 0x2772) |
| +#define IS_I915GM(dev) ((dev)->pdev->device == 0x2592) |
| +#define IS_I945G(dev) ((dev)->pdev->device == 0x2772) |
| #define IS_I945GM(dev) (INTEL_INFO(dev)->is_i945gm) |
| #define IS_BROADWATER(dev) (INTEL_INFO(dev)->is_broadwater) |
| #define IS_CRESTLINE(dev) (INTEL_INFO(dev)->is_crestline) |
| -#define IS_GM45(dev) ((dev)->pci_device == 0x2A42) |
| +#define IS_GM45(dev) ((dev)->pdev->device == 0x2A42) |
| #define IS_G4X(dev) (INTEL_INFO(dev)->is_g4x) |
| -#define IS_PINEVIEW_G(dev) ((dev)->pci_device == 0xa001) |
| -#define IS_PINEVIEW_M(dev) ((dev)->pci_device == 0xa011) |
| +#define IS_PINEVIEW_G(dev) ((dev)->pdev->device == 0xa001) |
| +#define IS_PINEVIEW_M(dev) ((dev)->pdev->device == 0xa011) |
| #define IS_PINEVIEW(dev) (INTEL_INFO(dev)->is_pineview) |
| #define IS_G33(dev) (INTEL_INFO(dev)->is_g33) |
| -#define IS_IRONLAKE_M(dev) ((dev)->pci_device == 0x0046) |
| +#define IS_IRONLAKE_M(dev) ((dev)->pdev->device == 0x0046) |
| #define IS_IVYBRIDGE(dev) (INTEL_INFO(dev)->is_ivybridge) |
| -#define IS_IVB_GT1(dev) ((dev)->pci_device == 0x0156 || \ |
| - (dev)->pci_device == 0x0152 || \ |
| - (dev)->pci_device == 0x015a) |
| -#define IS_SNB_GT1(dev) ((dev)->pci_device == 0x0102 || \ |
| - (dev)->pci_device == 0x0106 || \ |
| - (dev)->pci_device == 0x010A) |
| +#define IS_IVB_GT1(dev) ((dev)->pdev->device == 0x0156 || \ |
| + (dev)->pdev->device == 0x0152 || \ |
| + (dev)->pdev->device == 0x015a) |
| +#define IS_SNB_GT1(dev) ((dev)->pdev->device == 0x0102 || \ |
| + (dev)->pdev->device == 0x0106 || \ |
| + (dev)->pdev->device == 0x010A) |
| #define IS_VALLEYVIEW(dev) (INTEL_INFO(dev)->is_valleyview) |
| #define IS_HASWELL(dev) (INTEL_INFO(dev)->is_haswell) |
| #define IS_MOBILE(dev) (INTEL_INFO(dev)->is_mobile) |
| #define IS_HSW_EARLY_SDV(dev) (IS_HASWELL(dev) && \ |
| - ((dev)->pci_device & 0xFF00) == 0x0C00) |
| + ((dev)->pdev->device & 0xFF00) == 0x0C00) |
| #define IS_ULT(dev) (IS_HASWELL(dev) && \ |
| - ((dev)->pci_device & 0xFF00) == 0x0A00) |
| + ((dev)->pdev->device & 0xFF00) == 0x0A00) |
| #define IS_HSW_GT3(dev) (IS_HASWELL(dev) && \ |
| - ((dev)->pci_device & 0x00F0) == 0x0020) |
| + ((dev)->pdev->device & 0x00F0) == 0x0020) |
| #define IS_PRELIMINARY_HW(intel_info) ((intel_info)->is_preliminary) |
| |
| /* |
| --- a/drivers/gpu/drm/i915/i915_gpu_error.c |
| +++ b/drivers/gpu/drm/i915/i915_gpu_error.c |
| @@ -304,7 +304,7 @@ int i915_error_state_to_str(struct drm_i |
| err_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec, |
| error->time.tv_usec); |
| err_printf(m, "Kernel: " UTS_RELEASE "\n"); |
| - err_printf(m, "PCI ID: 0x%04x\n", dev->pci_device); |
| + err_printf(m, "PCI ID: 0x%04x\n", dev->pdev->device); |
| err_printf(m, "EIR: 0x%08x\n", error->eir); |
| err_printf(m, "IER: 0x%08x\n", error->ier); |
| err_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er); |
| --- a/drivers/gpu/drm/i915/intel_tv.c |
| +++ b/drivers/gpu/drm/i915/intel_tv.c |
| @@ -1048,7 +1048,7 @@ static void intel_tv_mode_set(struct int |
| tv_mode->dda3_inc << TV_SCDDA3_INC_SHIFT; |
| |
| /* Enable two fixes for the chips that need them. */ |
| - if (dev->pci_device < 0x2772) |
| + if (dev->pdev->device < 0x2772) |
| tv_ctl |= TV_ENC_C0_FIX | TV_ENC_SDP_FIX; |
| |
| I915_WRITE(TV_H_CTL_1, hctl1); |
| --- a/drivers/gpu/drm/nouveau/dispnv04/arb.c |
| +++ b/drivers/gpu/drm/nouveau/dispnv04/arb.c |
| @@ -210,8 +210,8 @@ nv04_update_arb(struct drm_device *dev, |
| sim_data.nvclk_khz = NVClk; |
| sim_data.bpp = bpp; |
| sim_data.two_heads = nv_two_heads(dev); |
| - if ((dev->pci_device & 0xffff) == 0x01a0 /*CHIPSET_NFORCE*/ || |
| - (dev->pci_device & 0xffff) == 0x01f0 /*CHIPSET_NFORCE2*/) { |
| + if ((dev->pdev->device & 0xffff) == 0x01a0 /*CHIPSET_NFORCE*/ || |
| + (dev->pdev->device & 0xffff) == 0x01f0 /*CHIPSET_NFORCE2*/) { |
| uint32_t type; |
| |
| pci_read_config_dword(pci_get_bus_and_slot(0, 1), 0x7c, &type); |
| @@ -256,8 +256,8 @@ nouveau_calc_arb(struct drm_device *dev, |
| |
| if (nv_device(drm->device)->card_type < NV_20) |
| nv04_update_arb(dev, vclk, bpp, burst, lwm); |
| - else if ((dev->pci_device & 0xfff0) == 0x0240 /*CHIPSET_C51*/ || |
| - (dev->pci_device & 0xfff0) == 0x03d0 /*CHIPSET_C512*/) { |
| + else if ((dev->pdev->device & 0xfff0) == 0x0240 /*CHIPSET_C51*/ || |
| + (dev->pdev->device & 0xfff0) == 0x03d0 /*CHIPSET_C512*/) { |
| *burst = 128; |
| *lwm = 0x0480; |
| } else |
| --- a/drivers/gpu/drm/nouveau/dispnv04/dfp.c |
| +++ b/drivers/gpu/drm/nouveau/dispnv04/dfp.c |
| @@ -490,8 +490,8 @@ static void nv04_dfp_update_backlight(st |
| /* BIOS scripts usually take care of the backlight, thanks |
| * Apple for your consistency. |
| */ |
| - if (dev->pci_device == 0x0174 || dev->pci_device == 0x0179 || |
| - dev->pci_device == 0x0189 || dev->pci_device == 0x0329) { |
| + if (dev->pdev->device == 0x0174 || dev->pdev->device == 0x0179 || |
| + dev->pdev->device == 0x0189 || dev->pdev->device == 0x0329) { |
| if (mode == DRM_MODE_DPMS_ON) { |
| nv_mask(device, NV_PBUS_DEBUG_DUALHEAD_CTL, 0, 1 << 31); |
| nv_mask(device, NV_PCRTC_GPIO_EXT, 3, 1); |
| --- a/drivers/gpu/drm/nouveau/dispnv04/disp.h |
| +++ b/drivers/gpu/drm/nouveau/dispnv04/disp.h |
| @@ -126,7 +126,7 @@ static inline bool |
| nv_two_heads(struct drm_device *dev) |
| { |
| struct nouveau_drm *drm = nouveau_drm(dev); |
| - const int impl = dev->pci_device & 0x0ff0; |
| + const int impl = dev->pdev->device & 0x0ff0; |
| |
| if (nv_device(drm->device)->card_type >= NV_10 && impl != 0x0100 && |
| impl != 0x0150 && impl != 0x01a0 && impl != 0x0200) |
| @@ -138,14 +138,14 @@ nv_two_heads(struct drm_device *dev) |
| static inline bool |
| nv_gf4_disp_arch(struct drm_device *dev) |
| { |
| - return nv_two_heads(dev) && (dev->pci_device & 0x0ff0) != 0x0110; |
| + return nv_two_heads(dev) && (dev->pdev->device & 0x0ff0) != 0x0110; |
| } |
| |
| static inline bool |
| nv_two_reg_pll(struct drm_device *dev) |
| { |
| struct nouveau_drm *drm = nouveau_drm(dev); |
| - const int impl = dev->pci_device & 0x0ff0; |
| + const int impl = dev->pdev->device & 0x0ff0; |
| |
| if (impl == 0x0310 || impl == 0x0340 || nv_device(drm->device)->card_type >= NV_40) |
| return true; |
| --- a/drivers/gpu/drm/nouveau/dispnv04/hw.c |
| +++ b/drivers/gpu/drm/nouveau/dispnv04/hw.c |
| @@ -220,7 +220,7 @@ nouveau_hw_get_clock(struct drm_device * |
| int ret; |
| |
| if (plltype == PLL_MEMORY && |
| - (dev->pci_device & 0x0ff0) == CHIPSET_NFORCE) { |
| + (dev->pdev->device & 0x0ff0) == CHIPSET_NFORCE) { |
| uint32_t mpllP; |
| |
| pci_read_config_dword(pci_get_bus_and_slot(0, 3), 0x6c, &mpllP); |
| @@ -231,7 +231,7 @@ nouveau_hw_get_clock(struct drm_device * |
| return 400000 / mpllP; |
| } else |
| if (plltype == PLL_MEMORY && |
| - (dev->pci_device & 0xff0) == CHIPSET_NFORCE2) { |
| + (dev->pdev->device & 0xff0) == CHIPSET_NFORCE2) { |
| uint32_t clock; |
| |
| pci_read_config_dword(pci_get_bus_and_slot(0, 5), 0x4c, &clock); |
| --- a/drivers/gpu/drm/nouveau/nouveau_abi16.c |
| +++ b/drivers/gpu/drm/nouveau/nouveau_abi16.c |
| @@ -177,10 +177,10 @@ nouveau_abi16_ioctl_getparam(ABI16_IOCTL |
| getparam->value = device->chipset; |
| break; |
| case NOUVEAU_GETPARAM_PCI_VENDOR: |
| - getparam->value = dev->pci_vendor; |
| + getparam->value = dev->pdev->vendor; |
| break; |
| case NOUVEAU_GETPARAM_PCI_DEVICE: |
| - getparam->value = dev->pci_device; |
| + getparam->value = dev->pdev->device; |
| break; |
| case NOUVEAU_GETPARAM_BUS_TYPE: |
| if (drm_pci_device_is_agp(dev)) |
| --- a/drivers/gpu/drm/nouveau/nouveau_bios.c |
| +++ b/drivers/gpu/drm/nouveau/nouveau_bios.c |
| @@ -127,8 +127,8 @@ static int call_lvds_manufacturer_script |
| #ifdef __powerpc__ |
| /* Powerbook specific quirks */ |
| if (script == LVDS_RESET && |
| - (dev->pci_device == 0x0179 || dev->pci_device == 0x0189 || |
| - dev->pci_device == 0x0329)) |
| + (dev->pdev->device == 0x0179 || dev->pdev->device == 0x0189 || |
| + dev->pdev->device == 0x0329)) |
| nv_write_tmds(dev, dcbent->or, 0, 0x02, 0x72); |
| #endif |
| |
| --- a/drivers/gpu/drm/nouveau/nouveau_connector.c |
| +++ b/drivers/gpu/drm/nouveau/nouveau_connector.c |
| @@ -213,8 +213,8 @@ nouveau_connector_set_encoder(struct drm |
| connector->doublescan_allowed = true; |
| if (nv_device(drm->device)->card_type == NV_20 || |
| (nv_device(drm->device)->card_type == NV_10 && |
| - (dev->pci_device & 0x0ff0) != 0x0100 && |
| - (dev->pci_device & 0x0ff0) != 0x0150)) |
| + (dev->pdev->device & 0x0ff0) != 0x0100 && |
| + (dev->pdev->device & 0x0ff0) != 0x0150)) |
| /* HW is broken */ |
| connector->interlace_allowed = false; |
| else |
| --- a/drivers/gpu/drm/radeon/radeon_bios.c |
| +++ b/drivers/gpu/drm/radeon/radeon_bios.c |
| @@ -517,7 +517,7 @@ static bool legacy_read_disabled_bios(st |
| crtc_ext_cntl = RREG32(RADEON_CRTC_EXT_CNTL); |
| fp2_gen_cntl = 0; |
| |
| - if (rdev->ddev->pci_device == PCI_DEVICE_ID_ATI_RADEON_QY) { |
| + if (rdev->ddev->pdev->device == PCI_DEVICE_ID_ATI_RADEON_QY) { |
| fp2_gen_cntl = RREG32(RADEON_FP2_GEN_CNTL); |
| } |
| |
| @@ -554,7 +554,7 @@ static bool legacy_read_disabled_bios(st |
| (RADEON_CRTC_SYNC_TRISTAT | |
| RADEON_CRTC_DISPLAY_DIS))); |
| |
| - if (rdev->ddev->pci_device == PCI_DEVICE_ID_ATI_RADEON_QY) { |
| + if (rdev->ddev->pdev->device == PCI_DEVICE_ID_ATI_RADEON_QY) { |
| WREG32(RADEON_FP2_GEN_CNTL, (fp2_gen_cntl & ~RADEON_FP2_ON)); |
| } |
| |
| @@ -572,7 +572,7 @@ static bool legacy_read_disabled_bios(st |
| WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl); |
| } |
| WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl); |
| - if (rdev->ddev->pci_device == PCI_DEVICE_ID_ATI_RADEON_QY) { |
| + if (rdev->ddev->pdev->device == PCI_DEVICE_ID_ATI_RADEON_QY) { |
| WREG32(RADEON_FP2_GEN_CNTL, fp2_gen_cntl); |
| } |
| return r; |
| --- a/drivers/gpu/drm/radeon/radeon_kms.c |
| +++ b/drivers/gpu/drm/radeon/radeon_kms.c |
| @@ -191,7 +191,7 @@ int radeon_info_ioctl(struct drm_device |
| |
| switch (info->request) { |
| case RADEON_INFO_DEVICE_ID: |
| - *value = dev->pci_device; |
| + *value = dev->pdev->device; |
| break; |
| case RADEON_INFO_NUM_GB_PIPES: |
| *value = rdev->num_gb_pipes; |
| --- a/include/drm/drmP.h |
| +++ b/include/drm/drmP.h |
| @@ -1191,8 +1191,6 @@ struct drm_device { |
| |
| struct device *dev; /**< Device structure */ |
| struct pci_dev *pdev; /**< PCI device structure */ |
| - int pci_vendor; /**< PCI vendor id */ |
| - int pci_device; /**< PCI device id */ |
| #ifdef __alpha__ |
| struct pci_controller *hose; |
| #endif |