| From 395bcfd8e7a5d775dc5e54303a91c2f32b4fb6ae Mon Sep 17 00:00:00 2001 |
| From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com> |
| Date: Tue, 24 Sep 2013 21:26:24 +0300 |
| Subject: drm/i915: Make sure we respect n.max on VLV |
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| |
| We limit the maximum n divider value in order to make sure the PLL's |
| reference inout is at least 19.2 MHz. I assume that is done to satisfy |
| some hardware requirement. |
| |
| However we never check whether that calculated limit is below the |
| maximum supoorted N divider value (7). In practice that is always true |
| since we only support 100 MHz reference clock, but making the code |
| safe against higher reference clocks seems like a reasoanble thing to |
| do. |
| |
| Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> |
| Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> |
| Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> |
| (cherry picked from commit 27e639bf024a0706015dbb348eb32619a9bb9329) |
| Signed-off-by: Darren Hart <dvhart@linux.intel.com> |
| --- |
| drivers/gpu/drm/i915/intel_display.c | 5 +++-- |
| 1 file changed, 3 insertions(+), 2 deletions(-) |
| |
| diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c |
| index e83406697d67..740a9bc2dd0a 100644 |
| --- a/drivers/gpu/drm/i915/intel_display.c |
| +++ b/drivers/gpu/drm/i915/intel_display.c |
| @@ -678,15 +678,16 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc, |
| intel_clock_t *best_clock) |
| { |
| intel_clock_t clock; |
| - u32 minupdate = 19200; |
| unsigned int bestppm = 1000000; |
| + /* min update 19.2 MHz */ |
| + int max_n = min(limit->n.max, refclk / 19200); |
| |
| target *= 5; /* fast clock */ |
| |
| memset(best_clock, 0, sizeof(*best_clock)); |
| |
| /* based on hardware requirement, prefer smaller n to precision */ |
| - for (clock.n = limit->n.min; clock.n <= ((refclk) / minupdate); clock.n++) { |
| + for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) { |
| for (clock.p1 = limit->p1.max; clock.p1 > limit->p1.min; clock.p1--) { |
| for (clock.p2 = limit->p2.p2_fast; clock.p2 > 0; |
| clock.p2 -= clock.p2 > 10 ? 2 : 1) { |
| -- |
| 1.8.5.rc3 |
| |