| From b9b0cd5eed925a46ed8e4a952cd7fe47c8788e90 Mon Sep 17 00:00:00 2001 |
| From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com> |
| Date: Tue, 24 Sep 2013 21:26:31 +0300 |
| Subject: drm/i915: Don't lie about findind suitable PLL settings on VLV |
| MIME-Version: 1.0 |
| Content-Type: text/plain; charset=UTF-8 |
| Content-Transfer-Encoding: 8bit |
| |
| If vlv_find_best_dpll() couldn't find suitable PLL settings, |
| just say so instead of lying to caller. |
| |
| Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> |
| Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> |
| Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> |
| (cherry picked from commit 49e497ef43e06dbf65e0a3637bcaedb31ce17d34) |
| Signed-off-by: Darren Hart <dvhart@linux.intel.com> |
| --- |
| drivers/gpu/drm/i915/intel_display.c | 5 ++++- |
| 1 file changed, 4 insertions(+), 1 deletion(-) |
| |
| diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c |
| index ed05713b54b7..bda31bf68a8f 100644 |
| --- a/drivers/gpu/drm/i915/intel_display.c |
| +++ b/drivers/gpu/drm/i915/intel_display.c |
| @@ -662,6 +662,7 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc, |
| unsigned int bestppm = 1000000; |
| /* min update 19.2 MHz */ |
| int max_n = min(limit->n.max, refclk / 19200); |
| + bool found = false; |
| |
| target *= 5; /* fast clock */ |
| |
| @@ -692,18 +693,20 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc, |
| if (ppm < 100 && clock.p > best_clock->p) { |
| bestppm = 0; |
| *best_clock = clock; |
| + found = true; |
| } |
| |
| if (bestppm >= 10 && ppm < bestppm - 10) { |
| bestppm = ppm; |
| *best_clock = clock; |
| + found = true; |
| } |
| } |
| } |
| } |
| } |
| |
| - return true; |
| + return found; |
| } |
| |
| bool intel_crtc_active(struct drm_crtc *crtc) |
| -- |
| 1.8.5.rc3 |
| |