blob: fcfde549a75bf301273a6d933b9bb91911752f10 [file] [log] [blame]
From 94d0c30536b48fac23d85544adbd4d0563ca8b5c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
Date: Fri, 11 Oct 2013 15:26:26 +0300
Subject: drm/i915: Check 5/6 DDB split only when sprites are enabled
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Using the 5/6 DDB split make sense only when sprites are enabled.
So check that before we waste any cycles computing the merged
watermarks with the 5/6 DDB split.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit a5db6b62577b14a9fbe639af0aba9ec7ae85ae3e)
Signed-off-by: Darren Hart <dvhart@linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 3d3f1134f16b..a5503cd7a1c8 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2900,7 +2900,7 @@ static void haswell_update_wm(struct drm_crtc *crtc)
ilk_wm_merge(dev, &max, &lp_wm_1_2);
/* 5/6 split only in single pipe config on IVB+ */
- if (INTEL_INFO(dev)->gen >= 7 && config.num_pipes_active <= 1) {
+ if (INTEL_INFO(dev)->gen >= 7 && config.num_pipes_active == 1) {
ilk_wm_max(dev, 1, &config, INTEL_DDB_PART_5_6, &max);
ilk_wm_merge(dev, &max, &lp_wm_5_6);
--
1.8.5.rc3