blob: 4d8fb9d3e41684add2e8c6acc0e5f5604ebe321a [file] [log] [blame]
From 0c6289844900ff73daf8d162b442abd4d335df77 Mon Sep 17 00:00:00 2001
From: "Chew, Chiau Ee" <chiau.ee.chew@intel.com>
Date: Fri, 29 Nov 2013 02:13:11 +0800
Subject: spi/pxa2xx: Restore private register bits.
The Intel LPSS SPI private register bits have to be restored
when system resume from S3 suspend.
Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit c50325f7bcb8a3ceaacb9dbc41180b1cbbae7b5e)
Signed-off-by: Darren Hart <dvhart@linux.intel.com>
---
drivers/spi/spi-pxa2xx.c | 3 +++
1 file changed, 3 insertions(+)
--- a/drivers/spi/spi-pxa2xx.c
+++ b/drivers/spi/spi-pxa2xx.c
@@ -1325,6 +1325,9 @@ static int pxa2xx_spi_resume(struct devi
if (!pm_runtime_suspended(dev))
clk_prepare_enable(ssp->clk);
+ /* Restore LPSS private register bits */
+ lpss_ssp_setup(drv_data);
+
/* Start the queue running */
status = spi_master_resume(drv_data->master);
if (status != 0) {