blob: 675fad9c8aeaca621b4a41cee9829307926507a7 [file] [log] [blame]
From Mon Oct 1 01:13:00 2012
From: Tetsuyuki Kobayashi <>
Date: Mon, 1 Oct 2012 17:09:27 +0900
Subject: [PATCH 23/23] ARM: shmobile: sh73a0: fixup RELOC_BASE of intca_irq_pins_desc
Cc:,,,, "Rafael J. Wysocki" <>, Tetsuyuki Kobayashi <>
Message-ID: <>
From: Kuninori Morimoto <>
sh73a0 :: intca_irq_pins_desc irq table had conflict
from irq 552 to irq 557 before.
But the second controller was simply trampling the
first one by way of the -EEXIST case from irq_alloc_desc_at().
But now, we have irqdomain support from
(sh: intc: initial irqdomain support)
The irqdomain code has simply tightened down the sanity checks and
error path. So, sh73a0 CPU board got some WARNING when booting now.
This patch fixup RELOC_BASE to solve this issue.
Signed-off-by: Kuninori Morimoto <>
Acked-by: Magnus Damm <>
Signed-off-by: Rafael J. Wysocki <>
(cherry picked from commit 6c0274cbe63ec265f842537825684a619e6cce93)
Signed-off-by: Tetsuyuki Kobayashi <>
arch/arm/mach-shmobile/intc-sh73a0.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c
index ee44740..588555a 100644
--- a/arch/arm/mach-shmobile/intc-sh73a0.c
+++ b/arch/arm/mach-shmobile/intc-sh73a0.c
@@ -259,9 +259,9 @@ static int sh73a0_set_wake(struct irq_data *data, unsigned int on)
return 0; /* always allow wakeup */
-#define RELOC_BASE 0x1000
+#define RELOC_BASE 0x1200
-/* INTCA IRQ pins at INTCS + 0x1000 to make space for GIC+INTC handling */
+/* INTCA IRQ pins at INTCS + RELOC_BASE to make space for GIC+INTC handling */
#define INTCS_VECT_RELOC(n, vect) INTCS_VECT((n), (vect) + RELOC_BASE)
INTC_IRQ_PINS_32(intca_irq_pins, 0xe6900000,