| From 9a2904879742b9e68416981ed5b4bb88977124a1 Mon Sep 17 00:00:00 2001 |
| From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> |
| Date: Sun, 13 Apr 2014 17:23:35 -0700 |
| Subject: sh-pfc: r8a7791: Add SSI pin support |
| |
| Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> |
| Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> |
| Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> |
| Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
| (cherry picked from commit b664cd1f020211d8e4480c2937b82fe513a9c757) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 314 +++++++++++++++++++++++++++++++++++ |
| 1 file changed, 314 insertions(+) |
| |
| diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c |
| index a823b5ba4fd8..c1c6dfec3f8e 100644 |
| --- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c |
| +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c |
| @@ -3259,6 +3259,260 @@ static const unsigned int sdhi2_wp_pins[] = { |
| static const unsigned int sdhi2_wp_mux[] = { |
| SD2_WP_MARK, |
| }; |
| + |
| +/* - SSI -------------------------------------------------------------------- */ |
| +static const unsigned int ssi0_data_pins[] = { |
| + /* SDATA */ |
| + RCAR_GP_PIN(2, 2), |
| +}; |
| + |
| +static const unsigned int ssi0_data_mux[] = { |
| + SSI_SDATA0_MARK, |
| +}; |
| + |
| +static const unsigned int ssi0_data_b_pins[] = { |
| + /* SDATA */ |
| + RCAR_GP_PIN(3, 4), |
| +}; |
| + |
| +static const unsigned int ssi0_data_b_mux[] = { |
| + SSI_SDATA0_B_MARK, |
| +}; |
| + |
| +static const unsigned int ssi0129_ctrl_pins[] = { |
| + /* SCK, WS */ |
| + RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1), |
| +}; |
| + |
| +static const unsigned int ssi0129_ctrl_mux[] = { |
| + SSI_SCK0129_MARK, SSI_WS0129_MARK, |
| +}; |
| + |
| +static const unsigned int ssi0129_ctrl_b_pins[] = { |
| + /* SCK, WS */ |
| + RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3), |
| +}; |
| + |
| +static const unsigned int ssi0129_ctrl_b_mux[] = { |
| + SSI_SCK0129_B_MARK, SSI_WS0129_B_MARK, |
| +}; |
| + |
| +static const unsigned int ssi1_data_pins[] = { |
| + /* SDATA */ |
| + RCAR_GP_PIN(2, 5), |
| +}; |
| + |
| +static const unsigned int ssi1_data_mux[] = { |
| + SSI_SDATA1_MARK, |
| +}; |
| + |
| +static const unsigned int ssi1_data_b_pins[] = { |
| + /* SDATA */ |
| + RCAR_GP_PIN(3, 7), |
| +}; |
| + |
| +static const unsigned int ssi1_data_b_mux[] = { |
| + SSI_SDATA1_B_MARK, |
| +}; |
| + |
| +static const unsigned int ssi1_ctrl_pins[] = { |
| + /* SCK, WS */ |
| + RCAR_GP_PIN(2, 3), RCAR_GP_PIN(2, 4), |
| +}; |
| + |
| +static const unsigned int ssi1_ctrl_mux[] = { |
| + SSI_SCK1_MARK, SSI_WS1_MARK, |
| +}; |
| + |
| +static const unsigned int ssi1_ctrl_b_pins[] = { |
| + /* SCK, WS */ |
| + RCAR_GP_PIN(3, 5), RCAR_GP_PIN(3, 6), |
| +}; |
| + |
| +static const unsigned int ssi1_ctrl_b_mux[] = { |
| + SSI_SCK1_B_MARK, SSI_WS1_B_MARK, |
| +}; |
| + |
| +static const unsigned int ssi2_data_pins[] = { |
| + /* SDATA */ |
| + RCAR_GP_PIN(2, 8), |
| +}; |
| + |
| +static const unsigned int ssi2_data_mux[] = { |
| + SSI_SDATA2_MARK, |
| +}; |
| + |
| +static const unsigned int ssi2_ctrl_pins[] = { |
| + /* SCK, WS */ |
| + RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 7), |
| +}; |
| + |
| +static const unsigned int ssi2_ctrl_mux[] = { |
| + SSI_SCK2_MARK, SSI_WS2_MARK, |
| +}; |
| + |
| +static const unsigned int ssi3_data_pins[] = { |
| + /* SDATA */ |
| + RCAR_GP_PIN(2, 11), |
| +}; |
| + |
| +static const unsigned int ssi3_data_mux[] = { |
| + SSI_SDATA3_MARK, |
| +}; |
| + |
| +static const unsigned int ssi34_ctrl_pins[] = { |
| + /* SCK, WS */ |
| + RCAR_GP_PIN(2, 9), RCAR_GP_PIN(2, 10), |
| +}; |
| + |
| +static const unsigned int ssi34_ctrl_mux[] = { |
| + SSI_SCK34_MARK, SSI_WS34_MARK, |
| +}; |
| + |
| +static const unsigned int ssi4_data_pins[] = { |
| + /* SDATA */ |
| + RCAR_GP_PIN(2, 14), |
| +}; |
| + |
| +static const unsigned int ssi4_data_mux[] = { |
| + SSI_SDATA4_MARK, |
| +}; |
| + |
| +static const unsigned int ssi4_ctrl_pins[] = { |
| + /* SCK, WS */ |
| + RCAR_GP_PIN(2, 12), RCAR_GP_PIN(2, 13), |
| +}; |
| + |
| +static const unsigned int ssi4_ctrl_mux[] = { |
| + SSI_SCK4_MARK, SSI_WS4_MARK, |
| +}; |
| + |
| +static const unsigned int ssi5_data_pins[] = { |
| + /* SDATA */ |
| + RCAR_GP_PIN(2, 17), |
| +}; |
| + |
| +static const unsigned int ssi5_data_mux[] = { |
| + SSI_SDATA5_MARK, |
| +}; |
| + |
| +static const unsigned int ssi5_ctrl_pins[] = { |
| + /* SCK, WS */ |
| + RCAR_GP_PIN(2, 15), RCAR_GP_PIN(2, 16), |
| +}; |
| + |
| +static const unsigned int ssi5_ctrl_mux[] = { |
| + SSI_SCK5_MARK, SSI_WS5_MARK, |
| +}; |
| + |
| +static const unsigned int ssi6_data_pins[] = { |
| + /* SDATA */ |
| + RCAR_GP_PIN(2, 20), |
| +}; |
| + |
| +static const unsigned int ssi6_data_mux[] = { |
| + SSI_SDATA6_MARK, |
| +}; |
| + |
| +static const unsigned int ssi6_ctrl_pins[] = { |
| + /* SCK, WS */ |
| + RCAR_GP_PIN(2, 18), RCAR_GP_PIN(2, 19), |
| +}; |
| + |
| +static const unsigned int ssi6_ctrl_mux[] = { |
| + SSI_SCK6_MARK, SSI_WS6_MARK, |
| +}; |
| + |
| +static const unsigned int ssi7_data_pins[] = { |
| + /* SDATA */ |
| + RCAR_GP_PIN(2, 23), |
| +}; |
| + |
| +static const unsigned int ssi7_data_mux[] = { |
| + SSI_SDATA7_MARK, |
| +}; |
| + |
| +static const unsigned int ssi7_data_b_pins[] = { |
| + /* SDATA */ |
| + RCAR_GP_PIN(3, 12), |
| +}; |
| + |
| +static const unsigned int ssi7_data_b_mux[] = { |
| + SSI_SDATA7_B_MARK, |
| +}; |
| + |
| +static const unsigned int ssi78_ctrl_pins[] = { |
| + /* SCK, WS */ |
| + RCAR_GP_PIN(2, 21), RCAR_GP_PIN(2, 22), |
| +}; |
| + |
| +static const unsigned int ssi78_ctrl_mux[] = { |
| + SSI_SCK78_MARK, SSI_WS78_MARK, |
| +}; |
| + |
| +static const unsigned int ssi78_ctrl_b_pins[] = { |
| + /* SCK, WS */ |
| + RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11), |
| +}; |
| + |
| +static const unsigned int ssi78_ctrl_b_mux[] = { |
| + SSI_SCK78_B_MARK, SSI_WS78_B_MARK, |
| +}; |
| + |
| +static const unsigned int ssi8_data_pins[] = { |
| + /* SDATA */ |
| + RCAR_GP_PIN(2, 24), |
| +}; |
| + |
| +static const unsigned int ssi8_data_mux[] = { |
| + SSI_SDATA8_MARK, |
| +}; |
| + |
| +static const unsigned int ssi8_data_b_pins[] = { |
| + /* SDATA */ |
| + RCAR_GP_PIN(3, 13), |
| +}; |
| + |
| +static const unsigned int ssi8_data_b_mux[] = { |
| + SSI_SDATA8_B_MARK, |
| +}; |
| + |
| +static const unsigned int ssi9_data_pins[] = { |
| + /* SDATA */ |
| + RCAR_GP_PIN(2, 27), |
| +}; |
| + |
| +static const unsigned int ssi9_data_mux[] = { |
| + SSI_SDATA9_MARK, |
| +}; |
| + |
| +static const unsigned int ssi9_data_b_pins[] = { |
| + /* SDATA */ |
| + RCAR_GP_PIN(3, 18), |
| +}; |
| + |
| +static const unsigned int ssi9_data_b_mux[] = { |
| + SSI_SDATA9_B_MARK, |
| +}; |
| + |
| +static const unsigned int ssi9_ctrl_pins[] = { |
| + /* SCK, WS */ |
| + RCAR_GP_PIN(2, 25), RCAR_GP_PIN(2, 26), |
| +}; |
| + |
| +static const unsigned int ssi9_ctrl_mux[] = { |
| + SSI_SCK9_MARK, SSI_WS9_MARK, |
| +}; |
| + |
| +static const unsigned int ssi9_ctrl_b_pins[] = { |
| + /* SCK, WS */ |
| + RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 15), |
| +}; |
| + |
| +static const unsigned int ssi9_ctrl_b_mux[] = { |
| + SSI_SCK9_B_MARK, SSI_WS9_B_MARK, |
| +}; |
| + |
| /* - USB0 ------------------------------------------------------------------- */ |
| static const unsigned int usb0_pins[] = { |
| RCAR_GP_PIN(7, 23), /* PWEN */ |
| @@ -3777,6 +4031,34 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { |
| SH_PFC_PIN_GROUP(sdhi2_ctrl), |
| SH_PFC_PIN_GROUP(sdhi2_cd), |
| SH_PFC_PIN_GROUP(sdhi2_wp), |
| + SH_PFC_PIN_GROUP(ssi0_data), |
| + SH_PFC_PIN_GROUP(ssi0_data_b), |
| + SH_PFC_PIN_GROUP(ssi0129_ctrl), |
| + SH_PFC_PIN_GROUP(ssi0129_ctrl_b), |
| + SH_PFC_PIN_GROUP(ssi1_data), |
| + SH_PFC_PIN_GROUP(ssi1_data_b), |
| + SH_PFC_PIN_GROUP(ssi1_ctrl), |
| + SH_PFC_PIN_GROUP(ssi1_ctrl_b), |
| + SH_PFC_PIN_GROUP(ssi2_data), |
| + SH_PFC_PIN_GROUP(ssi2_ctrl), |
| + SH_PFC_PIN_GROUP(ssi3_data), |
| + SH_PFC_PIN_GROUP(ssi34_ctrl), |
| + SH_PFC_PIN_GROUP(ssi4_data), |
| + SH_PFC_PIN_GROUP(ssi4_ctrl), |
| + SH_PFC_PIN_GROUP(ssi5_data), |
| + SH_PFC_PIN_GROUP(ssi5_ctrl), |
| + SH_PFC_PIN_GROUP(ssi6_data), |
| + SH_PFC_PIN_GROUP(ssi6_ctrl), |
| + SH_PFC_PIN_GROUP(ssi7_data), |
| + SH_PFC_PIN_GROUP(ssi7_data_b), |
| + SH_PFC_PIN_GROUP(ssi78_ctrl), |
| + SH_PFC_PIN_GROUP(ssi78_ctrl_b), |
| + SH_PFC_PIN_GROUP(ssi8_data), |
| + SH_PFC_PIN_GROUP(ssi8_data_b), |
| + SH_PFC_PIN_GROUP(ssi9_data), |
| + SH_PFC_PIN_GROUP(ssi9_data_b), |
| + SH_PFC_PIN_GROUP(ssi9_ctrl), |
| + SH_PFC_PIN_GROUP(ssi9_ctrl_b), |
| SH_PFC_PIN_GROUP(usb0), |
| SH_PFC_PIN_GROUP(usb1), |
| VIN_DATA_PIN_GROUP(vin0_data, 24), |
| @@ -4120,6 +4402,37 @@ static const char * const sdhi2_groups[] = { |
| "sdhi2_wp", |
| }; |
| |
| +static const char * const ssi_groups[] = { |
| + "ssi0_data", |
| + "ssi0_data_b", |
| + "ssi0129_ctrl", |
| + "ssi0129_ctrl_b", |
| + "ssi1_data", |
| + "ssi1_data_b", |
| + "ssi1_ctrl", |
| + "ssi1_ctrl_b", |
| + "ssi2_data", |
| + "ssi2_ctrl", |
| + "ssi3_data", |
| + "ssi34_ctrl", |
| + "ssi4_data", |
| + "ssi4_ctrl", |
| + "ssi5_data", |
| + "ssi5_ctrl", |
| + "ssi6_data", |
| + "ssi6_ctrl", |
| + "ssi7_data", |
| + "ssi7_data_b", |
| + "ssi78_ctrl", |
| + "ssi78_ctrl_b", |
| + "ssi8_data", |
| + "ssi8_data_b", |
| + "ssi9_data", |
| + "ssi9_data_b", |
| + "ssi9_ctrl", |
| + "ssi9_ctrl_b", |
| +}; |
| + |
| static const char * const usb0_groups[] = { |
| "usb0", |
| }; |
| @@ -4204,6 +4517,7 @@ static const struct sh_pfc_function pinmux_functions[] = { |
| SH_PFC_FUNCTION(sdhi0), |
| SH_PFC_FUNCTION(sdhi1), |
| SH_PFC_FUNCTION(sdhi2), |
| + SH_PFC_FUNCTION(ssi), |
| SH_PFC_FUNCTION(usb0), |
| SH_PFC_FUNCTION(usb1), |
| SH_PFC_FUNCTION(vin0), |
| -- |
| 2.1.2 |
| |