| From 542c36a7b373d235a60c6394d307eb3364283959 Mon Sep 17 00:00:00 2001 |
| From: Phil Edworthy <phil.edworthy@renesas.com> |
| Date: Fri, 13 Jun 2014 10:37:20 +0100 |
| Subject: ARM: shmobile: r8a7791: Add PCIe Controller device node |
| |
| Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| (cherry picked from commit 811cdfae502137a21b91326ed6912a94d3dc7723) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| arch/arm/boot/dts/r8a7791.dtsi | 25 +++++++++++++++++++++++++ |
| 1 file changed, 25 insertions(+) |
| |
| diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi |
| index 7c676b9786e1..ddaebf346525 100644 |
| --- a/arch/arm/boot/dts/r8a7791.dtsi |
| +++ b/arch/arm/boot/dts/r8a7791.dtsi |
| @@ -960,4 +960,29 @@ |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| + |
| + pciec: pcie@fe000000 { |
| + compatible = "renesas,pcie-r8a7791"; |
| + reg = <0 0xfe000000 0 0x80000>; |
| + #address-cells = <3>; |
| + #size-cells = <2>; |
| + bus-range = <0x00 0xff>; |
| + device_type = "pci"; |
| + ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 |
| + 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 |
| + 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 |
| + 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; |
| + /* Map all possible DDR as inbound ranges */ |
| + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000 |
| + 0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>; |
| + interrupts = <0 116 IRQ_TYPE_LEVEL_HIGH>, |
| + <0 117 IRQ_TYPE_LEVEL_HIGH>, |
| + <0 118 IRQ_TYPE_LEVEL_HIGH>; |
| + #interrupt-cells = <1>; |
| + interrupt-map-mask = <0 0 0 0>; |
| + interrupt-map = <0 0 0 0 &gic 0 116 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&mstp3_clks R8A7791_CLK_PCIEC>, <&pcie_bus_clk>; |
| + clock-names = "pcie", "pcie_bus"; |
| + status = "disabled"; |
| + }; |
| }; |
| -- |
| 2.1.2 |
| |
