initial big import of all of the 4.14 ltsi -rc1 patches
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
diff --git a/patches/0001-drm-bridge-adv7511-Properly-update-EDID-when-no-EDID.patch b/patches/0001-drm-bridge-adv7511-Properly-update-EDID-when-no-EDID.patch
new file mode 100644
index 0000000..8aeac1e
--- /dev/null
+++ b/patches/0001-drm-bridge-adv7511-Properly-update-EDID-when-no-EDID.patch
@@ -0,0 +1,42 @@
+From 7cdbad6f0040a7cf4449abc309466201849c55a2 Mon Sep 17 00:00:00 2001
+From: Lars-Peter Clausen <lars@metafoo.de>
+Date: Tue, 5 Sep 2017 14:10:15 +0200
+Subject: [PATCH 0001/1795] drm/bridge: adv7511: Properly update EDID when no
+ EDID was found
+
+Currently adv7511_get_modes() bails out early when no EDID could be
+retrieved. This leaves the previous EDID in place, which is typically not
+the intended behavior and might confuse applications. Instead the EDID
+should be cleared when no EDID could be retrieved.
+
+All functions that are called after the EDID check handle the case where
+the EDID is NULL just fine and exhibit the expected behavior, so just drop
+the check.
+
+Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
+Tested-by: John Stultz <john.stultz@linaro.org>
+Signed-off-by: Archit Taneja <architt@codeaurora.org>
+Link: https://patchwork.freedesktop.org/patch/msgid/20170905121018.11477-1-lars@metafoo.de
+(cherry picked from commit 6f39ed4f0939e6bef722f0096894c1a986da9c9a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 2 --
+ 1 file changed, 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+index f5091827628a..13542940056b 100644
+--- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+@@ -603,8 +603,6 @@ static int adv7511_get_modes(struct adv7511 *adv7511,
+
+ kfree(adv7511->edid);
+ adv7511->edid = edid;
+- if (!edid)
+- return 0;
+
+ drm_mode_connector_update_edid_property(connector, edid);
+ count = drm_add_edid_modes(connector, edid);
+--
+2.19.0
+
diff --git a/patches/0002-drm-bridge-adv7511-Remove-private-copy-of-the-EDID.patch b/patches/0002-drm-bridge-adv7511-Remove-private-copy-of-the-EDID.patch
new file mode 100644
index 0000000..9e3fcfd
--- /dev/null
+++ b/patches/0002-drm-bridge-adv7511-Remove-private-copy-of-the-EDID.patch
@@ -0,0 +1,97 @@
+From fc1071f9c776f223219b1ddc6fbafe4155fd23be Mon Sep 17 00:00:00 2001
+From: Lars-Peter Clausen <lars@metafoo.de>
+Date: Tue, 5 Sep 2017 14:10:16 +0200
+Subject: [PATCH 0002/1795] drm/bridge: adv7511: Remove private copy of the
+ EDID
+
+The adv7511 driver keeps a private copy of the EDID in its driver state
+struct. But this copy is only used in adv7511_get_modes() where it is also
+retrieved, so there is no need to keep this extra copy around.
+
+If a need to access the EDID elsewhere in the driver ever arises the copy
+that is stored in the connector can be used. This copy is accessible
+through drm_connector_get_edid().
+
+Note, this patch removes the NULL check of the EDID before passing it to
+drm_detect_hdmi_monitor(), but that is fine since the function correctly
+handles the case where the EDID is NULL.
+
+Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
+Tested-by: John Stultz <john.stultz@linaro.org>
+Signed-off-by: Archit Taneja <architt@codeaurora.org>
+Link: https://patchwork.freedesktop.org/patch/msgid/20170905121018.11477-2-lars@metafoo.de
+(cherry picked from commit fcb4c5eee79ea17e1fbc5b3ebbd575d56714fabe)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpu/drm/bridge/adv7511/adv7511.h | 2 --
+ drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 16 ++++++----------
+ 2 files changed, 6 insertions(+), 12 deletions(-)
+
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511.h b/drivers/gpu/drm/bridge/adv7511/adv7511.h
+index fe18a5d2d84b..12ef2d8ee110 100644
+--- a/drivers/gpu/drm/bridge/adv7511/adv7511.h
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511.h
+@@ -328,8 +328,6 @@ struct adv7511 {
+ enum adv7511_sync_polarity hsync_polarity;
+ bool rgb;
+
+- struct edid *edid;
+-
+ struct gpio_desc *gpio_pd;
+
+ struct regulator_bulk_data *supplies;
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+index 13542940056b..e928c804586e 100644
+--- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+@@ -199,17 +199,14 @@ static const uint16_t adv7511_csc_ycbcr_to_rgb[] = {
+
+ static void adv7511_set_config_csc(struct adv7511 *adv7511,
+ struct drm_connector *connector,
+- bool rgb)
++ bool rgb, bool hdmi_mode)
+ {
+ struct adv7511_video_config config;
+ bool output_format_422, output_format_ycbcr;
+ unsigned int mode;
+ uint8_t infoframe[17];
+
+- if (adv7511->edid)
+- config.hdmi_mode = drm_detect_hdmi_monitor(adv7511->edid);
+- else
+- config.hdmi_mode = false;
++ config.hdmi_mode = hdmi_mode;
+
+ hdmi_avi_infoframe_init(&config.avi_infoframe);
+
+@@ -601,13 +598,14 @@ static int adv7511_get_modes(struct adv7511 *adv7511,
+ if (!adv7511->powered)
+ __adv7511_power_off(adv7511);
+
+- kfree(adv7511->edid);
+- adv7511->edid = edid;
+
+ drm_mode_connector_update_edid_property(connector, edid);
+ count = drm_add_edid_modes(connector, edid);
+
+- adv7511_set_config_csc(adv7511, connector, adv7511->rgb);
++ adv7511_set_config_csc(adv7511, connector, adv7511->rgb,
++ drm_detect_hdmi_monitor(edid));
++
++ kfree(edid);
+
+ return count;
+ }
+@@ -1168,8 +1166,6 @@ static int adv7511_remove(struct i2c_client *i2c)
+
+ i2c_unregister_device(adv7511->i2c_edid);
+
+- kfree(adv7511->edid);
+-
+ return 0;
+ }
+
+--
+2.19.0
+
diff --git a/patches/0003-drm-bridge-adv7511-Enable-connector-polling-when-no-.patch b/patches/0003-drm-bridge-adv7511-Enable-connector-polling-when-no-.patch
new file mode 100644
index 0000000..72689f1
--- /dev/null
+++ b/patches/0003-drm-bridge-adv7511-Enable-connector-polling-when-no-.patch
@@ -0,0 +1,41 @@
+From 9dcfe6f802ed056ea4e0af187371bbeeaaf17da8 Mon Sep 17 00:00:00 2001
+From: Lars-Peter Clausen <lars@metafoo.de>
+Date: Tue, 5 Sep 2017 14:10:17 +0200
+Subject: [PATCH 0003/1795] drm/bridge: adv7511: Enable connector polling when
+ no interrupt is specified
+
+Fall back to polling the connector for connect and disconnect events when
+no interrupt is specified. Otherwise these events will not be noticed and
+monitor hotplug does not work.
+
+Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
+Tested-by: John Stultz <john.stultz@linaro.org>
+Signed-off-by: Archit Taneja <architt@codeaurora.org>
+Link: https://patchwork.freedesktop.org/patch/msgid/20170905121018.11477-3-lars@metafoo.de
+(cherry picked from commit 2f47f1c106d99f367f2924ce35741050fb87e081)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+index e928c804586e..37524035486f 100644
+--- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+@@ -841,7 +841,11 @@ static int adv7511_bridge_attach(struct drm_bridge *bridge)
+ return -ENODEV;
+ }
+
+- adv->connector.polled = DRM_CONNECTOR_POLL_HPD;
++ if (adv->i2c_main->irq)
++ adv->connector.polled = DRM_CONNECTOR_POLL_HPD;
++ else
++ adv->connector.polled = DRM_CONNECTOR_POLL_CONNECT |
++ DRM_CONNECTOR_POLL_DISCONNECT;
+
+ ret = drm_connector_init(bridge->dev, &adv->connector,
+ &adv7511_connector_funcs,
+--
+2.19.0
+
diff --git a/patches/0004-drm-bridge-adv7511-Constify-HDMI-CODEC-platform-data.patch b/patches/0004-drm-bridge-adv7511-Constify-HDMI-CODEC-platform-data.patch
new file mode 100644
index 0000000..6e8f702
--- /dev/null
+++ b/patches/0004-drm-bridge-adv7511-Constify-HDMI-CODEC-platform-data.patch
@@ -0,0 +1,37 @@
+From 9049bcc42b52eebd5db97a4f359833be11cb48e2 Mon Sep 17 00:00:00 2001
+From: Lars-Peter Clausen <lars@metafoo.de>
+Date: Tue, 5 Sep 2017 14:10:18 +0200
+Subject: [PATCH 0004/1795] drm/bridge: adv7511: Constify HDMI CODEC platform
+ data
+
+The HDMI codec platform data is global driver state shared by all
+instances. As such it should not be modified (and is not), to make this
+explicit declare it as const.
+
+Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
+Tested-by: John Stultz <john.stultz@linaro.org>
+Signed-off-by: Archit Taneja <architt@codeaurora.org>
+Link: https://patchwork.freedesktop.org/patch/msgid/20170905121018.11477-4-lars@metafoo.de
+(cherry picked from commit 1591017442ffb6b0a735abe4f611a203fb632501)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpu/drm/bridge/adv7511/adv7511_audio.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_audio.c b/drivers/gpu/drm/bridge/adv7511/adv7511_audio.c
+index 67469c26bae8..1b4783d45c53 100644
+--- a/drivers/gpu/drm/bridge/adv7511/adv7511_audio.c
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511_audio.c
+@@ -210,7 +210,7 @@ static const struct hdmi_codec_ops adv7511_codec_ops = {
+ .get_dai_id = adv7511_hdmi_i2s_get_dai_id,
+ };
+
+-static struct hdmi_codec_pdata codec_data = {
++static const struct hdmi_codec_pdata codec_data = {
+ .ops = &adv7511_codec_ops,
+ .max_i2s_channels = 2,
+ .i2s = 1,
+--
+2.19.0
+
diff --git a/patches/0005-drm-adv7511-33-add-HDMI-CEC-support.patch b/patches/0005-drm-adv7511-33-add-HDMI-CEC-support.patch
new file mode 100644
index 0000000..225bb3f
--- /dev/null
+++ b/patches/0005-drm-adv7511-33-add-HDMI-CEC-support.patch
@@ -0,0 +1,760 @@
+From cd4adaf0b54ed6f4d40e70a50004871467f87dd9 Mon Sep 17 00:00:00 2001
+From: Hans Verkuil <hans.verkuil@cisco.com>
+Date: Sat, 7 Oct 2017 12:46:58 +0200
+Subject: [PATCH 0005/1795] drm: adv7511/33: add HDMI CEC support
+
+Add support for HDMI CEC to the drm adv7511/adv7533 drivers.
+
+The CEC registers that we need to use are identical for both drivers,
+but they appear at different offsets in the register map.
+
+Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
+Signed-off-by: Archit Taneja <architt@codeaurora.org>
+Link: https://patchwork.freedesktop.org/patch/msgid/20171007104658.14528-3-hverkuil@xs4all.nl
+(cherry picked from commit 3b1b975003e4a3da4b93ab032487a3ae4afca7b5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpu/drm/bridge/adv7511/Kconfig | 8 +
+ drivers/gpu/drm/bridge/adv7511/Makefile | 1 +
+ drivers/gpu/drm/bridge/adv7511/adv7511.h | 43 ++-
+ drivers/gpu/drm/bridge/adv7511/adv7511_cec.c | 337 +++++++++++++++++++
+ drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 116 ++++++-
+ drivers/gpu/drm/bridge/adv7511/adv7533.c | 38 +--
+ 6 files changed, 485 insertions(+), 58 deletions(-)
+ create mode 100644 drivers/gpu/drm/bridge/adv7511/adv7511_cec.c
+
+diff --git a/drivers/gpu/drm/bridge/adv7511/Kconfig b/drivers/gpu/drm/bridge/adv7511/Kconfig
+index 2fed567f9943..592b9d2ec034 100644
+--- a/drivers/gpu/drm/bridge/adv7511/Kconfig
++++ b/drivers/gpu/drm/bridge/adv7511/Kconfig
+@@ -21,3 +21,11 @@ config DRM_I2C_ADV7533
+ default y
+ help
+ Support for the Analog Devices ADV7533 DSI to HDMI encoder.
++
++config DRM_I2C_ADV7511_CEC
++ bool "ADV7511/33 HDMI CEC driver"
++ depends on DRM_I2C_ADV7511
++ select CEC_CORE
++ default y
++ help
++ When selected the HDMI transmitter will support the CEC feature.
+diff --git a/drivers/gpu/drm/bridge/adv7511/Makefile b/drivers/gpu/drm/bridge/adv7511/Makefile
+index 5ba675534f6e..5bb384938a71 100644
+--- a/drivers/gpu/drm/bridge/adv7511/Makefile
++++ b/drivers/gpu/drm/bridge/adv7511/Makefile
+@@ -1,4 +1,5 @@
+ adv7511-y := adv7511_drv.o
+ adv7511-$(CONFIG_DRM_I2C_ADV7511_AUDIO) += adv7511_audio.o
++adv7511-$(CONFIG_DRM_I2C_ADV7511_CEC) += adv7511_cec.o
+ adv7511-$(CONFIG_DRM_I2C_ADV7533) += adv7533.o
+ obj-$(CONFIG_DRM_I2C_ADV7511) += adv7511.o
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511.h b/drivers/gpu/drm/bridge/adv7511/adv7511.h
+index 12ef2d8ee110..b4efcbabf7f7 100644
+--- a/drivers/gpu/drm/bridge/adv7511/adv7511.h
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511.h
+@@ -195,6 +195,25 @@
+ #define ADV7511_PACKET_GM(x) ADV7511_PACKET(5, x)
+ #define ADV7511_PACKET_SPARE(x) ADV7511_PACKET(6, x)
+
++#define ADV7511_REG_CEC_TX_FRAME_HDR 0x00
++#define ADV7511_REG_CEC_TX_FRAME_DATA0 0x01
++#define ADV7511_REG_CEC_TX_FRAME_LEN 0x10
++#define ADV7511_REG_CEC_TX_ENABLE 0x11
++#define ADV7511_REG_CEC_TX_RETRY 0x12
++#define ADV7511_REG_CEC_TX_LOW_DRV_CNT 0x14
++#define ADV7511_REG_CEC_RX_FRAME_HDR 0x15
++#define ADV7511_REG_CEC_RX_FRAME_DATA0 0x16
++#define ADV7511_REG_CEC_RX_FRAME_LEN 0x25
++#define ADV7511_REG_CEC_RX_ENABLE 0x26
++#define ADV7511_REG_CEC_RX_BUFFERS 0x4a
++#define ADV7511_REG_CEC_LOG_ADDR_MASK 0x4b
++#define ADV7511_REG_CEC_LOG_ADDR_0_1 0x4c
++#define ADV7511_REG_CEC_LOG_ADDR_2 0x4d
++#define ADV7511_REG_CEC_CLK_DIV 0x4e
++#define ADV7511_REG_CEC_SOFT_RESET 0x50
++
++#define ADV7533_REG_CEC_OFFSET 0x70
++
+ enum adv7511_input_clock {
+ ADV7511_INPUT_CLOCK_1X,
+ ADV7511_INPUT_CLOCK_2X,
+@@ -297,6 +316,8 @@ enum adv7511_type {
+ ADV7533,
+ };
+
++#define ADV7511_MAX_ADDRS 3
++
+ struct adv7511 {
+ struct i2c_client *i2c_main;
+ struct i2c_client *i2c_edid;
+@@ -341,15 +362,27 @@ struct adv7511 {
+
+ enum adv7511_type type;
+ struct platform_device *audio_pdev;
++
++ struct cec_adapter *cec_adap;
++ u8 cec_addr[ADV7511_MAX_ADDRS];
++ u8 cec_valid_addrs;
++ bool cec_enabled_adap;
++ struct clk *cec_clk;
++ u32 cec_clk_freq;
+ };
+
++#ifdef CONFIG_DRM_I2C_ADV7511_CEC
++int adv7511_cec_init(struct device *dev, struct adv7511 *adv7511,
++ unsigned int offset);
++void adv7511_cec_irq_process(struct adv7511 *adv7511, unsigned int irq1);
++#endif
++
+ #ifdef CONFIG_DRM_I2C_ADV7533
+ void adv7533_dsi_power_on(struct adv7511 *adv);
+ void adv7533_dsi_power_off(struct adv7511 *adv);
+ void adv7533_mode_set(struct adv7511 *adv, struct drm_display_mode *mode);
+ int adv7533_patch_registers(struct adv7511 *adv);
+-void adv7533_uninit_cec(struct adv7511 *adv);
+-int adv7533_init_cec(struct adv7511 *adv);
++int adv7533_patch_cec_registers(struct adv7511 *adv);
+ int adv7533_attach_dsi(struct adv7511 *adv);
+ void adv7533_detach_dsi(struct adv7511 *adv);
+ int adv7533_parse_dt(struct device_node *np, struct adv7511 *adv);
+@@ -372,11 +405,7 @@ static inline int adv7533_patch_registers(struct adv7511 *adv)
+ return -ENODEV;
+ }
+
+-static inline void adv7533_uninit_cec(struct adv7511 *adv)
+-{
+-}
+-
+-static inline int adv7533_init_cec(struct adv7511 *adv)
++static inline int adv7533_patch_cec_registers(struct adv7511 *adv)
+ {
+ return -ENODEV;
+ }
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_cec.c b/drivers/gpu/drm/bridge/adv7511/adv7511_cec.c
+new file mode 100644
+index 000000000000..b33d730e4d73
+--- /dev/null
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511_cec.c
+@@ -0,0 +1,337 @@
++/*
++ * adv7511_cec.c - Analog Devices ADV7511/33 cec driver
++ *
++ * Copyright 2017 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
++ *
++ * This program is free software; you may redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; version 2 of the License.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
++ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
++ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
++ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
++ * SOFTWARE.
++ *
++ */
++
++#include <linux/device.h>
++#include <linux/module.h>
++#include <linux/of_device.h>
++#include <linux/slab.h>
++#include <linux/clk.h>
++
++#include <media/cec.h>
++
++#include "adv7511.h"
++
++#define ADV7511_INT1_CEC_MASK \
++ (ADV7511_INT1_CEC_TX_READY | ADV7511_INT1_CEC_TX_ARBIT_LOST | \
++ ADV7511_INT1_CEC_TX_RETRY_TIMEOUT | ADV7511_INT1_CEC_RX_READY1)
++
++static void adv_cec_tx_raw_status(struct adv7511 *adv7511, u8 tx_raw_status)
++{
++ unsigned int offset = adv7511->type == ADV7533 ?
++ ADV7533_REG_CEC_OFFSET : 0;
++ unsigned int val;
++
++ if (regmap_read(adv7511->regmap_cec,
++ ADV7511_REG_CEC_TX_ENABLE + offset, &val))
++ return;
++
++ if ((val & 0x01) == 0)
++ return;
++
++ if (tx_raw_status & ADV7511_INT1_CEC_TX_ARBIT_LOST) {
++ cec_transmit_attempt_done(adv7511->cec_adap,
++ CEC_TX_STATUS_ARB_LOST);
++ return;
++ }
++ if (tx_raw_status & ADV7511_INT1_CEC_TX_RETRY_TIMEOUT) {
++ u8 status;
++ u8 err_cnt = 0;
++ u8 nack_cnt = 0;
++ u8 low_drive_cnt = 0;
++ unsigned int cnt;
++
++ /*
++ * We set this status bit since this hardware performs
++ * retransmissions.
++ */
++ status = CEC_TX_STATUS_MAX_RETRIES;
++ if (regmap_read(adv7511->regmap_cec,
++ ADV7511_REG_CEC_TX_LOW_DRV_CNT + offset, &cnt)) {
++ err_cnt = 1;
++ status |= CEC_TX_STATUS_ERROR;
++ } else {
++ nack_cnt = cnt & 0xf;
++ if (nack_cnt)
++ status |= CEC_TX_STATUS_NACK;
++ low_drive_cnt = cnt >> 4;
++ if (low_drive_cnt)
++ status |= CEC_TX_STATUS_LOW_DRIVE;
++ }
++ cec_transmit_done(adv7511->cec_adap, status,
++ 0, nack_cnt, low_drive_cnt, err_cnt);
++ return;
++ }
++ if (tx_raw_status & ADV7511_INT1_CEC_TX_READY) {
++ cec_transmit_attempt_done(adv7511->cec_adap, CEC_TX_STATUS_OK);
++ return;
++ }
++}
++
++void adv7511_cec_irq_process(struct adv7511 *adv7511, unsigned int irq1)
++{
++ unsigned int offset = adv7511->type == ADV7533 ?
++ ADV7533_REG_CEC_OFFSET : 0;
++ const u32 irq_tx_mask = ADV7511_INT1_CEC_TX_READY |
++ ADV7511_INT1_CEC_TX_ARBIT_LOST |
++ ADV7511_INT1_CEC_TX_RETRY_TIMEOUT;
++ struct cec_msg msg = {};
++ unsigned int len;
++ unsigned int val;
++ u8 i;
++
++ if (irq1 & irq_tx_mask)
++ adv_cec_tx_raw_status(adv7511, irq1);
++
++ if (!(irq1 & ADV7511_INT1_CEC_RX_READY1))
++ return;
++
++ if (regmap_read(adv7511->regmap_cec,
++ ADV7511_REG_CEC_RX_FRAME_LEN + offset, &len))
++ return;
++
++ msg.len = len & 0x1f;
++
++ if (msg.len > 16)
++ msg.len = 16;
++
++ if (!msg.len)
++ return;
++
++ for (i = 0; i < msg.len; i++) {
++ regmap_read(adv7511->regmap_cec,
++ i + ADV7511_REG_CEC_RX_FRAME_HDR + offset, &val);
++ msg.msg[i] = val;
++ }
++
++ /* toggle to re-enable rx 1 */
++ regmap_write(adv7511->regmap_cec,
++ ADV7511_REG_CEC_RX_BUFFERS + offset, 1);
++ regmap_write(adv7511->regmap_cec,
++ ADV7511_REG_CEC_RX_BUFFERS + offset, 0);
++ cec_received_msg(adv7511->cec_adap, &msg);
++}
++
++static int adv7511_cec_adap_enable(struct cec_adapter *adap, bool enable)
++{
++ struct adv7511 *adv7511 = cec_get_drvdata(adap);
++ unsigned int offset = adv7511->type == ADV7533 ?
++ ADV7533_REG_CEC_OFFSET : 0;
++
++ if (adv7511->i2c_cec == NULL)
++ return -EIO;
++
++ if (!adv7511->cec_enabled_adap && enable) {
++ /* power up cec section */
++ regmap_update_bits(adv7511->regmap_cec,
++ ADV7511_REG_CEC_CLK_DIV + offset,
++ 0x03, 0x01);
++ /* legacy mode and clear all rx buffers */
++ regmap_write(adv7511->regmap_cec,
++ ADV7511_REG_CEC_RX_BUFFERS + offset, 0x07);
++ regmap_write(adv7511->regmap_cec,
++ ADV7511_REG_CEC_RX_BUFFERS + offset, 0);
++ /* initially disable tx */
++ regmap_update_bits(adv7511->regmap_cec,
++ ADV7511_REG_CEC_TX_ENABLE + offset, 1, 0);
++ /* enabled irqs: */
++ /* tx: ready */
++ /* tx: arbitration lost */
++ /* tx: retry timeout */
++ /* rx: ready 1 */
++ regmap_update_bits(adv7511->regmap,
++ ADV7511_REG_INT_ENABLE(1), 0x3f,
++ ADV7511_INT1_CEC_MASK);
++ } else if (adv7511->cec_enabled_adap && !enable) {
++ regmap_update_bits(adv7511->regmap,
++ ADV7511_REG_INT_ENABLE(1), 0x3f, 0);
++ /* disable address mask 1-3 */
++ regmap_update_bits(adv7511->regmap_cec,
++ ADV7511_REG_CEC_LOG_ADDR_MASK + offset,
++ 0x70, 0x00);
++ /* power down cec section */
++ regmap_update_bits(adv7511->regmap_cec,
++ ADV7511_REG_CEC_CLK_DIV + offset,
++ 0x03, 0x00);
++ adv7511->cec_valid_addrs = 0;
++ }
++ adv7511->cec_enabled_adap = enable;
++ return 0;
++}
++
++static int adv7511_cec_adap_log_addr(struct cec_adapter *adap, u8 addr)
++{
++ struct adv7511 *adv7511 = cec_get_drvdata(adap);
++ unsigned int offset = adv7511->type == ADV7533 ?
++ ADV7533_REG_CEC_OFFSET : 0;
++ unsigned int i, free_idx = ADV7511_MAX_ADDRS;
++
++ if (!adv7511->cec_enabled_adap)
++ return addr == CEC_LOG_ADDR_INVALID ? 0 : -EIO;
++
++ if (addr == CEC_LOG_ADDR_INVALID) {
++ regmap_update_bits(adv7511->regmap_cec,
++ ADV7511_REG_CEC_LOG_ADDR_MASK + offset,
++ 0x70, 0);
++ adv7511->cec_valid_addrs = 0;
++ return 0;
++ }
++
++ for (i = 0; i < ADV7511_MAX_ADDRS; i++) {
++ bool is_valid = adv7511->cec_valid_addrs & (1 << i);
++
++ if (free_idx == ADV7511_MAX_ADDRS && !is_valid)
++ free_idx = i;
++ if (is_valid && adv7511->cec_addr[i] == addr)
++ return 0;
++ }
++ if (i == ADV7511_MAX_ADDRS) {
++ i = free_idx;
++ if (i == ADV7511_MAX_ADDRS)
++ return -ENXIO;
++ }
++ adv7511->cec_addr[i] = addr;
++ adv7511->cec_valid_addrs |= 1 << i;
++
++ switch (i) {
++ case 0:
++ /* enable address mask 0 */
++ regmap_update_bits(adv7511->regmap_cec,
++ ADV7511_REG_CEC_LOG_ADDR_MASK + offset,
++ 0x10, 0x10);
++ /* set address for mask 0 */
++ regmap_update_bits(adv7511->regmap_cec,
++ ADV7511_REG_CEC_LOG_ADDR_0_1 + offset,
++ 0x0f, addr);
++ break;
++ case 1:
++ /* enable address mask 1 */
++ regmap_update_bits(adv7511->regmap_cec,
++ ADV7511_REG_CEC_LOG_ADDR_MASK + offset,
++ 0x20, 0x20);
++ /* set address for mask 1 */
++ regmap_update_bits(adv7511->regmap_cec,
++ ADV7511_REG_CEC_LOG_ADDR_0_1 + offset,
++ 0xf0, addr << 4);
++ break;
++ case 2:
++ /* enable address mask 2 */
++ regmap_update_bits(adv7511->regmap_cec,
++ ADV7511_REG_CEC_LOG_ADDR_MASK + offset,
++ 0x40, 0x40);
++ /* set address for mask 1 */
++ regmap_update_bits(adv7511->regmap_cec,
++ ADV7511_REG_CEC_LOG_ADDR_2 + offset,
++ 0x0f, addr);
++ break;
++ }
++ return 0;
++}
++
++static int adv7511_cec_adap_transmit(struct cec_adapter *adap, u8 attempts,
++ u32 signal_free_time, struct cec_msg *msg)
++{
++ struct adv7511 *adv7511 = cec_get_drvdata(adap);
++ unsigned int offset = adv7511->type == ADV7533 ?
++ ADV7533_REG_CEC_OFFSET : 0;
++ u8 len = msg->len;
++ unsigned int i;
++
++ /*
++ * The number of retries is the number of attempts - 1, but retry
++ * at least once. It's not clear if a value of 0 is allowed, so
++ * let's do at least one retry.
++ */
++ regmap_update_bits(adv7511->regmap_cec,
++ ADV7511_REG_CEC_TX_RETRY + offset,
++ 0x70, max(1, attempts - 1) << 4);
++
++ /* blocking, clear cec tx irq status */
++ regmap_update_bits(adv7511->regmap, ADV7511_REG_INT(1), 0x38, 0x38);
++
++ /* write data */
++ for (i = 0; i < len; i++)
++ regmap_write(adv7511->regmap_cec,
++ i + ADV7511_REG_CEC_TX_FRAME_HDR + offset,
++ msg->msg[i]);
++
++ /* set length (data + header) */
++ regmap_write(adv7511->regmap_cec,
++ ADV7511_REG_CEC_TX_FRAME_LEN + offset, len);
++ /* start transmit, enable tx */
++ regmap_write(adv7511->regmap_cec,
++ ADV7511_REG_CEC_TX_ENABLE + offset, 0x01);
++ return 0;
++}
++
++static const struct cec_adap_ops adv7511_cec_adap_ops = {
++ .adap_enable = adv7511_cec_adap_enable,
++ .adap_log_addr = adv7511_cec_adap_log_addr,
++ .adap_transmit = adv7511_cec_adap_transmit,
++};
++
++static int adv7511_cec_parse_dt(struct device *dev, struct adv7511 *adv7511)
++{
++ adv7511->cec_clk = devm_clk_get(dev, "cec");
++ if (IS_ERR(adv7511->cec_clk)) {
++ int ret = PTR_ERR(adv7511->cec_clk);
++
++ adv7511->cec_clk = NULL;
++ return ret;
++ }
++ clk_prepare_enable(adv7511->cec_clk);
++ adv7511->cec_clk_freq = clk_get_rate(adv7511->cec_clk);
++ return 0;
++}
++
++int adv7511_cec_init(struct device *dev, struct adv7511 *adv7511,
++ unsigned int offset)
++{
++ int ret = adv7511_cec_parse_dt(dev, adv7511);
++
++ if (ret)
++ return ret;
++
++ adv7511->cec_adap = cec_allocate_adapter(&adv7511_cec_adap_ops,
++ adv7511, dev_name(dev), CEC_CAP_DEFAULTS, ADV7511_MAX_ADDRS);
++ if (IS_ERR(adv7511->cec_adap))
++ return PTR_ERR(adv7511->cec_adap);
++
++ regmap_write(adv7511->regmap, ADV7511_REG_CEC_CTRL + offset, 0);
++ /* cec soft reset */
++ regmap_write(adv7511->regmap_cec,
++ ADV7511_REG_CEC_SOFT_RESET + offset, 0x01);
++ regmap_write(adv7511->regmap_cec,
++ ADV7511_REG_CEC_SOFT_RESET + offset, 0x00);
++
++ /* legacy mode */
++ regmap_write(adv7511->regmap_cec,
++ ADV7511_REG_CEC_RX_BUFFERS + offset, 0x00);
++
++ regmap_write(adv7511->regmap_cec,
++ ADV7511_REG_CEC_CLK_DIV + offset,
++ ((adv7511->cec_clk_freq / 750000) - 1) << 2);
++
++ ret = cec_register_adapter(adv7511->cec_adap, dev);
++ if (ret) {
++ cec_delete_adapter(adv7511->cec_adap);
++ adv7511->cec_adap = NULL;
++ }
++ return ret;
++}
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+index 37524035486f..8da5af390e75 100644
+--- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+@@ -11,12 +11,15 @@
+ #include <linux/module.h>
+ #include <linux/of_device.h>
+ #include <linux/slab.h>
++#include <linux/clk.h>
+
+ #include <drm/drmP.h>
+ #include <drm/drm_atomic.h>
+ #include <drm/drm_atomic_helper.h>
+ #include <drm/drm_edid.h>
+
++#include <media/cec.h>
++
+ #include "adv7511.h"
+
+ /* ADI recommended values for proper operation. */
+@@ -336,8 +339,10 @@ static void __adv7511_power_on(struct adv7511 *adv7511)
+ */
+ regmap_write(adv7511->regmap, ADV7511_REG_INT_ENABLE(0),
+ ADV7511_INT0_EDID_READY | ADV7511_INT0_HPD);
+- regmap_write(adv7511->regmap, ADV7511_REG_INT_ENABLE(1),
+- ADV7511_INT1_DDC_ERROR);
++ regmap_update_bits(adv7511->regmap,
++ ADV7511_REG_INT_ENABLE(1),
++ ADV7511_INT1_DDC_ERROR,
++ ADV7511_INT1_DDC_ERROR);
+ }
+
+ /*
+@@ -373,6 +378,9 @@ static void __adv7511_power_off(struct adv7511 *adv7511)
+ regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER,
+ ADV7511_POWER_POWER_DOWN,
+ ADV7511_POWER_POWER_DOWN);
++ regmap_update_bits(adv7511->regmap,
++ ADV7511_REG_INT_ENABLE(1),
++ ADV7511_INT1_DDC_ERROR, 0);
+ regcache_mark_dirty(adv7511->regmap);
+ }
+
+@@ -435,6 +443,8 @@ static void adv7511_hpd_work(struct work_struct *work)
+
+ if (adv7511->connector.status != status) {
+ adv7511->connector.status = status;
++ if (status == connector_status_disconnected)
++ cec_phys_addr_invalidate(adv7511->cec_adap);
+ drm_kms_helper_hotplug_event(adv7511->connector.dev);
+ }
+ }
+@@ -465,6 +475,10 @@ static int adv7511_irq_process(struct adv7511 *adv7511, bool process_hpd)
+ wake_up_all(&adv7511->wq);
+ }
+
++#ifdef CONFIG_DRM_I2C_ADV7511_CEC
++ adv7511_cec_irq_process(adv7511, irq1);
++#endif
++
+ return 0;
+ }
+
+@@ -607,6 +621,8 @@ static int adv7511_get_modes(struct adv7511 *adv7511,
+
+ kfree(edid);
+
++ cec_s_phys_addr_from_edid(adv7511->cec_adap, edid);
++
+ return count;
+ }
+
+@@ -931,6 +947,65 @@ static void adv7511_uninit_regulators(struct adv7511 *adv)
+ regulator_bulk_disable(adv->num_supplies, adv->supplies);
+ }
+
++static bool adv7511_cec_register_volatile(struct device *dev, unsigned int reg)
++{
++ struct i2c_client *i2c = to_i2c_client(dev);
++ struct adv7511 *adv7511 = i2c_get_clientdata(i2c);
++
++ if (adv7511->type == ADV7533)
++ reg -= ADV7533_REG_CEC_OFFSET;
++
++ switch (reg) {
++ case ADV7511_REG_CEC_RX_FRAME_HDR:
++ case ADV7511_REG_CEC_RX_FRAME_DATA0...
++ ADV7511_REG_CEC_RX_FRAME_DATA0 + 14:
++ case ADV7511_REG_CEC_RX_FRAME_LEN:
++ case ADV7511_REG_CEC_RX_BUFFERS:
++ case ADV7511_REG_CEC_TX_LOW_DRV_CNT:
++ return true;
++ }
++
++ return false;
++}
++
++static const struct regmap_config adv7511_cec_regmap_config = {
++ .reg_bits = 8,
++ .val_bits = 8,
++
++ .max_register = 0xff,
++ .cache_type = REGCACHE_RBTREE,
++ .volatile_reg = adv7511_cec_register_volatile,
++};
++
++static int adv7511_init_cec_regmap(struct adv7511 *adv)
++{
++ int ret;
++
++ adv->i2c_cec = i2c_new_dummy(adv->i2c_main->adapter,
++ adv->i2c_main->addr - 1);
++ if (!adv->i2c_cec)
++ return -ENOMEM;
++ i2c_set_clientdata(adv->i2c_cec, adv);
++
++ adv->regmap_cec = devm_regmap_init_i2c(adv->i2c_cec,
++ &adv7511_cec_regmap_config);
++ if (IS_ERR(adv->regmap_cec)) {
++ ret = PTR_ERR(adv->regmap_cec);
++ goto err;
++ }
++
++ if (adv->type == ADV7533) {
++ ret = adv7533_patch_cec_registers(adv);
++ if (ret)
++ goto err;
++ }
++
++ return 0;
++err:
++ i2c_unregister_device(adv->i2c_cec);
++ return ret;
++}
++
+ static int adv7511_parse_dt(struct device_node *np,
+ struct adv7511_link_config *config)
+ {
+@@ -1021,6 +1096,7 @@ static int adv7511_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
+ struct device *dev = &i2c->dev;
+ unsigned int main_i2c_addr = i2c->addr << 1;
+ unsigned int edid_i2c_addr = main_i2c_addr + 4;
++ unsigned int offset;
+ unsigned int val;
+ int ret;
+
+@@ -1104,11 +1180,9 @@ static int adv7511_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
+ goto uninit_regulators;
+ }
+
+- if (adv7511->type == ADV7533) {
+- ret = adv7533_init_cec(adv7511);
+- if (ret)
+- goto err_i2c_unregister_edid;
+- }
++ ret = adv7511_init_cec_regmap(adv7511);
++ if (ret)
++ goto err_i2c_unregister_edid;
+
+ INIT_WORK(&adv7511->hpd_work, adv7511_hpd_work);
+
+@@ -1123,10 +1197,6 @@ static int adv7511_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
+ goto err_unregister_cec;
+ }
+
+- /* CEC is unused for now */
+- regmap_write(adv7511->regmap, ADV7511_REG_CEC_CTRL,
+- ADV7511_CEC_CTRL_POWER_DOWN);
+-
+ adv7511_power_off(adv7511);
+
+ i2c_set_clientdata(i2c, adv7511);
+@@ -1141,10 +1211,23 @@ static int adv7511_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
+
+ adv7511_audio_init(dev, adv7511);
+
++ offset = adv7511->type == ADV7533 ? ADV7533_REG_CEC_OFFSET : 0;
++
++#ifdef CONFIG_DRM_I2C_ADV7511_CEC
++ ret = adv7511_cec_init(dev, adv7511, offset);
++ if (ret)
++ goto err_unregister_cec;
++#else
++ regmap_write(adv7511->regmap, ADV7511_REG_CEC_CTRL + offset,
++ ADV7511_CEC_CTRL_POWER_DOWN);
++#endif
++
+ return 0;
+
+ err_unregister_cec:
+- adv7533_uninit_cec(adv7511);
++ i2c_unregister_device(adv7511->i2c_cec);
++ if (adv7511->cec_clk)
++ clk_disable_unprepare(adv7511->cec_clk);
+ err_i2c_unregister_edid:
+ i2c_unregister_device(adv7511->i2c_edid);
+ uninit_regulators:
+@@ -1157,10 +1240,11 @@ static int adv7511_remove(struct i2c_client *i2c)
+ {
+ struct adv7511 *adv7511 = i2c_get_clientdata(i2c);
+
+- if (adv7511->type == ADV7533) {
++ if (adv7511->type == ADV7533)
+ adv7533_detach_dsi(adv7511);
+- adv7533_uninit_cec(adv7511);
+- }
++ i2c_unregister_device(adv7511->i2c_cec);
++ if (adv7511->cec_clk)
++ clk_disable_unprepare(adv7511->cec_clk);
+
+ adv7511_uninit_regulators(adv7511);
+
+@@ -1168,6 +1252,8 @@ static int adv7511_remove(struct i2c_client *i2c)
+
+ adv7511_audio_exit(adv7511);
+
++ cec_unregister_adapter(adv7511->cec_adap);
++
+ i2c_unregister_device(adv7511->i2c_edid);
+
+ return 0;
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7533.c b/drivers/gpu/drm/bridge/adv7511/adv7533.c
+index ac804f81e2f6..185b6d842166 100644
+--- a/drivers/gpu/drm/bridge/adv7511/adv7533.c
++++ b/drivers/gpu/drm/bridge/adv7511/adv7533.c
+@@ -32,14 +32,6 @@ static const struct reg_sequence adv7533_cec_fixed_registers[] = {
+ { 0x05, 0xc8 },
+ };
+
+-static const struct regmap_config adv7533_cec_regmap_config = {
+- .reg_bits = 8,
+- .val_bits = 8,
+-
+- .max_register = 0xff,
+- .cache_type = REGCACHE_RBTREE,
+-};
+-
+ static void adv7511_dsi_config_timing_gen(struct adv7511 *adv)
+ {
+ struct mipi_dsi_device *dsi = adv->dsi;
+@@ -145,37 +137,11 @@ int adv7533_patch_registers(struct adv7511 *adv)
+ ARRAY_SIZE(adv7533_fixed_registers));
+ }
+
+-void adv7533_uninit_cec(struct adv7511 *adv)
+-{
+- i2c_unregister_device(adv->i2c_cec);
+-}
+-
+-int adv7533_init_cec(struct adv7511 *adv)
++int adv7533_patch_cec_registers(struct adv7511 *adv)
+ {
+- int ret;
+-
+- adv->i2c_cec = i2c_new_dummy(adv->i2c_main->adapter,
+- adv->i2c_main->addr - 1);
+- if (!adv->i2c_cec)
+- return -ENOMEM;
+-
+- adv->regmap_cec = devm_regmap_init_i2c(adv->i2c_cec,
+- &adv7533_cec_regmap_config);
+- if (IS_ERR(adv->regmap_cec)) {
+- ret = PTR_ERR(adv->regmap_cec);
+- goto err;
+- }
+-
+- ret = regmap_register_patch(adv->regmap_cec,
++ return regmap_register_patch(adv->regmap_cec,
+ adv7533_cec_fixed_registers,
+ ARRAY_SIZE(adv7533_cec_fixed_registers));
+- if (ret)
+- goto err;
+-
+- return 0;
+-err:
+- adv7533_uninit_cec(adv);
+- return ret;
+ }
+
+ int adv7533_attach_dsi(struct adv7511 *adv)
+--
+2.19.0
+
diff --git a/patches/0006-drm-bridge-adv7511-Fix-a-use-after-free.patch b/patches/0006-drm-bridge-adv7511-Fix-a-use-after-free.patch
new file mode 100644
index 0000000..905c828
--- /dev/null
+++ b/patches/0006-drm-bridge-adv7511-Fix-a-use-after-free.patch
@@ -0,0 +1,38 @@
+From bdc69185e329743c878beb02e060d3ac0a0dc4e7 Mon Sep 17 00:00:00 2001
+From: Dan Carpenter <dan.carpenter@oracle.com>
+Date: Tue, 17 Oct 2017 23:43:43 +0300
+Subject: [PATCH 0006/1795] drm/bridge: adv7511: Fix a use after free
+
+We free "edid", then use it again on the next line.
+
+Fixes: 3b1b975003e4 ("drm: adv7511/33: add HDMI CEC support")
+Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
+Signed-off-by: Archit Taneja <architt@codeaurora.org>
+Link: https://patchwork.freedesktop.org/patch/msgid/20171017204343.zctliubjkq7imudi@mwanda
+(cherry picked from commit 8b32948690946e89c198e44f8a1252295473f348)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+index 8da5af390e75..a85d16f20581 100644
+--- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+@@ -619,10 +619,10 @@ static int adv7511_get_modes(struct adv7511 *adv7511,
+ adv7511_set_config_csc(adv7511, connector, adv7511->rgb,
+ drm_detect_hdmi_monitor(edid));
+
+- kfree(edid);
+-
+ cec_s_phys_addr_from_edid(adv7511->cec_adap, edid);
+
++ kfree(edid);
++
+ return count;
+ }
+
+--
+2.19.0
+
diff --git a/patches/0007-drm-bridge-adv7511-33-Fix-adv7511_cec_init-failure-h.patch b/patches/0007-drm-bridge-adv7511-33-Fix-adv7511_cec_init-failure-h.patch
new file mode 100644
index 0000000..0fe8024
--- /dev/null
+++ b/patches/0007-drm-bridge-adv7511-33-Fix-adv7511_cec_init-failure-h.patch
@@ -0,0 +1,171 @@
+From 351510bc84f79b52e86236dc6a48829ede3fd3fe Mon Sep 17 00:00:00 2001
+From: Hans Verkuil <hverkuil@xs4all.nl>
+Date: Tue, 21 Nov 2017 09:17:43 +0100
+Subject: [PATCH 0007/1795] drm/bridge: adv7511/33: Fix adv7511_cec_init()
+ failure handling
+
+If the device tree for a board did not specify a cec clock, then
+adv7511_cec_init would return an error, which would cause adv7511_probe()
+to fail and thus there is no HDMI output.
+
+There is no need to have adv7511_probe() fail if the CEC initialization
+fails, so just change adv7511_cec_init() to a void function. In addition,
+adv7511_cec_init() should just return silently if the cec clock isn't
+found and show a message for any other errors.
+
+An otherwise correct cleanup patch from Dan Carpenter turned this broken
+failure handling into a kernel Oops, so bisection points to commit
+7af35b0addbc ("drm/kirin: Checking for IS_ERR() instead of NULL") rather
+than 3b1b975003e4 ("drm: adv7511/33: add HDMI CEC support").
+
+Based on earlier patches from Arnd and John.
+
+Reported-by: Naresh Kamboju <naresh.kamboju@linaro.org>
+Cc: Xinliang Liu <xinliang.liu@linaro.org>
+Cc: Dan Carpenter <dan.carpenter@oracle.com>
+Cc: Sean Paul <seanpaul@chromium.org>
+Cc: Archit Taneja <architt@codeaurora.org>
+Cc: John Stultz <john.stultz@linaro.org>
+Link: https://bugs.linaro.org/show_bug.cgi?id=3345
+Link: https://lkft.validation.linaro.org/scheduler/job/48017#L3551
+Fixes: 7af35b0addbc ("drm/kirin: Checking for IS_ERR() instead of NULL")
+Fixes: 3b1b975003e4 ("drm: adv7511/33: add HDMI CEC support")
+Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
+Tested-by: Hans Verkuil <hans.verkuil@cisco.com>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Tested-by: John Stultz <john.stultz@linaro.org>
+Signed-off-by: Archit Taneja <architt@codeaurora.org>
+Link: https://patchwork.freedesktop.org/patch/msgid/9097b2a4-b6b9-5fca-e039-0a17694b1143@xs4all.nl
+(cherry picked from commit 1b6fba458c0a2e8513071330972c4c587b7d28cc)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpu/drm/bridge/adv7511/adv7511.h | 13 ++++++--
+ drivers/gpu/drm/bridge/adv7511/adv7511_cec.c | 32 ++++++++++++++------
+ drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 17 +++--------
+ 3 files changed, 37 insertions(+), 25 deletions(-)
+
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511.h b/drivers/gpu/drm/bridge/adv7511/adv7511.h
+index b4efcbabf7f7..d034b2cb5eee 100644
+--- a/drivers/gpu/drm/bridge/adv7511/adv7511.h
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511.h
+@@ -372,9 +372,18 @@ struct adv7511 {
+ };
+
+ #ifdef CONFIG_DRM_I2C_ADV7511_CEC
+-int adv7511_cec_init(struct device *dev, struct adv7511 *adv7511,
+- unsigned int offset);
++int adv7511_cec_init(struct device *dev, struct adv7511 *adv7511);
+ void adv7511_cec_irq_process(struct adv7511 *adv7511, unsigned int irq1);
++#else
++static inline int adv7511_cec_init(struct device *dev, struct adv7511 *adv7511)
++{
++ unsigned int offset = adv7511->type == ADV7533 ?
++ ADV7533_REG_CEC_OFFSET : 0;
++
++ regmap_write(adv7511->regmap, ADV7511_REG_CEC_CTRL + offset,
++ ADV7511_CEC_CTRL_POWER_DOWN);
++ return 0;
++}
+ #endif
+
+ #ifdef CONFIG_DRM_I2C_ADV7533
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_cec.c b/drivers/gpu/drm/bridge/adv7511/adv7511_cec.c
+index b33d730e4d73..a20a45c0b353 100644
+--- a/drivers/gpu/drm/bridge/adv7511/adv7511_cec.c
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511_cec.c
+@@ -300,18 +300,21 @@ static int adv7511_cec_parse_dt(struct device *dev, struct adv7511 *adv7511)
+ return 0;
+ }
+
+-int adv7511_cec_init(struct device *dev, struct adv7511 *adv7511,
+- unsigned int offset)
++int adv7511_cec_init(struct device *dev, struct adv7511 *adv7511)
+ {
++ unsigned int offset = adv7511->type == ADV7533 ?
++ ADV7533_REG_CEC_OFFSET : 0;
+ int ret = adv7511_cec_parse_dt(dev, adv7511);
+
+ if (ret)
+- return ret;
++ goto err_cec_parse_dt;
+
+ adv7511->cec_adap = cec_allocate_adapter(&adv7511_cec_adap_ops,
+ adv7511, dev_name(dev), CEC_CAP_DEFAULTS, ADV7511_MAX_ADDRS);
+- if (IS_ERR(adv7511->cec_adap))
+- return PTR_ERR(adv7511->cec_adap);
++ if (IS_ERR(adv7511->cec_adap)) {
++ ret = PTR_ERR(adv7511->cec_adap);
++ goto err_cec_alloc;
++ }
+
+ regmap_write(adv7511->regmap, ADV7511_REG_CEC_CTRL + offset, 0);
+ /* cec soft reset */
+@@ -329,9 +332,18 @@ int adv7511_cec_init(struct device *dev, struct adv7511 *adv7511,
+ ((adv7511->cec_clk_freq / 750000) - 1) << 2);
+
+ ret = cec_register_adapter(adv7511->cec_adap, dev);
+- if (ret) {
+- cec_delete_adapter(adv7511->cec_adap);
+- adv7511->cec_adap = NULL;
+- }
+- return ret;
++ if (ret)
++ goto err_cec_register;
++ return 0;
++
++err_cec_register:
++ cec_delete_adapter(adv7511->cec_adap);
++ adv7511->cec_adap = NULL;
++err_cec_alloc:
++ dev_info(dev, "Initializing CEC failed with error %d, disabling CEC\n",
++ ret);
++err_cec_parse_dt:
++ regmap_write(adv7511->regmap, ADV7511_REG_CEC_CTRL + offset,
++ ADV7511_CEC_CTRL_POWER_DOWN);
++ return ret == -EPROBE_DEFER ? ret : 0;
+ }
+diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+index a85d16f20581..95066350a2b0 100644
+--- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+@@ -1096,7 +1096,6 @@ static int adv7511_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
+ struct device *dev = &i2c->dev;
+ unsigned int main_i2c_addr = i2c->addr << 1;
+ unsigned int edid_i2c_addr = main_i2c_addr + 4;
+- unsigned int offset;
+ unsigned int val;
+ int ret;
+
+@@ -1204,24 +1203,16 @@ static int adv7511_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
+ if (adv7511->type == ADV7511)
+ adv7511_set_link_config(adv7511, &link_config);
+
++ ret = adv7511_cec_init(dev, adv7511);
++ if (ret)
++ goto err_unregister_cec;
++
+ adv7511->bridge.funcs = &adv7511_bridge_funcs;
+ adv7511->bridge.of_node = dev->of_node;
+
+ drm_bridge_add(&adv7511->bridge);
+
+ adv7511_audio_init(dev, adv7511);
+-
+- offset = adv7511->type == ADV7533 ? ADV7533_REG_CEC_OFFSET : 0;
+-
+-#ifdef CONFIG_DRM_I2C_ADV7511_CEC
+- ret = adv7511_cec_init(dev, adv7511, offset);
+- if (ret)
+- goto err_unregister_cec;
+-#else
+- regmap_write(adv7511->regmap, ADV7511_REG_CEC_CTRL + offset,
+- ADV7511_CEC_CTRL_POWER_DOWN);
+-#endif
+-
+ return 0;
+
+ err_unregister_cec:
+--
+2.19.0
+
diff --git a/patches/0008-arm_arch_timer-Expose-event-stream-status.patch b/patches/0008-arm_arch_timer-Expose-event-stream-status.patch
new file mode 100644
index 0000000..9610caf
--- /dev/null
+++ b/patches/0008-arm_arch_timer-Expose-event-stream-status.patch
@@ -0,0 +1,154 @@
+From 419c8ec298950d2cdc08b3677a3368b84289ac33 Mon Sep 17 00:00:00 2001
+From: Julien Thierry <julien.thierry@arm.com>
+Date: Fri, 13 Oct 2017 14:32:55 +0100
+Subject: [PATCH 0008/1795] arm_arch_timer: Expose event stream status
+
+The arch timer configuration for a CPU might get reset after suspending
+said CPU.
+
+In order to reliably use the event stream in the kernel (e.g. for delays),
+we keep track of the state where we can safely consider the event stream as
+properly configured. After writing to cntkctl, we issue an ISB to ensure
+that subsequent delay loops can rely on the event stream being enabled.
+
+Signed-off-by: Julien Thierry <julien.thierry@arm.com>
+Acked-by: Mark Rutland <mark.rutland@arm.com>
+Cc: Marc Zyngier <marc.zyngier@arm.com>
+Cc: Russell King <linux@armlinux.org.uk>
+Cc: Catalin Marinas <catalin.marinas@arm.com>
+Cc: Will Deacon <will.deacon@arm.com>
+Signed-off-by: Will Deacon <will.deacon@arm.com>
+(cherry picked from commit ec5c8e429d07737ee94ee1fd2ae5029547484194)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/include/asm/arch_timer.h | 1 +
+ arch/arm64/include/asm/arch_timer.h | 1 +
+ drivers/clocksource/arm_arch_timer.c | 25 ++++++++++++++++++++++---
+ include/clocksource/arm_arch_timer.h | 6 ++++++
+ 4 files changed, 30 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/include/asm/arch_timer.h b/arch/arm/include/asm/arch_timer.h
+index 9327e3a101dc..0a8d7bba2cb0 100644
+--- a/arch/arm/include/asm/arch_timer.h
++++ b/arch/arm/include/asm/arch_timer.h
+@@ -107,6 +107,7 @@ static inline u32 arch_timer_get_cntkctl(void)
+ static inline void arch_timer_set_cntkctl(u32 cntkctl)
+ {
+ asm volatile("mcr p15, 0, %0, c14, c1, 0" : : "r" (cntkctl));
++ isb();
+ }
+
+ #endif
+diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h
+index a652ce0a5cb2..bdedd8f748d1 100644
+--- a/arch/arm64/include/asm/arch_timer.h
++++ b/arch/arm64/include/asm/arch_timer.h
+@@ -144,6 +144,7 @@ static inline u32 arch_timer_get_cntkctl(void)
+ static inline void arch_timer_set_cntkctl(u32 cntkctl)
+ {
+ write_sysreg(cntkctl, cntkctl_el1);
++ isb();
+ }
+
+ static inline u64 arch_counter_get_cntpct(void)
+diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
+index 14e2419063e9..a926e62444b0 100644
+--- a/drivers/clocksource/arm_arch_timer.c
++++ b/drivers/clocksource/arm_arch_timer.c
+@@ -77,6 +77,7 @@ static bool arch_timer_mem_use_virtual;
+ static bool arch_counter_suspend_stop;
+ static bool vdso_default = true;
+
++static cpumask_t evtstrm_available = CPU_MASK_NONE;
+ static bool evtstrm_enable = IS_ENABLED(CONFIG_ARM_ARCH_TIMER_EVTSTREAM);
+
+ static int __init early_evtstrm_cfg(char *buf)
+@@ -740,6 +741,7 @@ static void arch_timer_evtstrm_enable(int divider)
+ #ifdef CONFIG_COMPAT
+ compat_elf_hwcap |= COMPAT_HWCAP_EVTSTRM;
+ #endif
++ cpumask_set_cpu(smp_processor_id(), &evtstrm_available);
+ }
+
+ static void arch_timer_configure_evtstream(void)
+@@ -864,6 +866,16 @@ u32 arch_timer_get_rate(void)
+ return arch_timer_rate;
+ }
+
++bool arch_timer_evtstrm_available(void)
++{
++ /*
++ * We might get called from a preemptible context. This is fine
++ * because availability of the event stream should be always the same
++ * for a preemptible context and context where we might resume a task.
++ */
++ return cpumask_test_cpu(raw_smp_processor_id(), &evtstrm_available);
++}
++
+ static u64 arch_counter_get_cntvct_mem(void)
+ {
+ u32 vct_lo, vct_hi, tmp_hi;
+@@ -929,6 +941,8 @@ static int arch_timer_dying_cpu(unsigned int cpu)
+ {
+ struct clock_event_device *clk = this_cpu_ptr(arch_timer_evt);
+
++ cpumask_clear_cpu(smp_processor_id(), &evtstrm_available);
++
+ arch_timer_stop(clk);
+ return 0;
+ }
+@@ -938,10 +952,16 @@ static DEFINE_PER_CPU(unsigned long, saved_cntkctl);
+ static int arch_timer_cpu_pm_notify(struct notifier_block *self,
+ unsigned long action, void *hcpu)
+ {
+- if (action == CPU_PM_ENTER)
++ if (action == CPU_PM_ENTER) {
+ __this_cpu_write(saved_cntkctl, arch_timer_get_cntkctl());
+- else if (action == CPU_PM_ENTER_FAILED || action == CPU_PM_EXIT)
++
++ cpumask_clear_cpu(smp_processor_id(), &evtstrm_available);
++ } else if (action == CPU_PM_ENTER_FAILED || action == CPU_PM_EXIT) {
+ arch_timer_set_cntkctl(__this_cpu_read(saved_cntkctl));
++
++ if (elf_hwcap & HWCAP_EVTSTRM)
++ cpumask_set_cpu(smp_processor_id(), &evtstrm_available);
++ }
+ return NOTIFY_OK;
+ }
+
+@@ -1017,7 +1037,6 @@ static int __init arch_timer_register(void)
+ if (err)
+ goto out_unreg_notify;
+
+-
+ /* Register and immediately configure the timer on the boot CPU */
+ err = cpuhp_setup_state(CPUHP_AP_ARM_ARCH_TIMER_STARTING,
+ "clockevents/arm/arch_timer:starting",
+diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h
+index cc805b72994a..4e28283e2ec6 100644
+--- a/include/clocksource/arm_arch_timer.h
++++ b/include/clocksource/arm_arch_timer.h
+@@ -93,6 +93,7 @@ struct arch_timer_mem {
+ extern u32 arch_timer_get_rate(void);
+ extern u64 (*arch_timer_read_counter)(void);
+ extern struct arch_timer_kvm_info *arch_timer_get_kvm_info(void);
++extern bool arch_timer_evtstrm_available(void);
+
+ #else
+
+@@ -106,6 +107,11 @@ static inline u64 arch_timer_read_counter(void)
+ return 0;
+ }
+
++static inline bool arch_timer_evtstrm_available(void)
++{
++ return false;
++}
++
+ #endif
+
+ #endif
+--
+2.19.0
+
diff --git a/patches/0009-dt-bindings-display-renesas-dw-hdmi-Drop-bogus-node-.patch b/patches/0009-dt-bindings-display-renesas-dw-hdmi-Drop-bogus-node-.patch
new file mode 100644
index 0000000..c43caec
--- /dev/null
+++ b/patches/0009-dt-bindings-display-renesas-dw-hdmi-Drop-bogus-node-.patch
@@ -0,0 +1,35 @@
+From fc990cb3f0c7be846f6fb90c6e9997af3c8c8844 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 30 Aug 2017 11:53:01 +0200
+Subject: [PATCH 0009/1795] dt-bindings: display: renesas: dw-hdmi: Drop bogus
+ node name suffix
+
+Node names should not use numerical suffixes if the nodes can be
+distinguished by unit-address.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 8ac491a5d0934bf1a77db155d759c682ab790c45)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ .../devicetree/bindings/display/bridge/renesas,dw-hdmi.txt | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt b/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt
+index b1a8929c2536..3a72a103a18a 100644
+--- a/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt
++++ b/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt
+@@ -37,7 +37,7 @@ Optional properties:
+
+ Example:
+
+- hdmi0: hdmi0@fead0000 {
++ hdmi0: hdmi@fead0000 {
+ compatible = "renesas,r8a7795-dw-hdmi";
+ reg = <0 0xfead0000 0 0x10000>;
+ interrupts = <0 389 IRQ_TYPE_LEVEL_HIGH>;
+--
+2.19.0
+
diff --git a/patches/0010-drm-bridge-synopsys-dw-hdmi-Enable-cec-clock.patch b/patches/0010-drm-bridge-synopsys-dw-hdmi-Enable-cec-clock.patch
new file mode 100644
index 0000000..dd01849
--- /dev/null
+++ b/patches/0010-drm-bridge-synopsys-dw-hdmi-Enable-cec-clock.patch
@@ -0,0 +1,93 @@
+From 46d5f742d13f01c4437253587a916c3954b5de64 Mon Sep 17 00:00:00 2001
+From: Pierre-Hugues Husson <phh@phh.me>
+Date: Sat, 25 Nov 2017 21:18:44 +0100
+Subject: [PATCH 0010/1795] drm/bridge: synopsys/dw-hdmi: Enable cec clock
+
+Support the "cec" optional clock. The documentation already mentions "cec"
+optional clock and it is used by several boards, but currently the driver
+doesn't enable it, thus preventing cec from working on those boards.
+
+And even worse: a /dev/cecX device will appear for those boards, but it
+won't be functioning without configuring this clock.
+
+Changes:
+v4:
+- Change commit message to stress the importance of this patch
+
+v3:
+- Drop useless braces
+
+v2:
+- Separate ENOENT errors from others
+- Propagate other errors (especially -EPROBE_DEFER)
+
+Signed-off-by: Pierre-Hugues Husson <phh@phh.me>
+Signed-off-by: Archit Taneja <architt@codeaurora.org>
+Link: https://patchwork.freedesktop.org/patch/msgid/20171125201844.11353-1-phh@phh.me
+(cherry picked from commit ebe32c3e282a62974b190b9d514864fc0d56716e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 25 +++++++++++++++++++++++
+ 1 file changed, 25 insertions(+)
+
+diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+index 4db31b89507c..994f16727458 100644
+--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+@@ -138,6 +138,7 @@ struct dw_hdmi {
+ struct device *dev;
+ struct clk *isfr_clk;
+ struct clk *iahb_clk;
++ struct clk *cec_clk;
+ struct dw_hdmi_i2c *i2c;
+
+ struct hdmi_data_info hdmi_data;
+@@ -2385,6 +2386,26 @@ __dw_hdmi_probe(struct platform_device *pdev,
+ goto err_isfr;
+ }
+
++ hdmi->cec_clk = devm_clk_get(hdmi->dev, "cec");
++ if (PTR_ERR(hdmi->cec_clk) == -ENOENT) {
++ hdmi->cec_clk = NULL;
++ } else if (IS_ERR(hdmi->cec_clk)) {
++ ret = PTR_ERR(hdmi->cec_clk);
++ if (ret != -EPROBE_DEFER)
++ dev_err(hdmi->dev, "Cannot get HDMI cec clock: %d\n",
++ ret);
++
++ hdmi->cec_clk = NULL;
++ goto err_iahb;
++ } else {
++ ret = clk_prepare_enable(hdmi->cec_clk);
++ if (ret) {
++ dev_err(hdmi->dev, "Cannot enable HDMI cec clock: %d\n",
++ ret);
++ goto err_iahb;
++ }
++ }
++
+ /* Product and revision IDs */
+ hdmi->version = (hdmi_readb(hdmi, HDMI_DESIGN_ID) << 8)
+ | (hdmi_readb(hdmi, HDMI_REVISION_ID) << 0);
+@@ -2521,6 +2542,8 @@ __dw_hdmi_probe(struct platform_device *pdev,
+ cec_notifier_put(hdmi->cec_notifier);
+
+ clk_disable_unprepare(hdmi->iahb_clk);
++ if (hdmi->cec_clk)
++ clk_disable_unprepare(hdmi->cec_clk);
+ err_isfr:
+ clk_disable_unprepare(hdmi->isfr_clk);
+ err_res:
+@@ -2544,6 +2567,8 @@ static void __dw_hdmi_remove(struct dw_hdmi *hdmi)
+
+ clk_disable_unprepare(hdmi->iahb_clk);
+ clk_disable_unprepare(hdmi->isfr_clk);
++ if (hdmi->cec_clk)
++ clk_disable_unprepare(hdmi->cec_clk);
+
+ if (hdmi->i2c)
+ i2c_del_adapter(&hdmi->i2c->adap);
+--
+2.19.0
+
diff --git a/patches/0011-ASoC-fsi-Use-of_device_get_match_data-helper.patch b/patches/0011-ASoC-fsi-Use-of_device_get_match_data-helper.patch
new file mode 100644
index 0000000..84d6eeb
--- /dev/null
+++ b/patches/0011-ASoC-fsi-Use-of_device_get_match_data-helper.patch
@@ -0,0 +1,42 @@
+From e134bb048352c78db1fdbf498a4ea05992c4ca35 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 4 Oct 2017 14:28:30 +0200
+Subject: [PATCH 0011/1795] ASoC: fsi: Use of_device_get_match_data() helper
+
+Use the of_device_get_match_data() helper instead of open coding.
+Note that when used with DT, there's always a valid match.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit b48cc1d9c3a93b239700198f69b1a49b23d95b83)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/fsi.c | 11 +++--------
+ 1 file changed, 3 insertions(+), 8 deletions(-)
+
+diff --git a/sound/soc/sh/fsi.c b/sound/soc/sh/fsi.c
+index 6d3c7706d93f..c3aaf4788557 100644
+--- a/sound/soc/sh/fsi.c
++++ b/sound/soc/sh/fsi.c
+@@ -1932,14 +1932,9 @@ static int fsi_probe(struct platform_device *pdev)
+
+ core = NULL;
+ if (np) {
+- const struct of_device_id *of_id;
+-
+- of_id = of_match_device(fsi_of_match, &pdev->dev);
+- if (of_id) {
+- core = of_id->data;
+- fsi_of_parse("fsia", np, &info.port_a, &pdev->dev);
+- fsi_of_parse("fsib", np, &info.port_b, &pdev->dev);
+- }
++ core = of_device_get_match_data(&pdev->dev);
++ fsi_of_parse("fsia", np, &info.port_a, &pdev->dev);
++ fsi_of_parse("fsib", np, &info.port_b, &pdev->dev);
+ } else {
+ const struct platform_device_id *id_entry = pdev->id_entry;
+ if (id_entry)
+--
+2.19.0
+
diff --git a/patches/0012-arm64-defconfig-Enable-Renesas-R8A77995-SoC.patch b/patches/0012-arm64-defconfig-Enable-Renesas-R8A77995-SoC.patch
new file mode 100644
index 0000000..58f8d40
--- /dev/null
+++ b/patches/0012-arm64-defconfig-Enable-Renesas-R8A77995-SoC.patch
@@ -0,0 +1,31 @@
+From 64150c3156048cbf048fff81413039df82cd39ff Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 17 Aug 2017 13:32:11 +0200
+Subject: [PATCH 0012/1795] arm64: defconfig: Enable Renesas R8A77995 SoC
+
+Enable support for the Renesas R-Car D3 SoC.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 0ed626d35ea2ec744826b3ebcb1d190a6c670d56)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/configs/defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
+index b05796578e7a..dd77931df8bb 100644
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -51,6 +51,7 @@ CONFIG_ARCH_SEATTLE=y
+ CONFIG_ARCH_RENESAS=y
+ CONFIG_ARCH_R8A7795=y
+ CONFIG_ARCH_R8A7796=y
++CONFIG_ARCH_R8A77995=y
+ CONFIG_ARCH_STRATIX10=y
+ CONFIG_ARCH_TEGRA=y
+ CONFIG_ARCH_SPRD=y
+--
+2.19.0
+
diff --git a/patches/0013-ARM-shmobile-Document-R-Car-V3M-SoC-DT-bindings.patch b/patches/0013-ARM-shmobile-Document-R-Car-V3M-SoC-DT-bindings.patch
new file mode 100644
index 0000000..ec1310f
--- /dev/null
+++ b/patches/0013-ARM-shmobile-Document-R-Car-V3M-SoC-DT-bindings.patch
@@ -0,0 +1,31 @@
+From 9524224245997dadbfb3314716507108fa542338 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 25 Aug 2017 14:56:49 +0200
+Subject: [PATCH 0013/1795] ARM: shmobile: Document R-Car V3M SoC DT bindings
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 443c1631172a7a6dc19c1657425354327858a548)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt
+index ae75cb3b1331..a1f06711a4dd 100644
+--- a/Documentation/devicetree/bindings/arm/shmobile.txt
++++ b/Documentation/devicetree/bindings/arm/shmobile.txt
+@@ -39,6 +39,8 @@ SoCs:
+ compatible = "renesas,r8a7795"
+ - R-Car M3-W (R8A77960)
+ compatible = "renesas,r8a7796"
++ - R-Car V3M (R8A77970)
++ compatible = "renesas,r8a77970"
+ - R-Car D3 (R8A77995)
+ compatible = "renesas,r8a77995"
+
+--
+2.19.0
+
diff --git a/patches/0014-arm64-dts-renesas-r8a7795-es1-Drop-extra-zero-from-u.patch b/patches/0014-arm64-dts-renesas-r8a7795-es1-Drop-extra-zero-from-u.patch
new file mode 100644
index 0000000..18e1e3e
--- /dev/null
+++ b/patches/0014-arm64-dts-renesas-r8a7795-es1-Drop-extra-zero-from-u.patch
@@ -0,0 +1,38 @@
+From f5c9f3f261a0b807f9f13a08f5136ee2e4d7d494 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 17 Aug 2017 13:29:14 +0200
+Subject: [PATCH 0014/1795] arm64: dts: renesas: r8a7795-es1: Drop extra zero
+ from usb unit address
+
+With W=1:
+
+ arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dtb: Warning (simple_bus_reg): Node /soc/usb@ee0400000 simple-bus unit address format error, expected "ee040000"
+ arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb.dtb: Warning (simple_bus_reg): Node /soc/usb@ee0400000 simple-bus unit address format error, expected "ee040000"
+
+Fixes: 291e0c4994d0813f ("arm64: dts: r8a7795: Add support for R-Car H3 ES2.0")
+Fixes: 171f2ef82284f61b ("arm64: dts: r8a7795: Add USB3.0 host device nodes")
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 0e0f4d47288a8e56ed2586699b89573afcb1bf72)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
+index aaa5e67a963e..655dd30639c5 100644
+--- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
+@@ -11,7 +11,7 @@
+ #include "r8a7795.dtsi"
+
+ &soc {
+- xhci1: usb@ee0400000 {
++ xhci1: usb@ee040000 {
+ compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
+ reg = <0 0xee040000 0 0xc00>;
+ interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+--
+2.19.0
+
diff --git a/patches/0015-arm64-dts-renesas-r8a7796-Add-FDP1-instance.patch b/patches/0015-arm64-dts-renesas-r8a7796-Add-FDP1-instance.patch
new file mode 100644
index 0000000..8e50aac
--- /dev/null
+++ b/patches/0015-arm64-dts-renesas-r8a7796-Add-FDP1-instance.patch
@@ -0,0 +1,42 @@
+From 39e6b59e4eb8ce49c6045629dfb91231fdd87e34 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Thu, 13 Jul 2017 14:21:10 +0300
+Subject: [PATCH 0015/1795] arm64: dts: renesas: r8a7796: Add FDP1 instance
+
+The r8a7796 has a single FDP1 instance.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Reviewed-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 8ef7512a68f4cd559af5d5f0be3ee2e89f0769ec)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a7796.dtsi | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+index 369092e17e34..16da83458f18 100644
+--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+@@ -1659,6 +1659,16 @@
+ /* placeholder */
+ };
+
++ fdp1@fe940000 {
++ compatible = "renesas,fdp1";
++ reg = <0 0xfe940000 0 0x2400>;
++ interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 119>;
++ power-domains = <&sysc R8A7796_PD_A3VC>;
++ resets = <&cpg 119>;
++ renesas,fcp = <&fcpf0>;
++ };
++
+ fcpf0: fcp@fe950000 {
+ compatible = "renesas,fcpf";
+ reg = <0 0xfe950000 0 0x200>;
+--
+2.19.0
+
diff --git a/patches/0016-arm64-dts-renesas-r8a77995-update-PFC-node-name-to-p.patch b/patches/0016-arm64-dts-renesas-r8a77995-update-PFC-node-name-to-p.patch
new file mode 100644
index 0000000..267a170
--- /dev/null
+++ b/patches/0016-arm64-dts-renesas-r8a77995-update-PFC-node-name-to-p.patch
@@ -0,0 +1,37 @@
+From d0a7e2a95a05befba54ac3c88330feb9ad060ec0 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Tue, 29 Aug 2017 16:35:59 +0900
+Subject: [PATCH 0016/1795] arm64: dts: renesas: r8a77995: update PFC node name
+ to pin-controller
+
+This patch changes the name from from e6060000.pfc and pfc@e6060000 to
+e6060000.pin-controller and pin-controller@e6060000 like other Renesas
+SoCs.
+
+Reported-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 5a979972b6cb799944423f00c4e269d826c6d2c7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77995.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+index d0f95b78c022..72c303362b16 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+@@ -122,7 +122,7 @@
+ reg = <0 0xe6160000 0 0x0200>;
+ };
+
+- pfc: pfc@e6060000 {
++ pfc: pin-controller@e6060000 {
+ compatible = "renesas,pfc-r8a77995";
+ reg = <0 0xe6060000 0 0x508>;
+ };
+--
+2.19.0
+
diff --git a/patches/0017-arm64-dts-renesas-ulcb-Enable-display-output.patch b/patches/0017-arm64-dts-renesas-ulcb-Enable-display-output.patch
new file mode 100644
index 0000000..e13987e
--- /dev/null
+++ b/patches/0017-arm64-dts-renesas-ulcb-Enable-display-output.patch
@@ -0,0 +1,35 @@
+From e0cd57cb4a496f98adf25af47bd33546e7877d14 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 22 Aug 2017 17:23:26 +0300
+Subject: [PATCH 0017/1795] arm64: dts: renesas: ulcb: Enable display output
+
+The DU is already wired up to the HDMI encoder, all we need to do is
+enable it.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 7da2ed12da2c81b782ee4c3b4b0b87098048aae8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb.dtsi | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi
+index e95d99265af9..f630a8340b37 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi
+@@ -156,6 +156,10 @@
+ };
+ };
+
++&du {
++ status = "okay";
++};
++
+ &ehci1 {
+ status = "okay";
+ };
+--
+2.19.0
+
diff --git a/patches/0018-arm64-dts-renesas-r8a7795-Drop-bogus-HDMI-node-names.patch b/patches/0018-arm64-dts-renesas-r8a7795-Drop-bogus-HDMI-node-names.patch
new file mode 100644
index 0000000..5cedf5f
--- /dev/null
+++ b/patches/0018-arm64-dts-renesas-r8a7795-Drop-bogus-HDMI-node-names.patch
@@ -0,0 +1,44 @@
+From ebceaf848008d7b8529c36b8c0a0e5f7615a4877 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 30 Aug 2017 12:03:17 +0200
+Subject: [PATCH 0018/1795] arm64: dts: renesas: r8a7795: Drop bogus HDMI node
+ names suffixes
+
+Node names should not use numerical suffixes if the nodes can be
+distinguished by unit-address.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 6b5ac2f1cb1162679662f3be891978d32b345b6f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a7795.dtsi | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+index 2938195b9571..5d5174d8635d 100644
+--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+@@ -2014,7 +2014,7 @@
+ renesas,fcp = <&fcpf1>;
+ };
+
+- hdmi0: hdmi0@fead0000 {
++ hdmi0: hdmi@fead0000 {
+ compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
+ reg = <0 0xfead0000 0 0x10000>;
+ interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
+@@ -2039,7 +2039,7 @@
+ };
+ };
+
+- hdmi1: hdmi1@feae0000 {
++ hdmi1: hdmi@feae0000 {
+ compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
+ reg = <0 0xfeae0000 0 0x10000>;
+ interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>;
+--
+2.19.0
+
diff --git a/patches/0019-arm64-dts-renesas-r8a77995-Use-r8a7795-sysc-binding-.patch b/patches/0019-arm64-dts-renesas-r8a77995-Use-r8a7795-sysc-binding-.patch
new file mode 100644
index 0000000..8fe5787
--- /dev/null
+++ b/patches/0019-arm64-dts-renesas-r8a77995-Use-r8a7795-sysc-binding-.patch
@@ -0,0 +1,76 @@
+From 6af8fcdbd4b809f00f61ef9742a14e5ab20a81c1 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 20 Jul 2017 14:54:36 +0200
+Subject: [PATCH 0019/1795] arm64: dts: renesas: r8a77995: Use r8a7795-sysc
+ binding definitions
+
+Replace the hardcoded power domain indices by R8A77995_PD_* symbols.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 9066b042b4502f711c5207662ec0d26be1732aff)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77995.dtsi | 11 ++++++-----
+ 1 file changed, 6 insertions(+), 5 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+index 72c303362b16..a5b769b840e9 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+@@ -11,6 +11,7 @@
+
+ #include <dt-bindings/clock/renesas-cpg-mssr.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
++#include <dt-bindings/power/r8a77995-sysc.h>
+
+ / {
+ compatible = "renesas,r8a77995";
+@@ -30,14 +31,14 @@
+ compatible = "arm,cortex-a53", "arm,armv8";
+ reg = <0x0>;
+ device_type = "cpu";
+- power-domains = <&sysc 5>;
++ power-domains = <&sysc R8A77995_PD_CA53_CPU0>;
+ next-level-cache = <&L2_CA53>;
+ enable-method = "psci";
+ };
+
+ L2_CA53: cache-controller-1 {
+ compatible = "cache";
+- power-domains = <&sysc 21>;
++ power-domains = <&sysc R8A77995_PD_CA53_SCU>;
+ cache-unified;
+ cache-level = <2>;
+ };
+@@ -76,7 +77,7 @@
+ (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+- power-domains = <&sysc 32>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
+ };
+
+@@ -97,7 +98,7 @@
+ "renesas,rcar-gen3-wdt";
+ reg = <0 0xe6020000 0 0x0c>;
+ clocks = <&cpg CPG_MOD 402>;
+- power-domains = <&sysc 32>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 402>;
+ status = "disabled";
+ };
+@@ -147,7 +148,7 @@
+ <&cpg CPG_CORE 16>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+- power-domains = <&sysc 32>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 310>;
+ status = "disabled";
+ };
+--
+2.19.0
+
diff --git a/patches/0020-arm64-dts-renesas-r8a77995-Use-r8a7795-cpg-mssr-bind.patch b/patches/0020-arm64-dts-renesas-r8a77995-Use-r8a7795-cpg-mssr-bind.patch
new file mode 100644
index 0000000..a3ddc67
--- /dev/null
+++ b/patches/0020-arm64-dts-renesas-r8a77995-Use-r8a7795-cpg-mssr-bind.patch
@@ -0,0 +1,42 @@
+From cd8bd1d558c5f50392bad847663b83cdaf3b8b86 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 20 Jul 2017 14:54:37 +0200
+Subject: [PATCH 0020/1795] arm64: dts: renesas: r8a77995: Use r8a7795-cpg-mssr
+ binding definitions
+
+Replace the hardcoded clock indices by R8A77995_CLK_* symbols.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 5889ded170cd5b6f5a9449956288d069074b20c4)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77995.dtsi | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+index a5b769b840e9..84b6bd58eafb 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+@@ -9,7 +9,7 @@
+ * kind, whether express or implied.
+ */
+
+-#include <dt-bindings/clock/renesas-cpg-mssr.h>
++#include <dt-bindings/clock/r8a77995-cpg-mssr.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/power/r8a77995-sysc.h>
+
+@@ -145,7 +145,7 @@
+ reg = <0 0xe6e88000 0 64>;
+ interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 310>,
+- <&cpg CPG_CORE 16>,
++ <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+--
+2.19.0
+
diff --git a/patches/0021-arm64-dts-renesas-r8a77995-add-GPIO-device-nodes.patch b/patches/0021-arm64-dts-renesas-r8a77995-add-GPIO-device-nodes.patch
new file mode 100644
index 0000000..2f23d40
--- /dev/null
+++ b/patches/0021-arm64-dts-renesas-r8a77995-add-GPIO-device-nodes.patch
@@ -0,0 +1,144 @@
+From 2521a068e9e30dc8ad64844dce2c215d4ac1b919 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Wed, 13 Sep 2017 19:33:59 +0900
+Subject: [PATCH 0021/1795] arm64: dts: renesas: r8a77995: add GPIO device
+ nodes
+
+This patch adds GPIO device nodes for r8a77995.
+
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 11581f5d52a81fe32fb1bb1c71fb22fb9192ee01)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77995.dtsi | 112 ++++++++++++++++++++++
+ 1 file changed, 112 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+index 84b6bd58eafb..d7756256d2a6 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+@@ -139,6 +139,118 @@
+ #power-domain-cells = <1>;
+ };
+
++ gpio0: gpio@e6050000 {
++ compatible = "renesas,gpio-r8a77995",
++ "renesas,rcar-gen3-gpio",
++ "renesas,gpio-rcar";
++ reg = <0 0xe6050000 0 0x50>;
++ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 0 9>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ clocks = <&cpg CPG_MOD 912>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 912>;
++ };
++
++ gpio1: gpio@e6051000 {
++ compatible = "renesas,gpio-r8a77995",
++ "renesas,rcar-gen3-gpio",
++ "renesas,gpio-rcar";
++ reg = <0 0xe6051000 0 0x50>;
++ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 32 32>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ clocks = <&cpg CPG_MOD 911>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 911>;
++ };
++
++ gpio2: gpio@e6052000 {
++ compatible = "renesas,gpio-r8a77995",
++ "renesas,rcar-gen3-gpio",
++ "renesas,gpio-rcar";
++ reg = <0 0xe6052000 0 0x50>;
++ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 64 32>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ clocks = <&cpg CPG_MOD 910>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 910>;
++ };
++
++ gpio3: gpio@e6053000 {
++ compatible = "renesas,gpio-r8a77995",
++ "renesas,rcar-gen3-gpio",
++ "renesas,gpio-rcar";
++ reg = <0 0xe6053000 0 0x50>;
++ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 96 10>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ clocks = <&cpg CPG_MOD 909>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 909>;
++ };
++
++ gpio4: gpio@e6054000 {
++ compatible = "renesas,gpio-r8a77995",
++ "renesas,rcar-gen3-gpio",
++ "renesas,gpio-rcar";
++ reg = <0 0xe6054000 0 0x50>;
++ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 128 32>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ clocks = <&cpg CPG_MOD 908>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 908>;
++ };
++
++ gpio5: gpio@e6055000 {
++ compatible = "renesas,gpio-r8a77995",
++ "renesas,rcar-gen3-gpio",
++ "renesas,gpio-rcar";
++ reg = <0 0xe6055000 0 0x50>;
++ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 160 21>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ clocks = <&cpg CPG_MOD 907>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 907>;
++ };
++
++ gpio6: gpio@e6055400 {
++ compatible = "renesas,gpio-r8a77995",
++ "renesas,rcar-gen3-gpio",
++ "renesas,gpio-rcar";
++ reg = <0 0xe6055400 0 0x50>;
++ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 192 14>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ clocks = <&cpg CPG_MOD 906>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 906>;
++ };
++
+ scif2: serial@e6e88000 {
+ compatible = "renesas,scif-r8a77995",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+--
+2.19.0
+
diff --git a/patches/0022-arm64-dts-renesas-r8a77995-Add-EthernetAVB-device-no.patch b/patches/0022-arm64-dts-renesas-r8a77995-Add-EthernetAVB-device-no.patch
new file mode 100644
index 0000000..a2a1c55
--- /dev/null
+++ b/patches/0022-arm64-dts-renesas-r8a77995-Add-EthernetAVB-device-no.patch
@@ -0,0 +1,77 @@
+From 1dbcd1eb493a757444f904aac5b6f558b7def69e Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Wed, 13 Sep 2017 21:18:38 +0900
+Subject: [PATCH 0022/1795] arm64: dts: renesas: r8a77995: Add EthernetAVB
+ device node
+
+This patch adds EthernetAVB device node for r8a77995.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit f9ba0c4cfe6169b7cc9a2f9653c76b05316f0508)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77995.dtsi | 45 +++++++++++++++++++++++
+ 1 file changed, 45 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+index d7756256d2a6..72d04d7337be 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+@@ -251,6 +251,51 @@
+ resets = <&cpg 906>;
+ };
+
++ avb: ethernet@e6800000 {
++ compatible = "renesas,etheravb-r8a77995",
++ "renesas,etheravb-rcar-gen3";
++ reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
++ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "ch0", "ch1", "ch2", "ch3",
++ "ch4", "ch5", "ch6", "ch7",
++ "ch8", "ch9", "ch10", "ch11",
++ "ch12", "ch13", "ch14", "ch15",
++ "ch16", "ch17", "ch18", "ch19",
++ "ch20", "ch21", "ch22", "ch23",
++ "ch24";
++ clocks = <&cpg CPG_MOD 812>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 812>;
++ phy-mode = "rgmii-txid";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "disabled";
++ };
++
+ scif2: serial@e6e88000 {
+ compatible = "renesas,scif-r8a77995",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+--
+2.19.0
+
diff --git a/patches/0023-arm64-dts-renesas-initial-R8A77970-SoC-device-tree.patch b/patches/0023-arm64-dts-renesas-initial-R8A77970-SoC-device-tree.patch
new file mode 100644
index 0000000..059145c
--- /dev/null
+++ b/patches/0023-arm64-dts-renesas-initial-R8A77970-SoC-device-tree.patch
@@ -0,0 +1,158 @@
+From 54b42f135cf32911d2318dab5e86db00466ec9be Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 15 Sep 2017 22:43:20 +0300
+Subject: [PATCH 0023/1795] arm64: dts: renesas: initial R8A77970 SoC device
+ tree
+
+The initial R8A77970 SoC device tree including Cortex-A53 CPU, GIC, timer,
+CPG, RST, and SYSC.
+
+Based on the original (and large) patch by Daisuke Matsushita
+<daisuke.matsushita.ns@hitachi.com>.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 41f4345a6111056341346742942df3f5d5be535d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77970.dtsi | 125 ++++++++++++++++++++++
+ 1 file changed, 125 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a77970.dtsi
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+new file mode 100644
+index 000000000000..dec3492cd7dc
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+@@ -0,0 +1,125 @@
++/*
++ * Device Tree Source for the r8a77970 SoC
++ *
++ * Copyright (C) 2016-2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include <dt-bindings/interrupt-controller/irq.h>
++#include <dt-bindings/interrupt-controller/arm-gic.h>
++#include <dt-bindings/clock/renesas-cpg-mssr.h>
++
++/ {
++ compatible = "renesas,r8a77970";
++ #address-cells = <2>;
++ #size-cells = <2>;
++
++ psci {
++ compatible = "arm,psci-1.0", "arm,psci-0.2";
++ method = "smc";
++ };
++
++ cpus {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ a53_0: cpu@0 {
++ device_type = "cpu";
++ compatible = "arm,cortex-a53", "arm,armv8";
++ reg = <0>;
++ clocks = <&cpg CPG_CORE 0>;
++ power-domains = <&sysc 5>;
++ next-level-cache = <&L2_CA53>;
++ enable-method = "psci";
++ };
++
++ L2_CA53: cache-controller {
++ compatible = "cache";
++ power-domains = <&sysc 21>;
++ cache-unified;
++ cache-level = <2>;
++ };
++ };
++
++ extal_clk: extal {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ /* This value must be overridden by the board */
++ clock-frequency = <0>;
++ };
++
++ extalr_clk: extalr {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ /* This value must be overridden by the board */
++ clock-frequency = <0>;
++ };
++
++ soc {
++ compatible = "simple-bus";
++ interrupt-parent = <&gic>;
++
++ #address-cells = <2>;
++ #size-cells = <2>;
++ ranges;
++
++ gic: interrupt-controller@f1010000 {
++ compatible = "arm,gic-400";
++ #interrupt-cells = <3>;
++ #address-cells = <0>;
++ interrupt-controller;
++ reg = <0 0xf1010000 0 0x1000>,
++ <0 0xf1020000 0 0x20000>,
++ <0 0xf1040000 0 0x20000>,
++ <0 0xf1060000 0 0x20000>;
++ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) |
++ IRQ_TYPE_LEVEL_HIGH)>;
++ clocks = <&cpg CPG_MOD 408>;
++ clock-names = "clk";
++ power-domains = <&sysc 32>;
++ resets = <&cpg 408>;
++ };
++
++ timer {
++ compatible = "arm,armv8-timer";
++ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) |
++ IRQ_TYPE_LEVEL_LOW)>,
++ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) |
++ IRQ_TYPE_LEVEL_LOW)>,
++ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) |
++ IRQ_TYPE_LEVEL_LOW)>,
++ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) |
++ IRQ_TYPE_LEVEL_LOW)>;
++ };
++
++ cpg: clock-controller@e6150000 {
++ compatible = "renesas,r8a77970-cpg-mssr";
++ reg = <0 0xe6150000 0 0x1000>;
++ clocks = <&extal_clk>, <&extalr_clk>;
++ clock-names = "extal", "extalr";
++ #clock-cells = <2>;
++ #power-domain-cells = <0>;
++ #reset-cells = <1>;
++ };
++
++ rst: reset-controller@e6160000 {
++ compatible = "renesas,r8a77970-rst";
++ reg = <0 0xe6160000 0 0x200>;
++ };
++
++ sysc: system-controller@e6180000 {
++ compatible = "renesas,r8a77970-sysc";
++ reg = <0 0xe6180000 0 0x440>;
++ #power-domain-cells = <1>;
++ };
++
++ prr: chipid@fff00044 {
++ compatible = "renesas,prr";
++ reg = <0 0xfff00044 0 4>;
++ };
++ };
++};
+--
+2.19.0
+
diff --git a/patches/0024-arm64-dts-renesas-r8a77970-add-SYS-DMAC-support.patch b/patches/0024-arm64-dts-renesas-r8a77970-add-SYS-DMAC-support.patch
new file mode 100644
index 0000000..7aaf971
--- /dev/null
+++ b/patches/0024-arm64-dts-renesas-r8a77970-add-SYS-DMAC-support.patch
@@ -0,0 +1,82 @@
+From e9b0e4ffed3b9d1d8659be90c75281030a29f4fc Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 15 Sep 2017 22:43:21 +0300
+Subject: [PATCH 0024/1795] arm64: dts: renesas: r8a77970: add SYS-DMAC support
+
+Describe SYS-DMAC1/2 in the R8A77970 device tree.
+
+Based on the original (and large) patch by Daisuke Matsushita
+<daisuke.matsushita.ns@hitachi.com>.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit bd746e70d3fce2cb1719fd2c085cd57a872575fe)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77970.dtsi | 48 +++++++++++++++++++++++
+ 1 file changed, 48 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+index dec3492cd7dc..a2a438a91b3f 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+@@ -121,5 +121,53 @@
+ compatible = "renesas,prr";
+ reg = <0 0xfff00044 0 4>;
+ };
++
++ dmac1: dma-controller@e7300000 {
++ compatible = "renesas,dmac-r8a77970",
++ "renesas,rcar-dmac";
++ reg = <0 0xe7300000 0 0x10000>;
++ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "error",
++ "ch0", "ch1", "ch2", "ch3",
++ "ch4", "ch5", "ch6", "ch7";
++ clocks = <&cpg CPG_MOD 218>;
++ clock-names = "fck";
++ power-domains = <&sysc 32>;
++ resets = <&cpg 218>;
++ #dma-cells = <1>;
++ dma-channels = <8>;
++ };
++
++ dmac2: dma-controller@e7310000 {
++ compatible = "renesas,dmac-r8a77970",
++ "renesas,rcar-dmac";
++ reg = <0 0xe7310000 0 0x10000>;
++ interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "error",
++ "ch0", "ch1", "ch2", "ch3",
++ "ch4", "ch5", "ch6", "ch7";
++ clocks = <&cpg CPG_MOD 217>;
++ clock-names = "fck";
++ power-domains = <&sysc 32>;
++ resets = <&cpg 217>;
++ #dma-cells = <1>;
++ dma-channels = <8>;
++ };
+ };
+ };
+--
+2.19.0
+
diff --git a/patches/0025-arm64-dts-renesas-r8a77970-add-H-SCIF-support.patch b/patches/0025-arm64-dts-renesas-r8a77970-add-H-SCIF-support.patch
new file mode 100644
index 0000000..a297c98
--- /dev/null
+++ b/patches/0025-arm64-dts-renesas-r8a77970-add-H-SCIF-support.patch
@@ -0,0 +1,190 @@
+From d2dea25968cf965cb6e71962e8571cca3c68df5a Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 15 Sep 2017 22:43:22 +0300
+Subject: [PATCH 0025/1795] arm64: dts: renesas: r8a77970: add [H]SCIF support
+
+Describe [H]SCIF ports in the R8A77970 device tree.
+
+Based on the original (and large) patch by Daisuke Matsushita
+<daisuke.matsushita.ns@hitachi.com>.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 38dbb6fc972e53110f0bc308057822d73c063903)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77970.dtsi | 149 ++++++++++++++++++++++
+ 1 file changed, 149 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+index a2a438a91b3f..04ec0e459686 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+@@ -59,6 +59,13 @@
+ clock-frequency = <0>;
+ };
+
++ /* External SCIF clock - to be overridden by boards that provide it */
++ scif_clk: scif {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <0>;
++ };
++
+ soc {
+ compatible = "simple-bus";
+ interrupt-parent = <&gic>;
+@@ -169,5 +176,147 @@
+ #dma-cells = <1>;
+ dma-channels = <8>;
+ };
++
++ hscif0: serial@e6540000 {
++ compatible = "renesas,hscif-r8a77970",
++ "renesas,rcar-gen3-hscif",
++ "renesas,hscif";
++ reg = <0 0xe6540000 0 96>;
++ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 520>,
++ <&cpg CPG_CORE 9>,
++ <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac1 0x31>, <&dmac1 0x30>,
++ <&dmac2 0x31>, <&dmac2 0x30>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc 32>;
++ resets = <&cpg 520>;
++ status = "disabled";
++ };
++
++ hscif1: serial@e6550000 {
++ compatible = "renesas,hscif-r8a77970",
++ "renesas,rcar-gen3-hscif",
++ "renesas,hscif";
++ reg = <0 0xe6550000 0 96>;
++ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 519>,
++ <&cpg CPG_CORE 9>,
++ <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac1 0x33>, <&dmac1 0x32>,
++ <&dmac2 0x33>, <&dmac2 0x32>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc 32>;
++ resets = <&cpg 519>;
++ status = "disabled";
++ };
++
++ hscif2: serial@e6560000 {
++ compatible = "renesas,hscif-r8a77970",
++ "renesas,rcar-gen3-hscif",
++ "renesas,hscif";
++ reg = <0 0xe6560000 0 96>;
++ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 518>,
++ <&cpg CPG_CORE 9>,
++ <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac1 0x35>, <&dmac1 0x34>,
++ <&dmac2 0x35>, <&dmac2 0x34>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc 32>;
++ resets = <&cpg 518>;
++ status = "disabled";
++ };
++
++ hscif3: serial@e66a0000 {
++ compatible = "renesas,hscif-r8a77970",
++ "renesas,rcar-gen3-hscif", "renesas,hscif";
++ reg = <0 0xe66a0000 0 96>;
++ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 517>,
++ <&cpg CPG_CORE 9>,
++ <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac1 0x37>, <&dmac1 0x36>,
++ <&dmac2 0x37>, <&dmac2 0x36>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc 32>;
++ resets = <&cpg 517>;
++ status = "disabled";
++ };
++
++ scif0: serial@e6e60000 {
++ compatible = "renesas,scif-r8a77970",
++ "renesas,rcar-gen3-scif",
++ "renesas,scif";
++ reg = <0 0xe6e60000 0 64>;
++ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 207>,
++ <&cpg CPG_CORE 9>,
++ <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac1 0x51>, <&dmac1 0x50>,
++ <&dmac2 0x51>, <&dmac2 0x50>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc 32>;
++ resets = <&cpg 207>;
++ status = "disabled";
++ };
++
++ scif1: serial@e6e68000 {
++ compatible = "renesas,scif-r8a77970",
++ "renesas,rcar-gen3-scif",
++ "renesas,scif";
++ reg = <0 0xe6e68000 0 64>;
++ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 206>,
++ <&cpg CPG_CORE 9>,
++ <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac1 0x53>, <&dmac1 0x52>,
++ <&dmac2 0x53>, <&dmac2 0x52>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc 32>;
++ resets = <&cpg 206>;
++ status = "disabled";
++ };
++
++ scif3: serial@e6c50000 {
++ compatible = "renesas,scif-r8a77970",
++ "renesas,rcar-gen3-scif",
++ "renesas,scif";
++ reg = <0 0xe6c50000 0 64>;
++ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 204>,
++ <&cpg CPG_CORE 9>,
++ <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac1 0x57>, <&dmac1 0x56>,
++ <&dmac2 0x57>, <&dmac2 0x56>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc 32>;
++ resets = <&cpg 204>;
++ status = "disabled";
++ };
++
++ scif4: serial@e6c40000 {
++ compatible = "renesas,scif-r8a77970",
++ "renesas,rcar-gen3-scif", "renesas,scif";
++ reg = <0 0xe6c40000 0 64>;
++ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 203>,
++ <&cpg CPG_CORE 9>,
++ <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac1 0x59>, <&dmac1 0x58>,
++ <&dmac2 0x59>, <&dmac2 0x58>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc 32>;
++ resets = <&cpg 203>;
++ status = "disabled";
++ };
+ };
+ };
+--
+2.19.0
+
diff --git a/patches/0026-arm64-dts-renesas-r8a77970-add-EtherAVB-support.patch b/patches/0026-arm64-dts-renesas-r8a77970-add-EtherAVB-support.patch
new file mode 100644
index 0000000..c7ae2f6
--- /dev/null
+++ b/patches/0026-arm64-dts-renesas-r8a77970-add-EtherAVB-support.patch
@@ -0,0 +1,78 @@
+From 93338b398d7f5f258678d743f5e08517b4b8ee32 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 15 Sep 2017 22:43:23 +0300
+Subject: [PATCH 0026/1795] arm64: dts: renesas: r8a77970: add EtherAVB support
+
+Define the generic R8A77970 part of the EtherAVB device node.
+
+Based on the original (and large) patch by Daisuke Matsushita
+<daisuke.matsushita.ns@hitachi.com>.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit bea2ab136eaacec2d14613a3ab89557298fa9748)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77970.dtsi | 44 +++++++++++++++++++++++
+ 1 file changed, 44 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+index 04ec0e459686..aa9032d34189 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+@@ -318,5 +318,49 @@
+ resets = <&cpg 203>;
+ status = "disabled";
+ };
++
++ avb: ethernet@e6800000 {
++ compatible = "renesas,etheravb-r8a77970",
++ "renesas,etheravb-rcar-gen3";
++ reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
++ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "ch0", "ch1", "ch2", "ch3",
++ "ch4", "ch5", "ch6", "ch7",
++ "ch8", "ch9", "ch10", "ch11",
++ "ch12", "ch13", "ch14", "ch15",
++ "ch16", "ch17", "ch18", "ch19",
++ "ch20", "ch21", "ch22", "ch23",
++ "ch24";
++ clocks = <&cpg CPG_MOD 812>;
++ power-domains = <&sysc 32>;
++ resets = <&cpg 812>;
++ phy-mode = "rgmii-id";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ };
+ };
+ };
+--
+2.19.0
+
diff --git a/patches/0027-arm64-dts-draak-Add-serial-console-pins.patch b/patches/0027-arm64-dts-draak-Add-serial-console-pins.patch
new file mode 100644
index 0000000..46134bd
--- /dev/null
+++ b/patches/0027-arm64-dts-draak-Add-serial-console-pins.patch
@@ -0,0 +1,42 @@
+From 36604b1b641c6a33c316ec30324ce63d1e9af646 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 28 Aug 2017 11:26:10 +0200
+Subject: [PATCH 0027/1795] arm64: dts: draak: Add serial console pins
+
+Add pin control for SCIF2.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit ea203404fb2f0b3b4cc24917044f7bd72fef12c7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+index d144370051d5..19c5462d8b67 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
++++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+@@ -36,7 +36,18 @@
+ clock-frequency = <48000000>;
+ };
+
++&pfc {
++ scif2_pins: scif2 {
++ groups = "scif2_data";
++ function = "scif2";
++ };
++
++};
++
+ &scif2 {
++ pinctrl-0 = <&scif2_pins>;
++ pinctrl-names = "default";
++
+ status = "okay";
+ };
+
+--
+2.19.0
+
diff --git a/patches/0028-arm64-defconfig-enable-thermal-driver-for-Renesas-R-.patch b/patches/0028-arm64-defconfig-enable-thermal-driver-for-Renesas-R-.patch
new file mode 100644
index 0000000..918f857
--- /dev/null
+++ b/patches/0028-arm64-defconfig-enable-thermal-driver-for-Renesas-R-.patch
@@ -0,0 +1,32 @@
+From 77fca15b0d05389f17e2e0519790eed9e88bd260 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Mon, 18 Sep 2017 20:31:13 +0200
+Subject: [PATCH 0028/1795] arm64: defconfig: enable thermal driver for Renesas
+ R-Car Gen3
+
+We want this driver to detect critical temperatures in time.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 86f0a075111d16e3b48d79b44858e141ea86cad7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/configs/defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
+index dd77931df8bb..4b2230b45003 100644
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -318,6 +318,7 @@ CONFIG_CPU_THERMAL=y
+ CONFIG_THERMAL_EMULATION=y
+ CONFIG_BRCMSTB_THERMAL=m
+ CONFIG_EXYNOS_THERMAL=y
++CONFIG_RCAR_GEN3_THERMAL=y
+ CONFIG_ROCKCHIP_THERMAL=m
+ CONFIG_WATCHDOG=y
+ CONFIG_S3C2410_WATCHDOG=y
+--
+2.19.0
+
diff --git a/patches/0029-arm64-defconfig-enable-the-Marvell-10G-PHY-as-a-modu.patch b/patches/0029-arm64-defconfig-enable-the-Marvell-10G-PHY-as-a-modu.patch
new file mode 100644
index 0000000..d1cc312
--- /dev/null
+++ b/patches/0029-arm64-defconfig-enable-the-Marvell-10G-PHY-as-a-modu.patch
@@ -0,0 +1,33 @@
+From ae1f0b4e40a662d55ed30ff4acd441d0f5fe7068 Mon Sep 17 00:00:00 2001
+From: Antoine Tenart <antoine.tenart@free-electrons.com>
+Date: Mon, 18 Sep 2017 09:58:06 +0200
+Subject: [PATCH 0029/1795] arm64: defconfig: enable the Marvell 10G PHY as a
+ module
+
+The Marvell 10G PHY is present on mvebu platforms. Enable it as a module
+so that the network works on these platforms.
+
+Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
+Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
+(cherry picked from commit 6dee349e8c618a0dbb7e7dd0cf31da1a3eadd31a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/configs/defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
+index 4b2230b45003..9024f4979b3c 100644
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -205,6 +205,7 @@ CONFIG_STMMAC_ETH=m
+ CONFIG_MDIO_BUS_MUX_MMIOREG=y
+ CONFIG_AT803X_PHY=m
+ CONFIG_MARVELL_PHY=m
++CONFIG_MARVELL_10G_PHY=m
+ CONFIG_MESON_GXL_PHY=m
+ CONFIG_MICREL_PHY=y
+ CONFIG_REALTEK_PHY=m
+--
+2.19.0
+
diff --git a/patches/0030-arm64-defconfig-enable-Marvell-CP110-comphy.patch b/patches/0030-arm64-defconfig-enable-Marvell-CP110-comphy.patch
new file mode 100644
index 0000000..174897a
--- /dev/null
+++ b/patches/0030-arm64-defconfig-enable-Marvell-CP110-comphy.patch
@@ -0,0 +1,34 @@
+From 673e0e9f8fb42a249ec7525d20a479135423f338 Mon Sep 17 00:00:00 2001
+From: Miquel Raynal <miquel.raynal@free-electrons.com>
+Date: Mon, 18 Sep 2017 09:58:07 +0200
+Subject: [PATCH 0030/1795] arm64: defconfig: enable Marvell CP110 comphy
+
+The comphy is an hardware block giving access to common PHYs that can be
+used by various other engines (Network, SATA, ...). This is used on
+Marvell 7k/8k platforms for now. Enable the corresponding driver.
+
+Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
+Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
+Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
+(cherry picked from commit a18615b7ef8d35c799a055013b9af1ec69cf244d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/configs/defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
+index 9024f4979b3c..6b5f0235fdab 100644
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -539,6 +539,7 @@ CONFIG_PWM_TEGRA=m
+ CONFIG_PHY_RCAR_GEN3_USB2=y
+ CONFIG_PHY_HI6220_USB=y
+ CONFIG_PHY_SUN4I_USB=y
++CONFIG_PHY_MVEBU_CP110_COMPHY=y
+ CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+ CONFIG_PHY_ROCKCHIP_EMMC=y
+ CONFIG_PHY_ROCKCHIP_PCIE=m
+--
+2.19.0
+
diff --git a/patches/0031-arm-shmobile-Document-Kingfisher-board-DT-bindings.patch b/patches/0031-arm-shmobile-Document-Kingfisher-board-DT-bindings.patch
new file mode 100644
index 0000000..051024c
--- /dev/null
+++ b/patches/0031-arm-shmobile-Document-Kingfisher-board-DT-bindings.patch
@@ -0,0 +1,37 @@
+From 3547dff6f0edcb8035ccbb7d2a77af5a5d223ae2 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Sat, 16 Sep 2017 21:48:47 +0300
+Subject: [PATCH 0031/1795] arm: shmobile: Document Kingfisher board DT
+ bindings
+
+Add Kingfisher Device tree bindings Documentation, listing it as a
+supported board.
+Kingfisher is the H3ULCB/M3ULCB extension board.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 5418a9004126992aa2bbd07d79e8305659cb0dc9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt
+index a1f06711a4dd..e9bd3091dcf6 100644
+--- a/Documentation/devicetree/bindings/arm/shmobile.txt
++++ b/Documentation/devicetree/bindings/arm/shmobile.txt
+@@ -78,6 +78,8 @@ Boards:
+ compatible = "iwave,g20d", "iwave,g20m", "renesas,r8a7743"
+ - iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven)
+ compatible = "iwave,g20m", "renesas,r8a7743"
++ - Kingfisher (SBEV-RCAR-KF-M03)
++ compatible = "shimafuji,kingfisher"
+ - Koelsch (RTP0RC7791SEB00010S)
+ compatible = "renesas,koelsch", "renesas,r8a7791"
+ - Kyoto Microcomputer Co. KZM-A9-Dual
+--
+2.19.0
+
diff --git a/patches/0032-arm64-dts-renesas-r8a77995-Add-USB2.0-PHY-device-nod.patch b/patches/0032-arm64-dts-renesas-r8a77995-Add-USB2.0-PHY-device-nod.patch
new file mode 100644
index 0000000..65c466d
--- /dev/null
+++ b/patches/0032-arm64-dts-renesas-r8a77995-Add-USB2.0-PHY-device-nod.patch
@@ -0,0 +1,43 @@
+From ab99b5cb29c16ab14ba2a65bebe1c8e4f39c63e7 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 14 Sep 2017 19:30:40 +0900
+Subject: [PATCH 0032/1795] arm64: dts: renesas: r8a77995: Add USB2.0 PHY
+ device node
+
+This patch adds USB2.0 PHY device node for r8a77995.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit a0ea7fe8d34cbede9928b44e9a6b1dcd3f0150d1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77995.dtsi | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+index 72d04d7337be..59ed1303bd93 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+@@ -309,5 +309,17 @@
+ resets = <&cpg 310>;
+ status = "disabled";
+ };
++
++ usb2_phy0: usb-phy@ee080200 {
++ compatible = "renesas,usb2-phy-r8a77995",
++ "renesas,rcar-gen3-usb2-phy";
++ reg = <0 0xee080200 0 0x700>;
++ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 703>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 703>;
++ #phy-cells = <0>;
++ status = "disabled";
++ };
+ };
+ };
+--
+2.19.0
+
diff --git a/patches/0033-arm64-dts-renesas-r8a77995-add-USB2.0-Host-EHCI-OHCI.patch b/patches/0033-arm64-dts-renesas-r8a77995-add-USB2.0-Host-EHCI-OHCI.patch
new file mode 100644
index 0000000..bb81bc3
--- /dev/null
+++ b/patches/0033-arm64-dts-renesas-r8a77995-add-USB2.0-Host-EHCI-OHCI.patch
@@ -0,0 +1,57 @@
+From 3d3c3ed6b4f68150d9cd39af94a16f31d4fe1c34 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 14 Sep 2017 19:30:41 +0900
+Subject: [PATCH 0033/1795] arm64: dts: renesas: r8a77995: add USB2.0 Host
+ (EHCI/OHCI) device node
+
+This patch adds USB2.0 Host (EHCI/OHCI) device node for r8a77995.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 423254a1799bc7ea1f81db0b5e0c7eb1494c13f1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77995.dtsi | 25 +++++++++++++++++++++++
+ 1 file changed, 25 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+index 59ed1303bd93..56e42921e879 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+@@ -310,6 +310,31 @@
+ status = "disabled";
+ };
+
++ ehci0: usb@ee080100 {
++ compatible = "generic-ehci";
++ reg = <0 0xee080100 0 0x100>;
++ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 703>;
++ phys = <&usb2_phy0>;
++ phy-names = "usb";
++ companion = <&ohci0>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 703>;
++ status = "disabled";
++ };
++
++ ohci0: usb@ee080000 {
++ compatible = "generic-ohci";
++ reg = <0 0xee080000 0 0x100>;
++ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 703>;
++ phys = <&usb2_phy0>;
++ phy-names = "usb";
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 703>;
++ status = "disabled";
++ };
++
+ usb2_phy0: usb-phy@ee080200 {
+ compatible = "renesas,usb2-phy-r8a77995",
+ "renesas,rcar-gen3-usb2-phy";
+--
+2.19.0
+
diff --git a/patches/0034-arm64-dts-renesas-r8a77995-draak-enable-USB2.0-PHY.patch b/patches/0034-arm64-dts-renesas-r8a77995-draak-enable-USB2.0-PHY.patch
new file mode 100644
index 0000000..05ff012
--- /dev/null
+++ b/patches/0034-arm64-dts-renesas-r8a77995-draak-enable-USB2.0-PHY.patch
@@ -0,0 +1,50 @@
+From ff1519dd02f520869d0782381b9fedf920523e58 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 14 Sep 2017 19:30:42 +0900
+Subject: [PATCH 0034/1795] arm64: dts: renesas: r8a77995: draak: enable USB2.0
+ PHY
+
+This patch enables USB2.0 PHY for R-Car D3 draak board.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 34f058b2731bd8c06237ea5725a557edba687ff4)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+index 19c5462d8b67..454658ac6efc 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
++++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+@@ -42,6 +42,10 @@
+ function = "scif2";
+ };
+
++ usb0_pins: usb0 {
++ groups = "usb0";
++ function = "usb0";
++ };
+ };
+
+ &scif2 {
+@@ -51,6 +55,13 @@
+ status = "okay";
+ };
+
++&usb2_phy0 {
++ pinctrl-0 = <&usb0_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
++
+ &rwdt {
+ timeout-sec = <60>;
+ status = "okay";
+--
+2.19.0
+
diff --git a/patches/0035-arm64-renesas-document-Eagle-board-bindings.patch b/patches/0035-arm64-renesas-document-Eagle-board-bindings.patch
new file mode 100644
index 0000000..0d4c207
--- /dev/null
+++ b/patches/0035-arm64-renesas-document-Eagle-board-bindings.patch
@@ -0,0 +1,37 @@
+From 11637031d62244c91f1559e3559e67a97c19e3dd Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 15 Sep 2017 22:43:24 +0300
+Subject: [PATCH 0035/1795] arm64: renesas: document Eagle board bindings
+
+Document the Eagle device tree bindings, listing it as a supported board.
+
+This allows to use checkpatch.pl to validate .dts files referring to the
+Eagle board.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e22b36bd75ad57fdf1010ce7d6d92df96311947b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt
+index e9bd3091dcf6..4fa984ada912 100644
+--- a/Documentation/devicetree/bindings/arm/shmobile.txt
++++ b/Documentation/devicetree/bindings/arm/shmobile.txt
+@@ -59,6 +59,8 @@ Boards:
+ compatible = "renesas,bockw", "renesas,r8a7778"
+ - Draak (RTP0RC77995SEB0010S)
+ compatible = "renesas,draak", "renesas,r8a77995"
++ - Eagle (RTP0RC77970SEB0010S)
++ compatible = "renesas,eagle", "renesas,r8a77970"
+ - Genmai (RTK772100BC00000BR)
+ compatible = "renesas,genmai", "renesas,r7s72100"
+ - GR-Peach (X28A-M01-E/F)
+--
+2.19.0
+
diff --git a/patches/0036-arm64-dts-renesas-r8a77995-draak-enable-USB2.0-Host-.patch b/patches/0036-arm64-dts-renesas-r8a77995-draak-enable-USB2.0-Host-.patch
new file mode 100644
index 0000000..c1f2084
--- /dev/null
+++ b/patches/0036-arm64-dts-renesas-r8a77995-draak-enable-USB2.0-Host-.patch
@@ -0,0 +1,40 @@
+From e6a36effc238a85c9f64855870613ba4cbde883c Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 14 Sep 2017 19:30:43 +0900
+Subject: [PATCH 0036/1795] arm64: dts: renesas: r8a77995: draak: enable USB2.0
+ Host (EHCI/OHCI)
+
+This patch enables USB2.0 Host (EHCI/OHCI) for r8a77995.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 607c73c38e8492677da02a999eabd669e96f6d88)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+index 454658ac6efc..7b776cb7e928 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
++++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+@@ -48,6 +48,14 @@
+ };
+ };
+
++&ehci0 {
++ status = "okay";
++};
++
++&ohci0 {
++ status = "okay";
++};
++
+ &scif2 {
+ pinctrl-0 = <&scif2_pins>;
+ pinctrl-names = "default";
+--
+2.19.0
+
diff --git a/patches/0037-ARM-shmobile-remove-inconsistent-from-documentation.patch b/patches/0037-ARM-shmobile-remove-inconsistent-from-documentation.patch
new file mode 100644
index 0000000..84461ad
--- /dev/null
+++ b/patches/0037-ARM-shmobile-remove-inconsistent-from-documentation.patch
@@ -0,0 +1,57 @@
+From dd3d9b496b34df460f7f3fb7efb70aaef18e2973 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 21 Sep 2017 11:44:59 +0200
+Subject: [PATCH 0037/1795] ARM: shmobile: remove inconsistent ; from
+ documentation
+
+Consistently do not suffix compat string documentation with a ';'
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 2e931b06de97d762ef139bffbbe75e1483735734)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/arm/shmobile.txt | 10 +++++-----
+ 1 file changed, 5 insertions(+), 5 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt
+index 4fa984ada912..020d758fc0c5 100644
+--- a/Documentation/devicetree/bindings/arm/shmobile.txt
++++ b/Documentation/devicetree/bindings/arm/shmobile.txt
+@@ -69,7 +69,7 @@ Boards:
+ compatible = "renesas,gose", "renesas,r8a7793"
+ - H3ULCB (R-Car Starter Kit Premier, RTP0RC7795SKBX0010SA00 (H3 ES1.1))
+ H3ULCB (R-Car Starter Kit Premier, RTP0RC77951SKBX010SA00 (H3 ES2.0))
+- compatible = "renesas,h3ulcb", "renesas,r8a7795";
++ compatible = "renesas,h3ulcb", "renesas,r8a7795"
+ - Henninger
+ compatible = "renesas,henninger", "renesas,r8a7791"
+ - iWave Systems RZ/G1E SODIMM SOM Development Platform (iW-RainboW-G22D)
+@@ -91,7 +91,7 @@ Boards:
+ - Lager (RTP0RC7790SEB00010S)
+ compatible = "renesas,lager", "renesas,r8a7790"
+ - M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKBX0010SA09 (M3 ES1.0))
+- compatible = "renesas,m3ulcb", "renesas,r8a7796";
++ compatible = "renesas,m3ulcb", "renesas,r8a7796"
+ - Marzen (R0P7779A00010S)
+ compatible = "renesas,marzen", "renesas,r8a7779"
+ - Porter (M2-LCDP)
+@@ -99,11 +99,11 @@ Boards:
+ - RSKRZA1 (YR0K77210C000BE)
+ compatible = "renesas,rskrza1", "renesas,r7s72100"
+ - Salvator-X (RTP0RC7795SIPB0010S)
+- compatible = "renesas,salvator-x", "renesas,r8a7795";
++ compatible = "renesas,salvator-x", "renesas,r8a7795"
+ - Salvator-X (RTP0RC7796SIPB0011S)
+- compatible = "renesas,salvator-x", "renesas,r8a7796";
++ compatible = "renesas,salvator-x", "renesas,r8a7796"
+ - Salvator-XS (Salvator-X 2nd version, RTP0RC7795SIPB0012S)
+- compatible = "renesas,salvator-xs", "renesas,r8a7795";
++ compatible = "renesas,salvator-xs", "renesas,r8a7795"
+ - SILK (RTP0RC7794LCB00011S)
+ compatible = "renesas,silk", "renesas,r8a7794"
+ - SK-RZG1E (YR8A77450S000BE)
+--
+2.19.0
+
diff --git a/patches/0038-arm64-dts-renesas-r8a77995-draak-enable-EthernetAVB.patch b/patches/0038-arm64-dts-renesas-r8a77995-draak-enable-EthernetAVB.patch
new file mode 100644
index 0000000..b7a45fb
--- /dev/null
+++ b/patches/0038-arm64-dts-renesas-r8a77995-draak-enable-EthernetAVB.patch
@@ -0,0 +1,78 @@
+From e677c9dc0ee3578c5a6e66ac4e63e197be02f031 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Wed, 13 Sep 2017 21:18:39 +0900
+Subject: [PATCH 0038/1795] arm64: dts: renesas: r8a77995: draak: enable
+ EthernetAVB
+
+This patch enables EthernetAVB for R-Car D3 draak board.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 4503b50eac08f472e8690ec61f4d144e62cbdc55)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ .../arm64/boot/dts/renesas/r8a77995-draak.dts | 25 +++++++++++++++++++
+ 1 file changed, 25 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+index 7b776cb7e928..96b7ff5cc321 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
++++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+@@ -11,6 +11,7 @@
+
+ /dts-v1/;
+ #include "r8a77995.dtsi"
++#include <dt-bindings/gpio/gpio.h>
+
+ / {
+ model = "Renesas Draak board based on r8a77995";
+@@ -18,6 +19,7 @@
+
+ aliases {
+ serial0 = &scif2;
++ ethernet0 = &avb;
+ };
+
+ chosen {
+@@ -37,6 +39,14 @@
+ };
+
+ &pfc {
++ avb0_pins: avb {
++ mux {
++ groups = "avb0_link", "avb0_phy_int", "avb0_mdc",
++ "avb0_mii";
++ function = "avb0";
++ };
++ };
++
+ scif2_pins: scif2 {
+ groups = "scif2_data";
+ function = "scif2";
+@@ -56,6 +66,21 @@
+ status = "okay";
+ };
+
++&avb {
++ pinctrl-0 = <&avb0_pins>;
++ pinctrl-names = "default";
++ renesas,no-ether-link;
++ phy-handle = <&phy0>;
++ status = "okay";
++
++ phy0: ethernet-phy@0 {
++ rxc-skew-ps = <1500>;
++ reg = <0>;
++ interrupt-parent = <&gpio5>;
++ interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
++ };
++};
++
+ &scif2 {
+ pinctrl-0 = <&scif2_pins>;
+ pinctrl-names = "default";
+--
+2.19.0
+
diff --git a/patches/0039-arm64-dts-renesas-r8a7795-add-USB3.0-peripheral-devi.patch b/patches/0039-arm64-dts-renesas-r8a7795-add-USB3.0-peripheral-devi.patch
new file mode 100644
index 0000000..e9c5bf4
--- /dev/null
+++ b/patches/0039-arm64-dts-renesas-r8a7795-add-USB3.0-peripheral-devi.patch
@@ -0,0 +1,43 @@
+From 27cb3d576b51704b1b19fe272afac48e326957f1 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 21 Sep 2017 14:31:25 +0900
+Subject: [PATCH 0039/1795] arm64: dts: renesas: r8a7795: add USB3.0 peripheral
+ device node
+
+This patch adds USB3.0 peripheral channel 0 device node for r8a7795.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 3bdba1b26771496ad8db8cd948ce144fc1ce1ca2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a7795.dtsi | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+index 5d5174d8635d..d5cfd1a1c539 100644
+--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+@@ -1471,6 +1471,17 @@
+ status = "disabled";
+ };
+
++ usb3_peri0: usb@ee020000 {
++ compatible = "renesas,r8a7795-usb3-peri",
++ "renesas,rcar-gen3-usb3-peri";
++ reg = <0 0xee020000 0 0x400>;
++ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 328>;
++ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
++ resets = <&cpg 328>;
++ status = "disabled";
++ };
++
+ usb_dmac0: dma-controller@e65a0000 {
+ compatible = "renesas,r8a7795-usb-dmac",
+ "renesas,usb-dmac";
+--
+2.19.0
+
diff --git a/patches/0040-arm64-dts-renesas-r8a7796-add-USB3.0-peripheral-devi.patch b/patches/0040-arm64-dts-renesas-r8a7796-add-USB3.0-peripheral-devi.patch
new file mode 100644
index 0000000..773f678
--- /dev/null
+++ b/patches/0040-arm64-dts-renesas-r8a7796-add-USB3.0-peripheral-devi.patch
@@ -0,0 +1,43 @@
+From 0b8fbf5b5064146d87a6bfaee4cc3926ff3b530a Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 21 Sep 2017 14:31:26 +0900
+Subject: [PATCH 0040/1795] arm64: dts: renesas: r8a7796: add USB3.0 peripheral
+ device node
+
+This patch adds USB3.0 peripheral channel 0 device node for r8a7796.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 2affee619d48d101831e83e74cadeb7c5200d9cb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a7796.dtsi | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+index 16da83458f18..57ac5ca6ed98 100644
+--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+@@ -1279,6 +1279,17 @@
+ status = "disabled";
+ };
+
++ usb3_peri0: usb@ee020000 {
++ compatible = "renesas,r8a7796-usb3-peri",
++ "renesas,rcar-gen3-usb3-peri";
++ reg = <0 0xee020000 0 0x400>;
++ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 328>;
++ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
++ resets = <&cpg 328>;
++ status = "disabled";
++ };
++
+ ohci0: usb@ee080000 {
+ compatible = "generic-ohci";
+ reg = <0 0xee080000 0 0x100>;
+--
+2.19.0
+
diff --git a/patches/0041-arm64-defconfig-enable-R8A77970-SoC.patch b/patches/0041-arm64-defconfig-enable-R8A77970-SoC.patch
new file mode 100644
index 0000000..47a28ee
--- /dev/null
+++ b/patches/0041-arm64-defconfig-enable-R8A77970-SoC.patch
@@ -0,0 +1,33 @@
+From 3b4778c8bff033b366996035c92ecb86caa53782 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sat, 23 Sep 2017 00:36:25 +0300
+Subject: [PATCH 0041/1795] arm64: defconfig: enable R8A77970 SoC
+
+Enable the Renesas R-Car V3M (R8A77970) SoC in the ARM64 defconfig.
+
+Suggested-by: Simon Horman <horms@verge.net.au>
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit bb58b29899ff9c6d1e97727ec05b500e832ebd7d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/configs/defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
+index 6b5f0235fdab..fd65b621180d 100644
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -51,6 +51,7 @@ CONFIG_ARCH_SEATTLE=y
+ CONFIG_ARCH_RENESAS=y
+ CONFIG_ARCH_R8A7795=y
+ CONFIG_ARCH_R8A7796=y
++CONFIG_ARCH_R8A77970=y
+ CONFIG_ARCH_R8A77995=y
+ CONFIG_ARCH_STRATIX10=y
+ CONFIG_ARCH_TEGRA=y
+--
+2.19.0
+
diff --git a/patches/0042-arm64-defconfig-enable-NAND-on-Armada-7K-8K-SoCs.patch b/patches/0042-arm64-defconfig-enable-NAND-on-Armada-7K-8K-SoCs.patch
new file mode 100644
index 0000000..bd1a6cd
--- /dev/null
+++ b/patches/0042-arm64-defconfig-enable-NAND-on-Armada-7K-8K-SoCs.patch
@@ -0,0 +1,31 @@
+From a36bad101bc0287fd8effcd564e861fe6ef4853e Mon Sep 17 00:00:00 2001
+From: Gregory CLEMENT <gregory.clement@free-electrons.com>
+Date: Wed, 27 Sep 2017 17:58:22 +0200
+Subject: [PATCH 0042/1795] arm64: defconfig: enable NAND on Armada 7K/8K SoCs
+
+The PXA3xx NAND driver supports also the NAND controller found on the
+Armada 7K/8K SoCs, so enable it.
+
+Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
+(cherry picked from commit 5fe74e0a72474eb48fa8abe1eb49dedb16b2537b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/configs/defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
+index fd65b621180d..dfb60597d412 100644
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -158,6 +158,7 @@ CONFIG_MTD_BLOCK=y
+ CONFIG_MTD_M25P80=y
+ CONFIG_MTD_NAND=y
+ CONFIG_MTD_NAND_DENALI_DT=y
++CONFIG_MTD_NAND_PXA3xx=y
+ CONFIG_MTD_SPI_NOR=y
+ CONFIG_BLK_DEV_LOOP=y
+ CONFIG_BLK_DEV_NBD=m
+--
+2.19.0
+
diff --git a/patches/0043-arm64-dts-renesas-salvator-common-drop-avb_phy_int-f.patch b/patches/0043-arm64-dts-renesas-salvator-common-drop-avb_phy_int-f.patch
new file mode 100644
index 0000000..00f9252
--- /dev/null
+++ b/patches/0043-arm64-dts-renesas-salvator-common-drop-avb_phy_int-f.patch
@@ -0,0 +1,40 @@
+From 7e655071b784cb4c3d88a3d7cfdce22092755dc1 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Tue, 3 Oct 2017 13:57:11 +0900
+Subject: [PATCH 0043/1795] arm64: dts: renesas: salvator-common: drop
+ "avb_phy_int" from avb_pins
+
+Since the Ethernet AVB driver doesn't support AVB_PHY_INT handling
+and it will be handled by a phy driver as a gpio pin, this patch
+removes the "avb_phy_int" from the avb_pins node.
+
+Reported-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Fixes: 7d73a4da2681 ("arm64: dts: r8a7795: salvator-x: Set drive-strength for ravb pins")
+Fixes: 4903987033be ("arm64: dts: r8a7796: salvator-x: Set drive-strength for ravb pins")
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 86b93a2dff65ab6e22ffd28bb132a2c3970b6e68)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/salvator-common.dtsi | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+index 26a978616071..cfb79cb3dd87 100644
+--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
++++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+@@ -380,8 +380,7 @@
+
+ avb_pins: avb {
+ mux {
+- groups = "avb_link", "avb_phy_int", "avb_mdc",
+- "avb_mii";
++ groups = "avb_link", "avb_mdc", "avb_mii";
+ function = "avb";
+ };
+
+--
+2.19.0
+
diff --git a/patches/0044-arm64-dts-renesas-ulcb-drop-avb_phy_int-from-avb_pin.patch b/patches/0044-arm64-dts-renesas-ulcb-drop-avb_phy_int-from-avb_pin.patch
new file mode 100644
index 0000000..895a2cb
--- /dev/null
+++ b/patches/0044-arm64-dts-renesas-ulcb-drop-avb_phy_int-from-avb_pin.patch
@@ -0,0 +1,39 @@
+From 2347831c74555a8b5d02aefbc80849b8d5c1b349 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Tue, 3 Oct 2017 13:57:12 +0900
+Subject: [PATCH 0044/1795] arm64: dts: renesas: ulcb: drop "avb_phy_int" from
+ avb_pins
+
+Since the Ethernet AVB driver doesn't support AVB_PHY_INT handling
+and it will be handled by a phy driver as a gpio pin, this patch
+removes the "avb_phy_int" from the avb_pins node.
+
+Reported-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Fixes: 133ace3f3804 ("arm64: dts: ulcb: Set drive-strength for ravb pins")
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit bc04ba36fb1b6c7ebe1df6011da8679e2a5b90bf)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb.dtsi | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi
+index f630a8340b37..d32d876156b1 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi
+@@ -253,8 +253,7 @@
+
+ avb_pins: avb {
+ mux {
+- groups = "avb_link", "avb_phy_int", "avb_mdc",
+- "avb_mii";
++ groups = "avb_link", "avb_mdc", "avb_mii";
+ function = "avb";
+ };
+
+--
+2.19.0
+
diff --git a/patches/0045-arm64-dts-renesas-r8a77995-draak-drop-avb_phy_int-fr.patch b/patches/0045-arm64-dts-renesas-r8a77995-draak-drop-avb_phy_int-fr.patch
new file mode 100644
index 0000000..9854589
--- /dev/null
+++ b/patches/0045-arm64-dts-renesas-r8a77995-draak-drop-avb_phy_int-fr.patch
@@ -0,0 +1,39 @@
+From 9e8b99005aa3d914c8b8d5cbd6bf12b7976ea46f Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Tue, 3 Oct 2017 13:57:13 +0900
+Subject: [PATCH 0045/1795] arm64: dts: renesas: r8a77995: draak: drop
+ "avb_phy_int" from avb_pins
+
+Since the Ethernet AVB driver doesn't support AVB_PHY_INT handling
+and it will be handled by a phy driver as a gpio pin, this patch
+removes the "avb_phy_int" from the avb_pins node.
+
+Reported-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Fixes: 4503b50eac08 ("arm64: dts: renesas: r8a77995: draak: enable EthernetAVB")
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 12bb361979b523bbae00542c17cda8f3f0048860)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+index 96b7ff5cc321..fac58be83383 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
++++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+@@ -41,8 +41,7 @@
+ &pfc {
+ avb0_pins: avb {
+ mux {
+- groups = "avb0_link", "avb0_phy_int", "avb0_mdc",
+- "avb0_mii";
++ groups = "avb0_link", "avb0_mdc", "avb0_mii";
+ function = "avb0";
+ };
+ };
+--
+2.19.0
+
diff --git a/patches/0046-arm64-dts-renesas-initial-Eagle-board-device-tree.patch b/patches/0046-arm64-dts-renesas-initial-Eagle-board-device-tree.patch
new file mode 100644
index 0000000..5858b53
--- /dev/null
+++ b/patches/0046-arm64-dts-renesas-initial-Eagle-board-device-tree.patch
@@ -0,0 +1,91 @@
+From 9be74f7b4509ece6faf3a22cfc36f529a997dfef Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Tue, 12 Sep 2017 23:37:26 +0300
+Subject: [PATCH 0046/1795] arm64: dts: renesas: initial Eagle board device
+ tree
+
+Add the initial device tree for the R8A77970 SoC based Eagle board.
+The board has 1 debug serial port (SCIF0); include support for it,
+so that the serial console can work.
+
+Based on the original (and large) patch by Vladimir Barinov
+<vladimir.barinov@cogentembedded.com>.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 1a48290edf6f78962b1d96008aea954b7b3e5969)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/Makefile | 1 +
+ .../arm64/boot/dts/renesas/r8a77970-eagle.dts | 45 +++++++++++++++++++
+ 2 files changed, 46 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
+
+diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
+index d417701640bd..3c2332a60f4e 100644
+--- a/arch/arm64/boot/dts/renesas/Makefile
++++ b/arch/arm64/boot/dts/renesas/Makefile
+@@ -3,6 +3,7 @@ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb r8a7795-h3ulcb.dtb
+ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-xs.dtb
+ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x.dtb r8a7795-es1-h3ulcb.dtb
+ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb r8a7796-m3ulcb.dtb
++dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle.dtb
+ dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak.dtb
+
+ always := $(dtb-y)
+diff --git a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
+new file mode 100644
+index 000000000000..a4d1d4f24675
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
+@@ -0,0 +1,45 @@
++/*
++ * Device Tree Source for the Eagle board
++ *
++ * Copyright (C) 2016-2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++/dts-v1/;
++#include "r8a77970.dtsi"
++
++/ {
++ model = "Renesas Eagle board based on r8a77970";
++ compatible = "renesas,eagle", "renesas,r8a77970";
++
++ aliases {
++ serial0 = &scif0;
++ };
++
++ chosen {
++ bootargs = "ignore_loglevel";
++ stdout-path = "serial0:115200n8";
++ };
++
++ memory@48000000 {
++ device_type = "memory";
++ /* first 128MB is reserved for secure area. */
++ reg = <0x0 0x48000000 0x0 0x38000000>;
++ };
++};
++
++&extal_clk {
++ clock-frequency = <16666666>;
++};
++
++&extalr_clk {
++ clock-frequency = <32768>;
++};
++
++&scif0 {
++ status = "okay";
++};
+--
+2.19.0
+
diff --git a/patches/0047-arm64-dts-renesas-salvator-common-add-pfc-node-for-U.patch b/patches/0047-arm64-dts-renesas-salvator-common-add-pfc-node-for-U.patch
new file mode 100644
index 0000000..778df20
--- /dev/null
+++ b/patches/0047-arm64-dts-renesas-salvator-common-add-pfc-node-for-U.patch
@@ -0,0 +1,49 @@
+From 4ae8a817fe18a8f592cdb51833917c2447e2d5d1 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Tue, 3 Oct 2017 17:01:12 +0900
+Subject: [PATCH 0047/1795] arm64: dts: renesas: salvator-common: add pfc node
+ for USB3.0 channel 0
+
+Since a R-Car Gen3 bootloader enables the PFC of USB3.0 channel 0,
+the USB3.0 host controller works without this setting on the kernel.
+But, this setting should have salvator-common.dtsi. So, this patch
+adds the pfc node for USB3.0 channel 0.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 73de4b8847892fa7d6fffd14139c5083a3fd1580)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/salvator-common.dtsi | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+index cfb79cb3dd87..3525b6dfff68 100644
+--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
++++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+@@ -494,6 +494,11 @@
+ bias-pull-down;
+ };
+ };
++
++ usb30_pins: usb30 {
++ groups = "usb30";
++ function = "usb30";
++ };
+ };
+
+ &pwm1 {
+@@ -637,5 +642,8 @@
+ };
+
+ &xhci0 {
++ pinctrl-0 = <&usb30_pins>;
++ pinctrl-names = "default";
++
+ status = "okay";
+ };
+--
+2.19.0
+
diff --git a/patches/0048-arm64-dts-renesas-r8a77995-add-PWM-device-nodes.patch b/patches/0048-arm64-dts-renesas-r8a77995-add-PWM-device-nodes.patch
new file mode 100644
index 0000000..4a00fde
--- /dev/null
+++ b/patches/0048-arm64-dts-renesas-r8a77995-add-PWM-device-nodes.patch
@@ -0,0 +1,71 @@
+From 8a7b33ea06a085b1f6452048e8a43db6675f1b22 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Wed, 4 Oct 2017 19:27:30 +0900
+Subject: [PATCH 0048/1795] arm64: dts: renesas: r8a77995: add PWM device nodes
+
+This patch adds PWM device nodes for r8a77995.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d40a434746bf2d6dbcc01bb1a14575c11e933cc3)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77995.dtsi | 40 +++++++++++++++++++++++
+ 1 file changed, 40 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+index 56e42921e879..bcc4d132f827 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+@@ -310,6 +310,46 @@
+ status = "disabled";
+ };
+
++ pwm0: pwm@e6e30000 {
++ compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
++ reg = <0 0xe6e30000 0 0x8>;
++ #pwm-cells = <2>;
++ clocks = <&cpg CPG_MOD 523>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 523>;
++ status = "disabled";
++ };
++
++ pwm1: pwm@e6e31000 {
++ compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
++ reg = <0 0xe6e31000 0 0x8>;
++ #pwm-cells = <2>;
++ clocks = <&cpg CPG_MOD 523>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 523>;
++ status = "disabled";
++ };
++
++ pwm2: pwm@e6e32000 {
++ compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
++ reg = <0 0xe6e32000 0 0x8>;
++ #pwm-cells = <2>;
++ clocks = <&cpg CPG_MOD 523>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 523>;
++ status = "disabled";
++ };
++
++ pwm3: pwm@e6e33000 {
++ compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
++ reg = <0 0xe6e33000 0 0x8>;
++ #pwm-cells = <2>;
++ clocks = <&cpg CPG_MOD 523>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 523>;
++ status = "disabled";
++ };
++
+ ehci0: usb@ee080100 {
+ compatible = "generic-ehci";
+ reg = <0 0xee080100 0 0x100>;
+--
+2.19.0
+
diff --git a/patches/0049-arm64-dts-renesas-r8a77995-draak-enable-PWM-channel-.patch b/patches/0049-arm64-dts-renesas-r8a77995-draak-enable-PWM-channel-.patch
new file mode 100644
index 0000000..6891225
--- /dev/null
+++ b/patches/0049-arm64-dts-renesas-r8a77995-draak-enable-PWM-channel-.patch
@@ -0,0 +1,64 @@
+From 79b05be8e0203fbee6fcfc17f5b7e7032417697f Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Wed, 4 Oct 2017 19:27:31 +0900
+Subject: [PATCH 0049/1795] arm64: dts: renesas: r8a77995: draak: enable PWM
+ channel 0 and 1
+
+This patch enables PWM channel 0 and 1 on the draak. Each channel
+connects to LTC2644 for brightness control.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit b35334447513c14a4dd55a67c269a743d4a4824b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ .../arm64/boot/dts/renesas/r8a77995-draak.dts | 24 +++++++++++++++++++
+ 1 file changed, 24 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+index fac58be83383..09de73b11db8 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
++++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+@@ -46,6 +46,16 @@
+ };
+ };
+
++ pwm0_pins: pwm0 {
++ groups = "pwm0_c";
++ function = "pwm0";
++ };
++
++ pwm1_pins: pwm1 {
++ groups = "pwm1_c";
++ function = "pwm1";
++ };
++
+ scif2_pins: scif2 {
+ groups = "scif2_data";
+ function = "scif2";
+@@ -94,6 +104,20 @@
+ status = "okay";
+ };
+
++&pwm0 {
++ pinctrl-0 = <&pwm0_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
++
++&pwm1 {
++ pinctrl-0 = <&pwm1_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
++
+ &rwdt {
+ timeout-sec = <60>;
+ status = "okay";
+--
+2.19.0
+
diff --git a/patches/0050-arm64-dts-ulcb-kf-initial-device-tree.patch b/patches/0050-arm64-dts-ulcb-kf-initial-device-tree.patch
new file mode 100644
index 0000000..e6188e0
--- /dev/null
+++ b/patches/0050-arm64-dts-ulcb-kf-initial-device-tree.patch
@@ -0,0 +1,62 @@
+From 4c77fb2d761509cc8110fac944d26fb324a021a3 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Fri, 6 Oct 2017 20:55:56 +0300
+Subject: [PATCH 0050/1795] arm64: dts: ulcb-kf: initial device tree
+
+Add the initial common dtsi file for Kingfisher infotainment board (R-Car
+Starter Kit extension)
+
+This commit supports the following peripherals:
+- HSCIF0
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 52cb66073d4358644f6adb83221e4432decb28bf)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 31 ++++++++++++++++++++++++
+ 1 file changed, 31 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+new file mode 100644
+index 000000000000..849f8b102c67
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+@@ -0,0 +1,31 @@
++/*
++ * Device Tree Source for the Kingfisher (ULCB extension) board
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++/ {
++ aliases {
++ serial1 = &hscif0;
++ };
++};
++
++&hscif0 {
++ pinctrl-0 = <&hscif0_pins>;
++ pinctrl-names = "default";
++ uart-has-rtscts;
++
++ status = "okay";
++};
++
++&pfc {
++ hscif0_pins: hscif0 {
++ groups = "hscif0_data", "hscif0_ctrl";
++ function = "hscif0";
++ };
++};
+--
+2.19.0
+
diff --git a/patches/0051-arm64-dts-m3ulcb-kf-initial-device-tree.patch b/patches/0051-arm64-dts-m3ulcb-kf-initial-device-tree.patch
new file mode 100644
index 0000000..8f92562
--- /dev/null
+++ b/patches/0051-arm64-dts-m3ulcb-kf-initial-device-tree.patch
@@ -0,0 +1,60 @@
+From 22b1e62ab747b002770e7df89a78579c1a66bf4d Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 14 Sep 2017 17:18:52 +0300
+Subject: [PATCH 0051/1795] arm64: dts: m3ulcb-kf: initial device tree
+
+Add the initial device tree for the M3ULCB with Kingfisher extension
+infotainment board.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit eded6a4d16c40879540e1073581e0679e9684bdb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/Makefile | 1 +
+ .../boot/dts/renesas/r8a7796-m3ulcb-kf.dts | 19 +++++++++++++++++++
+ 2 files changed, 20 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts
+
+diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
+index 3c2332a60f4e..683984a7928e 100644
+--- a/arch/arm64/boot/dts/renesas/Makefile
++++ b/arch/arm64/boot/dts/renesas/Makefile
+@@ -3,6 +3,7 @@ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb r8a7795-h3ulcb.dtb
+ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-xs.dtb
+ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x.dtb r8a7795-es1-h3ulcb.dtb
+ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb r8a7796-m3ulcb.dtb
++dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb
+ dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle.dtb
+ dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak.dtb
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts
+new file mode 100644
+index 000000000000..de2390f009e7
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts
+@@ -0,0 +1,19 @@
++/*
++ * Device Tree Source for the M3ULCB Kingfisher board
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7796-m3ulcb.dts"
++#include "ulcb-kf.dtsi"
++
++/ {
++ model = "Renesas M3ULCB Kingfisher board based on r8a7796";
++ compatible = "shimafuji,kingfisher", "renesas,m3ulcb",
++ "renesas,r8a7796";
++};
+--
+2.19.0
+
diff --git a/patches/0052-arm64-dts-h3ulcb-kf-ES1.x-SoC-initial-device-tree.patch b/patches/0052-arm64-dts-h3ulcb-kf-ES1.x-SoC-initial-device-tree.patch
new file mode 100644
index 0000000..da25280
--- /dev/null
+++ b/patches/0052-arm64-dts-h3ulcb-kf-ES1.x-SoC-initial-device-tree.patch
@@ -0,0 +1,60 @@
+From 76f3281bc1265429371d990675fb8270d2e19496 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 14 Sep 2017 17:18:58 +0300
+Subject: [PATCH 0052/1795] arm64: dts: h3ulcb-kf: ES1.x SoC initial device
+ tree
+
+Add the initial device tree for the H3ULCB ES1.x SoC with Kingfisher
+extension infotainment board.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d90e97dfe16610542bb83590a81081a47018ba89)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/Makefile | 1 +
+ .../dts/renesas/r8a7795-es1-h3ulcb-kf.dts | 19 +++++++++++++++++++
+ 2 files changed, 20 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts
+
+diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
+index 683984a7928e..2b48424ddf2d 100644
+--- a/arch/arm64/boot/dts/renesas/Makefile
++++ b/arch/arm64/boot/dts/renesas/Makefile
+@@ -2,6 +2,7 @@
+ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb r8a7795-h3ulcb.dtb
+ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-xs.dtb
+ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x.dtb r8a7795-es1-h3ulcb.dtb
++dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-kf.dtb
+ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb r8a7796-m3ulcb.dtb
+ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb
+ dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle.dtb
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts
+new file mode 100644
+index 000000000000..009cb1cb0dde
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts
+@@ -0,0 +1,19 @@
++/*
++ * Device Tree Source for the H3ULCB Kingfisher board
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7795-es1-h3ulcb.dts"
++#include "ulcb-kf.dtsi"
++
++/ {
++ model = "Renesas H3ULCB Kingfisher board based on r8a7795 ES1.x";
++ compatible = "shimafuji,kingfisher", "renesas,h3ulcb",
++ "renesas,r8a7795";
++};
+--
+2.19.0
+
diff --git a/patches/0053-arm64-dts-h3ulcb-kf-ES2.0-SoC-initial-device-tree.patch b/patches/0053-arm64-dts-h3ulcb-kf-ES2.0-SoC-initial-device-tree.patch
new file mode 100644
index 0000000..b41c4aa
--- /dev/null
+++ b/patches/0053-arm64-dts-h3ulcb-kf-ES2.0-SoC-initial-device-tree.patch
@@ -0,0 +1,59 @@
+From 7ea5331f53fb20800857a12282253a9ff84b8d20 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 14 Sep 2017 17:19:06 +0300
+Subject: [PATCH 0053/1795] arm64: dts: h3ulcb-kf: ES2.0+ SoC initial device
+ tree
+
+Add the initial device tree for the H3ULCB ES2.0+ SoC with Kingfisher
+extension infotainment board.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 20913f7e923ca87921f9ef9ee3dea65de0bc6a18)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/Makefile | 1 +
+ .../boot/dts/renesas/r8a7795-h3ulcb-kf.dts | 19 +++++++++++++++++++
+ 2 files changed, 20 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts
+
+diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
+index 2b48424ddf2d..842f5884d437 100644
+--- a/arch/arm64/boot/dts/renesas/Makefile
++++ b/arch/arm64/boot/dts/renesas/Makefile
+@@ -1,5 +1,6 @@
+ # SPDX-License-Identifier: GPL-2.0
+ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb r8a7795-h3ulcb.dtb
++dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-kf.dtb
+ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-xs.dtb
+ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x.dtb r8a7795-es1-h3ulcb.dtb
+ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-kf.dtb
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts
+new file mode 100644
+index 000000000000..4403227c0f97
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts
+@@ -0,0 +1,19 @@
++/*
++ * Device Tree Source for the H3ULCB Kingfisher board
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7795-h3ulcb.dts"
++#include "ulcb-kf.dtsi"
++
++/ {
++ model = "Renesas H3ULCB Kingfisher board based on r8a7795 ES2.0+";
++ compatible = "shimafuji,kingfisher", "renesas,h3ulcb",
++ "renesas,r8a7795";
++};
+--
+2.19.0
+
diff --git a/patches/0054-arm64-dts-ulcb-kf-enable-SCIF1.patch b/patches/0054-arm64-dts-ulcb-kf-enable-SCIF1.patch
new file mode 100644
index 0000000..59a2a6a
--- /dev/null
+++ b/patches/0054-arm64-dts-ulcb-kf-enable-SCIF1.patch
@@ -0,0 +1,50 @@
+From 13f80e0d6d7b331893c1653df83a385fb1cde5ee Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Fri, 6 Oct 2017 05:43:51 +0300
+Subject: [PATCH 0054/1795] arm64: dts: ulcb-kf: enable SCIF1
+
+This supports SCIF1 on ULCB Kingfisher board
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c6c816e22bc89ea4ebfcf04772b4623b573dadc7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 14 ++++++++++++++
+ 1 file changed, 14 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+index 849f8b102c67..885878a4822c 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+@@ -12,6 +12,7 @@
+ / {
+ aliases {
+ serial1 = &hscif0;
++ serial2 = &scif1;
+ };
+ };
+
+@@ -28,4 +29,17 @@
+ groups = "hscif0_data", "hscif0_ctrl";
+ function = "hscif0";
+ };
++
++ scif1_pins: scif1 {
++ groups = "scif1_data_b", "scif1_ctrl";
++ function = "scif1";
++ };
++};
++
++&scif1 {
++ pinctrl-0 = <&scif1_pins>;
++ pinctrl-names = "default";
++ uart-has-rtscts;
++
++ status = "okay";
+ };
+--
+2.19.0
+
diff --git a/patches/0055-arm64-dts-ulcb-kf-enable-CAN0-1.patch b/patches/0055-arm64-dts-ulcb-kf-enable-CAN0-1.patch
new file mode 100644
index 0000000..e0b4e05
--- /dev/null
+++ b/patches/0055-arm64-dts-ulcb-kf-enable-CAN0-1.patch
@@ -0,0 +1,60 @@
+From 7fb9f0541e1da5148cc220198ea6de13c09ce94a Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 14 Sep 2017 17:19:13 +0300
+Subject: [PATCH 0055/1795] arm64: dts: ulcb-kf: enable CAN0/1
+
+This supports CAN0/1 on ULCB Kingfisher board
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit ba915c12fa1f8a8b9c4b875199b489936ddeccac)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 22 ++++++++++++++++++++++
+ 1 file changed, 22 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+index 885878a4822c..a2cb7363e5ed 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+@@ -16,6 +16,18 @@
+ };
+ };
+
++&can0 {
++ pinctrl-0 = <&can0_pins>;
++ pinctrl-names = "default";
++ status = "okay";
++};
++
++&can1 {
++ pinctrl-0 = <&can1_pins>;
++ pinctrl-names = "default";
++ status = "okay";
++};
++
+ &hscif0 {
+ pinctrl-0 = <&hscif0_pins>;
+ pinctrl-names = "default";
+@@ -25,6 +37,16 @@
+ };
+
+ &pfc {
++ can0_pins: can0 {
++ groups = "can0_data_a";
++ function = "can0";
++ };
++
++ can1_pins: can1 {
++ groups = "can1_data";
++ function = "can1";
++ };
++
+ hscif0_pins: hscif0 {
+ groups = "hscif0_data", "hscif0_ctrl";
+ function = "hscif0";
+--
+2.19.0
+
diff --git a/patches/0056-arm64-dts-ulcb-kf-enable-HSUSB.patch b/patches/0056-arm64-dts-ulcb-kf-enable-HSUSB.patch
new file mode 100644
index 0000000..793398b
--- /dev/null
+++ b/patches/0056-arm64-dts-ulcb-kf-enable-HSUSB.patch
@@ -0,0 +1,35 @@
+From c2cf7cc2de2129d655453cc342b55fdbfcf9f0e3 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 7 Sep 2017 01:36:25 +0300
+Subject: [PATCH 0056/1795] arm64: dts: ulcb-kf: enable HSUSB
+
+This supports HSUSB on ULCB Kingfisher board
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit da9c3629085000730fdbc02fd533efb26fcf6382)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+index a2cb7363e5ed..aab51d0b9a50 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+@@ -36,6 +36,10 @@
+ status = "okay";
+ };
+
++&hsusb {
++ status = "okay";
++};
++
+ &pfc {
+ can0_pins: can0 {
+ groups = "can0_data_a";
+--
+2.19.0
+
diff --git a/patches/0057-arm64-dts-ulcb-kf-enable-USB2.0-Host-channel-0.patch b/patches/0057-arm64-dts-ulcb-kf-enable-USB2.0-Host-channel-0.patch
new file mode 100644
index 0000000..8a7a2f5
--- /dev/null
+++ b/patches/0057-arm64-dts-ulcb-kf-enable-USB2.0-Host-channel-0.patch
@@ -0,0 +1,46 @@
+From 1f29b975465738c65c32e8c3cac1ed04f34e14f0 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 7 Sep 2017 01:36:32 +0300
+Subject: [PATCH 0057/1795] arm64: dts: ulcb-kf: enable USB2.0 Host channel 0
+
+This supports USB2.0 Host channel 0 on ULCB Kingfisher board
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 36bd8e3e34f2cd0b9a074df22327719d8d34b3a5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+index aab51d0b9a50..83284eace174 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+@@ -28,6 +28,10 @@
+ status = "okay";
+ };
+
++&ehci0 {
++ status = "okay";
++};
++
+ &hscif0 {
+ pinctrl-0 = <&hscif0_pins>;
+ pinctrl-names = "default";
+@@ -40,6 +44,10 @@
+ status = "okay";
+ };
+
++&ohci0 {
++ status = "okay";
++};
++
+ &pfc {
+ can0_pins: can0 {
+ groups = "can0_data_a";
+--
+2.19.0
+
diff --git a/patches/0058-arm64-dts-ulcb-kf-enable-PCIE0-1.patch b/patches/0058-arm64-dts-ulcb-kf-enable-PCIE0-1.patch
new file mode 100644
index 0000000..2a587f9
--- /dev/null
+++ b/patches/0058-arm64-dts-ulcb-kf-enable-PCIE0-1.patch
@@ -0,0 +1,43 @@
+From b2c2d51c4efb8cf132a559b035b5c7f9cb5efaf0 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Fri, 6 Oct 2017 05:43:59 +0300
+Subject: [PATCH 0058/1795] arm64: dts: ulcb-kf: enable PCIE0/1
+
+This supports PCIE0/1 on ULCB Kingfisher board
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e0304a365bf07b4a0bb2d56ece5b52f3347d5a01)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+index 83284eace174..ae970da51fa1 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+@@ -48,6 +48,18 @@
+ status = "okay";
+ };
+
++&pcie_bus_clk {
++ clock-frequency = <100000000>;
++};
++
++&pciec0 {
++ status = "okay";
++};
++
++&pciec1 {
++ status = "okay";
++};
++
+ &pfc {
+ can0_pins: can0 {
+ groups = "can0_data_a";
+--
+2.19.0
+
diff --git a/patches/0059-arm64-dts-ulcb-kf-enable-USB3.0-Host.patch b/patches/0059-arm64-dts-ulcb-kf-enable-USB3.0-Host.patch
new file mode 100644
index 0000000..2f65a3d
--- /dev/null
+++ b/patches/0059-arm64-dts-ulcb-kf-enable-USB3.0-Host.patch
@@ -0,0 +1,32 @@
+From fdf5ddd69b24c33c8854b0405c00e82772f2923c Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 7 Sep 2017 01:36:48 +0300
+Subject: [PATCH 0059/1795] arm64: dts: ulcb-kf: enable USB3.0 Host
+
+This supports USB3.0 Host on ULCB Kingfisher board
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit af75811605f6358dd6c6f34043d3826a31a57e60)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+index ae970da51fa1..27657fec9696 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+@@ -89,3 +89,7 @@
+
+ status = "okay";
+ };
++
++&xhci0 {
++ status = "okay";
++};
+--
+2.19.0
+
diff --git a/patches/0060-arm64-dts-ulcb-kf-enable-TCA9539-on-I2C2.patch b/patches/0060-arm64-dts-ulcb-kf-enable-TCA9539-on-I2C2.patch
new file mode 100644
index 0000000..4fdfe33
--- /dev/null
+++ b/patches/0060-arm64-dts-ulcb-kf-enable-TCA9539-on-I2C2.patch
@@ -0,0 +1,53 @@
+From 7d1149d6815e3339bc16e17263c83966b4ccbba3 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Fri, 6 Oct 2017 05:44:05 +0300
+Subject: [PATCH 0060/1795] arm64: dts: ulcb-kf: enable TCA9539 on I2C2
+
+This supports TCA9539 gpio expanders on I2C2 bus on ULCB Kingfisher board
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 1189d1d4e3f97775e4e51571aa1dfbc33e0638bb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 22 ++++++++++++++++++++++
+ 1 file changed, 22 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+index 27657fec9696..80444aee7bcb 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+@@ -44,6 +44,28 @@
+ status = "okay";
+ };
+
++&i2c2 {
++ gpio_exp_74: gpio@74 {
++ compatible = "ti,tca9539";
++ reg = <0x74>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio6>;
++ interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
++ };
++
++ gpio_exp_75: gpio@75 {
++ compatible = "ti,tca9539";
++ reg = <0x75>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio6>;
++ interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
++ };
++};
++
+ &ohci0 {
+ status = "okay";
+ };
+--
+2.19.0
+
diff --git a/patches/0061-arm64-dts-ulcb-kf-enable-TCA9539-on-I2C4.patch b/patches/0061-arm64-dts-ulcb-kf-enable-TCA9539-on-I2C4.patch
new file mode 100644
index 0000000..6966e9a
--- /dev/null
+++ b/patches/0061-arm64-dts-ulcb-kf-enable-TCA9539-on-I2C4.patch
@@ -0,0 +1,53 @@
+From 88f91e49fe90d699a8e94bde2a6d2cc6c4cd6791 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Fri, 6 Oct 2017 05:44:11 +0300
+Subject: [PATCH 0061/1795] arm64: dts: ulcb-kf: enable TCA9539 on I2C4
+
+This supports TCA9539 gpio expanders on I2C4 bus on ULCB Kingfisher board
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 0f9c47b2446beb4ea90ba90870cbe72b6419d03b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 22 ++++++++++++++++++++++
+ 1 file changed, 22 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+index 80444aee7bcb..a6c2343e23cb 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+@@ -66,6 +66,28 @@
+ };
+ };
+
++&i2c4 {
++ gpio_exp_76: gpio@76 {
++ compatible = "ti,tca9539";
++ reg = <0x76>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio7>;
++ interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
++ };
++
++ gpio_exp_77: gpio@77 {
++ compatible = "ti,tca9539";
++ reg = <0x77>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ interrupt-parent = <&gpio5>;
++ interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
++ };
++};
++
+ &ohci0 {
+ status = "okay";
+ };
+--
+2.19.0
+
diff --git a/patches/0062-arm64-dts-ulcb-kf-enable-PCA9548-on-I2C2.patch b/patches/0062-arm64-dts-ulcb-kf-enable-PCA9548-on-I2C2.patch
new file mode 100644
index 0000000..886ef42
--- /dev/null
+++ b/patches/0062-arm64-dts-ulcb-kf-enable-PCA9548-on-I2C2.patch
@@ -0,0 +1,39 @@
+From 35950f31f2bb725bcb2ada173891d0b2f8c0c835 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 14 Sep 2017 17:19:34 +0300
+Subject: [PATCH 0062/1795] arm64: dts: ulcb-kf: enable PCA9548 on I2C2
+
+This supports PCA9548 I2C switch on I2C2 bus on ULCB Kingfisher board
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c6f9cbe364322ac168d8299f49cb54c6143f8e07)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+index a6c2343e23cb..3dfd3381e8f7 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+@@ -64,6 +64,14 @@
+ interrupt-parent = <&gpio6>;
+ interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
+ };
++
++ i2cswitch2: i2c-switch@71 {
++ compatible = "nxp,pca9548";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0x71>;
++ reset-gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
++ };
+ };
+
+ &i2c4 {
+--
+2.19.0
+
diff --git a/patches/0063-arm64-dts-ulcb-kf-enable-PCA9548-on-I2C4.patch b/patches/0063-arm64-dts-ulcb-kf-enable-PCA9548-on-I2C4.patch
new file mode 100644
index 0000000..5a00288
--- /dev/null
+++ b/patches/0063-arm64-dts-ulcb-kf-enable-PCA9548-on-I2C4.patch
@@ -0,0 +1,39 @@
+From c72a304e6637dc1552bf8b1ae8ab91beef6b94a4 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 14 Sep 2017 17:19:48 +0300
+Subject: [PATCH 0063/1795] arm64: dts: ulcb-kf: enable PCA9548 on I2C4
+
+This supports PCA9548 I2C switch on I2C4 bus on ULCB Kingfisher board
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 6d5fcdd39f413d0dae466c9f18e6ecd2b6b68362)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+index 3dfd3381e8f7..1923e5b8ee86 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+@@ -94,6 +94,14 @@
+ interrupt-parent = <&gpio5>;
+ interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
+ };
++
++ i2cswitch4: i2c-switch@71 {
++ compatible = "nxp,pca9548";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0x71>;
++ reset-gpios= <&gpio3 15 GPIO_ACTIVE_LOW>;
++ };
+ };
+
+ &ohci0 {
+--
+2.19.0
+
diff --git a/patches/0064-arm64-dts-ulcb-kf-hog-USB3-hub-control-gpios.patch b/patches/0064-arm64-dts-ulcb-kf-hog-USB3-hub-control-gpios.patch
new file mode 100644
index 0000000..c380922
--- /dev/null
+++ b/patches/0064-arm64-dts-ulcb-kf-hog-USB3-hub-control-gpios.patch
@@ -0,0 +1,46 @@
+From 943dae87c27462ff29b9a4edb91e2ca6e75e3818 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 7 Sep 2017 01:37:24 +0300
+Subject: [PATCH 0064/1795] arm64: dts: ulcb-kf: hog USB3 hub control gpios
+
+This adds gpio hogs for USB3 hub on ULCB Kingfisher board to power up and
+remove from reset the hub
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 4339306acef642af151ae9c7ec4c39d0cae28497)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 14 ++++++++++++++
+ 1 file changed, 14 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+index 1923e5b8ee86..657ad1041965 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+@@ -53,6 +53,20 @@
+ interrupt-controller;
+ interrupt-parent = <&gpio6>;
+ interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
++
++ hub_pwen {
++ gpio-hog;
++ gpios = <6 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "HUB pwen";
++ };
++
++ hub_rst {
++ gpio-hog;
++ gpios = <7 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "HUB rst";
++ };
+ };
+
+ gpio_exp_75: gpio@75 {
+--
+2.19.0
+
diff --git a/patches/0065-arm64-dts-r8a7796-Add-INTC-EX-device-node.patch b/patches/0065-arm64-dts-r8a7796-Add-INTC-EX-device-node.patch
new file mode 100644
index 0000000..93dee0e
--- /dev/null
+++ b/patches/0065-arm64-dts-r8a7796-Add-INTC-EX-device-node.patch
@@ -0,0 +1,47 @@
+From 37604f2917f385f273c0d0f5441882f25094220a Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 6 Oct 2017 14:05:51 +0200
+Subject: [PATCH 0065/1795] arm64: dts: r8a7796: Add INTC-EX device node
+
+Add a device node for the Interrupt Controller for External Devices
+(INTC-EX) on R-Car M3-W, which serves external IRQ pins IRQ[0-5].
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit fdceea3c2ade76d929725fdd6211feb52bdf705a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a7796.dtsi | 16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+index 57ac5ca6ed98..8085fd91811e 100644
+--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+@@ -383,6 +383,22 @@
+ #power-domain-cells = <1>;
+ };
+
++ intc_ex: interrupt-controller@e61c0000 {
++ compatible = "renesas,intc-ex-r8a7796", "renesas,irqc";
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ reg = <0 0xe61c0000 0 0x200>;
++ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 407>;
++ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
++ resets = <&cpg 407>;
++ };
++
+ i2c_dvfs: i2c@e60b0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+--
+2.19.0
+
diff --git a/patches/0066-arm64-dts-r8a77970-Add-INTC-EX-device-node.patch b/patches/0066-arm64-dts-r8a77970-Add-INTC-EX-device-node.patch
new file mode 100644
index 0000000..acda756
--- /dev/null
+++ b/patches/0066-arm64-dts-r8a77970-Add-INTC-EX-device-node.patch
@@ -0,0 +1,47 @@
+From 40ddd54ce44b8b5b65b53c5315913d2e762ef6f9 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 6 Oct 2017 14:05:52 +0200
+Subject: [PATCH 0066/1795] arm64: dts: r8a77970: Add INTC-EX device node
+
+Add a device node for the Interrupt Controller for External Devices
+(INTC-EX) on R-Car V3M, which serves external IRQ pins IRQ[0-5].
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c6a7fd98966015df742fe15d5a01827262f4fc41)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77970.dtsi | 16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+index aa9032d34189..97e6981938e7 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+@@ -124,6 +124,22 @@
+ #power-domain-cells = <1>;
+ };
+
++ intc_ex: interrupt-controller@e61c0000 {
++ compatible = "renesas,intc-ex-r8a77970", "renesas,irqc";
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ reg = <0 0xe61c0000 0 0x200>;
++ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 407>;
++ power-domains = <&sysc 32>;
++ resets = <&cpg 407>;
++ };
++
+ prr: chipid@fff00044 {
+ compatible = "renesas,prr";
+ reg = <0 0xfff00044 0 4>;
+--
+2.19.0
+
diff --git a/patches/0067-arm64-dts-r8a77995-Add-INTC-EX-device-node.patch b/patches/0067-arm64-dts-r8a77995-Add-INTC-EX-device-node.patch
new file mode 100644
index 0000000..c59eba4
--- /dev/null
+++ b/patches/0067-arm64-dts-r8a77995-Add-INTC-EX-device-node.patch
@@ -0,0 +1,47 @@
+From ea07acb66de85979af5119f3f6dd407ec3f319ad Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 6 Oct 2017 14:05:53 +0200
+Subject: [PATCH 0067/1795] arm64: dts: r8a77995: Add INTC-EX device node
+
+Add a device node for the Interrupt Controller for External Devices
+(INTC-EX) on R-Car D3, which serves external IRQ pins IRQ[0-5].
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit eb5a5078358771ae24b82acd772dfd5ae52fcd34)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77995.dtsi | 16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+index bcc4d132f827..788e3afae6e3 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+@@ -139,6 +139,22 @@
+ #power-domain-cells = <1>;
+ };
+
++ intc_ex: interrupt-controller@e61c0000 {
++ compatible = "renesas,intc-ex-r8a77995", "renesas,irqc";
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ reg = <0 0xe61c0000 0 0x200>;
++ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 407>;
++ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
++ resets = <&cpg 407>;
++ };
++
+ gpio0: gpio@e6050000 {
+ compatible = "renesas,gpio-r8a77995",
+ "renesas,rcar-gen3-gpio",
+--
+2.19.0
+
diff --git a/patches/0068-arm64-dts-renesas-eagle-add-EtherAVB-support.patch b/patches/0068-arm64-dts-renesas-eagle-add-EtherAVB-support.patch
new file mode 100644
index 0000000..03e6de2
--- /dev/null
+++ b/patches/0068-arm64-dts-renesas-eagle-add-EtherAVB-support.patch
@@ -0,0 +1,56 @@
+From 40068b443ee16910608564ddc1d7c2b493caafd0 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 15 Sep 2017 22:43:26 +0300
+Subject: [PATCH 0068/1795] arm64: dts: renesas: eagle: add EtherAVB support
+
+Define the Eagle board dependent part of the EtherAVB device node.
+Enable DHCP and NFS root for the kernel booting.
+
+Based on the original (and large) patch by Vladimir Barinov.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 38525608952ae5793a58c1ef4e447f45593d2ee1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a77970-eagle.dts | 14 +++++++++++++-
+ 1 file changed, 13 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
+index a4d1d4f24675..a711e77cc6a5 100644
+--- a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
++++ b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
+@@ -18,10 +18,11 @@
+
+ aliases {
+ serial0 = &scif0;
++ ethernet0 = &avb;
+ };
+
+ chosen {
+- bootargs = "ignore_loglevel";
++ bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
+ stdout-path = "serial0:115200n8";
+ };
+
+@@ -43,3 +44,14 @@
+ &scif0 {
+ status = "okay";
+ };
++
++&avb {
++ renesas,no-ether-link;
++ phy-handle = <&phy0>;
++ status = "okay";
++
++ phy0: ethernet-phy@0 {
++ rxc-skew-ps = <1500>;
++ reg = <0>;
++ };
++};
+--
+2.19.0
+
diff --git a/patches/0069-arm64-defconfig-Enable-hisilicon-hibmc-drm-driver.patch b/patches/0069-arm64-defconfig-Enable-hisilicon-hibmc-drm-driver.patch
new file mode 100644
index 0000000..0120f1a
--- /dev/null
+++ b/patches/0069-arm64-defconfig-Enable-hisilicon-hibmc-drm-driver.patch
@@ -0,0 +1,31 @@
+From 8d3e5b30329ced149851334092e404dac96db21b Mon Sep 17 00:00:00 2001
+From: Kefeng Wang <wangkefeng.wang@huawei.com>
+Date: Tue, 22 Aug 2017 21:20:56 +0800
+Subject: [PATCH 0069/1795] arm64: defconfig: Enable hisilicon hibmc drm driver
+
+Enable DRM_HISI_HIBMC as module for Hisilicon D03/D05 board.
+
+Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
+Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
+(cherry picked from commit f9a3da591d4bf5ad28eb9ffabc823dee9e4254f4)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/configs/defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
+index dfb60597d412..58fbf74e858b 100644
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -393,6 +393,7 @@ CONFIG_DRM_TEGRA=m
+ CONFIG_DRM_PANEL_SIMPLE=m
+ CONFIG_DRM_I2C_ADV7511=m
+ CONFIG_DRM_VC4=m
++CONFIG_DRM_HISI_HIBMC=m
+ CONFIG_DRM_HISI_KIRIN=m
+ CONFIG_DRM_MESON=m
+ CONFIG_FB=y
+--
+2.19.0
+
diff --git a/patches/0070-arm64-defconfig-Enable-QCOM_IOMMU.patch b/patches/0070-arm64-defconfig-Enable-QCOM_IOMMU.patch
new file mode 100644
index 0000000..8b54889
--- /dev/null
+++ b/patches/0070-arm64-defconfig-Enable-QCOM_IOMMU.patch
@@ -0,0 +1,34 @@
+From dd02d2abb6eadcf3748481883cb4b9a0727434f5 Mon Sep 17 00:00:00 2001
+From: Nicolas Dechesne <nicolas.dechesne@linaro.org>
+Date: Wed, 11 Oct 2017 17:19:25 +0200
+Subject: [PATCH 0070/1795] arm64: defconfig: Enable QCOM_IOMMU
+
+Enable QCOM IOMMU driver for 'B' family devices, such as APQ8016 found on the
+Dragonboard 410c. With this change, graphics console and GPU are working
+fine (using mesa/freedreno for GPU driver).
+
+Signed-off-by: Nicolas Dechesne <nicolas.dechesne@linaro.org>
+Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+Signed-off-by: Andy Gross <andy.gross@linaro.org>
+(cherry picked from commit de11c4de1fbbe1f48ac2ec9b38f1a4618d53d35f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/configs/defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
+index 58fbf74e858b..a9e710db5098 100644
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -518,6 +518,7 @@ CONFIG_HI6220_MBOX=y
+ CONFIG_ROCKCHIP_IOMMU=y
+ CONFIG_ARM_SMMU=y
+ CONFIG_ARM_SMMU_V3=y
++CONFIG_QCOM_IOMMU=y
+ CONFIG_RPMSG_QCOM_SMD=y
+ CONFIG_RASPBERRYPI_POWER=y
+ CONFIG_QCOM_SMEM=y
+--
+2.19.0
+
diff --git a/patches/0071-arm64-defconfig-enable-RTC-on-Armada-7K-8K-SoCs.patch b/patches/0071-arm64-defconfig-enable-RTC-on-Armada-7K-8K-SoCs.patch
new file mode 100644
index 0000000..2991451
--- /dev/null
+++ b/patches/0071-arm64-defconfig-enable-RTC-on-Armada-7K-8K-SoCs.patch
@@ -0,0 +1,31 @@
+From 75db402ebc6638fff402b16d272e2f39dce85ec4 Mon Sep 17 00:00:00 2001
+From: Gregory CLEMENT <gregory.clement@free-electrons.com>
+Date: Mon, 2 Oct 2017 17:44:16 +0200
+Subject: [PATCH 0071/1795] arm64: defconfig: enable RTC on Armada 7K/8K SoCs
+
+The Armada 38x RTC driver supports also the RTC controller found on the
+Armada 7K/8K SoCs, so enable it.
+
+Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
+(cherry picked from commit f5bdfbe66ae7c64ef3bd64c742e34111eb0e3164)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/configs/defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
+index a9e710db5098..e6d995696079 100644
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -478,6 +478,7 @@ CONFIG_RTC_DRV_EFI=y
+ CONFIG_RTC_DRV_S3C=y
+ CONFIG_RTC_DRV_PL031=y
+ CONFIG_RTC_DRV_SUN6I=y
++CONFIG_RTC_DRV_ARMADA38X=y
+ CONFIG_RTC_DRV_TEGRA=y
+ CONFIG_RTC_DRV_XGENE=y
+ CONFIG_DMADEVICES=y
+--
+2.19.0
+
diff --git a/patches/0072-arm64-renesas-salvator-common-fixup-audio_clkout.patch b/patches/0072-arm64-renesas-salvator-common-fixup-audio_clkout.patch
new file mode 100644
index 0000000..233c645
--- /dev/null
+++ b/patches/0072-arm64-renesas-salvator-common-fixup-audio_clkout.patch
@@ -0,0 +1,40 @@
+From a3e92f12336203147c98612248aed2801371afcf Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Fri, 13 Oct 2017 05:56:58 +0000
+Subject: [PATCH 0072/1795] arm64: renesas: salvator-common: fixup audio_clkout
+
+"audio_clkout" is dummy clock of <&rcar_sound 0> to avoid clock loop
+which invites probe conflict. Thus <&rcar_sound 0> and "audio_clkout"
+should be same value.
+
+On commit 5e2feac33095 ("arm64: renesas: salvator-common: sound
+clock-frequency needs descending order") exchanged <&rcar_sound 0>,
+but it didn't modify "audio_clkout".
+This patch fixup it.
+
+Fixes: 5e2feac33095 ("arm64: renesas: salvator-common: sound clock-frequency needs descending order")
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 64097f4c158199f520c483af0380cb58b23dff0a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/salvator-common.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+index 3525b6dfff68..e297f86cabf9 100644
+--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
++++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+@@ -52,7 +52,7 @@
+ */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+- clock-frequency = <11289600>;
++ clock-frequency = <12288000>;
+ };
+
+ backlight: backlight {
+--
+2.19.0
+
diff --git a/patches/0073-arm64-renesas-ulcb-fixup-audio_clkout.patch b/patches/0073-arm64-renesas-ulcb-fixup-audio_clkout.patch
new file mode 100644
index 0000000..33a1b60
--- /dev/null
+++ b/patches/0073-arm64-renesas-ulcb-fixup-audio_clkout.patch
@@ -0,0 +1,40 @@
+From 456d1845075570be5129cdeb41dd972ea4a61b4e Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Fri, 13 Oct 2017 05:57:18 +0000
+Subject: [PATCH 0073/1795] arm64: renesas: ulcb: fixup audio_clkout
+
+"audio_clkout" is dummy clock of <&rcar_sound 0> to avoid clock loop
+which invites probe conflict. Thus <&rcar_sound 0> and "audio_clkout"
+should be same value.
+
+On commit 2752660a37ae ("arm64: dts: renesas: ulcb: sound
+clock-frequency needs descending order") exchanged <&rcar_sound 0>,
+but it didn't modify "audio_clkout".
+This patch fixup it.
+
+Fixes: 2752660a37ae ("arm64: dts: renesas: ulcb: sound clock-frequency needs descending order")
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 822cecb1bef2bf41663d6c4e7786d9e159f72674)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/ulcb.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi
+index d32d876156b1..73439cf48659 100644
+--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi
++++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi
+@@ -31,7 +31,7 @@
+ */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+- clock-frequency = <11289600>;
++ clock-frequency = <12288000>;
+ };
+
+ hdmi0-out {
+--
+2.19.0
+
diff --git a/patches/0074-arm64-dts-r8a7795-Use-R-Car-GPIO-Gen3-fallback-compa.patch b/patches/0074-arm64-dts-r8a7795-Use-R-Car-GPIO-Gen3-fallback-compa.patch
new file mode 100644
index 0000000..71dfb9d
--- /dev/null
+++ b/patches/0074-arm64-dts-r8a7795-Use-R-Car-GPIO-Gen3-fallback-compa.patch
@@ -0,0 +1,101 @@
+From 8ec27b3d3d5de5c7bd2bfc900cde930e5f5263f6 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Fri, 13 Oct 2017 14:33:10 +0200
+Subject: [PATCH 0074/1795] arm64: dts: r8a7795: Use R-Car GPIO Gen3 fallback
+ compat string
+
+Use newly added R-Car GPIO Gen3 fallback compat string
+in place of now deprecated non-generation specific
+R-Car GPIO fallback compat string in the DT of the r8a7795 SoC.
+
+This should have no run-time effect as the driver matches against
+the per-SoC compat string before considering the fallback compat string.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit d6d7037cb2f8d33cae5384eeaea9b5248fb383ae)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a7795.dtsi | 16 ++++++++--------
+ 1 file changed, 8 insertions(+), 8 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+index d5cfd1a1c539..15ef292a8d9f 100644
+--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+@@ -220,7 +220,7 @@
+
+ gpio0: gpio@e6050000 {
+ compatible = "renesas,gpio-r8a7795",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6050000 0 0x50>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -235,7 +235,7 @@
+
+ gpio1: gpio@e6051000 {
+ compatible = "renesas,gpio-r8a7795",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6051000 0 0x50>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -250,7 +250,7 @@
+
+ gpio2: gpio@e6052000 {
+ compatible = "renesas,gpio-r8a7795",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6052000 0 0x50>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -265,7 +265,7 @@
+
+ gpio3: gpio@e6053000 {
+ compatible = "renesas,gpio-r8a7795",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6053000 0 0x50>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -280,7 +280,7 @@
+
+ gpio4: gpio@e6054000 {
+ compatible = "renesas,gpio-r8a7795",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6054000 0 0x50>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -295,7 +295,7 @@
+
+ gpio5: gpio@e6055000 {
+ compatible = "renesas,gpio-r8a7795",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6055000 0 0x50>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -310,7 +310,7 @@
+
+ gpio6: gpio@e6055400 {
+ compatible = "renesas,gpio-r8a7795",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6055400 0 0x50>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -325,7 +325,7 @@
+
+ gpio7: gpio@e6055800 {
+ compatible = "renesas,gpio-r8a7795",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6055800 0 0x50>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+--
+2.19.0
+
diff --git a/patches/0075-arm64-dts-r8a7796-Use-R-Car-GPIO-Gen3-fallback-compa.patch b/patches/0075-arm64-dts-r8a7796-Use-R-Car-GPIO-Gen3-fallback-compa.patch
new file mode 100644
index 0000000..cf3529c
--- /dev/null
+++ b/patches/0075-arm64-dts-r8a7796-Use-R-Car-GPIO-Gen3-fallback-compa.patch
@@ -0,0 +1,101 @@
+From 3d568aee4b07a687a153cfb40953b1219efa292c Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Fri, 13 Oct 2017 14:33:11 +0200
+Subject: [PATCH 0075/1795] arm64: dts: r8a7796: Use R-Car GPIO Gen3 fallback
+ compat string
+
+Use newly added R-Car GPIO Gen3 fallback compat string
+in place of now deprecated non-generation specific
+R-Car GPIO fallback compat string in the DT of the r8a7796 SoC.
+
+This should have no run-time effect as the driver matches against
+the per-SoC compat string before considering the fallback compat string.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit c8ee880415894e75b5289618dc2b8108bdd96a23)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/r8a7796.dtsi | 16 ++++++++--------
+ 1 file changed, 8 insertions(+), 8 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+index 8085fd91811e..f2b2e40c655e 100644
+--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+@@ -214,7 +214,7 @@
+
+ gpio0: gpio@e6050000 {
+ compatible = "renesas,gpio-r8a7796",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6050000 0 0x50>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -229,7 +229,7 @@
+
+ gpio1: gpio@e6051000 {
+ compatible = "renesas,gpio-r8a7796",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6051000 0 0x50>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -244,7 +244,7 @@
+
+ gpio2: gpio@e6052000 {
+ compatible = "renesas,gpio-r8a7796",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6052000 0 0x50>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -259,7 +259,7 @@
+
+ gpio3: gpio@e6053000 {
+ compatible = "renesas,gpio-r8a7796",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6053000 0 0x50>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -274,7 +274,7 @@
+
+ gpio4: gpio@e6054000 {
+ compatible = "renesas,gpio-r8a7796",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6054000 0 0x50>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -289,7 +289,7 @@
+
+ gpio5: gpio@e6055000 {
+ compatible = "renesas,gpio-r8a7796",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6055000 0 0x50>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -304,7 +304,7 @@
+
+ gpio6: gpio@e6055400 {
+ compatible = "renesas,gpio-r8a7796",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6055400 0 0x50>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -319,7 +319,7 @@
+
+ gpio7: gpio@e6055800 {
+ compatible = "renesas,gpio-r8a7796",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6055800 0 0x50>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+--
+2.19.0
+
diff --git a/patches/0076-arm64-defconfig-re-enable-Qualcomm-DB410c-USB.patch b/patches/0076-arm64-defconfig-re-enable-Qualcomm-DB410c-USB.patch
new file mode 100644
index 0000000..3894af9
--- /dev/null
+++ b/patches/0076-arm64-defconfig-re-enable-Qualcomm-DB410c-USB.patch
@@ -0,0 +1,54 @@
+From db879c856e35944f67183628195d1d09376b1a8f Mon Sep 17 00:00:00 2001
+From: Alex Elder <elder@linaro.org>
+Date: Mon, 16 Oct 2017 09:22:57 -0500
+Subject: [PATCH 0076/1795] arm64: defconfig: re-enable Qualcomm DB410c USB
+
+Stephen Boyd reworked some Qualcomm USB code earlier this year.
+The result requires a few different config options to be enabled
+in order for the USB on the DragonBoard 410c to continue working,
+but these were never added to arm64 "defconfig". As a result, USB
+on that board stopped working during the v4.13-rc1 merge window.
+
+Re-enable this functionality by setting the needed config options
+in the arm64 "defconfig" file.
+
+Signed-off-by: Alex Elder <elder@linaro.org>
+Signed-off-by: Andy Gross <andy.gross@linaro.org>
+(cherry picked from commit b8eb03a7cf1b767c339771201f9cb974cea1145a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/configs/defconfig | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
+index e6d995696079..2113a685de76 100644
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -431,6 +431,7 @@ CONFIG_USB_DWC2=y
+ CONFIG_USB_CHIPIDEA=y
+ CONFIG_USB_CHIPIDEA_UDC=y
+ CONFIG_USB_CHIPIDEA_HOST=y
++CONFIG_USB_CHIPIDEA_ULPI=y
+ CONFIG_USB_ISP1760=y
+ CONFIG_USB_HSIC_USB3503=y
+ CONFIG_NOP_USB_XCEIV=y
+@@ -439,6 +440,7 @@ CONFIG_USB_QCOM_8X16_PHY=y
+ CONFIG_USB_ULPI=y
+ CONFIG_USB_GADGET=y
+ CONFIG_USB_RENESAS_USBHS_UDC=m
++CONFIG_USB_ULPI_BUS=y
+ CONFIG_MMC=y
+ CONFIG_MMC_BLOCK_MINORS=32
+ CONFIG_MMC_ARMMMCI=y
+@@ -543,6 +545,7 @@ CONFIG_PWM_SAMSUNG=y
+ CONFIG_PWM_TEGRA=m
+ CONFIG_PHY_RCAR_GEN3_USB2=y
+ CONFIG_PHY_HI6220_USB=y
++CONFIG_PHY_QCOM_USB_HS=y
+ CONFIG_PHY_SUN4I_USB=y
+ CONFIG_PHY_MVEBU_CP110_COMPHY=y
+ CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+--
+2.19.0
+
diff --git a/patches/0077-arm64-defconfig-Enable-Tegra-PCI-controller.patch b/patches/0077-arm64-defconfig-Enable-Tegra-PCI-controller.patch
new file mode 100644
index 0000000..ddf0a49
--- /dev/null
+++ b/patches/0077-arm64-defconfig-Enable-Tegra-PCI-controller.patch
@@ -0,0 +1,32 @@
+From af04d31bbab2f596065c756385a7cdd95ab625d7 Mon Sep 17 00:00:00 2001
+From: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
+Date: Wed, 18 Oct 2017 17:46:20 +0300
+Subject: [PATCH 0077/1795] arm64: defconfig: Enable Tegra PCI controller
+
+The driver has supported the 64-bit Tegra210 for a while now, so enable
+it in the defconfig.
+
+Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
+Signed-off-by: Thierry Reding <treding@nvidia.com>
+(cherry picked from commit a9e6753c1c92ae7d2c0c99b420c5c7dd5ebfc37d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/configs/defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
+index 2113a685de76..6e8eced66e43 100644
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -74,6 +74,7 @@ CONFIG_PCIE_QCOM=y
+ CONFIG_PCIE_KIRIN=y
+ CONFIG_PCIE_ARMADA_8K=y
+ CONFIG_PCI_AARDVARK=y
++CONFIG_PCI_TEGRA=y
+ CONFIG_PCIE_RCAR=y
+ CONFIG_PCIE_ROCKCHIP=m
+ CONFIG_PCI_HOST_GENERIC=y
+--
+2.19.0
+
diff --git a/patches/0078-arm64-Add-ThunderX-drivers-to-defconfig.patch b/patches/0078-arm64-Add-ThunderX-drivers-to-defconfig.patch
new file mode 100644
index 0000000..566586e
--- /dev/null
+++ b/patches/0078-arm64-Add-ThunderX-drivers-to-defconfig.patch
@@ -0,0 +1,41 @@
+From 99459a8949c2f21b6ea76226cd0733c03cf8e5d0 Mon Sep 17 00:00:00 2001
+From: Robin Murphy <robin.murphy@arm.com>
+Date: Wed, 11 Oct 2017 16:15:41 +0100
+Subject: [PATCH 0078/1795] arm64: Add ThunderX drivers to defconfig
+
+ThunderX needs its PCI host drivers to do anything useful, and
+it's probably helpful to have networking by default too.
+
+Signed-off-by: Robin Murphy <robin.murphy@arm.com>
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+(cherry picked from commit 0454c9212d25bcf963810db9e4cb6311d666c0d5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/configs/defconfig | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
+index 6e8eced66e43..e5ce0ff06023 100644
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -79,6 +79,8 @@ CONFIG_PCIE_RCAR=y
+ CONFIG_PCIE_ROCKCHIP=m
+ CONFIG_PCI_HOST_GENERIC=y
+ CONFIG_PCI_XGENE=y
++CONFIG_PCI_HOST_THUNDER_PEM=y
++CONFIG_PCI_HOST_THUNDER_ECAM=y
+ CONFIG_ARM64_VA_BITS_48=y
+ CONFIG_SCHED_MC=y
+ CONFIG_NUMA=y
+@@ -192,6 +194,7 @@ CONFIG_VIRTIO_NET=y
+ CONFIG_AMD_XGBE=y
+ CONFIG_NET_XGENE=y
+ CONFIG_MACB=y
++CONFIG_THUNDER_NIC_PF=y
+ CONFIG_HNS_DSAF=y
+ CONFIG_HNS_ENET=y
+ CONFIG_E1000E=y
+--
+2.19.0
+
diff --git a/patches/0079-arm64-dts-renesas-salvator-common-add-dr_mode-proper.patch b/patches/0079-arm64-dts-renesas-salvator-common-add-dr_mode-proper.patch
new file mode 100644
index 0000000..bd88850
--- /dev/null
+++ b/patches/0079-arm64-dts-renesas-salvator-common-add-dr_mode-proper.patch
@@ -0,0 +1,50 @@
+From 6b0d58d81695bc11e318accdceeee6bb37ac4f8d Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 12 Oct 2017 18:23:30 +0900
+Subject: [PATCH 0079/1795] arm64: dts: renesas: salvator-common: add dr_mode
+ property for USB2.0 channel 0
+
+Since Salvator-X[S] have a USB2.0 dual-role channel (CN9), this patch
+adds dr_mode property for USB2.0 channel 0 (EHCI/OHCI and HS-USB)
+as "otg".
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e9ce35386b215d3f5d0fbab3cc24b69b8d57d7e6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/salvator-common.dtsi | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+index e297f86cabf9..eab44b9bdaa7 100644
+--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
++++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+@@ -275,6 +275,7 @@
+ };
+
+ &ehci0 {
++ dr_mode = "otg";
+ status = "okay";
+ };
+
+@@ -287,6 +288,7 @@
+ };
+
+ &hsusb {
++ dr_mode = "otg";
+ status = "okay";
+ };
+
+@@ -355,6 +357,7 @@
+ };
+
+ &ohci0 {
++ dr_mode = "otg";
+ status = "okay";
+ };
+
+--
+2.19.0
+
diff --git a/patches/0080-arm64-defconfig-enable-CONFIG_GPIO_UNIPHIER.patch b/patches/0080-arm64-defconfig-enable-CONFIG_GPIO_UNIPHIER.patch
new file mode 100644
index 0000000..02a77c7
--- /dev/null
+++ b/patches/0080-arm64-defconfig-enable-CONFIG_GPIO_UNIPHIER.patch
@@ -0,0 +1,31 @@
+From f6758393aa7276482f320b49e3d99d6eef5479d1 Mon Sep 17 00:00:00 2001
+From: Masahiro Yamada <yamada.masahiro@socionext.com>
+Date: Mon, 30 Oct 2017 19:00:52 +0900
+Subject: [PATCH 0080/1795] arm64: defconfig: enable CONFIG_GPIO_UNIPHIER
+
+Enable the GPIO controller driver used for UniPhier SoC family.
+
+Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+(cherry picked from commit d0e470e0db7ead4e5dc43057b8ede78451d0dd6b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/configs/defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
+index e5ce0ff06023..cad81b1723d8 100644
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -305,6 +305,7 @@ CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
+ CONFIG_GPIO_DWAPB=y
+ CONFIG_GPIO_PL061=y
+ CONFIG_GPIO_RCAR=y
++CONFIG_GPIO_UNIPHIER=y
+ CONFIG_GPIO_XGENE=y
+ CONFIG_GPIO_XGENE_SB=y
+ CONFIG_GPIO_PCA953X=y
+--
+2.19.0
+
diff --git a/patches/0081-kbuild-clean-up-.dtb-and-.dtb.S-patterns-from-top-le.patch b/patches/0081-kbuild-clean-up-.dtb-and-.dtb.S-patterns-from-top-le.patch
new file mode 100644
index 0000000..591731b
--- /dev/null
+++ b/patches/0081-kbuild-clean-up-.dtb-and-.dtb.S-patterns-from-top-le.patch
@@ -0,0 +1,583 @@
+From 08989bcf1c6e94a1b3cf0212839b26a8a34f8099 Mon Sep 17 00:00:00 2001
+From: Masahiro Yamada <yamada.masahiro@socionext.com>
+Date: Thu, 2 Nov 2017 11:51:25 +0900
+Subject: [PATCH 0081/1795] kbuild: clean up *.dtb and *.dtb.S patterns from
+ top-level Makefile
+
+We need to add "clean-files" in Makfiles to clean up DT blobs, but we
+often miss to do so.
+
+Since there are no source files that end with .dtb or .dtb.S, so we
+can clean-up those files from the top-level Makefile.
+
+Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
+Acked-by: Arnd Bergmann <arnd@arndb.de>
+Signed-off-by: Rob Herring <robh@kernel.org>
+(cherry picked from commit 74ce1896c6c65b2f8cccbf59162d542988835835)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/kbuild/makefiles.txt | 1 -
+ Makefile | 2 +-
+ arch/arc/boot/dts/Makefile | 1 -
+ arch/arm/boot/dts/Makefile | 1 -
+ arch/arm64/boot/dts/actions/Makefile | 1 -
+ arch/arm64/boot/dts/al/Makefile | 1 -
+ arch/arm64/boot/dts/allwinner/Makefile | 1 -
+ arch/arm64/boot/dts/altera/Makefile | 1 -
+ arch/arm64/boot/dts/amd/Makefile | 1 -
+ arch/arm64/boot/dts/amlogic/Makefile | 1 -
+ arch/arm64/boot/dts/apm/Makefile | 1 -
+ arch/arm64/boot/dts/arm/Makefile | 1 -
+ arch/arm64/boot/dts/broadcom/Makefile | 1 -
+ arch/arm64/boot/dts/broadcom/northstar2/Makefile | 1 -
+ arch/arm64/boot/dts/broadcom/stingray/Makefile | 1 -
+ arch/arm64/boot/dts/cavium/Makefile | 1 -
+ arch/arm64/boot/dts/exynos/Makefile | 1 -
+ arch/arm64/boot/dts/freescale/Makefile | 1 -
+ arch/arm64/boot/dts/hisilicon/Makefile | 1 -
+ arch/arm64/boot/dts/lg/Makefile | 1 -
+ arch/arm64/boot/dts/marvell/Makefile | 1 -
+ arch/arm64/boot/dts/mediatek/Makefile | 1 -
+ arch/arm64/boot/dts/nvidia/Makefile | 1 -
+ arch/arm64/boot/dts/qcom/Makefile | 1 -
+ arch/arm64/boot/dts/realtek/Makefile | 1 -
+ arch/arm64/boot/dts/renesas/Makefile | 1 -
+ arch/arm64/boot/dts/rockchip/Makefile | 1 -
+ arch/arm64/boot/dts/socionext/Makefile | 1 -
+ arch/arm64/boot/dts/sprd/Makefile | 1 -
+ arch/arm64/boot/dts/xilinx/Makefile | 1 -
+ arch/arm64/boot/dts/zte/Makefile | 1 -
+ arch/c6x/boot/dts/Makefile | 2 --
+ arch/cris/boot/dts/Makefile | 2 --
+ arch/h8300/boot/dts/Makefile | 1 -
+ arch/metag/boot/dts/Makefile | 1 -
+ arch/microblaze/boot/Makefile | 2 +-
+ arch/mips/boot/dts/Makefile | 1 -
+ arch/mips/boot/dts/brcm/Makefile | 1 -
+ arch/mips/boot/dts/cavium-octeon/Makefile | 1 -
+ arch/mips/boot/dts/img/Makefile | 1 -
+ arch/mips/boot/dts/ingenic/Makefile | 1 -
+ arch/mips/boot/dts/lantiq/Makefile | 1 -
+ arch/mips/boot/dts/mti/Makefile | 1 -
+ arch/mips/boot/dts/netlogic/Makefile | 1 -
+ arch/mips/boot/dts/ni/Makefile | 1 -
+ arch/mips/boot/dts/pic32/Makefile | 1 -
+ arch/mips/boot/dts/qca/Makefile | 1 -
+ arch/mips/boot/dts/ralink/Makefile | 1 -
+ arch/mips/boot/dts/xilfpga/Makefile | 1 -
+ arch/nios2/boot/Makefile | 2 --
+ arch/openrisc/boot/dts/Makefile | 2 --
+ arch/powerpc/boot/Makefile | 2 +-
+ arch/sh/boot/dts/Makefile | 2 --
+ arch/xtensa/boot/dts/Makefile | 2 --
+ 54 files changed, 3 insertions(+), 60 deletions(-)
+
+diff --git a/Documentation/kbuild/makefiles.txt b/Documentation/kbuild/makefiles.txt
+index f6f80380dff2..71e9feefb63c 100644
+--- a/Documentation/kbuild/makefiles.txt
++++ b/Documentation/kbuild/makefiles.txt
+@@ -1158,7 +1158,6 @@ When kbuild executes, the following steps are followed (roughly):
+
+ Example:
+ targets += $(dtb-y)
+- clean-files += *.dtb
+ DTC_FLAGS ?= -p 1024
+
+ --- 6.8 Custom kbuild commands
+diff --git a/Makefile b/Makefile
+index aa458afa7fa2..f5caf45de28b 100644
+--- a/Makefile
++++ b/Makefile
+@@ -1573,7 +1573,7 @@ clean: $(clean-dirs)
+ $(call cmd,rmfiles)
+ @find $(if $(KBUILD_EXTMOD), $(KBUILD_EXTMOD), .) $(RCS_FIND_IGNORE) \
+ \( -name '*.[oas]' -o -name '*.ko' -o -name '.*.cmd' \
+- -o -name '*.ko.*' \
++ -o -name '*.ko.*' -o -name '*.dtb' -o -name '*.dtb.S' \
+ -o -name '*.dwo' \
+ -o -name '*.su' \
+ -o -name '.*.d' -o -name '.*.tmp' -o -name '*.mod.c' \
+diff --git a/arch/arc/boot/dts/Makefile b/arch/arc/boot/dts/Makefile
+index 83c9e076ef63..f3c1fe958367 100644
+--- a/arch/arc/boot/dts/Makefile
++++ b/arch/arc/boot/dts/Makefile
+@@ -15,4 +15,3 @@ dtstree := $(srctree)/$(src)
+ dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts))
+
+ always := $(dtb-y)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index eff87a344566..300f441698fb 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -1075,4 +1075,3 @@ dtstree := $(srctree)/$(src)
+ dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts))
+
+ always := $(dtb-y)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/actions/Makefile b/arch/arm64/boot/dts/actions/Makefile
+index 62922d688ce3..89bb1b534492 100644
+--- a/arch/arm64/boot/dts/actions/Makefile
++++ b/arch/arm64/boot/dts/actions/Makefile
+@@ -2,4 +2,3 @@ dtb-$(CONFIG_ARCH_ACTIONS) += s900-bubblegum-96.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/al/Makefile b/arch/arm64/boot/dts/al/Makefile
+index 8a6cde4f9b23..8606a57e567f 100644
+--- a/arch/arm64/boot/dts/al/Makefile
++++ b/arch/arm64/boot/dts/al/Makefile
+@@ -2,4 +2,3 @@ dtb-$(CONFIG_ARCH_ALPINE) += alpine-v2-evp.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
+index ff35e184e422..5859798a766d 100644
+--- a/arch/arm64/boot/dts/allwinner/Makefile
++++ b/arch/arm64/boot/dts/allwinner/Makefile
+@@ -12,4 +12,3 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/altera/Makefile b/arch/arm64/boot/dts/altera/Makefile
+index d7a641698d77..7511b51d9b4a 100644
+--- a/arch/arm64/boot/dts/altera/Makefile
++++ b/arch/arm64/boot/dts/altera/Makefile
+@@ -2,4 +2,3 @@ dtb-$(CONFIG_ARCH_STRATIX10) += socfpga_stratix10_socdk.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/amd/Makefile b/arch/arm64/boot/dts/amd/Makefile
+index f9963d63006d..2bd7b0aefce8 100644
+--- a/arch/arm64/boot/dts/amd/Makefile
++++ b/arch/arm64/boot/dts/amd/Makefile
+@@ -5,4 +5,3 @@ dtb-$(CONFIG_ARCH_SEATTLE) += amd-overdrive.dtb \
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
+index 543416b8dff5..ce9244937953 100644
+--- a/arch/arm64/boot/dts/amlogic/Makefile
++++ b/arch/arm64/boot/dts/amlogic/Makefile
+@@ -23,4 +23,3 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-rbox-pro.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/apm/Makefile b/arch/arm64/boot/dts/apm/Makefile
+index a10fbdb34229..ab6f2da36265 100644
+--- a/arch/arm64/boot/dts/apm/Makefile
++++ b/arch/arm64/boot/dts/apm/Makefile
+@@ -4,4 +4,3 @@ dtb-$(CONFIG_ARCH_XGENE) += apm-merlin.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/arm/Makefile b/arch/arm64/boot/dts/arm/Makefile
+index 470378addca4..e516bf1fe1a1 100644
+--- a/arch/arm64/boot/dts/arm/Makefile
++++ b/arch/arm64/boot/dts/arm/Makefile
+@@ -6,4 +6,3 @@ dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2f-1xv7-ca53x2.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile
+index 3df2db7f8878..b3e7e7b447ee 100644
+--- a/arch/arm64/boot/dts/broadcom/Makefile
++++ b/arch/arm64/boot/dts/broadcom/Makefile
+@@ -5,4 +5,3 @@ dts-dirs += northstar2
+ dts-dirs += stingray
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/broadcom/northstar2/Makefile b/arch/arm64/boot/dts/broadcom/northstar2/Makefile
+index e01a1485b813..c589b9b55da8 100644
+--- a/arch/arm64/boot/dts/broadcom/northstar2/Makefile
++++ b/arch/arm64/boot/dts/broadcom/northstar2/Makefile
+@@ -3,4 +3,3 @@ dtb-$(CONFIG_ARCH_BCM_IPROC) += ns2-xmc.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/broadcom/stingray/Makefile b/arch/arm64/boot/dts/broadcom/stingray/Makefile
+index 04bb302f3233..fce39a6c2e56 100644
+--- a/arch/arm64/boot/dts/broadcom/stingray/Makefile
++++ b/arch/arm64/boot/dts/broadcom/stingray/Makefile
+@@ -4,4 +4,3 @@ dtb-$(CONFIG_ARCH_BCM_IPROC) += bcm958742t.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/cavium/Makefile b/arch/arm64/boot/dts/cavium/Makefile
+index 9f68c277302b..a7b62eb76cdf 100644
+--- a/arch/arm64/boot/dts/cavium/Makefile
++++ b/arch/arm64/boot/dts/cavium/Makefile
+@@ -4,4 +4,3 @@ dtb-$(CONFIG_ARCH_THUNDER2) += thunder2-99xx.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/exynos/Makefile b/arch/arm64/boot/dts/exynos/Makefile
+index 6914b2cbd397..c1b199e6213d 100644
+--- a/arch/arm64/boot/dts/exynos/Makefile
++++ b/arch/arm64/boot/dts/exynos/Makefile
+@@ -6,4 +6,3 @@ dtb-$(CONFIG_ARCH_EXYNOS) += \
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
+index dc02e82aba7c..a537b2fff41e 100644
+--- a/arch/arm64/boot/dts/freescale/Makefile
++++ b/arch/arm64/boot/dts/freescale/Makefile
+@@ -16,4 +16,3 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/hisilicon/Makefile b/arch/arm64/boot/dts/hisilicon/Makefile
+index 521ed484a5d1..ea696896acb3 100644
+--- a/arch/arm64/boot/dts/hisilicon/Makefile
++++ b/arch/arm64/boot/dts/hisilicon/Makefile
+@@ -8,4 +8,3 @@ dtb-$(CONFIG_ARCH_HISI) += hip07-d05.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/lg/Makefile b/arch/arm64/boot/dts/lg/Makefile
+index e345b8e58efe..cfde42d55cd8 100644
+--- a/arch/arm64/boot/dts/lg/Makefile
++++ b/arch/arm64/boot/dts/lg/Makefile
+@@ -4,4 +4,3 @@ dtb-$(CONFIG_ARCH_LG1K) += lg1313-ref.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile
+index 5633676fa9d0..11debddd9dfd 100644
+--- a/arch/arm64/boot/dts/marvell/Makefile
++++ b/arch/arm64/boot/dts/marvell/Makefile
+@@ -13,4 +13,3 @@ dtb-$(CONFIG_ARCH_MVEBU) += armada-8080-db.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile
+index 1d05d1824fa9..75aa07a89e3c 100644
+--- a/arch/arm64/boot/dts/mediatek/Makefile
++++ b/arch/arm64/boot/dts/mediatek/Makefile
+@@ -8,4 +8,3 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/nvidia/Makefile b/arch/arm64/boot/dts/nvidia/Makefile
+index 6bc0c6ab4b7f..90a34e66048b 100644
+--- a/arch/arm64/boot/dts/nvidia/Makefile
++++ b/arch/arm64/boot/dts/nvidia/Makefile
+@@ -7,4 +7,3 @@ dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-smaug.dtb
+ dtb-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186-p2771-0000.dtb
+
+ always := $(dtb-y)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
+index e7b25bee3f1e..08841488d9df 100644
+--- a/arch/arm64/boot/dts/qcom/Makefile
++++ b/arch/arm64/boot/dts/qcom/Makefile
+@@ -9,4 +9,3 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8996-mtp.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/realtek/Makefile b/arch/arm64/boot/dts/realtek/Makefile
+index 8521e921e59a..88cb515f7b21 100644
+--- a/arch/arm64/boot/dts/realtek/Makefile
++++ b/arch/arm64/boot/dts/realtek/Makefile
+@@ -2,4 +2,3 @@ dtb-$(CONFIG_ARCH_REALTEK) += rtd1295-zidoo-x9s.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
+index 842f5884d437..ebb836b2d9e9 100644
+--- a/arch/arm64/boot/dts/renesas/Makefile
++++ b/arch/arm64/boot/dts/renesas/Makefile
+@@ -10,4 +10,3 @@ dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle.dtb
+ dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak.dtb
+
+ always := $(dtb-y)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
+index 84801892ee61..4e84ef9baec4 100644
+--- a/arch/arm64/boot/dts/rockchip/Makefile
++++ b/arch/arm64/boot/dts/rockchip/Makefile
+@@ -14,4 +14,3 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/socionext/Makefile b/arch/arm64/boot/dts/socionext/Makefile
+index 72dbe8acd9fd..1844c004d075 100644
+--- a/arch/arm64/boot/dts/socionext/Makefile
++++ b/arch/arm64/boot/dts/socionext/Makefile
+@@ -7,4 +7,3 @@ dtb-$(CONFIG_ARCH_UNIPHIER) += \
+ uniphier-pxs3-ref.dtb
+
+ always := $(dtb-y)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/sprd/Makefile b/arch/arm64/boot/dts/sprd/Makefile
+index d7188be103c5..ae157b3542b4 100644
+--- a/arch/arm64/boot/dts/sprd/Makefile
++++ b/arch/arm64/boot/dts/sprd/Makefile
+@@ -4,4 +4,3 @@ dtb-$(CONFIG_ARCH_SPRD) += sc9836-openphone.dtb \
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/xilinx/Makefile b/arch/arm64/boot/dts/xilinx/Makefile
+index ae16427f6a4a..74e195650f04 100644
+--- a/arch/arm64/boot/dts/xilinx/Makefile
++++ b/arch/arm64/boot/dts/xilinx/Makefile
+@@ -2,4 +2,3 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-ep108.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/arm64/boot/dts/zte/Makefile b/arch/arm64/boot/dts/zte/Makefile
+index d86c4def6bc9..71e07089cde0 100644
+--- a/arch/arm64/boot/dts/zte/Makefile
++++ b/arch/arm64/boot/dts/zte/Makefile
+@@ -3,4 +3,3 @@ dtb-$(CONFIG_ARCH_ZX) += zx296718-pcbox.dtb
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb
+diff --git a/arch/c6x/boot/dts/Makefile b/arch/c6x/boot/dts/Makefile
+index 7368838c6e71..b212d278ebc4 100644
+--- a/arch/c6x/boot/dts/Makefile
++++ b/arch/c6x/boot/dts/Makefile
+@@ -17,5 +17,3 @@ $(obj)/builtin.dtb: $(obj)/$(DTB).dtb
+ $(call if_changed,cp)
+
+ $(obj)/linked_dtb.o: $(obj)/builtin.dtb
+-
+-clean-files := *.dtb
+diff --git a/arch/cris/boot/dts/Makefile b/arch/cris/boot/dts/Makefile
+index 3318c630caa2..118fe990a173 100644
+--- a/arch/cris/boot/dts/Makefile
++++ b/arch/cris/boot/dts/Makefile
+@@ -3,5 +3,3 @@ BUILTIN_DTB := $(patsubst "%",%,$(CONFIG_BUILTIN_DTB)).dtb.o
+ ifneq ($(CONFIG_BUILTIN_DTB),"")
+ obj-$(CONFIG_OF) += $(BUILTIN_DTB)
+ endif
+-
+-clean-files := *.dtb.S
+diff --git a/arch/h8300/boot/dts/Makefile b/arch/h8300/boot/dts/Makefile
+index 14593b51b2b2..e9f70611c86f 100644
+--- a/arch/h8300/boot/dts/Makefile
++++ b/arch/h8300/boot/dts/Makefile
+@@ -13,4 +13,3 @@ dtstree := $(srctree)/$(src)
+ dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts))
+
+ always := $(dtb-y)
+-clean-files := *.dtb.S *.dtb
+diff --git a/arch/metag/boot/dts/Makefile b/arch/metag/boot/dts/Makefile
+index ad5dde558db1..fbd7fc4c481d 100644
+--- a/arch/metag/boot/dts/Makefile
++++ b/arch/metag/boot/dts/Makefile
+@@ -19,4 +19,3 @@ dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dts
+ .SECONDARY: $(obj)/$(builtindtb-y).dtb.S
+
+ always += $(dtb-y)
+-clean-files += *.dtb *.dtb.S
+diff --git a/arch/microblaze/boot/Makefile b/arch/microblaze/boot/Makefile
+index 7c2f52d4a0e4..600e5a198bd2 100644
+--- a/arch/microblaze/boot/Makefile
++++ b/arch/microblaze/boot/Makefile
+@@ -37,4 +37,4 @@ $(obj)/simpleImage.%: vmlinux FORCE
+ $(call if_changed,strip,.strip)
+ @echo 'Kernel: $(UIMAGE_OUT) is ready' ' (#'`cat .version`')'
+
+-clean-files += simpleImage.*.unstrip linux.bin.ub dts/*.dtb
++clean-files += simpleImage.*.unstrip linux.bin.ub
+diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
+index e0a4e939f843..b3f2ee149d8e 100644
+--- a/arch/mips/boot/dts/Makefile
++++ b/arch/mips/boot/dts/Makefile
+@@ -19,4 +19,3 @@ dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(dtstree)/%.dts,%.dtb, $(foreach d,$(dt
+
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/mips/boot/dts/brcm/Makefile b/arch/mips/boot/dts/brcm/Makefile
+index 398994312361..80fdad463531 100644
+--- a/arch/mips/boot/dts/brcm/Makefile
++++ b/arch/mips/boot/dts/brcm/Makefile
+@@ -40,4 +40,3 @@ obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
+ obj- += dummy.o
+
+ always := $(dtb-y)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/mips/boot/dts/cavium-octeon/Makefile b/arch/mips/boot/dts/cavium-octeon/Makefile
+index 35300e091573..c0223497009e 100644
+--- a/arch/mips/boot/dts/cavium-octeon/Makefile
++++ b/arch/mips/boot/dts/cavium-octeon/Makefile
+@@ -7,4 +7,3 @@ obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
+ obj- += dummy.o
+
+ always := $(dtb-y)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/mips/boot/dts/img/Makefile b/arch/mips/boot/dts/img/Makefile
+index 139bcd887b86..519178305ce9 100644
+--- a/arch/mips/boot/dts/img/Makefile
++++ b/arch/mips/boot/dts/img/Makefile
+@@ -8,4 +8,3 @@ obj-$(CONFIG_MACH_PISTACHIO) += pistachio_marduk.dtb.o
+ obj- += dummy.o
+
+ always := $(dtb-y)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/mips/boot/dts/ingenic/Makefile b/arch/mips/boot/dts/ingenic/Makefile
+index 7798262570da..e2db1e4b5448 100644
+--- a/arch/mips/boot/dts/ingenic/Makefile
++++ b/arch/mips/boot/dts/ingenic/Makefile
+@@ -8,4 +8,3 @@ obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
+ obj- += dummy.o
+
+ always := $(dtb-y)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/mips/boot/dts/lantiq/Makefile b/arch/mips/boot/dts/lantiq/Makefile
+index 0c50e3246a63..58f9c11f12a0 100644
+--- a/arch/mips/boot/dts/lantiq/Makefile
++++ b/arch/mips/boot/dts/lantiq/Makefile
+@@ -7,4 +7,3 @@ obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
+ obj- += dummy.o
+
+ always := $(dtb-y)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/mips/boot/dts/mti/Makefile b/arch/mips/boot/dts/mti/Makefile
+index 5ee06f73c348..8a306abde117 100644
+--- a/arch/mips/boot/dts/mti/Makefile
++++ b/arch/mips/boot/dts/mti/Makefile
+@@ -8,4 +8,3 @@ obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
+ obj- += dummy.o
+
+ always := $(dtb-y)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/mips/boot/dts/netlogic/Makefile b/arch/mips/boot/dts/netlogic/Makefile
+index 1cb2fdbd8949..ef7e73f20961 100644
+--- a/arch/mips/boot/dts/netlogic/Makefile
++++ b/arch/mips/boot/dts/netlogic/Makefile
+@@ -11,4 +11,3 @@ obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
+ obj- += dummy.o
+
+ always := $(dtb-y)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/mips/boot/dts/ni/Makefile b/arch/mips/boot/dts/ni/Makefile
+index 66cfdffc51c2..094da7219905 100644
+--- a/arch/mips/boot/dts/ni/Makefile
++++ b/arch/mips/boot/dts/ni/Makefile
+@@ -4,4 +4,3 @@ dtb-$(CONFIG_FIT_IMAGE_FDT_NI169445) += 169445.dtb
+ obj- += dummy.o
+
+ always := $(dtb-y)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/mips/boot/dts/pic32/Makefile b/arch/mips/boot/dts/pic32/Makefile
+index a86ddd289cfd..3482cad52849 100644
+--- a/arch/mips/boot/dts/pic32/Makefile
++++ b/arch/mips/boot/dts/pic32/Makefile
+@@ -10,4 +10,3 @@ obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
+ obj- += dummy.o
+
+ always := $(dtb-y)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/mips/boot/dts/qca/Makefile b/arch/mips/boot/dts/qca/Makefile
+index eabd94eb59db..b44eabcdb4b0 100644
+--- a/arch/mips/boot/dts/qca/Makefile
++++ b/arch/mips/boot/dts/qca/Makefile
+@@ -10,4 +10,3 @@ dtb-$(CONFIG_ATH79) += ar9331_tl_mr3020.dtb
+ obj- += dummy.o
+
+ always := $(dtb-y)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/mips/boot/dts/ralink/Makefile b/arch/mips/boot/dts/ralink/Makefile
+index a80eeeecf613..f38c5956953f 100644
+--- a/arch/mips/boot/dts/ralink/Makefile
++++ b/arch/mips/boot/dts/ralink/Makefile
+@@ -12,4 +12,3 @@ obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
+ obj- += dummy.o
+
+ always := $(dtb-y)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/mips/boot/dts/xilfpga/Makefile b/arch/mips/boot/dts/xilfpga/Makefile
+index 498ac081e2fe..0afeee033f1b 100644
+--- a/arch/mips/boot/dts/xilfpga/Makefile
++++ b/arch/mips/boot/dts/xilfpga/Makefile
+@@ -7,4 +7,3 @@ obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
+ obj- += dummy.o
+
+ always := $(dtb-y)
+-clean-files := *.dtb *.dtb.S
+diff --git a/arch/nios2/boot/Makefile b/arch/nios2/boot/Makefile
+index c899876320df..2ba23a679732 100644
+--- a/arch/nios2/boot/Makefile
++++ b/arch/nios2/boot/Makefile
+@@ -53,7 +53,5 @@ $(obj)/%.dtb: $(src)/dts/%.dts FORCE
+
+ $(obj)/dtbs: $(addprefix $(obj)/, $(dtb-y))
+
+-clean-files := *.dtb
+-
+ install:
+ sh $(srctree)/$(src)/install.sh $(KERNELRELEASE) $(BOOTIMAGE) System.map "$(INSTALL_PATH)"
+diff --git a/arch/openrisc/boot/dts/Makefile b/arch/openrisc/boot/dts/Makefile
+index 792ce7143c3a..17dd791a833f 100644
+--- a/arch/openrisc/boot/dts/Makefile
++++ b/arch/openrisc/boot/dts/Makefile
+@@ -6,6 +6,4 @@ BUILTIN_DTB :=
+ endif
+ obj-y += $(BUILTIN_DTB)
+
+-clean-files := *.dtb.S
+-
+ #DTC_FLAGS ?= -p 1024
+diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
+index b479926f0167..f257925fa490 100644
+--- a/arch/powerpc/boot/Makefile
++++ b/arch/powerpc/boot/Makefile
+@@ -441,7 +441,7 @@ zInstall: $(CONFIGURE) $(addprefix $(obj)/, $(image-y))
+ clean-files += $(image-) $(initrd-) cuImage.* dtbImage.* treeImage.* \
+ zImage zImage.initrd zImage.chrp zImage.coff zImage.holly \
+ zImage.miboot zImage.pmac zImage.pseries \
+- zImage.maple simpleImage.* otheros.bld *.dtb
++ zImage.maple simpleImage.* otheros.bld
+
+ # clean up files cached by wrapper
+ clean-kernel-base := vmlinux.strip vmlinux.bin
+diff --git a/arch/sh/boot/dts/Makefile b/arch/sh/boot/dts/Makefile
+index e5ce3a0de7f4..715def00a436 100644
+--- a/arch/sh/boot/dts/Makefile
++++ b/arch/sh/boot/dts/Makefile
+@@ -1,3 +1 @@
+ obj-$(CONFIG_USE_BUILTIN_DTB) += $(patsubst "%",%,$(CONFIG_BUILTIN_DTB_SOURCE)).dtb.o
+-
+-clean-files := *.dtb.S
+diff --git a/arch/xtensa/boot/dts/Makefile b/arch/xtensa/boot/dts/Makefile
+index a15e241c9153..c62dd6ca1f82 100644
+--- a/arch/xtensa/boot/dts/Makefile
++++ b/arch/xtensa/boot/dts/Makefile
+@@ -16,5 +16,3 @@ dtstree := $(srctree)/$(src)
+ dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts))
+
+ always += $(dtb-y)
+-clean-files += *.dtb *.dtb.S
+-
+--
+2.19.0
+
diff --git a/patches/0082-arm64-dts-renesas-salvator-x-Remove-renesas-no-ether.patch b/patches/0082-arm64-dts-renesas-salvator-x-Remove-renesas-no-ether.patch
new file mode 100644
index 0000000..9eee2be
--- /dev/null
+++ b/patches/0082-arm64-dts-renesas-salvator-x-Remove-renesas-no-ether.patch
@@ -0,0 +1,62 @@
+From 3a5de1e1b611ccb39f700b41656a6d44b75a0dfa Mon Sep 17 00:00:00 2001
+From: Bogdan Mirea <Bogdan-Stefan_Mirea@mentor.com>
+Date: Thu, 21 Dec 2017 17:18:58 +0200
+Subject: [PATCH 0082/1795] arm64: dts: renesas: salvator-x: Remove renesas,
+ no-ether-link property
+
+The present change is a bug fix for AVB link iteratively up/down.
+
+Steps to reproduce:
+- start AVB TX stream (Using aplay via MSE),
+- disconnect+reconnect the eth cable,
+- after a reconnection the eth connection goes iteratively up/down
+ without user interaction,
+- this may heal after some seconds or even stay for minutes.
+
+As the documentation specifies, the "renesas,no-ether-link" option
+should be used when a board does not provide a proper AVB_LINK signal.
+There is no need for this option enabled on RCAR H3/M3 Salvator-X/XS
+and ULCB starter kits since the AVB_LINK is correctly handled by HW.
+
+Choosing to keep or remove the "renesas,no-ether-link" option will
+have impact on the code flow in the following ways:
+- keeping this option enabled may lead to unexpected behavior since
+ the RX & TX are enabled/disabled directly from adjust_link function
+ without any HW interrogation,
+- removing this option, the RX & TX will only be enabled/disabled after
+ HW interrogation. The HW check is made through the LMON pin in PSR
+ register which specifies AVB_LINK signal value (0 - at low level;
+ 1 - at high level).
+
+In conclusion, the present change is also a safety improvement because
+it removes the "renesas,no-ether-link" option leading to a proper way
+of detecting the link state based on HW interrogation and not on
+software heuristic.
+
+Fixes: dc36965a8905 ("arm64: dts: r8a7796: salvator-x: Enable EthernetAVB")
+Fixes: 6fa501c549aa ("arm64: dts: r8a7795: enable EthernetAVB on Salvator-X")
+Signed-off-by: Bogdan Mirea <Bogdan-Stefan_Mirea@mentor.com>
+Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 87c059e9c39dae20b8b9bd19d9ec55a6d6c10468)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/boot/dts/renesas/salvator-common.dtsi | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+index eab44b9bdaa7..8a2bcc73d5f0 100644
+--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
++++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+@@ -247,7 +247,6 @@
+ &avb {
+ pinctrl-0 = <&avb_pins>;
+ pinctrl-names = "default";
+- renesas,no-ether-link;
+ phy-handle = <&phy0>;
+ status = "okay";
+
+--
+2.19.0
+
diff --git a/patches/0083-pinctrl-gpio-Unify-namespace-for-cross-calls.patch b/patches/0083-pinctrl-gpio-Unify-namespace-for-cross-calls.patch
new file mode 100644
index 0000000..ce21ac2
--- /dev/null
+++ b/patches/0083-pinctrl-gpio-Unify-namespace-for-cross-calls.patch
@@ -0,0 +1,532 @@
+From ba6388cb9360489bc594e4493a87531ce1b969e5 Mon Sep 17 00:00:00 2001
+From: Linus Walleij <linus.walleij@linaro.org>
+Date: Fri, 22 Sep 2017 11:02:10 +0200
+Subject: [PATCH 0083/1795] pinctrl/gpio: Unify namespace for cross-calls
+
+The pinctrl_request_gpio() and pinctrl_free_gpio() break the nice
+namespacing in the other cross-calls like pinctrl_gpio_foo().
+Just rename them and all references so we have one namespace
+with all cross-calls under pinctrl_gpio_*().
+
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit a9a1d2a7827c9cf780966d0879c73ef5a91380e9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/driver-api/pinctl.rst | 6 +++---
+ Documentation/gpio/gpio-legacy.txt | 10 +++++-----
+ Documentation/translations/zh_CN/gpio.txt | 6 +++---
+ drivers/gpio/gpio-aspeed.c | 4 ++--
+ drivers/gpio/gpio-em.c | 4 ++--
+ drivers/gpio/gpio-pxa.c | 4 ++--
+ drivers/gpio/gpio-rcar.c | 4 ++--
+ drivers/gpio/gpio-tegra.c | 4 ++--
+ drivers/gpio/gpio-tz1090.c | 4 ++--
+ drivers/gpio/gpiolib.c | 4 ++--
+ drivers/pinctrl/bcm/pinctrl-iproc-gpio.c | 4 ++--
+ drivers/pinctrl/bcm/pinctrl-nsp-gpio.c | 4 ++--
+ drivers/pinctrl/core.c | 12 ++++++------
+ drivers/pinctrl/core.h | 2 +-
+ drivers/pinctrl/meson/pinctrl-meson.c | 4 ++--
+ drivers/pinctrl/sh-pfc/gpio.c | 4 ++--
+ drivers/pinctrl/sirf/pinctrl-atlas7.c | 4 ++--
+ drivers/pinctrl/sirf/pinctrl-sirf.c | 4 ++--
+ drivers/pinctrl/spear/pinctrl-plgpio.c | 6 +++---
+ drivers/pinctrl/stm32/pinctrl-stm32.c | 4 ++--
+ include/linux/pinctrl/consumer.h | 8 ++++----
+ 21 files changed, 53 insertions(+), 53 deletions(-)
+
+diff --git a/Documentation/driver-api/pinctl.rst b/Documentation/driver-api/pinctl.rst
+index 48f15b4f9d3e..6cb68d67fa75 100644
+--- a/Documentation/driver-api/pinctl.rst
++++ b/Documentation/driver-api/pinctl.rst
+@@ -757,8 +757,8 @@ that your datasheet calls "GPIO mode", but actually is just an electrical
+ configuration for a certain device. See the section below named
+ "GPIO mode pitfalls" for more details on this scenario.
+
+-The public pinmux API contains two functions named pinctrl_request_gpio()
+-and pinctrl_free_gpio(). These two functions shall *ONLY* be called from
++The public pinmux API contains two functions named pinctrl_gpio_request()
++and pinctrl_gpio_free(). These two functions shall *ONLY* be called from
+ gpiolib-based drivers as part of their gpio_request() and
+ gpio_free() semantics. Likewise the pinctrl_gpio_direction_[input|output]
+ shall only be called from within respective gpio_direction_[input|output]
+@@ -790,7 +790,7 @@ gpiolib driver and the affected GPIO range, pin offset and desired direction
+ will be passed along to this function.
+
+ Alternatively to using these special functions, it is fully allowed to use
+-named functions for each GPIO pin, the pinctrl_request_gpio() will attempt to
++named functions for each GPIO pin, the pinctrl_gpio_request() will attempt to
+ obtain the function "gpioN" where "N" is the global GPIO pin number if no
+ special GPIO-handler is registered.
+
+diff --git a/Documentation/gpio/gpio-legacy.txt b/Documentation/gpio/gpio-legacy.txt
+index 5eacc147ea87..8356d0e78f67 100644
+--- a/Documentation/gpio/gpio-legacy.txt
++++ b/Documentation/gpio/gpio-legacy.txt
+@@ -273,8 +273,8 @@ easily, gating off unused clocks.
+
+ For GPIOs that use pins known to the pinctrl subsystem, that subsystem should
+ be informed of their use; a gpiolib driver's .request() operation may call
+-pinctrl_request_gpio(), and a gpiolib driver's .free() operation may call
+-pinctrl_free_gpio(). The pinctrl subsystem allows a pinctrl_request_gpio()
++pinctrl_gpio_request(), and a gpiolib driver's .free() operation may call
++pinctrl_gpio_free(). The pinctrl subsystem allows a pinctrl_gpio_request()
+ to succeed concurrently with a pin or pingroup being "owned" by a device for
+ pin multiplexing.
+
+@@ -448,8 +448,8 @@ together with an optional gpio feature. We have already covered the
+ case where e.g. a GPIO controller need to reserve a pin or set the
+ direction of a pin by calling any of:
+
+-pinctrl_request_gpio()
+-pinctrl_free_gpio()
++pinctrl_gpio_request()
++pinctrl_gpio_free()
+ pinctrl_gpio_direction_input()
+ pinctrl_gpio_direction_output()
+
+@@ -466,7 +466,7 @@ gpio (under gpiolib) is still maintained by gpio drivers. It may happen
+ that different pin ranges in a SoC is managed by different gpio drivers.
+
+ This makes it logical to let gpio drivers announce their pin ranges to
+-the pin ctrl subsystem before it will call 'pinctrl_request_gpio' in order
++the pin ctrl subsystem before it will call 'pinctrl_gpio_request' in order
+ to request the corresponding pin to be prepared by the pinctrl subsystem
+ before any gpio usage.
+
+diff --git a/Documentation/translations/zh_CN/gpio.txt b/Documentation/translations/zh_CN/gpio.txt
+index bce972521065..4f8bf30a41dc 100644
+--- a/Documentation/translations/zh_CN/gpio.txt
++++ b/Documentation/translations/zh_CN/gpio.txt
+@@ -257,9 +257,9 @@ GPIO 值的命令需要等待其信息排到队首才发送命令，再获得其
+ 简单地关闭未使用时钟)。
+
+ 对于 GPIO 使用 pinctrl 子系统已知的引脚，子系统应该被告知其使用情况；
+-一个 gpiolib 驱动的 .request()操作应调用 pinctrl_request_gpio()，
+-而 gpiolib 驱动的 .free()操作应调用 pinctrl_free_gpio()。pinctrl
+-子系统允许 pinctrl_request_gpio()在某个引脚或引脚组以复用形式“属于”
++一个 gpiolib 驱动的 .request()操作应调用 pinctrl_gpio_request()，
++而 gpiolib 驱动的 .free()操作应调用 pinctrl_gpio_free()。pinctrl
++子系统允许 pinctrl_gpio_request()在某个引脚或引脚组以复用形式“属于”
+ 一个设备时都成功返回。
+
+ 任何须将 GPIO 信号导向适当引脚的引脚复用硬件的编程应该发生在 GPIO
+diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c
+index f03fe916eb9d..bf34b5eae705 100644
+--- a/drivers/gpio/gpio-aspeed.c
++++ b/drivers/gpio/gpio-aspeed.c
+@@ -536,12 +536,12 @@ static int aspeed_gpio_request(struct gpio_chip *chip, unsigned int offset)
+ if (!have_gpio(gpiochip_get_data(chip), offset))
+ return -ENODEV;
+
+- return pinctrl_request_gpio(chip->base + offset);
++ return pinctrl_gpio_request(chip->base + offset);
+ }
+
+ static void aspeed_gpio_free(struct gpio_chip *chip, unsigned int offset)
+ {
+- pinctrl_free_gpio(chip->base + offset);
++ pinctrl_gpio_free(chip->base + offset);
+ }
+
+ static inline void __iomem *bank_debounce_reg(struct aspeed_gpio *gpio,
+diff --git a/drivers/gpio/gpio-em.c b/drivers/gpio/gpio-em.c
+index 8d32ccc980d9..b86e09e1b13b 100644
+--- a/drivers/gpio/gpio-em.c
++++ b/drivers/gpio/gpio-em.c
+@@ -239,12 +239,12 @@ static int em_gio_to_irq(struct gpio_chip *chip, unsigned offset)
+
+ static int em_gio_request(struct gpio_chip *chip, unsigned offset)
+ {
+- return pinctrl_request_gpio(chip->base + offset);
++ return pinctrl_gpio_request(chip->base + offset);
+ }
+
+ static void em_gio_free(struct gpio_chip *chip, unsigned offset)
+ {
+- pinctrl_free_gpio(chip->base + offset);
++ pinctrl_gpio_free(chip->base + offset);
+
+ /* Set the GPIO as an input to ensure that the next GPIO request won't
+ * drive the GPIO pin as an output.
+diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c
+index 6029899789f3..da68d6cbc1e4 100644
+--- a/drivers/gpio/gpio-pxa.c
++++ b/drivers/gpio/gpio-pxa.c
+@@ -332,12 +332,12 @@ static int pxa_gpio_of_xlate(struct gpio_chip *gc,
+
+ static int pxa_gpio_request(struct gpio_chip *chip, unsigned int offset)
+ {
+- return pinctrl_request_gpio(chip->base + offset);
++ return pinctrl_gpio_request(chip->base + offset);
+ }
+
+ static void pxa_gpio_free(struct gpio_chip *chip, unsigned int offset)
+ {
+- pinctrl_free_gpio(chip->base + offset);
++ pinctrl_gpio_free(chip->base + offset);
+ }
+
+ static int pxa_init_gpio_chip(struct pxa_gpio_chip *pchip, int ngpio,
+diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
+index 1f0871553fd2..43b51045aa47 100644
+--- a/drivers/gpio/gpio-rcar.c
++++ b/drivers/gpio/gpio-rcar.c
+@@ -249,7 +249,7 @@ static int gpio_rcar_request(struct gpio_chip *chip, unsigned offset)
+ if (error < 0)
+ return error;
+
+- error = pinctrl_request_gpio(chip->base + offset);
++ error = pinctrl_gpio_request(chip->base + offset);
+ if (error)
+ pm_runtime_put(&p->pdev->dev);
+
+@@ -260,7 +260,7 @@ static void gpio_rcar_free(struct gpio_chip *chip, unsigned offset)
+ {
+ struct gpio_rcar_priv *p = gpiochip_get_data(chip);
+
+- pinctrl_free_gpio(chip->base + offset);
++ pinctrl_gpio_free(chip->base + offset);
+
+ /*
+ * Set the GPIO as an input to ensure that the next GPIO request won't
+diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c
+index fbaf974277df..8db47f671708 100644
+--- a/drivers/gpio/gpio-tegra.c
++++ b/drivers/gpio/gpio-tegra.c
+@@ -141,14 +141,14 @@ static void tegra_gpio_disable(struct tegra_gpio_info *tgi, unsigned int gpio)
+
+ static int tegra_gpio_request(struct gpio_chip *chip, unsigned int offset)
+ {
+- return pinctrl_request_gpio(offset);
++ return pinctrl_gpio_request(offset);
+ }
+
+ static void tegra_gpio_free(struct gpio_chip *chip, unsigned int offset)
+ {
+ struct tegra_gpio_info *tgi = gpiochip_get_data(chip);
+
+- pinctrl_free_gpio(offset);
++ pinctrl_gpio_free(offset);
+ tegra_gpio_disable(tgi, offset);
+ }
+
+diff --git a/drivers/gpio/gpio-tz1090.c b/drivers/gpio/gpio-tz1090.c
+index 22c5be65051f..0bb9bb583889 100644
+--- a/drivers/gpio/gpio-tz1090.c
++++ b/drivers/gpio/gpio-tz1090.c
+@@ -232,7 +232,7 @@ static int tz1090_gpio_request(struct gpio_chip *chip, unsigned int offset)
+ struct tz1090_gpio_bank *bank = gpiochip_get_data(chip);
+ int ret;
+
+- ret = pinctrl_request_gpio(chip->base + offset);
++ ret = pinctrl_gpio_request(chip->base + offset);
+ if (ret)
+ return ret;
+
+@@ -246,7 +246,7 @@ static void tz1090_gpio_free(struct gpio_chip *chip, unsigned int offset)
+ {
+ struct tz1090_gpio_bank *bank = gpiochip_get_data(chip);
+
+- pinctrl_free_gpio(chip->base + offset);
++ pinctrl_gpio_free(chip->base + offset);
+
+ tz1090_gpio_clear_bit(bank, REG_GPIO_BIT_EN, offset);
+ }
+diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
+index 7e0bfd7347f6..99d0b3510b54 100644
+--- a/drivers/gpio/gpiolib.c
++++ b/drivers/gpio/gpiolib.c
+@@ -1863,7 +1863,7 @@ static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip)
+ */
+ int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset)
+ {
+- return pinctrl_request_gpio(chip->gpiodev->base + offset);
++ return pinctrl_gpio_request(chip->gpiodev->base + offset);
+ }
+ EXPORT_SYMBOL_GPL(gpiochip_generic_request);
+
+@@ -1874,7 +1874,7 @@ EXPORT_SYMBOL_GPL(gpiochip_generic_request);
+ */
+ void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset)
+ {
+- pinctrl_free_gpio(chip->gpiodev->base + offset);
++ pinctrl_gpio_free(chip->gpiodev->base + offset);
+ }
+ EXPORT_SYMBOL_GPL(gpiochip_generic_free);
+
+diff --git a/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c b/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c
+index 85a8c97d9dfe..5d08d989b1d0 100644
+--- a/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c
++++ b/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c
+@@ -311,7 +311,7 @@ static int iproc_gpio_request(struct gpio_chip *gc, unsigned offset)
+ if (!chip->pinmux_is_supported)
+ return 0;
+
+- return pinctrl_request_gpio(gpio);
++ return pinctrl_gpio_request(gpio);
+ }
+
+ static void iproc_gpio_free(struct gpio_chip *gc, unsigned offset)
+@@ -322,7 +322,7 @@ static void iproc_gpio_free(struct gpio_chip *gc, unsigned offset)
+ if (!chip->pinmux_is_supported)
+ return;
+
+- pinctrl_free_gpio(gpio);
++ pinctrl_gpio_free(gpio);
+ }
+
+ static int iproc_gpio_direction_input(struct gpio_chip *gc, unsigned gpio)
+diff --git a/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c b/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c
+index 1cfe45fd391f..c1887072936e 100644
+--- a/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c
++++ b/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c
+@@ -282,14 +282,14 @@ static int nsp_gpio_request(struct gpio_chip *gc, unsigned offset)
+ {
+ unsigned gpio = gc->base + offset;
+
+- return pinctrl_request_gpio(gpio);
++ return pinctrl_gpio_request(gpio);
+ }
+
+ static void nsp_gpio_free(struct gpio_chip *gc, unsigned offset)
+ {
+ unsigned gpio = gc->base + offset;
+
+- pinctrl_free_gpio(gpio);
++ pinctrl_gpio_free(gpio);
+ }
+
+ static int nsp_gpio_direction_input(struct gpio_chip *gc, unsigned gpio)
+diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c
+index c55517312485..2c0dbfcff3e6 100644
+--- a/drivers/pinctrl/core.c
++++ b/drivers/pinctrl/core.c
+@@ -733,14 +733,14 @@ int pinctrl_get_group_selector(struct pinctrl_dev *pctldev,
+ }
+
+ /**
+- * pinctrl_request_gpio() - request a single pin to be used as GPIO
++ * pinctrl_gpio_request() - request a single pin to be used as GPIO
+ * @gpio: the GPIO pin number from the GPIO subsystem number space
+ *
+ * This function should *ONLY* be used from gpiolib-based GPIO drivers,
+ * as part of their gpio_request() semantics, platforms and individual drivers
+ * shall *NOT* request GPIO pins to be muxed in.
+ */
+-int pinctrl_request_gpio(unsigned gpio)
++int pinctrl_gpio_request(unsigned gpio)
+ {
+ struct pinctrl_dev *pctldev;
+ struct pinctrl_gpio_range *range;
+@@ -765,17 +765,17 @@ int pinctrl_request_gpio(unsigned gpio)
+
+ return ret;
+ }
+-EXPORT_SYMBOL_GPL(pinctrl_request_gpio);
++EXPORT_SYMBOL_GPL(pinctrl_gpio_request);
+
+ /**
+- * pinctrl_free_gpio() - free control on a single pin, currently used as GPIO
++ * pinctrl_gpio_free() - free control on a single pin, currently used as GPIO
+ * @gpio: the GPIO pin number from the GPIO subsystem number space
+ *
+ * This function should *ONLY* be used from gpiolib-based GPIO drivers,
+ * as part of their gpio_free() semantics, platforms and individual drivers
+ * shall *NOT* request GPIO pins to be muxed out.
+ */
+-void pinctrl_free_gpio(unsigned gpio)
++void pinctrl_gpio_free(unsigned gpio)
+ {
+ struct pinctrl_dev *pctldev;
+ struct pinctrl_gpio_range *range;
+@@ -795,7 +795,7 @@ void pinctrl_free_gpio(unsigned gpio)
+
+ mutex_unlock(&pctldev->mutex);
+ }
+-EXPORT_SYMBOL_GPL(pinctrl_free_gpio);
++EXPORT_SYMBOL_GPL(pinctrl_gpio_free);
+
+ static int pinctrl_gpio_direction(unsigned gpio, bool input)
+ {
+diff --git a/drivers/pinctrl/core.h b/drivers/pinctrl/core.h
+index 7880c3adc450..8cf2eba17c8c 100644
+--- a/drivers/pinctrl/core.h
++++ b/drivers/pinctrl/core.h
+@@ -154,7 +154,7 @@ struct pinctrl_setting {
+ * or pin, and each of these will increment the @usecount.
+ * @mux_owner: The name of device that called pinctrl_get().
+ * @mux_setting: The most recent selected mux setting for this pin, if any.
+- * @gpio_owner: If pinctrl_request_gpio() was called for this pin, this is
++ * @gpio_owner: If pinctrl_gpio_request() was called for this pin, this is
+ * the name of the GPIO that "owns" this pin.
+ */
+ struct pin_desc {
+diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c
+index 66ed70c12733..e6e12a7b21e0 100644
+--- a/drivers/pinctrl/meson/pinctrl-meson.c
++++ b/drivers/pinctrl/meson/pinctrl-meson.c
+@@ -412,14 +412,14 @@ static const struct pinconf_ops meson_pinconf_ops = {
+
+ static int meson_gpio_request(struct gpio_chip *chip, unsigned gpio)
+ {
+- return pinctrl_request_gpio(chip->base + gpio);
++ return pinctrl_gpio_request(chip->base + gpio);
+ }
+
+ static void meson_gpio_free(struct gpio_chip *chip, unsigned gpio)
+ {
+ struct meson_pinctrl *pc = gpiochip_get_data(chip);
+
+- pinctrl_free_gpio(pc->data->pin_base + gpio);
++ pinctrl_gpio_free(pc->data->pin_base + gpio);
+ }
+
+ static int meson_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
+diff --git a/drivers/pinctrl/sh-pfc/gpio.c b/drivers/pinctrl/sh-pfc/gpio.c
+index 6b5422766f13..946d9be50b62 100644
+--- a/drivers/pinctrl/sh-pfc/gpio.c
++++ b/drivers/pinctrl/sh-pfc/gpio.c
+@@ -139,12 +139,12 @@ static int gpio_pin_request(struct gpio_chip *gc, unsigned offset)
+ if (idx < 0 || pfc->info->pins[idx].enum_id == 0)
+ return -EINVAL;
+
+- return pinctrl_request_gpio(offset);
++ return pinctrl_gpio_request(offset);
+ }
+
+ static void gpio_pin_free(struct gpio_chip *gc, unsigned offset)
+ {
+- return pinctrl_free_gpio(offset);
++ return pinctrl_gpio_free(offset);
+ }
+
+ static void gpio_pin_set_value(struct sh_pfc_chip *chip, unsigned offset,
+diff --git a/drivers/pinctrl/sirf/pinctrl-atlas7.c b/drivers/pinctrl/sirf/pinctrl-atlas7.c
+index 4db9323251e3..f4b192b493a0 100644
+--- a/drivers/pinctrl/sirf/pinctrl-atlas7.c
++++ b/drivers/pinctrl/sirf/pinctrl-atlas7.c
+@@ -5860,7 +5860,7 @@ static int atlas7_gpio_request(struct gpio_chip *chip,
+ if (ret < 0)
+ return ret;
+
+- if (pinctrl_request_gpio(chip->base + gpio))
++ if (pinctrl_gpio_request(chip->base + gpio))
+ return -ENODEV;
+
+ raw_spin_lock_irqsave(&a7gc->lock, flags);
+@@ -5890,7 +5890,7 @@ static void atlas7_gpio_free(struct gpio_chip *chip,
+
+ raw_spin_unlock_irqrestore(&a7gc->lock, flags);
+
+- pinctrl_free_gpio(chip->base + gpio);
++ pinctrl_gpio_free(chip->base + gpio);
+ }
+
+ static int atlas7_gpio_direction_input(struct gpio_chip *chip,
+diff --git a/drivers/pinctrl/sirf/pinctrl-sirf.c b/drivers/pinctrl/sirf/pinctrl-sirf.c
+index d3ef05973901..d64add0b84cc 100644
+--- a/drivers/pinctrl/sirf/pinctrl-sirf.c
++++ b/drivers/pinctrl/sirf/pinctrl-sirf.c
+@@ -614,7 +614,7 @@ static int sirfsoc_gpio_request(struct gpio_chip *chip, unsigned offset)
+ struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset);
+ unsigned long flags;
+
+- if (pinctrl_request_gpio(chip->base + offset))
++ if (pinctrl_gpio_request(chip->base + offset))
+ return -ENODEV;
+
+ spin_lock_irqsave(&bank->lock, flags);
+@@ -644,7 +644,7 @@ static void sirfsoc_gpio_free(struct gpio_chip *chip, unsigned offset)
+
+ spin_unlock_irqrestore(&bank->lock, flags);
+
+- pinctrl_free_gpio(chip->base + offset);
++ pinctrl_gpio_free(chip->base + offset);
+ }
+
+ static int sirfsoc_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
+diff --git a/drivers/pinctrl/spear/pinctrl-plgpio.c b/drivers/pinctrl/spear/pinctrl-plgpio.c
+index cf6d68c7345b..7a33e2e1e3e7 100644
+--- a/drivers/pinctrl/spear/pinctrl-plgpio.c
++++ b/drivers/pinctrl/spear/pinctrl-plgpio.c
+@@ -204,7 +204,7 @@ static int plgpio_request(struct gpio_chip *chip, unsigned offset)
+ if (offset >= chip->ngpio)
+ return -EINVAL;
+
+- ret = pinctrl_request_gpio(gpio);
++ ret = pinctrl_gpio_request(gpio);
+ if (ret)
+ return ret;
+
+@@ -242,7 +242,7 @@ static int plgpio_request(struct gpio_chip *chip, unsigned offset)
+ if (!IS_ERR(plgpio->clk))
+ clk_disable(plgpio->clk);
+ err0:
+- pinctrl_free_gpio(gpio);
++ pinctrl_gpio_free(gpio);
+ return ret;
+ }
+
+@@ -273,7 +273,7 @@ static void plgpio_free(struct gpio_chip *chip, unsigned offset)
+ if (!IS_ERR(plgpio->clk))
+ clk_disable(plgpio->clk);
+
+- pinctrl_free_gpio(gpio);
++ pinctrl_gpio_free(gpio);
+ }
+
+ /* PLGPIO IRQ */
+diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c
+index 50299ad96659..a954d25bac4e 100644
+--- a/drivers/pinctrl/stm32/pinctrl-stm32.c
++++ b/drivers/pinctrl/stm32/pinctrl-stm32.c
+@@ -150,12 +150,12 @@ static int stm32_gpio_request(struct gpio_chip *chip, unsigned offset)
+ return -EINVAL;
+ }
+
+- return pinctrl_request_gpio(chip->base + offset);
++ return pinctrl_gpio_request(chip->base + offset);
+ }
+
+ static void stm32_gpio_free(struct gpio_chip *chip, unsigned offset)
+ {
+- pinctrl_free_gpio(chip->base + offset);
++ pinctrl_gpio_free(chip->base + offset);
+ }
+
+ static int stm32_gpio_get(struct gpio_chip *chip, unsigned offset)
+diff --git a/include/linux/pinctrl/consumer.h b/include/linux/pinctrl/consumer.h
+index a0f2aba72fa9..0412cc9833e9 100644
+--- a/include/linux/pinctrl/consumer.h
++++ b/include/linux/pinctrl/consumer.h
+@@ -25,8 +25,8 @@ struct device;
+ #ifdef CONFIG_PINCTRL
+
+ /* External interface to pin control */
+-extern int pinctrl_request_gpio(unsigned gpio);
+-extern void pinctrl_free_gpio(unsigned gpio);
++extern int pinctrl_gpio_request(unsigned gpio);
++extern void pinctrl_gpio_free(unsigned gpio);
+ extern int pinctrl_gpio_direction_input(unsigned gpio);
+ extern int pinctrl_gpio_direction_output(unsigned gpio);
+ extern int pinctrl_gpio_set_config(unsigned gpio, unsigned long config);
+@@ -62,12 +62,12 @@ static inline int pinctrl_pm_select_idle_state(struct device *dev)
+
+ #else /* !CONFIG_PINCTRL */
+
+-static inline int pinctrl_request_gpio(unsigned gpio)
++static inline int pinctrl_gpio_request(unsigned gpio)
+ {
+ return 0;
+ }
+
+-static inline void pinctrl_free_gpio(unsigned gpio)
++static inline void pinctrl_gpio_free(unsigned gpio)
+ {
+ }
+
+--
+2.19.0
+
diff --git a/patches/0084-Input-gpio-keys-convert-timers-to-use-timer_setup.patch b/patches/0084-Input-gpio-keys-convert-timers-to-use-timer_setup.patch
new file mode 100644
index 0000000..85d3f93
--- /dev/null
+++ b/patches/0084-Input-gpio-keys-convert-timers-to-use-timer_setup.patch
@@ -0,0 +1,48 @@
+From 6e5a4b3b9d1f814b27f1cab927ffaf2b0a61ea9f Mon Sep 17 00:00:00 2001
+From: stephen lu <lumotuwe@gmail.com>
+Date: Mon, 23 Oct 2017 14:43:53 -0700
+Subject: [PATCH 0084/1795] Input: gpio-keys - convert timers to use
+ timer_setup()
+
+In preparation for unconditionally passing the struct timer_list pointer to
+all timer callbacks, switch to using the new timer_setup() and from_timer()
+to pass the timer pointer explicitly.
+
+Signed-off-by: Stephen Lu <lumotuwe@gmail.com>
+Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
+(cherry picked from commit 82565a120544b2bdfaf602d9f5e7b9ab9a342ae8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/input/keyboard/gpio_keys.c | 7 +++----
+ 1 file changed, 3 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/input/keyboard/gpio_keys.c b/drivers/input/keyboard/gpio_keys.c
+index e9f0ebf3267a..87e613dc33b8 100644
+--- a/drivers/input/keyboard/gpio_keys.c
++++ b/drivers/input/keyboard/gpio_keys.c
+@@ -419,9 +419,9 @@ static irqreturn_t gpio_keys_gpio_isr(int irq, void *dev_id)
+ return IRQ_HANDLED;
+ }
+
+-static void gpio_keys_irq_timer(unsigned long _data)
++static void gpio_keys_irq_timer(struct timer_list *t)
+ {
+- struct gpio_button_data *bdata = (struct gpio_button_data *)_data;
++ struct gpio_button_data *bdata = from_timer(bdata, t, release_timer);
+ struct input_dev *input = bdata->input;
+ unsigned long flags;
+
+@@ -582,8 +582,7 @@ static int gpio_keys_setup_key(struct platform_device *pdev,
+ }
+
+ bdata->release_delay = button->debounce_interval;
+- setup_timer(&bdata->release_timer,
+- gpio_keys_irq_timer, (unsigned long)bdata);
++ timer_setup(&bdata->release_timer, gpio_keys_irq_timer, 0);
+
+ isr = gpio_keys_irq_isr;
+ irqflags = 0;
+--
+2.19.0
+
diff --git a/patches/0085-gpio-rcar-Use-of_device_get_match_data-helper.patch b/patches/0085-gpio-rcar-Use-of_device_get_match_data-helper.patch
new file mode 100644
index 0000000..0c42080
--- /dev/null
+++ b/patches/0085-gpio-rcar-Use-of_device_get_match_data-helper.patch
@@ -0,0 +1,52 @@
+From 3460162ad1de35498cdca4bc7b8a1109eb77afdb Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 4 Oct 2017 14:16:16 +0200
+Subject: [PATCH 0085/1795] gpio: rcar: Use of_device_get_match_data() helper
+
+Use the of_device_get_match_data() helper instead of open coding.
+Note that the gpio-rcar driver is used with DT only, so there's always a
+valid match.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit f9f2a6fe1399d1fab38b6c1d0639928a52b67a79)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpio/gpio-rcar.c | 8 ++------
+ 1 file changed, 2 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
+index 43b51045aa47..3d0a2a7dd631 100644
+--- a/drivers/gpio/gpio-rcar.c
++++ b/drivers/gpio/gpio-rcar.c
+@@ -24,6 +24,7 @@
+ #include <linux/irq.h>
+ #include <linux/module.h>
+ #include <linux/of.h>
++#include <linux/of_device.h>
+ #include <linux/pinctrl/consumer.h>
+ #include <linux/platform_device.h>
+ #include <linux/pm_runtime.h>
+@@ -393,16 +394,11 @@ MODULE_DEVICE_TABLE(of, gpio_rcar_of_table);
+ static int gpio_rcar_parse_dt(struct gpio_rcar_priv *p, unsigned int *npins)
+ {
+ struct device_node *np = p->pdev->dev.of_node;
+- const struct of_device_id *match;
+ const struct gpio_rcar_info *info;
+ struct of_phandle_args args;
+ int ret;
+
+- match = of_match_node(gpio_rcar_of_table, np);
+- if (!match)
+- return -EINVAL;
+-
+- info = match->data;
++ info = of_device_get_match_data(&p->pdev->dev);
+
+ ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0, &args);
+ *npins = ret == 0 ? args.args[2] : RCAR_MAX_GPIO_PER_BANK;
+--
+2.19.0
+
diff --git a/patches/0086-gpio-rcar-document-R8A77970-bindings.patch b/patches/0086-gpio-rcar-document-R8A77970-bindings.patch
new file mode 100644
index 0000000..9b08cba
--- /dev/null
+++ b/patches/0086-gpio-rcar-document-R8A77970-bindings.patch
@@ -0,0 +1,32 @@
+From 373fc5dbe6c7de59d38c12b3553ba4c1534fb8f6 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Wed, 11 Oct 2017 22:51:59 +0300
+Subject: [PATCH 0086/1795] gpio-rcar: document R8A77970 bindings
+
+Renesas R-Car V3M (R8A77970) SoC also has the R-Car gen3 compatible GPIO
+controllers, so document the SoC specific bindings.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit f76a2d9d7f9524c54dfd9c7b49ed26e488c4cf6c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
+index 51c86f69995e..41137a1cc099 100644
+--- a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
++++ b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
+@@ -14,6 +14,7 @@ Required Properties:
+ - "renesas,gpio-r8a7794": for R8A7794 (R-Car E2) compatible GPIO controller.
+ - "renesas,gpio-r8a7795": for R8A7795 (R-Car H3) compatible GPIO controller.
+ - "renesas,gpio-r8a7796": for R8A7796 (R-Car M3-W) compatible GPIO controller.
++ - "renesas,gpio-r8a77970": for R8A77970 (R-Car V3M) compatible GPIO controller.
+ - "renesas,rcar-gen1-gpio": for a generic R-Car Gen1 GPIO controller.
+ - "renesas,rcar-gen2-gpio": for a generic R-Car Gen2 or RZ/G1 GPIO controller.
+ - "renesas,rcar-gen3-gpio": for a generic R-Car Gen3 GPIO controller.
+--
+2.19.0
+
diff --git a/patches/0087-gpio-rcar-use-devm_ioremap_resource.patch b/patches/0087-gpio-rcar-use-devm_ioremap_resource.patch
new file mode 100644
index 0000000..a615f15
--- /dev/null
+++ b/patches/0087-gpio-rcar-use-devm_ioremap_resource.patch
@@ -0,0 +1,57 @@
+From c736bdac71f78a4de06b667febbe7bb51efbd027 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 13 Oct 2017 00:08:14 +0300
+Subject: [PATCH 0087/1795] gpio-rcar: use devm_ioremap_resource()
+
+Using devm_ioremap_resource() has several advantages over devm_ioremap():
+- it checks the passed resource's validity;
+- it calls devm_request_mem_region() to check for the resource overlap;
+- it prints an error message in case of error.
+
+We can call devm_ioremap_resource() instead of devm_ioremap_nocache()
+as ioremap() and ioremap_nocache() are implemented identically on ARM.
+Doing this saves 2 LoCs and 80 bytes (AArch64 gcc 4.8.5).
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit 5a24d4b601561da08a70c065d4630bd9fadb37e8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpio/gpio-rcar.c | 14 ++++++--------
+ 1 file changed, 6 insertions(+), 8 deletions(-)
+
+diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
+index 3d0a2a7dd631..2cf5f458928b 100644
+--- a/drivers/gpio/gpio-rcar.c
++++ b/drivers/gpio/gpio-rcar.c
+@@ -452,19 +452,17 @@ static int gpio_rcar_probe(struct platform_device *pdev)
+
+ pm_runtime_enable(dev);
+
+- io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+-
+- if (!io || !irq) {
+- dev_err(dev, "missing IRQ or IOMEM\n");
++ if (!irq) {
++ dev_err(dev, "missing IRQ\n");
+ ret = -EINVAL;
+ goto err0;
+ }
+
+- p->base = devm_ioremap_nocache(dev, io->start, resource_size(io));
+- if (!p->base) {
+- dev_err(dev, "failed to remap I/O memory\n");
+- ret = -ENXIO;
++ io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ p->base = devm_ioremap_resource(dev, io);
++ if (IS_ERR(p->base)) {
++ ret = PTR_ERR(p->base);
+ goto err0;
+ }
+
+--
+2.19.0
+
diff --git a/patches/0088-gpio-rcar-Add-r8a77995-R-Car-D3-support.patch b/patches/0088-gpio-rcar-Add-r8a77995-R-Car-D3-support.patch
new file mode 100644
index 0000000..f7078ca
--- /dev/null
+++ b/patches/0088-gpio-rcar-Add-r8a77995-R-Car-D3-support.patch
@@ -0,0 +1,36 @@
+From d4aa420547e39a34eb1b257a2b4e40e6a625ab73 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 9 Nov 2017 11:39:20 +0100
+Subject: [PATCH 0088/1795] gpio: rcar: Add r8a77995 (R-Car D3) support
+
+This patch adds binding for r8a77995 (R-Car D3). This SoC can use
+"renesas,rcar-gen3-gpio" fallback compatibility. So, this patch
+doesn't modify the gpio-rcar driver.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Acked-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit 924d4db29f1237f9fe90a7439d2ee81837d282bd)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
+index 41137a1cc099..a7ac460ad657 100644
+--- a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
++++ b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
+@@ -15,6 +15,7 @@ Required Properties:
+ - "renesas,gpio-r8a7795": for R8A7795 (R-Car H3) compatible GPIO controller.
+ - "renesas,gpio-r8a7796": for R8A7796 (R-Car M3-W) compatible GPIO controller.
+ - "renesas,gpio-r8a77970": for R8A77970 (R-Car V3M) compatible GPIO controller.
++ - "renesas,gpio-r8a77995": for R8A77995 (R-Car D3) compatible GPIO controller.
+ - "renesas,rcar-gen1-gpio": for a generic R-Car Gen1 GPIO controller.
+ - "renesas,rcar-gen2-gpio": for a generic R-Car Gen2 or RZ/G1 GPIO controller.
+ - "renesas,rcar-gen3-gpio": for a generic R-Car Gen3 GPIO controller.
+--
+2.19.0
+
diff --git a/patches/0089-i2c-rcar-document-R8A77970-bindings.patch b/patches/0089-i2c-rcar-document-R8A77970-bindings.patch
new file mode 100644
index 0000000..b298efe
--- /dev/null
+++ b/patches/0089-i2c-rcar-document-R8A77970-bindings.patch
@@ -0,0 +1,34 @@
+From 325ddbfee76fc57d47acccce210370d67b622b43 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 13 Oct 2017 15:23:55 +0300
+Subject: [PATCH 0089/1795] i2c: rcar: document R8A77970 bindings
+
+R-Car V3M (R8A77970) SoC also has the R-Car gen3 compatible I2C controller,
+so document the SoC specific bindings.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit db6b78073ac135bb68cae77bb873371d0fe0efa6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/i2c/i2c-rcar.txt | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/Documentation/devicetree/bindings/i2c/i2c-rcar.txt b/Documentation/devicetree/bindings/i2c/i2c-rcar.txt
+index cad39aee9f73..a777477e4547 100644
+--- a/Documentation/devicetree/bindings/i2c/i2c-rcar.txt
++++ b/Documentation/devicetree/bindings/i2c/i2c-rcar.txt
+@@ -13,6 +13,7 @@ Required properties:
+ "renesas,i2c-r8a7794" if the device is a part of a R8A7794 SoC.
+ "renesas,i2c-r8a7795" if the device is a part of a R8A7795 SoC.
+ "renesas,i2c-r8a7796" if the device is a part of a R8A7796 SoC.
++ "renesas,i2c-r8a77970" if the device is a part of a R8A77970 SoC.
+ "renesas,rcar-gen1-i2c" for a generic R-Car Gen1 compatible device.
+ "renesas,rcar-gen2-i2c" for a generic R-Car Gen2 or RZ/G1 compatible
+ device.
+--
+2.19.0
+
diff --git a/patches/0090-i2c-riic-remove-clock-and-frequency-restrictions.patch b/patches/0090-i2c-riic-remove-clock-and-frequency-restrictions.patch
new file mode 100644
index 0000000..a798a13
--- /dev/null
+++ b/patches/0090-i2c-riic-remove-clock-and-frequency-restrictions.patch
@@ -0,0 +1,196 @@
+From 15da4a93a1cfb4a61cae50dcc0750c62e71a439d Mon Sep 17 00:00:00 2001
+From: Chris Brandt <chris.brandt@renesas.com>
+Date: Fri, 27 Oct 2017 10:37:56 -0500
+Subject: [PATCH 0090/1795] i2c: riic: remove clock and frequency restrictions
+
+Remove the restriction that the parent clock has to be a specific frequency
+and also allow any speed to be supported.
+
+Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit d982d66514192cdbe74eababa63d0a69be4b0ce1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/i2c/busses/i2c-riic.c | 115 ++++++++++++++++++++++++----------
+ 1 file changed, 81 insertions(+), 34 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c
+index c811af4c8d81..95c2f1ce3cad 100644
+--- a/drivers/i2c/busses/i2c-riic.c
++++ b/drivers/i2c/busses/i2c-riic.c
+@@ -84,12 +84,7 @@
+
+ #define ICSR2_NACKF 0x10
+
+-/* ICBRx (@ PCLK 33MHz) */
+ #define ICBR_RESERVED 0xe0 /* Should be 1 on writes */
+-#define ICBRL_SP100K (19 | ICBR_RESERVED)
+-#define ICBRH_SP100K (16 | ICBR_RESERVED)
+-#define ICBRL_SP400K (21 | ICBR_RESERVED)
+-#define ICBRH_SP400K (9 | ICBR_RESERVED)
+
+ #define RIIC_INIT_MSG -1
+
+@@ -288,48 +283,99 @@ static const struct i2c_algorithm riic_algo = {
+ .functionality = riic_func,
+ };
+
+-static int riic_init_hw(struct riic_dev *riic, u32 spd)
++static int riic_init_hw(struct riic_dev *riic, struct i2c_timings *t)
+ {
+ int ret;
+ unsigned long rate;
++ int total_ticks, cks, brl, brh;
+
+ ret = clk_prepare_enable(riic->clk);
+ if (ret)
+ return ret;
+
++ if (t->bus_freq_hz > 400000) {
++ dev_err(&riic->adapter.dev,
++ "unsupported bus speed (%dHz). 400000 max\n",
++ t->bus_freq_hz);
++ clk_disable_unprepare(riic->clk);
++ return -EINVAL;
++ }
++
++ rate = clk_get_rate(riic->clk);
++
+ /*
+- * TODO: Implement formula to calculate the timing values depending on
+- * variable parent clock rate and arbitrary bus speed
++ * Assume the default register settings:
++ * FER.SCLE = 1 (SCL sync circuit enabled, adds 2 or 3 cycles)
++ * FER.NFE = 1 (noise circuit enabled)
++ * MR3.NF = 0 (1 cycle of noise filtered out)
++ *
++ * Freq (CKS=000) = (I2CCLK + tr + tf)/ (BRH + 3 + 1) + (BRL + 3 + 1)
++ * Freq (CKS!=000) = (I2CCLK + tr + tf)/ (BRH + 2 + 1) + (BRL + 2 + 1)
+ */
+- rate = clk_get_rate(riic->clk);
+- if (rate != 33325000) {
+- dev_err(&riic->adapter.dev,
+- "invalid parent clk (%lu). Must be 33325000Hz\n", rate);
++
++ /*
++ * Determine reference clock rate. We must be able to get the desired
++ * frequency with only 62 clock ticks max (31 high, 31 low).
++ * Aim for a duty of 60% LOW, 40% HIGH.
++ */
++ total_ticks = DIV_ROUND_UP(rate, t->bus_freq_hz);
++
++ for (cks = 0; cks < 7; cks++) {
++ /*
++ * 60% low time must be less than BRL + 2 + 1
++ * BRL max register value is 0x1F.
++ */
++ brl = ((total_ticks * 6) / 10);
++ if (brl <= (0x1F + 3))
++ break;
++
++ total_ticks /= 2;
++ rate /= 2;
++ }
++
++ if (brl > (0x1F + 3)) {
++ dev_err(&riic->adapter.dev, "invalid speed (%lu). Too slow.\n",
++ (unsigned long)t->bus_freq_hz);
+ clk_disable_unprepare(riic->clk);
+ return -EINVAL;
+ }
+
++ brh = total_ticks - brl;
++
++ /* Remove automatic clock ticks for sync circuit and NF */
++ if (cks == 0) {
++ brl -= 4;
++ brh -= 4;
++ } else {
++ brl -= 3;
++ brh -= 3;
++ }
++
++ /*
++ * Remove clock ticks for rise and fall times. Convert ns to clock
++ * ticks.
++ */
++ brl -= t->scl_fall_ns / (1000000000 / rate);
++ brh -= t->scl_rise_ns / (1000000000 / rate);
++
++ /* Adjust for min register values for when SCLE=1 and NFE=1 */
++ if (brl < 1)
++ brl = 1;
++ if (brh < 1)
++ brh = 1;
++
++ pr_debug("i2c-riic: freq=%lu, duty=%d, fall=%lu, rise=%lu, cks=%d, brl=%d, brh=%d\n",
++ rate / total_ticks, ((brl + 3) * 100) / (brl + brh + 6),
++ t->scl_fall_ns / (1000000000 / rate),
++ t->scl_rise_ns / (1000000000 / rate), cks, brl, brh);
++
+ /* Changing the order of accessing IICRST and ICE may break things! */
+ writeb(ICCR1_IICRST | ICCR1_SOWP, riic->base + RIIC_ICCR1);
+ riic_clear_set_bit(riic, 0, ICCR1_ICE, RIIC_ICCR1);
+
+- switch (spd) {
+- case 100000:
+- writeb(ICMR1_CKS(3), riic->base + RIIC_ICMR1);
+- writeb(ICBRH_SP100K, riic->base + RIIC_ICBRH);
+- writeb(ICBRL_SP100K, riic->base + RIIC_ICBRL);
+- break;
+- case 400000:
+- writeb(ICMR1_CKS(1), riic->base + RIIC_ICMR1);
+- writeb(ICBRH_SP400K, riic->base + RIIC_ICBRH);
+- writeb(ICBRL_SP400K, riic->base + RIIC_ICBRL);
+- break;
+- default:
+- dev_err(&riic->adapter.dev,
+- "unsupported bus speed (%dHz). Use 100000 or 400000\n", spd);
+- clk_disable_unprepare(riic->clk);
+- return -EINVAL;
+- }
++ writeb(ICMR1_CKS(cks), riic->base + RIIC_ICMR1);
++ writeb(brh | ICBR_RESERVED, riic->base + RIIC_ICBRH);
++ writeb(brl | ICBR_RESERVED, riic->base + RIIC_ICBRL);
+
+ writeb(0, riic->base + RIIC_ICSER);
+ writeb(ICMR3_ACKWP | ICMR3_RDRFS, riic->base + RIIC_ICMR3);
+@@ -351,11 +397,10 @@ static struct riic_irq_desc riic_irqs[] = {
+
+ static int riic_i2c_probe(struct platform_device *pdev)
+ {
+- struct device_node *np = pdev->dev.of_node;
+ struct riic_dev *riic;
+ struct i2c_adapter *adap;
+ struct resource *res;
+- u32 bus_rate = 0;
++ struct i2c_timings i2c_t;
+ int i, ret;
+
+ riic = devm_kzalloc(&pdev->dev, sizeof(*riic), GFP_KERNEL);
+@@ -396,8 +441,9 @@ static int riic_i2c_probe(struct platform_device *pdev)
+
+ init_completion(&riic->msg_done);
+
+- of_property_read_u32(np, "clock-frequency", &bus_rate);
+- ret = riic_init_hw(riic, bus_rate);
++ i2c_parse_fw_timings(&pdev->dev, &i2c_t, true);
++
++ ret = riic_init_hw(riic, &i2c_t);
+ if (ret)
+ return ret;
+
+@@ -408,7 +454,8 @@ static int riic_i2c_probe(struct platform_device *pdev)
+
+ platform_set_drvdata(pdev, riic);
+
+- dev_info(&pdev->dev, "registered with %dHz bus speed\n", bus_rate);
++ dev_info(&pdev->dev, "registered with %dHz bus speed\n",
++ i2c_t.bus_freq_hz);
+ return 0;
+ }
+
+--
+2.19.0
+
diff --git a/patches/0091-i2c-sh_mobile-Use-of_device_get_match_data-helper.patch b/patches/0091-i2c-sh_mobile-Use-of_device_get_match_data-helper.patch
new file mode 100644
index 0000000..b9dfb25
--- /dev/null
+++ b/patches/0091-i2c-sh_mobile-Use-of_device_get_match_data-helper.patch
@@ -0,0 +1,47 @@
+From 57dce3e1f66ecd5c5429ea0746cfa7d369a3041b Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 4 Oct 2017 14:17:05 +0200
+Subject: [PATCH 0091/1795] i2c: sh_mobile: Use of_device_get_match_data()
+ helper
+
+Use the of_device_get_match_data() helper instead of open coding.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit ad59c5ea7fa88284b68721c08faf15f0e77abc0d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/i2c/busses/i2c-sh_mobile.c | 8 +++-----
+ 1 file changed, 3 insertions(+), 5 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
+index 6f2aaeb7c4fa..c03acdf71397 100644
+--- a/drivers/i2c/busses/i2c-sh_mobile.c
++++ b/drivers/i2c/busses/i2c-sh_mobile.c
+@@ -881,7 +881,7 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
+ struct sh_mobile_i2c_data *pd;
+ struct i2c_adapter *adap;
+ struct resource *res;
+- const struct of_device_id *match;
++ const struct sh_mobile_dt_config *config;
+ int ret;
+ u32 bus_speed;
+
+@@ -913,10 +913,8 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
+ pd->bus_speed = ret ? STANDARD_MODE : bus_speed;
+ pd->clks_per_count = 1;
+
+- match = of_match_device(sh_mobile_i2c_dt_ids, &dev->dev);
+- if (match) {
+- const struct sh_mobile_dt_config *config = match->data;
+-
++ config = of_device_get_match_data(&dev->dev);
++ if (config) {
+ pd->clks_per_count = config->clks_per_count;
+
+ if (config->setup)
+--
+2.19.0
+
diff --git a/patches/0092-iommu-io-pgtable-arm-Convert-to-IOMMU-API-TLB-sync.patch b/patches/0092-iommu-io-pgtable-arm-Convert-to-IOMMU-API-TLB-sync.patch
new file mode 100644
index 0000000..eb948c1
--- /dev/null
+++ b/patches/0092-iommu-io-pgtable-arm-Convert-to-IOMMU-API-TLB-sync.patch
@@ -0,0 +1,182 @@
+From 3f621158aee6b5f054f52a56d58a6824e9fb8723 Mon Sep 17 00:00:00 2001
+From: Robin Murphy <robin.murphy@arm.com>
+Date: Thu, 28 Sep 2017 15:55:01 +0100
+Subject: [PATCH 0092/1795] iommu/io-pgtable-arm: Convert to IOMMU API TLB sync
+
+Now that the core API issues its own post-unmap TLB sync call, push that
+operation out from the io-pgtable-arm internals into the users. For now,
+we leave the invalidation implicit in the unmap operation, since none of
+the current users would benefit much from any change to that.
+
+CC: Magnus Damm <damm+renesas@opensource.se>
+CC: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Robin Murphy <robin.murphy@arm.com>
+Signed-off-by: Joerg Roedel <jroedel@suse.de>
+(cherry picked from commit 32b124492bdf974f68eaef1bde80dc8058aef002)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/arm-smmu-v3.c | 10 ++++++++++
+ drivers/iommu/arm-smmu.c | 20 +++++++++++++++-----
+ drivers/iommu/io-pgtable-arm.c | 7 +------
+ drivers/iommu/ipmmu-vmsa.c | 10 ++++++++++
+ 4 files changed, 36 insertions(+), 11 deletions(-)
+
+diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
+index 8f7a3c00b6cf..193f8c860010 100644
+--- a/drivers/iommu/arm-smmu-v3.c
++++ b/drivers/iommu/arm-smmu-v3.c
+@@ -1752,6 +1752,14 @@ arm_smmu_unmap(struct iommu_domain *domain, unsigned long iova, size_t size)
+ return ops->unmap(ops, iova, size);
+ }
+
++static void arm_smmu_iotlb_sync(struct iommu_domain *domain)
++{
++ struct arm_smmu_device *smmu = to_smmu_domain(domain)->smmu;
++
++ if (smmu)
++ __arm_smmu_tlb_sync(smmu);
++}
++
+ static phys_addr_t
+ arm_smmu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova)
+ {
+@@ -1972,6 +1980,8 @@ static struct iommu_ops arm_smmu_ops = {
+ .map = arm_smmu_map,
+ .unmap = arm_smmu_unmap,
+ .map_sg = default_iommu_map_sg,
++ .flush_iotlb_all = arm_smmu_iotlb_sync,
++ .iotlb_sync = arm_smmu_iotlb_sync,
+ .iova_to_phys = arm_smmu_iova_to_phys,
+ .add_device = arm_smmu_add_device,
+ .remove_device = arm_smmu_remove_device,
+diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
+index 2c436376f13e..335bcc18b97a 100644
+--- a/drivers/iommu/arm-smmu.c
++++ b/drivers/iommu/arm-smmu.c
+@@ -250,6 +250,7 @@ enum arm_smmu_domain_stage {
+ struct arm_smmu_domain {
+ struct arm_smmu_device *smmu;
+ struct io_pgtable_ops *pgtbl_ops;
++ const struct iommu_gather_ops *tlb_ops;
+ struct arm_smmu_cfg cfg;
+ enum arm_smmu_domain_stage stage;
+ struct mutex init_mutex; /* Protects smmu pointer */
+@@ -735,7 +736,6 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain,
+ enum io_pgtable_fmt fmt;
+ struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
+ struct arm_smmu_cfg *cfg = &smmu_domain->cfg;
+- const struct iommu_gather_ops *tlb_ops;
+
+ mutex_lock(&smmu_domain->init_mutex);
+ if (smmu_domain->smmu)
+@@ -813,7 +813,7 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain,
+ ias = min(ias, 32UL);
+ oas = min(oas, 32UL);
+ }
+- tlb_ops = &arm_smmu_s1_tlb_ops;
++ smmu_domain->tlb_ops = &arm_smmu_s1_tlb_ops;
+ break;
+ case ARM_SMMU_DOMAIN_NESTED:
+ /*
+@@ -833,9 +833,9 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain,
+ oas = min(oas, 40UL);
+ }
+ if (smmu->version == ARM_SMMU_V2)
+- tlb_ops = &arm_smmu_s2_tlb_ops_v2;
++ smmu_domain->tlb_ops = &arm_smmu_s2_tlb_ops_v2;
+ else
+- tlb_ops = &arm_smmu_s2_tlb_ops_v1;
++ smmu_domain->tlb_ops = &arm_smmu_s2_tlb_ops_v1;
+ break;
+ default:
+ ret = -EINVAL;
+@@ -863,7 +863,7 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain,
+ .pgsize_bitmap = smmu->pgsize_bitmap,
+ .ias = ias,
+ .oas = oas,
+- .tlb = tlb_ops,
++ .tlb = smmu_domain->tlb_ops,
+ .iommu_dev = smmu->dev,
+ };
+
+@@ -1259,6 +1259,14 @@ static size_t arm_smmu_unmap(struct iommu_domain *domain, unsigned long iova,
+ return ops->unmap(ops, iova, size);
+ }
+
++static void arm_smmu_iotlb_sync(struct iommu_domain *domain)
++{
++ struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
++
++ if (smmu_domain->tlb_ops)
++ smmu_domain->tlb_ops->tlb_sync(smmu_domain);
++}
++
+ static phys_addr_t arm_smmu_iova_to_phys_hard(struct iommu_domain *domain,
+ dma_addr_t iova)
+ {
+@@ -1562,6 +1570,8 @@ static struct iommu_ops arm_smmu_ops = {
+ .map = arm_smmu_map,
+ .unmap = arm_smmu_unmap,
+ .map_sg = default_iommu_map_sg,
++ .flush_iotlb_all = arm_smmu_iotlb_sync,
++ .iotlb_sync = arm_smmu_iotlb_sync,
+ .iova_to_phys = arm_smmu_iova_to_phys,
+ .add_device = arm_smmu_add_device,
+ .remove_device = arm_smmu_remove_device,
+diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c
+index e8018a308868..51e5c43caed1 100644
+--- a/drivers/iommu/io-pgtable-arm.c
++++ b/drivers/iommu/io-pgtable-arm.c
+@@ -609,7 +609,6 @@ static int __arm_lpae_unmap(struct arm_lpae_io_pgtable *data,
+ static int arm_lpae_unmap(struct io_pgtable_ops *ops, unsigned long iova,
+ size_t size)
+ {
+- size_t unmapped;
+ struct arm_lpae_io_pgtable *data = io_pgtable_ops_to_data(ops);
+ arm_lpae_iopte *ptep = data->pgd;
+ int lvl = ARM_LPAE_START_LVL(data);
+@@ -617,11 +616,7 @@ static int arm_lpae_unmap(struct io_pgtable_ops *ops, unsigned long iova,
+ if (WARN_ON(iova >= (1ULL << data->iop.cfg.ias)))
+ return 0;
+
+- unmapped = __arm_lpae_unmap(data, iova, size, lvl, ptep);
+- if (unmapped)
+- io_pgtable_tlb_sync(&data->iop);
+-
+- return unmapped;
++ return __arm_lpae_unmap(data, iova, size, lvl, ptep);
+ }
+
+ static phys_addr_t arm_lpae_iova_to_phys(struct io_pgtable_ops *ops,
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index 195d6e93ac71..af8140054273 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -619,6 +619,14 @@ static size_t ipmmu_unmap(struct iommu_domain *io_domain, unsigned long iova,
+ return domain->iop->unmap(domain->iop, iova, size);
+ }
+
++static void ipmmu_iotlb_sync(struct iommu_domain *io_domain)
++{
++ struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);
++
++ if (domain->mmu)
++ ipmmu_tlb_flush_all(domain);
++}
++
+ static phys_addr_t ipmmu_iova_to_phys(struct iommu_domain *io_domain,
+ dma_addr_t iova)
+ {
+@@ -876,6 +884,8 @@ static const struct iommu_ops ipmmu_ops = {
+ .detach_dev = ipmmu_detach_device,
+ .map = ipmmu_map,
+ .unmap = ipmmu_unmap,
++ .flush_iotlb_all = ipmmu_iotlb_sync,
++ .iotlb_sync = ipmmu_iotlb_sync,
+ .map_sg = default_iommu_map_sg,
+ .iova_to_phys = ipmmu_iova_to_phys,
+ .add_device = ipmmu_add_device_dma,
+--
+2.19.0
+
diff --git a/patches/0093-dt-bindings-iommu-ipmmu-vmsa-Use-generic-node-name.patch b/patches/0093-dt-bindings-iommu-ipmmu-vmsa-Use-generic-node-name.patch
new file mode 100644
index 0000000..22680c8
--- /dev/null
+++ b/patches/0093-dt-bindings-iommu-ipmmu-vmsa-Use-generic-node-name.patch
@@ -0,0 +1,34 @@
+From 7bfb70fd780532b9f9cf256db6d8f01dfb106e2f Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 4 Oct 2017 14:33:08 +0200
+Subject: [PATCH 0093/1795] dt-bindings: iommu: ipmmu-vmsa: Use generic node
+ name
+
+Use the preferred generic node name in the example.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Rob Herring <robh@kernel.org>
+(cherry picked from commit d67ac3ae3a3ce464b4fec854c4c85407a99e8e2c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt b/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt
+index 3ed027cfca95..857df929a654 100644
+--- a/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt
++++ b/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt
+@@ -53,7 +53,7 @@ Example: R8A7791 IPMMU-MX and VSP1-D0 bus master
+ #iommu-cells = <1>;
+ };
+
+- vsp1@fe928000 {
++ vsp@fe928000 {
+ ...
+ iommus = <&ipmmu_mx 13>;
+ ...
+--
+2.19.0
+
diff --git a/patches/0094-iommu-ipmmu-vmsa-Fix-return-value-check-in-ipmmu_fin.patch b/patches/0094-iommu-ipmmu-vmsa-Fix-return-value-check-in-ipmmu_fin.patch
new file mode 100644
index 0000000..d480ccb
--- /dev/null
+++ b/patches/0094-iommu-ipmmu-vmsa-Fix-return-value-check-in-ipmmu_fin.patch
@@ -0,0 +1,36 @@
+From 3c12fd8faabdd37bb5ce9f1b475f86b88e37d268 Mon Sep 17 00:00:00 2001
+From: "weiyongjun (A)" <weiyongjun1@huawei.com>
+Date: Tue, 17 Oct 2017 12:11:22 +0000
+Subject: [PATCH 0094/1795] iommu/ipmmu-vmsa: Fix return value check in
+ ipmmu_find_group_dma()
+
+In case of error, the function iommu_group_get() returns NULL pointer
+not ERR_PTR(). The IS_ERR() test in the return value check should be
+replaced with NULL test.
+
+Fixes: 3ae47292024f ("iommu/ipmmu-vmsa: Add new IOMMU_DOMAIN_DMA ops")
+Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit 105a004e2187609a74f75d55fd0f9a054b49d60a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index af8140054273..00e88a88ee3a 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -871,7 +871,7 @@ static struct iommu_group *ipmmu_find_group_dma(struct device *dev)
+ sibling = ipmmu_find_sibling_device(dev);
+ if (sibling)
+ group = iommu_group_get(sibling);
+- if (!sibling || IS_ERR(group))
++ if (!sibling || !group)
+ group = generic_device_group(dev);
+
+ return group;
+--
+2.19.0
+
diff --git a/patches/0095-iommu-ipmmu-vmsa-Unify-domain-alloc-free.patch b/patches/0095-iommu-ipmmu-vmsa-Unify-domain-alloc-free.patch
new file mode 100644
index 0000000..4223713
--- /dev/null
+++ b/patches/0095-iommu-ipmmu-vmsa-Unify-domain-alloc-free.patch
@@ -0,0 +1,131 @@
+From d8005d5db3a8438883a970ac10b651cd269147b7 Mon Sep 17 00:00:00 2001
+From: Robin Murphy <robin.murphy@arm.com>
+Date: Fri, 13 Oct 2017 19:23:39 +0100
+Subject: [PATCH 0095/1795] iommu/ipmmu-vmsa: Unify domain alloc/free
+
+We have two implementations for ipmmu_ops->alloc depending on
+CONFIG_IOMMU_DMA, the difference being whether they accept the
+IOMMU_DOMAIN_DMA type or not. However, iommu_dma_get_cookie() is
+guaranteed to return an error when !CONFIG_IOMMU_DMA, so if
+ipmmu_domain_alloc_dma() was actually checking and handling the return
+value correctly, it would behave the same as ipmmu_domain_alloc()
+anyway.
+
+Similarly for freeing; iommu_put_dma_cookie() is robust by design.
+
+Signed-off-by: Robin Murphy <robin.murphy@arm.com>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit 1c7e7c0278df968221a5edb1a293423e13b13814)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 65 ++++++++++++++------------------------
+ 1 file changed, 24 insertions(+), 41 deletions(-)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index 00e88a88ee3a..37154075c00a 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -528,6 +528,27 @@ static struct iommu_domain *__ipmmu_domain_alloc(unsigned type)
+ return &domain->io_domain;
+ }
+
++static struct iommu_domain *ipmmu_domain_alloc(unsigned type)
++{
++ struct iommu_domain *io_domain = NULL;
++
++ switch (type) {
++ case IOMMU_DOMAIN_UNMANAGED:
++ io_domain = __ipmmu_domain_alloc(type);
++ break;
++
++ case IOMMU_DOMAIN_DMA:
++ io_domain = __ipmmu_domain_alloc(type);
++ if (io_domain && iommu_get_dma_cookie(io_domain)) {
++ kfree(io_domain);
++ io_domain = NULL;
++ }
++ break;
++ }
++
++ return io_domain;
++}
++
+ static void ipmmu_domain_free(struct iommu_domain *io_domain)
+ {
+ struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);
+@@ -536,6 +557,7 @@ static void ipmmu_domain_free(struct iommu_domain *io_domain)
+ * Free the domain resources. We assume that all devices have already
+ * been detached.
+ */
++ iommu_put_dma_cookie(io_domain);
+ ipmmu_domain_destroy_context(domain);
+ free_io_pgtable_ops(domain->iop);
+ kfree(domain);
+@@ -671,14 +693,6 @@ static int ipmmu_of_xlate(struct device *dev,
+
+ #if defined(CONFIG_ARM) && !defined(CONFIG_IOMMU_DMA)
+
+-static struct iommu_domain *ipmmu_domain_alloc(unsigned type)
+-{
+- if (type != IOMMU_DOMAIN_UNMANAGED)
+- return NULL;
+-
+- return __ipmmu_domain_alloc(type);
+-}
+-
+ static int ipmmu_add_device(struct device *dev)
+ {
+ struct ipmmu_vmsa_device *mmu = NULL;
+@@ -779,37 +793,6 @@ static const struct iommu_ops ipmmu_ops = {
+ static DEFINE_SPINLOCK(ipmmu_slave_devices_lock);
+ static LIST_HEAD(ipmmu_slave_devices);
+
+-static struct iommu_domain *ipmmu_domain_alloc_dma(unsigned type)
+-{
+- struct iommu_domain *io_domain = NULL;
+-
+- switch (type) {
+- case IOMMU_DOMAIN_UNMANAGED:
+- io_domain = __ipmmu_domain_alloc(type);
+- break;
+-
+- case IOMMU_DOMAIN_DMA:
+- io_domain = __ipmmu_domain_alloc(type);
+- if (io_domain)
+- iommu_get_dma_cookie(io_domain);
+- break;
+- }
+-
+- return io_domain;
+-}
+-
+-static void ipmmu_domain_free_dma(struct iommu_domain *io_domain)
+-{
+- switch (io_domain->type) {
+- case IOMMU_DOMAIN_DMA:
+- iommu_put_dma_cookie(io_domain);
+- /* fall-through */
+- default:
+- ipmmu_domain_free(io_domain);
+- break;
+- }
+-}
+-
+ static int ipmmu_add_device_dma(struct device *dev)
+ {
+ struct iommu_group *group;
+@@ -878,8 +861,8 @@ static struct iommu_group *ipmmu_find_group_dma(struct device *dev)
+ }
+
+ static const struct iommu_ops ipmmu_ops = {
+- .domain_alloc = ipmmu_domain_alloc_dma,
+- .domain_free = ipmmu_domain_free_dma,
++ .domain_alloc = ipmmu_domain_alloc,
++ .domain_free = ipmmu_domain_free,
+ .attach_dev = ipmmu_attach_device,
+ .detach_dev = ipmmu_detach_device,
+ .map = ipmmu_map,
+--
+2.19.0
+
diff --git a/patches/0096-iommu-ipmmu-vmsa-Simplify-group-allocation.patch b/patches/0096-iommu-ipmmu-vmsa-Simplify-group-allocation.patch
new file mode 100644
index 0000000..5ce044f
--- /dev/null
+++ b/patches/0096-iommu-ipmmu-vmsa-Simplify-group-allocation.patch
@@ -0,0 +1,135 @@
+From e6378f334e411675a80aaa4cbea7ee5c9309d1a9 Mon Sep 17 00:00:00 2001
+From: Robin Murphy <robin.murphy@arm.com>
+Date: Fri, 13 Oct 2017 19:23:40 +0100
+Subject: [PATCH 0096/1795] iommu/ipmmu-vmsa: Simplify group allocation
+
+We go through quite the merry dance in order to find masters behind the
+same IPMMU instance, so that we can ensure they are grouped together.
+None of which is really necessary, since the master's private data
+already points to the particular IPMMU it is associated with, and that
+IPMMU instance data is the perfect place to keep track of a per-instance
+group directly.
+
+Signed-off-by: Robin Murphy <robin.murphy@arm.com>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit b354c73edc7eb8d6ee643866e9e4de7842213b06)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 53 +++++++-------------------------------
+ 1 file changed, 9 insertions(+), 44 deletions(-)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index 37154075c00a..6e6a86f3c375 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -43,6 +43,7 @@ struct ipmmu_vmsa_device {
+ DECLARE_BITMAP(ctx, IPMMU_CTX_MAX);
+ struct ipmmu_vmsa_domain *domains[IPMMU_CTX_MAX];
+
++ struct iommu_group *group;
+ struct dma_iommu_mapping *mapping;
+ };
+
+@@ -59,8 +60,6 @@ struct ipmmu_vmsa_domain {
+
+ struct ipmmu_vmsa_iommu_priv {
+ struct ipmmu_vmsa_device *mmu;
+- struct device *dev;
+- struct list_head list;
+ };
+
+ static struct ipmmu_vmsa_domain *to_vmsa_domain(struct iommu_domain *dom)
+@@ -674,7 +673,6 @@ static int ipmmu_init_platform_device(struct device *dev,
+ return -ENOMEM;
+
+ priv->mmu = platform_get_drvdata(ipmmu_pdev);
+- priv->dev = dev;
+ dev->iommu_fwspec->iommu_priv = priv;
+ return 0;
+ }
+@@ -790,9 +788,6 @@ static const struct iommu_ops ipmmu_ops = {
+
+ #ifdef CONFIG_IOMMU_DMA
+
+-static DEFINE_SPINLOCK(ipmmu_slave_devices_lock);
+-static LIST_HEAD(ipmmu_slave_devices);
+-
+ static int ipmmu_add_device_dma(struct device *dev)
+ {
+ struct iommu_group *group;
+@@ -807,55 +802,25 @@ static int ipmmu_add_device_dma(struct device *dev)
+ if (IS_ERR(group))
+ return PTR_ERR(group);
+
+- spin_lock(&ipmmu_slave_devices_lock);
+- list_add(&to_priv(dev)->list, &ipmmu_slave_devices);
+- spin_unlock(&ipmmu_slave_devices_lock);
+ return 0;
+ }
+
+ static void ipmmu_remove_device_dma(struct device *dev)
+ {
+- struct ipmmu_vmsa_iommu_priv *priv = to_priv(dev);
+-
+- spin_lock(&ipmmu_slave_devices_lock);
+- list_del(&priv->list);
+- spin_unlock(&ipmmu_slave_devices_lock);
+-
+ iommu_group_remove_device(dev);
+ }
+
+-static struct device *ipmmu_find_sibling_device(struct device *dev)
++static struct iommu_group *ipmmu_find_group(struct device *dev)
+ {
+ struct ipmmu_vmsa_iommu_priv *priv = to_priv(dev);
+- struct ipmmu_vmsa_iommu_priv *sibling_priv = NULL;
+- bool found = false;
+-
+- spin_lock(&ipmmu_slave_devices_lock);
+-
+- list_for_each_entry(sibling_priv, &ipmmu_slave_devices, list) {
+- if (priv == sibling_priv)
+- continue;
+- if (sibling_priv->mmu == priv->mmu) {
+- found = true;
+- break;
+- }
+- }
+-
+- spin_unlock(&ipmmu_slave_devices_lock);
+-
+- return found ? sibling_priv->dev : NULL;
+-}
+-
+-static struct iommu_group *ipmmu_find_group_dma(struct device *dev)
+-{
+ struct iommu_group *group;
+- struct device *sibling;
+
+- sibling = ipmmu_find_sibling_device(dev);
+- if (sibling)
+- group = iommu_group_get(sibling);
+- if (!sibling || !group)
+- group = generic_device_group(dev);
++ if (priv->mmu->group)
++ return iommu_group_ref_get(priv->mmu->group);
++
++ group = iommu_group_alloc();
++ if (!IS_ERR(group))
++ priv->mmu->group = group;
+
+ return group;
+ }
+@@ -873,7 +838,7 @@ static const struct iommu_ops ipmmu_ops = {
+ .iova_to_phys = ipmmu_iova_to_phys,
+ .add_device = ipmmu_add_device_dma,
+ .remove_device = ipmmu_remove_device_dma,
+- .device_group = ipmmu_find_group_dma,
++ .device_group = ipmmu_find_group,
+ .pgsize_bitmap = SZ_1G | SZ_2M | SZ_4K,
+ .of_xlate = ipmmu_of_xlate,
+ };
+--
+2.19.0
+
diff --git a/patches/0097-iommu-ipmmu-vmsa-Clean-up-struct-ipmmu_vmsa_iommu_pr.patch b/patches/0097-iommu-ipmmu-vmsa-Clean-up-struct-ipmmu_vmsa_iommu_pr.patch
new file mode 100644
index 0000000..dbac6fc
--- /dev/null
+++ b/patches/0097-iommu-ipmmu-vmsa-Clean-up-struct-ipmmu_vmsa_iommu_pr.patch
@@ -0,0 +1,145 @@
+From 90d20f74d386ac9881000b6f9d7e2a3088ca41e6 Mon Sep 17 00:00:00 2001
+From: Robin Murphy <robin.murphy@arm.com>
+Date: Fri, 13 Oct 2017 19:23:41 +0100
+Subject: [PATCH 0097/1795] iommu/ipmmu-vmsa: Clean up struct
+ ipmmu_vmsa_iommu_priv
+
+Now that the IPMMU instance pointer is the only thing remaining in the
+private data structure, we no longer need the extra level of indirection
+and can simply stash that directlty in the fwspec.
+
+Signed-off-by: Robin Murphy <robin.murphy@arm.com>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit e4efe4a9a2ace658a36b5a4f515c11d4d36400a8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 36 ++++++++++++------------------------
+ 1 file changed, 12 insertions(+), 24 deletions(-)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index 6e6a86f3c375..fd05a5f5a47e 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -58,16 +58,12 @@ struct ipmmu_vmsa_domain {
+ spinlock_t lock; /* Protects mappings */
+ };
+
+-struct ipmmu_vmsa_iommu_priv {
+- struct ipmmu_vmsa_device *mmu;
+-};
+-
+ static struct ipmmu_vmsa_domain *to_vmsa_domain(struct iommu_domain *dom)
+ {
+ return container_of(dom, struct ipmmu_vmsa_domain, io_domain);
+ }
+
+-static struct ipmmu_vmsa_iommu_priv *to_priv(struct device *dev)
++static struct ipmmu_vmsa_device *to_ipmmu(struct device *dev)
+ {
+ return dev->iommu_fwspec ? dev->iommu_fwspec->iommu_priv : NULL;
+ }
+@@ -565,15 +561,14 @@ static void ipmmu_domain_free(struct iommu_domain *io_domain)
+ static int ipmmu_attach_device(struct iommu_domain *io_domain,
+ struct device *dev)
+ {
+- struct ipmmu_vmsa_iommu_priv *priv = to_priv(dev);
+ struct iommu_fwspec *fwspec = dev->iommu_fwspec;
+- struct ipmmu_vmsa_device *mmu = priv->mmu;
++ struct ipmmu_vmsa_device *mmu = to_ipmmu(dev);
+ struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);
+ unsigned long flags;
+ unsigned int i;
+ int ret = 0;
+
+- if (!priv || !priv->mmu) {
++ if (!mmu) {
+ dev_err(dev, "Cannot attach to IPMMU\n");
+ return -ENXIO;
+ }
+@@ -662,18 +657,12 @@ static int ipmmu_init_platform_device(struct device *dev,
+ struct of_phandle_args *args)
+ {
+ struct platform_device *ipmmu_pdev;
+- struct ipmmu_vmsa_iommu_priv *priv;
+
+ ipmmu_pdev = of_find_device_by_node(args->np);
+ if (!ipmmu_pdev)
+ return -ENODEV;
+
+- priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+- if (!priv)
+- return -ENOMEM;
+-
+- priv->mmu = platform_get_drvdata(ipmmu_pdev);
+- dev->iommu_fwspec->iommu_priv = priv;
++ dev->iommu_fwspec->iommu_priv = platform_get_drvdata(ipmmu_pdev);
+ return 0;
+ }
+
+@@ -683,7 +672,7 @@ static int ipmmu_of_xlate(struct device *dev,
+ iommu_fwspec_add_ids(dev, spec->args, 1);
+
+ /* Initialize once - xlate() will call multiple times */
+- if (to_priv(dev))
++ if (to_ipmmu(dev))
+ return 0;
+
+ return ipmmu_init_platform_device(dev, spec);
+@@ -693,14 +682,14 @@ static int ipmmu_of_xlate(struct device *dev,
+
+ static int ipmmu_add_device(struct device *dev)
+ {
+- struct ipmmu_vmsa_device *mmu = NULL;
++ struct ipmmu_vmsa_device *mmu = to_ipmmu(dev);
+ struct iommu_group *group;
+ int ret;
+
+ /*
+ * Only let through devices that have been verified in xlate()
+ */
+- if (!to_priv(dev))
++ if (!mmu)
+ return -ENODEV;
+
+ /* Create a device group and add the device to it. */
+@@ -729,7 +718,6 @@ static int ipmmu_add_device(struct device *dev)
+ * - Make the mapping size configurable ? We currently use a 2GB mapping
+ * at a 1GB offset to ensure that NULL VAs will fault.
+ */
+- mmu = to_priv(dev)->mmu;
+ if (!mmu->mapping) {
+ struct dma_iommu_mapping *mapping;
+
+@@ -795,7 +783,7 @@ static int ipmmu_add_device_dma(struct device *dev)
+ /*
+ * Only let through devices that have been verified in xlate()
+ */
+- if (!to_priv(dev))
++ if (!to_ipmmu(dev))
+ return -ENODEV;
+
+ group = iommu_group_get_for_dev(dev);
+@@ -812,15 +800,15 @@ static void ipmmu_remove_device_dma(struct device *dev)
+
+ static struct iommu_group *ipmmu_find_group(struct device *dev)
+ {
+- struct ipmmu_vmsa_iommu_priv *priv = to_priv(dev);
++ struct ipmmu_vmsa_device *mmu = to_ipmmu(dev);
+ struct iommu_group *group;
+
+- if (priv->mmu->group)
+- return iommu_group_ref_get(priv->mmu->group);
++ if (mmu->group)
++ return iommu_group_ref_get(mmu->group);
+
+ group = iommu_group_alloc();
+ if (!IS_ERR(group))
+- priv->mmu->group = group;
++ mmu->group = group;
+
+ return group;
+ }
+--
+2.19.0
+
diff --git a/patches/0098-iommu-ipmmu-vmsa-Unify-ipmmu_ops.patch b/patches/0098-iommu-ipmmu-vmsa-Unify-ipmmu_ops.patch
new file mode 100644
index 0000000..4a3c1b0
--- /dev/null
+++ b/patches/0098-iommu-ipmmu-vmsa-Unify-ipmmu_ops.patch
@@ -0,0 +1,173 @@
+From fb81bdcd8c1d96edb0bce62324c06dc90aa36b36 Mon Sep 17 00:00:00 2001
+From: Robin Murphy <robin.murphy@arm.com>
+Date: Fri, 13 Oct 2017 19:23:42 +0100
+Subject: [PATCH 0098/1795] iommu/ipmmu-vmsa: Unify ipmmu_ops
+
+The remaining difference between the ARM-specific and iommu-dma ops is
+in the {add,remove}_device implementations, but even those have some
+overlap and duplication. By stubbing out the few arm_iommu_*() calls,
+we can get rid of the rest of the inline #ifdeffery to both simplify the
+code and improve build coverage.
+
+Signed-off-by: Robin Murphy <robin.murphy@arm.com>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit 49c875f030523d676a508e53f7dc3e592e9439d7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 69 +++++++++++---------------------------
+ 1 file changed, 19 insertions(+), 50 deletions(-)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index fd05a5f5a47e..f6d2e8e650be 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -27,6 +27,11 @@
+ #if defined(CONFIG_ARM) && !defined(CONFIG_IOMMU_DMA)
+ #include <asm/dma-iommu.h>
+ #include <asm/pgalloc.h>
++#else
++#define arm_iommu_create_mapping(...) NULL
++#define arm_iommu_attach_device(...) -ENODEV
++#define arm_iommu_release_mapping(...) do {} while (0)
++#define arm_iommu_detach_device(...) do {} while (0)
+ #endif
+
+ #include "io-pgtable.h"
+@@ -678,26 +683,17 @@ static int ipmmu_of_xlate(struct device *dev,
+ return ipmmu_init_platform_device(dev, spec);
+ }
+
+-#if defined(CONFIG_ARM) && !defined(CONFIG_IOMMU_DMA)
+-
+-static int ipmmu_add_device(struct device *dev)
++static int ipmmu_init_arm_mapping(struct device *dev)
+ {
+ struct ipmmu_vmsa_device *mmu = to_ipmmu(dev);
+ struct iommu_group *group;
+ int ret;
+
+- /*
+- * Only let through devices that have been verified in xlate()
+- */
+- if (!mmu)
+- return -ENODEV;
+-
+ /* Create a device group and add the device to it. */
+ group = iommu_group_alloc();
+ if (IS_ERR(group)) {
+ dev_err(dev, "Failed to allocate IOMMU group\n");
+- ret = PTR_ERR(group);
+- goto error;
++ return PTR_ERR(group);
+ }
+
+ ret = iommu_group_add_device(group, dev);
+@@ -705,8 +701,7 @@ static int ipmmu_add_device(struct device *dev)
+
+ if (ret < 0) {
+ dev_err(dev, "Failed to add device to IPMMU group\n");
+- group = NULL;
+- goto error;
++ return ret;
+ }
+
+ /*
+@@ -742,41 +737,14 @@ static int ipmmu_add_device(struct device *dev)
+ return 0;
+
+ error:
+- if (mmu)
++ iommu_group_remove_device(dev);
++ if (mmu->mapping)
+ arm_iommu_release_mapping(mmu->mapping);
+
+- if (!IS_ERR_OR_NULL(group))
+- iommu_group_remove_device(dev);
+-
+ return ret;
+ }
+
+-static void ipmmu_remove_device(struct device *dev)
+-{
+- arm_iommu_detach_device(dev);
+- iommu_group_remove_device(dev);
+-}
+-
+-static const struct iommu_ops ipmmu_ops = {
+- .domain_alloc = ipmmu_domain_alloc,
+- .domain_free = ipmmu_domain_free,
+- .attach_dev = ipmmu_attach_device,
+- .detach_dev = ipmmu_detach_device,
+- .map = ipmmu_map,
+- .unmap = ipmmu_unmap,
+- .map_sg = default_iommu_map_sg,
+- .iova_to_phys = ipmmu_iova_to_phys,
+- .add_device = ipmmu_add_device,
+- .remove_device = ipmmu_remove_device,
+- .pgsize_bitmap = SZ_1G | SZ_2M | SZ_4K,
+- .of_xlate = ipmmu_of_xlate,
+-};
+-
+-#endif /* !CONFIG_ARM && CONFIG_IOMMU_DMA */
+-
+-#ifdef CONFIG_IOMMU_DMA
+-
+-static int ipmmu_add_device_dma(struct device *dev)
++static int ipmmu_add_device(struct device *dev)
+ {
+ struct iommu_group *group;
+
+@@ -786,15 +754,20 @@ static int ipmmu_add_device_dma(struct device *dev)
+ if (!to_ipmmu(dev))
+ return -ENODEV;
+
++ if (IS_ENABLED(CONFIG_ARM) && !IS_ENABLED(CONFIG_IOMMU_DMA))
++ return ipmmu_init_arm_mapping(dev);
++
+ group = iommu_group_get_for_dev(dev);
+ if (IS_ERR(group))
+ return PTR_ERR(group);
+
++ iommu_group_put(group);
+ return 0;
+ }
+
+-static void ipmmu_remove_device_dma(struct device *dev)
++static void ipmmu_remove_device(struct device *dev)
+ {
++ arm_iommu_detach_device(dev);
+ iommu_group_remove_device(dev);
+ }
+
+@@ -824,15 +797,13 @@ static const struct iommu_ops ipmmu_ops = {
+ .iotlb_sync = ipmmu_iotlb_sync,
+ .map_sg = default_iommu_map_sg,
+ .iova_to_phys = ipmmu_iova_to_phys,
+- .add_device = ipmmu_add_device_dma,
+- .remove_device = ipmmu_remove_device_dma,
++ .add_device = ipmmu_add_device,
++ .remove_device = ipmmu_remove_device,
+ .device_group = ipmmu_find_group,
+ .pgsize_bitmap = SZ_1G | SZ_2M | SZ_4K,
+ .of_xlate = ipmmu_of_xlate,
+ };
+
+-#endif /* CONFIG_IOMMU_DMA */
+-
+ /* -----------------------------------------------------------------------------
+ * Probe/remove and init
+ */
+@@ -929,9 +900,7 @@ static int ipmmu_remove(struct platform_device *pdev)
+ iommu_device_sysfs_remove(&mmu->iommu);
+ iommu_device_unregister(&mmu->iommu);
+
+-#if defined(CONFIG_ARM) && !defined(CONFIG_IOMMU_DMA)
+ arm_iommu_release_mapping(mmu->mapping);
+-#endif
+
+ ipmmu_device_reset(mmu);
+
+--
+2.19.0
+
diff --git a/patches/0099-iommu-ipmmu-vmsa-Introduce-features-break-out-alias.patch b/patches/0099-iommu-ipmmu-vmsa-Introduce-features-break-out-alias.patch
new file mode 100644
index 0000000..63521f8
--- /dev/null
+++ b/patches/0099-iommu-ipmmu-vmsa-Introduce-features-break-out-alias.patch
@@ -0,0 +1,105 @@
+From 5a02eb587adad058b3538ff9c9464a972a14cc92 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Mon, 16 Oct 2017 21:29:25 +0900
+Subject: [PATCH 0099/1795] iommu/ipmmu-vmsa: Introduce features, break out
+ alias
+
+Introduce struct ipmmu_features to track various hardware
+and software implementation changes inside the driver for
+different kinds of IPMMU hardware. Add use_ns_alias_offset
+as a first example of a feature to control if the secure
+register bank offset should be used or not.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit 33f3ac9b511612153bae1d328b0c84c0367cd08d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 31 ++++++++++++++++++++++++-------
+ 1 file changed, 24 insertions(+), 7 deletions(-)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index f6d2e8e650be..5ce7879cb58d 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -19,6 +19,7 @@
+ #include <linux/iommu.h>
+ #include <linux/module.h>
+ #include <linux/of.h>
++#include <linux/of_device.h>
+ #include <linux/of_platform.h>
+ #include <linux/platform_device.h>
+ #include <linux/sizes.h>
+@@ -38,11 +39,15 @@
+
+ #define IPMMU_CTX_MAX 1
+
++struct ipmmu_features {
++ bool use_ns_alias_offset;
++};
++
+ struct ipmmu_vmsa_device {
+ struct device *dev;
+ void __iomem *base;
+ struct iommu_device iommu;
+-
++ const struct ipmmu_features *features;
+ unsigned int num_utlbs;
+ spinlock_t lock; /* Protects ctx and domains[] */
+ DECLARE_BITMAP(ctx, IPMMU_CTX_MAX);
+@@ -817,6 +822,21 @@ static void ipmmu_device_reset(struct ipmmu_vmsa_device *mmu)
+ ipmmu_write(mmu, i * IM_CTX_SIZE + IMCTR, 0);
+ }
+
++static const struct ipmmu_features ipmmu_features_default = {
++ .use_ns_alias_offset = true,
++};
++
++static const struct of_device_id ipmmu_of_ids[] = {
++ {
++ .compatible = "renesas,ipmmu-vmsa",
++ .data = &ipmmu_features_default,
++ }, {
++ /* Terminator */
++ },
++};
++
++MODULE_DEVICE_TABLE(of, ipmmu_of_ids);
++
+ static int ipmmu_probe(struct platform_device *pdev)
+ {
+ struct ipmmu_vmsa_device *mmu;
+@@ -834,6 +854,7 @@ static int ipmmu_probe(struct platform_device *pdev)
+ mmu->num_utlbs = 32;
+ spin_lock_init(&mmu->lock);
+ bitmap_zero(mmu->ctx, IPMMU_CTX_MAX);
++ mmu->features = of_device_get_match_data(&pdev->dev);
+
+ /* Map I/O memory and request IRQ. */
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+@@ -853,7 +874,8 @@ static int ipmmu_probe(struct platform_device *pdev)
+ * Offset the registers base unconditionally to point to the non-secure
+ * alias space for now.
+ */
+- mmu->base += IM_NS_ALIAS_OFFSET;
++ if (mmu->features->use_ns_alias_offset)
++ mmu->base += IM_NS_ALIAS_OFFSET;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0) {
+@@ -907,11 +929,6 @@ static int ipmmu_remove(struct platform_device *pdev)
+ return 0;
+ }
+
+-static const struct of_device_id ipmmu_of_ids[] = {
+- { .compatible = "renesas,ipmmu-vmsa", },
+- { }
+-};
+-
+ static struct platform_driver ipmmu_driver = {
+ .driver = {
+ .name = "ipmmu-vmsa",
+--
+2.19.0
+
diff --git a/patches/0100-iommu-ipmmu-vmsa-Add-optional-root-device-feature.patch b/patches/0100-iommu-ipmmu-vmsa-Add-optional-root-device-feature.patch
new file mode 100644
index 0000000..d0fe7fe
--- /dev/null
+++ b/patches/0100-iommu-ipmmu-vmsa-Add-optional-root-device-feature.patch
@@ -0,0 +1,189 @@
+From 943e6dd529212c6868cdb032f982ab824e6aceab Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Mon, 16 Oct 2017 21:29:36 +0900
+Subject: [PATCH 0100/1795] iommu/ipmmu-vmsa: Add optional root device feature
+
+Add root device handling to the IPMMU driver by allowing certain
+DT compat strings to enable has_cache_leaf_nodes that in turn will
+support both root devices with interrupts and leaf devices that
+face the actual IPMMU consumer devices.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit fd5140e29a59e04a6c3e8cc56536bda3e60bbf49)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 90 +++++++++++++++++++++++++++++++-------
+ 1 file changed, 73 insertions(+), 17 deletions(-)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index 5ce7879cb58d..5db853b92d3b 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -41,12 +41,14 @@
+
+ struct ipmmu_features {
+ bool use_ns_alias_offset;
++ bool has_cache_leaf_nodes;
+ };
+
+ struct ipmmu_vmsa_device {
+ struct device *dev;
+ void __iomem *base;
+ struct iommu_device iommu;
++ struct ipmmu_vmsa_device *root;
+ const struct ipmmu_features *features;
+ unsigned int num_utlbs;
+ spinlock_t lock; /* Protects ctx and domains[] */
+@@ -198,6 +200,36 @@ static struct ipmmu_vmsa_device *to_ipmmu(struct device *dev)
+ #define IMUASID_ASID0_MASK (0xff << 0)
+ #define IMUASID_ASID0_SHIFT 0
+
++/* -----------------------------------------------------------------------------
++ * Root device handling
++ */
++
++static struct platform_driver ipmmu_driver;
++
++static bool ipmmu_is_root(struct ipmmu_vmsa_device *mmu)
++{
++ return mmu->root == mmu;
++}
++
++static int __ipmmu_check_device(struct device *dev, void *data)
++{
++ struct ipmmu_vmsa_device *mmu = dev_get_drvdata(dev);
++ struct ipmmu_vmsa_device **rootp = data;
++
++ if (ipmmu_is_root(mmu))
++ *rootp = mmu;
++
++ return 0;
++}
++
++static struct ipmmu_vmsa_device *ipmmu_find_root(void)
++{
++ struct ipmmu_vmsa_device *root = NULL;
++
++ return driver_for_each_device(&ipmmu_driver.driver, NULL, &root,
++ __ipmmu_check_device) == 0 ? root : NULL;
++}
++
+ /* -----------------------------------------------------------------------------
+ * Read/Write Access
+ */
+@@ -215,13 +247,15 @@ static void ipmmu_write(struct ipmmu_vmsa_device *mmu, unsigned int offset,
+
+ static u32 ipmmu_ctx_read(struct ipmmu_vmsa_domain *domain, unsigned int reg)
+ {
+- return ipmmu_read(domain->mmu, domain->context_id * IM_CTX_SIZE + reg);
++ return ipmmu_read(domain->mmu->root,
++ domain->context_id * IM_CTX_SIZE + reg);
+ }
+
+ static void ipmmu_ctx_write(struct ipmmu_vmsa_domain *domain, unsigned int reg,
+ u32 data)
+ {
+- ipmmu_write(domain->mmu, domain->context_id * IM_CTX_SIZE + reg, data);
++ ipmmu_write(domain->mmu->root,
++ domain->context_id * IM_CTX_SIZE + reg, data);
+ }
+
+ /* -----------------------------------------------------------------------------
+@@ -369,12 +403,12 @@ static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain)
+ * TODO: Add support for coherent walk through CCI with DVM and remove
+ * cache handling. For now, delegate it to the io-pgtable code.
+ */
+- domain->cfg.iommu_dev = domain->mmu->dev;
++ domain->cfg.iommu_dev = domain->mmu->root->dev;
+
+ /*
+ * Find an unused context.
+ */
+- ret = ipmmu_domain_allocate_context(domain->mmu, domain);
++ ret = ipmmu_domain_allocate_context(domain->mmu->root, domain);
+ if (ret == IPMMU_CTX_MAX)
+ return -EBUSY;
+
+@@ -383,7 +417,8 @@ static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain)
+ domain->iop = alloc_io_pgtable_ops(ARM_32_LPAE_S1, &domain->cfg,
+ domain);
+ if (!domain->iop) {
+- ipmmu_domain_free_context(domain->mmu, domain->context_id);
++ ipmmu_domain_free_context(domain->mmu->root,
++ domain->context_id);
+ return -EINVAL;
+ }
+
+@@ -437,7 +472,7 @@ static void ipmmu_domain_destroy_context(struct ipmmu_vmsa_domain *domain)
+ */
+ ipmmu_ctx_write(domain, IMCTR, IMCTR_FLUSH);
+ ipmmu_tlb_sync(domain);
+- ipmmu_domain_free_context(domain->mmu, domain->context_id);
++ ipmmu_domain_free_context(domain->mmu->root, domain->context_id);
+ }
+
+ /* -----------------------------------------------------------------------------
+@@ -824,6 +859,7 @@ static void ipmmu_device_reset(struct ipmmu_vmsa_device *mmu)
+
+ static const struct ipmmu_features ipmmu_features_default = {
+ .use_ns_alias_offset = true,
++ .has_cache_leaf_nodes = false,
+ };
+
+ static const struct of_device_id ipmmu_of_ids[] = {
+@@ -878,19 +914,39 @@ static int ipmmu_probe(struct platform_device *pdev)
+ mmu->base += IM_NS_ALIAS_OFFSET;
+
+ irq = platform_get_irq(pdev, 0);
+- if (irq < 0) {
+- dev_err(&pdev->dev, "no IRQ found\n");
+- return irq;
+- }
+
+- ret = devm_request_irq(&pdev->dev, irq, ipmmu_irq, 0,
+- dev_name(&pdev->dev), mmu);
+- if (ret < 0) {
+- dev_err(&pdev->dev, "failed to request IRQ %d\n", irq);
+- return ret;
+- }
++ /*
++ * Determine if this IPMMU instance is a root device by checking for
++ * the lack of has_cache_leaf_nodes flag or renesas,ipmmu-main property.
++ */
++ if (!mmu->features->has_cache_leaf_nodes ||
++ !of_find_property(pdev->dev.of_node, "renesas,ipmmu-main", NULL))
++ mmu->root = mmu;
++ else
++ mmu->root = ipmmu_find_root();
+
+- ipmmu_device_reset(mmu);
++ /*
++ * Wait until the root device has been registered for sure.
++ */
++ if (!mmu->root)
++ return -EPROBE_DEFER;
++
++ /* Root devices have mandatory IRQs */
++ if (ipmmu_is_root(mmu)) {
++ if (irq < 0) {
++ dev_err(&pdev->dev, "no IRQ found\n");
++ return irq;
++ }
++
++ ret = devm_request_irq(&pdev->dev, irq, ipmmu_irq, 0,
++ dev_name(&pdev->dev), mmu);
++ if (ret < 0) {
++ dev_err(&pdev->dev, "failed to request IRQ %d\n", irq);
++ return ret;
++ }
++
++ ipmmu_device_reset(mmu);
++ }
+
+ ret = iommu_device_sysfs_add(&mmu->iommu, &pdev->dev, NULL,
+ dev_name(&pdev->dev));
+--
+2.19.0
+
diff --git a/patches/0101-iommu-ipmmu-vmsa-Enable-multi-context-support.patch b/patches/0101-iommu-ipmmu-vmsa-Enable-multi-context-support.patch
new file mode 100644
index 0000000..3cd6fa3
--- /dev/null
+++ b/patches/0101-iommu-ipmmu-vmsa-Enable-multi-context-support.patch
@@ -0,0 +1,125 @@
+From 8eaee8d0fcde4bd505126f104b43545dea09b9f3 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Mon, 16 Oct 2017 21:29:46 +0900
+Subject: [PATCH 0101/1795] iommu/ipmmu-vmsa: Enable multi context support
+
+Add support for up to 8 contexts. Each context is mapped to one
+domain. One domain is assigned one or more slave devices. Contexts
+are allocated dynamically and slave devices are grouped together
+based on which IPMMU device they are connected to. This makes slave
+devices tied to the same IPMMU device share the same IOVA space.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit 5fd163416fb7b6592521c39f867d5ae6360e7924)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 30 ++++++++++++++++++++++--------
+ 1 file changed, 22 insertions(+), 8 deletions(-)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index 5db853b92d3b..c70efd80f740 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -37,11 +37,12 @@
+
+ #include "io-pgtable.h"
+
+-#define IPMMU_CTX_MAX 1
++#define IPMMU_CTX_MAX 8
+
+ struct ipmmu_features {
+ bool use_ns_alias_offset;
+ bool has_cache_leaf_nodes;
++ unsigned int number_of_contexts;
+ };
+
+ struct ipmmu_vmsa_device {
+@@ -51,6 +52,7 @@ struct ipmmu_vmsa_device {
+ struct ipmmu_vmsa_device *root;
+ const struct ipmmu_features *features;
+ unsigned int num_utlbs;
++ unsigned int num_ctx;
+ spinlock_t lock; /* Protects ctx and domains[] */
+ DECLARE_BITMAP(ctx, IPMMU_CTX_MAX);
+ struct ipmmu_vmsa_domain *domains[IPMMU_CTX_MAX];
+@@ -352,11 +354,12 @@ static int ipmmu_domain_allocate_context(struct ipmmu_vmsa_device *mmu,
+
+ spin_lock_irqsave(&mmu->lock, flags);
+
+- ret = find_first_zero_bit(mmu->ctx, IPMMU_CTX_MAX);
+- if (ret != IPMMU_CTX_MAX) {
++ ret = find_first_zero_bit(mmu->ctx, mmu->num_ctx);
++ if (ret != mmu->num_ctx) {
+ mmu->domains[ret] = domain;
+ set_bit(ret, mmu->ctx);
+- }
++ } else
++ ret = -EBUSY;
+
+ spin_unlock_irqrestore(&mmu->lock, flags);
+
+@@ -409,8 +412,8 @@ static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain)
+ * Find an unused context.
+ */
+ ret = ipmmu_domain_allocate_context(domain->mmu->root, domain);
+- if (ret == IPMMU_CTX_MAX)
+- return -EBUSY;
++ if (ret < 0)
++ return ret;
+
+ domain->context_id = ret;
+
+@@ -539,7 +542,7 @@ static irqreturn_t ipmmu_irq(int irq, void *dev)
+ /*
+ * Check interrupts for all active contexts.
+ */
+- for (i = 0; i < IPMMU_CTX_MAX; i++) {
++ for (i = 0; i < mmu->num_ctx; i++) {
+ if (!mmu->domains[i])
+ continue;
+ if (ipmmu_domain_irq(mmu->domains[i]) == IRQ_HANDLED)
+@@ -624,6 +627,13 @@ static int ipmmu_attach_device(struct iommu_domain *io_domain,
+ /* The domain hasn't been used yet, initialize it. */
+ domain->mmu = mmu;
+ ret = ipmmu_domain_init_context(domain);
++ if (ret < 0) {
++ dev_err(dev, "Unable to initialize IPMMU context\n");
++ domain->mmu = NULL;
++ } else {
++ dev_info(dev, "Using IPMMU context %u\n",
++ domain->context_id);
++ }
+ } else if (domain->mmu != mmu) {
+ /*
+ * Something is wrong, we can't attach two devices using
+@@ -853,13 +863,14 @@ static void ipmmu_device_reset(struct ipmmu_vmsa_device *mmu)
+ unsigned int i;
+
+ /* Disable all contexts. */
+- for (i = 0; i < 4; ++i)
++ for (i = 0; i < mmu->num_ctx; ++i)
+ ipmmu_write(mmu, i * IM_CTX_SIZE + IMCTR, 0);
+ }
+
+ static const struct ipmmu_features ipmmu_features_default = {
+ .use_ns_alias_offset = true,
+ .has_cache_leaf_nodes = false,
++ .number_of_contexts = 1, /* software only tested with one context */
+ };
+
+ static const struct of_device_id ipmmu_of_ids[] = {
+@@ -913,6 +924,9 @@ static int ipmmu_probe(struct platform_device *pdev)
+ if (mmu->features->use_ns_alias_offset)
+ mmu->base += IM_NS_ALIAS_OFFSET;
+
++ mmu->num_ctx = min_t(unsigned int, IPMMU_CTX_MAX,
++ mmu->features->number_of_contexts);
++
+ irq = platform_get_irq(pdev, 0);
+
+ /*
+--
+2.19.0
+
diff --git a/patches/0102-iommu-ipmmu-vmsa-Make-use-of-IOMMU_OF_DECLARE.patch b/patches/0102-iommu-ipmmu-vmsa-Make-use-of-IOMMU_OF_DECLARE.patch
new file mode 100644
index 0000000..d9e62ea
--- /dev/null
+++ b/patches/0102-iommu-ipmmu-vmsa-Make-use-of-IOMMU_OF_DECLARE.patch
@@ -0,0 +1,114 @@
+From 4e758c6bbbc3ba79dad00069f40b0f99f5c70d19 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Mon, 16 Oct 2017 21:29:57 +0900
+Subject: [PATCH 0102/1795] iommu/ipmmu-vmsa: Make use of IOMMU_OF_DECLARE()
+
+Hook up IOMMU_OF_DECLARE() support in case CONFIG_IOMMU_DMA
+is enabled. The only current supported case for 32-bit ARM
+is disabled, however for 64-bit ARM usage of OF is required.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit cda52fcd999f389c6f24f079910a62e53912d411)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 50 +++++++++++++++++++++++++++++++-------
+ 1 file changed, 41 insertions(+), 9 deletions(-)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index c70efd80f740..9cde61970bb5 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -20,6 +20,7 @@
+ #include <linux/module.h>
+ #include <linux/of.h>
+ #include <linux/of_device.h>
++#include <linux/of_iommu.h>
+ #include <linux/of_platform.h>
+ #include <linux/platform_device.h>
+ #include <linux/sizes.h>
+@@ -962,17 +963,30 @@ static int ipmmu_probe(struct platform_device *pdev)
+ ipmmu_device_reset(mmu);
+ }
+
+- ret = iommu_device_sysfs_add(&mmu->iommu, &pdev->dev, NULL,
+- dev_name(&pdev->dev));
+- if (ret)
+- return ret;
++ /*
++ * Register the IPMMU to the IOMMU subsystem in the following cases:
++ * - R-Car Gen2 IPMMU (all devices registered)
++ * - R-Car Gen3 IPMMU (leaf devices only - skip root IPMMU-MM device)
++ */
++ if (!mmu->features->has_cache_leaf_nodes || !ipmmu_is_root(mmu)) {
++ ret = iommu_device_sysfs_add(&mmu->iommu, &pdev->dev, NULL,
++ dev_name(&pdev->dev));
++ if (ret)
++ return ret;
+
+- iommu_device_set_ops(&mmu->iommu, &ipmmu_ops);
+- iommu_device_set_fwnode(&mmu->iommu, &pdev->dev.of_node->fwnode);
++ iommu_device_set_ops(&mmu->iommu, &ipmmu_ops);
++ iommu_device_set_fwnode(&mmu->iommu,
++ &pdev->dev.of_node->fwnode);
+
+- ret = iommu_device_register(&mmu->iommu);
+- if (ret)
+- return ret;
++ ret = iommu_device_register(&mmu->iommu);
++ if (ret)
++ return ret;
++
++#if defined(CONFIG_IOMMU_DMA)
++ if (!iommu_present(&platform_bus_type))
++ bus_set_iommu(&platform_bus_type, &ipmmu_ops);
++#endif
++ }
+
+ /*
+ * We can't create the ARM mapping here as it requires the bus to have
+@@ -1010,15 +1024,22 @@ static struct platform_driver ipmmu_driver = {
+
+ static int __init ipmmu_init(void)
+ {
++ static bool setup_done;
+ int ret;
+
++ if (setup_done)
++ return 0;
++
+ ret = platform_driver_register(&ipmmu_driver);
+ if (ret < 0)
+ return ret;
+
++#if defined(CONFIG_ARM) && !defined(CONFIG_IOMMU_DMA)
+ if (!iommu_present(&platform_bus_type))
+ bus_set_iommu(&platform_bus_type, &ipmmu_ops);
++#endif
+
++ setup_done = true;
+ return 0;
+ }
+
+@@ -1030,6 +1051,17 @@ static void __exit ipmmu_exit(void)
+ subsys_initcall(ipmmu_init);
+ module_exit(ipmmu_exit);
+
++#ifdef CONFIG_IOMMU_DMA
++static int __init ipmmu_vmsa_iommu_of_setup(struct device_node *np)
++{
++ ipmmu_init();
++ return 0;
++}
++
++IOMMU_OF_DECLARE(ipmmu_vmsa_iommu_of, "renesas,ipmmu-vmsa",
++ ipmmu_vmsa_iommu_of_setup);
++#endif
++
+ MODULE_DESCRIPTION("IOMMU API for Renesas VMSA-compatible IPMMU");
+ MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
+ MODULE_LICENSE("GPL v2");
+--
+2.19.0
+
diff --git a/patches/0103-iommu-ipmmu-vmsa-IPMMU-device-is-40-bit-bus-master.patch b/patches/0103-iommu-ipmmu-vmsa-IPMMU-device-is-40-bit-bus-master.patch
new file mode 100644
index 0000000..eee64a8
--- /dev/null
+++ b/patches/0103-iommu-ipmmu-vmsa-IPMMU-device-is-40-bit-bus-master.patch
@@ -0,0 +1,34 @@
+From cecfc76f8f5e54e14e51ff99f649acdf75a0056e Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Mon, 16 Oct 2017 21:30:07 +0900
+Subject: [PATCH 0103/1795] iommu/ipmmu-vmsa: IPMMU device is 40-bit bus master
+
+The r8a7795 IPMMU supports 40-bit bus mastering. Both
+the coherent DMA mask and the streaming DMA mask are
+set to unlock the 40-bit address space for coherent
+allocations and streaming operations.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit 1c894225bf5b1cdffac0c6ef935b61273203d7d5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index 9cde61970bb5..6b74ec62f4b4 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -903,6 +903,7 @@ static int ipmmu_probe(struct platform_device *pdev)
+ spin_lock_init(&mmu->lock);
+ bitmap_zero(mmu->ctx, IPMMU_CTX_MAX);
+ mmu->features = of_device_get_match_data(&pdev->dev);
++ dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(40));
+
+ /* Map I/O memory and request IRQ. */
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+--
+2.19.0
+
diff --git a/patches/0104-iommu-ipmmu-vmsa-Write-IMCTR-twice.patch b/patches/0104-iommu-ipmmu-vmsa-Write-IMCTR-twice.patch
new file mode 100644
index 0000000..045b9f1
--- /dev/null
+++ b/patches/0104-iommu-ipmmu-vmsa-Write-IMCTR-twice.patch
@@ -0,0 +1,171 @@
+From 76b5706b45a6e41d53cb081f051783df71db9fcb Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Mon, 16 Oct 2017 21:30:18 +0900
+Subject: [PATCH 0104/1795] iommu/ipmmu-vmsa: Write IMCTR twice
+
+Write IMCTR both in the root device and the leaf node.
+
+To allow access of IMCTR introduce the following function:
+ - ipmmu_ctx_write_all()
+
+While at it also rename context functions:
+ - ipmmu_ctx_read() -> ipmmu_ctx_read_root()
+ - ipmmu_ctx_write() -> ipmmu_ctx_write_root()
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit d574893aee991efa67fefa849347c49de5df8108)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 56 ++++++++++++++++++++++++--------------
+ 1 file changed, 35 insertions(+), 21 deletions(-)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index 6b74ec62f4b4..7587017972b0 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -248,19 +248,31 @@ static void ipmmu_write(struct ipmmu_vmsa_device *mmu, unsigned int offset,
+ iowrite32(data, mmu->base + offset);
+ }
+
+-static u32 ipmmu_ctx_read(struct ipmmu_vmsa_domain *domain, unsigned int reg)
++static u32 ipmmu_ctx_read_root(struct ipmmu_vmsa_domain *domain,
++ unsigned int reg)
+ {
+ return ipmmu_read(domain->mmu->root,
+ domain->context_id * IM_CTX_SIZE + reg);
+ }
+
+-static void ipmmu_ctx_write(struct ipmmu_vmsa_domain *domain, unsigned int reg,
+- u32 data)
++static void ipmmu_ctx_write_root(struct ipmmu_vmsa_domain *domain,
++ unsigned int reg, u32 data)
+ {
+ ipmmu_write(domain->mmu->root,
+ domain->context_id * IM_CTX_SIZE + reg, data);
+ }
+
++static void ipmmu_ctx_write_all(struct ipmmu_vmsa_domain *domain,
++ unsigned int reg, u32 data)
++{
++ if (domain->mmu != domain->mmu->root)
++ ipmmu_write(domain->mmu,
++ domain->context_id * IM_CTX_SIZE + reg, data);
++
++ ipmmu_write(domain->mmu->root,
++ domain->context_id * IM_CTX_SIZE + reg, data);
++}
++
+ /* -----------------------------------------------------------------------------
+ * TLB and microTLB Management
+ */
+@@ -270,7 +282,7 @@ static void ipmmu_tlb_sync(struct ipmmu_vmsa_domain *domain)
+ {
+ unsigned int count = 0;
+
+- while (ipmmu_ctx_read(domain, IMCTR) & IMCTR_FLUSH) {
++ while (ipmmu_ctx_read_root(domain, IMCTR) & IMCTR_FLUSH) {
+ cpu_relax();
+ if (++count == TLB_LOOP_TIMEOUT) {
+ dev_err_ratelimited(domain->mmu->dev,
+@@ -285,9 +297,9 @@ static void ipmmu_tlb_invalidate(struct ipmmu_vmsa_domain *domain)
+ {
+ u32 reg;
+
+- reg = ipmmu_ctx_read(domain, IMCTR);
++ reg = ipmmu_ctx_read_root(domain, IMCTR);
+ reg |= IMCTR_FLUSH;
+- ipmmu_ctx_write(domain, IMCTR, reg);
++ ipmmu_ctx_write_all(domain, IMCTR, reg);
+
+ ipmmu_tlb_sync(domain);
+ }
+@@ -428,31 +440,32 @@ static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain)
+
+ /* TTBR0 */
+ ttbr = domain->cfg.arm_lpae_s1_cfg.ttbr[0];
+- ipmmu_ctx_write(domain, IMTTLBR0, ttbr);
+- ipmmu_ctx_write(domain, IMTTUBR0, ttbr >> 32);
++ ipmmu_ctx_write_root(domain, IMTTLBR0, ttbr);
++ ipmmu_ctx_write_root(domain, IMTTUBR0, ttbr >> 32);
+
+ /*
+ * TTBCR
+ * We use long descriptors with inner-shareable WBWA tables and allocate
+ * the whole 32-bit VA space to TTBR0.
+ */
+- ipmmu_ctx_write(domain, IMTTBCR, IMTTBCR_EAE |
+- IMTTBCR_SH0_INNER_SHAREABLE | IMTTBCR_ORGN0_WB_WA |
+- IMTTBCR_IRGN0_WB_WA | IMTTBCR_SL0_LVL_1);
++ ipmmu_ctx_write_root(domain, IMTTBCR, IMTTBCR_EAE |
++ IMTTBCR_SH0_INNER_SHAREABLE | IMTTBCR_ORGN0_WB_WA |
++ IMTTBCR_IRGN0_WB_WA | IMTTBCR_SL0_LVL_1);
+
+ /* MAIR0 */
+- ipmmu_ctx_write(domain, IMMAIR0, domain->cfg.arm_lpae_s1_cfg.mair[0]);
++ ipmmu_ctx_write_root(domain, IMMAIR0,
++ domain->cfg.arm_lpae_s1_cfg.mair[0]);
+
+ /* IMBUSCR */
+- ipmmu_ctx_write(domain, IMBUSCR,
+- ipmmu_ctx_read(domain, IMBUSCR) &
+- ~(IMBUSCR_DVM | IMBUSCR_BUSSEL_MASK));
++ ipmmu_ctx_write_root(domain, IMBUSCR,
++ ipmmu_ctx_read_root(domain, IMBUSCR) &
++ ~(IMBUSCR_DVM | IMBUSCR_BUSSEL_MASK));
+
+ /*
+ * IMSTR
+ * Clear all interrupt flags.
+ */
+- ipmmu_ctx_write(domain, IMSTR, ipmmu_ctx_read(domain, IMSTR));
++ ipmmu_ctx_write_root(domain, IMSTR, ipmmu_ctx_read_root(domain, IMSTR));
+
+ /*
+ * IMCTR
+@@ -461,7 +474,8 @@ static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain)
+ * software management as we have no use for it. Flush the TLB as
+ * required when modifying the context registers.
+ */
+- ipmmu_ctx_write(domain, IMCTR, IMCTR_INTEN | IMCTR_FLUSH | IMCTR_MMUEN);
++ ipmmu_ctx_write_all(domain, IMCTR,
++ IMCTR_INTEN | IMCTR_FLUSH | IMCTR_MMUEN);
+
+ return 0;
+ }
+@@ -474,7 +488,7 @@ static void ipmmu_domain_destroy_context(struct ipmmu_vmsa_domain *domain)
+ *
+ * TODO: Is TLB flush really needed ?
+ */
+- ipmmu_ctx_write(domain, IMCTR, IMCTR_FLUSH);
++ ipmmu_ctx_write_all(domain, IMCTR, IMCTR_FLUSH);
+ ipmmu_tlb_sync(domain);
+ ipmmu_domain_free_context(domain->mmu->root, domain->context_id);
+ }
+@@ -490,11 +504,11 @@ static irqreturn_t ipmmu_domain_irq(struct ipmmu_vmsa_domain *domain)
+ u32 status;
+ u32 iova;
+
+- status = ipmmu_ctx_read(domain, IMSTR);
++ status = ipmmu_ctx_read_root(domain, IMSTR);
+ if (!(status & err_mask))
+ return IRQ_NONE;
+
+- iova = ipmmu_ctx_read(domain, IMEAR);
++ iova = ipmmu_ctx_read_root(domain, IMEAR);
+
+ /*
+ * Clear the error status flags. Unlike traditional interrupt flag
+@@ -502,7 +516,7 @@ static irqreturn_t ipmmu_domain_irq(struct ipmmu_vmsa_domain *domain)
+ * seems to require 0. The error address register must be read before,
+ * otherwise its value will be 0.
+ */
+- ipmmu_ctx_write(domain, IMSTR, 0);
++ ipmmu_ctx_write_root(domain, IMSTR, 0);
+
+ /* Log fatal errors. */
+ if (status & IMSTR_MHIT)
+--
+2.19.0
+
diff --git a/patches/0105-iommu-ipmmu-vmsa-Make-IMBUSCTR-setup-optional.patch b/patches/0105-iommu-ipmmu-vmsa-Make-IMBUSCTR-setup-optional.patch
new file mode 100644
index 0000000..2609ec0
--- /dev/null
+++ b/patches/0105-iommu-ipmmu-vmsa-Make-IMBUSCTR-setup-optional.patch
@@ -0,0 +1,54 @@
+From c91b5ab334d8239ff2f760392a0befe6eb32fbb1 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Mon, 16 Oct 2017 21:30:28 +0900
+Subject: [PATCH 0105/1795] iommu/ipmmu-vmsa: Make IMBUSCTR setup optional
+
+Introduce a feature to allow opt-out of setting up
+IMBUSCR. The default case is unchanged.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit f5c858912acd2b17059ebe6f34abac183bdfbf80)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 9 ++++++---
+ 1 file changed, 6 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index 7587017972b0..49f2c697b108 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -44,6 +44,7 @@ struct ipmmu_features {
+ bool use_ns_alias_offset;
+ bool has_cache_leaf_nodes;
+ unsigned int number_of_contexts;
++ bool setup_imbuscr;
+ };
+
+ struct ipmmu_vmsa_device {
+@@ -457,9 +458,10 @@ static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain)
+ domain->cfg.arm_lpae_s1_cfg.mair[0]);
+
+ /* IMBUSCR */
+- ipmmu_ctx_write_root(domain, IMBUSCR,
+- ipmmu_ctx_read_root(domain, IMBUSCR) &
+- ~(IMBUSCR_DVM | IMBUSCR_BUSSEL_MASK));
++ if (domain->mmu->features->setup_imbuscr)
++ ipmmu_ctx_write_root(domain, IMBUSCR,
++ ipmmu_ctx_read_root(domain, IMBUSCR) &
++ ~(IMBUSCR_DVM | IMBUSCR_BUSSEL_MASK));
+
+ /*
+ * IMSTR
+@@ -886,6 +888,7 @@ static const struct ipmmu_features ipmmu_features_default = {
+ .use_ns_alias_offset = true,
+ .has_cache_leaf_nodes = false,
+ .number_of_contexts = 1, /* software only tested with one context */
++ .setup_imbuscr = true,
+ };
+
+ static const struct of_device_id ipmmu_of_ids[] = {
+--
+2.19.0
+
diff --git a/patches/0106-iommu-ipmmu-vmsa-Allow-two-bit-SL0.patch b/patches/0106-iommu-ipmmu-vmsa-Allow-two-bit-SL0.patch
new file mode 100644
index 0000000..be2e95b
--- /dev/null
+++ b/patches/0106-iommu-ipmmu-vmsa-Allow-two-bit-SL0.patch
@@ -0,0 +1,75 @@
+From a80a7e3d2c7510bbf5c4300ddb30eb9604efdd35 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Mon, 16 Oct 2017 21:30:39 +0900
+Subject: [PATCH 0106/1795] iommu/ipmmu-vmsa: Allow two bit SL0
+
+Introduce support for two bit SL0 bitfield in IMTTBCR
+by using a separate feature flag.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit c295f504fb5a38abbb4094e687ee333a75613a0c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 14 +++++++++++++-
+ 1 file changed, 13 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index 49f2c697b108..65ad6910cb70 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -45,6 +45,7 @@ struct ipmmu_features {
+ bool has_cache_leaf_nodes;
+ unsigned int number_of_contexts;
+ bool setup_imbuscr;
++ bool twobit_imttbcr_sl0;
+ };
+
+ struct ipmmu_vmsa_device {
+@@ -144,6 +145,10 @@ static struct ipmmu_vmsa_device *to_ipmmu(struct device *dev)
+ #define IMTTBCR_TSZ0_MASK (7 << 0)
+ #define IMTTBCR_TSZ0_SHIFT O
+
++#define IMTTBCR_SL0_TWOBIT_LVL_3 (0 << 6)
++#define IMTTBCR_SL0_TWOBIT_LVL_2 (1 << 6)
++#define IMTTBCR_SL0_TWOBIT_LVL_1 (2 << 6)
++
+ #define IMBUSCR 0x000c
+ #define IMBUSCR_DVM (1 << 2)
+ #define IMBUSCR_BUSSEL_SYS (0 << 0)
+@@ -396,6 +401,7 @@ static void ipmmu_domain_free_context(struct ipmmu_vmsa_device *mmu,
+ static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain)
+ {
+ u64 ttbr;
++ u32 tmp;
+ int ret;
+
+ /*
+@@ -449,9 +455,14 @@ static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain)
+ * We use long descriptors with inner-shareable WBWA tables and allocate
+ * the whole 32-bit VA space to TTBR0.
+ */
++ if (domain->mmu->features->twobit_imttbcr_sl0)
++ tmp = IMTTBCR_SL0_TWOBIT_LVL_1;
++ else
++ tmp = IMTTBCR_SL0_LVL_1;
++
+ ipmmu_ctx_write_root(domain, IMTTBCR, IMTTBCR_EAE |
+ IMTTBCR_SH0_INNER_SHAREABLE | IMTTBCR_ORGN0_WB_WA |
+- IMTTBCR_IRGN0_WB_WA | IMTTBCR_SL0_LVL_1);
++ IMTTBCR_IRGN0_WB_WA | tmp);
+
+ /* MAIR0 */
+ ipmmu_ctx_write_root(domain, IMMAIR0,
+@@ -889,6 +900,7 @@ static const struct ipmmu_features ipmmu_features_default = {
+ .has_cache_leaf_nodes = false,
+ .number_of_contexts = 1, /* software only tested with one context */
+ .setup_imbuscr = true,
++ .twobit_imttbcr_sl0 = false,
+ };
+
+ static const struct of_device_id ipmmu_of_ids[] = {
+--
+2.19.0
+
diff --git a/patches/0107-iommu-ipmmu-vmsa-Hook-up-r8a7795-DT-matching-code.patch b/patches/0107-iommu-ipmmu-vmsa-Hook-up-r8a7795-DT-matching-code.patch
new file mode 100644
index 0000000..9caa4cc
--- /dev/null
+++ b/patches/0107-iommu-ipmmu-vmsa-Hook-up-r8a7795-DT-matching-code.patch
@@ -0,0 +1,88 @@
+From 834eb971ccfc690bbb2c27ed298e23c4f2df72d4 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Mon, 16 Oct 2017 21:30:50 +0900
+Subject: [PATCH 0107/1795] iommu/ipmmu-vmsa: Hook up r8a7795 DT matching code
+
+Tie in r8a7795 features and update the IOMMU_OF_DECLARE
+compat string to include the updated compat string.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit 58b8e8bf409236cdea379b8a3ab5d7b85a003d22)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 29 +++++++++++++++++++++++++++++
+ 1 file changed, 29 insertions(+)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index 65ad6910cb70..8dce3a9de9d8 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -25,6 +25,7 @@
+ #include <linux/platform_device.h>
+ #include <linux/sizes.h>
+ #include <linux/slab.h>
++#include <linux/sys_soc.h>
+
+ #if defined(CONFIG_ARM) && !defined(CONFIG_IOMMU_DMA)
+ #include <asm/dma-iommu.h>
+@@ -749,9 +750,24 @@ static int ipmmu_init_platform_device(struct device *dev,
+ return 0;
+ }
+
++static bool ipmmu_slave_whitelist(struct device *dev)
++{
++ /* By default, do not allow use of IPMMU */
++ return false;
++}
++
++static const struct soc_device_attribute soc_r8a7795[] = {
++ { .soc_id = "r8a7795", },
++ { /* sentinel */ }
++};
++
+ static int ipmmu_of_xlate(struct device *dev,
+ struct of_phandle_args *spec)
+ {
++ /* For R-Car Gen3 use a white list to opt-in slave devices */
++ if (soc_device_match(soc_r8a7795) && !ipmmu_slave_whitelist(dev))
++ return -ENODEV;
++
+ iommu_fwspec_add_ids(dev, spec->args, 1);
+
+ /* Initialize once - xlate() will call multiple times */
+@@ -903,10 +919,21 @@ static const struct ipmmu_features ipmmu_features_default = {
+ .twobit_imttbcr_sl0 = false,
+ };
+
++static const struct ipmmu_features ipmmu_features_r8a7795 = {
++ .use_ns_alias_offset = false,
++ .has_cache_leaf_nodes = true,
++ .number_of_contexts = 8,
++ .setup_imbuscr = false,
++ .twobit_imttbcr_sl0 = true,
++};
++
+ static const struct of_device_id ipmmu_of_ids[] = {
+ {
+ .compatible = "renesas,ipmmu-vmsa",
+ .data = &ipmmu_features_default,
++ }, {
++ .compatible = "renesas,ipmmu-r8a7795",
++ .data = &ipmmu_features_r8a7795,
+ }, {
+ /* Terminator */
+ },
+@@ -1090,6 +1117,8 @@ static int __init ipmmu_vmsa_iommu_of_setup(struct device_node *np)
+
+ IOMMU_OF_DECLARE(ipmmu_vmsa_iommu_of, "renesas,ipmmu-vmsa",
+ ipmmu_vmsa_iommu_of_setup);
++IOMMU_OF_DECLARE(ipmmu_r8a7795_iommu_of, "renesas,ipmmu-r8a7795",
++ ipmmu_vmsa_iommu_of_setup);
+ #endif
+
+ MODULE_DESCRIPTION("IOMMU API for Renesas VMSA-compatible IPMMU");
+--
+2.19.0
+
diff --git a/patches/0108-irqchip-gic-Deal-with-broken-firmware-exposing-only-.patch b/patches/0108-irqchip-gic-Deal-with-broken-firmware-exposing-only-.patch
new file mode 100644
index 0000000..a26b3a3
--- /dev/null
+++ b/patches/0108-irqchip-gic-Deal-with-broken-firmware-exposing-only-.patch
@@ -0,0 +1,158 @@
+From adde40ad18b5dcbeb2ec4acd09b347842b41e707 Mon Sep 17 00:00:00 2001
+From: Marc Zyngier <marc.zyngier@arm.com>
+Date: Fri, 27 Oct 2017 10:34:22 +0200
+Subject: [PATCH 0108/1795] irqchip/gic: Deal with broken firmware exposing
+ only 4kB of GICv2 CPU interface
+
+There is a lot of broken firmware out there that don't really
+expose the information the kernel requires when it comes with dealing
+with GICv2:
+
+(1) Firmware that only describes the first 4kB of GICv2
+(2) Firmware that describe 128kB of CPU interface, while
+ the usable portion of the address space is between
+ 60 and 68kB
+
+So far, we only deal with (2). But we have platforms exhibiting
+behaviour (1), resulting in two sub-cases:
+(a) The GIC is occupying 8kB, as required by the GICv2 architecture
+(b) It is actually spread 128kB, and this is likely to be a version
+ of (2)
+
+This patch tries to work around both (a) and (b) by poking at
+the outside of the described memory region, and try to work out
+what is actually there. This is of course unsafe, and should
+only be enabled if there is no way to otherwise fix the DT provided
+by the firmware (we provide a "irqchip.gicv2_force_probe" option
+to that effect).
+
+Note that for the time being, we restrict ourselves to GICv2
+implementations provided by ARM, since there I have no knowledge
+of an alternative implementations. This could be relaxed if such
+an implementation comes to light on a broken platform.
+
+Reviewed-by: Christoffer Dall <cdall@linaro.org>
+Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
+(cherry picked from commit 0962289b1cd91534f7111e763d3e6a17dcd47ecb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ .../admin-guide/kernel-parameters.txt | 7 ++
+ drivers/irqchip/irq-gic.c | 71 ++++++++++++++++---
+ 2 files changed, 69 insertions(+), 9 deletions(-)
+
+diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
+index 9841bad6f271..900c83e10d4d 100644
+--- a/Documentation/admin-guide/kernel-parameters.txt
++++ b/Documentation/admin-guide/kernel-parameters.txt
+@@ -1713,6 +1713,13 @@
+ irqaffinity= [SMP] Set the default irq affinity mask
+ The argument is a cpu list, as described above.
+
++ irqchip.gicv2_force_probe=
++ [ARM, ARM64]
++ Format: <bool>
++ Force the kernel to look for the second 4kB page
++ of a GICv2 controller even if the memory range
++ exposed by the device tree is too small.
++
+ irqfixup [HW]
+ When an interrupt is not handled search all handlers
+ for it. Intended to get systems with badly broken
+diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
+index 651d726e8b12..f641e8e2c78d 100644
+--- a/drivers/irqchip/irq-gic.c
++++ b/drivers/irqchip/irq-gic.c
+@@ -1256,6 +1256,19 @@ static void gic_teardown(struct gic_chip_data *gic)
+
+ #ifdef CONFIG_OF
+ static int gic_cnt __initdata;
++static bool gicv2_force_probe;
++
++static int __init gicv2_force_probe_cfg(char *buf)
++{
++ return strtobool(buf, &gicv2_force_probe);
++}
++early_param("irqchip.gicv2_force_probe", gicv2_force_probe_cfg);
++
++static bool gic_check_gicv2(void __iomem *base)
++{
++ u32 val = readl_relaxed(base + GIC_CPU_IDENT);
++ return (val & 0xff0fff) == 0x02043B;
++}
+
+ static bool gic_check_eoimode(struct device_node *node, void __iomem **base)
+ {
+@@ -1265,20 +1278,60 @@ static bool gic_check_eoimode(struct device_node *node, void __iomem **base)
+
+ if (!is_hyp_mode_available())
+ return false;
+- if (resource_size(&cpuif_res) < SZ_8K)
+- return false;
+- if (resource_size(&cpuif_res) == SZ_128K) {
+- u32 val_low, val_high;
++ if (resource_size(&cpuif_res) < SZ_8K) {
++ void __iomem *alt;
++ /*
++ * Check for a stupid firmware that only exposes the
++ * first page of a GICv2.
++ */
++ if (!gic_check_gicv2(*base))
++ return false;
+
++ if (!gicv2_force_probe) {
++ pr_warn("GIC: GICv2 detected, but range too small and irqchip.gicv2_force_probe not set\n");
++ return false;
++ }
++
++ alt = ioremap(cpuif_res.start, SZ_8K);
++ if (!alt)
++ return false;
++ if (!gic_check_gicv2(alt + SZ_4K)) {
++ /*
++ * The first page was that of a GICv2, and
++ * the second was *something*. Let's trust it
++ * to be a GICv2, and update the mapping.
++ */
++ pr_warn("GIC: GICv2 at %pa, but range is too small (broken DT?), assuming 8kB\n",
++ &cpuif_res.start);
++ iounmap(*base);
++ *base = alt;
++ return true;
++ }
++
++ /*
++ * We detected *two* initial GICv2 pages in a
++ * row. Could be a GICv2 aliased over two 64kB
++ * pages. Update the resource, map the iospace, and
++ * pray.
++ */
++ iounmap(alt);
++ alt = ioremap(cpuif_res.start, SZ_128K);
++ if (!alt)
++ return false;
++ pr_warn("GIC: Aliased GICv2 at %pa, trying to find the canonical range over 128kB\n",
++ &cpuif_res.start);
++ cpuif_res.end = cpuif_res.start + SZ_128K -1;
++ iounmap(*base);
++ *base = alt;
++ }
++ if (resource_size(&cpuif_res) == SZ_128K) {
+ /*
+- * Verify that we have the first 4kB of a GIC400
++ * Verify that we have the first 4kB of a GICv2
+ * aliased over the first 64kB by checking the
+ * GICC_IIDR register on both ends.
+ */
+- val_low = readl_relaxed(*base + GIC_CPU_IDENT);
+- val_high = readl_relaxed(*base + GIC_CPU_IDENT + 0xf000);
+- if ((val_low & 0xffff0fff) != 0x0202043B ||
+- val_low != val_high)
++ if (!gic_check_gicv2(*base) ||
++ !gic_check_gicv2(*base + 0xf000))
+ return false;
+
+ /*
+--
+2.19.0
+
diff --git a/patches/0109-KVM-arm-arm64-Check-that-system-supports-split-eoi-d.patch b/patches/0109-KVM-arm-arm64-Check-that-system-supports-split-eoi-d.patch
new file mode 100644
index 0000000..80ccc34
--- /dev/null
+++ b/patches/0109-KVM-arm-arm64-Check-that-system-supports-split-eoi-d.patch
@@ -0,0 +1,79 @@
+From 3ef51abc406abb6dba35604cd012afe200d20fe8 Mon Sep 17 00:00:00 2001
+From: Christoffer Dall <cdall@linaro.org>
+Date: Tue, 6 Dec 2016 22:00:52 +0100
+Subject: [PATCH 0109/1795] KVM: arm/arm64: Check that system supports split
+ eoi/deactivate
+
+Some systems without proper firmware and/or hardware description data
+don't support the split EOI and deactivate operation.
+
+On such systems, we cannot leave the physical interrupt active after the
+timer handler on the host has run, so we cannot support KVM with an
+in-kernel GIC with the timer changes we are about to introduce.
+
+This patch makes sure that trying to initialize the KVM GIC code will
+fail on such systems.
+
+Acked-by: Marc Zyngier <marc.zyngier@arm.com>
+Signed-off-by: Christoffer Dall <cdall@linaro.org>
+(cherry picked from commit d33a3c8c48c3264419a683885a27a5c85df35f12)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/irqchip/irq-gic-v3.c | 8 ++++++--
+ drivers/irqchip/irq-gic.c | 6 ++++--
+ 2 files changed, 10 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
+index 3d7374655587..2437497eaf4d 100644
+--- a/drivers/irqchip/irq-gic-v3.c
++++ b/drivers/irqchip/irq-gic-v3.c
+@@ -1231,7 +1231,9 @@ static int __init gic_of_init(struct device_node *node, struct device_node *pare
+ goto out_unmap_rdist;
+
+ gic_populate_ppi_partitions(node);
+- gic_of_setup_kvm_info(node);
++
++ if (static_key_true(&supports_deactivate))
++ gic_of_setup_kvm_info(node);
+ return 0;
+
+ out_unmap_rdist:
+@@ -1531,7 +1533,9 @@ gic_acpi_init(struct acpi_subtable_header *header, const unsigned long end)
+ goto out_fwhandle_free;
+
+ acpi_set_irq_model(ACPI_IRQ_MODEL_GIC, domain_handle);
+- gic_acpi_setup_kvm_info();
++
++ if (static_key_true(&supports_deactivate))
++ gic_acpi_setup_kvm_info();
+
+ return 0;
+
+diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
+index f641e8e2c78d..121af5cf688f 100644
+--- a/drivers/irqchip/irq-gic.c
++++ b/drivers/irqchip/irq-gic.c
+@@ -1420,7 +1420,8 @@ static void __init gic_of_setup_kvm_info(struct device_node *node)
+ if (ret)
+ return;
+
+- gic_set_kvm_info(&gic_v2_kvm_info);
++ if (static_key_true(&supports_deactivate))
++ gic_set_kvm_info(&gic_v2_kvm_info);
+ }
+
+ int __init
+@@ -1652,7 +1653,8 @@ static int __init gic_v2_acpi_init(struct acpi_subtable_header *header,
+ if (IS_ENABLED(CONFIG_ARM_GIC_V2M))
+ gicv2m_init(NULL, gic_data[0].domain);
+
+- gic_acpi_setup_kvm_info();
++ if (static_key_true(&supports_deactivate))
++ gic_acpi_setup_kvm_info();
+
+ return 0;
+ }
+--
+2.19.0
+
diff --git a/patches/0110-irqchip-renesas-intc-irqpin-Use-of_device_get_match_.patch b/patches/0110-irqchip-renesas-intc-irqpin-Use-of_device_get_match_.patch
new file mode 100644
index 0000000..ce9b7c1
--- /dev/null
+++ b/patches/0110-irqchip-renesas-intc-irqpin-Use-of_device_get_match_.patch
@@ -0,0 +1,51 @@
+From 448d24fe5279a114c233776bb1ed9b48f06811a7 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 4 Oct 2017 14:17:58 +0200
+Subject: [PATCH 0110/1795] irqchip/renesas-intc-irqpin: Use
+ of_device_get_match_data() helper
+
+Use the of_device_get_match_data() helper instead of open coding.
+
+Acked-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
+(cherry picked from commit 42a5968c0ae8f19906e16fa34ea9bdb6f5095166)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/irqchip/irq-renesas-intc-irqpin.c | 9 +++------
+ 1 file changed, 3 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/irqchip/irq-renesas-intc-irqpin.c b/drivers/irqchip/irq-renesas-intc-irqpin.c
+index 713177d97c7a..06f29cf5018a 100644
+--- a/drivers/irqchip/irq-renesas-intc-irqpin.c
++++ b/drivers/irqchip/irq-renesas-intc-irqpin.c
+@@ -389,9 +389,8 @@ MODULE_DEVICE_TABLE(of, intc_irqpin_dt_ids);
+
+ static int intc_irqpin_probe(struct platform_device *pdev)
+ {
+- const struct intc_irqpin_config *config = NULL;
++ const struct intc_irqpin_config *config;
+ struct device *dev = &pdev->dev;
+- const struct of_device_id *of_id;
+ struct intc_irqpin_priv *p;
+ struct intc_irqpin_iomem *i;
+ struct resource *io[INTC_IRQPIN_REG_NR];
+@@ -422,11 +421,9 @@ static int intc_irqpin_probe(struct platform_device *pdev)
+ p->pdev = pdev;
+ platform_set_drvdata(pdev, p);
+
+- of_id = of_match_device(intc_irqpin_dt_ids, dev);
+- if (of_id && of_id->data) {
+- config = of_id->data;
++ config = of_device_get_match_data(dev);
++ if (config)
+ p->needs_clk = config->needs_clk;
+- }
+
+ p->clk = devm_clk_get(dev, NULL);
+ if (IS_ERR(p->clk)) {
+--
+2.19.0
+
diff --git a/patches/0111-dt-bindings-irqchip-renesas-irqc-Document-R-Car-M3-W.patch b/patches/0111-dt-bindings-irqchip-renesas-irqc-Document-R-Car-M3-W.patch
new file mode 100644
index 0000000..62ac8c4
--- /dev/null
+++ b/patches/0111-dt-bindings-irqchip-renesas-irqc-Document-R-Car-M3-W.patch
@@ -0,0 +1,39 @@
+From 4cd3f709290d6723d6ef6f3c3a74f0ecfb52cc5d Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 6 Oct 2017 13:51:32 +0200
+Subject: [PATCH 0111/1795] dt-bindings: irqchip: renesas-irqc: Document R-Car
+ M3-W, V3M, D3 support
+
+Document support for the Interrupt Controller for Externel Devices
+(INTC-EX) in the Renesas M3-W (r8a7796), V3M (r8a77970), and D3
+(r8a77995) SoCs.
+
+No driver update is needed.
+
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
+(cherry picked from commit bea173e5acd73d536dd234b34328cd52c1cadaab)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ .../devicetree/bindings/interrupt-controller/renesas,irqc.txt | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt
+index e3f052d8c11a..33c9a10fdc91 100644
+--- a/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt
++++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt
+@@ -13,6 +13,9 @@ Required properties:
+ - "renesas,irqc-r8a7793" (R-Car M2-N)
+ - "renesas,irqc-r8a7794" (R-Car E2)
+ - "renesas,intc-ex-r8a7795" (R-Car H3)
++ - "renesas,intc-ex-r8a7796" (R-Car M3-W)
++ - "renesas,intc-ex-r8a77970" (R-Car V3M)
++ - "renesas,intc-ex-r8a77995" (R-Car D3)
+ - #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in
+ interrupts.txt in this directory
+ - clocks: Must contain a reference to the functional clock.
+--
+2.19.0
+
diff --git a/patches/0112-mtd-spi-nor-Add-support-for-mr25h128.patch b/patches/0112-mtd-spi-nor-Add-support-for-mr25h128.patch
new file mode 100644
index 0000000..6b6ce04
--- /dev/null
+++ b/patches/0112-mtd-spi-nor-Add-support-for-mr25h128.patch
@@ -0,0 +1,57 @@
+From 41668e64c5392e0b02acd4e85bcf65b7f8897950 Mon Sep 17 00:00:00 2001
+From: Philipp Puschmann <pp@emlix.com>
+Date: Thu, 19 Oct 2017 10:12:47 +0200
+Subject: [PATCH 0112/1795] mtd: spi-nor: Add support for mr25h128
+
+Add Everspin mr25h128 16KB MRAM to the list of supported chips.
+
+Signed-off-by: Philipp Puschmann <pp@emlix.com>
+Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
+(cherry picked from commit 282e45dc64d1832c9b51d2c6f6eb0a634c924fa7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt | 1 +
+ drivers/mtd/devices/m25p80.c | 1 +
+ drivers/mtd/spi-nor/spi-nor.c | 1 +
+ 3 files changed, 3 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt
+index 9ce35af8507c..956bb046e599 100644
+--- a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt
++++ b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt
+@@ -13,6 +13,7 @@ Required properties:
+ at25df321a
+ at25df641
+ at26df081a
++ mr25h128
+ mr25h256
+ mr25h10
+ mr25h40
+diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
+index 00eea6fd379c..dbe6a1de2bb8 100644
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -359,6 +359,7 @@ static const struct spi_device_id m25p_ids[] = {
+ {"m25p32-nonjedec"}, {"m25p64-nonjedec"}, {"m25p128-nonjedec"},
+
+ /* Everspin MRAMs (non-JEDEC) */
++ { "mr25h128" }, /* 128 Kib, 40 MHz */
+ { "mr25h256" }, /* 256 Kib, 40 MHz */
+ { "mr25h10" }, /* 1 Mib, 40 MHz */
+ { "mr25h40" }, /* 4 Mib, 40 MHz */
+diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
+index 19c000722cbc..52056198f457 100644
+--- a/drivers/mtd/spi-nor/spi-nor.c
++++ b/drivers/mtd/spi-nor/spi-nor.c
+@@ -964,6 +964,7 @@ static const struct flash_info spi_nor_ids[] = {
+ { "f25l64qa", INFO(0x8c4117, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_HAS_LOCK) },
+
+ /* Everspin */
++ { "mr25h128", CAT25_INFO( 16 * 1024, 1, 256, 2, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
+ { "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
+ { "mr25h10", CAT25_INFO(128 * 1024, 1, 256, 3, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
+ { "mr25h40", CAT25_INFO(512 * 1024, 1, 256, 3, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
+--
+2.19.0
+
diff --git a/patches/0113-net-phy-micrel-check-return-code-in-flp-center-funct.patch b/patches/0113-net-phy-micrel-check-return-code-in-flp-center-funct.patch
new file mode 100644
index 0000000..0bb9fdf
--- /dev/null
+++ b/patches/0113-net-phy-micrel-check-return-code-in-flp-center-funct.patch
@@ -0,0 +1,45 @@
+From b055902a4ba6a0a334604285cf9700ae9f96527b Mon Sep 17 00:00:00 2001
+From: Max Uvarov <muvarov@gmail.com>
+Date: Thu, 30 Nov 2017 13:08:29 +0300
+Subject: [PATCH 0113/1795] net: phy-micrel: check return code in flp center
+ function
+
+Fix obvious typo that first return value is set but not checked.
+
+Signed-off-by: Max Uvarov <muvarov@gmail.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit a0da456bbf95d2a9294799bb05c61bfb24736bb7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/net/phy/micrel.c | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
+index 6c45ff650ec7..422ff6333c52 100644
+--- a/drivers/net/phy/micrel.c
++++ b/drivers/net/phy/micrel.c
+@@ -496,16 +496,18 @@ static int ksz9031_of_load_skew_values(struct phy_device *phydev,
+ return ksz9031_extended_write(phydev, OP_DATA, 2, reg, newval);
+ }
+
++/* Center KSZ9031RNX FLP timing at 16ms. */
+ static int ksz9031_center_flp_timing(struct phy_device *phydev)
+ {
+ int result;
+
+- /* Center KSZ9031RNX FLP timing at 16ms. */
+ result = ksz9031_extended_write(phydev, OP_DATA, 0,
+ MII_KSZ9031RN_FLP_BURST_TX_HI, 0x0006);
++ if (result)
++ return result;
++
+ result = ksz9031_extended_write(phydev, OP_DATA, 0,
+ MII_KSZ9031RN_FLP_BURST_TX_LO, 0x1A80);
+-
+ if (result)
+ return result;
+
+--
+2.19.0
+
diff --git a/patches/0114-phy-rcar-gen2-Add-r8a7743-5-support.patch b/patches/0114-phy-rcar-gen2-Add-r8a7743-5-support.patch
new file mode 100644
index 0000000..d04fd9e
--- /dev/null
+++ b/patches/0114-phy-rcar-gen2-Add-r8a7743-5-support.patch
@@ -0,0 +1,43 @@
+From 1adef86be1c8d335cf1ddace3fb5c0da38bd967f Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Mon, 9 Oct 2017 11:22:23 +0100
+Subject: [PATCH 0114/1795] phy: rcar-gen2: Add r8a7743/5 support
+
+Add USB PHY support for r8a7743/5 SoC. Renesas RZ/G1[ME] (R8A7743/5)
+USB PHY is identical to the R-Car Gen2 family.
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Acked-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Rob Herring <robh@kernel.org>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
+(cherry picked from commit f7da4e6d29539bad2c29dd8ccb4ac628fe19f82b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt | 7 +++++--
+ 1 file changed, 5 insertions(+), 2 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt b/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt
+index 91da947ae9b6..eeb9e1874ea6 100644
+--- a/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt
++++ b/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt
+@@ -4,10 +4,13 @@ This file provides information on what the device node for the R-Car generation
+ 2 USB PHY contains.
+
+ Required properties:
+-- compatible: "renesas,usb-phy-r8a7790" if the device is a part of R8A7790 SoC.
++- compatible: "renesas,usb-phy-r8a7743" if the device is a part of R8A7743 SoC.
++ "renesas,usb-phy-r8a7745" if the device is a part of R8A7745 SoC.
++ "renesas,usb-phy-r8a7790" if the device is a part of R8A7790 SoC.
+ "renesas,usb-phy-r8a7791" if the device is a part of R8A7791 SoC.
+ "renesas,usb-phy-r8a7794" if the device is a part of R8A7794 SoC.
+- "renesas,rcar-gen2-usb-phy" for a generic R-Car Gen2 compatible device.
++ "renesas,rcar-gen2-usb-phy" for a generic R-Car Gen2 or
++ RZ/G1 compatible device.
+
+ When compatible with the generic version, nodes must list the
+ SoC-specific version corresponding to the platform first
+--
+2.19.0
+
diff --git a/patches/0115-phy-rcar-gen3-usb2-select-USB_COMMON.patch b/patches/0115-phy-rcar-gen3-usb2-select-USB_COMMON.patch
new file mode 100644
index 0000000..1c5ce8c
--- /dev/null
+++ b/patches/0115-phy-rcar-gen3-usb2-select-USB_COMMON.patch
@@ -0,0 +1,42 @@
+From d164b3a815f713ec83339d9c5c141726fb21f5ea Mon Sep 17 00:00:00 2001
+From: Arnd Bergmann <arnd@arndb.de>
+Date: Thu, 2 Nov 2017 12:56:36 +0100
+Subject: [PATCH 0115/1795] phy: rcar-gen3-usb2: select USB_COMMON
+
+When USB is disabled, we get a link error for this driver
+because of the added OTG support
+
+drivers/phy/renesas/phy-rcar-gen3-usb2.o: In function `rcar_gen3_phy_usb2_probe':
+phy-rcar-gen3-usb2.c:(.text+0x250): undefined reference to `of_usb_get_dr_mode_by_phy'
+
+Other phy drivers select USB_COMMON for this, so let's do the same
+here.
+
+Fixes: 7e0540f41332 ("phy: rcar-gen3-usb2: check dr_mode for otg mode")
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
+(cherry picked from commit 2b88212c4cc67ff33dec5bb4d690044b97a5f979)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/phy/renesas/Kconfig | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/drivers/phy/renesas/Kconfig b/drivers/phy/renesas/Kconfig
+index cb09245e9b4c..c845facacb06 100644
+--- a/drivers/phy/renesas/Kconfig
++++ b/drivers/phy/renesas/Kconfig
+@@ -12,7 +12,9 @@ config PHY_RCAR_GEN3_USB2
+ tristate "Renesas R-Car generation 3 USB 2.0 PHY driver"
+ depends on ARCH_RENESAS
+ depends on EXTCON
++ depends on USB_SUPPORT
+ select GENERIC_PHY
++ select USB_COMMON
+ help
+ Support for USB 2.0 PHY found on Renesas R-Car generation 3 SoCs.
+
+--
+2.19.0
+
diff --git a/patches/0116-extcon-Split-out-extcon-header-file-for-consumer-and.patch b/patches/0116-extcon-Split-out-extcon-header-file-for-consumer-and.patch
new file mode 100644
index 0000000..ee27c39
--- /dev/null
+++ b/patches/0116-extcon-Split-out-extcon-header-file-for-consumer-and.patch
@@ -0,0 +1,724 @@
+From 811e26d8f942680e9f9faed1b6bb91bd8702cdcc Mon Sep 17 00:00:00 2001
+From: Chanwoo Choi <cw00.choi@samsung.com>
+Date: Thu, 21 Sep 2017 12:11:24 +0900
+Subject: [PATCH 0116/1795] extcon: Split out extcon header file for consumer
+ and provider device
+
+The extcon has two type of extcon devices as following.
+- 'extcon provider deivce' adds new extcon device and detect the
+ state/properties of external connector. Also, it notifies the
+ state/properties to the extcon consumer device.
+- 'extcon consumer device' gets the change state/properties
+ from extcon provider device.
+Prior to that, include/linux/extcon.h contains all exported API for
+both provider and consumer device driver. To clarify the meaning of
+header file and to remove the wrong use-case on consumer device,
+this patch separates into extcon.h and extcon-provider.h.
+
+[Description for include/linux/{extcon.h|extcon-provider.h}]
+- extcon.h includes the extcon API and data structure for extcon consumer
+ device driver. This header file contains the following APIs:
+ : Register/unregister the notifier to catch the change of extcon device
+ : Get the extcon device instance
+ : Get the extcon device name
+ : Get the state of each external connector
+ : Get the property value of each external connector
+ : Get the property capability of each external connector
+
+- extcon-provider.h includes the extcon API and data structure for extcon
+ provider device driver. This header file contains the following APIs:
+ : Include 'include/linux/extcon.h'
+ : Allocate the memory for extcon device instance
+ : Register/unregister extcon device
+ : Set the state of each external connector
+ : Set the property value of each external connector
+ : Set the property capability of each external connector
+
+Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
+Acked-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
+Acked-by: Chen-Yu Tsai <wens@csie.org>
+Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
+Acked-by: Lee Jones <lee.jones@linaro.org>
+Acked-by: Felipe Balbi <felipe.balbi@linux.intel.com>
+Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
+(cherry picked from commit 176aa36012135d172394a928a03fb03dfecd83f9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/extcon/extcon-adc-jack.c | 2 +-
+ drivers/extcon/extcon-arizona.c | 2 +-
+ drivers/extcon/extcon-axp288.c | 2 +-
+ drivers/extcon/extcon-gpio.c | 2 +-
+ drivers/extcon/extcon-intel-cht-wc.c | 2 +-
+ drivers/extcon/extcon-intel-int3496.c | 2 +-
+ drivers/extcon/extcon-max14577.c | 2 +-
+ drivers/extcon/extcon-max3355.c | 2 +-
+ drivers/extcon/extcon-max77693.c | 2 +-
+ drivers/extcon/extcon-max77843.c | 2 +-
+ drivers/extcon/extcon-max8997.c | 2 +-
+ drivers/extcon/extcon-qcom-spmi-misc.c | 2 +-
+ drivers/extcon/extcon-rt8973a.c | 2 +-
+ drivers/extcon/extcon-sm5502.c | 2 +-
+ drivers/extcon/extcon-usb-gpio.c | 2 +-
+ drivers/extcon/extcon-usbc-cros-ec.c | 2 +-
+ drivers/extcon/extcon.h | 2 +-
+ drivers/phy/allwinner/phy-sun4i-usb.c | 2 +-
+ drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c | 2 +-
+ drivers/phy/renesas/phy-rcar-gen3-usb2.c | 2 +-
+ drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 2 +-
+ drivers/power/supply/qcom_smbb.c | 2 +-
+ drivers/usb/gadget/udc/renesas_usb3.c | 2 +-
+ drivers/usb/phy/phy-tahvo.c | 2 +-
+ include/linux/extcon-provider.h | 142 ++++++++++++++++++
+ include/linux/extcon.h | 109 +-------------
+ include/linux/mfd/palmas.h | 2 +-
+ 27 files changed, 172 insertions(+), 129 deletions(-)
+ create mode 100644 include/linux/extcon-provider.h
+
+diff --git a/drivers/extcon/extcon-adc-jack.c b/drivers/extcon/extcon-adc-jack.c
+index 6f6537ab0a79..3877d86c746a 100644
+--- a/drivers/extcon/extcon-adc-jack.c
++++ b/drivers/extcon/extcon-adc-jack.c
+@@ -26,7 +26,7 @@
+ #include <linux/workqueue.h>
+ #include <linux/iio/consumer.h>
+ #include <linux/extcon/extcon-adc-jack.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+
+ /**
+ * struct adc_jack_data - internal data for adc_jack device driver
+diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c
+index f84da4a17724..da0e9bc4262f 100644
+--- a/drivers/extcon/extcon-arizona.c
++++ b/drivers/extcon/extcon-arizona.c
+@@ -27,7 +27,7 @@
+ #include <linux/pm_runtime.h>
+ #include <linux/property.h>
+ #include <linux/regulator/consumer.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+
+ #include <sound/soc.h>
+
+diff --git a/drivers/extcon/extcon-axp288.c b/drivers/extcon/extcon-axp288.c
+index f4fd03e58e37..981fba56bc18 100644
+--- a/drivers/extcon/extcon-axp288.c
++++ b/drivers/extcon/extcon-axp288.c
+@@ -22,7 +22,7 @@
+ #include <linux/platform_device.h>
+ #include <linux/property.h>
+ #include <linux/notifier.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/regmap.h>
+ #include <linux/gpio.h>
+ #include <linux/gpio/consumer.h>
+diff --git a/drivers/extcon/extcon-gpio.c b/drivers/extcon/extcon-gpio.c
+index ebed22f22d75..ab770adcca7e 100644
+--- a/drivers/extcon/extcon-gpio.c
++++ b/drivers/extcon/extcon-gpio.c
+@@ -17,7 +17,7 @@
+ * GNU General Public License for more details.
+ */
+
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/extcon/extcon-gpio.h>
+ #include <linux/gpio.h>
+ #include <linux/gpio/consumer.h>
+diff --git a/drivers/extcon/extcon-intel-cht-wc.c b/drivers/extcon/extcon-intel-cht-wc.c
+index 60baaf693103..b7e9ea377d70 100644
+--- a/drivers/extcon/extcon-intel-cht-wc.c
++++ b/drivers/extcon/extcon-intel-cht-wc.c
+@@ -15,7 +15,7 @@
+ * more details.
+ */
+
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/interrupt.h>
+ #include <linux/kernel.h>
+ #include <linux/mfd/intel_soc_pmic.h>
+diff --git a/drivers/extcon/extcon-intel-int3496.c b/drivers/extcon/extcon-intel-int3496.c
+index a6661097b2f9..191e99f06a9a 100644
+--- a/drivers/extcon/extcon-intel-int3496.c
++++ b/drivers/extcon/extcon-intel-int3496.c
+@@ -19,7 +19,7 @@
+ */
+
+ #include <linux/acpi.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/gpio.h>
+ #include <linux/interrupt.h>
+ #include <linux/module.h>
+diff --git a/drivers/extcon/extcon-max14577.c b/drivers/extcon/extcon-max14577.c
+index f6414b7fa5bc..6c2c9996eb71 100644
+--- a/drivers/extcon/extcon-max14577.c
++++ b/drivers/extcon/extcon-max14577.c
+@@ -23,7 +23,7 @@
+ #include <linux/platform_device.h>
+ #include <linux/mfd/max14577.h>
+ #include <linux/mfd/max14577-private.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+
+ #define DELAY_MS_DEFAULT 17000 /* unit: millisecond */
+
+diff --git a/drivers/extcon/extcon-max3355.c b/drivers/extcon/extcon-max3355.c
+index 533e16a952b8..0aa410836f4e 100644
+--- a/drivers/extcon/extcon-max3355.c
++++ b/drivers/extcon/extcon-max3355.c
+@@ -9,7 +9,7 @@
+ * may be copied, distributed, and modified under those terms.
+ */
+
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/gpio.h>
+ #include <linux/gpio/consumer.h>
+ #include <linux/interrupt.h>
+diff --git a/drivers/extcon/extcon-max77693.c b/drivers/extcon/extcon-max77693.c
+index 7a5856809047..643411066ad9 100644
+--- a/drivers/extcon/extcon-max77693.c
++++ b/drivers/extcon/extcon-max77693.c
+@@ -26,7 +26,7 @@
+ #include <linux/mfd/max77693.h>
+ #include <linux/mfd/max77693-common.h>
+ #include <linux/mfd/max77693-private.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/regmap.h>
+ #include <linux/irqdomain.h>
+
+diff --git a/drivers/extcon/extcon-max77843.c b/drivers/extcon/extcon-max77843.c
+index 6e722d552cf1..28f251ff0fa2 100644
+--- a/drivers/extcon/extcon-max77843.c
++++ b/drivers/extcon/extcon-max77843.c
+@@ -11,7 +11,7 @@
+ * (at your option) any later version.
+ */
+
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/i2c.h>
+ #include <linux/interrupt.h>
+ #include <linux/kernel.h>
+diff --git a/drivers/extcon/extcon-max8997.c b/drivers/extcon/extcon-max8997.c
+index 4a0612fb9c07..8152790d72e1 100644
+--- a/drivers/extcon/extcon-max8997.c
++++ b/drivers/extcon/extcon-max8997.c
+@@ -25,7 +25,7 @@
+ #include <linux/kobject.h>
+ #include <linux/mfd/max8997.h>
+ #include <linux/mfd/max8997-private.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/irqdomain.h>
+
+ #define DEV_NAME "max8997-muic"
+diff --git a/drivers/extcon/extcon-qcom-spmi-misc.c b/drivers/extcon/extcon-qcom-spmi-misc.c
+index b8cde096a808..660bbf163bf5 100644
+--- a/drivers/extcon/extcon-qcom-spmi-misc.c
++++ b/drivers/extcon/extcon-qcom-spmi-misc.c
+@@ -15,7 +15,7 @@
+ * GNU General Public License for more details.
+ */
+
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/init.h>
+ #include <linux/interrupt.h>
+ #include <linux/kernel.h>
+diff --git a/drivers/extcon/extcon-rt8973a.c b/drivers/extcon/extcon-rt8973a.c
+index eaa355e7d9e4..e059bd5f2041 100644
+--- a/drivers/extcon/extcon-rt8973a.c
++++ b/drivers/extcon/extcon-rt8973a.c
+@@ -20,7 +20,7 @@
+ #include <linux/platform_device.h>
+ #include <linux/regmap.h>
+ #include <linux/slab.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+
+ #include "extcon-rt8973a.h"
+
+diff --git a/drivers/extcon/extcon-sm5502.c b/drivers/extcon/extcon-sm5502.c
+index 106ef0297b53..0cfb5a3efdf6 100644
+--- a/drivers/extcon/extcon-sm5502.c
++++ b/drivers/extcon/extcon-sm5502.c
+@@ -19,7 +19,7 @@
+ #include <linux/platform_device.h>
+ #include <linux/regmap.h>
+ #include <linux/slab.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+
+ #include "extcon-sm5502.h"
+
+diff --git a/drivers/extcon/extcon-usb-gpio.c b/drivers/extcon/extcon-usb-gpio.c
+index 9c925b05b7aa..53762864a9f7 100644
+--- a/drivers/extcon/extcon-usb-gpio.c
++++ b/drivers/extcon/extcon-usb-gpio.c
+@@ -14,7 +14,7 @@
+ * GNU General Public License for more details.
+ */
+
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/gpio.h>
+ #include <linux/gpio/consumer.h>
+ #include <linux/init.h>
+diff --git a/drivers/extcon/extcon-usbc-cros-ec.c b/drivers/extcon/extcon-usbc-cros-ec.c
+index 598956f1dcae..6187f731b29d 100644
+--- a/drivers/extcon/extcon-usbc-cros-ec.c
++++ b/drivers/extcon/extcon-usbc-cros-ec.c
+@@ -14,7 +14,7 @@
+ * GNU General Public License for more details.
+ */
+
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/kernel.h>
+ #include <linux/mfd/cros_ec.h>
+ #include <linux/module.h>
+diff --git a/drivers/extcon/extcon.h b/drivers/extcon/extcon.h
+index 61358479bfcc..93b5e0306966 100644
+--- a/drivers/extcon/extcon.h
++++ b/drivers/extcon/extcon.h
+@@ -2,7 +2,7 @@
+ #ifndef __LINUX_EXTCON_INTERNAL_H__
+ #define __LINUX_EXTCON_INTERNAL_H__
+
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+
+ /**
+ * struct extcon_dev - An extcon device represents one external connector.
+diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c
+index afedb8cd1990..263e2562de3b 100644
+--- a/drivers/phy/allwinner/phy-sun4i-usb.c
++++ b/drivers/phy/allwinner/phy-sun4i-usb.c
+@@ -24,7 +24,7 @@
+ #include <linux/clk.h>
+ #include <linux/delay.h>
+ #include <linux/err.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/io.h>
+ #include <linux/interrupt.h>
+ #include <linux/kernel.h>
+diff --git a/drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c b/drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c
+index d099a0c8cee5..7ceea5ae2704 100644
+--- a/drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c
++++ b/drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c
+@@ -12,7 +12,7 @@
+ */
+
+ #include <linux/delay.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/gpio.h>
+ #include <linux/gpio/consumer.h>
+ #include <linux/init.h>
+diff --git a/drivers/phy/renesas/phy-rcar-gen3-usb2.c b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
+index 54c34298a000..b33e2994ccce 100644
+--- a/drivers/phy/renesas/phy-rcar-gen3-usb2.c
++++ b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
+@@ -12,7 +12,7 @@
+ * published by the Free Software Foundation.
+ */
+
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/interrupt.h>
+ #include <linux/io.h>
+ #include <linux/module.h>
+diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+index ee7ce5ee53f9..5049dac79bd0 100644
+--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
++++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+@@ -17,7 +17,7 @@
+ #include <linux/clk.h>
+ #include <linux/clk-provider.h>
+ #include <linux/delay.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/interrupt.h>
+ #include <linux/io.h>
+ #include <linux/gpio/consumer.h>
+diff --git a/drivers/power/supply/qcom_smbb.c b/drivers/power/supply/qcom_smbb.c
+index f6a0d245731d..11de691b9a71 100644
+--- a/drivers/power/supply/qcom_smbb.c
++++ b/drivers/power/supply/qcom_smbb.c
+@@ -34,7 +34,7 @@
+ #include <linux/power_supply.h>
+ #include <linux/regmap.h>
+ #include <linux/slab.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/regulator/driver.h>
+
+ #define SMBB_CHG_VMAX 0x040
+diff --git a/drivers/usb/gadget/udc/renesas_usb3.c b/drivers/usb/gadget/udc/renesas_usb3.c
+index c12a1a6554ba..8de7d72b130b 100644
+--- a/drivers/usb/gadget/udc/renesas_usb3.c
++++ b/drivers/usb/gadget/udc/renesas_usb3.c
+@@ -12,7 +12,7 @@
+ #include <linux/delay.h>
+ #include <linux/dma-mapping.h>
+ #include <linux/err.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/interrupt.h>
+ #include <linux/io.h>
+ #include <linux/module.h>
+diff --git a/drivers/usb/phy/phy-tahvo.c b/drivers/usb/phy/phy-tahvo.c
+index 1ec00eae339a..bf2c364867a0 100644
+--- a/drivers/usb/phy/phy-tahvo.c
++++ b/drivers/usb/phy/phy-tahvo.c
+@@ -23,7 +23,7 @@
+ #include <linux/io.h>
+ #include <linux/clk.h>
+ #include <linux/usb.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/kernel.h>
+ #include <linux/module.h>
+ #include <linux/usb/otg.h>
+diff --git a/include/linux/extcon-provider.h b/include/linux/extcon-provider.h
+new file mode 100644
+index 000000000000..2feca5881fa7
+--- /dev/null
++++ b/include/linux/extcon-provider.h
+@@ -0,0 +1,142 @@
++/*
++ * External Connector (extcon) framework
++ * - linux/include/linux/extcon-provider.h for extcon provider device driver.
++ *
++ * Copyright (C) 2017 Samsung Electronics
++ * Author: Chanwoo Choi <cw00.choi@samsung.com>
++ *
++ * This software is licensed under the terms of the GNU General Public
++ * License version 2, as published by the Free Software Foundation, and
++ * may be copied, distributed, and modified under those terms.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ */
++
++#ifndef __LINUX_EXTCON_PROVIDER_H__
++#define __LINUX_EXTCON_PROVIDER_H__
++
++#include <linux/extcon.h>
++
++struct extcon_dev;
++
++#if IS_ENABLED(CONFIG_EXTCON)
++
++/* Following APIs register/unregister the extcon device. */
++extern int extcon_dev_register(struct extcon_dev *edev);
++extern void extcon_dev_unregister(struct extcon_dev *edev);
++extern int devm_extcon_dev_register(struct device *dev,
++ struct extcon_dev *edev);
++extern void devm_extcon_dev_unregister(struct device *dev,
++ struct extcon_dev *edev);
++
++/* Following APIs allocate/free the memory of the extcon device. */
++extern struct extcon_dev *extcon_dev_allocate(const unsigned int *cable);
++extern void extcon_dev_free(struct extcon_dev *edev);
++extern struct extcon_dev *devm_extcon_dev_allocate(struct device *dev,
++ const unsigned int *cable);
++extern void devm_extcon_dev_free(struct device *dev, struct extcon_dev *edev);
++
++/* Synchronize the state and property value for each external connector. */
++extern int extcon_sync(struct extcon_dev *edev, unsigned int id);
++
++/*
++ * Following APIs set the connected state of each external connector.
++ * The 'id' argument indicates the defined external connector.
++ */
++extern int extcon_set_state(struct extcon_dev *edev, unsigned int id,
++ bool state);
++extern int extcon_set_state_sync(struct extcon_dev *edev, unsigned int id,
++ bool state);
++
++/*
++ * Following APIs set the property of each external connector.
++ * The 'id' argument indicates the defined external connector
++ * and the 'prop' indicates the extcon property.
++ *
++ * And extcon_set_property_capability() set the capability of the property
++ * for each external connector. They are used to set the capability of the
++ * property of each external connector based on the id and property.
++ */
++extern int extcon_set_property(struct extcon_dev *edev, unsigned int id,
++ unsigned int prop,
++ union extcon_property_value prop_val);
++extern int extcon_set_property_sync(struct extcon_dev *edev, unsigned int id,
++ unsigned int prop,
++ union extcon_property_value prop_val);
++extern int extcon_set_property_capability(struct extcon_dev *edev,
++ unsigned int id, unsigned int prop);
++
++#else /* CONFIG_EXTCON */
++static inline int extcon_dev_register(struct extcon_dev *edev)
++{
++ return 0;
++}
++
++static inline void extcon_dev_unregister(struct extcon_dev *edev) { }
++
++static inline int devm_extcon_dev_register(struct device *dev,
++ struct extcon_dev *edev)
++{
++ return -EINVAL;
++}
++
++static inline void devm_extcon_dev_unregister(struct device *dev,
++ struct extcon_dev *edev) { }
++
++static inline struct extcon_dev *extcon_dev_allocate(const unsigned int *cable)
++{
++ return ERR_PTR(-ENOSYS);
++}
++
++static inline void extcon_dev_free(struct extcon_dev *edev) { }
++
++static inline struct extcon_dev *devm_extcon_dev_allocate(struct device *dev,
++ const unsigned int *cable)
++{
++ return ERR_PTR(-ENOSYS);
++}
++
++static inline void devm_extcon_dev_free(struct extcon_dev *edev) { }
++
++
++static inline int extcon_set_state(struct extcon_dev *edev, unsigned int id,
++ bool state)
++{
++ return 0;
++}
++
++static inline int extcon_set_state_sync(struct extcon_dev *edev, unsigned int id,
++ bool state)
++{
++ return 0;
++}
++
++static inline int extcon_sync(struct extcon_dev *edev, unsigned int id)
++{
++ return 0;
++}
++
++static inline int extcon_set_property(struct extcon_dev *edev, unsigned int id,
++ unsigned int prop,
++ union extcon_property_value prop_val)
++{
++ return 0;
++}
++
++static inline int extcon_set_property_sync(struct extcon_dev *edev,
++ unsigned int id, unsigned int prop,
++ union extcon_property_value prop_val)
++{
++ return 0;
++}
++
++static inline int extcon_set_property_capability(struct extcon_dev *edev,
++ unsigned int id, unsigned int prop)
++{
++ return 0;
++}
++#endif /* CONFIG_EXTCON */
++#endif /* __LINUX_EXTCON_PROVIDER_H__ */
+diff --git a/include/linux/extcon.h b/include/linux/extcon.h
+index 744d60ca80c3..6d94e82c8ad9 100644
+--- a/include/linux/extcon.h
++++ b/include/linux/extcon.h
+@@ -1,5 +1,6 @@
+ /*
+ * External Connector (extcon) framework
++ * - linux/include/linux/extcon.h for extcon consumer device driver.
+ *
+ * Copyright (C) 2015 Samsung Electronics
+ * Author: Chanwoo Choi <cw00.choi@samsung.com>
+@@ -170,61 +171,29 @@ union extcon_property_value {
+ int intval; /* type : integer (intval) */
+ };
+
+-struct extcon_cable;
+ struct extcon_dev;
+
+ #if IS_ENABLED(CONFIG_EXTCON)
+-
+-/* Following APIs register/unregister the extcon device. */
+-extern int extcon_dev_register(struct extcon_dev *edev);
+-extern void extcon_dev_unregister(struct extcon_dev *edev);
+-extern int devm_extcon_dev_register(struct device *dev,
+- struct extcon_dev *edev);
+-extern void devm_extcon_dev_unregister(struct device *dev,
+- struct extcon_dev *edev);
+-
+-/* Following APIs allocate/free the memory of the extcon device. */
+-extern struct extcon_dev *extcon_dev_allocate(const unsigned int *cable);
+-extern void extcon_dev_free(struct extcon_dev *edev);
+-extern struct extcon_dev *devm_extcon_dev_allocate(struct device *dev,
+- const unsigned int *cable);
+-extern void devm_extcon_dev_free(struct device *dev, struct extcon_dev *edev);
+-
+-/* Synchronize the state and property value for each external connector. */
+-extern int extcon_sync(struct extcon_dev *edev, unsigned int id);
+-
+ /*
+- * Following APIs get/set the connected state of each external connector.
++ * Following APIs get the connected state of each external connector.
+ * The 'id' argument indicates the defined external connector.
+ */
+ extern int extcon_get_state(struct extcon_dev *edev, unsigned int id);
+-extern int extcon_set_state(struct extcon_dev *edev, unsigned int id,
+- bool state);
+-extern int extcon_set_state_sync(struct extcon_dev *edev, unsigned int id,
+- bool state);
+
+ /*
+- * Following APIs get/set the property of each external connector.
++ * Following APIs get the property of each external connector.
+ * The 'id' argument indicates the defined external connector
+ * and the 'prop' indicates the extcon property.
+ *
+- * And extcon_get/set_property_capability() set the capability of the property
+- * for each external connector. They are used to set the capability of the
++ * And extcon_get_property_capability() get the capability of the property
++ * for each external connector. They are used to get the capability of the
+ * property of each external connector based on the id and property.
+ */
+ extern int extcon_get_property(struct extcon_dev *edev, unsigned int id,
+ unsigned int prop,
+ union extcon_property_value *prop_val);
+-extern int extcon_set_property(struct extcon_dev *edev, unsigned int id,
+- unsigned int prop,
+- union extcon_property_value prop_val);
+-extern int extcon_set_property_sync(struct extcon_dev *edev, unsigned int id,
+- unsigned int prop,
+- union extcon_property_value prop_val);
+ extern int extcon_get_property_capability(struct extcon_dev *edev,
+ unsigned int id, unsigned int prop);
+-extern int extcon_set_property_capability(struct extcon_dev *edev,
+- unsigned int id, unsigned int prop);
+
+ /*
+ * Following APIs register the notifier block in order to detect
+@@ -268,79 +237,17 @@ extern struct extcon_dev *extcon_get_edev_by_phandle(struct device *dev,
+ extern const char *extcon_get_edev_name(struct extcon_dev *edev);
+
+ #else /* CONFIG_EXTCON */
+-static inline int extcon_dev_register(struct extcon_dev *edev)
+-{
+- return 0;
+-}
+-
+-static inline void extcon_dev_unregister(struct extcon_dev *edev) { }
+-
+-static inline int devm_extcon_dev_register(struct device *dev,
+- struct extcon_dev *edev)
+-{
+- return -EINVAL;
+-}
+-
+-static inline void devm_extcon_dev_unregister(struct device *dev,
+- struct extcon_dev *edev) { }
+-
+-static inline struct extcon_dev *extcon_dev_allocate(const unsigned int *cable)
+-{
+- return ERR_PTR(-ENOSYS);
+-}
+-
+-static inline void extcon_dev_free(struct extcon_dev *edev) { }
+-
+-static inline struct extcon_dev *devm_extcon_dev_allocate(struct device *dev,
+- const unsigned int *cable)
+-{
+- return ERR_PTR(-ENOSYS);
+-}
+-
+-static inline void devm_extcon_dev_free(struct extcon_dev *edev) { }
+-
+-
+ static inline int extcon_get_state(struct extcon_dev *edev, unsigned int id)
+ {
+ return 0;
+ }
+
+-static inline int extcon_set_state(struct extcon_dev *edev, unsigned int id,
+- bool state)
+-{
+- return 0;
+-}
+-
+-static inline int extcon_set_state_sync(struct extcon_dev *edev, unsigned int id,
+- bool state)
+-{
+- return 0;
+-}
+-
+-static inline int extcon_sync(struct extcon_dev *edev, unsigned int id)
+-{
+- return 0;
+-}
+-
+ static inline int extcon_get_property(struct extcon_dev *edev, unsigned int id,
+ unsigned int prop,
+ union extcon_property_value *prop_val)
+ {
+ return 0;
+ }
+-static inline int extcon_set_property(struct extcon_dev *edev, unsigned int id,
+- unsigned int prop,
+- union extcon_property_value prop_val)
+-{
+- return 0;
+-}
+-
+-static inline int extcon_set_property_sync(struct extcon_dev *edev,
+- unsigned int id, unsigned int prop,
+- union extcon_property_value prop_val)
+-{
+- return 0;
+-}
+
+ static inline int extcon_get_property_capability(struct extcon_dev *edev,
+ unsigned int id, unsigned int prop)
+@@ -348,12 +255,6 @@ static inline int extcon_get_property_capability(struct extcon_dev *edev,
+ return 0;
+ }
+
+-static inline int extcon_set_property_capability(struct extcon_dev *edev,
+- unsigned int id, unsigned int prop)
+-{
+- return 0;
+-}
+-
+ static inline int extcon_register_notifier(struct extcon_dev *edev,
+ unsigned int id, struct notifier_block *nb)
+ {
+diff --git a/include/linux/mfd/palmas.h b/include/linux/mfd/palmas.h
+index 6dec43826303..3c8568aa82a5 100644
+--- a/include/linux/mfd/palmas.h
++++ b/include/linux/mfd/palmas.h
+@@ -20,7 +20,7 @@
+ #include <linux/leds.h>
+ #include <linux/regmap.h>
+ #include <linux/regulator/driver.h>
+-#include <linux/extcon.h>
++#include <linux/extcon-provider.h>
+ #include <linux/of_gpio.h>
+ #include <linux/usb/phy_companion.h>
+
+--
+2.19.0
+
diff --git a/patches/0117-phy-rcar-gen3-usb2-check-dr_mode-for-otg-mode.patch b/patches/0117-phy-rcar-gen3-usb2-check-dr_mode-for-otg-mode.patch
new file mode 100644
index 0000000..943b180
--- /dev/null
+++ b/patches/0117-phy-rcar-gen3-usb2-check-dr_mode-for-otg-mode.patch
@@ -0,0 +1,66 @@
+From 65e4bd402be9b3c6456ad68d428938b1f6e433c1 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 12 Oct 2017 15:34:45 +0900
+Subject: [PATCH 0117/1795] phy: rcar-gen3-usb2: check dr_mode for otg mode
+
+The previous code assumed a channel has otg capability if a channel
+has interrupt property. But, it is not good because:
+ - Battery charging feature also needs interrupt property.
+ - Some R-Car Gen3 SoCs (e.g. R-Car D3) don't have OTG capability.
+
+So, this patch checks whether usb 2.0 host node has dr_mode property or
+not. If it has 'dr_mode = "otg";', this driver enables otg capability.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
+(cherry picked from commit 7e0540f41332cb07055c5fe6629dc83c71974c82)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/phy/renesas/phy-rcar-gen3-usb2.c | 10 +++++++---
+ 1 file changed, 7 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/phy/renesas/phy-rcar-gen3-usb2.c b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
+index b33e2994ccce..cc70dca47212 100644
+--- a/drivers/phy/renesas/phy-rcar-gen3-usb2.c
++++ b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
+@@ -1,7 +1,7 @@
+ /*
+ * Renesas R-Car Gen3 for USB2.0 PHY driver
+ *
+- * Copyright (C) 2015 Renesas Electronics Corporation
++ * Copyright (C) 2015-2017 Renesas Electronics Corporation
+ *
+ * This is based on the phy-rcar-gen2 driver:
+ * Copyright (C) 2014 Renesas Solutions Corp.
+@@ -22,6 +22,7 @@
+ #include <linux/platform_device.h>
+ #include <linux/pm_runtime.h>
+ #include <linux/regulator/consumer.h>
++#include <linux/usb/of.h>
+ #include <linux/workqueue.h>
+
+ /******* USB2.0 Host registers (original offset is +0x200) *******/
+@@ -415,13 +416,16 @@ static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
+ /* call request_irq for OTG */
+ irq = platform_get_irq(pdev, 0);
+ if (irq >= 0) {
+- int ret;
+-
+ INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work);
+ irq = devm_request_irq(dev, irq, rcar_gen3_phy_usb2_irq,
+ IRQF_SHARED, dev_name(dev), channel);
+ if (irq < 0)
+ dev_err(dev, "No irq handler (%d)\n", irq);
++ }
++
++ if (of_usb_get_dr_mode_by_phy(dev->of_node, 0) == USB_DR_MODE_OTG) {
++ int ret;
++
+ channel->has_otg = true;
+ channel->extcon = devm_extcon_dev_allocate(dev,
+ rcar_gen3_phy_cable);
+--
+2.19.0
+
diff --git a/patches/0118-phy-rcar-gen3-usb2-use-enum-phy_mode-in-the-role_sto.patch b/patches/0118-phy-rcar-gen3-usb2-use-enum-phy_mode-in-the-role_sto.patch
new file mode 100644
index 0000000..f355edf
--- /dev/null
+++ b/patches/0118-phy-rcar-gen3-usb2-use-enum-phy_mode-in-the-role_sto.patch
@@ -0,0 +1,78 @@
+From 915e2b2c574fa47b88bbff81a8ed18ac8c5b3b51 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 12 Oct 2017 15:34:46 +0900
+Subject: [PATCH 0118/1795] phy: rcar-gen3-usb2: use enum phy_mode in the
+ role_store()
+
+This patch modifies the role_store() to use "enum phy_mode" instead
+of the local "bool" for host/device mode selection.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
+(cherry picked from commit b56acc82f9719d6aa1c1003ac7e34391da85a824)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/phy/renesas/phy-rcar-gen3-usb2.c | 29 +++++++++++++++---------
+ 1 file changed, 18 insertions(+), 11 deletions(-)
+
+diff --git a/drivers/phy/renesas/phy-rcar-gen3-usb2.c b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
+index cc70dca47212..e77bc50bfc26 100644
+--- a/drivers/phy/renesas/phy-rcar-gen3-usb2.c
++++ b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
+@@ -219,33 +219,40 @@ static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch)
+ return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
+ }
+
++static enum phy_mode rcar_gen3_get_phy_mode(struct rcar_gen3_chan *ch)
++{
++ if (rcar_gen3_is_host(ch))
++ return PHY_MODE_USB_HOST;
++
++ return PHY_MODE_USB_DEVICE;
++}
++
+ static ssize_t role_store(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+ {
+ struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
+- bool is_b_device, is_host, new_mode_is_host;
++ bool is_b_device;
++ enum phy_mode cur_mode, new_mode;
+
+ if (!ch->has_otg || !ch->phy->init_count)
+ return -EIO;
+
+- /*
+- * is_b_device: true is B-Device. false is A-Device.
+- * If {new_mode_}is_host: true is Host mode. false is Peripheral mode.
+- */
+- is_b_device = rcar_gen3_check_id(ch);
+- is_host = rcar_gen3_is_host(ch);
+ if (!strncmp(buf, "host", strlen("host")))
+- new_mode_is_host = true;
++ new_mode = PHY_MODE_USB_HOST;
+ else if (!strncmp(buf, "peripheral", strlen("peripheral")))
+- new_mode_is_host = false;
++ new_mode = PHY_MODE_USB_DEVICE;
+ else
+ return -EINVAL;
+
++ /* is_b_device: true is B-Device. false is A-Device. */
++ is_b_device = rcar_gen3_check_id(ch);
++ cur_mode = rcar_gen3_get_phy_mode(ch);
++
+ /* If current and new mode is the same, this returns the error */
+- if (is_host == new_mode_is_host)
++ if (cur_mode == new_mode)
+ return -EINVAL;
+
+- if (new_mode_is_host) { /* And is_host must be false */
++ if (new_mode == PHY_MODE_USB_HOST) { /* And is_host must be false */
+ if (!is_b_device) /* A-Peripheral */
+ rcar_gen3_init_from_a_peri_to_a_host(ch);
+ else /* B-Peripheral */
+--
+2.19.0
+
diff --git a/patches/0119-phy-rcar-gen3-usb2-add-SoC-specific-parameter-for-de.patch b/patches/0119-phy-rcar-gen3-usb2-add-SoC-specific-parameter-for-de.patch
new file mode 100644
index 0000000..d268903
--- /dev/null
+++ b/patches/0119-phy-rcar-gen3-usb2-add-SoC-specific-parameter-for-de.patch
@@ -0,0 +1,130 @@
+From 6b9daa7867c82371d4105f4b8dca8ba3ebc88c11 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 12 Oct 2017 15:34:47 +0900
+Subject: [PATCH 0119/1795] phy: rcar-gen3-usb2: add SoC-specific parameter for
+ dedicated pins
+
+This patch adds SoC-specific parameter to avoid reading/writing
+specific registers wrongly if this driver runs on a SoC which doesn't
+have dedicated pins (e.g. R-Car D3). This patch also changes the
+value "has_otg" to "has_otg_pins" for slightly easier reading of
+the code.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
+(cherry picked from commit 9adaaa9e4517afb8c5cb8931cc4ea0f81f54d396)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/phy/renesas/phy-rcar-gen3-usb2.c | 31 ++++++++++++++++--------
+ 1 file changed, 21 insertions(+), 10 deletions(-)
+
+diff --git a/drivers/phy/renesas/phy-rcar-gen3-usb2.c b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
+index e77bc50bfc26..9c90e7d67e0a 100644
+--- a/drivers/phy/renesas/phy-rcar-gen3-usb2.c
++++ b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
+@@ -18,6 +18,7 @@
+ #include <linux/module.h>
+ #include <linux/of.h>
+ #include <linux/of_address.h>
++#include <linux/of_device.h>
+ #include <linux/phy/phy.h>
+ #include <linux/platform_device.h>
+ #include <linux/pm_runtime.h>
+@@ -80,6 +81,8 @@
+ #define USB2_ADPCTRL_IDPULLUP BIT(5) /* 1 = ID sampling is enabled */
+ #define USB2_ADPCTRL_DRVVBUS BIT(4)
+
++#define RCAR_GEN3_PHY_HAS_DEDICATED_PINS 1
++
+ struct rcar_gen3_chan {
+ void __iomem *base;
+ struct extcon_dev *extcon;
+@@ -87,7 +90,7 @@ struct rcar_gen3_chan {
+ struct regulator *vbus;
+ struct work_struct work;
+ bool extcon_host;
+- bool has_otg;
++ bool has_otg_pins;
+ };
+
+ static void rcar_gen3_phy_usb2_work(struct work_struct *work)
+@@ -234,7 +237,7 @@ static ssize_t role_store(struct device *dev, struct device_attribute *attr,
+ bool is_b_device;
+ enum phy_mode cur_mode, new_mode;
+
+- if (!ch->has_otg || !ch->phy->init_count)
++ if (!ch->has_otg_pins || !ch->phy->init_count)
+ return -EIO;
+
+ if (!strncmp(buf, "host", strlen("host")))
+@@ -272,7 +275,7 @@ static ssize_t role_show(struct device *dev, struct device_attribute *attr,
+ {
+ struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
+
+- if (!ch->has_otg || !ch->phy->init_count)
++ if (!ch->has_otg_pins || !ch->phy->init_count)
+ return -EIO;
+
+ return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" :
+@@ -311,7 +314,7 @@ static int rcar_gen3_phy_usb2_init(struct phy *p)
+ writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);
+
+ /* Initialize otg part */
+- if (channel->has_otg)
++ if (channel->has_otg_pins)
+ rcar_gen3_init_otg(channel);
+
+ return 0;
+@@ -385,9 +388,17 @@ static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
+ }
+
+ static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
+- { .compatible = "renesas,usb2-phy-r8a7795" },
+- { .compatible = "renesas,usb2-phy-r8a7796" },
+- { .compatible = "renesas,rcar-gen3-usb2-phy" },
++ {
++ .compatible = "renesas,usb2-phy-r8a7795",
++ .data = (void *)RCAR_GEN3_PHY_HAS_DEDICATED_PINS,
++ },
++ {
++ .compatible = "renesas,usb2-phy-r8a7796",
++ .data = (void *)RCAR_GEN3_PHY_HAS_DEDICATED_PINS,
++ },
++ {
++ .compatible = "renesas,rcar-gen3-usb2-phy",
++ },
+ { }
+ };
+ MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table);
+@@ -433,7 +444,7 @@ static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
+ if (of_usb_get_dr_mode_by_phy(dev->of_node, 0) == USB_DR_MODE_OTG) {
+ int ret;
+
+- channel->has_otg = true;
++ channel->has_otg_pins = (uintptr_t)of_device_get_match_data(dev);
+ channel->extcon = devm_extcon_dev_allocate(dev,
+ rcar_gen3_phy_cable);
+ if (IS_ERR(channel->extcon))
+@@ -475,7 +486,7 @@ static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
+ dev_err(dev, "Failed to register PHY provider\n");
+ ret = PTR_ERR(provider);
+ goto error;
+- } else if (channel->has_otg) {
++ } else if (channel->has_otg_pins) {
+ int ret;
+
+ ret = device_create_file(dev, &dev_attr_role);
+@@ -495,7 +506,7 @@ static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
+ {
+ struct rcar_gen3_chan *channel = platform_get_drvdata(pdev);
+
+- if (channel->has_otg)
++ if (channel->has_otg_pins)
+ device_remove_file(&pdev->dev, &dev_attr_role);
+
+ pm_runtime_disable(&pdev->dev);
+--
+2.19.0
+
diff --git a/patches/0120-phy-rcar-gen3-usb2-add-binding-for-r8a77995.patch b/patches/0120-phy-rcar-gen3-usb2-add-binding-for-r8a77995.patch
new file mode 100644
index 0000000..3f2fdef
--- /dev/null
+++ b/patches/0120-phy-rcar-gen3-usb2-add-binding-for-r8a77995.patch
@@ -0,0 +1,38 @@
+From a4520dd0632c61b1367f8fbaca8328999e9557d8 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 12 Oct 2017 15:34:48 +0900
+Subject: [PATCH 0120/1795] phy: rcar-gen3-usb2: add binding for r8a77995
+
+This patch adds binding for r8a77995 (R-Car D3). Since r8a77995 doesn't
+have dedicated pins (ID, VBUS), this will match against the generic
+fallback on R-Car D3.
+
+For now, this driver doesn't support usb role swap for r8a77995.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
+(cherry picked from commit 6100ef093ba7b99efbb8b6c62b6af3c72fc82ddb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt b/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt
+index ace9cce2704a..99b651b33110 100644
+--- a/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt
++++ b/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt
+@@ -8,6 +8,8 @@ Required properties:
+ SoC.
+ "renesas,usb2-phy-r8a7796" if the device is a part of an R8A7796
+ SoC.
++ "renesas,usb2-phy-r8a77995" if the device is a part of an
++ R8A77995 SoC.
+ "renesas,rcar-gen3-usb2-phy" for a generic R-Car Gen3 compatible device.
+
+ When compatible with the generic version, nodes must list the
+--
+2.19.0
+
diff --git a/patches/0121-dt-bindings-pwm-Add-R-Car-D3-device-tree-bindings.patch b/patches/0121-dt-bindings-pwm-Add-R-Car-D3-device-tree-bindings.patch
new file mode 100644
index 0000000..4d3fa3f
--- /dev/null
+++ b/patches/0121-dt-bindings-pwm-Add-R-Car-D3-device-tree-bindings.patch
@@ -0,0 +1,33 @@
+From 663c5d382d9ce7d3f58031ebcc8478dee7d685b2 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Wed, 4 Oct 2017 19:10:38 +0900
+Subject: [PATCH 0121/1795] dt-bindings: pwm: Add R-Car D3 device tree bindings
+
+Add device tree bindings for the PWM controller found on R-Car D3 SoCs.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
+(cherry picked from commit ccb4e74aebb6fbd56fc6783f4d5c6ded48bc2f5d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt b/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt
+index 7e94b802395d..74c118015980 100644
+--- a/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt
++++ b/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt
+@@ -9,6 +9,7 @@ Required Properties:
+ - "renesas,pwm-r8a7794": for R-Car E2
+ - "renesas,pwm-r8a7795": for R-Car H3
+ - "renesas,pwm-r8a7796": for R-Car M3-W
++ - "renesas,pwm-r8a77995": for R-Car D3
+ - reg: base address and length of the registers block for the PWM.
+ - #pwm-cells: should be 2. See pwm.txt in this directory for a description of
+ the cells format.
+--
+2.19.0
+
diff --git a/patches/0122-ravb-document-R8A77970-bindings.patch b/patches/0122-ravb-document-R8A77970-bindings.patch
new file mode 100644
index 0000000..ef9f458
--- /dev/null
+++ b/patches/0122-ravb-document-R8A77970-bindings.patch
@@ -0,0 +1,43 @@
+From 7d2c95da8aa6b9262313b280a3e7bb09cfe598da Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Tue, 12 Sep 2017 23:02:08 +0300
+Subject: [PATCH 0122/1795] ravb: document R8A77970 bindings
+
+R-Car V3M (R8A77970) SoC also has the R-Car gen3 compatible EtherAVB
+device, so document the SoC specific bindings.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Acked-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 785ec87483d1e24a012ecf642ee7d07c4118f142)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/net/renesas,ravb.txt | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/Documentation/devicetree/bindings/net/renesas,ravb.txt b/Documentation/devicetree/bindings/net/renesas,ravb.txt
+index 16723535e1aa..2689211d324c 100644
+--- a/Documentation/devicetree/bindings/net/renesas,ravb.txt
++++ b/Documentation/devicetree/bindings/net/renesas,ravb.txt
+@@ -17,6 +17,7 @@ Required properties:
+
+ - "renesas,etheravb-r8a7795" for the R8A7795 SoC.
+ - "renesas,etheravb-r8a7796" for the R8A7796 SoC.
++ - "renesas,etheravb-r8a77970" for the R8A77970 SoC.
+ - "renesas,etheravb-rcar-gen3" as a fallback for the above
+ R-Car Gen3 devices.
+
+@@ -40,7 +41,7 @@ Optional properties:
+ - interrupt-parent: the phandle for the interrupt controller that services
+ interrupts for this device.
+ - interrupt-names: A list of interrupt names.
+- For the R8A779[56] SoCs this property is mandatory;
++ For the R-Car Gen 3 SoCs this property is mandatory;
+ it should include one entry per channel, named "ch%u",
+ where %u is the channel number ranging from 0 to 24.
+ For other SoCs this property is optional; if present
+--
+2.19.0
+
diff --git a/patches/0123-dt-bindings-net-renesas-ravb-Add-support-for-R8A7799.patch b/patches/0123-dt-bindings-net-renesas-ravb-Add-support-for-R8A7799.patch
new file mode 100644
index 0000000..954dc11
--- /dev/null
+++ b/patches/0123-dt-bindings-net-renesas-ravb-Add-support-for-R8A7799.patch
@@ -0,0 +1,35 @@
+From 5075f1be625364ba3f2618d3ffd86818ffcee05b Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 14 Sep 2017 09:06:38 +0900
+Subject: [PATCH 0123/1795] dt-bindings: net: renesas-ravb: Add support for
+ R8A77995 RAVB
+
+Add a new compatible string for the R8A77995 (R-Car D3) RAVB.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Acked-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit f231c4178a655b09c1fe4dce4b09de7b867c20af)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/net/renesas,ravb.txt | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/Documentation/devicetree/bindings/net/renesas,ravb.txt b/Documentation/devicetree/bindings/net/renesas,ravb.txt
+index 2689211d324c..c902261893b9 100644
+--- a/Documentation/devicetree/bindings/net/renesas,ravb.txt
++++ b/Documentation/devicetree/bindings/net/renesas,ravb.txt
+@@ -18,6 +18,7 @@ Required properties:
+ - "renesas,etheravb-r8a7795" for the R8A7795 SoC.
+ - "renesas,etheravb-r8a7796" for the R8A7796 SoC.
+ - "renesas,etheravb-r8a77970" for the R8A77970 SoC.
++ - "renesas,etheravb-r8a77995" for the R8A77995 SoC.
+ - "renesas,etheravb-rcar-gen3" as a fallback for the above
+ R-Car Gen3 devices.
+
+--
+2.19.0
+
diff --git a/patches/0124-ravb-RX-checksum-offload.patch b/patches/0124-ravb-RX-checksum-offload.patch
new file mode 100644
index 0000000..b23e91f
--- /dev/null
+++ b/patches/0124-ravb-RX-checksum-offload.patch
@@ -0,0 +1,194 @@
+From ba2d31b8fd93bc2a7bd5787aa89e33038709a107 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Wed, 4 Oct 2017 09:54:27 +0200
+Subject: [PATCH 0124/1795] ravb: RX checksum offload
+
+Add support for RX checksum offload. This is enabled by default and
+may be disabled and re-enabled using ethtool:
+
+ # ethtool -K eth0 rx off
+ # ethtool -K eth0 rx on
+
+The RAVB provides a simple checksumming scheme which appears to be
+completely compatible with CHECKSUM_COMPLETE: sum of all packet data after
+the L2 header is appended to packet data; this may be trivially read by the
+driver and used to update the skb accordingly.
+
+In terms of performance throughput is close to gigabit line-rate both with
+and without RX checksum offload enabled. Perf output, however, appears to
+indicate that significantly less time is spent in do_csum(). This is as
+expected.
+
+Test results with RX checksum offload enabled:
+ # /usr/bin/perf_3.16 record -o /run/perf.data -a netperf -t TCP_MAERTS -H 10.4.3.162
+ MIGRATED TCP MAERTS TEST from 0.0.0.0 (0.0.0.0) port 0 AF_INET to 10.4.3.162 () port 0 AF_INET : demo
+ enable_enobufs failed: getprotobyname
+ Recv Send Send
+ Socket Socket Message Elapsed
+ Size Size Size Time Throughput
+ bytes bytes bytes secs. 10^6bits/sec
+
+ 87380 16384 16384 10.00 937.54
+
+ Summary of output of perf report:
+ 18.28% ksoftirqd/0 [kernel.kallsyms] [k] _raw_spin_unlock_irqrestore
+ 10.34% ksoftirqd/0 [kernel.kallsyms] [k] __pi_memcpy
+ 9.83% ksoftirqd/0 [kernel.kallsyms] [k] ravb_poll
+ 7.89% ksoftirqd/0 [kernel.kallsyms] [k] skb_put
+ 4.01% ksoftirqd/0 [kernel.kallsyms] [k] dev_gro_receive
+ 3.37% netperf [kernel.kallsyms] [k] __arch_copy_to_user
+ 3.17% swapper [kernel.kallsyms] [k] arch_cpu_idle
+ 2.55% swapper [kernel.kallsyms] [k] tick_nohz_idle_enter
+ 2.04% ksoftirqd/0 [kernel.kallsyms] [k] __pi___inval_dcache_area
+ 2.03% swapper [kernel.kallsyms] [k] _raw_spin_unlock_irq
+ 1.96% ksoftirqd/0 [kernel.kallsyms] [k] __netdev_alloc_skb
+ 1.59% ksoftirqd/0 [kernel.kallsyms] [k] __slab_alloc.isra.83
+
+Test results without RX checksum offload enabled:
+ # /usr/bin/perf_3.16 record -o /run/perf.data -a netperf -t TCP_MAERTS -H 10.4.3.162
+ MIGRATED TCP MAERTS TEST from 0.0.0.0 (0.0.0.0) port 0 AF_INET to 10.4.3.162 () port 0 AF_INET : demo
+ enable_enobufs failed: getprotobyname
+ Recv Send Send
+ Socket Socket Message Elapsed
+ Size Size Size Time Throughput
+ bytes bytes bytes secs. 10^6bits/sec
+
+ 87380 16384 16384 10.00 940.20
+
+ Summary of output of perf report:
+ 17.10% ksoftirqd/0 [kernel.kallsyms] [k] _raw_spin_unlock_irqrestore
+ 10.99% ksoftirqd/0 [kernel.kallsyms] [k] __pi_memcpy
+ 8.87% ksoftirqd/0 [kernel.kallsyms] [k] ravb_poll
+ 8.16% ksoftirqd/0 [kernel.kallsyms] [k] skb_put
+ 7.42% ksoftirqd/0 [kernel.kallsyms] [k] do_csum
+ 3.91% ksoftirqd/0 [kernel.kallsyms] [k] dev_gro_receive
+ 2.31% swapper [kernel.kallsyms] [k] arch_cpu_idle
+ 2.16% ksoftirqd/0 [kernel.kallsyms] [k] __pi___inval_dcache_area
+ 2.14% ksoftirqd/0 [kernel.kallsyms] [k] __netdev_alloc_skb
+ 1.93% netperf [kernel.kallsyms] [k] __arch_copy_to_user
+ 1.79% swapper [kernel.kallsyms] [k] tick_nohz_idle_enter
+ 1.63% ksoftirqd/0 [kernel.kallsyms] [k] __slab_alloc.isra.83
+
+Above results collected on an R-Car Gen 3 Salvator-X/r8a7796 ES1.0.
+Also tested on a R-Car Gen 3 Salvator-X/r8a7795 ES1.0.
+
+By inspection this also appears to be compatible with the ravb found
+on R-Car Gen 2 SoCs, however, this patch is currently untested on such
+hardware.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 4d86d38186271438ef002c5ae6e04836f01bf8bf)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/net/ethernet/renesas/ravb_main.c | 55 +++++++++++++++++++++++-
+ 1 file changed, 54 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c
+index e87a779bfcfe..28b6a9f599bf 100644
+--- a/drivers/net/ethernet/renesas/ravb_main.c
++++ b/drivers/net/ethernet/renesas/ravb_main.c
+@@ -403,8 +403,9 @@ static void ravb_emac_init(struct net_device *ndev)
+ /* Receive frame limit set register */
+ ravb_write(ndev, ndev->mtu + ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN, RFLR);
+
+- /* PAUSE prohibition */
++ /* EMAC Mode: PAUSE prohibition; Duplex; RX Checksum; TX; RX */
+ ravb_write(ndev, ECMR_ZPF | (priv->duplex ? ECMR_DM : 0) |
++ (ndev->features & NETIF_F_RXCSUM ? ECMR_RCSC : 0) |
+ ECMR_TE | ECMR_RE, ECMR);
+
+ ravb_set_rate(ndev);
+@@ -520,6 +521,19 @@ static void ravb_get_tx_tstamp(struct net_device *ndev)
+ }
+ }
+
++static void ravb_rx_csum(struct sk_buff *skb)
++{
++ u8 *hw_csum;
++
++ /* The hardware checksum is 2 bytes appended to packet data */
++ if (unlikely(skb->len < 2))
++ return;
++ hw_csum = skb_tail_pointer(skb) - 2;
++ skb->csum = csum_unfold((__force __sum16)get_unaligned_le16(hw_csum));
++ skb->ip_summed = CHECKSUM_COMPLETE;
++ skb_trim(skb, skb->len - 2);
++}
++
+ /* Packet receive function for Ethernet AVB */
+ static bool ravb_rx(struct net_device *ndev, int *quota, int q)
+ {
+@@ -587,8 +601,11 @@ static bool ravb_rx(struct net_device *ndev, int *quota, int q)
+ ts.tv_nsec = le32_to_cpu(desc->ts_n);
+ shhwtstamps->hwtstamp = timespec64_to_ktime(ts);
+ }
++
+ skb_put(skb, pkt_len);
+ skb->protocol = eth_type_trans(skb, ndev);
++ if (ndev->features & NETIF_F_RXCSUM)
++ ravb_rx_csum(skb);
+ napi_gro_receive(&priv->napi[q], skb);
+ stats->rx_packets++;
+ stats->rx_bytes += pkt_len;
+@@ -1818,6 +1835,38 @@ static int ravb_do_ioctl(struct net_device *ndev, struct ifreq *req, int cmd)
+ return phy_mii_ioctl(phydev, req, cmd);
+ }
+
++static void ravb_set_rx_csum(struct net_device *ndev, bool enable)
++{
++ struct ravb_private *priv = netdev_priv(ndev);
++ unsigned long flags;
++
++ spin_lock_irqsave(&priv->lock, flags);
++
++ /* Disable TX and RX */
++ ravb_rcv_snd_disable(ndev);
++
++ /* Modify RX Checksum setting */
++ ravb_modify(ndev, ECMR, ECMR_RCSC, enable ? ECMR_RCSC : 0);
++
++ /* Enable TX and RX */
++ ravb_rcv_snd_enable(ndev);
++
++ spin_unlock_irqrestore(&priv->lock, flags);
++}
++
++static int ravb_set_features(struct net_device *ndev,
++ netdev_features_t features)
++{
++ netdev_features_t changed = ndev->features ^ features;
++
++ if (changed & NETIF_F_RXCSUM)
++ ravb_set_rx_csum(ndev, features & NETIF_F_RXCSUM);
++
++ ndev->features = features;
++
++ return 0;
++}
++
+ static const struct net_device_ops ravb_netdev_ops = {
+ .ndo_open = ravb_open,
+ .ndo_stop = ravb_close,
+@@ -1829,6 +1878,7 @@ static const struct net_device_ops ravb_netdev_ops = {
+ .ndo_do_ioctl = ravb_do_ioctl,
+ .ndo_validate_addr = eth_validate_addr,
+ .ndo_set_mac_address = eth_mac_addr,
++ .ndo_set_features = ravb_set_features,
+ };
+
+ /* MDIO bus init function */
+@@ -1980,6 +2030,9 @@ static int ravb_probe(struct platform_device *pdev)
+ if (!ndev)
+ return -ENOMEM;
+
++ ndev->features = NETIF_F_RXCSUM;
++ ndev->hw_features = NETIF_F_RXCSUM;
++
+ pm_runtime_enable(&pdev->dev);
+ pm_runtime_get_sync(&pdev->dev);
+
+--
+2.19.0
+
diff --git a/patches/0125-ravb-Consolidate-clock-handling.patch b/patches/0125-ravb-Consolidate-clock-handling.patch
new file mode 100644
index 0000000..7d7b2d5
--- /dev/null
+++ b/patches/0125-ravb-Consolidate-clock-handling.patch
@@ -0,0 +1,108 @@
+From d390b94ad08a6a4112c25be438d9e21173a689c0 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 12 Oct 2017 10:24:53 +0200
+Subject: [PATCH 0125/1795] ravb: Consolidate clock handling
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The module clock is used for two purposes:
+ - Wake-on-LAN (WoL), which is optional,
+ - gPTP Timer Increment (GTI) configuration, which is mandatory.
+
+As the clock is needed for GTI configuration anyway, WoL is always
+available. Hence remove duplication and repeated obtaining of the clock
+by making GTI use the stored clock for WoL use.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Reviewed-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit ab104615e01c2c4cbe9ea4073a430d51f6547dd2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/net/ethernet/renesas/ravb_main.c | 35 +++++++-----------------
+ 1 file changed, 10 insertions(+), 25 deletions(-)
+
+diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c
+index 28b6a9f599bf..9297fbbab0fe 100644
+--- a/drivers/net/ethernet/renesas/ravb_main.c
++++ b/drivers/net/ethernet/renesas/ravb_main.c
+@@ -1330,20 +1330,15 @@ static void ravb_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
+ {
+ struct ravb_private *priv = netdev_priv(ndev);
+
+- wol->supported = 0;
+- wol->wolopts = 0;
+-
+- if (priv->clk) {
+- wol->supported = WAKE_MAGIC;
+- wol->wolopts = priv->wol_enabled ? WAKE_MAGIC : 0;
+- }
++ wol->supported = WAKE_MAGIC;
++ wol->wolopts = priv->wol_enabled ? WAKE_MAGIC : 0;
+ }
+
+ static int ravb_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
+ {
+ struct ravb_private *priv = netdev_priv(ndev);
+
+- if (!priv->clk || wol->wolopts & ~WAKE_MAGIC)
++ if (wol->wolopts & ~WAKE_MAGIC)
+ return -EOPNOTSUPP;
+
+ priv->wol_enabled = !!(wol->wolopts & WAKE_MAGIC);
+@@ -1938,22 +1933,12 @@ MODULE_DEVICE_TABLE(of, ravb_match_table);
+
+ static int ravb_set_gti(struct net_device *ndev)
+ {
+-
++ struct ravb_private *priv = netdev_priv(ndev);
+ struct device *dev = ndev->dev.parent;
+- struct device_node *np = dev->of_node;
+ unsigned long rate;
+- struct clk *clk;
+ uint64_t inc;
+
+- clk = of_clk_get(np, 0);
+- if (IS_ERR(clk)) {
+- dev_err(dev, "could not get clock\n");
+- return PTR_ERR(clk);
+- }
+-
+- rate = clk_get_rate(clk);
+- clk_put(clk);
+-
++ rate = clk_get_rate(priv->clk);
+ if (!rate)
+ return -EINVAL;
+
+@@ -2102,10 +2087,11 @@ static int ravb_probe(struct platform_device *pdev)
+
+ priv->chip_id = chip_id;
+
+- /* Get clock, if not found that's OK but Wake-On-Lan is unavailable */
+ priv->clk = devm_clk_get(&pdev->dev, NULL);
+- if (IS_ERR(priv->clk))
+- priv->clk = NULL;
++ if (IS_ERR(priv->clk)) {
++ error = PTR_ERR(priv->clk);
++ goto out_release;
++ }
+
+ /* Set function */
+ ndev->netdev_ops = &ravb_netdev_ops;
+@@ -2173,8 +2159,7 @@ static int ravb_probe(struct platform_device *pdev)
+ if (error)
+ goto out_napi_del;
+
+- if (priv->clk)
+- device_set_wakeup_capable(&pdev->dev, 1);
++ device_set_wakeup_capable(&pdev->dev, 1);
+
+ /* Print device information */
+ netdev_info(ndev, "Base address at %#x, %pM, IRQ %d.\n",
+--
+2.19.0
+
diff --git a/patches/0126-Revert-ravb-add-workaround-for-clock-when-resuming-w.patch b/patches/0126-Revert-ravb-add-workaround-for-clock-when-resuming-w.patch
new file mode 100644
index 0000000..6396b58
--- /dev/null
+++ b/patches/0126-Revert-ravb-add-workaround-for-clock-when-resuming-w.patch
@@ -0,0 +1,67 @@
+From 245dbeb37ce16ca73a8710adbf9fcf843fefc654 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 11 Dec 2017 09:54:09 +0100
+Subject: [PATCH 0126/1795] Revert "ravb: add workaround for clock when
+ resuming with WoL enabled"
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This reverts commit fbf3d034f2ff6264183cfa6845770e8cc2a986c8.
+
+As of commit 560869100b99a3da ("clk: renesas: cpg-mssr: Restore module
+clocks during resume"), the workaround is no longer needed.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 6b782f43d34974c7909306fd9af06241d658a1f7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/net/ethernet/renesas/ravb_main.c | 27 ++----------------------
+ 1 file changed, 2 insertions(+), 25 deletions(-)
+
+diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c
+index 9297fbbab0fe..98e82669d41d 100644
+--- a/drivers/net/ethernet/renesas/ravb_main.c
++++ b/drivers/net/ethernet/renesas/ravb_main.c
+@@ -2284,32 +2284,9 @@ static int __maybe_unused ravb_resume(struct device *dev)
+ struct ravb_private *priv = netdev_priv(ndev);
+ int ret = 0;
+
+- if (priv->wol_enabled) {
+- /* Reduce the usecount of the clock to zero and then
+- * restore it to its original value. This is done to force
+- * the clock to be re-enabled which is a workaround
+- * for renesas-cpg-mssr driver which do not enable clocks
+- * when resuming from PSCI suspend/resume.
+- *
+- * Without this workaround the driver fails to communicate
+- * with the hardware if WoL was enabled when the system
+- * entered PSCI suspend. This is due to that if WoL is enabled
+- * we explicitly keep the clock from being turned off when
+- * suspending, but in PSCI sleep power is cut so the clock
+- * is disabled anyhow, the clock driver is not aware of this
+- * so the clock is not turned back on when resuming.
+- *
+- * TODO: once the renesas-cpg-mssr suspend/resume is working
+- * this clock dance should be removed.
+- */
+- clk_disable(priv->clk);
+- clk_disable(priv->clk);
+- clk_enable(priv->clk);
+- clk_enable(priv->clk);
+-
+- /* Set reset mode to rearm the WoL logic */
++ /* If WoL is enabled set reset mode to rearm the WoL logic */
++ if (priv->wol_enabled)
+ ravb_write(ndev, CCC_OPC_RESET, CCC);
+- }
+
+ /* All register have been reset to default values.
+ * Restore all registers which where setup at probe time and
+--
+2.19.0
+
diff --git a/patches/0127-drm-rcar-du-Use-drm_gem_fb_create.patch b/patches/0127-drm-rcar-du-Use-drm_gem_fb_create.patch
new file mode 100644
index 0000000..d7d9d49
--- /dev/null
+++ b/patches/0127-drm-rcar-du-Use-drm_gem_fb_create.patch
@@ -0,0 +1,46 @@
+From 2b15e6a044cc08dfb821cbd8c98753f3229fc6c5 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
+Date: Sun, 24 Sep 2017 14:26:21 +0200
+Subject: [PATCH 0127/1795] drm/rcar-du: Use drm_gem_fb_create()
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+drm_fb_cma_create() is just a wrapper around drm_gem_fb_create() now,
+so use the function directly.
+
+Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+Link: https://patchwork.freedesktop.org/patch/msgid/1506255985-61113-7-git-send-email-noralf@tronnes.org
+(cherry picked from commit 365c38517827b8efd4009b5221fff320775a5f83)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpu/drm/rcar-du/rcar_du_kms.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
+index 7278b9703c15..566d1a948c8f 100644
+--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
++++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
+@@ -18,6 +18,7 @@
+ #include <drm/drm_crtc_helper.h>
+ #include <drm/drm_fb_cma_helper.h>
+ #include <drm/drm_gem_cma_helper.h>
++#include <drm/drm_gem_framebuffer_helper.h>
+
+ #include <linux/of_graph.h>
+ #include <linux/wait.h>
+@@ -213,7 +214,7 @@ rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
+ }
+ }
+
+- return drm_fb_cma_create(dev, file_priv, mode_cmd);
++ return drm_gem_fb_create(dev, file_priv, mode_cmd);
+ }
+
+ static void rcar_du_output_poll_changed(struct drm_device *dev)
+--
+2.19.0
+
diff --git a/patches/0128-media-drivers-remove-from-non-kernel-doc-comments.patch b/patches/0128-media-drivers-remove-from-non-kernel-doc-comments.patch
new file mode 100644
index 0000000..f3686ae
--- /dev/null
+++ b/patches/0128-media-drivers-remove-from-non-kernel-doc-comments.patch
@@ -0,0 +1,498 @@
+From 1d3b8f82b671f5096bc11894de40d9546af05886 Mon Sep 17 00:00:00 2001
+From: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+Date: Wed, 29 Nov 2017 08:33:45 -0500
+Subject: [PATCH 0128/1795] media: drivers: remove "/**" from non-kernel-doc
+ comments
+
+Several comments are wrongly tagged as kernel-doc, causing
+those warnings:
+
+ drivers/media/rc/st_rc.c:98: warning: No description found for parameter 'irq'
+ drivers/media/rc/st_rc.c:98: warning: No description found for parameter 'data'
+ drivers/media/pci/solo6x10/solo6x10-enc.c:183: warning: No description found for parameter 'solo_dev'
+ drivers/media/pci/solo6x10/solo6x10-enc.c:183: warning: No description found for parameter 'ch'
+ drivers/media/pci/solo6x10/solo6x10-enc.c:183: warning: No description found for parameter 'qp'
+ drivers/media/usb/pwc/pwc-dec23.c:652: warning: Cannot understand *
+ on line 652 - I thought it was a doc line
+ drivers/media/usb/dvb-usb/cinergyT2-fe.c:40: warning: No description found for parameter 'op'
+ drivers/media/usb/dvb-usb/friio-fe.c:301: warning: Cannot understand * (reg, val) commad list to initialize this module.
+ on line 301 - I thought it was a doc line
+ drivers/media/rc/streamzap.c:201: warning: No description found for parameter 'urb'
+ drivers/media/rc/streamzap.c:333: warning: No description found for parameter 'intf'
+ drivers/media/rc/streamzap.c:333: warning: No description found for parameter 'id'
+ drivers/media/rc/streamzap.c:464: warning: No description found for parameter 'interface'
+ drivers/media/i2c/ov5647.c:432: warning: Cannot understand * @short Subdev core operations registration
+ on line 432 - I thought it was a doc line
+ drivers/media/usb/dvb-usb/friio.c:35: warning: No description found for parameter 'd'
+ drivers/media/usb/dvb-usb/friio.c:35: warning: No description found for parameter 'addr'
+ drivers/media/usb/dvb-usb/friio.c:35: warning: No description found for parameter 'wbuf'
+ drivers/media/usb/dvb-usb/friio.c:35: warning: No description found for parameter 'wlen'
+ drivers/media/usb/dvb-usb/friio.c:35: warning: No description found for parameter 'rbuf'
+ drivers/media/usb/dvb-usb/friio.c:35: warning: No description found for parameter 'rlen'
+ drivers/media/platform/vim2m.c:350: warning: No description found for parameter 'priv'
+ drivers/media/dvb-frontends/tua6100.c:34: warning: cannot understand function prototype: 'struct tua6100_priv '
+ drivers/media/platform/sti/hva/hva-h264.c:140: warning: cannot understand function prototype: 'struct hva_h264_stereo_video_sei '
+ drivers/media/platform/sti/hva/hva-h264.c:150: warning: Cannot understand * @frame_width: width in pixels of the buffer containing the input frame
+ on line 150 - I thought it was a doc line
+ drivers/media/platform/sti/hva/hva-h264.c:356: warning: Cannot understand * @ slice_size: slice size
+ on line 356 - I thought it was a doc line
+ drivers/media/platform/sti/hva/hva-h264.c:369: warning: Cannot understand * @ bitstream_size: bitstream size
+ on line 369 - I thought it was a doc line
+ drivers/media/platform/sti/hva/hva-h264.c:395: warning: Cannot understand * @seq_info: sequence information buffer
+ on line 395 - I thought it was a doc line
+ drivers/media/dvb-frontends/sp887x.c:137: warning: No description found for parameter 'fe'
+ drivers/media/dvb-frontends/sp887x.c:137: warning: No description found for parameter 'fw'
+ drivers/media/dvb-frontends/sp887x.c:287: warning: No description found for parameter 'n'
+ drivers/media/dvb-frontends/sp887x.c:287: warning: No description found for parameter 'd'
+ drivers/media/dvb-frontends/sp887x.c:287: warning: No description found for parameter 'quotient_i'
+ drivers/media/dvb-frontends/sp887x.c:287: warning: No description found for parameter 'quotient_f'
+ drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c:83: warning: cannot understand function prototype: 'struct ttusb '
+ drivers/media/platform/sh_veu.c:277: warning: No description found for parameter 'priv'
+ drivers/media/dvb-frontends/zl10036.c:33: warning: cannot understand function prototype: 'int zl10036_debug; '
+ drivers/media/dvb-frontends/zl10036.c:179: warning: No description found for parameter 'state'
+ drivers/media/dvb-frontends/zl10036.c:179: warning: No description found for parameter 'frequency'
+ drivers/media/platform/rcar_fdp1.c:1139: warning: No description found for parameter 'priv'
+ drivers/media/platform/ti-vpe/vpe.c:933: warning: No description found for parameter 'priv'
+ drivers/media/usb/gspca/ov519.c:36: warning: No description found for parameter 'fmt'
+ drivers/media/usb/dvb-usb/dib0700_devices.c:3367: warning: No description found for parameter 'adap'
+
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit cba862dc7301d62f90393f2bbb181834a3125308)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/media/dvb-frontends/sp887x.c | 6 +++---
+ drivers/media/dvb-frontends/tua6100.c | 2 +-
+ drivers/media/dvb-frontends/zl10036.c | 8 ++++----
+ drivers/media/i2c/ov5647.c | 4 ++--
+ drivers/media/pci/solo6x10/solo6x10-enc.c | 2 +-
+ drivers/media/platform/rcar_fdp1.c | 2 +-
+ drivers/media/platform/sh_veu.c | 2 +-
+ drivers/media/platform/sti/hva/hva-h264.c | 18 +++++++++++++-----
+ drivers/media/platform/ti-vpe/vpe.c | 2 +-
+ drivers/media/platform/vim2m.c | 2 +-
+ drivers/media/rc/st_rc.c | 6 +++---
+ drivers/media/rc/streamzap.c | 6 +++---
+ drivers/media/usb/dvb-usb/cinergyT2-fe.c | 2 +-
+ drivers/media/usb/dvb-usb/dib0700_devices.c | 8 ++++----
+ drivers/media/usb/dvb-usb/friio-fe.c | 2 +-
+ drivers/media/usb/dvb-usb/friio.c | 2 +-
+ drivers/media/usb/gspca/ov519.c | 2 +-
+ drivers/media/usb/pwc/pwc-dec23.c | 7 +++----
+ .../media/usb/ttusb-budget/dvb-ttusb-budget.c | 6 +++---
+ 19 files changed, 48 insertions(+), 41 deletions(-)
+
+diff --git a/drivers/media/dvb-frontends/sp887x.c b/drivers/media/dvb-frontends/sp887x.c
+index 7c511c3cd4ca..d2c402b52c6e 100644
+--- a/drivers/media/dvb-frontends/sp887x.c
++++ b/drivers/media/dvb-frontends/sp887x.c
+@@ -57,7 +57,7 @@ static int sp887x_writereg (struct sp887x_state* state, u16 reg, u16 data)
+ int ret;
+
+ if ((ret = i2c_transfer(state->i2c, &msg, 1)) != 1) {
+- /**
++ /*
+ * in case of soft reset we ignore ACK errors...
+ */
+ if (!(reg == 0xf1a && data == 0x000 &&
+@@ -130,7 +130,7 @@ static void sp887x_setup_agc (struct sp887x_state* state)
+
+ #define BLOCKSIZE 30
+ #define FW_SIZE 0x4000
+-/**
++/*
+ * load firmware and setup MPEG interface...
+ */
+ static int sp887x_initial_setup (struct dvb_frontend* fe, const struct firmware *fw)
+@@ -279,7 +279,7 @@ static int configure_reg0xc05(struct dtv_frontend_properties *p, u16 *reg0xc05)
+ return 0;
+ }
+
+-/**
++/*
+ * estimates division of two 24bit numbers,
+ * derived from the ves1820/stv0299 driver code
+ */
+diff --git a/drivers/media/dvb-frontends/tua6100.c b/drivers/media/dvb-frontends/tua6100.c
+index 18e6d4c5be21..1d41abd47f04 100644
+--- a/drivers/media/dvb-frontends/tua6100.c
++++ b/drivers/media/dvb-frontends/tua6100.c
+@@ -1,4 +1,4 @@
+-/**
++/*
+ * Driver for Infineon tua6100 pll.
+ *
+ * (c) 2006 Andrew de Quincey
+diff --git a/drivers/media/dvb-frontends/zl10036.c b/drivers/media/dvb-frontends/zl10036.c
+index 062282739ce5..89dd65ae88ad 100644
+--- a/drivers/media/dvb-frontends/zl10036.c
++++ b/drivers/media/dvb-frontends/zl10036.c
+@@ -1,4 +1,4 @@
+-/**
++/*
+ * Driver for Zarlink zl10036 DVB-S silicon tuner
+ *
+ * Copyright (C) 2006 Tino Reichardt
+@@ -157,7 +157,7 @@ static int zl10036_sleep(struct dvb_frontend *fe)
+ return ret;
+ }
+
+-/**
++/*
+ * register map of the ZL10036/ZL10038
+ *
+ * reg[default] content
+@@ -219,7 +219,7 @@ static int zl10036_set_bandwidth(struct zl10036_state *state, u32 fbw)
+ if (fbw <= 28820) {
+ br = _BR_MAXIMUM;
+ } else {
+- /**
++ /*
+ * f(bw)=34,6MHz f(xtal)=10.111MHz
+ * br = (10111/34600) * 63 * 1/K = 14;
+ */
+@@ -315,7 +315,7 @@ static int zl10036_set_params(struct dvb_frontend *fe)
+ || (frequency > fe->ops.info.frequency_max))
+ return -EINVAL;
+
+- /**
++ /*
+ * alpha = 1.35 for dvb-s
+ * fBW = (alpha*symbolrate)/(2*0.8)
+ * 1.35 / (2*0.8) = 27 / 32
+diff --git a/drivers/media/i2c/ov5647.c b/drivers/media/i2c/ov5647.c
+index 95ce90fdb876..210aa822399c 100644
+--- a/drivers/media/i2c/ov5647.c
++++ b/drivers/media/i2c/ov5647.c
+@@ -407,8 +407,8 @@ static int ov5647_sensor_set_register(struct v4l2_subdev *sd,
+ }
+ #endif
+
+-/**
+- * @short Subdev core operations registration
++/*
++ * Subdev core operations registration
+ */
+ static const struct v4l2_subdev_core_ops ov5647_subdev_core_ops = {
+ .s_power = ov5647_sensor_power,
+diff --git a/drivers/media/pci/solo6x10/solo6x10-enc.c b/drivers/media/pci/solo6x10/solo6x10-enc.c
+index d28211bb9674..58d6b5131dd0 100644
+--- a/drivers/media/pci/solo6x10/solo6x10-enc.c
++++ b/drivers/media/pci/solo6x10/solo6x10-enc.c
+@@ -175,7 +175,7 @@ int solo_osd_print(struct solo_enc_dev *solo_enc)
+ return 0;
+ }
+
+-/**
++/*
+ * Set channel Quality Profile (0-3).
+ */
+ void solo_s_jpeg_qp(struct solo_dev *solo_dev, unsigned int ch,
+diff --git a/drivers/media/platform/rcar_fdp1.c b/drivers/media/platform/rcar_fdp1.c
+index 3245bc45f4a0..b13dec3081e5 100644
+--- a/drivers/media/platform/rcar_fdp1.c
++++ b/drivers/media/platform/rcar_fdp1.c
+@@ -1132,7 +1132,7 @@ static int fdp1_device_process(struct fdp1_ctx *ctx)
+ * mem2mem callbacks
+ */
+
+-/**
++/*
+ * job_ready() - check whether an instance is ready to be scheduled to run
+ */
+ static int fdp1_m2m_job_ready(void *priv)
+diff --git a/drivers/media/platform/sh_veu.c b/drivers/media/platform/sh_veu.c
+index 15a562af13c7..dedc1b024f6f 100644
+--- a/drivers/media/platform/sh_veu.c
++++ b/drivers/media/platform/sh_veu.c
+@@ -267,7 +267,7 @@ static void sh_veu_process(struct sh_veu_dev *veu,
+ sh_veu_reg_write(veu, VEU_EIER, 1); /* enable interrupt in VEU */
+ }
+
+-/**
++/*
+ * sh_veu_device_run() - prepares and starts the device
+ *
+ * This will be called by the framework when it decides to schedule a particular
+diff --git a/drivers/media/platform/sti/hva/hva-h264.c b/drivers/media/platform/sti/hva/hva-h264.c
+index e6f247a983c7..d69c58211107 100644
+--- a/drivers/media/platform/sti/hva/hva-h264.c
++++ b/drivers/media/platform/sti/hva/hva-h264.c
+@@ -134,7 +134,7 @@ enum hva_h264_sei_payload_type {
+ SEI_FRAME_PACKING_ARRANGEMENT = 45
+ };
+
+-/**
++/*
+ * stereo Video Info struct
+ */
+ struct hva_h264_stereo_video_sei {
+@@ -146,7 +146,9 @@ struct hva_h264_stereo_video_sei {
+ u8 right_view_self_contained_flag;
+ };
+
+-/**
++/*
++ * struct hva_h264_td
++ *
+ * @frame_width: width in pixels of the buffer containing the input frame
+ * @frame_height: height in pixels of the buffer containing the input frame
+ * @frame_num: the parameter to be written in the slice header
+@@ -352,7 +354,9 @@ struct hva_h264_td {
+ u32 addr_brc_in_out_parameter;
+ };
+
+-/**
++/*
++ * struct hva_h264_slice_po
++ *
+ * @ slice_size: slice size
+ * @ slice_start_time: start time
+ * @ slice_stop_time: stop time
+@@ -365,7 +369,9 @@ struct hva_h264_slice_po {
+ u32 slice_num;
+ };
+
+-/**
++/*
++ * struct hva_h264_po
++ *
+ * @ bitstream_size: bitstream size
+ * @ dct_bitstream_size: dtc bitstream size
+ * @ stuffing_bits: number of stuffing bits inserted by the encoder
+@@ -391,7 +397,9 @@ struct hva_h264_task {
+ struct hva_h264_po po;
+ };
+
+-/**
++/*
++ * struct hva_h264_ctx
++ *
+ * @seq_info: sequence information buffer
+ * @ref_frame: reference frame buffer
+ * @rec_frame: reconstructed frame buffer
+diff --git a/drivers/media/platform/ti-vpe/vpe.c b/drivers/media/platform/ti-vpe/vpe.c
+index 45bd10544189..e395aa85c8ad 100644
+--- a/drivers/media/platform/ti-vpe/vpe.c
++++ b/drivers/media/platform/ti-vpe/vpe.c
+@@ -926,7 +926,7 @@ static struct vpe_ctx *file2ctx(struct file *file)
+ * mem2mem callbacks
+ */
+
+-/**
++/*
+ * job_ready() - check whether an instance is ready to be scheduled to run
+ */
+ static int job_ready(void *priv)
+diff --git a/drivers/media/platform/vim2m.c b/drivers/media/platform/vim2m.c
+index b01fba020d5f..0592f40b23f3 100644
+--- a/drivers/media/platform/vim2m.c
++++ b/drivers/media/platform/vim2m.c
+@@ -343,7 +343,7 @@ static void schedule_irq(struct vim2m_dev *dev, int msec_timeout)
+ * mem2mem callbacks
+ */
+
+-/**
++/*
+ * job_ready() - check whether an instance is ready to be scheduled to run
+ */
+ static int job_ready(void *priv)
+diff --git a/drivers/media/rc/st_rc.c b/drivers/media/rc/st_rc.c
+index a8e39c635f34..d2efd7b2c3bc 100644
+--- a/drivers/media/rc/st_rc.c
++++ b/drivers/media/rc/st_rc.c
+@@ -49,7 +49,7 @@ struct st_rc_device {
+ #define IRB_RX_NOISE_SUPPR 0x5c /* noise suppression */
+ #define IRB_RX_POLARITY_INV 0x68 /* polarity inverter */
+
+-/**
++/*
+ * IRQ set: Enable full FIFO 1 -> bit 3;
+ * Enable overrun IRQ 1 -> bit 2;
+ * Enable last symbol IRQ 1 -> bit 1:
+@@ -72,7 +72,7 @@ static void st_rc_send_lirc_timeout(struct rc_dev *rdev)
+ ir_raw_event_store(rdev, &ev);
+ }
+
+-/**
++/*
+ * RX graphical example to better understand the difference between ST IR block
+ * output and standard definition used by LIRC (and most of the world!)
+ *
+@@ -317,7 +317,7 @@ static int st_rc_probe(struct platform_device *pdev)
+ device_init_wakeup(dev, true);
+ dev_pm_set_wake_irq(dev, rc_dev->irq);
+
+- /**
++ /*
+ * for LIRC_MODE_MODE2 or LIRC_MODE_PULSE or LIRC_MODE_RAW
+ * lircd expects a long space first before a signal train to sync.
+ */
+diff --git a/drivers/media/rc/streamzap.c b/drivers/media/rc/streamzap.c
+index f03a174ddf9d..0fdcab8ca1b0 100644
+--- a/drivers/media/rc/streamzap.c
++++ b/drivers/media/rc/streamzap.c
+@@ -191,7 +191,7 @@ static void sz_push_half_space(struct streamzap_ir *sz,
+ sz_push_full_space(sz, value & SZ_SPACE_MASK);
+ }
+
+-/**
++/*
+ * streamzap_callback - usb IRQ handler callback
+ *
+ * This procedure is invoked on reception of data from
+@@ -321,7 +321,7 @@ static struct rc_dev *streamzap_init_rc_dev(struct streamzap_ir *sz)
+ return NULL;
+ }
+
+-/**
++/*
+ * streamzap_probe
+ *
+ * Called by usb-core to associated with a candidate device
+@@ -450,7 +450,7 @@ static int streamzap_probe(struct usb_interface *intf,
+ return retval;
+ }
+
+-/**
++/*
+ * streamzap_disconnect
+ *
+ * Called by the usb core when the device is removed from the system.
+diff --git a/drivers/media/usb/dvb-usb/cinergyT2-fe.c b/drivers/media/usb/dvb-usb/cinergyT2-fe.c
+index f9772ad0a2a5..5a2f81311fb7 100644
+--- a/drivers/media/usb/dvb-usb/cinergyT2-fe.c
++++ b/drivers/media/usb/dvb-usb/cinergyT2-fe.c
+@@ -26,7 +26,7 @@
+ #include "cinergyT2.h"
+
+
+-/**
++/*
+ * convert linux-dvb frontend parameter set into TPS.
+ * See ETSI ETS-300744, section 4.6.2, table 9 for details.
+ *
+diff --git a/drivers/media/usb/dvb-usb/dib0700_devices.c b/drivers/media/usb/dvb-usb/dib0700_devices.c
+index 9be1e658ef47..a9968fb1e8e4 100644
+--- a/drivers/media/usb/dvb-usb/dib0700_devices.c
++++ b/drivers/media/usb/dvb-usb/dib0700_devices.c
+@@ -1678,10 +1678,10 @@ static int dib8096_set_param_override(struct dvb_frontend *fe)
+ return -EINVAL;
+ }
+
+- /** Update PLL if needed ratio **/
++ /* Update PLL if needed ratio */
+ state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, 0);
+
+- /** Get optimize PLL ratio to remove spurious **/
++ /* Get optimize PLL ratio to remove spurious */
+ pll_ratio = dib8090_compute_pll_parameters(fe);
+ if (pll_ratio == 17)
+ timf = 21387946;
+@@ -1692,7 +1692,7 @@ static int dib8096_set_param_override(struct dvb_frontend *fe)
+ else
+ timf = 18179756;
+
+- /** Update ratio **/
++ /* Update ratio */
+ state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, pll_ratio);
+
+ state->dib8000_ops.ctrl_timf(fe, DEMOD_TIMF_SET, timf);
+@@ -3358,7 +3358,7 @@ static int novatd_sleep_override(struct dvb_frontend* fe)
+ return state->sleep(fe);
+ }
+
+-/**
++/*
+ * novatd_frontend_attach - Nova-TD specific attach
+ *
+ * Nova-TD has GPIO0, 1 and 2 for LEDs. So do not fiddle with them except for
+diff --git a/drivers/media/usb/dvb-usb/friio-fe.c b/drivers/media/usb/dvb-usb/friio-fe.c
+index 0251a4e91d47..0b108071197a 100644
+--- a/drivers/media/usb/dvb-usb/friio-fe.c
++++ b/drivers/media/usb/dvb-usb/friio-fe.c
+@@ -319,7 +319,7 @@ static int jdvbt90502_set_frontend(struct dvb_frontend *fe)
+ }
+
+
+-/**
++/*
+ * (reg, val) commad list to initialize this module.
+ * captured on a Windows box.
+ */
+diff --git a/drivers/media/usb/dvb-usb/friio.c b/drivers/media/usb/dvb-usb/friio.c
+index 62abe6c43a32..16875945e662 100644
+--- a/drivers/media/usb/dvb-usb/friio.c
++++ b/drivers/media/usb/dvb-usb/friio.c
+@@ -21,7 +21,7 @@ MODULE_PARM_DESC(debug,
+
+ DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
+
+-/**
++/*
+ * Indirect I2C access to the PLL via FE.
+ * whole I2C protocol data to the PLL is sent via the FE's I2C register.
+ * This is done by a control msg to the FE with the I2C data accompanied, and
+diff --git a/drivers/media/usb/gspca/ov519.c b/drivers/media/usb/gspca/ov519.c
+index cdb79c5f0c38..cb0afbf0aae7 100644
+--- a/drivers/media/usb/gspca/ov519.c
++++ b/drivers/media/usb/gspca/ov519.c
+@@ -1,4 +1,4 @@
+-/**
++/*
+ * OV519 driver
+ *
+ * Copyright (C) 2008-2011 Jean-François Moine <moinejf@free.fr>
+diff --git a/drivers/media/usb/pwc/pwc-dec23.c b/drivers/media/usb/pwc/pwc-dec23.c
+index 3792fedff951..1283b3bd9800 100644
+--- a/drivers/media/usb/pwc/pwc-dec23.c
++++ b/drivers/media/usb/pwc/pwc-dec23.c
+@@ -649,11 +649,10 @@ static void DecompressBand23(struct pwc_dec23_private *pdec,
+ }
+
+ /**
+- *
+ * Uncompress a pwc23 buffer.
+- *
+- * src: raw data
+- * dst: image output
++ * @pdev: pointer to pwc device's internal struct
++ * @src: raw data
++ * @dst: image output
+ */
+ void pwc_dec23_decompress(struct pwc_device *pdev,
+ const void *src,
+diff --git a/drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c b/drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c
+index b842f367249f..a142b9dc0feb 100644
+--- a/drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c
++++ b/drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c
+@@ -76,7 +76,7 @@ DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
+ #define TTUSB_REV_2_2 0x22
+ #define TTUSB_BUDGET_NAME "ttusb_stc_fw"
+
+-/**
++/*
+ * since we're casting (struct ttusb*) <-> (struct dvb_demux*) around
+ * the dvb_demux field must be the first in struct!!
+ */
+@@ -713,7 +713,7 @@ static void ttusb_process_frame(struct ttusb *ttusb, u8 * data, int len)
+ }
+ }
+
+- /**
++ /*
+ * if length is valid and we reached the end:
+ * goto next muxpack
+ */
+@@ -729,7 +729,7 @@ static void ttusb_process_frame(struct ttusb *ttusb, u8 * data, int len)
+ /* maximum bytes, until we know the length */
+ ttusb->muxpack_len = 2;
+
+- /**
++ /*
+ * no muxpacks left?
+ * return to search-sync state
+ */
+--
+2.19.0
+
diff --git a/patches/0129-thermal-rcar_gen3_thermal-fix-initialization-sequenc.patch b/patches/0129-thermal-rcar_gen3_thermal-fix-initialization-sequenc.patch
new file mode 100644
index 0000000..ed33478
--- /dev/null
+++ b/patches/0129-thermal-rcar_gen3_thermal-fix-initialization-sequenc.patch
@@ -0,0 +1,125 @@
+From e6a76653eb3d349480e589c019912df66f7b1475 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
+ <niklas.soderlund+renesas@ragnatech.se>
+Date: Tue, 17 Oct 2017 13:36:13 +0200
+Subject: [PATCH 0129/1795] thermal: rcar_gen3_thermal: fix initialization
+ sequence for H3 ES2.0
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The initialization sequence for H3 (r8a7795) ES1.x and ES2.0 is
+different. H3 ES2.0 and later uses the same sequence as M3 (r8a7796)
+ES1.0. Fix this by not looking at compatible strings and instead
+defaulting to the r8a7796 initialization sequence and use
+soc_device_match() to check for H3 ES1.x.
+
+Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
+(cherry picked from commit d668c807aa6ef3c3eef57b4e9e785ec0cfab4f6d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/thermal/rcar_gen3_thermal.c | 34 +++++++++++++----------------
+ 1 file changed, 15 insertions(+), 19 deletions(-)
+
+diff --git a/drivers/thermal/rcar_gen3_thermal.c b/drivers/thermal/rcar_gen3_thermal.c
+index 203aca44a2bb..561a0a332208 100644
+--- a/drivers/thermal/rcar_gen3_thermal.c
++++ b/drivers/thermal/rcar_gen3_thermal.c
+@@ -24,6 +24,7 @@
+ #include <linux/platform_device.h>
+ #include <linux/pm_runtime.h>
+ #include <linux/spinlock.h>
++#include <linux/sys_soc.h>
+ #include <linux/thermal.h>
+
+ #include "thermal_core.h"
+@@ -90,10 +91,6 @@ struct rcar_gen3_thermal_priv {
+ struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
+ unsigned int num_tscs;
+ spinlock_t lock; /* Protect interrupts on and off */
+- const struct rcar_gen3_thermal_data *data;
+-};
+-
+-struct rcar_gen3_thermal_data {
+ void (*thermal_init)(struct rcar_gen3_thermal_tsc *tsc);
+ };
+
+@@ -278,7 +275,12 @@ static irqreturn_t rcar_gen3_thermal_irq_thread(int irq, void *data)
+ return IRQ_HANDLED;
+ }
+
+-static void r8a7795_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
++static const struct soc_device_attribute r8a7795es1[] = {
++ { .soc_id = "r8a7795", .revision = "ES1.*" },
++ { /* sentinel */ }
++};
++
++static void rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_tsc *tsc)
+ {
+ rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_THBGR);
+ rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, 0x0);
+@@ -303,7 +305,7 @@ static void r8a7795_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
+ usleep_range(1000, 2000);
+ }
+
+-static void r8a7796_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
++static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
+ {
+ u32 reg_val;
+
+@@ -324,17 +326,9 @@ static void r8a7796_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
+ usleep_range(1000, 2000);
+ }
+
+-static const struct rcar_gen3_thermal_data r8a7795_data = {
+- .thermal_init = r8a7795_thermal_init,
+-};
+-
+-static const struct rcar_gen3_thermal_data r8a7796_data = {
+- .thermal_init = r8a7796_thermal_init,
+-};
+-
+ static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
+- { .compatible = "renesas,r8a7795-thermal", .data = &r8a7795_data},
+- { .compatible = "renesas,r8a7796-thermal", .data = &r8a7796_data},
++ { .compatible = "renesas,r8a7795-thermal", },
++ { .compatible = "renesas,r8a7796-thermal", },
+ {},
+ };
+ MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);
+@@ -371,7 +365,9 @@ static int rcar_gen3_thermal_probe(struct platform_device *pdev)
+ if (!priv)
+ return -ENOMEM;
+
+- priv->data = of_device_get_match_data(dev);
++ priv->thermal_init = rcar_gen3_thermal_init;
++ if (soc_device_match(r8a7795es1))
++ priv->thermal_init = rcar_gen3_thermal_init_r8a7795es1;
+
+ spin_lock_init(&priv->lock);
+
+@@ -423,7 +419,7 @@ static int rcar_gen3_thermal_probe(struct platform_device *pdev)
+
+ priv->tscs[i] = tsc;
+
+- priv->data->thermal_init(tsc);
++ priv->thermal_init(tsc);
+ rcar_gen3_thermal_calc_coefs(&tsc->coef, ptat, thcode[i]);
+
+ zone = devm_thermal_zone_of_sensor_register(dev, i, tsc,
+@@ -476,7 +472,7 @@ static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
+ for (i = 0; i < priv->num_tscs; i++) {
+ struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
+
+- priv->data->thermal_init(tsc);
++ priv->thermal_init(tsc);
+ rcar_gen3_thermal_set_trips(tsc, tsc->low, tsc->high);
+ }
+
+--
+2.19.0
+
diff --git a/patches/0130-iio-adc-drop-assign-iio_info.driver_module-and-iio_t.patch b/patches/0130-iio-adc-drop-assign-iio_info.driver_module-and-iio_t.patch
new file mode 100644
index 0000000..6b85867
--- /dev/null
+++ b/patches/0130-iio-adc-drop-assign-iio_info.driver_module-and-iio_t.patch
@@ -0,0 +1,1092 @@
+From ab188ca421d52db4c756f1d2ffa4964b0b2942e7 Mon Sep 17 00:00:00 2001
+From: Jonathan Cameron <jic23@kernel.org>
+Date: Sun, 23 Jul 2017 17:25:47 +0100
+Subject: [PATCH 0130/1795] iio:adc: drop assign iio_info.driver_module and
+ iio_trigger_ops.owner
+
+The equivalent of both of these are now done via macro magic when
+the relevant register calls are made. The actual structure
+elements will shortly go away.
+
+Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+Reviewed-by: Lars-Peter Clausen <lars@metafoo.de>
+(cherry picked from commit 52b31bcc9372f2925f4898d179c655687c4aa179)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iio/adc/ad7266.c | 1 -
+ drivers/iio/adc/ad7291.c | 1 -
+ drivers/iio/adc/ad7298.c | 1 -
+ drivers/iio/adc/ad7476.c | 1 -
+ drivers/iio/adc/ad7766.c | 2 --
+ drivers/iio/adc/ad7791.c | 2 --
+ drivers/iio/adc/ad7793.c | 2 --
+ drivers/iio/adc/ad7887.c | 1 -
+ drivers/iio/adc/ad7923.c | 1 -
+ drivers/iio/adc/ad799x.c | 3 ---
+ drivers/iio/adc/ad_sigma_delta.c | 1 -
+ drivers/iio/adc/aspeed_adc.c | 1 -
+ drivers/iio/adc/at91-sama5d2_adc.c | 2 --
+ drivers/iio/adc/at91_adc.c | 2 --
+ drivers/iio/adc/axp20x_adc.c | 2 --
+ drivers/iio/adc/axp288_adc.c | 1 -
+ drivers/iio/adc/bcm_iproc_adc.c | 1 -
+ drivers/iio/adc/berlin2-adc.c | 1 -
+ drivers/iio/adc/cc10001_adc.c | 1 -
+ drivers/iio/adc/cpcap-adc.c | 1 -
+ drivers/iio/adc/da9150-gpadc.c | 1 -
+ drivers/iio/adc/dln2-adc.c | 6 ------
+ drivers/iio/adc/envelope-detector.c | 1 -
+ drivers/iio/adc/exynos_adc.c | 1 -
+ drivers/iio/adc/hi8435.c | 1 -
+ drivers/iio/adc/hx711.c | 1 -
+ drivers/iio/adc/imx7d_adc.c | 1 -
+ drivers/iio/adc/ina2xx-adc.c | 2 --
+ drivers/iio/adc/lp8788_adc.c | 1 -
+ drivers/iio/adc/lpc18xx_adc.c | 1 -
+ drivers/iio/adc/lpc32xx_adc.c | 1 -
+ drivers/iio/adc/ltc2471.c | 1 -
+ drivers/iio/adc/ltc2485.c | 1 -
+ drivers/iio/adc/ltc2497.c | 1 -
+ drivers/iio/adc/max1027.c | 2 --
+ drivers/iio/adc/max11100.c | 1 -
+ drivers/iio/adc/max1118.c | 1 -
+ drivers/iio/adc/max1363.c | 2 --
+ drivers/iio/adc/max9611.c | 1 -
+ drivers/iio/adc/mcp320x.c | 1 -
+ drivers/iio/adc/mcp3422.c | 1 -
+ drivers/iio/adc/men_z188_adc.c | 1 -
+ drivers/iio/adc/meson_saradc.c | 1 -
+ drivers/iio/adc/mt6577_auxadc.c | 1 -
+ drivers/iio/adc/mxs-lradc-adc.c | 2 --
+ drivers/iio/adc/nau7802.c | 1 -
+ drivers/iio/adc/palmas_gpadc.c | 1 -
+ drivers/iio/adc/qcom-pm8xxx-xoadc.c | 1 -
+ drivers/iio/adc/qcom-spmi-iadc.c | 1 -
+ drivers/iio/adc/qcom-spmi-vadc.c | 1 -
+ drivers/iio/adc/rcar-gyroadc.c | 1 -
+ drivers/iio/adc/rockchip_saradc.c | 1 -
+ drivers/iio/adc/spear_adc.c | 1 -
+ drivers/iio/adc/stm32-adc.c | 1 -
+ drivers/iio/adc/stx104.c | 1 -
+ drivers/iio/adc/sun4i-gpadc-iio.c | 1 -
+ drivers/iio/adc/ti-adc081c.c | 1 -
+ drivers/iio/adc/ti-adc0832.c | 1 -
+ drivers/iio/adc/ti-adc084s021.c | 1 -
+ drivers/iio/adc/ti-adc108s102.c | 1 -
+ drivers/iio/adc/ti-adc12138.c | 1 -
+ drivers/iio/adc/ti-adc128s052.c | 1 -
+ drivers/iio/adc/ti-adc161s626.c | 1 -
+ drivers/iio/adc/ti-ads1015.c | 2 --
+ drivers/iio/adc/ti-ads7950.c | 1 -
+ drivers/iio/adc/ti-ads8688.c | 1 -
+ drivers/iio/adc/ti-tlc4541.c | 1 -
+ drivers/iio/adc/ti_am335x_adc.c | 1 -
+ drivers/iio/adc/twl4030-madc.c | 1 -
+ drivers/iio/adc/twl6030-gpadc.c | 1 -
+ drivers/iio/adc/vf610_adc.c | 1 -
+ drivers/iio/adc/viperboard_adc.c | 1 -
+ drivers/iio/adc/xilinx-xadc-core.c | 2 --
+ 73 files changed, 92 deletions(-)
+
+diff --git a/drivers/iio/adc/ad7266.c b/drivers/iio/adc/ad7266.c
+index b8d5cfd57ec4..605eb5e7e829 100644
+--- a/drivers/iio/adc/ad7266.c
++++ b/drivers/iio/adc/ad7266.c
+@@ -280,7 +280,6 @@ static AD7266_DECLARE_DIFF_CHANNELS_FIXED(u, 'u');
+ static const struct iio_info ad7266_info = {
+ .read_raw = &ad7266_read_raw,
+ .update_scan_mode = &ad7266_update_scan_mode,
+- .driver_module = THIS_MODULE,
+ };
+
+ static const unsigned long ad7266_available_scan_masks[] = {
+diff --git a/drivers/iio/adc/ad7291.c b/drivers/iio/adc/ad7291.c
+index 1d90b02732bb..a862b5d8fb4b 100644
+--- a/drivers/iio/adc/ad7291.c
++++ b/drivers/iio/adc/ad7291.c
+@@ -461,7 +461,6 @@ static const struct iio_info ad7291_info = {
+ .write_event_config = &ad7291_write_event_config,
+ .read_event_value = &ad7291_read_event_value,
+ .write_event_value = &ad7291_write_event_value,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int ad7291_probe(struct i2c_client *client,
+diff --git a/drivers/iio/adc/ad7298.c b/drivers/iio/adc/ad7298.c
+index e399bf04c73a..2b20c6c8ec7f 100644
+--- a/drivers/iio/adc/ad7298.c
++++ b/drivers/iio/adc/ad7298.c
+@@ -280,7 +280,6 @@ static int ad7298_read_raw(struct iio_dev *indio_dev,
+ static const struct iio_info ad7298_info = {
+ .read_raw = &ad7298_read_raw,
+ .update_scan_mode = ad7298_update_scan_mode,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int ad7298_probe(struct spi_device *spi)
+diff --git a/drivers/iio/adc/ad7476.c b/drivers/iio/adc/ad7476.c
+index b7ecf9aab90f..b7706bf10ffe 100644
+--- a/drivers/iio/adc/ad7476.c
++++ b/drivers/iio/adc/ad7476.c
+@@ -195,7 +195,6 @@ static const struct ad7476_chip_info ad7476_chip_info_tbl[] = {
+ };
+
+ static const struct iio_info ad7476_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = &ad7476_read_raw,
+ };
+
+diff --git a/drivers/iio/adc/ad7766.c b/drivers/iio/adc/ad7766.c
+index ce45037295d8..3ae14fc8c649 100644
+--- a/drivers/iio/adc/ad7766.c
++++ b/drivers/iio/adc/ad7766.c
+@@ -185,7 +185,6 @@ static const struct iio_buffer_setup_ops ad7766_buffer_setup_ops = {
+ };
+
+ static const struct iio_info ad7766_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = &ad7766_read_raw,
+ };
+
+@@ -208,7 +207,6 @@ static int ad7766_set_trigger_state(struct iio_trigger *trig, bool enable)
+ }
+
+ static const struct iio_trigger_ops ad7766_trigger_ops = {
+- .owner = THIS_MODULE,
+ .set_trigger_state = ad7766_set_trigger_state,
+ .validate_device = iio_trigger_validate_own_device,
+ };
+diff --git a/drivers/iio/adc/ad7791.c b/drivers/iio/adc/ad7791.c
+index 677f812f372a..03a5f7d6cb0c 100644
+--- a/drivers/iio/adc/ad7791.c
++++ b/drivers/iio/adc/ad7791.c
+@@ -259,13 +259,11 @@ static const struct iio_info ad7791_info = {
+ .read_raw = &ad7791_read_raw,
+ .attrs = &ad7791_attribute_group,
+ .validate_trigger = ad_sd_validate_trigger,
+- .driver_module = THIS_MODULE,
+ };
+
+ static const struct iio_info ad7791_no_filter_info = {
+ .read_raw = &ad7791_read_raw,
+ .validate_trigger = ad_sd_validate_trigger,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int ad7791_setup(struct ad7791_state *st,
+diff --git a/drivers/iio/adc/ad7793.c b/drivers/iio/adc/ad7793.c
+index 07246a6037e3..d4bbe5b53318 100644
+--- a/drivers/iio/adc/ad7793.c
++++ b/drivers/iio/adc/ad7793.c
+@@ -536,7 +536,6 @@ static const struct iio_info ad7793_info = {
+ .write_raw_get_fmt = &ad7793_write_raw_get_fmt,
+ .attrs = &ad7793_attribute_group,
+ .validate_trigger = ad_sd_validate_trigger,
+- .driver_module = THIS_MODULE,
+ };
+
+ static const struct iio_info ad7797_info = {
+@@ -545,7 +544,6 @@ static const struct iio_info ad7797_info = {
+ .write_raw_get_fmt = &ad7793_write_raw_get_fmt,
+ .attrs = &ad7793_attribute_group,
+ .validate_trigger = ad_sd_validate_trigger,
+- .driver_module = THIS_MODULE,
+ };
+
+ #define DECLARE_AD7793_CHANNELS(_name, _b, _sb, _s) \
+diff --git a/drivers/iio/adc/ad7887.c b/drivers/iio/adc/ad7887.c
+index 7a483bfbd70c..205c0f1761aa 100644
+--- a/drivers/iio/adc/ad7887.c
++++ b/drivers/iio/adc/ad7887.c
+@@ -229,7 +229,6 @@ static const struct ad7887_chip_info ad7887_chip_info_tbl[] = {
+
+ static const struct iio_info ad7887_info = {
+ .read_raw = &ad7887_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int ad7887_probe(struct spi_device *spi)
+diff --git a/drivers/iio/adc/ad7923.c b/drivers/iio/adc/ad7923.c
+index 77a675e11ebb..ffb7e089969c 100644
+--- a/drivers/iio/adc/ad7923.c
++++ b/drivers/iio/adc/ad7923.c
+@@ -262,7 +262,6 @@ static int ad7923_read_raw(struct iio_dev *indio_dev,
+ static const struct iio_info ad7923_info = {
+ .read_raw = &ad7923_read_raw,
+ .update_scan_mode = ad7923_update_scan_mode,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int ad7923_probe(struct spi_device *spi)
+diff --git a/drivers/iio/adc/ad799x.c b/drivers/iio/adc/ad799x.c
+index 22426ae4af97..e1da67d5ee22 100644
+--- a/drivers/iio/adc/ad799x.c
++++ b/drivers/iio/adc/ad799x.c
+@@ -526,13 +526,11 @@ static const struct attribute_group ad799x_event_attrs_group = {
+
+ static const struct iio_info ad7991_info = {
+ .read_raw = &ad799x_read_raw,
+- .driver_module = THIS_MODULE,
+ .update_scan_mode = ad799x_update_scan_mode,
+ };
+
+ static const struct iio_info ad7993_4_7_8_noirq_info = {
+ .read_raw = &ad799x_read_raw,
+- .driver_module = THIS_MODULE,
+ .update_scan_mode = ad799x_update_scan_mode,
+ };
+
+@@ -543,7 +541,6 @@ static const struct iio_info ad7993_4_7_8_irq_info = {
+ .write_event_config = &ad799x_write_event_config,
+ .read_event_value = &ad799x_read_event_value,
+ .write_event_value = &ad799x_write_event_value,
+- .driver_module = THIS_MODULE,
+ .update_scan_mode = ad799x_update_scan_mode,
+ };
+
+diff --git a/drivers/iio/adc/ad_sigma_delta.c b/drivers/iio/adc/ad_sigma_delta.c
+index 22c4c17cd996..cf1b048b0665 100644
+--- a/drivers/iio/adc/ad_sigma_delta.c
++++ b/drivers/iio/adc/ad_sigma_delta.c
+@@ -463,7 +463,6 @@ int ad_sd_validate_trigger(struct iio_dev *indio_dev, struct iio_trigger *trig)
+ EXPORT_SYMBOL_GPL(ad_sd_validate_trigger);
+
+ static const struct iio_trigger_ops ad_sd_trigger_ops = {
+- .owner = THIS_MODULE,
+ };
+
+ static int ad_sd_probe_trigger(struct iio_dev *indio_dev)
+diff --git a/drivers/iio/adc/aspeed_adc.c b/drivers/iio/adc/aspeed_adc.c
+index c02b23d675cb..8a958d5f1905 100644
+--- a/drivers/iio/adc/aspeed_adc.c
++++ b/drivers/iio/adc/aspeed_adc.c
+@@ -165,7 +165,6 @@ static int aspeed_adc_reg_access(struct iio_dev *indio_dev,
+ }
+
+ static const struct iio_info aspeed_adc_iio_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = aspeed_adc_read_raw,
+ .write_raw = aspeed_adc_write_raw,
+ .debugfs_reg_access = aspeed_adc_reg_access,
+diff --git a/drivers/iio/adc/at91-sama5d2_adc.c b/drivers/iio/adc/at91-sama5d2_adc.c
+index a70ef7fec95f..755a493c2a2c 100644
+--- a/drivers/iio/adc/at91-sama5d2_adc.c
++++ b/drivers/iio/adc/at91-sama5d2_adc.c
+@@ -348,7 +348,6 @@ static int at91_adc_reenable_trigger(struct iio_trigger *trig)
+ }
+
+ static const struct iio_trigger_ops at91_adc_trigger_ops = {
+- .owner = THIS_MODULE,
+ .set_trigger_state = &at91_adc_configure_trigger,
+ .try_reenable = &at91_adc_reenable_trigger,
+ };
+@@ -584,7 +583,6 @@ static int at91_adc_write_raw(struct iio_dev *indio_dev,
+ static const struct iio_info at91_adc_info = {
+ .read_raw = &at91_adc_read_raw,
+ .write_raw = &at91_adc_write_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static void at91_adc_hw_init(struct at91_adc_state *st)
+diff --git a/drivers/iio/adc/at91_adc.c b/drivers/iio/adc/at91_adc.c
+index 15109728cae7..3836d4222a3e 100644
+--- a/drivers/iio/adc/at91_adc.c
++++ b/drivers/iio/adc/at91_adc.c
+@@ -594,7 +594,6 @@ static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state)
+ }
+
+ static const struct iio_trigger_ops at91_adc_trigger_ops = {
+- .owner = THIS_MODULE,
+ .set_trigger_state = &at91_adc_configure_trigger,
+ };
+
+@@ -976,7 +975,6 @@ static int at91_adc_probe_pdata(struct at91_adc_state *st,
+ }
+
+ static const struct iio_info at91_adc_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = &at91_adc_read_raw,
+ };
+
+diff --git a/drivers/iio/adc/axp20x_adc.c b/drivers/iio/adc/axp20x_adc.c
+index 11e177180ea0..a30a97245e91 100644
+--- a/drivers/iio/adc/axp20x_adc.c
++++ b/drivers/iio/adc/axp20x_adc.c
+@@ -464,12 +464,10 @@ static int axp20x_write_raw(struct iio_dev *indio_dev,
+ static const struct iio_info axp20x_adc_iio_info = {
+ .read_raw = axp20x_read_raw,
+ .write_raw = axp20x_write_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static const struct iio_info axp22x_adc_iio_info = {
+ .read_raw = axp22x_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int axp20x_adc_rate(int rate)
+diff --git a/drivers/iio/adc/axp288_adc.c b/drivers/iio/adc/axp288_adc.c
+index 462a99c13e7a..60c9e853dd81 100644
+--- a/drivers/iio/adc/axp288_adc.c
++++ b/drivers/iio/adc/axp288_adc.c
+@@ -183,7 +183,6 @@ static int axp288_adc_set_state(struct regmap *regmap)
+
+ static const struct iio_info axp288_adc_iio_info = {
+ .read_raw = &axp288_adc_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int axp288_adc_probe(struct platform_device *pdev)
+diff --git a/drivers/iio/adc/bcm_iproc_adc.c b/drivers/iio/adc/bcm_iproc_adc.c
+index 7f4f9c4150e3..7af59a4bbd8d 100644
+--- a/drivers/iio/adc/bcm_iproc_adc.c
++++ b/drivers/iio/adc/bcm_iproc_adc.c
+@@ -492,7 +492,6 @@ static int iproc_adc_read_raw(struct iio_dev *indio_dev,
+
+ static const struct iio_info iproc_adc_iio_info = {
+ .read_raw = &iproc_adc_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ #define IPROC_ADC_CHANNEL(_index, _id) { \
+diff --git a/drivers/iio/adc/berlin2-adc.c b/drivers/iio/adc/berlin2-adc.c
+index 71c806ecc722..72d8fa94ab31 100644
+--- a/drivers/iio/adc/berlin2-adc.c
++++ b/drivers/iio/adc/berlin2-adc.c
+@@ -277,7 +277,6 @@ static irqreturn_t berlin2_adc_tsen_irq(int irq, void *private)
+ }
+
+ static const struct iio_info berlin2_adc_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = berlin2_adc_read_raw,
+ };
+
+diff --git a/drivers/iio/adc/cc10001_adc.c b/drivers/iio/adc/cc10001_adc.c
+index 91636c0ba5b5..707d8b24b072 100644
+--- a/drivers/iio/adc/cc10001_adc.c
++++ b/drivers/iio/adc/cc10001_adc.c
+@@ -262,7 +262,6 @@ static int cc10001_update_scan_mode(struct iio_dev *indio_dev,
+ }
+
+ static const struct iio_info cc10001_adc_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = &cc10001_adc_read_raw,
+ .update_scan_mode = &cc10001_update_scan_mode,
+ };
+diff --git a/drivers/iio/adc/cpcap-adc.c b/drivers/iio/adc/cpcap-adc.c
+index f153e02686a0..9ad60421d360 100644
+--- a/drivers/iio/adc/cpcap-adc.c
++++ b/drivers/iio/adc/cpcap-adc.c
+@@ -932,7 +932,6 @@ static int cpcap_adc_read(struct iio_dev *indio_dev,
+
+ static const struct iio_info cpcap_adc_info = {
+ .read_raw = &cpcap_adc_read,
+- .driver_module = THIS_MODULE,
+ };
+
+ /*
+diff --git a/drivers/iio/adc/da9150-gpadc.c b/drivers/iio/adc/da9150-gpadc.c
+index 3445107e10b7..0a5d9ce79164 100644
+--- a/drivers/iio/adc/da9150-gpadc.c
++++ b/drivers/iio/adc/da9150-gpadc.c
+@@ -249,7 +249,6 @@ static int da9150_gpadc_read_raw(struct iio_dev *indio_dev,
+
+ static const struct iio_info da9150_gpadc_info = {
+ .read_raw = &da9150_gpadc_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ #define DA9150_GPADC_CHANNEL(_id, _hw_id, _type, chan_info, \
+diff --git a/drivers/iio/adc/dln2-adc.c b/drivers/iio/adc/dln2-adc.c
+index ab8d6aed5085..c64c6675cae6 100644
+--- a/drivers/iio/adc/dln2-adc.c
++++ b/drivers/iio/adc/dln2-adc.c
+@@ -479,7 +479,6 @@ static const struct iio_info dln2_adc_info = {
+ .read_raw = dln2_adc_read_raw,
+ .write_raw = dln2_adc_write_raw,
+ .update_scan_mode = dln2_update_scan_mode,
+- .driver_module = THIS_MODULE,
+ };
+
+ static irqreturn_t dln2_adc_trigger_h(int irq, void *p)
+@@ -604,10 +603,6 @@ static void dln2_adc_event(struct platform_device *pdev, u16 echo,
+ iio_trigger_poll(dln2->trig);
+ }
+
+-static const struct iio_trigger_ops dln2_adc_trigger_ops = {
+- .owner = THIS_MODULE,
+-};
+-
+ static int dln2_adc_probe(struct platform_device *pdev)
+ {
+ struct device *dev = &pdev->dev;
+@@ -665,7 +660,6 @@ static int dln2_adc_probe(struct platform_device *pdev)
+ dev_err(dev, "failed to allocate trigger\n");
+ return -ENOMEM;
+ }
+- dln2->trig->ops = &dln2_adc_trigger_ops;
+ iio_trigger_set_drvdata(dln2->trig, dln2);
+ devm_iio_trigger_register(dev, dln2->trig);
+ iio_trigger_set_immutable(indio_dev, dln2->trig);
+diff --git a/drivers/iio/adc/envelope-detector.c b/drivers/iio/adc/envelope-detector.c
+index fef15c0d7c9c..4ebda8ab54fe 100644
+--- a/drivers/iio/adc/envelope-detector.c
++++ b/drivers/iio/adc/envelope-detector.c
+@@ -322,7 +322,6 @@ static const struct iio_chan_spec envelope_detector_iio_channel = {
+
+ static const struct iio_info envelope_detector_info = {
+ .read_raw = &envelope_detector_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int envelope_detector_probe(struct platform_device *pdev)
+diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
+index 6c5a7be9f8c1..f10443f92e4c 100644
+--- a/drivers/iio/adc/exynos_adc.c
++++ b/drivers/iio/adc/exynos_adc.c
+@@ -657,7 +657,6 @@ static int exynos_adc_reg_access(struct iio_dev *indio_dev,
+ static const struct iio_info exynos_adc_iio_info = {
+ .read_raw = &exynos_read_raw,
+ .debugfs_reg_access = &exynos_adc_reg_access,
+- .driver_module = THIS_MODULE,
+ };
+
+ #define ADC_CHANNEL(_index, _id) { \
+diff --git a/drivers/iio/adc/hi8435.c b/drivers/iio/adc/hi8435.c
+index adf7dc712937..6f6c9a348158 100644
+--- a/drivers/iio/adc/hi8435.c
++++ b/drivers/iio/adc/hi8435.c
+@@ -408,7 +408,6 @@ static const struct iio_chan_spec hi8435_channels[] = {
+ };
+
+ static const struct iio_info hi8435_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = hi8435_read_raw,
+ .read_event_config = hi8435_read_event_config,
+ .write_event_config = hi8435_write_event_config,
+diff --git a/drivers/iio/adc/hx711.c b/drivers/iio/adc/hx711.c
+index 27005d84ed73..d10b9f13d557 100644
+--- a/drivers/iio/adc/hx711.c
++++ b/drivers/iio/adc/hx711.c
+@@ -374,7 +374,6 @@ static const struct attribute_group hx711_attribute_group = {
+ };
+
+ static const struct iio_info hx711_iio_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = hx711_read_raw,
+ .write_raw = hx711_write_raw,
+ .write_raw_get_fmt = hx711_write_raw_get_fmt,
+diff --git a/drivers/iio/adc/imx7d_adc.c b/drivers/iio/adc/imx7d_adc.c
+index 254b29a68b9d..cfab31162845 100644
+--- a/drivers/iio/adc/imx7d_adc.c
++++ b/drivers/iio/adc/imx7d_adc.c
+@@ -412,7 +412,6 @@ static int imx7d_adc_reg_access(struct iio_dev *indio_dev,
+ }
+
+ static const struct iio_info imx7d_adc_iio_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = &imx7d_adc_read_raw,
+ .debugfs_reg_access = &imx7d_adc_reg_access,
+ };
+diff --git a/drivers/iio/adc/ina2xx-adc.c b/drivers/iio/adc/ina2xx-adc.c
+index 59f99b3a180d..3976da23ec3f 100644
+--- a/drivers/iio/adc/ina2xx-adc.c
++++ b/drivers/iio/adc/ina2xx-adc.c
+@@ -786,7 +786,6 @@ static const struct attribute_group ina226_attribute_group = {
+ };
+
+ static const struct iio_info ina219_info = {
+- .driver_module = THIS_MODULE,
+ .attrs = &ina219_attribute_group,
+ .read_raw = ina2xx_read_raw,
+ .write_raw = ina2xx_write_raw,
+@@ -794,7 +793,6 @@ static const struct iio_info ina219_info = {
+ };
+
+ static const struct iio_info ina226_info = {
+- .driver_module = THIS_MODULE,
+ .attrs = &ina226_attribute_group,
+ .read_raw = ina2xx_read_raw,
+ .write_raw = ina2xx_write_raw,
+diff --git a/drivers/iio/adc/lp8788_adc.c b/drivers/iio/adc/lp8788_adc.c
+index 152cfc8e1c7b..3bc4df916420 100644
+--- a/drivers/iio/adc/lp8788_adc.c
++++ b/drivers/iio/adc/lp8788_adc.c
+@@ -125,7 +125,6 @@ static int lp8788_adc_read_raw(struct iio_dev *indio_dev,
+
+ static const struct iio_info lp8788_adc_info = {
+ .read_raw = &lp8788_adc_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ #define LP8788_CHAN(_id, _type) { \
+diff --git a/drivers/iio/adc/lpc18xx_adc.c b/drivers/iio/adc/lpc18xx_adc.c
+index 3ef18f4b27f0..041dc4a3f66c 100644
+--- a/drivers/iio/adc/lpc18xx_adc.c
++++ b/drivers/iio/adc/lpc18xx_adc.c
+@@ -116,7 +116,6 @@ static int lpc18xx_adc_read_raw(struct iio_dev *indio_dev,
+
+ static const struct iio_info lpc18xx_adc_info = {
+ .read_raw = lpc18xx_adc_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int lpc18xx_adc_probe(struct platform_device *pdev)
+diff --git a/drivers/iio/adc/lpc32xx_adc.c b/drivers/iio/adc/lpc32xx_adc.c
+index 6a5b9a9bc662..20b36690fa4f 100644
+--- a/drivers/iio/adc/lpc32xx_adc.c
++++ b/drivers/iio/adc/lpc32xx_adc.c
+@@ -104,7 +104,6 @@ static int lpc32xx_read_raw(struct iio_dev *indio_dev,
+
+ static const struct iio_info lpc32xx_adc_iio_info = {
+ .read_raw = &lpc32xx_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ #define LPC32XX_ADC_CHANNEL(_index) { \
+diff --git a/drivers/iio/adc/ltc2471.c b/drivers/iio/adc/ltc2471.c
+index 29b7ed60cdb0..b88102b751cf 100644
+--- a/drivers/iio/adc/ltc2471.c
++++ b/drivers/iio/adc/ltc2471.c
+@@ -98,7 +98,6 @@ static const struct iio_chan_spec ltc2473_channel[] = {
+
+ static const struct iio_info ltc2471_info = {
+ .read_raw = ltc2471_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int ltc2471_i2c_probe(struct i2c_client *client,
+diff --git a/drivers/iio/adc/ltc2485.c b/drivers/iio/adc/ltc2485.c
+index eab91f12454a..b24c14037fd4 100644
+--- a/drivers/iio/adc/ltc2485.c
++++ b/drivers/iio/adc/ltc2485.c
+@@ -90,7 +90,6 @@ static const struct iio_chan_spec ltc2485_channel[] = {
+
+ static const struct iio_info ltc2485_info = {
+ .read_raw = ltc2485_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int ltc2485_probe(struct i2c_client *client,
+diff --git a/drivers/iio/adc/ltc2497.c b/drivers/iio/adc/ltc2497.c
+index 5bf8011dcde9..f1f7cdf66fbd 100644
+--- a/drivers/iio/adc/ltc2497.c
++++ b/drivers/iio/adc/ltc2497.c
+@@ -186,7 +186,6 @@ static const struct iio_chan_spec ltc2497_channel[] = {
+
+ static const struct iio_info ltc2497_info = {
+ .read_raw = ltc2497_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int ltc2497_probe(struct i2c_client *client,
+diff --git a/drivers/iio/adc/max1027.c b/drivers/iio/adc/max1027.c
+index ebc715927e63..375da6491499 100644
+--- a/drivers/iio/adc/max1027.c
++++ b/drivers/iio/adc/max1027.c
+@@ -381,13 +381,11 @@ static irqreturn_t max1027_trigger_handler(int irq, void *private)
+ }
+
+ static const struct iio_trigger_ops max1027_trigger_ops = {
+- .owner = THIS_MODULE,
+ .validate_device = &iio_trigger_validate_own_device,
+ .set_trigger_state = &max1027_set_trigger_state,
+ };
+
+ static const struct iio_info max1027_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = &max1027_read_raw,
+ .validate_trigger = &max1027_validate_trigger,
+ .debugfs_reg_access = &max1027_debugfs_reg_access,
+diff --git a/drivers/iio/adc/max11100.c b/drivers/iio/adc/max11100.c
+index 1180bcc22ff1..af59ab2e650c 100644
+--- a/drivers/iio/adc/max11100.c
++++ b/drivers/iio/adc/max11100.c
+@@ -100,7 +100,6 @@ static int max11100_read_raw(struct iio_dev *indio_dev,
+ }
+
+ static const struct iio_info max11100_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = max11100_read_raw,
+ };
+
+diff --git a/drivers/iio/adc/max1118.c b/drivers/iio/adc/max1118.c
+index 2e9648a078c4..49db9e9ae625 100644
+--- a/drivers/iio/adc/max1118.c
++++ b/drivers/iio/adc/max1118.c
+@@ -155,7 +155,6 @@ static int max1118_read_raw(struct iio_dev *indio_dev,
+
+ static const struct iio_info max1118_info = {
+ .read_raw = max1118_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static irqreturn_t max1118_trigger_handler(int irq, void *p)
+diff --git a/drivers/iio/adc/max1363.c b/drivers/iio/adc/max1363.c
+index 80eada4886b3..7f1848dac9bf 100644
+--- a/drivers/iio/adc/max1363.c
++++ b/drivers/iio/adc/max1363.c
+@@ -1029,7 +1029,6 @@ static int max1363_update_scan_mode(struct iio_dev *indio_dev,
+
+ static const struct iio_info max1238_info = {
+ .read_raw = &max1363_read_raw,
+- .driver_module = THIS_MODULE,
+ .update_scan_mode = &max1363_update_scan_mode,
+ };
+
+@@ -1040,7 +1039,6 @@ static const struct iio_info max1363_info = {
+ .write_event_config = &max1363_write_event_config,
+ .read_raw = &max1363_read_raw,
+ .update_scan_mode = &max1363_update_scan_mode,
+- .driver_module = THIS_MODULE,
+ .event_attrs = &max1363_event_attribute_group,
+ };
+
+diff --git a/drivers/iio/adc/max9611.c b/drivers/iio/adc/max9611.c
+index b1dd17cbce58..9edfbabf4e4d 100644
+--- a/drivers/iio/adc/max9611.c
++++ b/drivers/iio/adc/max9611.c
+@@ -460,7 +460,6 @@ static const struct attribute_group max9611_attribute_group = {
+ };
+
+ static const struct iio_info indio_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = max9611_read_raw,
+ .attrs = &max9611_attribute_group,
+ };
+diff --git a/drivers/iio/adc/mcp320x.c b/drivers/iio/adc/mcp320x.c
+index 071dd23a33d9..49e80b959089 100644
+--- a/drivers/iio/adc/mcp320x.c
++++ b/drivers/iio/adc/mcp320x.c
+@@ -248,7 +248,6 @@ static const struct iio_chan_spec mcp3208_channels[] = {
+
+ static const struct iio_info mcp320x_info = {
+ .read_raw = mcp320x_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static const struct mcp320x_chip_info mcp320x_chip_infos[] = {
+diff --git a/drivers/iio/adc/mcp3422.c b/drivers/iio/adc/mcp3422.c
+index 63de705086ed..819f26011500 100644
+--- a/drivers/iio/adc/mcp3422.c
++++ b/drivers/iio/adc/mcp3422.c
+@@ -327,7 +327,6 @@ static const struct iio_info mcp3422_info = {
+ .write_raw = mcp3422_write_raw,
+ .write_raw_get_fmt = mcp3422_write_raw_get_fmt,
+ .attrs = &mcp3422_attribute_group,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int mcp3422_probe(struct i2c_client *client,
+diff --git a/drivers/iio/adc/men_z188_adc.c b/drivers/iio/adc/men_z188_adc.c
+index 8f3606de4eaf..c80261748d8f 100644
+--- a/drivers/iio/adc/men_z188_adc.c
++++ b/drivers/iio/adc/men_z188_adc.c
+@@ -80,7 +80,6 @@ static int z188_iio_read_raw(struct iio_dev *iio_dev,
+
+ static const struct iio_info z188_adc_info = {
+ .read_raw = &z188_iio_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static void men_z188_config_channels(void __iomem *addr)
+diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c
+index 11484cb38b84..0d237fd69769 100644
+--- a/drivers/iio/adc/meson_saradc.c
++++ b/drivers/iio/adc/meson_saradc.c
+@@ -864,7 +864,6 @@ static int meson_sar_adc_calib(struct iio_dev *indio_dev)
+
+ static const struct iio_info meson_sar_adc_iio_info = {
+ .read_raw = meson_sar_adc_iio_info_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static const struct meson_sar_adc_data meson_sar_adc_meson8_data = {
+diff --git a/drivers/iio/adc/mt6577_auxadc.c b/drivers/iio/adc/mt6577_auxadc.c
+index 414cf44bf19d..a2a23958c2a2 100644
+--- a/drivers/iio/adc/mt6577_auxadc.c
++++ b/drivers/iio/adc/mt6577_auxadc.c
+@@ -180,7 +180,6 @@ static int mt6577_auxadc_read_raw(struct iio_dev *indio_dev,
+ }
+
+ static const struct iio_info mt6577_auxadc_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = &mt6577_auxadc_read_raw,
+ };
+
+diff --git a/drivers/iio/adc/mxs-lradc-adc.c b/drivers/iio/adc/mxs-lradc-adc.c
+index d32b34638c2f..c627513d9f0f 100644
+--- a/drivers/iio/adc/mxs-lradc-adc.c
++++ b/drivers/iio/adc/mxs-lradc-adc.c
+@@ -382,7 +382,6 @@ static const struct attribute_group mxs_lradc_adc_attribute_group = {
+ };
+
+ static const struct iio_info mxs_lradc_adc_iio_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = mxs_lradc_adc_read_raw,
+ .write_raw = mxs_lradc_adc_write_raw,
+ .write_raw_get_fmt = mxs_lradc_adc_write_raw_get_fmt,
+@@ -455,7 +454,6 @@ static int mxs_lradc_adc_configure_trigger(struct iio_trigger *trig, bool state)
+ }
+
+ static const struct iio_trigger_ops mxs_lradc_adc_trigger_ops = {
+- .owner = THIS_MODULE,
+ .set_trigger_state = &mxs_lradc_adc_configure_trigger,
+ };
+
+diff --git a/drivers/iio/adc/nau7802.c b/drivers/iio/adc/nau7802.c
+index 08f446695f97..8997e74a8847 100644
+--- a/drivers/iio/adc/nau7802.c
++++ b/drivers/iio/adc/nau7802.c
+@@ -402,7 +402,6 @@ static int nau7802_write_raw_get_fmt(struct iio_dev *indio_dev,
+ }
+
+ static const struct iio_info nau7802_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = &nau7802_read_raw,
+ .write_raw = &nau7802_write_raw,
+ .write_raw_get_fmt = nau7802_write_raw_get_fmt,
+diff --git a/drivers/iio/adc/palmas_gpadc.c b/drivers/iio/adc/palmas_gpadc.c
+index 7d61b566e148..69b9affeef1e 100644
+--- a/drivers/iio/adc/palmas_gpadc.c
++++ b/drivers/iio/adc/palmas_gpadc.c
+@@ -430,7 +430,6 @@ static int palmas_gpadc_read_raw(struct iio_dev *indio_dev,
+
+ static const struct iio_info palmas_gpadc_iio_info = {
+ .read_raw = palmas_gpadc_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ #define PALMAS_ADC_CHAN_IIO(chan, _type, chan_info) \
+diff --git a/drivers/iio/adc/qcom-pm8xxx-xoadc.c b/drivers/iio/adc/qcom-pm8xxx-xoadc.c
+index cea8f1fb444a..b093ecddf1a8 100644
+--- a/drivers/iio/adc/qcom-pm8xxx-xoadc.c
++++ b/drivers/iio/adc/qcom-pm8xxx-xoadc.c
+@@ -728,7 +728,6 @@ static int pm8xxx_of_xlate(struct iio_dev *indio_dev,
+ }
+
+ static const struct iio_info pm8xxx_xoadc_info = {
+- .driver_module = THIS_MODULE,
+ .of_xlate = pm8xxx_of_xlate,
+ .read_raw = pm8xxx_read_raw,
+ };
+diff --git a/drivers/iio/adc/qcom-spmi-iadc.c b/drivers/iio/adc/qcom-spmi-iadc.c
+index fabd24edc2a1..3f062cd61aba 100644
+--- a/drivers/iio/adc/qcom-spmi-iadc.c
++++ b/drivers/iio/adc/qcom-spmi-iadc.c
+@@ -356,7 +356,6 @@ static int iadc_read_raw(struct iio_dev *indio_dev,
+
+ static const struct iio_info iadc_info = {
+ .read_raw = iadc_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static irqreturn_t iadc_isr(int irq, void *dev_id)
+diff --git a/drivers/iio/adc/qcom-spmi-vadc.c b/drivers/iio/adc/qcom-spmi-vadc.c
+index 9e600bfd1765..3680e0d47412 100644
+--- a/drivers/iio/adc/qcom-spmi-vadc.c
++++ b/drivers/iio/adc/qcom-spmi-vadc.c
+@@ -506,7 +506,6 @@ static int vadc_of_xlate(struct iio_dev *indio_dev,
+ static const struct iio_info vadc_info = {
+ .read_raw = vadc_read_raw,
+ .of_xlate = vadc_of_xlate,
+- .driver_module = THIS_MODULE,
+ };
+
+ struct vadc_channels {
+diff --git a/drivers/iio/adc/rcar-gyroadc.c b/drivers/iio/adc/rcar-gyroadc.c
+index 27a318164619..2cb5397ceeea 100644
+--- a/drivers/iio/adc/rcar-gyroadc.c
++++ b/drivers/iio/adc/rcar-gyroadc.c
+@@ -277,7 +277,6 @@ static int rcar_gyroadc_reg_access(struct iio_dev *indio_dev,
+ }
+
+ static const struct iio_info rcar_gyroadc_iio_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = rcar_gyroadc_read_raw,
+ .debugfs_reg_access = rcar_gyroadc_reg_access,
+ };
+diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c
+index 5f612d694b33..1f98566d5b3c 100644
+--- a/drivers/iio/adc/rockchip_saradc.c
++++ b/drivers/iio/adc/rockchip_saradc.c
+@@ -125,7 +125,6 @@ static irqreturn_t rockchip_saradc_isr(int irq, void *dev_id)
+
+ static const struct iio_info rockchip_saradc_iio_info = {
+ .read_raw = rockchip_saradc_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ #define ADC_CHANNEL(_index, _id) { \
+diff --git a/drivers/iio/adc/spear_adc.c b/drivers/iio/adc/spear_adc.c
+index 5dd61f6a57b9..b1da2c46107c 100644
+--- a/drivers/iio/adc/spear_adc.c
++++ b/drivers/iio/adc/spear_adc.c
+@@ -254,7 +254,6 @@ static int spear_adc_configure(struct spear_adc_state *st)
+ static const struct iio_info spear_adc_info = {
+ .read_raw = &spear_adc_read_raw,
+ .write_raw = &spear_adc_write_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int spear_adc_probe(struct platform_device *pdev)
+diff --git a/drivers/iio/adc/stm32-adc.c b/drivers/iio/adc/stm32-adc.c
+index 04be8bd951be..2c9903d3396d 100644
+--- a/drivers/iio/adc/stm32-adc.c
++++ b/drivers/iio/adc/stm32-adc.c
+@@ -1387,7 +1387,6 @@ static const struct iio_info stm32_adc_iio_info = {
+ .update_scan_mode = stm32_adc_update_scan_mode,
+ .debugfs_reg_access = stm32_adc_debugfs_reg_access,
+ .of_xlate = stm32_adc_of_xlate,
+- .driver_module = THIS_MODULE,
+ };
+
+ static unsigned int stm32_adc_dma_residue(struct stm32_adc *adc)
+diff --git a/drivers/iio/adc/stx104.c b/drivers/iio/adc/stx104.c
+index 2da741d27540..17b021f33180 100644
+--- a/drivers/iio/adc/stx104.c
++++ b/drivers/iio/adc/stx104.c
+@@ -172,7 +172,6 @@ static int stx104_write_raw(struct iio_dev *indio_dev,
+ }
+
+ static const struct iio_info stx104_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = stx104_read_raw,
+ .write_raw = stx104_write_raw
+ };
+diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
+index 137f577d9432..a146160d9966 100644
+--- a/drivers/iio/adc/sun4i-gpadc-iio.c
++++ b/drivers/iio/adc/sun4i-gpadc-iio.c
+@@ -352,7 +352,6 @@ static int sun4i_gpadc_read_raw(struct iio_dev *indio_dev,
+
+ static const struct iio_info sun4i_gpadc_iio_info = {
+ .read_raw = sun4i_gpadc_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static irqreturn_t sun4i_gpadc_temp_data_irq_handler(int irq, void *dev_id)
+diff --git a/drivers/iio/adc/ti-adc081c.c b/drivers/iio/adc/ti-adc081c.c
+index 319172cf7da8..405e3779c0c5 100644
+--- a/drivers/iio/adc/ti-adc081c.c
++++ b/drivers/iio/adc/ti-adc081c.c
+@@ -124,7 +124,6 @@ static struct adcxx1c_model adcxx1c_models[] = {
+
+ static const struct iio_info adc081c_info = {
+ .read_raw = adc081c_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static irqreturn_t adc081c_trigger_handler(int irq, void *p)
+diff --git a/drivers/iio/adc/ti-adc0832.c b/drivers/iio/adc/ti-adc0832.c
+index e952e94a14af..188dae705bf7 100644
+--- a/drivers/iio/adc/ti-adc0832.c
++++ b/drivers/iio/adc/ti-adc0832.c
+@@ -195,7 +195,6 @@ static int adc0832_read_raw(struct iio_dev *iio,
+
+ static const struct iio_info adc0832_info = {
+ .read_raw = adc0832_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static irqreturn_t adc0832_trigger_handler(int irq, void *p)
+diff --git a/drivers/iio/adc/ti-adc084s021.c b/drivers/iio/adc/ti-adc084s021.c
+index a355121c11a4..25504640e126 100644
+--- a/drivers/iio/adc/ti-adc084s021.c
++++ b/drivers/iio/adc/ti-adc084s021.c
+@@ -186,7 +186,6 @@ static int adc084s021_buffer_postdisable(struct iio_dev *indio_dev)
+
+ static const struct iio_info adc084s021_info = {
+ .read_raw = adc084s021_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static const struct iio_buffer_setup_ops adc084s021_buffer_setup_ops = {
+diff --git a/drivers/iio/adc/ti-adc108s102.c b/drivers/iio/adc/ti-adc108s102.c
+index de4e5ac98c6e..841203edaac5 100644
+--- a/drivers/iio/adc/ti-adc108s102.c
++++ b/drivers/iio/adc/ti-adc108s102.c
+@@ -220,7 +220,6 @@ static int adc108s102_read_raw(struct iio_dev *indio_dev,
+ static const struct iio_info adc108s102_info = {
+ .read_raw = &adc108s102_read_raw,
+ .update_scan_mode = &adc108s102_update_scan_mode,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int adc108s102_probe(struct spi_device *spi)
+diff --git a/drivers/iio/adc/ti-adc12138.c b/drivers/iio/adc/ti-adc12138.c
+index 072f03bfe6a0..bf890244789a 100644
+--- a/drivers/iio/adc/ti-adc12138.c
++++ b/drivers/iio/adc/ti-adc12138.c
+@@ -277,7 +277,6 @@ static int adc12138_read_raw(struct iio_dev *iio,
+
+ static const struct iio_info adc12138_info = {
+ .read_raw = adc12138_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int adc12138_init(struct adc12138 *adc)
+diff --git a/drivers/iio/adc/ti-adc128s052.c b/drivers/iio/adc/ti-adc128s052.c
+index 89dfbd31be5c..7cf39b3e2416 100644
+--- a/drivers/iio/adc/ti-adc128s052.c
++++ b/drivers/iio/adc/ti-adc128s052.c
+@@ -130,7 +130,6 @@ static const struct adc128_configuration adc128_config[] = {
+
+ static const struct iio_info adc128_info = {
+ .read_raw = adc128_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int adc128_probe(struct spi_device *spi)
+diff --git a/drivers/iio/adc/ti-adc161s626.c b/drivers/iio/adc/ti-adc161s626.c
+index 4836a0d7aef5..10fa7677ac4b 100644
+--- a/drivers/iio/adc/ti-adc161s626.c
++++ b/drivers/iio/adc/ti-adc161s626.c
+@@ -173,7 +173,6 @@ static int ti_adc_read_raw(struct iio_dev *indio_dev,
+ }
+
+ static const struct iio_info ti_adc_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = ti_adc_read_raw,
+ };
+
+diff --git a/drivers/iio/adc/ti-ads1015.c b/drivers/iio/adc/ti-ads1015.c
+index 9ac2fb032df6..344b768a5c49 100644
+--- a/drivers/iio/adc/ti-ads1015.c
++++ b/drivers/iio/adc/ti-ads1015.c
+@@ -822,7 +822,6 @@ static const struct attribute_group ads1115_attribute_group = {
+ };
+
+ static const struct iio_info ads1015_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = ads1015_read_raw,
+ .write_raw = ads1015_write_raw,
+ .read_event_value = ads1015_read_event,
+@@ -833,7 +832,6 @@ static const struct iio_info ads1015_info = {
+ };
+
+ static const struct iio_info ads1115_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = ads1015_read_raw,
+ .write_raw = ads1015_write_raw,
+ .read_event_value = ads1015_read_event,
+diff --git a/drivers/iio/adc/ti-ads7950.c b/drivers/iio/adc/ti-ads7950.c
+index a376190914ad..0225c1b333ab 100644
+--- a/drivers/iio/adc/ti-ads7950.c
++++ b/drivers/iio/adc/ti-ads7950.c
+@@ -372,7 +372,6 @@ static int ti_ads7950_read_raw(struct iio_dev *indio_dev,
+ static const struct iio_info ti_ads7950_info = {
+ .read_raw = &ti_ads7950_read_raw,
+ .update_scan_mode = ti_ads7950_update_scan_mode,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int ti_ads7950_probe(struct spi_device *spi)
+diff --git a/drivers/iio/adc/ti-ads8688.c b/drivers/iio/adc/ti-ads8688.c
+index 4a163496d9e4..ff4756352ac1 100644
+--- a/drivers/iio/adc/ti-ads8688.c
++++ b/drivers/iio/adc/ti-ads8688.c
+@@ -369,7 +369,6 @@ static const struct iio_info ads8688_info = {
+ .write_raw = &ads8688_write_raw,
+ .write_raw_get_fmt = &ads8688_write_raw_get_fmt,
+ .attrs = &ads8688_attribute_group,
+- .driver_module = THIS_MODULE,
+ };
+
+ static const struct ads8688_chip_info ads8688_chip_info_tbl[] = {
+diff --git a/drivers/iio/adc/ti-tlc4541.c b/drivers/iio/adc/ti-tlc4541.c
+index 78d91a069ea4..2290024c89fc 100644
+--- a/drivers/iio/adc/ti-tlc4541.c
++++ b/drivers/iio/adc/ti-tlc4541.c
+@@ -157,7 +157,6 @@ static int tlc4541_read_raw(struct iio_dev *indio_dev,
+
+ static const struct iio_info tlc4541_info = {
+ .read_raw = &tlc4541_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int tlc4541_probe(struct spi_device *spi)
+diff --git a/drivers/iio/adc/ti_am335x_adc.c b/drivers/iio/adc/ti_am335x_adc.c
+index 6cbed7eb118a..b3e573cc6f5f 100644
+--- a/drivers/iio/adc/ti_am335x_adc.c
++++ b/drivers/iio/adc/ti_am335x_adc.c
+@@ -533,7 +533,6 @@ static int tiadc_read_raw(struct iio_dev *indio_dev,
+
+ static const struct iio_info tiadc_info = {
+ .read_raw = &tiadc_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int tiadc_request_dma(struct platform_device *pdev,
+diff --git a/drivers/iio/adc/twl4030-madc.c b/drivers/iio/adc/twl4030-madc.c
+index e3cfb91bffc6..8c019bb6625f 100644
+--- a/drivers/iio/adc/twl4030-madc.c
++++ b/drivers/iio/adc/twl4030-madc.c
+@@ -212,7 +212,6 @@ static int twl4030_madc_read(struct iio_dev *iio_dev,
+
+ static const struct iio_info twl4030_madc_iio_info = {
+ .read_raw = &twl4030_madc_read,
+- .driver_module = THIS_MODULE,
+ };
+
+ #define TWL4030_ADC_CHANNEL(_channel, _type, _name) { \
+diff --git a/drivers/iio/adc/twl6030-gpadc.c b/drivers/iio/adc/twl6030-gpadc.c
+index bc0e60b9da45..dc83f8f6c3d3 100644
+--- a/drivers/iio/adc/twl6030-gpadc.c
++++ b/drivers/iio/adc/twl6030-gpadc.c
+@@ -843,7 +843,6 @@ static const struct iio_chan_spec twl6032_gpadc_iio_channels[] = {
+
+ static const struct iio_info twl6030_gpadc_iio_info = {
+ .read_raw = &twl6030_gpadc_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static const struct twl6030_gpadc_platform_data twl6030_pdata = {
+diff --git a/drivers/iio/adc/vf610_adc.c b/drivers/iio/adc/vf610_adc.c
+index c168e0db329a..bbcb7a4d7edf 100644
+--- a/drivers/iio/adc/vf610_adc.c
++++ b/drivers/iio/adc/vf610_adc.c
+@@ -799,7 +799,6 @@ static int vf610_adc_reg_access(struct iio_dev *indio_dev,
+ }
+
+ static const struct iio_info vf610_adc_iio_info = {
+- .driver_module = THIS_MODULE,
+ .read_raw = &vf610_read_raw,
+ .write_raw = &vf610_write_raw,
+ .debugfs_reg_access = &vf610_adc_reg_access,
+diff --git a/drivers/iio/adc/viperboard_adc.c b/drivers/iio/adc/viperboard_adc.c
+index 3be2e35721cc..53eb5a4136fe 100644
+--- a/drivers/iio/adc/viperboard_adc.c
++++ b/drivers/iio/adc/viperboard_adc.c
+@@ -107,7 +107,6 @@ static int vprbrd_iio_read_raw(struct iio_dev *iio_dev,
+
+ static const struct iio_info vprbrd_adc_iio_info = {
+ .read_raw = &vprbrd_iio_read_raw,
+- .driver_module = THIS_MODULE,
+ };
+
+ static int vprbrd_adc_probe(struct platform_device *pdev)
+diff --git a/drivers/iio/adc/xilinx-xadc-core.c b/drivers/iio/adc/xilinx-xadc-core.c
+index 4a60497a1f19..d4f21d1be6c8 100644
+--- a/drivers/iio/adc/xilinx-xadc-core.c
++++ b/drivers/iio/adc/xilinx-xadc-core.c
+@@ -675,7 +675,6 @@ static int xadc_trigger_set_state(struct iio_trigger *trigger, bool state)
+ }
+
+ static const struct iio_trigger_ops xadc_trigger_ops = {
+- .owner = THIS_MODULE,
+ .set_trigger_state = &xadc_trigger_set_state,
+ };
+
+@@ -1028,7 +1027,6 @@ static const struct iio_info xadc_info = {
+ .read_event_value = &xadc_read_event_value,
+ .write_event_value = &xadc_write_event_value,
+ .update_scan_mode = &xadc_update_scan_mode,
+- .driver_module = THIS_MODULE,
+ };
+
+ static const struct of_device_id xadc_of_match_table[] = {
+--
+2.19.0
+
diff --git a/patches/0131-iio-adc-rcar-gyroadc-Cast-pointer-to-uintptr_t-to-fi.patch b/patches/0131-iio-adc-rcar-gyroadc-Cast-pointer-to-uintptr_t-to-fi.patch
new file mode 100644
index 0000000..bef29a4
--- /dev/null
+++ b/patches/0131-iio-adc-rcar-gyroadc-Cast-pointer-to-uintptr_t-to-fi.patch
@@ -0,0 +1,41 @@
+From 787344999da34444daf2e84b09842d9727455785 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 4 Oct 2017 14:08:24 +0200
+Subject: [PATCH 0131/1795] iio: adc: rcar-gyroadc: Cast pointer to uintptr_t
+ to fix warning on 64-bit
+
+On 64-bit:
+
+ drivers/iio/adc/rcar-gyroadc.c: In function 'rcar_gyroadc_parse_subdevs':
+ drivers/iio/adc/rcar-gyroadc.c:352:15: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
+ childmode = (unsigned int)of_id->data;
+ ^
+
+Cast the pointer to uintptr_t instead of unsigned int to fix this.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+(cherry picked from commit 2a35734564bd2dc4f73c9e230ff55892290a130f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iio/adc/rcar-gyroadc.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/iio/adc/rcar-gyroadc.c b/drivers/iio/adc/rcar-gyroadc.c
+index 2cb5397ceeea..0098c66a1957 100644
+--- a/drivers/iio/adc/rcar-gyroadc.c
++++ b/drivers/iio/adc/rcar-gyroadc.c
+@@ -348,7 +348,7 @@ static int rcar_gyroadc_parse_subdevs(struct iio_dev *indio_dev)
+ continue;
+ }
+
+- childmode = (unsigned int)of_id->data;
++ childmode = (uintptr_t)of_id->data;
+ switch (childmode) {
+ case RCAR_GYROADC_MODE_SELECT_1_MB88101A:
+ sample_width = 12;
+--
+2.19.0
+
diff --git a/patches/0132-iio-adc-rcar-gyroadc-Use-of_device_get_match_data-he.patch b/patches/0132-iio-adc-rcar-gyroadc-Use-of_device_get_match_data-he.patch
new file mode 100644
index 0000000..d0e09ae
--- /dev/null
+++ b/patches/0132-iio-adc-rcar-gyroadc-Use-of_device_get_match_data-he.patch
@@ -0,0 +1,46 @@
+From d10899cae0b09f10acd2528d3c93ebe25f9453d8 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 4 Oct 2017 14:08:26 +0200
+Subject: [PATCH 0132/1795] iio: adc: rcar-gyroadc: Use
+ of_device_get_match_data() helper
+
+Use the of_device_get_match_data() helper instead of open coding.
+Note that the rcar-gyroadc driver is used with DT only, so there's
+always a valid match.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+(cherry picked from commit fb942f8ce6cdbacc087b808d89d09ff138c25bbe)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iio/adc/rcar-gyroadc.c | 5 ++---
+ 1 file changed, 2 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/iio/adc/rcar-gyroadc.c b/drivers/iio/adc/rcar-gyroadc.c
+index 0098c66a1957..dcb50172186f 100644
+--- a/drivers/iio/adc/rcar-gyroadc.c
++++ b/drivers/iio/adc/rcar-gyroadc.c
+@@ -487,8 +487,6 @@ static int rcar_gyroadc_init_supplies(struct iio_dev *indio_dev)
+
+ static int rcar_gyroadc_probe(struct platform_device *pdev)
+ {
+- const struct of_device_id *of_id =
+- of_match_device(rcar_gyroadc_match, &pdev->dev);
+ struct device *dev = &pdev->dev;
+ struct rcar_gyroadc *priv;
+ struct iio_dev *indio_dev;
+@@ -525,7 +523,8 @@ static int rcar_gyroadc_probe(struct platform_device *pdev)
+ if (ret)
+ return ret;
+
+- priv->model = (enum rcar_gyroadc_model)of_id->data;
++ priv->model = (enum rcar_gyroadc_model)
++ of_device_get_match_data(&pdev->dev);
+
+ platform_set_drvdata(pdev, indio_dev);
+
+--
+2.19.0
+
diff --git a/patches/0133-media-rcar_jpu-fix-two-kernel-doc-markups.patch b/patches/0133-media-rcar_jpu-fix-two-kernel-doc-markups.patch
new file mode 100644
index 0000000..c47a345
--- /dev/null
+++ b/patches/0133-media-rcar_jpu-fix-two-kernel-doc-markups.patch
@@ -0,0 +1,44 @@
+From 75d162a9a6afd91b698d8826c6d4f4f082f0b175 Mon Sep 17 00:00:00 2001
+From: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+Date: Wed, 29 Nov 2017 10:15:53 -0500
+Subject: [PATCH 0133/1795] media: rcar_jpu: fix two kernel-doc markups
+
+On kernel-doc, struct declarations should be declared as "struct foo".
+
+Fix the following warnings:
+ drivers/media/platform/rcar_jpu.c:265: warning: cannot understand function prototype: 'struct jpu_q_data '
+ drivers/media/platform/rcar_jpu.c:281: warning: cannot understand function prototype: 'struct jpu_ctx '
+
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit 538cf6437af951f84cc816d63aafeafc61eb40c1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/media/platform/rcar_jpu.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/media/platform/rcar_jpu.c b/drivers/media/platform/rcar_jpu.c
+index 2e2b8c409150..8b44a849ab41 100644
+--- a/drivers/media/platform/rcar_jpu.c
++++ b/drivers/media/platform/rcar_jpu.c
+@@ -257,7 +257,7 @@ struct jpu_fmt {
+ };
+
+ /**
+- * jpu_q_data - parameters of one queue
++ * struct jpu_q_data - parameters of one queue
+ * @fmtinfo: driver-specific format of this queue
+ * @format: multiplanar format of this queue
+ * @sequence: sequence number
+@@ -269,7 +269,7 @@ struct jpu_q_data {
+ };
+
+ /**
+- * jpu_ctx - the device context data
++ * struct jpu_ctx - the device context data
+ * @jpu: JPEG IP device for this context
+ * @encoder: compression (encode) operation or decompression (decode)
+ * @compr_quality: destination image quality in compression (encode) mode
+--
+2.19.0
+
diff --git a/patches/0134-soc-renesas-rcar-rst-add-R8A77970-support.patch b/patches/0134-soc-renesas-rcar-rst-add-R8A77970-support.patch
new file mode 100644
index 0000000..9c35461
--- /dev/null
+++ b/patches/0134-soc-renesas-rcar-rst-add-R8A77970-support.patch
@@ -0,0 +1,61 @@
+From 59eb5c3fb0fa6544972800f0ee7b9bf0d566a16a Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Tue, 12 Sep 2017 23:37:18 +0300
+Subject: [PATCH 0134/1795] soc: renesas: rcar-rst: add R8A77970 support
+
+Add support for R-Car V3M (R8A77970) to the R-Car RST driver -- this driver
+is needed for the clock driver to work.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 17760376ae31e06f66b3c3b8981f5978d4c53150)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/reset/renesas,rst.txt | 1 +
+ drivers/soc/renesas/Kconfig | 3 ++-
+ drivers/soc/renesas/rcar-rst.c | 1 +
+ 3 files changed, 4 insertions(+), 1 deletion(-)
+
+diff --git a/Documentation/devicetree/bindings/reset/renesas,rst.txt b/Documentation/devicetree/bindings/reset/renesas,rst.txt
+index e5a03ffe04fb..a8014f3ab8ba 100644
+--- a/Documentation/devicetree/bindings/reset/renesas,rst.txt
++++ b/Documentation/devicetree/bindings/reset/renesas,rst.txt
+@@ -26,6 +26,7 @@ Required properties:
+ - "renesas,r8a7794-rst" (R-Car E2)
+ - "renesas,r8a7795-rst" (R-Car H3)
+ - "renesas,r8a7796-rst" (R-Car M3-W)
++ - "renesas,r8a77970-rst" (R-Car V3M)
+ - "renesas,r8a77995-rst" (R-Car D3)
+ - reg: Address start and address range for the device.
+
+diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig
+index 567414cb42ba..f0d562a7c4d3 100644
+--- a/drivers/soc/renesas/Kconfig
++++ b/drivers/soc/renesas/Kconfig
+@@ -3,7 +3,8 @@ config SOC_RENESAS
+ default y if ARCH_RENESAS
+ select SOC_BUS
+ select RST_RCAR if ARCH_RCAR_GEN1 || ARCH_RCAR_GEN2 || \
+- ARCH_R8A7795 || ARCH_R8A7796 || ARCH_R8A77995
++ ARCH_R8A7795 || ARCH_R8A7796 || ARCH_R8A77970 || \
++ ARCH_R8A77995
+ select SYSC_R8A7743 if ARCH_R8A7743
+ select SYSC_R8A7745 if ARCH_R8A7745
+ select SYSC_R8A7779 if ARCH_R8A7779
+diff --git a/drivers/soc/renesas/rcar-rst.c b/drivers/soc/renesas/rcar-rst.c
+index baa47014e96b..3316b028f231 100644
+--- a/drivers/soc/renesas/rcar-rst.c
++++ b/drivers/soc/renesas/rcar-rst.c
+@@ -41,6 +41,7 @@ static const struct of_device_id rcar_rst_matches[] __initconst = {
+ /* R-Car Gen3 is handled like R-Car Gen2 */
+ { .compatible = "renesas,r8a7795-rst", .data = &rcar_rst_gen2 },
+ { .compatible = "renesas,r8a7796-rst", .data = &rcar_rst_gen2 },
++ { .compatible = "renesas,r8a77970-rst", .data = &rcar_rst_gen2 },
+ { .compatible = "renesas,r8a77995-rst", .data = &rcar_rst_gen2 },
+ { /* sentinel */ }
+ };
+--
+2.19.0
+
diff --git a/patches/0135-ASoC-rsnd-add-rsnd_dma_alloc.patch b/patches/0135-ASoC-rsnd-add-rsnd_dma_alloc.patch
new file mode 100644
index 0000000..4720ad0
--- /dev/null
+++ b/patches/0135-ASoC-rsnd-add-rsnd_dma_alloc.patch
@@ -0,0 +1,124 @@
+From 08111dfc9f889edfd792570969ec80b6aef9b225 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Wed, 20 Sep 2017 06:28:44 +0000
+Subject: [PATCH 0135/1795] ASoC: rsnd: add rsnd_dma_alloc()
+
+R-Car sound DMA will be used from SSI/SRC.
+dma.c doesn't alloc DMA handler in .probe timing, because we don't
+know what kind of DMA transfer will be used then.
+Thus, SSI/SRC have *rsnd_mod for DMA. rsnd_dma_attach() will allocate
+it and attach it to system.
+It will be PIO mode if it can't alloc DMA handler.
+
+In case of MIX is used, rsnd_dma_attach() will be called twice from SSI.
+To avoid duplicate allocation, current rsnd_dma_attach() is checking
+allocated DMA handler. This DMA related operation is a little bit
+difficult to understand.
+This patch adds new rsnd_dma_alloc() and separates allocation and attach
+for readable code.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 81cb71240e202a8086bda0755d9d78bd3decd0aa)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/rcar/dma.c | 60 ++++++++++++++++++++++-------------------
+ 1 file changed, 33 insertions(+), 27 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/dma.c b/sound/soc/sh/rcar/dma.c
+index 041ec1080d52..17220c946ff0 100644
+--- a/sound/soc/sh/rcar/dma.c
++++ b/sound/soc/sh/rcar/dma.c
+@@ -753,14 +753,15 @@ static void rsnd_dma_of_path(struct rsnd_mod *this,
+ }
+ }
+
+-int rsnd_dma_attach(struct rsnd_dai_stream *io, struct rsnd_mod *mod,
+- struct rsnd_mod **dma_mod)
++static int rsnd_dma_alloc(struct rsnd_dai_stream *io, struct rsnd_mod *mod,
++ struct rsnd_mod **dma_mod)
+ {
+ struct rsnd_mod *mod_from = NULL;
+ struct rsnd_mod *mod_to = NULL;
+ struct rsnd_priv *priv = rsnd_io_to_priv(io);
+ struct rsnd_dma_ctrl *dmac = rsnd_priv_to_dmac(priv);
+ struct device *dev = rsnd_priv_to_dev(priv);
++ struct rsnd_dma *dma;
+ struct rsnd_mod_ops *ops;
+ enum rsnd_mod_type type;
+ int (*attach)(struct rsnd_dai_stream *io, struct rsnd_dma *dma,
+@@ -800,40 +801,45 @@ int rsnd_dma_attach(struct rsnd_dai_stream *io, struct rsnd_mod *mod,
+ type = RSND_MOD_AUDMA;
+ }
+
+- if (!(*dma_mod)) {
+- struct rsnd_dma *dma;
++ dma = devm_kzalloc(dev, sizeof(*dma), GFP_KERNEL);
++ if (!dma)
++ return -ENOMEM;
+
+- dma = devm_kzalloc(dev, sizeof(*dma), GFP_KERNEL);
+- if (!dma)
+- return -ENOMEM;
++ *dma_mod = rsnd_mod_get(dma);
+
+- *dma_mod = rsnd_mod_get(dma);
++ ret = rsnd_mod_init(priv, *dma_mod, ops, NULL,
++ rsnd_mod_get_status, type, dma_id);
++ if (ret < 0)
++ return ret;
+
+- ret = rsnd_mod_init(priv, *dma_mod, ops, NULL,
+- rsnd_mod_get_status, type, dma_id);
+- if (ret < 0)
+- return ret;
++ dev_dbg(dev, "%s[%d] %s[%d] -> %s[%d]\n",
++ rsnd_mod_name(*dma_mod), rsnd_mod_id(*dma_mod),
++ rsnd_mod_name(mod_from), rsnd_mod_id(mod_from),
++ rsnd_mod_name(mod_to), rsnd_mod_id(mod_to));
++
++ ret = attach(io, dma, mod_from, mod_to);
++ if (ret < 0)
++ return ret;
+
+- dev_dbg(dev, "%s[%d] %s[%d] -> %s[%d]\n",
+- rsnd_mod_name(*dma_mod), rsnd_mod_id(*dma_mod),
+- rsnd_mod_name(mod_from), rsnd_mod_id(mod_from),
+- rsnd_mod_name(mod_to), rsnd_mod_id(mod_to));
++ dma->src_addr = rsnd_dma_addr(io, mod_from, is_play, 1);
++ dma->dst_addr = rsnd_dma_addr(io, mod_to, is_play, 0);
++ dma->mod_from = mod_from;
++ dma->mod_to = mod_to;
++
++ return 0;
++}
++
++int rsnd_dma_attach(struct rsnd_dai_stream *io, struct rsnd_mod *mod,
++ struct rsnd_mod **dma_mod)
++{
++ if (!(*dma_mod)) {
++ int ret = rsnd_dma_alloc(io, mod, dma_mod);
+
+- ret = attach(io, dma, mod_from, mod_to);
+ if (ret < 0)
+ return ret;
+-
+- dma->src_addr = rsnd_dma_addr(io, mod_from, is_play, 1);
+- dma->dst_addr = rsnd_dma_addr(io, mod_to, is_play, 0);
+- dma->mod_from = mod_from;
+- dma->mod_to = mod_to;
+ }
+
+- ret = rsnd_dai_connect(*dma_mod, io, type);
+- if (ret < 0)
+- return ret;
+-
+- return 0;
++ return rsnd_dai_connect(*dma_mod, io, (*dma_mod)->type);
+ }
+
+ int rsnd_dma_probe(struct rsnd_priv *priv)
+--
+2.19.0
+
diff --git a/patches/0136-ASoC-rcar-skip-disabled-SSI-nodes.patch b/patches/0136-ASoC-rcar-skip-disabled-SSI-nodes.patch
new file mode 100644
index 0000000..02c9b71
--- /dev/null
+++ b/patches/0136-ASoC-rcar-skip-disabled-SSI-nodes.patch
@@ -0,0 +1,47 @@
+From 88596adc617181ff2bd238bdf090b5a1ebef085b Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 2 Oct 2017 07:37:32 +0000
+Subject: [PATCH 0136/1795] ASoC: rcar: skip disabled-SSI nodes
+
+The current device tree representation of the R-Car SSI assumes that they
+are numbered consecutively, starting from 0. Alas, this is not the case
+with the R8A77995 (D3) SoC which SSI1/SSI2 aren't present. In order to
+keep the existing device trees working, I'm suggesting to use a disabled
+node for SSI0/SSI1. Teach the SSI probe to just skip disabled nodes.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 9e9e95df06433b4f89cfeef0003af091ee0ebc86)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/rcar/ssi.c | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+diff --git a/sound/soc/sh/rcar/ssi.c b/sound/soc/sh/rcar/ssi.c
+index f0fb85fda42d..fa2469042876 100644
+--- a/sound/soc/sh/rcar/ssi.c
++++ b/sound/soc/sh/rcar/ssi.c
+@@ -1121,6 +1121,9 @@ int rsnd_ssi_probe(struct rsnd_priv *priv)
+
+ i = 0;
+ for_each_child_of_node(node, np) {
++ if (!of_device_is_available(np))
++ goto skip;
++
+ ssi = rsnd_ssi_get(priv, i);
+
+ snprintf(name, RSND_SSI_NAME_SIZE, "%s.%d",
+@@ -1157,7 +1160,7 @@ int rsnd_ssi_probe(struct rsnd_priv *priv)
+ of_node_put(np);
+ goto rsnd_ssi_probe_done;
+ }
+-
++skip:
+ i++;
+ }
+
+--
+2.19.0
+
diff --git a/patches/0137-ASoC-rsnd-add-generic-rsnd_flags_xxx-macro.patch b/patches/0137-ASoC-rsnd-add-generic-rsnd_flags_xxx-macro.patch
new file mode 100644
index 0000000..6a15cca
--- /dev/null
+++ b/patches/0137-ASoC-rsnd-add-generic-rsnd_flags_xxx-macro.patch
@@ -0,0 +1,141 @@
+From 38f0b4611e000c59db9c86d7d2eb5ddb7c8daf55 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Sun, 1 Oct 2017 23:47:50 +0000
+Subject: [PATCH 0137/1795] ASoC: rsnd: add generic rsnd_flags_xxx() macro
+
+SSI is using rsnd_ssi_flags_xxx() macro to control flags.
+But it is useful macro not only for SSI. This patch replace it
+to more generic rsnd_flags_xxx().
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 429919890e22431bc350ecf47b31866bb27631b2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/rcar/rsnd.h | 4 ++++
+ sound/soc/sh/rcar/ssi.c | 27 ++++++++++++---------------
+ 2 files changed, 16 insertions(+), 15 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h
+index c5de71f2dc8c..beffbec42404 100644
+--- a/sound/soc/sh/rcar/rsnd.h
++++ b/sound/soc/sh/rcar/rsnd.h
+@@ -601,6 +601,10 @@ struct rsnd_priv {
+ #define rsnd_is_gen1(priv) (((priv)->flags & RSND_GEN_MASK) == RSND_GEN1)
+ #define rsnd_is_gen2(priv) (((priv)->flags & RSND_GEN_MASK) == RSND_GEN2)
+
++#define rsnd_flags_has(p, f) ((p)->flags & (f))
++#define rsnd_flags_set(p, f) ((p)->flags |= (f))
++#define rsnd_flags_del(p, f) ((p)->flags &= ~(f))
++
+ /*
+ * rsnd_kctrl
+ */
+diff --git a/sound/soc/sh/rcar/ssi.c b/sound/soc/sh/rcar/ssi.c
+index fa2469042876..d64abbbe1a98 100644
+--- a/sound/soc/sh/rcar/ssi.c
++++ b/sound/soc/sh/rcar/ssi.c
+@@ -101,9 +101,6 @@ struct rsnd_ssi {
+ #define rsnd_ssi_get(priv, id) ((struct rsnd_ssi *)(priv->ssi) + id)
+ #define rsnd_ssi_nr(priv) ((priv)->ssi_nr)
+ #define rsnd_mod_to_ssi(_mod) container_of((_mod), struct rsnd_ssi, mod)
+-#define rsnd_ssi_flags_has(p, f) ((p)->flags & f)
+-#define rsnd_ssi_flags_set(p, f) ((p)->flags |= f)
+-#define rsnd_ssi_flags_del(p, f) ((p)->flags = ((p)->flags & ~f))
+ #define rsnd_ssi_is_parent(ssi, io) ((ssi) == rsnd_io_to_mod_ssip(io))
+ #define rsnd_ssi_is_multi_slave(mod, io) \
+ (rsnd_ssi_multi_slaves(io) & (1 << rsnd_mod_id(mod)))
+@@ -116,10 +113,10 @@ int rsnd_ssi_hdmi_port(struct rsnd_dai_stream *io)
+ struct rsnd_mod *mod = rsnd_io_to_mod_ssi(io);
+ struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
+
+- if (rsnd_ssi_flags_has(ssi, RSND_SSI_HDMI0))
++ if (rsnd_flags_has(ssi, RSND_SSI_HDMI0))
+ return RSND_SSI_HDMI_PORT0;
+
+- if (rsnd_ssi_flags_has(ssi, RSND_SSI_HDMI1))
++ if (rsnd_flags_has(ssi, RSND_SSI_HDMI1))
+ return RSND_SSI_HDMI_PORT1;
+
+ return 0;
+@@ -134,7 +131,7 @@ int rsnd_ssi_use_busif(struct rsnd_dai_stream *io)
+ if (!rsnd_ssi_is_dma_mode(mod))
+ return 0;
+
+- if (!(rsnd_ssi_flags_has(ssi, RSND_SSI_NO_BUSIF)))
++ if (!(rsnd_flags_has(ssi, RSND_SSI_NO_BUSIF)))
+ use_busif = 1;
+ if (rsnd_io_to_mod_src(io))
+ use_busif = 1;
+@@ -802,13 +799,13 @@ static int rsnd_ssi_common_probe(struct rsnd_mod *mod,
+ * But it don't need to call request_irq() many times.
+ * Let's control it by RSND_SSI_PROBED flag.
+ */
+- if (!rsnd_ssi_flags_has(ssi, RSND_SSI_PROBED)) {
++ if (!rsnd_flags_has(ssi, RSND_SSI_PROBED)) {
+ ret = request_irq(ssi->irq,
+ rsnd_ssi_interrupt,
+ IRQF_SHARED,
+ dev_name(dev), mod);
+
+- rsnd_ssi_flags_set(ssi, RSND_SSI_PROBED);
++ rsnd_flags_set(ssi, RSND_SSI_PROBED);
+ }
+
+ return ret;
+@@ -826,10 +823,10 @@ static int rsnd_ssi_common_remove(struct rsnd_mod *mod,
+ return 0;
+
+ /* PIO will request IRQ again */
+- if (rsnd_ssi_flags_has(ssi, RSND_SSI_PROBED)) {
++ if (rsnd_flags_has(ssi, RSND_SSI_PROBED)) {
+ free_irq(ssi->irq, mod);
+
+- rsnd_ssi_flags_del(ssi, RSND_SSI_PROBED);
++ rsnd_flags_del(ssi, RSND_SSI_PROBED);
+ }
+
+ return 0;
+@@ -1012,13 +1009,13 @@ static void __rsnd_ssi_parse_hdmi_connection(struct rsnd_priv *priv,
+ ssi = rsnd_mod_to_ssi(mod);
+
+ if (strstr(remote_ep->full_name, "hdmi0")) {
+- rsnd_ssi_flags_set(ssi, RSND_SSI_HDMI0);
++ rsnd_flags_set(ssi, RSND_SSI_HDMI0);
+ dev_dbg(dev, "%s[%d] connected to HDMI0\n",
+ rsnd_mod_name(mod), rsnd_mod_id(mod));
+ }
+
+ if (strstr(remote_ep->full_name, "hdmi1")) {
+- rsnd_ssi_flags_set(ssi, RSND_SSI_HDMI1);
++ rsnd_flags_set(ssi, RSND_SSI_HDMI1);
+ dev_dbg(dev, "%s[%d] connected to HDMI1\n",
+ rsnd_mod_name(mod), rsnd_mod_id(mod));
+ }
+@@ -1051,7 +1048,7 @@ int __rsnd_ssi_is_pin_sharing(struct rsnd_mod *mod)
+ {
+ struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
+
+- return !!(rsnd_ssi_flags_has(ssi, RSND_SSI_CLK_PIN_SHARE));
++ return !!(rsnd_flags_has(ssi, RSND_SSI_CLK_PIN_SHARE));
+ }
+
+ static u32 *rsnd_ssi_get_status(struct rsnd_dai_stream *io,
+@@ -1137,10 +1134,10 @@ int rsnd_ssi_probe(struct rsnd_priv *priv)
+ }
+
+ if (of_get_property(np, "shared-pin", NULL))
+- rsnd_ssi_flags_set(ssi, RSND_SSI_CLK_PIN_SHARE);
++ rsnd_flags_set(ssi, RSND_SSI_CLK_PIN_SHARE);
+
+ if (of_get_property(np, "no-busif", NULL))
+- rsnd_ssi_flags_set(ssi, RSND_SSI_NO_BUSIF);
++ rsnd_flags_set(ssi, RSND_SSI_NO_BUSIF);
+
+ ssi->irq = irq_of_parse_and_map(np, 0);
+ if (!ssi->irq) {
+--
+2.19.0
+
diff --git a/patches/0138-ASoC-rsnd-use-generic-rsnd_flags_xxx-macro-on-ADG.patch b/patches/0138-ASoC-rsnd-use-generic-rsnd_flags_xxx-macro-on-ADG.patch
new file mode 100644
index 0000000..46c773d
--- /dev/null
+++ b/patches/0138-ASoC-rsnd-use-generic-rsnd_flags_xxx-macro-on-ADG.patch
@@ -0,0 +1,73 @@
+From d668328c39d03d5f5d3452f1d5855963edcb4f64 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Sun, 1 Oct 2017 23:48:12 +0000
+Subject: [PATCH 0138/1795] ASoC: rsnd: use generic rsnd_flags_xxx() macro on
+ ADG
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit d0cf7fc948159a3eab9ad2e959cce7f06f2333df)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/rcar/adg.c | 13 ++++++-------
+ 1 file changed, 6 insertions(+), 7 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/adg.c b/sound/soc/sh/rcar/adg.c
+index e28edb1f7263..f21179f29b6c 100644
+--- a/sound/soc/sh/rcar/adg.c
++++ b/sound/soc/sh/rcar/adg.c
+@@ -44,7 +44,6 @@ struct rsnd_adg {
+
+ #define LRCLK_ASYNC (1 << 0)
+ #define AUDIO_OUT_48 (1 << 1)
+-#define adg_mode_flags(adg) (adg->flags)
+
+ #define for_each_rsnd_clk(pos, adg, i) \
+ for (i = 0; \
+@@ -366,8 +365,8 @@ int rsnd_adg_ssi_clk_try_start(struct rsnd_mod *ssi_mod, unsigned int rate)
+
+ rsnd_adg_set_ssi_clk(ssi_mod, data);
+
+- if (adg_mode_flags(adg) & LRCLK_ASYNC) {
+- if (adg_mode_flags(adg) & AUDIO_OUT_48)
++ if (rsnd_flags_has(adg, LRCLK_ASYNC)) {
++ if (rsnd_flags_has(adg, AUDIO_OUT_48))
+ ckr = 0x80000000;
+ } else {
+ if (0 == (rate % 8000))
+@@ -479,10 +478,10 @@ static void rsnd_adg_get_clkout(struct rsnd_priv *priv,
+ }
+
+ if (req_rate[0] % 48000 == 0)
+- adg->flags |= AUDIO_OUT_48;
++ rsnd_flags_set(adg, AUDIO_OUT_48);
+
+ if (of_get_property(np, "clkout-lr-asynchronous", NULL))
+- adg->flags |= LRCLK_ASYNC;
++ rsnd_flags_set(adg, LRCLK_ASYNC);
+
+ /*
+ * This driver is assuming that AUDIO_CLKA/AUDIO_CLKB/AUDIO_CLKC
+@@ -512,7 +511,7 @@ static void rsnd_adg_get_clkout(struct rsnd_priv *priv,
+ adg->rbga_rate_for_441khz = rate / div;
+ ckr |= brg_table[i] << 20;
+ if (req_441kHz_rate &&
+- !(adg_mode_flags(adg) & AUDIO_OUT_48))
++ !rsnd_flags_has(adg, AUDIO_OUT_48))
+ parent_clk_name = __clk_get_name(clk);
+ }
+ }
+@@ -528,7 +527,7 @@ static void rsnd_adg_get_clkout(struct rsnd_priv *priv,
+ adg->rbgb_rate_for_48khz = rate / div;
+ ckr |= brg_table[i] << 16;
+ if (req_48kHz_rate &&
+- (adg_mode_flags(adg) & AUDIO_OUT_48))
++ rsnd_flags_has(adg, AUDIO_OUT_48))
+ parent_clk_name = __clk_get_name(clk);
+ }
+ }
+--
+2.19.0
+
diff --git a/patches/0139-ASoC-rsnd-DVC-kctrl-sets-once.patch b/patches/0139-ASoC-rsnd-DVC-kctrl-sets-once.patch
new file mode 100644
index 0000000..40bd654
--- /dev/null
+++ b/patches/0139-ASoC-rsnd-DVC-kctrl-sets-once.patch
@@ -0,0 +1,63 @@
+From 1b2cc117f049d4b30c5ce3801b5f841a48268da8 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Sun, 1 Oct 2017 23:48:29 +0000
+Subject: [PATCH 0139/1795] ASoC: rsnd: DVC kctrl sets once
+
+Same DVC might be used few times if system/platform is using MIX.
+For example below case.
+
+ DAI0 playback = <&src0 &ctu02 &mix0 &dvc0 &ssi0>;
+ DAI1 playback = <&src2 &ctu03 &mix0 &dvc0 &ssi0>;
+
+This case, ALSA will have DVC,0 and DVC,1 kcontrol interfaces,
+but these are same DVC. This is confusing.
+This patch adds new flags and avoid such case.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit b918f1bc7f1ce463d6fbb6ebf3db36bd302bded8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/rcar/dvc.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/sound/soc/sh/rcar/dvc.c b/sound/soc/sh/rcar/dvc.c
+index 1743ade3cc55..bb22850e8fe6 100644
+--- a/sound/soc/sh/rcar/dvc.c
++++ b/sound/soc/sh/rcar/dvc.c
+@@ -44,8 +44,11 @@ struct rsnd_dvc {
+ struct rsnd_kctrl_cfg_s ren; /* Ramp Enable */
+ struct rsnd_kctrl_cfg_s rup; /* Ramp Rate Up */
+ struct rsnd_kctrl_cfg_s rdown; /* Ramp Rate Down */
++ u32 flags;
+ };
+
++#define KCTRL_INITIALIZED (1 << 0)
++
+ #define rsnd_dvc_get(priv, id) ((struct rsnd_dvc *)(priv->dvc) + id)
+ #define rsnd_dvc_nr(priv) ((priv)->dvc_nr)
+
+@@ -254,6 +257,9 @@ static int rsnd_dvc_pcm_new(struct rsnd_mod *mod,
+ int channels = rsnd_rdai_channels_get(rdai);
+ int ret;
+
++ if (rsnd_flags_has(dvc, KCTRL_INITIALIZED))
++ return 0;
++
+ /* Volume */
+ ret = rsnd_kctrl_new_m(mod, io, rtd,
+ is_play ?
+@@ -307,6 +313,8 @@ static int rsnd_dvc_pcm_new(struct rsnd_mod *mod,
+ if (ret < 0)
+ return ret;
+
++ rsnd_flags_set(dvc, KCTRL_INITIALIZED);
++
+ return 0;
+ }
+
+--
+2.19.0
+
diff --git a/patches/0140-ASoC-rsnd-CTU-kctrl-sets-once.patch b/patches/0140-ASoC-rsnd-CTU-kctrl-sets-once.patch
new file mode 100644
index 0000000..557cb04
--- /dev/null
+++ b/patches/0140-ASoC-rsnd-CTU-kctrl-sets-once.patch
@@ -0,0 +1,63 @@
+From d672412e3dff1da5870e1f6c97050eabc1be8bb7 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Sun, 1 Oct 2017 23:48:46 +0000
+Subject: [PATCH 0140/1795] ASoC: rsnd: CTU kctrl sets once
+
+Same CTU might be used few times if system/platform is using MIX.
+For example below case.
+
+ DAI0 playback = <&src0 &ctu02 &mix0 &dvc0 &ssi0>;
+ DAI1 playback = <&src2 &ctu03 &mix0 &dvc0 &ssi0>;
+
+This case, ALSA will have CTU,0 and CTU,1 kcontrol interfaces,
+but these are same CTU. This is confusing.
+This patch adds new flags and avoid such case.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 99dc79d0600849ff878a38d9884e76f5bebd3228)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/rcar/ctu.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/sound/soc/sh/rcar/ctu.c b/sound/soc/sh/rcar/ctu.c
+index e7f53f44165d..ad07ba8c3720 100644
+--- a/sound/soc/sh/rcar/ctu.c
++++ b/sound/soc/sh/rcar/ctu.c
+@@ -81,8 +81,11 @@ struct rsnd_ctu {
+ struct rsnd_kctrl_cfg_m sv3;
+ struct rsnd_kctrl_cfg_s reset;
+ int channels;
++ u32 flags;
+ };
+
++#define KCTRL_INITIALIZED (1 << 0)
++
+ #define rsnd_ctu_nr(priv) ((priv)->ctu_nr)
+ #define for_each_rsnd_ctu(pos, priv, i) \
+ for ((i) = 0; \
+@@ -277,6 +280,9 @@ static int rsnd_ctu_pcm_new(struct rsnd_mod *mod,
+ struct rsnd_ctu *ctu = rsnd_mod_to_ctu(mod);
+ int ret;
+
++ if (rsnd_flags_has(ctu, KCTRL_INITIALIZED))
++ return 0;
++
+ /* CTU Pass */
+ ret = rsnd_kctrl_new_m(mod, io, rtd, "CTU Pass",
+ rsnd_kctrl_accept_anytime,
+@@ -326,6 +332,8 @@ static int rsnd_ctu_pcm_new(struct rsnd_mod *mod,
+ rsnd_ctu_value_reset,
+ &ctu->reset, 1);
+
++ rsnd_flags_set(ctu, KCTRL_INITIALIZED);
++
+ return ret;
+ }
+
+--
+2.19.0
+
diff --git a/patches/0141-ASoC-rsnd-makes-volume-ramp-rate-list-generic.patch b/patches/0141-ASoC-rsnd-makes-volume-ramp-rate-list-generic.patch
new file mode 100644
index 0000000..31cb28c
--- /dev/null
+++ b/patches/0141-ASoC-rsnd-makes-volume-ramp-rate-list-generic.patch
@@ -0,0 +1,140 @@
+From 5da97aa1b64e106d34c4d8686043b2723cfdddd8 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Sun, 1 Oct 2017 23:49:03 +0000
+Subject: [PATCH 0141/1795] ASoC: rsnd: makes volume ramp rate list generic
+
+DVC is supporting Volume Ramp Rate, and MIX has Volume Ramp
+but not yet supported. To support MIX Volume Ramp, we want to
+share Rate List since DVC/MIX are using almost same list.
+This patch move DVC specific Volume Ramp Rate List to core.c.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit f3c26ac61c09862f0037fe484a98da0364f02ec3)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/rcar/core.c | 27 +++++++++++++++++++++++++++
+ sound/soc/sh/rcar/dvc.c | 33 ++++-----------------------------
+ sound/soc/sh/rcar/rsnd.h | 7 +++++--
+ 3 files changed, 36 insertions(+), 31 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
+index 107133297e8d..2d94b3d4519c 100644
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -1242,6 +1242,33 @@ struct rsnd_kctrl_cfg *rsnd_kctrl_init_s(struct rsnd_kctrl_cfg_s *cfg)
+ return &cfg->cfg;
+ }
+
++const char * const volume_ramp_rate[] = {
++ "128 dB/1 step", /* 00000 */
++ "64 dB/1 step", /* 00001 */
++ "32 dB/1 step", /* 00010 */
++ "16 dB/1 step", /* 00011 */
++ "8 dB/1 step", /* 00100 */
++ "4 dB/1 step", /* 00101 */
++ "2 dB/1 step", /* 00110 */
++ "1 dB/1 step", /* 00111 */
++ "0.5 dB/1 step", /* 01000 */
++ "0.25 dB/1 step", /* 01001 */
++ "0.125 dB/1 step", /* 01010 */
++ "0.125 dB/2 steps", /* 01011 */
++ "0.125 dB/4 steps", /* 01100 */
++ "0.125 dB/8 steps", /* 01101 */
++ "0.125 dB/16 steps", /* 01110 */
++ "0.125 dB/32 steps", /* 01111 */
++ "0.125 dB/64 steps", /* 10000 */
++ "0.125 dB/128 steps", /* 10001 */
++ "0.125 dB/256 steps", /* 10010 */
++ "0.125 dB/512 steps", /* 10011 */
++ "0.125 dB/1024 steps", /* 10100 */
++ "0.125 dB/2048 steps", /* 10101 */
++ "0.125 dB/4096 steps", /* 10110 */
++ "0.125 dB/8192 steps", /* 10111 = VOLUME_RAMP_MAX_DVC */
++};
++
+ int rsnd_kctrl_new(struct rsnd_mod *mod,
+ struct rsnd_dai_stream *io,
+ struct snd_soc_pcm_runtime *rtd,
+diff --git a/sound/soc/sh/rcar/dvc.c b/sound/soc/sh/rcar/dvc.c
+index bb22850e8fe6..4ef318ac73d5 100644
+--- a/sound/soc/sh/rcar/dvc.c
++++ b/sound/soc/sh/rcar/dvc.c
+@@ -61,33 +61,6 @@ struct rsnd_dvc {
+ ((pos) = (struct rsnd_dvc *)(priv)->dvc + i); \
+ i++)
+
+-static const char * const dvc_ramp_rate[] = {
+- "128 dB/1 step", /* 00000 */
+- "64 dB/1 step", /* 00001 */
+- "32 dB/1 step", /* 00010 */
+- "16 dB/1 step", /* 00011 */
+- "8 dB/1 step", /* 00100 */
+- "4 dB/1 step", /* 00101 */
+- "2 dB/1 step", /* 00110 */
+- "1 dB/1 step", /* 00111 */
+- "0.5 dB/1 step", /* 01000 */
+- "0.25 dB/1 step", /* 01001 */
+- "0.125 dB/1 step", /* 01010 */
+- "0.125 dB/2 steps", /* 01011 */
+- "0.125 dB/4 steps", /* 01100 */
+- "0.125 dB/8 steps", /* 01101 */
+- "0.125 dB/16 steps", /* 01110 */
+- "0.125 dB/32 steps", /* 01111 */
+- "0.125 dB/64 steps", /* 10000 */
+- "0.125 dB/128 steps", /* 10001 */
+- "0.125 dB/256 steps", /* 10010 */
+- "0.125 dB/512 steps", /* 10011 */
+- "0.125 dB/1024 steps", /* 10100 */
+- "0.125 dB/2048 steps", /* 10101 */
+- "0.125 dB/4096 steps", /* 10110 */
+- "0.125 dB/8192 steps", /* 10111 */
+-};
+-
+ static void rsnd_dvc_activation(struct rsnd_mod *mod)
+ {
+ rsnd_mod_write(mod, DVC_SWRSR, 0);
+@@ -298,7 +271,8 @@ static int rsnd_dvc_pcm_new(struct rsnd_mod *mod,
+ rsnd_kctrl_accept_anytime,
+ rsnd_dvc_volume_update,
+ &dvc->rup,
+- dvc_ramp_rate);
++ volume_ramp_rate,
++ VOLUME_RAMP_MAX_DVC);
+ if (ret < 0)
+ return ret;
+
+@@ -308,7 +282,8 @@ static int rsnd_dvc_pcm_new(struct rsnd_mod *mod,
+ rsnd_kctrl_accept_anytime,
+ rsnd_dvc_volume_update,
+ &dvc->rdown,
+- dvc_ramp_rate);
++ volume_ramp_rate,
++ VOLUME_RAMP_MAX_DVC);
+
+ if (ret < 0)
+ return ret;
+diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h
+index beffbec42404..9d66a15000fa 100644
+--- a/sound/soc/sh/rcar/rsnd.h
++++ b/sound/soc/sh/rcar/rsnd.h
+@@ -656,9 +656,12 @@ int rsnd_kctrl_new(struct rsnd_mod *mod,
+ rsnd_kctrl_new(mod, io, rtd, name, accept, update, rsnd_kctrl_init_s(cfg), \
+ NULL, 1, max)
+
+-#define rsnd_kctrl_new_e(mod, io, rtd, name, accept, update, cfg, texts) \
++#define rsnd_kctrl_new_e(mod, io, rtd, name, accept, update, cfg, texts, size) \
+ rsnd_kctrl_new(mod, io, rtd, name, accept, update, rsnd_kctrl_init_s(cfg), \
+- texts, 1, ARRAY_SIZE(texts))
++ texts, 1, size)
++
++extern const char * const volume_ramp_rate[];
++#define VOLUME_RAMP_MAX_DVC (0x17 + 1)
+
+ /*
+ * R-Car SSI
+--
+2.19.0
+
diff --git a/patches/0142-ASoC-rsnd-add-MIX-Volume-Ramp-support.patch b/patches/0142-ASoC-rsnd-add-MIX-Volume-Ramp-support.patch
new file mode 100644
index 0000000..ec0788f
--- /dev/null
+++ b/patches/0142-ASoC-rsnd-add-MIX-Volume-Ramp-support.patch
@@ -0,0 +1,269 @@
+From e22d997e419e05cc57fbeed7c9ce099edec6ceea Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Sun, 1 Oct 2017 23:49:18 +0000
+Subject: [PATCH 0142/1795] ASoC: rsnd: add MIX Volume Ramp support
+
+Both DVC/MIX have Volume Ramp Control. This patch supprts MIX
+Volume Ramp. One note is that main purpose of MIX Volume Ramp
+is to reduce noise, thus, MIX Ramp range is very few if you
+compare to DVC Volume Ramp (DVC = 5bit, MIX = 4bit).
+
+You can use MIX Volume Ranp like below
+ amixer set "MIX Ramp Up Rate" "0.125 dB/1 step"
+ amixer set "MIX Ramp Down Rate" "0.125 dB/1 step"
+ amixer set "MIX Ramp" on
+ aplay xxx.wav &
+ amixer set "MIX",0 80% // DAI0 Volume Down
+ amixer set "MIX",1 100% // DAI1 Volume Up
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 3e3c9ee1e4b3d0ef1f68f2037752196e7260bad9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/rcar/core.c | 2 +-
+ sound/soc/sh/rcar/mix.c | 158 +++++++++++++++++++++++++++++++++++++--
+ sound/soc/sh/rcar/rsnd.h | 1 +
+ 3 files changed, 154 insertions(+), 7 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
+index 2d94b3d4519c..e9b0b0f5f0ee 100644
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -1253,7 +1253,7 @@ const char * const volume_ramp_rate[] = {
+ "1 dB/1 step", /* 00111 */
+ "0.5 dB/1 step", /* 01000 */
+ "0.25 dB/1 step", /* 01001 */
+- "0.125 dB/1 step", /* 01010 */
++ "0.125 dB/1 step", /* 01010 = VOLUME_RAMP_MAX_MIX */
+ "0.125 dB/2 steps", /* 01011 */
+ "0.125 dB/4 steps", /* 01100 */
+ "0.125 dB/8 steps", /* 01101 */
+diff --git a/sound/soc/sh/rcar/mix.c b/sound/soc/sh/rcar/mix.c
+index 6c4826c189a4..912cfec49038 100644
+--- a/sound/soc/sh/rcar/mix.c
++++ b/sound/soc/sh/rcar/mix.c
+@@ -7,6 +7,33 @@
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
++
++/*
++ * CTUn MIXn
++ * +------+ +------+
++ * [SRC3 / SRC6] -> |CTU n0| -> [MIX n0| ->
++ * [SRC4 / SRC9] -> |CTU n1| -> [MIX n1| ->
++ * [SRC0 / SRC1] -> |CTU n2| -> [MIX n2| ->
++ * [SRC2 / SRC5] -> |CTU n3| -> [MIX n3| ->
++ * +------+ +------+
++ *
++ * ex)
++ * DAI0 : playback = <&src0 &ctu02 &mix0 &dvc0 &ssi0>;
++ * DAI1 : playback = <&src2 &ctu03 &mix0 &dvc0 &ssi0>;
++ *
++ * MIX Volume
++ * amixer set "MIX",0 100% // DAI0 Volume
++ * amixer set "MIX",1 100% // DAI1 Volume
++ *
++ * Volume Ramp
++ * amixer set "MIX Ramp Up Rate" "0.125 dB/1 step"
++ * amixer set "MIX Ramp Down Rate" "4 dB/1 step"
++ * amixer set "MIX Ramp" on
++ * aplay xxx.wav &
++ * amixer set "MIX",0 80% // DAI0 Volume Down
++ * amixer set "MIX",1 100% // DAI1 Volume Up
++ */
++
+ #include "rsnd.h"
+
+ #define MIX_NAME_SIZE 16
+@@ -14,8 +41,27 @@
+
+ struct rsnd_mix {
+ struct rsnd_mod mod;
++ struct rsnd_kctrl_cfg_s volumeA; /* MDBAR */
++ struct rsnd_kctrl_cfg_s volumeB; /* MDBBR */
++ struct rsnd_kctrl_cfg_s volumeC; /* MDBCR */
++ struct rsnd_kctrl_cfg_s volumeD; /* MDBDR */
++ struct rsnd_kctrl_cfg_s ren; /* Ramp Enable */
++ struct rsnd_kctrl_cfg_s rup; /* Ramp Rate Up */
++ struct rsnd_kctrl_cfg_s rdw; /* Ramp Rate Down */
++ u32 flags;
+ };
+
++#define ONCE_KCTRL_INITIALIZED (1 << 0)
++#define HAS_VOLA (1 << 1)
++#define HAS_VOLB (1 << 2)
++#define HAS_VOLC (1 << 3)
++#define HAS_VOLD (1 << 4)
++
++#define VOL_MAX 0x3ff
++
++#define rsnd_mod_to_mix(_mod) \
++ container_of((_mod), struct rsnd_mix, mod)
++
+ #define rsnd_mix_get(priv, id) ((struct rsnd_mix *)(priv->mix) + id)
+ #define rsnd_mix_nr(priv) ((priv)->mix_nr)
+ #define for_each_rsnd_mix(pos, priv, i) \
+@@ -36,26 +82,43 @@ static void rsnd_mix_halt(struct rsnd_mod *mod)
+ rsnd_mod_write(mod, MIX_SWRSR, 0);
+ }
+
++#define rsnd_mix_get_vol(mix, X) \
++ rsnd_flags_has(mix, HAS_VOL##X) ? \
++ (VOL_MAX - mix->volume##X.cfg.val[0]) : 0
+ static void rsnd_mix_volume_parameter(struct rsnd_dai_stream *io,
+ struct rsnd_mod *mod)
+ {
+- rsnd_mod_write(mod, MIX_MDBAR, 0);
+- rsnd_mod_write(mod, MIX_MDBBR, 0);
+- rsnd_mod_write(mod, MIX_MDBCR, 0);
+- rsnd_mod_write(mod, MIX_MDBDR, 0);
++ struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
++ struct device *dev = rsnd_priv_to_dev(priv);
++ struct rsnd_mix *mix = rsnd_mod_to_mix(mod);
++ u32 volA = rsnd_mix_get_vol(mix, A);
++ u32 volB = rsnd_mix_get_vol(mix, B);
++ u32 volC = rsnd_mix_get_vol(mix, C);
++ u32 volD = rsnd_mix_get_vol(mix, D);
++
++ dev_dbg(dev, "MIX A/B/C/D = %02x/%02x/%02x/%02x\n",
++ volA, volB, volC, volD);
++
++ rsnd_mod_write(mod, MIX_MDBAR, volA);
++ rsnd_mod_write(mod, MIX_MDBBR, volB);
++ rsnd_mod_write(mod, MIX_MDBCR, volC);
++ rsnd_mod_write(mod, MIX_MDBDR, volD);
+ }
+
+ static void rsnd_mix_volume_init(struct rsnd_dai_stream *io,
+ struct rsnd_mod *mod)
+ {
++ struct rsnd_mix *mix = rsnd_mod_to_mix(mod);
++
+ rsnd_mod_write(mod, MIX_MIXIR, 1);
+
+ /* General Information */
+ rsnd_mod_write(mod, MIX_ADINR, rsnd_runtime_channel_after_ctu(io));
+
+ /* volume step */
+- rsnd_mod_write(mod, MIX_MIXMR, 0);
+- rsnd_mod_write(mod, MIX_MVPDR, 0);
++ rsnd_mod_write(mod, MIX_MIXMR, mix->ren.cfg.val[0]);
++ rsnd_mod_write(mod, MIX_MVPDR, mix->rup.cfg.val[0] << 8 |
++ mix->rdw.cfg.val[0]);
+
+ /* common volume parameter */
+ rsnd_mix_volume_parameter(io, mod);
+@@ -109,11 +172,94 @@ static int rsnd_mix_quit(struct rsnd_mod *mod,
+ return 0;
+ }
+
++static int rsnd_mix_pcm_new(struct rsnd_mod *mod,
++ struct rsnd_dai_stream *io,
++ struct snd_soc_pcm_runtime *rtd)
++{
++ struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
++ struct device *dev = rsnd_priv_to_dev(priv);
++ struct rsnd_mix *mix = rsnd_mod_to_mix(mod);
++ struct rsnd_mod *src_mod = rsnd_io_to_mod_src(io);
++ struct rsnd_kctrl_cfg_s *volume;
++ int ret;
++
++ switch (rsnd_mod_id(src_mod)) {
++ case 3:
++ case 6: /* MDBAR */
++ volume = &mix->volumeA;
++ rsnd_flags_set(mix, HAS_VOLA);
++ break;
++ case 4:
++ case 9: /* MDBBR */
++ volume = &mix->volumeB;
++ rsnd_flags_set(mix, HAS_VOLB);
++ break;
++ case 0:
++ case 1: /* MDBCR */
++ volume = &mix->volumeC;
++ rsnd_flags_set(mix, HAS_VOLC);
++ break;
++ case 2:
++ case 5: /* MDBDR */
++ volume = &mix->volumeD;
++ rsnd_flags_set(mix, HAS_VOLD);
++ break;
++ default:
++ dev_err(dev, "unknown SRC is connected\n");
++ return -EINVAL;
++ }
++
++ /* Volume */
++ ret = rsnd_kctrl_new_s(mod, io, rtd,
++ "MIX Playback Volume",
++ rsnd_kctrl_accept_anytime,
++ rsnd_mix_volume_update,
++ volume, VOL_MAX);
++ if (ret < 0)
++ return ret;
++ volume->cfg.val[0] = VOL_MAX;
++
++ if (rsnd_flags_has(mix, ONCE_KCTRL_INITIALIZED))
++ return ret;
++
++ /* Ramp */
++ ret = rsnd_kctrl_new_s(mod, io, rtd,
++ "MIX Ramp Switch",
++ rsnd_kctrl_accept_anytime,
++ rsnd_mix_volume_update,
++ &mix->ren, 1);
++ if (ret < 0)
++ return ret;
++
++ ret = rsnd_kctrl_new_e(mod, io, rtd,
++ "MIX Ramp Up Rate",
++ rsnd_kctrl_accept_anytime,
++ rsnd_mix_volume_update,
++ &mix->rup,
++ volume_ramp_rate,
++ VOLUME_RAMP_MAX_MIX);
++ if (ret < 0)
++ return ret;
++
++ ret = rsnd_kctrl_new_e(mod, io, rtd,
++ "MIX Ramp Down Rate",
++ rsnd_kctrl_accept_anytime,
++ rsnd_mix_volume_update,
++ &mix->rdw,
++ volume_ramp_rate,
++ VOLUME_RAMP_MAX_MIX);
++
++ rsnd_flags_set(mix, ONCE_KCTRL_INITIALIZED);
++
++ return ret;
++}
++
+ static struct rsnd_mod_ops rsnd_mix_ops = {
+ .name = MIX_NAME,
+ .probe = rsnd_mix_probe_,
+ .init = rsnd_mix_init,
+ .quit = rsnd_mix_quit,
++ .pcm_new = rsnd_mix_pcm_new,
+ };
+
+ struct rsnd_mod *rsnd_mix_mod_get(struct rsnd_priv *priv, int id)
+diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h
+index 9d66a15000fa..0d9f9c3343da 100644
+--- a/sound/soc/sh/rcar/rsnd.h
++++ b/sound/soc/sh/rcar/rsnd.h
+@@ -662,6 +662,7 @@ int rsnd_kctrl_new(struct rsnd_mod *mod,
+
+ extern const char * const volume_ramp_rate[];
+ #define VOLUME_RAMP_MAX_DVC (0x17 + 1)
++#define VOLUME_RAMP_MAX_MIX (0x0a + 1)
+
+ /*
+ * R-Car SSI
+--
+2.19.0
+
diff --git a/patches/0143-ASoC-rsnd-add-rsnd_kctrl_xxx-macro.patch b/patches/0143-ASoC-rsnd-add-rsnd_kctrl_xxx-macro.patch
new file mode 100644
index 0000000..21d2980
--- /dev/null
+++ b/patches/0143-ASoC-rsnd-add-rsnd_kctrl_xxx-macro.patch
@@ -0,0 +1,246 @@
+From 687afbcc6d83aadcaf4947e5b589e75258c542f7 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Wed, 11 Oct 2017 04:42:34 +0000
+Subject: [PATCH 0143/1795] ASoC: rsnd: add rsnd_kctrl_xxx() macro
+
+Current CTU/MIX/DVC are directly using rsnd_kctrl_cfg_m/s to control
+val etc, but it is difficult to read/understand.
+And there was no uniformity in access method.
+This patch adds new rsnd_kctrl_xxx() and implements uniformed access
+method.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 3a9fa27be507b19107a8b3fe03a67e8145aea88c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/rcar/ctu.c | 80 ++++++++++++++++++++--------------------
+ sound/soc/sh/rcar/dvc.c | 19 +++++-----
+ sound/soc/sh/rcar/mix.c | 10 ++---
+ sound/soc/sh/rcar/rsnd.h | 4 ++
+ 4 files changed, 59 insertions(+), 54 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/ctu.c b/sound/soc/sh/rcar/ctu.c
+index ad07ba8c3720..d201d551866d 100644
+--- a/sound/soc/sh/rcar/ctu.c
++++ b/sound/soc/sh/rcar/ctu.c
+@@ -133,7 +133,7 @@ static void rsnd_ctu_value_init(struct rsnd_dai_stream *io,
+ int i;
+
+ for (i = 0; i < RSND_MAX_CHANNELS; i++) {
+- u32 val = ctu->pass.val[i];
++ u32 val = rsnd_kctrl_valm(ctu->pass, i);
+
+ cpmdr |= val << (28 - (i * 4));
+
+@@ -150,44 +150,44 @@ static void rsnd_ctu_value_init(struct rsnd_dai_stream *io,
+ rsnd_mod_write(mod, CTU_SCMDR, scmdr);
+
+ if (scmdr > 0) {
+- rsnd_mod_write(mod, CTU_SV00R, ctu->sv0.val[0]);
+- rsnd_mod_write(mod, CTU_SV01R, ctu->sv0.val[1]);
+- rsnd_mod_write(mod, CTU_SV02R, ctu->sv0.val[2]);
+- rsnd_mod_write(mod, CTU_SV03R, ctu->sv0.val[3]);
+- rsnd_mod_write(mod, CTU_SV04R, ctu->sv0.val[4]);
+- rsnd_mod_write(mod, CTU_SV05R, ctu->sv0.val[5]);
+- rsnd_mod_write(mod, CTU_SV06R, ctu->sv0.val[6]);
+- rsnd_mod_write(mod, CTU_SV07R, ctu->sv0.val[7]);
++ rsnd_mod_write(mod, CTU_SV00R, rsnd_kctrl_valm(ctu->sv0, 0));
++ rsnd_mod_write(mod, CTU_SV01R, rsnd_kctrl_valm(ctu->sv0, 1));
++ rsnd_mod_write(mod, CTU_SV02R, rsnd_kctrl_valm(ctu->sv0, 2));
++ rsnd_mod_write(mod, CTU_SV03R, rsnd_kctrl_valm(ctu->sv0, 3));
++ rsnd_mod_write(mod, CTU_SV04R, rsnd_kctrl_valm(ctu->sv0, 4));
++ rsnd_mod_write(mod, CTU_SV05R, rsnd_kctrl_valm(ctu->sv0, 5));
++ rsnd_mod_write(mod, CTU_SV06R, rsnd_kctrl_valm(ctu->sv0, 6));
++ rsnd_mod_write(mod, CTU_SV07R, rsnd_kctrl_valm(ctu->sv0, 7));
+ }
+ if (scmdr > 1) {
+- rsnd_mod_write(mod, CTU_SV10R, ctu->sv1.val[0]);
+- rsnd_mod_write(mod, CTU_SV11R, ctu->sv1.val[1]);
+- rsnd_mod_write(mod, CTU_SV12R, ctu->sv1.val[2]);
+- rsnd_mod_write(mod, CTU_SV13R, ctu->sv1.val[3]);
+- rsnd_mod_write(mod, CTU_SV14R, ctu->sv1.val[4]);
+- rsnd_mod_write(mod, CTU_SV15R, ctu->sv1.val[5]);
+- rsnd_mod_write(mod, CTU_SV16R, ctu->sv1.val[6]);
+- rsnd_mod_write(mod, CTU_SV17R, ctu->sv1.val[7]);
++ rsnd_mod_write(mod, CTU_SV10R, rsnd_kctrl_valm(ctu->sv1, 0));
++ rsnd_mod_write(mod, CTU_SV11R, rsnd_kctrl_valm(ctu->sv1, 1));
++ rsnd_mod_write(mod, CTU_SV12R, rsnd_kctrl_valm(ctu->sv1, 2));
++ rsnd_mod_write(mod, CTU_SV13R, rsnd_kctrl_valm(ctu->sv1, 3));
++ rsnd_mod_write(mod, CTU_SV14R, rsnd_kctrl_valm(ctu->sv1, 4));
++ rsnd_mod_write(mod, CTU_SV15R, rsnd_kctrl_valm(ctu->sv1, 5));
++ rsnd_mod_write(mod, CTU_SV16R, rsnd_kctrl_valm(ctu->sv1, 6));
++ rsnd_mod_write(mod, CTU_SV17R, rsnd_kctrl_valm(ctu->sv1, 7));
+ }
+ if (scmdr > 2) {
+- rsnd_mod_write(mod, CTU_SV20R, ctu->sv2.val[0]);
+- rsnd_mod_write(mod, CTU_SV21R, ctu->sv2.val[1]);
+- rsnd_mod_write(mod, CTU_SV22R, ctu->sv2.val[2]);
+- rsnd_mod_write(mod, CTU_SV23R, ctu->sv2.val[3]);
+- rsnd_mod_write(mod, CTU_SV24R, ctu->sv2.val[4]);
+- rsnd_mod_write(mod, CTU_SV25R, ctu->sv2.val[5]);
+- rsnd_mod_write(mod, CTU_SV26R, ctu->sv2.val[6]);
+- rsnd_mod_write(mod, CTU_SV27R, ctu->sv2.val[7]);
++ rsnd_mod_write(mod, CTU_SV20R, rsnd_kctrl_valm(ctu->sv2, 0));
++ rsnd_mod_write(mod, CTU_SV21R, rsnd_kctrl_valm(ctu->sv2, 1));
++ rsnd_mod_write(mod, CTU_SV22R, rsnd_kctrl_valm(ctu->sv2, 2));
++ rsnd_mod_write(mod, CTU_SV23R, rsnd_kctrl_valm(ctu->sv2, 3));
++ rsnd_mod_write(mod, CTU_SV24R, rsnd_kctrl_valm(ctu->sv2, 4));
++ rsnd_mod_write(mod, CTU_SV25R, rsnd_kctrl_valm(ctu->sv2, 5));
++ rsnd_mod_write(mod, CTU_SV26R, rsnd_kctrl_valm(ctu->sv2, 6));
++ rsnd_mod_write(mod, CTU_SV27R, rsnd_kctrl_valm(ctu->sv2, 7));
+ }
+ if (scmdr > 3) {
+- rsnd_mod_write(mod, CTU_SV30R, ctu->sv3.val[0]);
+- rsnd_mod_write(mod, CTU_SV31R, ctu->sv3.val[1]);
+- rsnd_mod_write(mod, CTU_SV32R, ctu->sv3.val[2]);
+- rsnd_mod_write(mod, CTU_SV33R, ctu->sv3.val[3]);
+- rsnd_mod_write(mod, CTU_SV34R, ctu->sv3.val[4]);
+- rsnd_mod_write(mod, CTU_SV35R, ctu->sv3.val[5]);
+- rsnd_mod_write(mod, CTU_SV36R, ctu->sv3.val[6]);
+- rsnd_mod_write(mod, CTU_SV37R, ctu->sv3.val[7]);
++ rsnd_mod_write(mod, CTU_SV30R, rsnd_kctrl_valm(ctu->sv3, 0));
++ rsnd_mod_write(mod, CTU_SV31R, rsnd_kctrl_valm(ctu->sv3, 1));
++ rsnd_mod_write(mod, CTU_SV32R, rsnd_kctrl_valm(ctu->sv3, 2));
++ rsnd_mod_write(mod, CTU_SV33R, rsnd_kctrl_valm(ctu->sv3, 3));
++ rsnd_mod_write(mod, CTU_SV34R, rsnd_kctrl_valm(ctu->sv3, 4));
++ rsnd_mod_write(mod, CTU_SV35R, rsnd_kctrl_valm(ctu->sv3, 5));
++ rsnd_mod_write(mod, CTU_SV36R, rsnd_kctrl_valm(ctu->sv3, 6));
++ rsnd_mod_write(mod, CTU_SV37R, rsnd_kctrl_valm(ctu->sv3, 7));
+ }
+
+ rsnd_mod_write(mod, CTU_CTUIR, 0);
+@@ -199,17 +199,17 @@ static void rsnd_ctu_value_reset(struct rsnd_dai_stream *io,
+ struct rsnd_ctu *ctu = rsnd_mod_to_ctu(mod);
+ int i;
+
+- if (!ctu->reset.val)
++ if (!rsnd_kctrl_vals(ctu->reset))
+ return;
+
+ for (i = 0; i < RSND_MAX_CHANNELS; i++) {
+- ctu->pass.val[i] = 0;
+- ctu->sv0.val[i] = 0;
+- ctu->sv1.val[i] = 0;
+- ctu->sv2.val[i] = 0;
+- ctu->sv3.val[i] = 0;
++ rsnd_kctrl_valm(ctu->pass, i) = 0;
++ rsnd_kctrl_valm(ctu->sv0, i) = 0;
++ rsnd_kctrl_valm(ctu->sv1, i) = 0;
++ rsnd_kctrl_valm(ctu->sv2, i) = 0;
++ rsnd_kctrl_valm(ctu->sv3, i) = 0;
+ }
+- ctu->reset.val = 0;
++ rsnd_kctrl_vals(ctu->reset) = 0;
+ }
+
+ static int rsnd_ctu_init(struct rsnd_mod *mod,
+diff --git a/sound/soc/sh/rcar/dvc.c b/sound/soc/sh/rcar/dvc.c
+index 4ef318ac73d5..dbe54f024d68 100644
+--- a/sound/soc/sh/rcar/dvc.c
++++ b/sound/soc/sh/rcar/dvc.c
+@@ -73,8 +73,9 @@ static void rsnd_dvc_halt(struct rsnd_mod *mod)
+ rsnd_mod_write(mod, DVC_SWRSR, 0);
+ }
+
+-#define rsnd_dvc_get_vrpdr(dvc) (dvc->rup.val << 8 | dvc->rdown.val)
+-#define rsnd_dvc_get_vrdbr(dvc) (0x3ff - (dvc->volume.val[0] >> 13))
++#define rsnd_dvc_get_vrpdr(dvc) (rsnd_kctrl_vals(dvc->rup) << 8 | \
++ rsnd_kctrl_vals(dvc->rdown))
++#define rsnd_dvc_get_vrdbr(dvc) (0x3ff - (rsnd_kctrl_valm(dvc->volume, 0) >> 13))
+
+ static void rsnd_dvc_volume_parameter(struct rsnd_dai_stream *io,
+ struct rsnd_mod *mod)
+@@ -84,12 +85,12 @@ static void rsnd_dvc_volume_parameter(struct rsnd_dai_stream *io,
+ int i;
+
+ /* Enable Ramp */
+- if (dvc->ren.val)
++ if (rsnd_kctrl_vals(dvc->ren))
+ for (i = 0; i < RSND_MAX_CHANNELS; i++)
+- val[i] = dvc->volume.cfg.max;
++ val[i] = rsnd_kctrl_max(dvc->volume);
+ else
+ for (i = 0; i < RSND_MAX_CHANNELS; i++)
+- val[i] = dvc->volume.val[i];
++ val[i] = rsnd_kctrl_valm(dvc->volume, i);
+
+ /* Enable Digital Volume */
+ rsnd_mod_write(mod, DVC_VOL0R, val[0]);
+@@ -119,7 +120,7 @@ static void rsnd_dvc_volume_init(struct rsnd_dai_stream *io,
+ dvucr |= 0x101;
+
+ /* Enable Ramp */
+- if (dvc->ren.val) {
++ if (rsnd_kctrl_vals(dvc->ren)) {
+ dvucr |= 0x10;
+
+ /*
+@@ -161,10 +162,10 @@ static void rsnd_dvc_volume_update(struct rsnd_dai_stream *io,
+ u32 vrdbr = 0;
+ int i;
+
+- for (i = 0; i < dvc->mute.cfg.size; i++)
+- zcmcr |= (!!dvc->mute.cfg.val[i]) << i;
++ for (i = 0; i < rsnd_kctrl_size(dvc->mute); i++)
++ zcmcr |= (!!rsnd_kctrl_valm(dvc->mute, i)) << i;
+
+- if (dvc->ren.val) {
++ if (rsnd_kctrl_vals(dvc->ren)) {
+ vrpdr = rsnd_dvc_get_vrpdr(dvc);
+ vrdbr = rsnd_dvc_get_vrdbr(dvc);
+ }
+diff --git a/sound/soc/sh/rcar/mix.c b/sound/soc/sh/rcar/mix.c
+index 912cfec49038..7998380766f6 100644
+--- a/sound/soc/sh/rcar/mix.c
++++ b/sound/soc/sh/rcar/mix.c
+@@ -84,7 +84,7 @@ static void rsnd_mix_halt(struct rsnd_mod *mod)
+
+ #define rsnd_mix_get_vol(mix, X) \
+ rsnd_flags_has(mix, HAS_VOL##X) ? \
+- (VOL_MAX - mix->volume##X.cfg.val[0]) : 0
++ (VOL_MAX - rsnd_kctrl_vals(mix->volume##X)) : 0
+ static void rsnd_mix_volume_parameter(struct rsnd_dai_stream *io,
+ struct rsnd_mod *mod)
+ {
+@@ -116,9 +116,9 @@ static void rsnd_mix_volume_init(struct rsnd_dai_stream *io,
+ rsnd_mod_write(mod, MIX_ADINR, rsnd_runtime_channel_after_ctu(io));
+
+ /* volume step */
+- rsnd_mod_write(mod, MIX_MIXMR, mix->ren.cfg.val[0]);
+- rsnd_mod_write(mod, MIX_MVPDR, mix->rup.cfg.val[0] << 8 |
+- mix->rdw.cfg.val[0]);
++ rsnd_mod_write(mod, MIX_MIXMR, rsnd_kctrl_vals(mix->ren));
++ rsnd_mod_write(mod, MIX_MVPDR, rsnd_kctrl_vals(mix->rup) << 8 |
++ rsnd_kctrl_vals(mix->rdw));
+
+ /* common volume parameter */
+ rsnd_mix_volume_parameter(io, mod);
+@@ -217,7 +217,7 @@ static int rsnd_mix_pcm_new(struct rsnd_mod *mod,
+ volume, VOL_MAX);
+ if (ret < 0)
+ return ret;
+- volume->cfg.val[0] = VOL_MAX;
++ rsnd_kctrl_vals(*volume) = VOL_MAX;
+
+ if (rsnd_flags_has(mix, ONCE_KCTRL_INITIALIZED))
+ return ret;
+diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h
+index 0d9f9c3343da..2a224fa639cb 100644
+--- a/sound/soc/sh/rcar/rsnd.h
++++ b/sound/soc/sh/rcar/rsnd.h
+@@ -631,6 +631,10 @@ struct rsnd_kctrl_cfg_s {
+ struct rsnd_kctrl_cfg cfg;
+ u32 val;
+ };
++#define rsnd_kctrl_size(x) ((x).cfg.size)
++#define rsnd_kctrl_max(x) ((x).cfg.max)
++#define rsnd_kctrl_valm(x, i) ((x).val[i]) /* = (x).cfg.val[i] */
++#define rsnd_kctrl_vals(x) ((x).val) /* = (x).cfg.val[0] */
+
+ int rsnd_kctrl_accept_anytime(struct rsnd_dai_stream *io);
+ int rsnd_kctrl_accept_runtime(struct rsnd_dai_stream *io);
+--
+2.19.0
+
diff --git a/patches/0144-ASoC-rsnd-more-clear-ADG-clock-debug-info.patch b/patches/0144-ASoC-rsnd-more-clear-ADG-clock-debug-info.patch
new file mode 100644
index 0000000..b026636
--- /dev/null
+++ b/patches/0144-ASoC-rsnd-more-clear-ADG-clock-debug-info.patch
@@ -0,0 +1,158 @@
+From b64621c44042653a0a8ae8eb70e23cc2d17e7f6f Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Fri, 13 Oct 2017 06:03:06 +0000
+Subject: [PATCH 0144/1795] ASoC: rsnd: more clear ADG clock debug info
+
+ADG inputs clock from CLK{A,B,C,I} and outputs clock from
+CLKOUT{0,1,2,3} which is selected by BRG{A,B}.
+Now, ADG is assuming BRGA is for 44100Hz related clocks,
+BRGB is for 48000Hz related clocks.
+
+Clock related debug is very difficult/confusable.
+This patch cleanups clock related debug info.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 6cba3fa98cdd045e020f096bb8888225d3906895)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/rcar/adg.c | 59 ++++++++++++++++++++++++++++-------------
+ 1 file changed, 41 insertions(+), 18 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/adg.c b/sound/soc/sh/rcar/adg.c
+index f21179f29b6c..4672688cac32 100644
+--- a/sound/soc/sh/rcar/adg.c
++++ b/sound/soc/sh/rcar/adg.c
+@@ -57,6 +57,13 @@ struct rsnd_adg {
+ i++)
+ #define rsnd_priv_to_adg(priv) ((struct rsnd_adg *)(priv)->adg)
+
++static const char * const clk_name[] = {
++ [CLKA] = "clk_a",
++ [CLKB] = "clk_b",
++ [CLKC] = "clk_c",
++ [CLKI] = "clk_i",
++};
++
+ static u32 rsnd_adg_calculate_rbgx(unsigned long div)
+ {
+ int i, ratio;
+@@ -279,6 +286,7 @@ static void rsnd_adg_set_ssi_clk(struct rsnd_mod *ssi_mod, u32 val)
+ struct rsnd_priv *priv = rsnd_mod_to_priv(ssi_mod);
+ struct rsnd_adg *adg = rsnd_priv_to_adg(priv);
+ struct rsnd_mod *adg_mod = rsnd_mod_get(adg);
++ struct device *dev = rsnd_priv_to_dev(priv);
+ int id = rsnd_mod_id(ssi_mod);
+ int shift = (id % 4) * 8;
+ u32 mask = 0xFF << shift;
+@@ -305,12 +313,13 @@ static void rsnd_adg_set_ssi_clk(struct rsnd_mod *ssi_mod, u32 val)
+ rsnd_mod_bset(adg_mod, AUDIO_CLK_SEL2, mask, val);
+ break;
+ }
++
++ dev_dbg(dev, "AUDIO_CLK_SEL is 0x%x\n", val);
+ }
+
+ int rsnd_adg_clk_query(struct rsnd_priv *priv, unsigned int rate)
+ {
+ struct rsnd_adg *adg = rsnd_priv_to_adg(priv);
+- struct device *dev = rsnd_priv_to_dev(priv);
+ struct clk *clk;
+ int i;
+ int sel_table[] = {
+@@ -320,8 +329,6 @@ int rsnd_adg_clk_query(struct rsnd_priv *priv, unsigned int rate)
+ [CLKI] = 0x0,
+ };
+
+- dev_dbg(dev, "request clock = %d\n", rate);
+-
+ /*
+ * find suitable clock from
+ * AUDIO_CLKA/AUDIO_CLKB/AUDIO_CLKC/AUDIO_CLKI.
+@@ -377,9 +384,10 @@ int rsnd_adg_ssi_clk_try_start(struct rsnd_mod *ssi_mod, unsigned int rate)
+ rsnd_mod_write(adg_mod, BRRA, adg->rbga);
+ rsnd_mod_write(adg_mod, BRRB, adg->rbgb);
+
+- dev_dbg(dev, "ADG: %s[%d] selects 0x%x for %d\n",
+- rsnd_mod_name(ssi_mod), rsnd_mod_id(ssi_mod),
+- data, rate);
++ dev_dbg(dev, "CLKOUT is based on BRG%c (= %dHz)\n",
++ (ckr) ? 'B' : 'A',
++ (ckr) ? adg->rbgb_rate_for_48khz :
++ adg->rbga_rate_for_441khz);
+
+ return 0;
+ }
+@@ -408,21 +416,12 @@ static void rsnd_adg_get_clkin(struct rsnd_priv *priv,
+ {
+ struct device *dev = rsnd_priv_to_dev(priv);
+ struct clk *clk;
+- static const char * const clk_name[] = {
+- [CLKA] = "clk_a",
+- [CLKB] = "clk_b",
+- [CLKC] = "clk_c",
+- [CLKI] = "clk_i",
+- };
+ int i;
+
+ for (i = 0; i < CLKMAX; i++) {
+ clk = devm_clk_get(dev, clk_name[i]);
+ adg->clk[i] = IS_ERR(clk) ? NULL : clk;
+ }
+-
+- for_each_rsnd_clk(clk, adg, i)
+- dev_dbg(dev, "clk %d : %p : %ld\n", i, clk, clk_get_rate(clk));
+ }
+
+ static void rsnd_adg_get_clkout(struct rsnd_priv *priv,
+@@ -571,12 +570,35 @@ static void rsnd_adg_get_clkout(struct rsnd_priv *priv,
+ adg->ckr = ckr;
+ adg->rbga = rbga;
+ adg->rbgb = rbgb;
++}
++
++#ifdef DEBUG
++static void rsnd_adg_clk_dbg_info(struct rsnd_priv *priv, struct rsnd_adg *adg)
++{
++ struct device *dev = rsnd_priv_to_dev(priv);
++ struct clk *clk;
++ int i;
++
++ for_each_rsnd_clk(clk, adg, i)
++ dev_dbg(dev, "%s : %p : %ld\n",
++ clk_name[i], clk, clk_get_rate(clk));
+
+- for_each_rsnd_clkout(clk, adg, i)
+- dev_dbg(dev, "clkout %d : %p : %ld\n", i, clk, clk_get_rate(clk));
+ dev_dbg(dev, "BRGCKR = 0x%08x, BRRA/BRRB = 0x%x/0x%x\n",
+- ckr, rbga, rbgb);
++ adg->ckr, adg->rbga, adg->rbgb);
++ dev_dbg(dev, "BRGA (for 44100 base) = %d\n", adg->rbga_rate_for_441khz);
++ dev_dbg(dev, "BRGB (for 48000 base) = %d\n", adg->rbgb_rate_for_48khz);
++
++ /*
++ * Actual CLKOUT will be exchanged in rsnd_adg_ssi_clk_try_start()
++ * by BRGCKR::BRGCKR_31
++ */
++ for_each_rsnd_clkout(clk, adg, i)
++ dev_dbg(dev, "clkout %d : %p : %ld\n", i,
++ clk, clk_get_rate(clk));
+ }
++#else
++#define rsnd_adg_clk_dbg_info(priv, adg)
++#endif
+
+ int rsnd_adg_probe(struct rsnd_priv *priv)
+ {
+@@ -595,6 +617,7 @@ int rsnd_adg_probe(struct rsnd_priv *priv)
+
+ rsnd_adg_get_clkin(priv, adg);
+ rsnd_adg_get_clkout(priv, adg);
++ rsnd_adg_clk_dbg_info(priv, adg);
+
+ priv->adg = adg;
+
+--
+2.19.0
+
diff --git a/patches/0145-ASoC-rsnd-don-t-use-io-mod-directly.patch b/patches/0145-ASoC-rsnd-don-t-use-io-mod-directly.patch
new file mode 100644
index 0000000..41a2bd1
--- /dev/null
+++ b/patches/0145-ASoC-rsnd-don-t-use-io-mod-directly.patch
@@ -0,0 +1,32 @@
+From caa430bc903329012f547ea1e8bdc9fdad7704e8 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 31 Oct 2017 00:38:09 +0000
+Subject: [PATCH 0145/1795] ASoC: rsnd: don't use io->mod[] directly
+
+We have rsnd_io_to_mod() macro. Let's use it
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 138f878647f2ac0d7700f669b860cb130306e062)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/rcar/core.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
+index e9b0b0f5f0ee..b338c0009506 100644
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -407,7 +407,7 @@ struct rsnd_mod *rsnd_mod_next(int *iterator,
+
+ for (; *iterator < max; (*iterator)++) {
+ type = (array) ? array[*iterator] : *iterator;
+- mod = io->mod[type];
++ mod = rsnd_io_to_mod(io, type);
+ if (!mod)
+ continue;
+
+--
+2.19.0
+
diff --git a/patches/0146-ASoC-rsnd-tidyup-rsnd_mod_next-for-loop-method.patch b/patches/0146-ASoC-rsnd-tidyup-rsnd_mod_next-for-loop-method.patch
new file mode 100644
index 0000000..9da674e
--- /dev/null
+++ b/patches/0146-ASoC-rsnd-tidyup-rsnd_mod_next-for-loop-method.patch
@@ -0,0 +1,36 @@
+From cf9350bbf1368ac62ab014e6af91261dee3f2178 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 31 Oct 2017 00:38:36 +0000
+Subject: [PATCH 0146/1795] ASoC: rsnd: tidyup rsnd_mod_next() for loop method
+
+Let's remove point less "continue"
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit b12f1e3a798e19727ca632d92abe619b418ad0d0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/rcar/core.c | 6 ++----
+ 1 file changed, 2 insertions(+), 4 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
+index b338c0009506..8fc3bf2b20f5 100644
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -408,10 +408,8 @@ struct rsnd_mod *rsnd_mod_next(int *iterator,
+ for (; *iterator < max; (*iterator)++) {
+ type = (array) ? array[*iterator] : *iterator;
+ mod = rsnd_io_to_mod(io, type);
+- if (!mod)
+- continue;
+-
+- return mod;
++ if (mod)
++ return mod;
+ }
+
+ return NULL;
+--
+2.19.0
+
diff --git a/patches/0147-ASoC-rsnd-NULL-check-is-not-needed-for-clk_unprepare.patch b/patches/0147-ASoC-rsnd-NULL-check-is-not-needed-for-clk_unprepare.patch
new file mode 100644
index 0000000..63b4895
--- /dev/null
+++ b/patches/0147-ASoC-rsnd-NULL-check-is-not-needed-for-clk_unprepare.patch
@@ -0,0 +1,35 @@
+From 166660873df9bf634c8552d8e0ed8cf7dbcb4033 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 31 Oct 2017 00:39:17 +0000
+Subject: [PATCH 0147/1795] ASoC: rsnd: NULL check is not needed for
+ clk_unprepare()
+
+clk_unprepare() is checking parameter by IS_ERR_OR_NULL().
+clk NULL check is not needed on rsnd_mod_quit()
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit ed3ac14ca90074d51f365dba5ed535e76ea155ea)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/rcar/core.c | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
+index 8fc3bf2b20f5..0216d3f53097 100644
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -172,8 +172,7 @@ int rsnd_mod_init(struct rsnd_priv *priv,
+
+ void rsnd_mod_quit(struct rsnd_mod *mod)
+ {
+- if (mod->clk)
+- clk_unprepare(mod->clk);
++ clk_unprepare(mod->clk);
+ mod->clk = NULL;
+ }
+
+--
+2.19.0
+
diff --git a/patches/0148-ASoC-rsnd-use-snd_pcm_running-in-rsnd_io_is_working.patch b/patches/0148-ASoC-rsnd-use-snd_pcm_running-in-rsnd_io_is_working.patch
new file mode 100644
index 0000000..caa0c49
--- /dev/null
+++ b/patches/0148-ASoC-rsnd-use-snd_pcm_running-in-rsnd_io_is_working.patch
@@ -0,0 +1,36 @@
+From 156acab36df13f9ebf962e4309284bd0dd124f58 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 31 Oct 2017 00:39:45 +0000
+Subject: [PATCH 0148/1795] ASoC: rsnd: use snd_pcm_running() in
+ rsnd_io_is_working()
+
+Let's use more common style to checking running/working
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 8fce974bc4d5478d4ddee2443a3e268532ab35a8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/rcar/core.c | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
+index 0216d3f53097..b36832ef7342 100644
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -199,7 +199,10 @@ void rsnd_mod_interrupt(struct rsnd_mod *mod,
+ int rsnd_io_is_working(struct rsnd_dai_stream *io)
+ {
+ /* see rsnd_dai_stream_init/quit() */
+- return !!io->substream;
++ if (io->substream)
++ return snd_pcm_running(io->substream);
++
++ return 0;
+ }
+
+ int rsnd_runtime_channel_original(struct rsnd_dai_stream *io)
+--
+2.19.0
+
diff --git a/patches/0149-ASoC-rsnd-Don-t-check-SSISR-DIRQ-when-Capture.patch b/patches/0149-ASoC-rsnd-Don-t-check-SSISR-DIRQ-when-Capture.patch
new file mode 100644
index 0000000..feb81f6
--- /dev/null
+++ b/patches/0149-ASoC-rsnd-Don-t-check-SSISR-DIRQ-when-Capture.patch
@@ -0,0 +1,51 @@
+From 9c4947b2704667ba94e4ec58b91cf3a1e1403ee0 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 31 Oct 2017 00:40:32 +0000
+Subject: [PATCH 0149/1795] ASoC: rsnd: Don't check SSISR::DIRQ when Capture
+
+When stop case, it was Playback, it need to check all data were
+completely sent. But in Capture case, it might not receive data
+anymore. SSISR::DIRQ check is not need for Capture case.
+
+Reported-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit ce548931207c0d0059bd90171e2c458f897354d7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/rcar/ssi.c | 15 +++++++++------
+ 1 file changed, 9 insertions(+), 6 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/ssi.c b/sound/soc/sh/rcar/ssi.c
+index d64abbbe1a98..cbf3bf312d23 100644
+--- a/sound/soc/sh/rcar/ssi.c
++++ b/sound/soc/sh/rcar/ssi.c
+@@ -607,15 +607,18 @@ static int rsnd_ssi_stop(struct rsnd_mod *mod,
+ if (rsnd_ssi_is_parent(mod, io))
+ return 0;
+
+- /*
+- * disable all IRQ,
+- * and, wait all data was sent
+- */
+ cr = ssi->cr_own |
+ ssi->cr_clk;
+
+- rsnd_mod_write(mod, SSICR, cr | EN);
+- rsnd_ssi_status_check(mod, DIRQ);
++ /*
++ * disable all IRQ,
++ * Playback: Wait all data was sent
++ * Capture: It might not receave data. Do nothing
++ */
++ if (rsnd_io_is_play(io)) {
++ rsnd_mod_write(mod, SSICR, cr | EN);
++ rsnd_ssi_status_check(mod, DIRQ);
++ }
+
+ /*
+ * disable SSI,
+--
+2.19.0
+
diff --git a/patches/0150-ASoC-rsnd-remove-NULL-check-from-rsnd_mod_name-rsnd_.patch b/patches/0150-ASoC-rsnd-remove-NULL-check-from-rsnd_mod_name-rsnd_.patch
new file mode 100644
index 0000000..b6e3639
--- /dev/null
+++ b/patches/0150-ASoC-rsnd-remove-NULL-check-from-rsnd_mod_name-rsnd_.patch
@@ -0,0 +1,164 @@
+From 34c0647ebbc0ba28e42ca16c134b9c8c6b56da05 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Wed, 1 Nov 2017 07:17:34 +0000
+Subject: [PATCH 0150/1795] ASoC: rsnd: remove NULL check from
+ rsnd_mod_name()/rsnd_mod_id()
+
+Current rsnd driver has rsnd_mod_id() which returns mod ID,
+and it returns -1 if mod was NULL.
+In the same time, this driver has rsnd_mod_name() which returns mod
+name, and it returns "unknown" if mod or mod->ops was NULL.
+
+Basically these "mod" never be NULL, but the reason why rsnd driver
+has such behavior is that DMA path finder is assuming memory as
+"mod == NULL".
+Thus, current DMA path debug code prints like below.
+Here "unknown[-1]" means it was memory.
+
+ ...
+ rcar_sound ec500000.sound: unknown[-1] from
+ rcar_sound ec500000.sound: src[0] to
+ rcar_sound ec500000.sound: ctu[2]
+ rcar_sound ec500000.sound: mix[0]
+ rcar_sound ec500000.sound: dvc[0]
+ rcar_sound ec500000.sound: ssi[0]
+ rcar_sound ec500000.sound: audmac[0] unknown[-1] -> src[0]
+ ...
+
+1st issue is that it is confusable for user.
+2nd issue is rsnd driver has something like below code.
+
+ mask |= 1 << rsnd_mod_id(mod);
+
+Because of this kind of code, some statically code checker will
+reports "Shifting by a negative value is undefined behaviour".
+
+But this "mod" never be NULL, thus negative shift never happen.
+To avoid these issues, this patch adds new dummy "mem" to
+indicate memory, and use it to indicate debug information,
+and, remove unneeded "NULL mod" behavior from rsnd_mod_id() and
+rsnd_mod_name().
+
+The debug information will be like below by this patch
+ ...
+ rcar_sound ec500000.sound: mem[0] from
+ rcar_sound ec500000.sound: src[0] to
+ rcar_sound ec500000.sound: ctu[2]
+ rcar_sound ec500000.sound: mix[0]
+ rcar_sound ec500000.sound: dvc[0]
+ rcar_sound ec500000.sound: ssi[0]
+ rcar_sound ec500000.sound: audmac[0] mem[0] -> src[0]
+ ...
+
+Reported-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 9b6ea25066b05c4b8bc4ea69037741bd67649cd1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/rcar/core.c | 8 --------
+ sound/soc/sh/rcar/dma.c | 24 ++++++++++++++++++------
+ sound/soc/sh/rcar/rsnd.h | 6 +++---
+ 3 files changed, 21 insertions(+), 17 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
+index b36832ef7342..c70eb2097816 100644
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -121,14 +121,6 @@ void rsnd_mod_make_sure(struct rsnd_mod *mod, enum rsnd_mod_type type)
+ }
+ }
+
+-char *rsnd_mod_name(struct rsnd_mod *mod)
+-{
+- if (!mod || !mod->ops)
+- return "unknown";
+-
+- return mod->ops->name;
+-}
+-
+ struct dma_chan *rsnd_mod_dma_req(struct rsnd_dai_stream *io,
+ struct rsnd_mod *mod)
+ {
+diff --git a/sound/soc/sh/rcar/dma.c b/sound/soc/sh/rcar/dma.c
+index 17220c946ff0..5bc9ec16813c 100644
+--- a/sound/soc/sh/rcar/dma.c
++++ b/sound/soc/sh/rcar/dma.c
+@@ -60,6 +60,14 @@ struct rsnd_dma_ctrl {
+ #define rsnd_dma_to_dmaen(dma) (&(dma)->dma.en)
+ #define rsnd_dma_to_dmapp(dma) (&(dma)->dma.pp)
+
++/* for DEBUG */
++static struct rsnd_mod_ops mem_ops = {
++ .name = "mem",
++};
++
++static struct rsnd_mod mem = {
++};
++
+ /*
+ * Audio DMAC
+ */
+@@ -747,9 +755,10 @@ static void rsnd_dma_of_path(struct rsnd_mod *this,
+ rsnd_mod_name(this), rsnd_mod_id(this));
+ for (i = 0; i <= idx; i++) {
+ dev_dbg(dev, " %s[%d]%s\n",
+- rsnd_mod_name(mod[i]), rsnd_mod_id(mod[i]),
+- (mod[i] == *mod_from) ? " from" :
+- (mod[i] == *mod_to) ? " to" : "");
++ rsnd_mod_name(mod[i] ? mod[i] : &mem),
++ rsnd_mod_id (mod[i] ? mod[i] : &mem),
++ (mod[i] == *mod_from) ? " from" :
++ (mod[i] == *mod_to) ? " to" : "");
+ }
+ }
+
+@@ -814,8 +823,10 @@ static int rsnd_dma_alloc(struct rsnd_dai_stream *io, struct rsnd_mod *mod,
+
+ dev_dbg(dev, "%s[%d] %s[%d] -> %s[%d]\n",
+ rsnd_mod_name(*dma_mod), rsnd_mod_id(*dma_mod),
+- rsnd_mod_name(mod_from), rsnd_mod_id(mod_from),
+- rsnd_mod_name(mod_to), rsnd_mod_id(mod_to));
++ rsnd_mod_name(mod_from ? mod_from : &mem),
++ rsnd_mod_id (mod_from ? mod_from : &mem),
++ rsnd_mod_name(mod_to ? mod_to : &mem),
++ rsnd_mod_id (mod_to ? mod_to : &mem));
+
+ ret = attach(io, dma, mod_from, mod_to);
+ if (ret < 0)
+@@ -872,5 +883,6 @@ int rsnd_dma_probe(struct rsnd_priv *priv)
+
+ priv->dma = dmac;
+
+- return 0;
++ /* dummy mem mod for debug */
++ return rsnd_mod_init(NULL, &mem, &mem_ops, NULL, NULL, 0, 0);
+ }
+diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h
+index 2a224fa639cb..57cd2bc773c2 100644
+--- a/sound/soc/sh/rcar/rsnd.h
++++ b/sound/soc/sh/rcar/rsnd.h
+@@ -355,8 +355,9 @@ struct rsnd_mod {
+ #define __rsnd_mod_call_nolock_start 0
+ #define __rsnd_mod_call_nolock_stop 1
+
+-#define rsnd_mod_to_priv(mod) ((mod)->priv)
+-#define rsnd_mod_id(mod) ((mod) ? (mod)->id : -1)
++#define rsnd_mod_to_priv(mod) ((mod)->priv)
++#define rsnd_mod_name(mod) ((mod)->ops->name)
++#define rsnd_mod_id(mod) ((mod)->id)
+ #define rsnd_mod_power_on(mod) clk_enable((mod)->clk)
+ #define rsnd_mod_power_off(mod) clk_disable((mod)->clk)
+ #define rsnd_mod_get(ip) (&(ip)->mod)
+@@ -371,7 +372,6 @@ int rsnd_mod_init(struct rsnd_priv *priv,
+ enum rsnd_mod_type type,
+ int id);
+ void rsnd_mod_quit(struct rsnd_mod *mod);
+-char *rsnd_mod_name(struct rsnd_mod *mod);
+ struct dma_chan *rsnd_mod_dma_req(struct rsnd_dai_stream *io,
+ struct rsnd_mod *mod);
+ void rsnd_mod_interrupt(struct rsnd_mod *mod,
+--
+2.19.0
+
diff --git a/patches/0151-ASoC-rsnd-return-EIO-if-rsnd_dmaen_request_channel-f.patch b/patches/0151-ASoC-rsnd-return-EIO-if-rsnd_dmaen_request_channel-f.patch
new file mode 100644
index 0000000..c22ac3c
--- /dev/null
+++ b/patches/0151-ASoC-rsnd-return-EIO-if-rsnd_dmaen_request_channel-f.patch
@@ -0,0 +1,45 @@
+From fc8221dca3960255017b26a05a2501aced0c7073 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 6 Nov 2017 01:07:27 +0000
+Subject: [PATCH 0151/1795] ASoC: rsnd: return -EIO if
+ rsnd_dmaen_request_channel() failed
+
+PTR_ERR(NULL) is success. Normally when a function returns both NULL
+and error pointers, it means that NULL is not a error.
+But, rsnd_dmaen_request_channel() returns NULL if requested resource
+was failed.
+Let's return -EIO if rsnd_dmaen_request_channel() was failed on
+rsnd_dmaen_nolock_start().
+This patch fixes commit edce5c496c6a ("ASoC: rsnd: Request/Release DMA
+channel eachtime")
+
+Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit c409c2a963475f0288ba3bb47a10f04f6441ffb9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/rcar/dma.c | 4 +---
+ 1 file changed, 1 insertion(+), 3 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/dma.c b/sound/soc/sh/rcar/dma.c
+index 5bc9ec16813c..fd557abfe390 100644
+--- a/sound/soc/sh/rcar/dma.c
++++ b/sound/soc/sh/rcar/dma.c
+@@ -219,11 +219,9 @@ static int rsnd_dmaen_nolock_start(struct rsnd_mod *mod,
+ dma->mod_from,
+ dma->mod_to);
+ if (IS_ERR_OR_NULL(dmaen->chan)) {
+- int ret = PTR_ERR(dmaen->chan);
+-
+ dmaen->chan = NULL;
+ dev_err(dev, "can't get dma channel\n");
+- return ret;
++ return -EIO;
+ }
+
+ return 0;
+--
+2.19.0
+
diff --git a/patches/0152-ASoC-rcar-revert-IOMMU-support-so-far.patch b/patches/0152-ASoC-rcar-revert-IOMMU-support-so-far.patch
new file mode 100644
index 0000000..2766489
--- /dev/null
+++ b/patches/0152-ASoC-rcar-revert-IOMMU-support-so-far.patch
@@ -0,0 +1,197 @@
+From 3ce920f730d19c733eeba1f805afe597d6c3a8d6 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 16 Nov 2017 04:36:51 +0000
+Subject: [PATCH 0152/1795] ASoC: rcar: revert IOMMU support so far
+
+commit 4821d914fe74 ("ASoC: rsnd: use dma_sync_single_for_xxx() for
+IOMMU") had supported IOMMU, but it breaks normal sound "recorde"
+and both PulseAudio's "playback/recorde". The sound will be noisy.
+
+That commit was using dma_sync_single_for_xxx(), and driver should
+make sure memory is protected during CPU or Device are using it.
+But if driver returns current "residue" data size correctly on pointer
+function, player/recorder will access to protected memory.
+
+IOMMU feature should be supported, but I don't know how to handle it
+without memory cache problem at this point.
+Thus, this patch simply revert it to avoid current noisy sound.
+
+Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
+Tested-by: Ryo Kodama <ryo.kodama.vz@renesas.com>
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit c20c6704bf2dafaba0d90c8310ef9e919fe4d2e2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/rcar/core.c | 4 +-
+ sound/soc/sh/rcar/dma.c | 86 +++-------------------------------------
+ 2 files changed, 8 insertions(+), 82 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
+index c70eb2097816..f12a88a21dfa 100644
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -1332,8 +1332,8 @@ static int rsnd_pcm_new(struct snd_soc_pcm_runtime *rtd)
+
+ return snd_pcm_lib_preallocate_pages_for_all(
+ rtd->pcm,
+- SNDRV_DMA_TYPE_CONTINUOUS,
+- snd_dma_continuous_data(GFP_KERNEL),
++ SNDRV_DMA_TYPE_DEV,
++ rtd->card->snd_card->dev,
+ PREALLOC_BUFFER, PREALLOC_BUFFER_MAX);
+ }
+
+diff --git a/sound/soc/sh/rcar/dma.c b/sound/soc/sh/rcar/dma.c
+index fd557abfe390..4d750bdf8e24 100644
+--- a/sound/soc/sh/rcar/dma.c
++++ b/sound/soc/sh/rcar/dma.c
+@@ -26,10 +26,7 @@
+ struct rsnd_dmaen {
+ struct dma_chan *chan;
+ dma_cookie_t cookie;
+- dma_addr_t dma_buf;
+ unsigned int dma_len;
+- unsigned int dma_period;
+- unsigned int dma_cnt;
+ };
+
+ struct rsnd_dmapp {
+@@ -71,38 +68,10 @@ static struct rsnd_mod mem = {
+ /*
+ * Audio DMAC
+ */
+-#define rsnd_dmaen_sync(dmaen, io, i) __rsnd_dmaen_sync(dmaen, io, i, 1)
+-#define rsnd_dmaen_unsync(dmaen, io, i) __rsnd_dmaen_sync(dmaen, io, i, 0)
+-static void __rsnd_dmaen_sync(struct rsnd_dmaen *dmaen, struct rsnd_dai_stream *io,
+- int i, int sync)
+-{
+- struct device *dev = dmaen->chan->device->dev;
+- enum dma_data_direction dir;
+- int is_play = rsnd_io_is_play(io);
+- dma_addr_t buf;
+- int len, max;
+- size_t period;
+-
+- len = dmaen->dma_len;
+- period = dmaen->dma_period;
+- max = len / period;
+- i = i % max;
+- buf = dmaen->dma_buf + (period * i);
+-
+- dir = is_play ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
+-
+- if (sync)
+- dma_sync_single_for_device(dev, buf, period, dir);
+- else
+- dma_sync_single_for_cpu(dev, buf, period, dir);
+-}
+-
+ static void __rsnd_dmaen_complete(struct rsnd_mod *mod,
+ struct rsnd_dai_stream *io)
+ {
+ struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
+- struct rsnd_dma *dma = rsnd_mod_to_dma(mod);
+- struct rsnd_dmaen *dmaen = rsnd_dma_to_dmaen(dma);
+ bool elapsed = false;
+ unsigned long flags;
+
+@@ -115,22 +84,9 @@ static void __rsnd_dmaen_complete(struct rsnd_mod *mod,
+ */
+ spin_lock_irqsave(&priv->lock, flags);
+
+- if (rsnd_io_is_working(io)) {
+- rsnd_dmaen_unsync(dmaen, io, dmaen->dma_cnt);
+-
+- /*
+- * Next period is already started.
+- * Let's sync Next Next period
+- * see
+- * rsnd_dmaen_start()
+- */
+- rsnd_dmaen_sync(dmaen, io, dmaen->dma_cnt + 2);
+-
++ if (rsnd_io_is_working(io))
+ elapsed = true;
+
+- dmaen->dma_cnt++;
+- }
+-
+ spin_unlock_irqrestore(&priv->lock, flags);
+
+ if (elapsed)
+@@ -165,14 +121,8 @@ static int rsnd_dmaen_stop(struct rsnd_mod *mod,
+ struct rsnd_dma *dma = rsnd_mod_to_dma(mod);
+ struct rsnd_dmaen *dmaen = rsnd_dma_to_dmaen(dma);
+
+- if (dmaen->chan) {
+- int is_play = rsnd_io_is_play(io);
+-
++ if (dmaen->chan)
+ dmaengine_terminate_all(dmaen->chan);
+- dma_unmap_single(dmaen->chan->device->dev,
+- dmaen->dma_buf, dmaen->dma_len,
+- is_play ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
+- }
+
+ return 0;
+ }
+@@ -237,11 +187,7 @@ static int rsnd_dmaen_start(struct rsnd_mod *mod,
+ struct device *dev = rsnd_priv_to_dev(priv);
+ struct dma_async_tx_descriptor *desc;
+ struct dma_slave_config cfg = {};
+- dma_addr_t buf;
+- size_t len;
+- size_t period;
+ int is_play = rsnd_io_is_play(io);
+- int i;
+ int ret;
+
+ cfg.direction = is_play ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM;
+@@ -258,19 +204,10 @@ static int rsnd_dmaen_start(struct rsnd_mod *mod,
+ if (ret < 0)
+ return ret;
+
+- len = snd_pcm_lib_buffer_bytes(substream);
+- period = snd_pcm_lib_period_bytes(substream);
+- buf = dma_map_single(dmaen->chan->device->dev,
+- substream->runtime->dma_area,
+- len,
+- is_play ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
+- if (dma_mapping_error(dmaen->chan->device->dev, buf)) {
+- dev_err(dev, "dma map failed\n");
+- return -EIO;
+- }
+-
+ desc = dmaengine_prep_dma_cyclic(dmaen->chan,
+- buf, len, period,
++ substream->runtime->dma_addr,
++ snd_pcm_lib_buffer_bytes(substream),
++ snd_pcm_lib_period_bytes(substream),
+ is_play ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM,
+ DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+
+@@ -282,18 +219,7 @@ static int rsnd_dmaen_start(struct rsnd_mod *mod,
+ desc->callback = rsnd_dmaen_complete;
+ desc->callback_param = rsnd_mod_get(dma);
+
+- dmaen->dma_buf = buf;
+- dmaen->dma_len = len;
+- dmaen->dma_period = period;
+- dmaen->dma_cnt = 0;
+-
+- /*
+- * synchronize this and next period
+- * see
+- * __rsnd_dmaen_complete()
+- */
+- for (i = 0; i < 2; i++)
+- rsnd_dmaen_sync(dmaen, io, i);
++ dmaen->dma_len = snd_pcm_lib_buffer_bytes(substream);
+
+ dmaen->cookie = dmaengine_submit(desc);
+ if (dmaen->cookie < 0) {
+--
+2.19.0
+
diff --git a/patches/0153-ASoC-rsnd-ssiu-clear-SSI_MODE-for-non-TDM-Extended-m.patch b/patches/0153-ASoC-rsnd-ssiu-clear-SSI_MODE-for-non-TDM-Extended-m.patch
new file mode 100644
index 0000000..64e997e
--- /dev/null
+++ b/patches/0153-ASoC-rsnd-ssiu-clear-SSI_MODE-for-non-TDM-Extended-m.patch
@@ -0,0 +1,52 @@
+From f9bc536ea61a4f343d3bd0fe40879dc282ec90e0 Mon Sep 17 00:00:00 2001
+From: Jiada Wang <jiada_wang@mentor.com>
+Date: Tue, 28 Nov 2017 16:05:13 +0900
+Subject: [PATCH 0153/1795] ASoC: rsnd: ssiu: clear SSI_MODE for non TDM
+ Extended modes
+
+register SSI_MODE is set when SSI works in TDM Extended,
+but it isn't reset when SSI starts to work in other modes,
+thus causes issues.
+
+This patch clearss SSI_MODE register when SSI works in modes
+other than TDM Extended.
+
+Fixes: 186fadc132f0 ("ASoC: rsnd: add TDM Extend Mode support")
+Signed-off-by: Jiada Wang <jiada_wang@mentor.com>
+Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit a91d7fb97092d6b840af5899ded3b389603fd7f1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ sound/soc/sh/rcar/ssiu.c | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+diff --git a/sound/soc/sh/rcar/ssiu.c b/sound/soc/sh/rcar/ssiu.c
+index 4d948757d300..6ff8a36c2c82 100644
+--- a/sound/soc/sh/rcar/ssiu.c
++++ b/sound/soc/sh/rcar/ssiu.c
+@@ -125,6 +125,7 @@ static int rsnd_ssiu_init_gen2(struct rsnd_mod *mod,
+ {
+ int hdmi = rsnd_ssi_hdmi_port(io);
+ int ret;
++ u32 mode = 0;
+
+ ret = rsnd_ssiu_init(mod, io, priv);
+ if (ret < 0)
+@@ -136,9 +137,11 @@ static int rsnd_ssiu_init_gen2(struct rsnd_mod *mod,
+ * see
+ * rsnd_ssi_config_init()
+ */
+- rsnd_mod_write(mod, SSI_MODE, 0x1);
++ mode = 0x1;
+ }
+
++ rsnd_mod_write(mod, SSI_MODE, mode);
++
+ if (rsnd_ssi_use_busif(io)) {
+ rsnd_mod_write(mod, SSI_BUSIF_ADINR,
+ rsnd_get_adinr_bit(mod, io) |
+--
+2.19.0
+
diff --git a/patches/0154-dt-bindings-mmc-renesas_sdhi-provide-example-in-bind.patch b/patches/0154-dt-bindings-mmc-renesas_sdhi-provide-example-in-bind.patch
new file mode 100644
index 0000000..e0dbb27
--- /dev/null
+++ b/patches/0154-dt-bindings-mmc-renesas_sdhi-provide-example-in-bind.patch
@@ -0,0 +1,89 @@
+From fd0bc6d92f4f6c07ae18e3ea30a50f8914ed2719 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Wed, 18 Oct 2017 09:00:21 +0200
+Subject: [PATCH 0154/1795] dt-bindings: mmc: renesas_sdhi: provide example in
+ bindings documentation
+
+Provide an example of the usage of the DT bindings for TMIO
+in their documentation. The example given is for the r8a7790 (R-Car H2).
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit 95e91ade6900547a74ac8e3ce35213aacfbdd0d3)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ .../devicetree/bindings/mmc/tmio_mmc.txt | 58 +++++++++++++++++++
+ 1 file changed, 58 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
+index 54ef642f23a0..b63392d9cc47 100644
+--- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
++++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
+@@ -43,3 +43,61 @@ Optional properties:
+ - pinctrl-names: should be "default", "state_uhs"
+ - pinctrl-0: should contain default/high speed pin ctrl
+ - pinctrl-1: should contain uhs mode pin ctrl
++
++Example: R8A7790 (R-Car H2) SDHI controller nodes
++
++ sdhi0: sd@ee100000 {
++ compatible = "renesas,sdhi-r8a7790";
++ reg = <0 0xee100000 0 0x328>;
++ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 314>;
++ dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
++ <&dmac1 0xcd>, <&dmac1 0xce>;
++ dma-names = "tx", "rx", "tx", "rx";
++ max-frequency = <195000000>;
++ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 314>;
++ status = "disabled";
++ };
++
++ sdhi1: sd@ee120000 {
++ compatible = "renesas,sdhi-r8a7790";
++ reg = <0 0xee120000 0 0x328>;
++ interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 313>;
++ dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
++ <&dmac1 0xc9>, <&dmac1 0xca>;
++ dma-names = "tx", "rx", "tx", "rx";
++ max-frequency = <195000000>;
++ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 313>;
++ status = "disabled";
++ };
++
++ sdhi2: sd@ee140000 {
++ compatible = "renesas,sdhi-r8a7790";
++ reg = <0 0xee140000 0 0x100>;
++ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 312>;
++ dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
++ <&dmac1 0xc1>, <&dmac1 0xc2>;
++ dma-names = "tx", "rx", "tx", "rx";
++ max-frequency = <97500000>;
++ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 312>;
++ status = "disabled";
++ };
++
++ sdhi3: sd@ee160000 {
++ compatible = "renesas,sdhi-r8a7790";
++ reg = <0 0xee160000 0 0x100>;
++ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 311>;
++ dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
++ <&dmac1 0xd3>, <&dmac1 0xd4>;
++ dma-names = "tx", "rx", "tx", "rx";
++ max-frequency = <97500000>;
++ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 311>;
++ status = "disabled";
++ };
+--
+2.19.0
+
diff --git a/patches/0155-dt-bindings-mmc-renesas_sdhi-add-R-Car-Gen-123-fallb.patch b/patches/0155-dt-bindings-mmc-renesas_sdhi-add-R-Car-Gen-123-fallb.patch
new file mode 100644
index 0000000..38a16a7
--- /dev/null
+++ b/patches/0155-dt-bindings-mmc-renesas_sdhi-add-R-Car-Gen-123-fallb.patch
@@ -0,0 +1,102 @@
+From f11faa2b406316de504a4c940196913f7ec3d320 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Wed, 18 Oct 2017 09:00:22 +0200
+Subject: [PATCH 0155/1795] dt-bindings: mmc: renesas_sdhi: add R-Car Gen[123]
+ fallback compatibility strings
+
+Add fallback compatibility strings for R-Car Gen 1, 2 and 3.
+
+In the case of Renesas R-Car hardware we know that there are generations of
+SoCs, f.e. Gen 1 and 2. But beyond that its not clear what the relationship
+between IP blocks might be. For example, I believe that r8a7790 is older
+than r8a7791 but that doesn't imply that the latter is a descendant of the
+former or vice versa.
+
+We can, however, by examining the documentation and behaviour of the
+hardware at run-time observe that the current driver implementation appears
+to be compatible with the IP blocks on SoCs within a given generation.
+
+For the above reasons and convenience when enabling new SoCs a
+per-generation fallback compatibility string scheme is being adopted for
+drivers for Renesas SoCs.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit 54839d012d5f98cde2fa102fdcd22e1da661d138)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ .../devicetree/bindings/mmc/tmio_mmc.txt | 20 ++++++++++++++-----
+ 1 file changed, 15 insertions(+), 5 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
+index b63392d9cc47..3c6762430fd9 100644
+--- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
++++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
+@@ -10,7 +10,7 @@ described in mmc.txt, can be used. Additionally the following tmio_mmc-specific
+ optional bindings can be used.
+
+ Required properties:
+-- compatible: "renesas,sdhi-shmobile" - a generic sh-mobile SDHI unit
++- compatible: should contain one or more of the following:
+ "renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
+ "renesas,sdhi-r7s72100" - SDHI IP on R7S72100 SoC
+ "renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
+@@ -26,6 +26,16 @@ Required properties:
+ "renesas,sdhi-r8a7794" - SDHI IP on R8A7794 SoC
+ "renesas,sdhi-r8a7795" - SDHI IP on R8A7795 SoC
+ "renesas,sdhi-r8a7796" - SDHI IP on R8A7796 SoC
++ "renesas,sdhi-shmobile" - a generic sh-mobile SDHI controller
++ "renesas,rcar-gen1-sdhi" - a generic R-Car Gen1 SDHI controller
++ "renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 or RZ/G1
++ SDHI controller
++ "renesas,rcar-gen3-sdhi" - a generic R-Car Gen3 SDHI controller
++
++
++ When compatible with the generic version, nodes must list
++ the SoC-specific version corresponding to the platform
++ first followed by the generic version.
+
+ - clocks: Most controllers only have 1 clock source per channel. However, on
+ some variations of this controller, the internal card detection
+@@ -47,7 +57,7 @@ Optional properties:
+ Example: R8A7790 (R-Car H2) SDHI controller nodes
+
+ sdhi0: sd@ee100000 {
+- compatible = "renesas,sdhi-r8a7790";
++ compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee100000 0 0x328>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 314>;
+@@ -61,7 +71,7 @@ Example: R8A7790 (R-Car H2) SDHI controller nodes
+ };
+
+ sdhi1: sd@ee120000 {
+- compatible = "renesas,sdhi-r8a7790";
++ compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee120000 0 0x328>;
+ interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 313>;
+@@ -75,7 +85,7 @@ Example: R8A7790 (R-Car H2) SDHI controller nodes
+ };
+
+ sdhi2: sd@ee140000 {
+- compatible = "renesas,sdhi-r8a7790";
++ compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee140000 0 0x100>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 312>;
+@@ -89,7 +99,7 @@ Example: R8A7790 (R-Car H2) SDHI controller nodes
+ };
+
+ sdhi3: sd@ee160000 {
+- compatible = "renesas,sdhi-r8a7790";
++ compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
+ reg = <0 0xee160000 0 0x100>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 311>;
+--
+2.19.0
+
diff --git a/patches/0156-mmc-renesas_sdhi-implement-R-Car-Gen-123-fallback-co.patch b/patches/0156-mmc-renesas_sdhi-implement-R-Car-Gen-123-fallback-co.patch
new file mode 100644
index 0000000..55b7773
--- /dev/null
+++ b/patches/0156-mmc-renesas_sdhi-implement-R-Car-Gen-123-fallback-co.patch
@@ -0,0 +1,76 @@
+From 04a1dad22f8de8e5bf6754c6d8dd2e9824cc1c92 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Wed, 18 Oct 2017 09:00:23 +0200
+Subject: [PATCH 0156/1795] mmc: renesas_sdhi: implement R-Car Gen[123]
+ fallback compatibility strings
+
+Implement fallback compatibility strings for R-Car Gen 1, 2 and 3.
+
+In the case of Renesas R-Car hardware we know that there are generations of
+SoCs, f.e. Gen 1 and 2. But beyond that its not clear what the relationship
+between IP blocks might be. For example, I believe that r8a7790 is older
+than r8a7791 but that doesn't imply that the latter is a descendant of the
+former or vice versa.
+
+We can, however, by examining the documentation and behaviour of the
+hardware at run-time observe that the current driver implementation appears
+to be compatible with the IP blocks on SoCs within a given generation.
+
+For the above reasons and convenience when enabling new SoCs a
+per-generation fallback compatibility string scheme is being adopted for
+drivers for Renesas SoCs.
+
+Also, improve readability by listing the shmobile fallback compatibility
+string after the more-specific compatibility strings they provide a
+fallback for.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit d6dc425ae595e14026beac3720e43edd70215dc8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mmc/host/renesas_sdhi_internal_dmac.c | 1 +
+ drivers/mmc/host/renesas_sdhi_sys_dmac.c | 5 ++++-
+ 2 files changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
+index 713658be6661..4c20d368f515 100644
+--- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c
++++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
+@@ -88,6 +88,7 @@ static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = {
+ static const struct of_device_id renesas_sdhi_internal_dmac_of_match[] = {
+ { .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_gen3_compatible, },
+ { .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_gen3_compatible, },
++ { .compatible = "renesas,rcar-gen3-sdhi", .data = &of_rcar_gen3_compatible, },
+ {},
+ };
+ MODULE_DEVICE_TABLE(of, renesas_sdhi_internal_dmac_of_match);
+diff --git a/drivers/mmc/host/renesas_sdhi_sys_dmac.c b/drivers/mmc/host/renesas_sdhi_sys_dmac.c
+index df4465439e13..9ab10436e4b8 100644
+--- a/drivers/mmc/host/renesas_sdhi_sys_dmac.c
++++ b/drivers/mmc/host/renesas_sdhi_sys_dmac.c
+@@ -91,7 +91,6 @@ static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = {
+ };
+
+ static const struct of_device_id renesas_sdhi_sys_dmac_of_match[] = {
+- { .compatible = "renesas,sdhi-shmobile" },
+ { .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, },
+ { .compatible = "renesas,sdhi-r8a73a4", .data = &of_default_cfg, },
+ { .compatible = "renesas,sdhi-r8a7740", .data = &of_default_cfg, },
+@@ -107,6 +106,10 @@ static const struct of_device_id renesas_sdhi_sys_dmac_of_match[] = {
+ { .compatible = "renesas,sdhi-r8a7794", .data = &of_rcar_gen2_compatible, },
+ { .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_gen3_compatible, },
+ { .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_gen3_compatible, },
++ { .compatible = "renesas,rcar-gen1-sdhi", .data = &of_rcar_gen1_compatible, },
++ { .compatible = "renesas,rcar-gen2-sdhi", .data = &of_rcar_gen2_compatible, },
++ { .compatible = "renesas,rcar-gen3-sdhi", .data = &of_rcar_gen3_compatible, },
++ { .compatible = "renesas,sdhi-shmobile" },
+ {},
+ };
+ MODULE_DEVICE_TABLE(of, renesas_sdhi_sys_dmac_of_match);
+--
+2.19.0
+
diff --git a/patches/0157-mmc-tmio-Use-common-error-handling-code-in-tmio_mmc_.patch b/patches/0157-mmc-tmio-Use-common-error-handling-code-in-tmio_mmc_.patch
new file mode 100644
index 0000000..282276c
--- /dev/null
+++ b/patches/0157-mmc-tmio-Use-common-error-handling-code-in-tmio_mmc_.patch
@@ -0,0 +1,62 @@
+From 25eaa9309036453b683e612694309cab701a3fbb Mon Sep 17 00:00:00 2001
+From: Markus Elfring <elfring@users.sourceforge.net>
+Date: Fri, 27 Oct 2017 19:09:17 +0200
+Subject: [PATCH 0157/1795] mmc: tmio: Use common error handling code in
+ tmio_mmc_host_probe()
+
+* Add a jump target so that a bit of exception handling can be better
+ reused at the end of this function.
+
+* Adjust condition checks.
+
+This issue was detected by using the Coccinelle software.
+
+Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit 7f8e446b032bd6bbcec7c2f068d0a4f2d5929249)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mmc/host/tmio_mmc_core.c | 17 +++++++++--------
+ 1 file changed, 9 insertions(+), 8 deletions(-)
+
+diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c
+index de1562f27fdb..788f11c0ea38 100644
+--- a/drivers/mmc/host/tmio_mmc_core.c
++++ b/drivers/mmc/host/tmio_mmc_core.c
+@@ -1302,23 +1302,24 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
+ pm_runtime_enable(&pdev->dev);
+
+ ret = mmc_add_host(mmc);
+- if (ret < 0) {
+- tmio_mmc_host_remove(_host);
+- return ret;
+- }
++ if (ret)
++ goto remove_host;
+
+ dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
+
+ if (pdata->flags & TMIO_MMC_USE_GPIO_CD) {
+ ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio, 0);
+- if (ret < 0) {
+- tmio_mmc_host_remove(_host);
+- return ret;
+- }
++ if (ret)
++ goto remove_host;
++
+ mmc_gpiod_request_cd_irq(mmc);
+ }
+
+ return 0;
++
++remove_host:
++ tmio_mmc_host_remove(_host);
++ return ret;
+ }
+ EXPORT_SYMBOL_GPL(tmio_mmc_host_probe);
+
+--
+2.19.0
+
diff --git a/patches/0158-mmc-tmio-Replace-msleep-of-20ms-or-less-with-usleep_.patch b/patches/0158-mmc-tmio-Replace-msleep-of-20ms-or-less-with-usleep_.patch
new file mode 100644
index 0000000..1abd2e5
--- /dev/null
+++ b/patches/0158-mmc-tmio-Replace-msleep-of-20ms-or-less-with-usleep_.patch
@@ -0,0 +1,87 @@
+From e02729fd0f49ccf4033459ef91f825a23d317920 Mon Sep 17 00:00:00 2001
+From: Masaharu Hayakawa <masaharu.hayakawa.ry@renesas.com>
+Date: Fri, 3 Nov 2017 10:36:28 +0100
+Subject: [PATCH 0158/1795] mmc: tmio: Replace msleep() of 20ms or less with
+ usleep_range()
+
+As documented in Documentation/timers/timers-howto.txt
+as follows, replace msleep() with usleep_range().
+
+msleep(1~20) may not do what the caller intends, and
+will often sleep longer (~20 ms actual sleep for any
+value given in the 1~20ms range). In many cases this
+is not the desired behavior.
+
+Signed-off-by: Masaharu Hayakawa <masaharu.hayakawa.ry@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit 1f27ddf0b50b45eaf0f95565125cf10f9c821746)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mmc/host/tmio_mmc_core.c | 14 +++++++-------
+ 1 file changed, 7 insertions(+), 7 deletions(-)
+
+diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c
+index 788f11c0ea38..62217afb51d6 100644
+--- a/drivers/mmc/host/tmio_mmc_core.c
++++ b/drivers/mmc/host/tmio_mmc_core.c
+@@ -167,11 +167,11 @@ static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
+
+ /* HW engineers overrode docs: no sleep needed on R-Car2+ */
+ if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
+- msleep(10);
++ usleep_range(10000, 11000);
+
+ if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
+ sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
+- msleep(10);
++ usleep_range(10000, 11000);
+ }
+ }
+
+@@ -179,7 +179,7 @@ static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
+ {
+ if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
+ sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
+- msleep(10);
++ usleep_range(10000, 11000);
+ }
+
+ sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
+@@ -187,7 +187,7 @@ static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
+
+ /* HW engineers overrode docs: no sleep needed on R-Car2+ */
+ if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
+- msleep(10);
++ usleep_range(10000, 11000);
+ }
+
+ static void tmio_mmc_set_clock(struct tmio_mmc_host *host,
+@@ -219,7 +219,7 @@ static void tmio_mmc_set_clock(struct tmio_mmc_host *host,
+ sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
+ sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & CLK_CTL_DIV_MASK);
+ if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
+- msleep(10);
++ usleep_range(10000, 11000);
+
+ tmio_mmc_clk_start(host);
+ }
+@@ -230,11 +230,11 @@ static void tmio_mmc_reset(struct tmio_mmc_host *host)
+ sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
+ if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
+ sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
+- msleep(10);
++ usleep_range(10000, 11000);
+ sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
+ if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
+ sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
+- msleep(10);
++ usleep_range(10000, 11000);
+
+ if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
+ sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
+--
+2.19.0
+
diff --git a/patches/0159-soc-renesas-identify-R-Car-V3M.patch b/patches/0159-soc-renesas-identify-R-Car-V3M.patch
new file mode 100644
index 0000000..43c08ec
--- /dev/null
+++ b/patches/0159-soc-renesas-identify-R-Car-V3M.patch
@@ -0,0 +1,46 @@
+From 1ccfd2d5fbe828e645d62fa89b5defe9907549c8 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Tue, 12 Sep 2017 23:37:17 +0300
+Subject: [PATCH 0159/1795] soc: renesas: identify R-Car V3M
+
+Add support for identifying the R-Car V3M (R8A77970) SoC.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit bb0030752f288a2e2d27cc110d6d4139fe7a948d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/soc/renesas/renesas-soc.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/drivers/soc/renesas/renesas-soc.c b/drivers/soc/renesas/renesas-soc.c
+index 90d6b7a4340a..9f4ee2567c72 100644
+--- a/drivers/soc/renesas/renesas-soc.c
++++ b/drivers/soc/renesas/renesas-soc.c
+@@ -144,6 +144,11 @@ static const struct renesas_soc soc_rcar_m3_w __initconst __maybe_unused = {
+ .id = 0x52,
+ };
+
++static const struct renesas_soc soc_rcar_v3m __initconst __maybe_unused = {
++ .family = &fam_rcar_gen3,
++ .id = 0x54,
++};
++
+ static const struct renesas_soc soc_rcar_d3 __initconst __maybe_unused = {
+ .family = &fam_rcar_gen3,
+ .id = 0x58,
+@@ -204,6 +209,9 @@ static const struct of_device_id renesas_socs[] __initconst = {
+ #ifdef CONFIG_ARCH_R8A7796
+ { .compatible = "renesas,r8a7796", .data = &soc_rcar_m3_w },
+ #endif
++#ifdef CONFIG_ARCH_R8A77970
++ { .compatible = "renesas,r8a77970", .data = &soc_rcar_v3m },
++#endif
+ #ifdef CONFIG_ARCH_R8A77995
+ { .compatible = "renesas,r8a77995", .data = &soc_rcar_d3 },
+ #endif
+--
+2.19.0
+
diff --git a/patches/0160-spi-rspi-Add-r8a7743-5-to-the-compatible-list.patch b/patches/0160-spi-rspi-Add-r8a7743-5-to-the-compatible-list.patch
new file mode 100644
index 0000000..9575bc9
--- /dev/null
+++ b/patches/0160-spi-rspi-Add-r8a7743-5-to-the-compatible-list.patch
@@ -0,0 +1,39 @@
+From b6a5ca983ac4324129fc0d34b9921f8f79e94248 Mon Sep 17 00:00:00 2001
+From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Date: Fri, 8 Sep 2017 09:07:15 +0100
+Subject: [PATCH 0160/1795] spi: rspi: Add r8a7743/5 to the compatible list
+
+Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 10c1705eced11d6ad710fddcdb57aaa9f85a6f98)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/spi/spi-rspi.txt | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+diff --git a/Documentation/devicetree/bindings/spi/spi-rspi.txt b/Documentation/devicetree/bindings/spi/spi-rspi.txt
+index 8f4169f63936..3b02b3a7cfb2 100644
+--- a/Documentation/devicetree/bindings/spi/spi-rspi.txt
++++ b/Documentation/devicetree/bindings/spi/spi-rspi.txt
+@@ -5,11 +5,14 @@ Required properties:
+ "renesas,rspi-<soctype>", "renesas,rspi" as fallback.
+ For Renesas Serial Peripheral Interface on RZ/A1H:
+ "renesas,rspi-<soctype>", "renesas,rspi-rz" as fallback.
+- For Quad Serial Peripheral Interface on R-Car Gen2:
++ For Quad Serial Peripheral Interface on R-Car Gen2 and
++ RZ/G1 devices:
+ "renesas,qspi-<soctype>", "renesas,qspi" as fallback.
+ Examples with soctypes are:
+ - "renesas,rspi-sh7757" (SH)
+ - "renesas,rspi-r7s72100" (RZ/A1H)
++ - "renesas,qspi-r8a7743" (RZ/G1M)
++ - "renesas,qspi-r8a7745" (RZ/G1E)
+ - "renesas,qspi-r8a7790" (R-Car H2)
+ - "renesas,qspi-r8a7791" (R-Car M2-W)
+ - "renesas,qspi-r8a7792" (R-Car V2H)
+--
+2.19.0
+
diff --git a/patches/0161-spi-rspi-Use-of_device_get_match_data-helper.patch b/patches/0161-spi-rspi-Use-of_device_get_match_data-helper.patch
new file mode 100644
index 0000000..91eef02
--- /dev/null
+++ b/patches/0161-spi-rspi-Use-of_device_get_match_data-helper.patch
@@ -0,0 +1,43 @@
+From 7f92da97669bbcb0297241761574cd2eb43241a8 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 4 Oct 2017 14:19:53 +0200
+Subject: [PATCH 0161/1795] spi: rspi: Use of_device_get_match_data() helper
+
+Use the of_device_get_match_data() helper instead of open coding.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 219a7bc577e6024cd6f84571d93d939b3517aafe)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/spi/spi-rspi.c | 6 ++----
+ 1 file changed, 2 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
+index 2a10b3f94ff7..2ce875764ca6 100644
+--- a/drivers/spi/spi-rspi.c
++++ b/drivers/spi/spi-rspi.c
+@@ -1221,7 +1221,6 @@ static int rspi_probe(struct platform_device *pdev)
+ struct spi_master *master;
+ struct rspi_data *rspi;
+ int ret;
+- const struct of_device_id *of_id;
+ const struct rspi_plat_data *rspi_pd;
+ const struct spi_ops *ops;
+
+@@ -1229,9 +1228,8 @@ static int rspi_probe(struct platform_device *pdev)
+ if (master == NULL)
+ return -ENOMEM;
+
+- of_id = of_match_device(rspi_of_match, &pdev->dev);
+- if (of_id) {
+- ops = of_id->data;
++ ops = of_device_get_match_data(&pdev->dev);
++ if (ops) {
+ ret = rspi_parse_dt(&pdev->dev, master);
+ if (ret)
+ goto error1;
+--
+2.19.0
+
diff --git a/patches/0162-spi-rspi-Do-not-set-SPCR_SPE-in-qspi_set_config_regi.patch b/patches/0162-spi-rspi-Do-not-set-SPCR_SPE-in-qspi_set_config_regi.patch
new file mode 100644
index 0000000..cf1eb08
--- /dev/null
+++ b/patches/0162-spi-rspi-Do-not-set-SPCR_SPE-in-qspi_set_config_regi.patch
@@ -0,0 +1,46 @@
+From 92c10528525804e8d66057a3796dca497ab0476b Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 7 Dec 2017 11:09:21 +0100
+Subject: [PATCH 0162/1795] spi: rspi: Do not set SPCR_SPE in
+ qspi_set_config_register()
+
+The R-Car Gen2 Hardware User Manual Rev. 2.00 states:
+
+ If the master/slave mode select bit (MSTR) is modified while the SPI
+ function enable bit (SPE) is set to 1 (that is, this module is
+ enabled), the subsequent operation cannot be guaranteed.
+
+Hence do not set SPCR_SPE when setting SPCR_MSTR, just like the
+.set_config_register() implementations for other RSPI variants do.
+
+Note that when booted from QSPI, the boot loader will have set SPCR_MSTR
+already, hence usually the bit is never modified by the Linux driver.
+
+Reported-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit b458a3490e46dddd5b63f59b458c9b6d2284a63f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/spi/spi-rspi.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
+index 2ce875764ca6..0835a8d88fb8 100644
+--- a/drivers/spi/spi-rspi.c
++++ b/drivers/spi/spi-rspi.c
+@@ -377,8 +377,8 @@ static int qspi_set_config_register(struct rspi_data *rspi, int access_size)
+ /* Sets SPCMD */
+ rspi_write16(rspi, rspi->spcmd, RSPI_SPCMD0);
+
+- /* Enables SPI function in master mode */
+- rspi_write8(rspi, SPCR_SPE | SPCR_MSTR, RSPI_SPCR);
++ /* Sets RSPI mode */
++ rspi_write8(rspi, SPCR_MSTR, RSPI_SPCR);
+
+ return 0;
+ }
+--
+2.19.0
+
diff --git a/patches/0163-pinctrl-rza1-Add-support-for-RZ-A1L.patch b/patches/0163-pinctrl-rza1-Add-support-for-RZ-A1L.patch
new file mode 100644
index 0000000..67306c4
--- /dev/null
+++ b/patches/0163-pinctrl-rza1-Add-support-for-RZ-A1L.patch
@@ -0,0 +1,176 @@
+From 6f025204ccddfb6b222574720e0ab03abb770813 Mon Sep 17 00:00:00 2001
+From: Chris Brandt <chris.brandt@renesas.com>
+Date: Wed, 4 Oct 2017 16:07:23 -0500
+Subject: [PATCH 0163/1795] pinctrl: rza1: Add support for RZ/A1L
+
+Aspects like the number of ports and the location where peripherals are
+brought out differ between the RZ/A1H and RZ/A1L.
+
+Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
+Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 039bc58e73b77723029fb5147a9d62da9d2ec22d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/pinctrl-rza1.c | 134 +++++++++++++++++++++++++++++++++
+ 1 file changed, 134 insertions(+)
+
+diff --git a/drivers/pinctrl/pinctrl-rza1.c b/drivers/pinctrl/pinctrl-rza1.c
+index 04d058706b80..717c0f4449a0 100644
+--- a/drivers/pinctrl/pinctrl-rza1.c
++++ b/drivers/pinctrl/pinctrl-rza1.c
+@@ -302,6 +302,134 @@ static const struct rza1_pinmux_conf rza1h_pmx_conf = {
+ .swio_entries = rza1h_swio_entries,
+ };
+
++/* ----------------------------------------------------------------------------
++ * RZ/A1L (r7s72102) pinmux flags
++ */
++
++static const struct rza1_bidir_pin rza1l_bidir_pins_p1[] = {
++ { .pin = 0, .func = 1 },
++ { .pin = 1, .func = 1 },
++ { .pin = 2, .func = 1 },
++ { .pin = 3, .func = 1 },
++ { .pin = 4, .func = 1 },
++ { .pin = 5, .func = 1 },
++ { .pin = 6, .func = 1 },
++ { .pin = 7, .func = 1 },
++};
++
++static const struct rza1_bidir_pin rza1l_bidir_pins_p3[] = {
++ { .pin = 0, .func = 2 },
++ { .pin = 1, .func = 2 },
++ { .pin = 2, .func = 2 },
++ { .pin = 4, .func = 2 },
++ { .pin = 5, .func = 2 },
++ { .pin = 10, .func = 2 },
++ { .pin = 11, .func = 2 },
++ { .pin = 12, .func = 2 },
++ { .pin = 13, .func = 2 },
++};
++
++static const struct rza1_bidir_pin rza1l_bidir_pins_p4[] = {
++ { .pin = 1, .func = 4 },
++ { .pin = 2, .func = 2 },
++ { .pin = 3, .func = 2 },
++ { .pin = 6, .func = 2 },
++ { .pin = 7, .func = 2 },
++};
++
++static const struct rza1_bidir_pin rza1l_bidir_pins_p5[] = {
++ { .pin = 0, .func = 1 },
++ { .pin = 1, .func = 1 },
++ { .pin = 2, .func = 1 },
++ { .pin = 3, .func = 1 },
++ { .pin = 4, .func = 1 },
++ { .pin = 5, .func = 1 },
++ { .pin = 6, .func = 1 },
++ { .pin = 7, .func = 1 },
++ { .pin = 8, .func = 1 },
++ { .pin = 9, .func = 1 },
++ { .pin = 10, .func = 1 },
++ { .pin = 11, .func = 1 },
++ { .pin = 12, .func = 1 },
++ { .pin = 13, .func = 1 },
++ { .pin = 14, .func = 1 },
++ { .pin = 15, .func = 1 },
++ { .pin = 0, .func = 2 },
++ { .pin = 1, .func = 2 },
++ { .pin = 2, .func = 2 },
++ { .pin = 3, .func = 2 },
++};
++
++static const struct rza1_bidir_pin rza1l_bidir_pins_p6[] = {
++ { .pin = 0, .func = 1 },
++ { .pin = 1, .func = 1 },
++ { .pin = 2, .func = 1 },
++ { .pin = 3, .func = 1 },
++ { .pin = 4, .func = 1 },
++ { .pin = 5, .func = 1 },
++ { .pin = 6, .func = 1 },
++ { .pin = 7, .func = 1 },
++ { .pin = 8, .func = 1 },
++ { .pin = 9, .func = 1 },
++ { .pin = 10, .func = 1 },
++ { .pin = 11, .func = 1 },
++ { .pin = 12, .func = 1 },
++ { .pin = 13, .func = 1 },
++ { .pin = 14, .func = 1 },
++ { .pin = 15, .func = 1 },
++};
++
++static const struct rza1_bidir_pin rza1l_bidir_pins_p7[] = {
++ { .pin = 2, .func = 2 },
++ { .pin = 3, .func = 2 },
++ { .pin = 5, .func = 2 },
++ { .pin = 6, .func = 2 },
++ { .pin = 7, .func = 2 },
++ { .pin = 2, .func = 3 },
++ { .pin = 3, .func = 3 },
++ { .pin = 5, .func = 3 },
++ { .pin = 6, .func = 3 },
++ { .pin = 7, .func = 3 },
++};
++
++static const struct rza1_bidir_pin rza1l_bidir_pins_p9[] = {
++ { .pin = 1, .func = 2 },
++ { .pin = 0, .func = 3 },
++ { .pin = 1, .func = 3 },
++ { .pin = 3, .func = 3 },
++ { .pin = 4, .func = 3 },
++ { .pin = 5, .func = 3 },
++};
++
++static const struct rza1_swio_pin rza1l_swio_pins[] = {
++ { .port = 2, .pin = 8, .func = 2, .input = 0 },
++ { .port = 5, .pin = 6, .func = 3, .input = 0 },
++ { .port = 6, .pin = 6, .func = 3, .input = 0 },
++ { .port = 6, .pin = 10, .func = 3, .input = 0 },
++ { .port = 7, .pin = 10, .func = 2, .input = 0 },
++ { .port = 8, .pin = 2, .func = 3, .input = 0 },
++};
++
++static const struct rza1_bidir_entry rza1l_bidir_entries[RZA1_NPORTS] = {
++ [1] = { ARRAY_SIZE(rza1l_bidir_pins_p1), rza1l_bidir_pins_p1 },
++ [3] = { ARRAY_SIZE(rza1l_bidir_pins_p3), rza1l_bidir_pins_p3 },
++ [4] = { ARRAY_SIZE(rza1l_bidir_pins_p4), rza1l_bidir_pins_p4 },
++ [5] = { ARRAY_SIZE(rza1l_bidir_pins_p4), rza1l_bidir_pins_p5 },
++ [6] = { ARRAY_SIZE(rza1l_bidir_pins_p6), rza1l_bidir_pins_p6 },
++ [7] = { ARRAY_SIZE(rza1l_bidir_pins_p7), rza1l_bidir_pins_p7 },
++ [9] = { ARRAY_SIZE(rza1l_bidir_pins_p9), rza1l_bidir_pins_p9 },
++};
++
++static const struct rza1_swio_entry rza1l_swio_entries[] = {
++ [0] = { ARRAY_SIZE(rza1h_swio_pins), rza1h_swio_pins },
++};
++
++/* RZ/A1L (r7s72102x) pinmux flags table */
++static const struct rza1_pinmux_conf rza1l_pmx_conf = {
++ .bidir_entries = rza1l_bidir_entries,
++ .swio_entries = rza1l_swio_entries,
++};
++
+ /* ----------------------------------------------------------------------------
+ * RZ/A1 types
+ */
+@@ -1283,9 +1411,15 @@ static int rza1_pinctrl_probe(struct platform_device *pdev)
+
+ static const struct of_device_id rza1_pinctrl_of_match[] = {
+ {
++ /* RZ/A1H, RZ/A1M */
+ .compatible = "renesas,r7s72100-ports",
+ .data = &rza1h_pmx_conf,
+ },
++ {
++ /* RZ/A1L */
++ .compatible = "renesas,r7s72102-ports",
++ .data = &rza1l_pmx_conf,
++ },
+ { }
+ };
+
+--
+2.19.0
+
diff --git a/patches/0164-dt-bindings-pinctrl-Add-support-for-RZ-A1M-and-RZ-A1.patch b/patches/0164-dt-bindings-pinctrl-Add-support-for-RZ-A1M-and-RZ-A1.patch
new file mode 100644
index 0000000..0c25600
--- /dev/null
+++ b/patches/0164-dt-bindings-pinctrl-Add-support-for-RZ-A1M-and-RZ-A1.patch
@@ -0,0 +1,37 @@
+From d600c9db5c3f97ee195930d49898bde675f49988 Mon Sep 17 00:00:00 2001
+From: Chris Brandt <chris.brandt@renesas.com>
+Date: Wed, 4 Oct 2017 16:07:24 -0500
+Subject: [PATCH 0164/1795] dt-bindings: pinctrl: Add support for RZ/A1M and
+ RZ/A1L
+
+Describe how to specify RZ/A1M and RZ/A1L devices.
+
+Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 4a9cfe47b8ea3f7b8c551a365184f4aec993ee5d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ .../devicetree/bindings/pinctrl/renesas,rza1-pinctrl.txt | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rza1-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/renesas,rza1-pinctrl.txt
+index 43e21474528a..fd3696eb36bf 100644
+--- a/Documentation/devicetree/bindings/pinctrl/renesas,rza1-pinctrl.txt
++++ b/Documentation/devicetree/bindings/pinctrl/renesas,rza1-pinctrl.txt
+@@ -12,8 +12,10 @@ Pin controller node
+ -------------------
+
+ Required properties:
+- - compatible
+- this shall be "renesas,r7s72100-ports".
++ - compatible: should be:
++ - "renesas,r7s72100-ports": for RZ/A1H
++ - "renesas,r7s72101-ports", "renesas,r7s72100-ports": for RZ/A1M
++ - "renesas,r7s72102-ports": for RZ/A1L
+
+ - reg
+ address base and length of the memory area where the pin controller
+--
+2.19.0
+
diff --git a/patches/0165-ata-sata_rcar-Use-of_device_get_match_data-helper.patch b/patches/0165-ata-sata_rcar-Use-of_device_get_match_data-helper.patch
new file mode 100644
index 0000000..9da1ed2
--- /dev/null
+++ b/patches/0165-ata-sata_rcar-Use-of_device_get_match_data-helper.patch
@@ -0,0 +1,48 @@
+From a0d3bcb027cb51689adcbaea48cee311b2158970 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 4 Oct 2017 14:13:07 +0200
+Subject: [PATCH 0165/1795] ata: sata_rcar: Use of_device_get_match_data()
+ helper
+
+Use the of_device_get_match_data() helper instead of open coding.
+Note that the sata_rcar driver is used with DT only, so there's always a
+valid match.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Tejun Heo <tj@kernel.org>
+(cherry picked from commit 03b623fbc5d8d24d45d4e8cd4ba245b0170891f3)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/ata/sata_rcar.c | 7 +------
+ 1 file changed, 1 insertion(+), 6 deletions(-)
+
+diff --git a/drivers/ata/sata_rcar.c b/drivers/ata/sata_rcar.c
+index 537d11869069..80ee2f2a50d0 100644
+--- a/drivers/ata/sata_rcar.c
++++ b/drivers/ata/sata_rcar.c
+@@ -872,7 +872,6 @@ MODULE_DEVICE_TABLE(of, sata_rcar_match);
+
+ static int sata_rcar_probe(struct platform_device *pdev)
+ {
+- const struct of_device_id *of_id;
+ struct ata_host *host;
+ struct sata_rcar_priv *priv;
+ struct resource *mem;
+@@ -888,11 +887,7 @@ static int sata_rcar_probe(struct platform_device *pdev)
+ if (!priv)
+ return -ENOMEM;
+
+- of_id = of_match_device(sata_rcar_match, &pdev->dev);
+- if (!of_id)
+- return -ENODEV;
+-
+- priv->type = (enum sata_rcar_type)of_id->data;
++ priv->type = (enum sata_rcar_type)of_device_get_match_data(&pdev->dev);
+ priv->clk = devm_clk_get(&pdev->dev, NULL);
+ if (IS_ERR(priv->clk)) {
+ dev_err(&pdev->dev, "failed to get access to sata clock\n");
+--
+2.19.0
+
diff --git a/patches/0166-tty-add-SPDX-identifiers-to-all-remaining-files-in-d.patch b/patches/0166-tty-add-SPDX-identifiers-to-all-remaining-files-in-d.patch
new file mode 100644
index 0000000..0b9d774
--- /dev/null
+++ b/patches/0166-tty-add-SPDX-identifiers-to-all-remaining-files-in-d.patch
@@ -0,0 +1,1909 @@
+From c7565903d250f7e3c020a76e97dfd7e75140b451 Mon Sep 17 00:00:00 2001
+From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Date: Mon, 6 Nov 2017 18:11:51 +0100
+Subject: [PATCH 0166/1795] tty: add SPDX identifiers to all remaining files in
+ drivers/tty/
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+It's good to have SPDX identifiers in all files to make it easier to
+audit the kernel tree for correct licenses.
+
+Update the drivers/tty files files with the correct SPDX license
+identifier based on the license text in the file itself. The SPDX
+identifier is a legally binding shorthand, which can be used instead of
+the full boiler plate text.
+
+This work is based on a script and data from Thomas Gleixner, Philippe
+Ombredanne, and Kate Stewart.
+
+Cc: Jiri Slaby <jslaby@suse.com>
+Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
+Cc: Paul Mackerras <paulus@samba.org>
+Cc: Michael Ellerman <mpe@ellerman.id.au>
+Cc: Chris Metcalf <cmetcalf@mellanox.com>
+Cc: Jiri Kosina <jikos@kernel.org>
+Cc: David Sterba <dsterba@suse.com>
+Cc: James Hogan <jhogan@kernel.org>
+Cc: Rob Herring <robh@kernel.org>
+Cc: Eric Anholt <eric@anholt.net>
+Cc: Stefan Wahren <stefan.wahren@i2se.com>
+Cc: Florian Fainelli <f.fainelli@gmail.com>
+Cc: Ray Jui <rjui@broadcom.com>
+Cc: Scott Branden <sbranden@broadcom.com>
+Cc: bcm-kernel-feedback-list@broadcom.com
+Cc: "James E.J. Bottomley" <jejb@parisc-linux.org>
+Cc: Helge Deller <deller@gmx.de>
+Cc: Joachim Eastwood <manabian@gmail.com>
+Cc: Matthias Brugger <matthias.bgg@gmail.com>
+Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
+Cc: Tobias Klauser <tklauser@distanz.ch>
+Cc: Russell King <linux@armlinux.org.uk>
+Cc: Vineet Gupta <vgupta@synopsys.com>
+Cc: Richard Genoud <richard.genoud@gmail.com>
+Cc: Alexander Shiyan <shc_work@mail.ru>
+Cc: Baruch Siach <baruch@tkos.co.il>
+Cc: "Maciej W. Rozycki" <macro@linux-mips.org>
+Cc: "Uwe Kleine-König" <kernel@pengutronix.de>
+Cc: Pat Gefre <pfg@sgi.com>
+Cc: "Guilherme G. Piccoli" <gpiccoli@linux.vnet.ibm.com>
+Cc: Jason Wessel <jason.wessel@windriver.com>
+Cc: Vladimir Zapolskiy <vz@mleia.com>
+Cc: Sylvain Lemieux <slemieux.tyco@gmail.com>
+Cc: Carlo Caione <carlo@caione.org>
+Cc: Kevin Hilman <khilman@baylibre.com>
+Cc: Liviu Dudau <liviu.dudau@arm.com>
+Cc: Sudeep Holla <sudeep.holla@arm.com>
+Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
+Cc: Andy Gross <andy.gross@linaro.org>
+Cc: David Brown <david.brown@linaro.org>
+Cc: "Andreas Färber" <afaerber@suse.de>
+Cc: Kevin Cernekee <cernekee@gmail.com>
+Cc: Laxman Dewangan <ldewangan@nvidia.com>
+Cc: Thierry Reding <thierry.reding@gmail.com>
+Cc: Jonathan Hunter <jonathanh@nvidia.com>
+Cc: Barry Song <baohua@kernel.org>
+Cc: Patrice Chotard <patrice.chotard@st.com>
+Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
+Cc: Alexandre Torgue <alexandre.torgue@st.com>
+Cc: "David S. Miller" <davem@davemloft.net>
+Cc: Peter Korsgaard <jacmet@sunsite.dk>
+Cc: Timur Tabi <timur@tabi.org>
+Cc: Tony Prisk <linux@prisktech.co.nz>
+Cc: Michal Simek <michal.simek@xilinx.com>
+Cc: "Sören Brinkmann" <soren.brinkmann@xilinx.com>
+Cc: Thomas Gleixner <tglx@linutronix.de>
+Cc: Kate Stewart <kstewart@linuxfoundation.org>
+Cc: Philippe Ombredanne <pombredanne@nexb.com>
+Cc: Jiri Slaby <jslaby@suse.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit e3b3d0f549c1d19b94e6ac55c66643166ea649ef)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/tty/amiserial.c | 1 +
+ drivers/tty/bfin_jtag_comm.c | 1 +
+ drivers/tty/cyclades.c | 1 +
+ drivers/tty/ehv_bytechan.c | 1 +
+ drivers/tty/goldfish.c | 1 +
+ drivers/tty/hvc/hvc_bfin_jtag.c | 1 +
+ drivers/tty/hvc/hvc_console.c | 1 +
+ drivers/tty/hvc/hvc_console.h | 1 +
+ drivers/tty/hvc/hvc_dcc.c | 1 +
+ drivers/tty/hvc/hvc_opal.c | 1 +
+ drivers/tty/hvc/hvc_rtas.c | 1 +
+ drivers/tty/hvc/hvc_tile.c | 1 +
+ drivers/tty/hvc/hvc_udbg.c | 1 +
+ drivers/tty/hvc/hvc_vio.c | 1 +
+ drivers/tty/hvc/hvc_xen.c | 1 +
+ drivers/tty/hvc/hvcs.c | 1 +
+ drivers/tty/hvc/hvsi.c | 1 +
+ drivers/tty/ipwireless/main.c | 1 +
+ drivers/tty/isicom.c | 1 +
+ drivers/tty/metag_da.c | 1 +
+ drivers/tty/mips_ejtag_fdc.c | 1 +
+ drivers/tty/moxa.c | 1 +
+ drivers/tty/mxser.c | 1 +
+ drivers/tty/n_gsm.c | 1 +
+ drivers/tty/n_hdlc.c | 1 +
+ drivers/tty/n_null.c | 1 +
+ drivers/tty/n_r3964.c | 1 +
+ drivers/tty/n_tracerouter.c | 1 +
+ drivers/tty/n_tracesink.c | 1 +
+ drivers/tty/n_tracesink.h | 1 +
+ drivers/tty/n_tty.c | 1 +
+ drivers/tty/nozomi.c | 1 +
+ drivers/tty/rocket.c | 1 +
+ drivers/tty/serdev/core.c | 1 +
+ drivers/tty/serdev/serdev-ttyport.c | 1 +
+ drivers/tty/serial/21285.c | 1 +
+ drivers/tty/serial/8250/8250.h | 1 +
+ drivers/tty/serial/8250/8250_accent.c | 1 +
+ drivers/tty/serial/8250/8250_acorn.c | 1 +
+ drivers/tty/serial/8250/8250_aspeed_vuart.c | 1 +
+ drivers/tty/serial/8250/8250_bcm2835aux.c | 1 +
+ drivers/tty/serial/8250/8250_boca.c | 1 +
+ drivers/tty/serial/8250/8250_core.c | 1 +
+ drivers/tty/serial/8250/8250_dma.c | 1 +
+ drivers/tty/serial/8250/8250_dw.c | 1 +
+ drivers/tty/serial/8250/8250_early.c | 1 +
+ drivers/tty/serial/8250/8250_em.c | 1 +
+ drivers/tty/serial/8250/8250_exar.c | 1 +
+ drivers/tty/serial/8250/8250_exar_st16c554.c | 1 +
+ drivers/tty/serial/8250/8250_fintek.c | 1 +
+ drivers/tty/serial/8250/8250_fourport.c | 1 +
+ drivers/tty/serial/8250/8250_fsl.c | 1 +
+ drivers/tty/serial/8250/8250_gsc.c | 1 +
+ drivers/tty/serial/8250/8250_hp300.c | 1 +
+ drivers/tty/serial/8250/8250_hub6.c | 1 +
+ drivers/tty/serial/8250/8250_ingenic.c | 1 +
+ drivers/tty/serial/8250/8250_lpc18xx.c | 1 +
+ drivers/tty/serial/8250/8250_lpss.c | 1 +
+ drivers/tty/serial/8250/8250_mid.c | 1 +
+ drivers/tty/serial/8250/8250_moxa.c | 1 +
+ drivers/tty/serial/8250/8250_mtk.c | 1 +
+ drivers/tty/serial/8250/8250_of.c | 1 +
+ drivers/tty/serial/8250/8250_omap.c | 1 +
+ drivers/tty/serial/8250/8250_pci.c | 1 +
+ drivers/tty/serial/8250/8250_pnp.c | 1 +
+ drivers/tty/serial/8250/8250_port.c | 1 +
+ drivers/tty/serial/8250/8250_pxa.c | 1 +
+ drivers/tty/serial/8250/8250_uniphier.c | 1 +
+ drivers/tty/serial/8250/serial_cs.c | 1 +
+ drivers/tty/serial/altera_jtaguart.c | 1 +
+ drivers/tty/serial/altera_uart.c | 1 +
+ drivers/tty/serial/amba-pl010.c | 1 +
+ drivers/tty/serial/amba-pl011.c | 1 +
+ drivers/tty/serial/apbuart.c | 1 +
+ drivers/tty/serial/ar933x_uart.c | 1 +
+ drivers/tty/serial/arc_uart.c | 1 +
+ drivers/tty/serial/atmel_serial.c | 1 +
+ drivers/tty/serial/atmel_serial.h | 1 +
+ drivers/tty/serial/bcm63xx_uart.c | 1 +
+ drivers/tty/serial/bfin_sport_uart.c | 1 +
+ drivers/tty/serial/bfin_sport_uart.h | 1 +
+ drivers/tty/serial/bfin_uart.c | 1 +
+ drivers/tty/serial/clps711x.c | 1 +
+ drivers/tty/serial/cpm_uart/cpm_uart.h | 1 +
+ drivers/tty/serial/cpm_uart/cpm_uart_core.c | 1 +
+ drivers/tty/serial/cpm_uart/cpm_uart_cpm1.c | 1 +
+ drivers/tty/serial/cpm_uart/cpm_uart_cpm2.c | 1 +
+ drivers/tty/serial/digicolor-usart.c | 1 +
+ drivers/tty/serial/dz.c | 1 +
+ drivers/tty/serial/earlycon-arm-semihost.c | 1 +
+ drivers/tty/serial/earlycon.c | 1 +
+ drivers/tty/serial/efm32-uart.c | 1 +
+ drivers/tty/serial/fsl_lpuart.c | 1 +
+ drivers/tty/serial/icom.c | 1 +
+ drivers/tty/serial/icom.h | 1 +
+ drivers/tty/serial/ifx6x60.c | 1 +
+ drivers/tty/serial/ifx6x60.h | 1 +
+ drivers/tty/serial/imx.c | 1 +
+ drivers/tty/serial/ioc3_serial.c | 1 +
+ drivers/tty/serial/ioc4_serial.c | 1 +
+ drivers/tty/serial/ip22zilog.c | 1 +
+ drivers/tty/serial/jsm/jsm.h | 1 +
+ drivers/tty/serial/jsm/jsm_cls.c | 1 +
+ drivers/tty/serial/jsm/jsm_driver.c | 1 +
+ drivers/tty/serial/jsm/jsm_neo.c | 1 +
+ drivers/tty/serial/jsm/jsm_tty.c | 1 +
+ drivers/tty/serial/kgdb_nmi.c | 1 +
+ drivers/tty/serial/kgdboc.c | 1 +
+ drivers/tty/serial/lantiq.c | 1 +
+ drivers/tty/serial/lpc32xx_hs.c | 1 +
+ drivers/tty/serial/m32r_sio.c | 1 +
+ drivers/tty/serial/m32r_sio_reg.h | 1 +
+ drivers/tty/serial/max3100.c | 1 +
+ drivers/tty/serial/max310x.c | 1 +
+ drivers/tty/serial/mcf.c | 1 +
+ drivers/tty/serial/men_z135_uart.c | 1 +
+ drivers/tty/serial/meson_uart.c | 1 +
+ drivers/tty/serial/mpc52xx_uart.c | 1 +
+ drivers/tty/serial/mps2-uart.c | 1 +
+ drivers/tty/serial/mpsc.c | 1 +
+ drivers/tty/serial/msm_serial.c | 1 +
+ drivers/tty/serial/mux.c | 1 +
+ drivers/tty/serial/mvebu-uart.c | 1 +
+ drivers/tty/serial/mxs-auart.c | 1 +
+ drivers/tty/serial/netx-serial.c | 1 +
+ drivers/tty/serial/omap-serial.c | 1 +
+ drivers/tty/serial/owl-uart.c | 1 +
+ drivers/tty/serial/pch_uart.c | 1 +
+ drivers/tty/serial/pic32_uart.c | 1 +
+ drivers/tty/serial/pic32_uart.h | 1 +
+ drivers/tty/serial/pmac_zilog.c | 1 +
+ drivers/tty/serial/pnx8xxx_uart.c | 1 +
+ drivers/tty/serial/pxa.c | 1 +
+ drivers/tty/serial/rp2.c | 1 +
+ drivers/tty/serial/sa1100.c | 1 +
+ drivers/tty/serial/samsung.c | 1 +
+ drivers/tty/serial/samsung.h | 1 +
+ drivers/tty/serial/sb1250-duart.c | 1 +
+ drivers/tty/serial/sc16is7xx.c | 1 +
+ drivers/tty/serial/sccnxp.c | 1 +
+ drivers/tty/serial/serial-tegra.c | 1 +
+ drivers/tty/serial/serial_core.c | 1 +
+ drivers/tty/serial/serial_ks8695.c | 1 +
+ drivers/tty/serial/serial_mctrl_gpio.c | 1 +
+ drivers/tty/serial/serial_mctrl_gpio.h | 1 +
+ drivers/tty/serial/serial_txx9.c | 1 +
+ drivers/tty/serial/sh-sci.c | 1 +
+ drivers/tty/serial/sirfsoc_uart.c | 1 +
+ drivers/tty/serial/sirfsoc_uart.h | 1 +
+ drivers/tty/serial/sprd_serial.c | 1 +
+ drivers/tty/serial/st-asc.c | 1 +
+ drivers/tty/serial/stm32-usart.c | 1 +
+ drivers/tty/serial/stm32-usart.h | 1 +
+ drivers/tty/serial/suncore.c | 1 +
+ drivers/tty/serial/sunhv.c | 1 +
+ drivers/tty/serial/sunsab.c | 1 +
+ drivers/tty/serial/sunsu.c | 1 +
+ drivers/tty/serial/sunzilog.c | 1 +
+ drivers/tty/serial/tilegx.c | 1 +
+ drivers/tty/serial/timbuart.c | 1 +
+ drivers/tty/serial/timbuart.h | 1 +
+ drivers/tty/serial/uartlite.c | 1 +
+ drivers/tty/serial/ucc_uart.c | 1 +
+ drivers/tty/serial/vr41xx_siu.c | 1 +
+ drivers/tty/serial/vt8500_serial.c | 1 +
+ drivers/tty/serial/xilinx_uartps.c | 1 +
+ drivers/tty/serial/zs.c | 1 +
+ drivers/tty/synclink.c | 1 +
+ drivers/tty/synclink_gt.c | 1 +
+ drivers/tty/synclinkmp.c | 1 +
+ drivers/tty/tty_audit.c | 1 +
+ drivers/tty/tty_baudrate.c | 1 +
+ drivers/tty/tty_buffer.c | 1 +
+ drivers/tty/tty_io.c | 1 +
+ drivers/tty/tty_ioctl.c | 1 +
+ drivers/tty/tty_jobctrl.c | 1 +
+ drivers/tty/tty_ldisc.c | 1 +
+ drivers/tty/tty_ldsem.c | 1 +
+ drivers/tty/tty_port.c | 1 +
+ drivers/tty/vt/consolemap.c | 1 +
+ drivers/tty/vt/keyboard.c | 1 +
+ drivers/tty/vt/vt.c | 1 +
+ 182 files changed, 182 insertions(+)
+
+diff --git a/drivers/tty/amiserial.c b/drivers/tty/amiserial.c
+index 9820e20993db..32d7ce430b02 100644
+--- a/drivers/tty/amiserial.c
++++ b/drivers/tty/amiserial.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Serial driver for the amiga builtin port.
+ *
+diff --git a/drivers/tty/bfin_jtag_comm.c b/drivers/tty/bfin_jtag_comm.c
+index ce24182f8514..d569692b3bea 100644
+--- a/drivers/tty/bfin_jtag_comm.c
++++ b/drivers/tty/bfin_jtag_comm.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * TTY over Blackfin JTAG Communication
+ *
+diff --git a/drivers/tty/cyclades.c b/drivers/tty/cyclades.c
+index d272bc4e7fb5..b646a1dc801b 100644
+--- a/drivers/tty/cyclades.c
++++ b/drivers/tty/cyclades.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ #undef BLOCKMOVE
+ #define Z_WAKE
+ #undef Z_EXT_CHARS_IN_BUFFER
+diff --git a/drivers/tty/ehv_bytechan.c b/drivers/tty/ehv_bytechan.c
+index a1c7125cb968..9637f343deaf 100644
+--- a/drivers/tty/ehv_bytechan.c
++++ b/drivers/tty/ehv_bytechan.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /* ePAPR hypervisor byte channel device driver
+ *
+ * Copyright 2009-2011 Freescale Semiconductor, Inc.
+diff --git a/drivers/tty/goldfish.c b/drivers/tty/goldfish.c
+index 85a500ddbcaa..4b5c0e3dd242 100644
+--- a/drivers/tty/goldfish.c
++++ b/drivers/tty/goldfish.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2007 Google, Inc.
+ * Copyright (C) 2012 Intel, Inc.
+diff --git a/drivers/tty/hvc/hvc_bfin_jtag.c b/drivers/tty/hvc/hvc_bfin_jtag.c
+index 31d6cc6a77af..24ff4c468e6d 100644
+--- a/drivers/tty/hvc/hvc_bfin_jtag.c
++++ b/drivers/tty/hvc/hvc_bfin_jtag.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Console via Blackfin JTAG Communication
+ *
+diff --git a/drivers/tty/hvc/hvc_console.c b/drivers/tty/hvc/hvc_console.c
+index a8d399188242..fed03a676f07 100644
+--- a/drivers/tty/hvc/hvc_console.c
++++ b/drivers/tty/hvc/hvc_console.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2001 Anton Blanchard <anton@au.ibm.com>, IBM
+ * Copyright (C) 2001 Paul Mackerras <paulus@au.ibm.com>, IBM
+diff --git a/drivers/tty/hvc/hvc_console.h b/drivers/tty/hvc/hvc_console.h
+index 798c48d0d32c..74c9a20489db 100644
+--- a/drivers/tty/hvc/hvc_console.h
++++ b/drivers/tty/hvc/hvc_console.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * hvc_console.h
+ * Copyright (C) 2005 IBM Corporation
+diff --git a/drivers/tty/hvc/hvc_dcc.c b/drivers/tty/hvc/hvc_dcc.c
+index 82f240fb98f0..3e4fb8736d10 100644
+--- a/drivers/tty/hvc/hvc_dcc.c
++++ b/drivers/tty/hvc/hvc_dcc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /* Copyright (c) 2010, 2014 The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+diff --git a/drivers/tty/hvc/hvc_opal.c b/drivers/tty/hvc/hvc_opal.c
+index 9da8474fe50a..237bd4fee07a 100644
+--- a/drivers/tty/hvc/hvc_opal.c
++++ b/drivers/tty/hvc/hvc_opal.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * opal driver interface to hvc_console.c
+ *
+diff --git a/drivers/tty/hvc/hvc_rtas.c b/drivers/tty/hvc/hvc_rtas.c
+index 08c87920b74a..c168bd5ffc26 100644
+--- a/drivers/tty/hvc/hvc_rtas.c
++++ b/drivers/tty/hvc/hvc_rtas.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * IBM RTAS driver interface to hvc_console.c
+ *
+diff --git a/drivers/tty/hvc/hvc_tile.c b/drivers/tty/hvc/hvc_tile.c
+index 9da1e842bbe9..cdd8fa774b56 100644
+--- a/drivers/tty/hvc/hvc_tile.c
++++ b/drivers/tty/hvc/hvc_tile.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright 2010 Tilera Corporation. All Rights Reserved.
+ *
+diff --git a/drivers/tty/hvc/hvc_udbg.c b/drivers/tty/hvc/hvc_udbg.c
+index 9cf573d06a29..d32929b0ce41 100644
+--- a/drivers/tty/hvc/hvc_udbg.c
++++ b/drivers/tty/hvc/hvc_udbg.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * udbg interface to hvc_console.c
+ *
+diff --git a/drivers/tty/hvc/hvc_vio.c b/drivers/tty/hvc/hvc_vio.c
+index a1d272ac82bb..287ccf682c84 100644
+--- a/drivers/tty/hvc/hvc_vio.c
++++ b/drivers/tty/hvc/hvc_vio.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * vio driver interface to hvc_console.c
+ *
+diff --git a/drivers/tty/hvc/hvc_xen.c b/drivers/tty/hvc/hvc_xen.c
+index 5e87e4866bcb..e38a50dc58b2 100644
+--- a/drivers/tty/hvc/hvc_xen.c
++++ b/drivers/tty/hvc/hvc_xen.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * xen console driver interface to hvc_console.c
+ *
+diff --git a/drivers/tty/hvc/hvcs.c b/drivers/tty/hvc/hvcs.c
+index 63c29fe9d21f..fc5a12e56276 100644
+--- a/drivers/tty/hvc/hvcs.c
++++ b/drivers/tty/hvc/hvcs.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * IBM eServer Hypervisor Virtual Console Server Device Driver
+ * Copyright (C) 2003, 2004 IBM Corp.
+diff --git a/drivers/tty/hvc/hvsi.c b/drivers/tty/hvc/hvsi.c
+index 2e578d6433af..63ebc73565fc 100644
+--- a/drivers/tty/hvc/hvsi.c
++++ b/drivers/tty/hvc/hvsi.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2004 Hollis Blanchard <hollisb@us.ibm.com>, IBM
+ *
+diff --git a/drivers/tty/ipwireless/main.c b/drivers/tty/ipwireless/main.c
+index 655c7948261c..3475e841ef5c 100644
+--- a/drivers/tty/ipwireless/main.c
++++ b/drivers/tty/ipwireless/main.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * IPWireless 3G PCMCIA Network Driver
+ *
+diff --git a/drivers/tty/isicom.c b/drivers/tty/isicom.c
+index 61ecdd6b2fc2..a598f79ee3fa 100644
+--- a/drivers/tty/isicom.c
++++ b/drivers/tty/isicom.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+diff --git a/drivers/tty/metag_da.c b/drivers/tty/metag_da.c
+index 25ccef2fe748..278265e24e89 100644
+--- a/drivers/tty/metag_da.c
++++ b/drivers/tty/metag_da.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * dashtty.c - tty driver for Dash channels interface.
+ *
+diff --git a/drivers/tty/mips_ejtag_fdc.c b/drivers/tty/mips_ejtag_fdc.c
+index a2dab3fb8751..bbadd927b036 100644
+--- a/drivers/tty/mips_ejtag_fdc.c
++++ b/drivers/tty/mips_ejtag_fdc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * TTY driver for MIPS EJTAG Fast Debug Channels.
+ *
+diff --git a/drivers/tty/moxa.c b/drivers/tty/moxa.c
+index 7f3d4cb0341b..8223960abb68 100644
+--- a/drivers/tty/moxa.c
++++ b/drivers/tty/moxa.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*****************************************************************************/
+ /*
+ * moxa.c -- MOXA Intellio family multiport serial driver.
+diff --git a/drivers/tty/mxser.c b/drivers/tty/mxser.c
+index 7dd38047ba23..22f4f35f295f 100644
+--- a/drivers/tty/mxser.c
++++ b/drivers/tty/mxser.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
+ *
+diff --git a/drivers/tty/n_gsm.c b/drivers/tty/n_gsm.c
+index f46bd1af7a10..a572be56dc1f 100644
+--- a/drivers/tty/n_gsm.c
++++ b/drivers/tty/n_gsm.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * n_gsm.c GSM 0710 tty multiplexor
+ * Copyright (c) 2009/10 Intel Corporation
+diff --git a/drivers/tty/n_hdlc.c b/drivers/tty/n_hdlc.c
+index 7b2a466616d6..e2af7b1161f6 100644
+--- a/drivers/tty/n_hdlc.c
++++ b/drivers/tty/n_hdlc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /* generic HDLC line discipline for Linux
+ *
+ * Written by Paul Fulghum paulkf@microgate.com
+diff --git a/drivers/tty/n_null.c b/drivers/tty/n_null.c
+index d63261c36e42..cf6dc0fa401a 100644
+--- a/drivers/tty/n_null.c
++++ b/drivers/tty/n_null.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ #include <linux/types.h>
+ #include <linux/errno.h>
+ #include <linux/tty.h>
+diff --git a/drivers/tty/n_r3964.c b/drivers/tty/n_r3964.c
+index 305b6490d405..d18411500b1a 100644
+--- a/drivers/tty/n_r3964.c
++++ b/drivers/tty/n_r3964.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /* r3964 linediscipline for linux
+ *
+ * -----------------------------------------------------------
+diff --git a/drivers/tty/n_tracerouter.c b/drivers/tty/n_tracerouter.c
+index ac5716979bc1..717d0c111b72 100644
+--- a/drivers/tty/n_tracerouter.c
++++ b/drivers/tty/n_tracerouter.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * n_tracerouter.c - Trace data router through tty space
+ *
+diff --git a/drivers/tty/n_tracesink.c b/drivers/tty/n_tracesink.c
+index 4616870a6b1b..f90709495c2f 100644
+--- a/drivers/tty/n_tracesink.c
++++ b/drivers/tty/n_tracesink.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * n_tracesink.c - Trace data router and sink path through tty space.
+ *
+diff --git a/drivers/tty/n_tracesink.h b/drivers/tty/n_tracesink.h
+index a68bb44f1ef5..2c9efd32f41b 100644
+--- a/drivers/tty/n_tracesink.h
++++ b/drivers/tty/n_tracesink.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * n_tracesink.h - Kernel driver API to route trace data in kernel space.
+ *
+diff --git a/drivers/tty/n_tty.c b/drivers/tty/n_tty.c
+index 0475f9685a41..ac53ffd746ad 100644
+--- a/drivers/tty/n_tty.c
++++ b/drivers/tty/n_tty.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * n_tty.c --- implements the N_TTY line discipline.
+ *
+diff --git a/drivers/tty/nozomi.c b/drivers/tty/nozomi.c
+index 39b3723a32a6..ec3e1b26b616 100644
+--- a/drivers/tty/nozomi.c
++++ b/drivers/tty/nozomi.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+ /*
+ * nozomi.c -- HSDPA driver Broadband Wireless Data Card - Globe Trotter
+ *
+diff --git a/drivers/tty/rocket.c b/drivers/tty/rocket.c
+index 20d79a6007d5..59cd4b218218 100644
+--- a/drivers/tty/rocket.c
++++ b/drivers/tty/rocket.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+ /*
+ * RocketPort device driver for Linux
+ *
+diff --git a/drivers/tty/serdev/core.c b/drivers/tty/serdev/core.c
+index ae2564ecddcd..4c9c83c3015f 100644
+--- a/drivers/tty/serdev/core.c
++++ b/drivers/tty/serdev/core.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2016-2017 Linaro Ltd., Rob Herring <robh@kernel.org>
+ *
+diff --git a/drivers/tty/serdev/serdev-ttyport.c b/drivers/tty/serdev/serdev-ttyport.c
+index 69fc6d9ab490..1c433cc293fa 100644
+--- a/drivers/tty/serdev/serdev-ttyport.c
++++ b/drivers/tty/serdev/serdev-ttyport.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2016-2017 Linaro Ltd., Rob Herring <robh@kernel.org>
+ *
+diff --git a/drivers/tty/serial/21285.c b/drivers/tty/serial/21285.c
+index 804632b4a929..32b3acf8150a 100644
+--- a/drivers/tty/serial/21285.c
++++ b/drivers/tty/serial/21285.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Driver for the serial port on the 21285 StrongArm-110 core logic chip.
+ *
+diff --git a/drivers/tty/serial/8250/8250.h b/drivers/tty/serial/8250/8250.h
+index b2bdc35f7495..36e9ae190fc0 100644
+--- a/drivers/tty/serial/8250/8250.h
++++ b/drivers/tty/serial/8250/8250.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for 8250/16550-type serial ports
+ *
+diff --git a/drivers/tty/serial/8250/8250_accent.c b/drivers/tty/serial/8250/8250_accent.c
+index 522aeae05192..2c11bc1f49c2 100644
+--- a/drivers/tty/serial/8250/8250_accent.c
++++ b/drivers/tty/serial/8250/8250_accent.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2005 Russell King.
+ * Data taken from include/asm-i386/serial.h
+diff --git a/drivers/tty/serial/8250/8250_acorn.c b/drivers/tty/serial/8250/8250_acorn.c
+index 402dfdd4940e..5395343fcf15 100644
+--- a/drivers/tty/serial/8250/8250_acorn.c
++++ b/drivers/tty/serial/8250/8250_acorn.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * linux/drivers/serial/acorn.c
+ *
+diff --git a/drivers/tty/serial/8250/8250_aspeed_vuart.c b/drivers/tty/serial/8250/8250_aspeed_vuart.c
+index 33a801353114..c468bcc4e638 100644
+--- a/drivers/tty/serial/8250/8250_aspeed_vuart.c
++++ b/drivers/tty/serial/8250/8250_aspeed_vuart.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Serial Port driver for Aspeed VUART device
+ *
+diff --git a/drivers/tty/serial/8250/8250_bcm2835aux.c b/drivers/tty/serial/8250/8250_bcm2835aux.c
+index a23c7da42ea8..242ec1883768 100644
+--- a/drivers/tty/serial/8250/8250_bcm2835aux.c
++++ b/drivers/tty/serial/8250/8250_bcm2835aux.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Serial port driver for BCM2835AUX UART
+ *
+diff --git a/drivers/tty/serial/8250/8250_boca.c b/drivers/tty/serial/8250/8250_boca.c
+index a63b5998e383..4123eb887020 100644
+--- a/drivers/tty/serial/8250/8250_boca.c
++++ b/drivers/tty/serial/8250/8250_boca.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2005 Russell King.
+ * Data taken from include/asm-i386/serial.h
+diff --git a/drivers/tty/serial/8250/8250_core.c b/drivers/tty/serial/8250/8250_core.c
+index d29b512a7d9f..3975281fd66f 100644
+--- a/drivers/tty/serial/8250/8250_core.c
++++ b/drivers/tty/serial/8250/8250_core.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Universal/legacy driver for 8250/16550-type serial ports
+ *
+diff --git a/drivers/tty/serial/8250/8250_dma.c b/drivers/tty/serial/8250/8250_dma.c
+index 26f17456b0d7..fe9259330886 100644
+--- a/drivers/tty/serial/8250/8250_dma.c
++++ b/drivers/tty/serial/8250/8250_dma.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * 8250_dma.c - DMA Engine API support for 8250.c
+ *
+diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
+index 27c5b2b46b8d..e4426c3d78aa 100644
+--- a/drivers/tty/serial/8250/8250_dw.c
++++ b/drivers/tty/serial/8250/8250_dw.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Synopsys DesignWare 8250 driver.
+ *
+diff --git a/drivers/tty/serial/8250/8250_early.c b/drivers/tty/serial/8250/8250_early.c
+index f135c1846477..bfa3dcc238ac 100644
+--- a/drivers/tty/serial/8250/8250_early.c
++++ b/drivers/tty/serial/8250/8250_early.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Early serial console for 8250/16550 devices
+ *
+diff --git a/drivers/tty/serial/8250/8250_em.c b/drivers/tty/serial/8250/8250_em.c
+index 0b6381214917..36355b365c51 100644
+--- a/drivers/tty/serial/8250/8250_em.c
++++ b/drivers/tty/serial/8250/8250_em.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Renesas Emma Mobile 8250 driver
+ *
+diff --git a/drivers/tty/serial/8250/8250_exar.c b/drivers/tty/serial/8250/8250_exar.c
+index 411b4b03457b..3268d3e27107 100644
+--- a/drivers/tty/serial/8250/8250_exar.c
++++ b/drivers/tty/serial/8250/8250_exar.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Probe module for 8250/16550-type Exar chips PCI serial ports.
+ *
+diff --git a/drivers/tty/serial/8250/8250_exar_st16c554.c b/drivers/tty/serial/8250/8250_exar_st16c554.c
+index 3a7cb8262bb9..0b1318b38cdf 100644
+--- a/drivers/tty/serial/8250/8250_exar_st16c554.c
++++ b/drivers/tty/serial/8250/8250_exar_st16c554.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Written by Paul B Schroeder < pschroeder "at" uplogix "dot" com >
+ * Based on 8250_boca.
+diff --git a/drivers/tty/serial/8250/8250_fintek.c b/drivers/tty/serial/8250/8250_fintek.c
+index ba4af5434b91..3b2ebff7bef0 100644
+--- a/drivers/tty/serial/8250/8250_fintek.c
++++ b/drivers/tty/serial/8250/8250_fintek.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Probe for F81216A LPC to 4 UART
+ *
+diff --git a/drivers/tty/serial/8250/8250_fourport.c b/drivers/tty/serial/8250/8250_fourport.c
+index 4045180a8cfc..1d8e936a18b4 100644
+--- a/drivers/tty/serial/8250/8250_fourport.c
++++ b/drivers/tty/serial/8250/8250_fourport.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2005 Russell King.
+ * Data taken from include/asm-i386/serial.h
+diff --git a/drivers/tty/serial/8250/8250_fsl.c b/drivers/tty/serial/8250/8250_fsl.c
+index 910bfee5a88b..dafe7aa081b3 100644
+--- a/drivers/tty/serial/8250/8250_fsl.c
++++ b/drivers/tty/serial/8250/8250_fsl.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ #include <linux/serial_reg.h>
+ #include <linux/serial_8250.h>
+
+diff --git a/drivers/tty/serial/8250/8250_gsc.c b/drivers/tty/serial/8250/8250_gsc.c
+index df2931e1e086..8eea662d6987 100644
+--- a/drivers/tty/serial/8250/8250_gsc.c
++++ b/drivers/tty/serial/8250/8250_gsc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Serial Device Initialisation for Lasi/Asp/Wax/Dino
+ *
+diff --git a/drivers/tty/serial/8250/8250_hp300.c b/drivers/tty/serial/8250/8250_hp300.c
+index 115190b7962a..3012ea03d22c 100644
+--- a/drivers/tty/serial/8250/8250_hp300.c
++++ b/drivers/tty/serial/8250/8250_hp300.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Driver for the 98626/98644/internal serial interface on hp300/hp400
+ * (based on the National Semiconductor INS8250/NS16550AF/WD16C552 UARTs)
+diff --git a/drivers/tty/serial/8250/8250_hub6.c b/drivers/tty/serial/8250/8250_hub6.c
+index 27124e21eb96..f75c89ec7ebc 100644
+--- a/drivers/tty/serial/8250/8250_hub6.c
++++ b/drivers/tty/serial/8250/8250_hub6.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2005 Russell King.
+ * Data taken from include/asm-i386/serial.h
+diff --git a/drivers/tty/serial/8250/8250_ingenic.c b/drivers/tty/serial/8250/8250_ingenic.c
+index 464389b28900..5c993a3af653 100644
+--- a/drivers/tty/serial/8250/8250_ingenic.c
++++ b/drivers/tty/serial/8250/8250_ingenic.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2010 Lars-Peter Clausen <lars@metafoo.de>
+ * Copyright (C) 2015 Imagination Technologies
+diff --git a/drivers/tty/serial/8250/8250_lpc18xx.c b/drivers/tty/serial/8250/8250_lpc18xx.c
+index 99cd478851ff..e34011535a6a 100644
+--- a/drivers/tty/serial/8250/8250_lpc18xx.c
++++ b/drivers/tty/serial/8250/8250_lpc18xx.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Serial port driver for NXP LPC18xx/43xx UART
+ *
+diff --git a/drivers/tty/serial/8250/8250_lpss.c b/drivers/tty/serial/8250/8250_lpss.c
+index 7dddd7e6a01c..f4b596da0a3d 100644
+--- a/drivers/tty/serial/8250/8250_lpss.c
++++ b/drivers/tty/serial/8250/8250_lpss.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * 8250_lpss.c - Driver for UART on Intel Braswell and various other Intel SoCs
+ *
+diff --git a/drivers/tty/serial/8250/8250_mid.c b/drivers/tty/serial/8250/8250_mid.c
+index ec957cce8c9a..174a95778935 100644
+--- a/drivers/tty/serial/8250/8250_mid.c
++++ b/drivers/tty/serial/8250/8250_mid.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * 8250_mid.c - Driver for UART on Intel Penwell and various other Intel SOCs
+ *
+diff --git a/drivers/tty/serial/8250/8250_moxa.c b/drivers/tty/serial/8250/8250_moxa.c
+index d5069b2d4d79..da18dd62e608 100644
+--- a/drivers/tty/serial/8250/8250_moxa.c
++++ b/drivers/tty/serial/8250/8250_moxa.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * 8250_moxa.c - MOXA Smartio/Industio MUE multiport serial driver.
+ *
+diff --git a/drivers/tty/serial/8250/8250_mtk.c b/drivers/tty/serial/8250/8250_mtk.c
+index fb45770d47aa..1e3d983ac483 100644
+--- a/drivers/tty/serial/8250/8250_mtk.c
++++ b/drivers/tty/serial/8250/8250_mtk.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Mediatek 8250 driver.
+ *
+diff --git a/drivers/tty/serial/8250/8250_of.c b/drivers/tty/serial/8250/8250_of.c
+index 3613a6aabfb3..28118c5630ac 100644
+--- a/drivers/tty/serial/8250/8250_of.c
++++ b/drivers/tty/serial/8250/8250_of.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Serial Port driver for Open Firmware platform devices
+ *
+diff --git a/drivers/tty/serial/8250/8250_omap.c b/drivers/tty/serial/8250/8250_omap.c
+index da04ba1ecf68..9d2e7392f24b 100644
+--- a/drivers/tty/serial/8250/8250_omap.c
++++ b/drivers/tty/serial/8250/8250_omap.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * 8250-core based driver for the OMAP internal UART
+ *
+diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c
+index 4986b4aebe80..ead29f3c03e0 100644
+--- a/drivers/tty/serial/8250/8250_pci.c
++++ b/drivers/tty/serial/8250/8250_pci.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Probe module for 8250/16550-type PCI serial ports.
+ *
+diff --git a/drivers/tty/serial/8250/8250_pnp.c b/drivers/tty/serial/8250/8250_pnp.c
+index 34f05ed78b68..b556f37b9ba9 100644
+--- a/drivers/tty/serial/8250/8250_pnp.c
++++ b/drivers/tty/serial/8250/8250_pnp.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Probe for 8250/16550-type ISAPNP serial ports.
+ *
+diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c
+index ecf3d631bc09..a8f760ea1282 100644
+--- a/drivers/tty/serial/8250/8250_port.c
++++ b/drivers/tty/serial/8250/8250_port.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Base port operations for 8250/16550-type serial ports
+ *
+diff --git a/drivers/tty/serial/8250/8250_pxa.c b/drivers/tty/serial/8250/8250_pxa.c
+index 4d68731af534..5ca660c04a9d 100644
+--- a/drivers/tty/serial/8250/8250_pxa.c
++++ b/drivers/tty/serial/8250/8250_pxa.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * drivers/tty/serial/8250/8250_pxa.c -- driver for PXA on-board UARTS
+ * Copyright: (C) 2013 Sergei Ianovich <ynvich@gmail.com>
+diff --git a/drivers/tty/serial/8250/8250_uniphier.c b/drivers/tty/serial/8250/8250_uniphier.c
+index c206f173f912..752fad67c3fe 100644
+--- a/drivers/tty/serial/8250/8250_uniphier.c
++++ b/drivers/tty/serial/8250/8250_uniphier.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+diff --git a/drivers/tty/serial/8250/serial_cs.c b/drivers/tty/serial/8250/serial_cs.c
+index 933c2688dd7e..9963a766dcfb 100644
+--- a/drivers/tty/serial/8250/serial_cs.c
++++ b/drivers/tty/serial/8250/serial_cs.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: (GPL-2.0 OR MPL-1.1)
+ /*======================================================================
+
+ A driver for PCMCIA serial devices
+diff --git a/drivers/tty/serial/altera_jtaguart.c b/drivers/tty/serial/altera_jtaguart.c
+index 0475f5d261ce..ef444aff77c5 100644
+--- a/drivers/tty/serial/altera_jtaguart.c
++++ b/drivers/tty/serial/altera_jtaguart.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * altera_jtaguart.c -- Altera JTAG UART driver
+ *
+diff --git a/drivers/tty/serial/altera_uart.c b/drivers/tty/serial/altera_uart.c
+index 59cb62de236b..69d9c2fd5f85 100644
+--- a/drivers/tty/serial/altera_uart.c
++++ b/drivers/tty/serial/altera_uart.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * altera_uart.c -- Altera UART driver
+ *
+diff --git a/drivers/tty/serial/amba-pl010.c b/drivers/tty/serial/amba-pl010.c
+index 9ec4b8d2879f..a64a20c8e28b 100644
+--- a/drivers/tty/serial/amba-pl010.c
++++ b/drivers/tty/serial/amba-pl010.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for AMBA serial ports
+ *
+diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
+index c9f701aca677..51e7060599f7 100644
+--- a/drivers/tty/serial/amba-pl011.c
++++ b/drivers/tty/serial/amba-pl011.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for AMBA serial ports
+ *
+diff --git a/drivers/tty/serial/apbuart.c b/drivers/tty/serial/apbuart.c
+index dd60ed96a0ad..60cd133ffbbc 100644
+--- a/drivers/tty/serial/apbuart.c
++++ b/drivers/tty/serial/apbuart.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Driver for GRLIB serial ports (APBUART)
+ *
+diff --git a/drivers/tty/serial/ar933x_uart.c b/drivers/tty/serial/ar933x_uart.c
+index decc7f3c1ab2..15cd1a3ea6bf 100644
+--- a/drivers/tty/serial/ar933x_uart.c
++++ b/drivers/tty/serial/ar933x_uart.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Atheros AR933X SoC built-in UART driver
+ *
+diff --git a/drivers/tty/serial/arc_uart.c b/drivers/tty/serial/arc_uart.c
+index 71e37abb6bcb..0a8b80fa09cd 100644
+--- a/drivers/tty/serial/arc_uart.c
++++ b/drivers/tty/serial/arc_uart.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * ARC On-Chip(fpga) UART Driver
+ *
+diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
+index 2286e9d73115..6dbbecde955a 100644
+--- a/drivers/tty/serial/atmel_serial.c
++++ b/drivers/tty/serial/atmel_serial.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for Atmel AT91 Serial ports
+ * Copyright (C) 2003 Rick Bronson
+diff --git a/drivers/tty/serial/atmel_serial.h b/drivers/tty/serial/atmel_serial.h
+index bd2560502f3c..b4e0e57a0a79 100644
+--- a/drivers/tty/serial/atmel_serial.h
++++ b/drivers/tty/serial/atmel_serial.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * include/linux/atmel_serial.h
+ *
+diff --git a/drivers/tty/serial/bcm63xx_uart.c b/drivers/tty/serial/bcm63xx_uart.c
+index 8c48c3784831..474652d26c71 100644
+--- a/drivers/tty/serial/bcm63xx_uart.c
++++ b/drivers/tty/serial/bcm63xx_uart.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+diff --git a/drivers/tty/serial/bfin_sport_uart.c b/drivers/tty/serial/bfin_sport_uart.c
+index 6b03fb12cd19..abd0f6cf1bba 100644
+--- a/drivers/tty/serial/bfin_sport_uart.c
++++ b/drivers/tty/serial/bfin_sport_uart.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Blackfin On-Chip Sport Emulated UART Driver
+ *
+diff --git a/drivers/tty/serial/bfin_sport_uart.h b/drivers/tty/serial/bfin_sport_uart.h
+index e4510ea135ce..6d9237bb7192 100644
+--- a/drivers/tty/serial/bfin_sport_uart.h
++++ b/drivers/tty/serial/bfin_sport_uart.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Blackfin On-Chip Sport Emulated UART Driver
+ *
+diff --git a/drivers/tty/serial/bfin_uart.c b/drivers/tty/serial/bfin_uart.c
+index 293ecbb00684..7fc639c47534 100644
+--- a/drivers/tty/serial/bfin_uart.c
++++ b/drivers/tty/serial/bfin_uart.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Blackfin On-Chip Serial Driver
+ *
+diff --git a/drivers/tty/serial/clps711x.c b/drivers/tty/serial/clps711x.c
+index ac1328629baa..64d58f2765cc 100644
+--- a/drivers/tty/serial/clps711x.c
++++ b/drivers/tty/serial/clps711x.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for CLPS711x serial ports
+ *
+diff --git a/drivers/tty/serial/cpm_uart/cpm_uart.h b/drivers/tty/serial/cpm_uart/cpm_uart.h
+index 0ad027b95873..79f1d1128c5a 100644
+--- a/drivers/tty/serial/cpm_uart/cpm_uart.h
++++ b/drivers/tty/serial/cpm_uart/cpm_uart.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Driver for CPM (SCC/SMC) serial ports
+ *
+diff --git a/drivers/tty/serial/cpm_uart/cpm_uart_core.c b/drivers/tty/serial/cpm_uart/cpm_uart_core.c
+index 9ac142cfc1f1..a98d3ab37fac 100644
+--- a/drivers/tty/serial/cpm_uart/cpm_uart_core.c
++++ b/drivers/tty/serial/cpm_uart/cpm_uart_core.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for CPM (SCC/SMC) serial ports; core driver
+ *
+diff --git a/drivers/tty/serial/cpm_uart/cpm_uart_cpm1.c b/drivers/tty/serial/cpm_uart/cpm_uart_cpm1.c
+index 6d3b22e93246..31e952fd98d0 100644
+--- a/drivers/tty/serial/cpm_uart/cpm_uart_cpm1.c
++++ b/drivers/tty/serial/cpm_uart/cpm_uart_cpm1.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for CPM (SCC/SMC) serial ports; CPM1 definitions
+ *
+diff --git a/drivers/tty/serial/cpm_uart/cpm_uart_cpm2.c b/drivers/tty/serial/cpm_uart/cpm_uart_cpm2.c
+index f46d2ca87209..84f7c8d32ab3 100644
+--- a/drivers/tty/serial/cpm_uart/cpm_uart_cpm2.c
++++ b/drivers/tty/serial/cpm_uart/cpm_uart_cpm2.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for CPM (SCC/SMC) serial ports; CPM2 definitions
+ *
+diff --git a/drivers/tty/serial/digicolor-usart.c b/drivers/tty/serial/digicolor-usart.c
+index 02ad6953b167..c38a16381ff3 100644
+--- a/drivers/tty/serial/digicolor-usart.c
++++ b/drivers/tty/serial/digicolor-usart.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for Conexant Digicolor serial ports (USART)
+ *
+diff --git a/drivers/tty/serial/dz.c b/drivers/tty/serial/dz.c
+index ff465ff43577..7b57e840e255 100644
+--- a/drivers/tty/serial/dz.c
++++ b/drivers/tty/serial/dz.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * dz.c: Serial port driver for DECstations equipped
+ * with the DZ chipset.
+diff --git a/drivers/tty/serial/earlycon-arm-semihost.c b/drivers/tty/serial/earlycon-arm-semihost.c
+index 6bbeb699777c..84780c17a889 100644
+--- a/drivers/tty/serial/earlycon-arm-semihost.c
++++ b/drivers/tty/serial/earlycon-arm-semihost.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2012 ARM Ltd.
+ * Author: Marc Zyngier <marc.zyngier@arm.com>
+diff --git a/drivers/tty/serial/earlycon.c b/drivers/tty/serial/earlycon.c
+index ac667b47f199..57144c78518f 100644
+--- a/drivers/tty/serial/earlycon.c
++++ b/drivers/tty/serial/earlycon.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2014 Linaro Ltd.
+ * Author: Rob Herring <robh@kernel.org>
+diff --git a/drivers/tty/serial/efm32-uart.c b/drivers/tty/serial/efm32-uart.c
+index 9fff25be87f9..d6b5e5463746 100644
+--- a/drivers/tty/serial/efm32-uart.c
++++ b/drivers/tty/serial/efm32-uart.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ #if defined(CONFIG_SERIAL_EFM32_UART_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+ #define SUPPORT_SYSRQ
+ #endif
+diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c
+index 7a3db9378fa3..d0c072d5c709 100644
+--- a/drivers/tty/serial/fsl_lpuart.c
++++ b/drivers/tty/serial/fsl_lpuart.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Freescale lpuart serial port driver
+ *
+diff --git a/drivers/tty/serial/icom.c b/drivers/tty/serial/icom.c
+index fe92d74f4ea5..a8fd690fbf29 100644
+--- a/drivers/tty/serial/icom.c
++++ b/drivers/tty/serial/icom.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * icom.c
+ *
+diff --git a/drivers/tty/serial/icom.h b/drivers/tty/serial/icom.h
+index c8029e0025c9..da6a38967d2f 100644
+--- a/drivers/tty/serial/icom.h
++++ b/drivers/tty/serial/icom.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * icom.h
+ *
+diff --git a/drivers/tty/serial/ifx6x60.c b/drivers/tty/serial/ifx6x60.c
+index f190a84a0246..fe670f9fcbd9 100644
+--- a/drivers/tty/serial/ifx6x60.c
++++ b/drivers/tty/serial/ifx6x60.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /****************************************************************************
+ *
+ * Driver for the IFX 6x60 spi modem.
+diff --git a/drivers/tty/serial/ifx6x60.h b/drivers/tty/serial/ifx6x60.h
+index 4fbddc297839..a5346e7672c0 100644
+--- a/drivers/tty/serial/ifx6x60.h
++++ b/drivers/tty/serial/ifx6x60.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /****************************************************************************
+ *
+ * Driver for the IFX spi modem.
+diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
+index 8deaf2ad8b34..13085ac31f05 100644
+--- a/drivers/tty/serial/imx.c
++++ b/drivers/tty/serial/imx.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for Motorola/Freescale IMX serial ports
+ *
+diff --git a/drivers/tty/serial/ioc3_serial.c b/drivers/tty/serial/ioc3_serial.c
+index 906ee770ff4a..fcc4bc85dab4 100644
+--- a/drivers/tty/serial/ioc3_serial.c
++++ b/drivers/tty/serial/ioc3_serial.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+diff --git a/drivers/tty/serial/ioc4_serial.c b/drivers/tty/serial/ioc4_serial.c
+index 43d7d32eb150..8804faad5294 100644
+--- a/drivers/tty/serial/ioc4_serial.c
++++ b/drivers/tty/serial/ioc4_serial.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+diff --git a/drivers/tty/serial/ip22zilog.c b/drivers/tty/serial/ip22zilog.c
+index 7ddddb4c3844..8c810733df3d 100644
+--- a/drivers/tty/serial/ip22zilog.c
++++ b/drivers/tty/serial/ip22zilog.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Driver for Zilog serial chips found on SGI workstations and
+ * servers. This driver could actually be made more generic.
+diff --git a/drivers/tty/serial/jsm/jsm.h b/drivers/tty/serial/jsm/jsm.h
+index 0b79b87df47d..588080b05b07 100644
+--- a/drivers/tty/serial/jsm/jsm.h
++++ b/drivers/tty/serial/jsm/jsm.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /************************************************************************
+ * Copyright 2003 Digi International (www.digi.com)
+ *
+diff --git a/drivers/tty/serial/jsm/jsm_cls.c b/drivers/tty/serial/jsm/jsm_cls.c
+index 4eb12a9cae76..74793234e002 100644
+--- a/drivers/tty/serial/jsm/jsm_cls.c
++++ b/drivers/tty/serial/jsm/jsm_cls.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright 2003 Digi International (www.digi.com)
+ * Scott H Kilau <Scott_Kilau at digi dot com>
+diff --git a/drivers/tty/serial/jsm/jsm_driver.c b/drivers/tty/serial/jsm/jsm_driver.c
+index 102d499814ac..0ede8673f5be 100644
+--- a/drivers/tty/serial/jsm/jsm_driver.c
++++ b/drivers/tty/serial/jsm/jsm_driver.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /************************************************************************
+ * Copyright 2003 Digi International (www.digi.com)
+ *
+diff --git a/drivers/tty/serial/jsm/jsm_neo.c b/drivers/tty/serial/jsm/jsm_neo.c
+index c6fdd6369534..b28a0a478d64 100644
+--- a/drivers/tty/serial/jsm/jsm_neo.c
++++ b/drivers/tty/serial/jsm/jsm_neo.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /************************************************************************
+ * Copyright 2003 Digi International (www.digi.com)
+ *
+diff --git a/drivers/tty/serial/jsm/jsm_tty.c b/drivers/tty/serial/jsm/jsm_tty.c
+index ec7d8383900f..7753d5b364b5 100644
+--- a/drivers/tty/serial/jsm/jsm_tty.c
++++ b/drivers/tty/serial/jsm/jsm_tty.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /************************************************************************
+ * Copyright 2003 Digi International (www.digi.com)
+ *
+diff --git a/drivers/tty/serial/kgdb_nmi.c b/drivers/tty/serial/kgdb_nmi.c
+index 117df151627d..b908d4a24de5 100644
+--- a/drivers/tty/serial/kgdb_nmi.c
++++ b/drivers/tty/serial/kgdb_nmi.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * KGDB NMI serial console
+ *
+diff --git a/drivers/tty/serial/kgdboc.c b/drivers/tty/serial/kgdboc.c
+index a260cde743e2..62d162ae7610 100644
+--- a/drivers/tty/serial/kgdboc.c
++++ b/drivers/tty/serial/kgdboc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Based on the same principle as kgdboe using the NETPOLL api, this
+ * driver uses a console polling api to implement a gdb serial inteface
+diff --git a/drivers/tty/serial/lantiq.c b/drivers/tty/serial/lantiq.c
+index 22df94f107e5..868abff3db32 100644
+--- a/drivers/tty/serial/lantiq.c
++++ b/drivers/tty/serial/lantiq.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
+ *
+diff --git a/drivers/tty/serial/lpc32xx_hs.c b/drivers/tty/serial/lpc32xx_hs.c
+index cea57ff32c33..8b58256ec776 100644
+--- a/drivers/tty/serial/lpc32xx_hs.c
++++ b/drivers/tty/serial/lpc32xx_hs.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * High Speed Serial Ports on NXP LPC32xx SoC
+ *
+diff --git a/drivers/tty/serial/m32r_sio.c b/drivers/tty/serial/m32r_sio.c
+index 5b3bd9511993..1e44f2e6c5f7 100644
+--- a/drivers/tty/serial/m32r_sio.c
++++ b/drivers/tty/serial/m32r_sio.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * m32r_sio.c
+ *
+diff --git a/drivers/tty/serial/m32r_sio_reg.h b/drivers/tty/serial/m32r_sio_reg.h
+index 4671473793e3..0fd9727edec3 100644
+--- a/drivers/tty/serial/m32r_sio_reg.h
++++ b/drivers/tty/serial/m32r_sio_reg.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * m32r_sio_reg.h
+ *
+diff --git a/drivers/tty/serial/max3100.c b/drivers/tty/serial/max3100.c
+index ace82645b123..d5e4a5336095 100644
+--- a/drivers/tty/serial/max3100.c
++++ b/drivers/tty/serial/max3100.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ *
+ * Copyright (C) 2008 Christian Pellegrin <chripell@evolware.org>
+diff --git a/drivers/tty/serial/max310x.c b/drivers/tty/serial/max310x.c
+index 9dfedbe6c071..bd626ec325d5 100644
+--- a/drivers/tty/serial/max310x.c
++++ b/drivers/tty/serial/max310x.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Maxim (Dallas) MAX3107/8/9, MAX14830 serial driver
+ *
+diff --git a/drivers/tty/serial/mcf.c b/drivers/tty/serial/mcf.c
+index 02eb32217685..9c779768bd16 100644
+--- a/drivers/tty/serial/mcf.c
++++ b/drivers/tty/serial/mcf.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /****************************************************************************/
+
+ /*
+diff --git a/drivers/tty/serial/men_z135_uart.c b/drivers/tty/serial/men_z135_uart.c
+index e72ea61c70db..9387b2c745a0 100644
+--- a/drivers/tty/serial/men_z135_uart.c
++++ b/drivers/tty/serial/men_z135_uart.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * MEN 16z135 High Speed UART
+ *
+diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uart.c
+index 07c0f98be3ac..d4875ea65a53 100644
+--- a/drivers/tty/serial/meson_uart.c
++++ b/drivers/tty/serial/meson_uart.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Based on meson_uart.c, by AMLOGIC, INC.
+ *
+diff --git a/drivers/tty/serial/mpc52xx_uart.c b/drivers/tty/serial/mpc52xx_uart.c
+index 791c4c74f6d6..1c1febdf60ce 100644
+--- a/drivers/tty/serial/mpc52xx_uart.c
++++ b/drivers/tty/serial/mpc52xx_uart.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
+ *
+diff --git a/drivers/tty/serial/mps2-uart.c b/drivers/tty/serial/mps2-uart.c
+index 492ec4b375a0..5d789b584bc5 100644
+--- a/drivers/tty/serial/mps2-uart.c
++++ b/drivers/tty/serial/mps2-uart.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * MPS2 UART driver
+ *
+diff --git a/drivers/tty/serial/mpsc.c b/drivers/tty/serial/mpsc.c
+index 67ffecc50e42..21b28d8e3c02 100644
+--- a/drivers/tty/serial/mpsc.c
++++ b/drivers/tty/serial/mpsc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Generic driver for the MPSC (UART mode) on Marvell parts (e.g., GT64240,
+ * GT64260, MV64340, MV64360, GT96100, ... ).
+diff --git a/drivers/tty/serial/msm_serial.c b/drivers/tty/serial/msm_serial.c
+index 1db79ee8a886..76649fea8f6f 100644
+--- a/drivers/tty/serial/msm_serial.c
++++ b/drivers/tty/serial/msm_serial.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Driver for msm7k serial device and console
+ *
+diff --git a/drivers/tty/serial/mux.c b/drivers/tty/serial/mux.c
+index 2bff69e70e4b..44f503ea54d2 100644
+--- a/drivers/tty/serial/mux.c
++++ b/drivers/tty/serial/mux.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ ** mux.c:
+ ** serial driver for the Mux console found in some PA-RISC servers.
+diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c
+index 45b57c294d13..09e7da6eab97 100644
+--- a/drivers/tty/serial/mvebu-uart.c
++++ b/drivers/tty/serial/mvebu-uart.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * ***************************************************************************
+ * Marvell Armada-3700 Serial Driver
+diff --git a/drivers/tty/serial/mxs-auart.c b/drivers/tty/serial/mxs-auart.c
+index 673c8fd7e34f..588e08274233 100644
+--- a/drivers/tty/serial/mxs-auart.c
++++ b/drivers/tty/serial/mxs-auart.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Application UART driver for:
+ * Freescale STMP37XX/STMP378X
+diff --git a/drivers/tty/serial/netx-serial.c b/drivers/tty/serial/netx-serial.c
+index 207a0a032ed1..4201938e8aa3 100644
+--- a/drivers/tty/serial/netx-serial.c
++++ b/drivers/tty/serial/netx-serial.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
+ *
+diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
+index 26a22b100df1..f25544e8228d 100644
+--- a/drivers/tty/serial/omap-serial.c
++++ b/drivers/tty/serial/omap-serial.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for OMAP-UART controller.
+ * Based on drivers/serial/8250.c
+diff --git a/drivers/tty/serial/owl-uart.c b/drivers/tty/serial/owl-uart.c
+index b9c859365334..93fa3095a775 100644
+--- a/drivers/tty/serial/owl-uart.c
++++ b/drivers/tty/serial/owl-uart.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Actions Semi Owl family serial console
+ *
+diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c
+index d9123f995705..e2c04a3334da 100644
+--- a/drivers/tty/serial/pch_uart.c
++++ b/drivers/tty/serial/pch_uart.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ *Copyright (C) 2011 LAPIS Semiconductor Co., Ltd.
+ *
+diff --git a/drivers/tty/serial/pic32_uart.c b/drivers/tty/serial/pic32_uart.c
+index 00a33eb859d3..9f55c30d1aa6 100644
+--- a/drivers/tty/serial/pic32_uart.c
++++ b/drivers/tty/serial/pic32_uart.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * PIC32 Integrated Serial Driver.
+ *
+diff --git a/drivers/tty/serial/pic32_uart.h b/drivers/tty/serial/pic32_uart.h
+index ec379da55ebb..43dc168dffd7 100644
+--- a/drivers/tty/serial/pic32_uart.h
++++ b/drivers/tty/serial/pic32_uart.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * PIC32 Integrated Serial Driver.
+ *
+diff --git a/drivers/tty/serial/pmac_zilog.c b/drivers/tty/serial/pmac_zilog.c
+index 6ccdd018fb45..3afba70022b4 100644
+--- a/drivers/tty/serial/pmac_zilog.c
++++ b/drivers/tty/serial/pmac_zilog.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for PowerMac Z85c30 based ESCC cell found in the
+ * "macio" ASICs of various PowerMac models
+diff --git a/drivers/tty/serial/pnx8xxx_uart.c b/drivers/tty/serial/pnx8xxx_uart.c
+index dab2668d3879..a61fb04cca24 100644
+--- a/drivers/tty/serial/pnx8xxx_uart.c
++++ b/drivers/tty/serial/pnx8xxx_uart.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * UART driver for PNX8XXX SoCs
+ *
+diff --git a/drivers/tty/serial/pxa.c b/drivers/tty/serial/pxa.c
+index 905631df1f8b..dd82ecb7c25d 100644
+--- a/drivers/tty/serial/pxa.c
++++ b/drivers/tty/serial/pxa.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Based on drivers/serial/8250.c by Russell King.
+ *
+diff --git a/drivers/tty/serial/rp2.c b/drivers/tty/serial/rp2.c
+index 056f91b3a4ca..2108bf34ff90 100644
+--- a/drivers/tty/serial/rp2.c
++++ b/drivers/tty/serial/rp2.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Driver for Comtrol RocketPort EXPRESS/INFINITY cards
+ *
+diff --git a/drivers/tty/serial/sa1100.c b/drivers/tty/serial/sa1100.c
+index fd3d1329d48c..125558fa2ce9 100644
+--- a/drivers/tty/serial/sa1100.c
++++ b/drivers/tty/serial/sa1100.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for SA11x0 serial ports
+ *
+diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
+index 57baa84ccf86..9a30b12ac352 100644
+--- a/drivers/tty/serial/samsung.c
++++ b/drivers/tty/serial/samsung.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Driver core for Samsung SoC onboard UARTs.
+ *
+diff --git a/drivers/tty/serial/samsung.h b/drivers/tty/serial/samsung.h
+index 965199b6c16f..b0461c096d0a 100644
+--- a/drivers/tty/serial/samsung.h
++++ b/drivers/tty/serial/samsung.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ #ifndef __SAMSUNG_H
+ #define __SAMSUNG_H
+
+diff --git a/drivers/tty/serial/sb1250-duart.c b/drivers/tty/serial/sb1250-duart.c
+index 041625cc24bb..f3d5b4ebb9d5 100644
+--- a/drivers/tty/serial/sb1250-duart.c
++++ b/drivers/tty/serial/sb1250-duart.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Support for the asynchronous serial interface (DUART) included
+ * in the BCM1250 and derived System-On-a-Chip (SOC) devices.
+diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c
+index ca54ce074a5f..f1e216e714ee 100644
+--- a/drivers/tty/serial/sc16is7xx.c
++++ b/drivers/tty/serial/sc16is7xx.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * SC16IS7xx tty serial driver - Copyright (C) 2014 GridPoint
+ * Author: Jon Ringle <jringle@gridpoint.com>
+diff --git a/drivers/tty/serial/sccnxp.c b/drivers/tty/serial/sccnxp.c
+index b9c7a904c1ea..8c580d7dd2fe 100644
+--- a/drivers/tty/serial/sccnxp.c
++++ b/drivers/tty/serial/sccnxp.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * NXP (Philips) SCC+++(SCN+++) serial driver
+ *
+diff --git a/drivers/tty/serial/serial-tegra.c b/drivers/tty/serial/serial-tegra.c
+index cf9b736f26f8..fae65e76a9f3 100644
+--- a/drivers/tty/serial/serial-tegra.c
++++ b/drivers/tty/serial/serial-tegra.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * serial_tegra.c
+ *
+diff --git a/drivers/tty/serial/serial_core.c b/drivers/tty/serial/serial_core.c
+index 6db8844ef3ec..1cd0cb292ff9 100644
+--- a/drivers/tty/serial/serial_core.c
++++ b/drivers/tty/serial/serial_core.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver core for serial ports
+ *
+diff --git a/drivers/tty/serial/serial_ks8695.c b/drivers/tty/serial/serial_ks8695.c
+index 57f152394af5..9a894e899876 100644
+--- a/drivers/tty/serial/serial_ks8695.c
++++ b/drivers/tty/serial/serial_ks8695.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for KS8695 serial ports
+ *
+diff --git a/drivers/tty/serial/serial_mctrl_gpio.c b/drivers/tty/serial/serial_mctrl_gpio.c
+index d2da6aa7f27d..302dda18fcbd 100644
+--- a/drivers/tty/serial/serial_mctrl_gpio.c
++++ b/drivers/tty/serial/serial_mctrl_gpio.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Helpers for controlling modem lines via GPIO
+ *
+diff --git a/drivers/tty/serial/serial_mctrl_gpio.h b/drivers/tty/serial/serial_mctrl_gpio.h
+index fa000bcff217..219eba0223bb 100644
+--- a/drivers/tty/serial/serial_mctrl_gpio.h
++++ b/drivers/tty/serial/serial_mctrl_gpio.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Helpers for controlling modem lines via GPIO
+ *
+diff --git a/drivers/tty/serial/serial_txx9.c b/drivers/tty/serial/serial_txx9.c
+index f80fead6c5fc..256c61d1c6a6 100644
+--- a/drivers/tty/serial/serial_txx9.c
++++ b/drivers/tty/serial/serial_txx9.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Derived from many drivers using generic_serial interface,
+ * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
+diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
+index 8bc8fe2b75f7..eae806bd3555 100644
+--- a/drivers/tty/serial/sh-sci.c
++++ b/drivers/tty/serial/sh-sci.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
+ *
+diff --git a/drivers/tty/serial/sirfsoc_uart.c b/drivers/tty/serial/sirfsoc_uart.c
+index 684cb8dd8050..3e3ea07c54c0 100644
+--- a/drivers/tty/serial/sirfsoc_uart.c
++++ b/drivers/tty/serial/sirfsoc_uart.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for CSR SiRFprimaII onboard UARTs.
+ *
+diff --git a/drivers/tty/serial/sirfsoc_uart.h b/drivers/tty/serial/sirfsoc_uart.h
+index 43756bd9111c..6d6251526631 100644
+--- a/drivers/tty/serial/sirfsoc_uart.h
++++ b/drivers/tty/serial/sirfsoc_uart.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Drivers for CSR SiRFprimaII onboard UARTs.
+ *
+diff --git a/drivers/tty/serial/sprd_serial.c b/drivers/tty/serial/sprd_serial.c
+index e902494ebbd5..a06d50f52ea8 100644
+--- a/drivers/tty/serial/sprd_serial.c
++++ b/drivers/tty/serial/sprd_serial.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2012-2015 Spreadtrum Communications Inc.
+ *
+diff --git a/drivers/tty/serial/st-asc.c b/drivers/tty/serial/st-asc.c
+index b313a792b149..1f51eef68c85 100644
+--- a/drivers/tty/serial/st-asc.c
++++ b/drivers/tty/serial/st-asc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * st-asc.c: ST Asynchronous serial controller (ASC) driver
+ *
+diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
+index 03a583264d9e..007ad0274ed0 100644
+--- a/drivers/tty/serial/stm32-usart.c
++++ b/drivers/tty/serial/stm32-usart.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) Maxime Coquelin 2015
+ * Copyright (C) STMicroelectronics SA 2017
+diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
+index ffc0c5285e51..174be6141cef 100644
+--- a/drivers/tty/serial/stm32-usart.h
++++ b/drivers/tty/serial/stm32-usart.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) Maxime Coquelin 2015
+ * Copyright (C) STMicroelectronics SA 2017
+diff --git a/drivers/tty/serial/suncore.c b/drivers/tty/serial/suncore.c
+index 127472bd6a7c..70a4ea4eaa6e 100644
+--- a/drivers/tty/serial/suncore.c
++++ b/drivers/tty/serial/suncore.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /* suncore.c
+ *
+ * Common SUN serial routines. Based entirely
+diff --git a/drivers/tty/serial/sunhv.c b/drivers/tty/serial/sunhv.c
+index 46e46894e918..63e34d868de8 100644
+--- a/drivers/tty/serial/sunhv.c
++++ b/drivers/tty/serial/sunhv.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /* sunhv.c: Serial driver for SUN4V hypervisor console.
+ *
+ * Copyright (C) 2006, 2007 David S. Miller (davem@davemloft.net)
+diff --git a/drivers/tty/serial/sunsab.c b/drivers/tty/serial/sunsab.c
+index 653a076d89d3..b93d0225f8c9 100644
+--- a/drivers/tty/serial/sunsab.c
++++ b/drivers/tty/serial/sunsab.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /* sunsab.c: ASYNC Driver for the SIEMENS SAB82532 DUSCC.
+ *
+ * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
+diff --git a/drivers/tty/serial/sunsu.c b/drivers/tty/serial/sunsu.c
+index 95d34d7565c9..6cf3e9b0728f 100644
+--- a/drivers/tty/serial/sunsu.c
++++ b/drivers/tty/serial/sunsu.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
+ *
+diff --git a/drivers/tty/serial/sunzilog.c b/drivers/tty/serial/sunzilog.c
+index 252cea49c068..bc7af8b08a72 100644
+--- a/drivers/tty/serial/sunzilog.c
++++ b/drivers/tty/serial/sunzilog.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /* sunzilog.c: Zilog serial driver for Sparc systems.
+ *
+ * Driver for Zilog serial chips found on Sun workstations and
+diff --git a/drivers/tty/serial/tilegx.c b/drivers/tty/serial/tilegx.c
+index 453215f5420d..311eea391f57 100644
+--- a/drivers/tty/serial/tilegx.c
++++ b/drivers/tty/serial/tilegx.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright 2013 Tilera Corporation. All Rights Reserved.
+ *
+diff --git a/drivers/tty/serial/timbuart.c b/drivers/tty/serial/timbuart.c
+index 5da7fe40e391..cdbc23fc85e3 100644
+--- a/drivers/tty/serial/timbuart.c
++++ b/drivers/tty/serial/timbuart.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * timbuart.c timberdale FPGA UART driver
+ * Copyright (c) 2009 Intel Corporation
+diff --git a/drivers/tty/serial/timbuart.h b/drivers/tty/serial/timbuart.h
+index 7e566766bc43..6c642e99abcf 100644
+--- a/drivers/tty/serial/timbuart.h
++++ b/drivers/tty/serial/timbuart.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * timbuart.c timberdale FPGA GPIO driver
+ * Copyright (c) 2009 Intel Corporation
+diff --git a/drivers/tty/serial/uartlite.c b/drivers/tty/serial/uartlite.c
+index c9b8d702dadc..5bf19bca480d 100644
+--- a/drivers/tty/serial/uartlite.c
++++ b/drivers/tty/serial/uartlite.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * uartlite.c: Serial driver for Xilinx uartlite serial controller
+ *
+diff --git a/drivers/tty/serial/ucc_uart.c b/drivers/tty/serial/ucc_uart.c
+index 55b702775786..b01772712c1d 100644
+--- a/drivers/tty/serial/ucc_uart.c
++++ b/drivers/tty/serial/ucc_uart.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Freescale QUICC Engine UART device driver
+ *
+diff --git a/drivers/tty/serial/vr41xx_siu.c b/drivers/tty/serial/vr41xx_siu.c
+index 439057e8107a..fc100ea7eded 100644
+--- a/drivers/tty/serial/vr41xx_siu.c
++++ b/drivers/tty/serial/vr41xx_siu.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for NEC VR4100 series Serial Interface Unit.
+ *
+diff --git a/drivers/tty/serial/vt8500_serial.c b/drivers/tty/serial/vt8500_serial.c
+index 435a6f3260be..334f0f4e20f5 100644
+--- a/drivers/tty/serial/vt8500_serial.c
++++ b/drivers/tty/serial/vt8500_serial.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
+ *
+diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
+index 21c35ad72b99..09926355b7f2 100644
+--- a/drivers/tty/serial/xilinx_uartps.c
++++ b/drivers/tty/serial/xilinx_uartps.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Cadence UART driver (found in Xilinx Zynq)
+ *
+diff --git a/drivers/tty/serial/zs.c b/drivers/tty/serial/zs.c
+index d32bd499d684..b03d3e458ea2 100644
+--- a/drivers/tty/serial/zs.c
++++ b/drivers/tty/serial/zs.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * zs.c: Serial port driver for IOASIC DECstations.
+ *
+diff --git a/drivers/tty/synclink.c b/drivers/tty/synclink.c
+index 3be981101297..5c930835e8d1 100644
+--- a/drivers/tty/synclink.c
++++ b/drivers/tty/synclink.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * $Id: synclink.c,v 4.38 2005/11/07 16:30:34 paulkf Exp $
+ *
+diff --git a/drivers/tty/synclink_gt.c b/drivers/tty/synclink_gt.c
+index 636b8ae29b46..da9f2e56ee50 100644
+--- a/drivers/tty/synclink_gt.c
++++ b/drivers/tty/synclink_gt.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * Device driver for Microgate SyncLink GT serial adapters.
+ *
+diff --git a/drivers/tty/synclinkmp.c b/drivers/tty/synclinkmp.c
+index 4fed9e7b281f..4cc73be504e3 100644
+--- a/drivers/tty/synclinkmp.c
++++ b/drivers/tty/synclinkmp.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * $Id: synclinkmp.c,v 4.38 2005/07/15 13:29:44 paulkf Exp $
+ *
+diff --git a/drivers/tty/tty_audit.c b/drivers/tty/tty_audit.c
+index df2d735338e2..30b92c461dea 100644
+--- a/drivers/tty/tty_audit.c
++++ b/drivers/tty/tty_audit.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Creating audit events from TTY input.
+ *
+diff --git a/drivers/tty/tty_baudrate.c b/drivers/tty/tty_baudrate.c
+index 5c33fd25676d..6ff8cdfc9d2a 100644
+--- a/drivers/tty/tty_baudrate.c
++++ b/drivers/tty/tty_baudrate.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
+ */
+diff --git a/drivers/tty/tty_buffer.c b/drivers/tty/tty_buffer.c
+index 677fa99b7747..c996b6859c5e 100644
+--- a/drivers/tty/tty_buffer.c
++++ b/drivers/tty/tty_buffer.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Tty buffer allocation management
+ */
+diff --git a/drivers/tty/tty_io.c b/drivers/tty/tty_io.c
+index 562d31073f9a..495686cd0086 100644
+--- a/drivers/tty/tty_io.c
++++ b/drivers/tty/tty_io.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 1991, 1992 Linus Torvalds
+ */
+diff --git a/drivers/tty/tty_ioctl.c b/drivers/tty/tty_ioctl.c
+index efa96e6c4c1b..d9b561d89432 100644
+--- a/drivers/tty/tty_ioctl.c
++++ b/drivers/tty/tty_ioctl.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
+ *
+diff --git a/drivers/tty/tty_jobctrl.c b/drivers/tty/tty_jobctrl.c
+index e7032309ee87..c4ecd66fafef 100644
+--- a/drivers/tty/tty_jobctrl.c
++++ b/drivers/tty/tty_jobctrl.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 1991, 1992 Linus Torvalds
+ */
+diff --git a/drivers/tty/tty_ldisc.c b/drivers/tty/tty_ldisc.c
+index ca656ef8de64..0fd18f5fa67d 100644
+--- a/drivers/tty/tty_ldisc.c
++++ b/drivers/tty/tty_ldisc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ #include <linux/types.h>
+ #include <linux/errno.h>
+ #include <linux/kmod.h>
+diff --git a/drivers/tty/tty_ldsem.c b/drivers/tty/tty_ldsem.c
+index 52b7baef4f7a..3b403406d6f3 100644
+--- a/drivers/tty/tty_ldsem.c
++++ b/drivers/tty/tty_ldsem.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Ldisc rw semaphore
+ *
+diff --git a/drivers/tty/tty_port.c b/drivers/tty/tty_port.c
+index 6b137194069f..52be647c3a74 100644
+--- a/drivers/tty/tty_port.c
++++ b/drivers/tty/tty_port.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Tty port functions
+ */
+diff --git a/drivers/tty/vt/consolemap.c b/drivers/tty/vt/consolemap.c
+index a5f88cf0f61d..722a6690c70d 100644
+--- a/drivers/tty/vt/consolemap.c
++++ b/drivers/tty/vt/consolemap.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * consolemap.c
+ *
+diff --git a/drivers/tty/vt/keyboard.c b/drivers/tty/vt/keyboard.c
+index f4166263bb3a..749e5a5521e6 100644
+--- a/drivers/tty/vt/keyboard.c
++++ b/drivers/tty/vt/keyboard.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Written for linux by Johan Myreen as a translation from
+ * the assembly version by Linus (with diacriticals added)
+diff --git a/drivers/tty/vt/vt.c b/drivers/tty/vt/vt.c
+index e77421e7bf46..984a56b697db 100644
+--- a/drivers/tty/vt/vt.c
++++ b/drivers/tty/vt/vt.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 1991, 1992 Linus Torvalds
+ */
+--
+2.19.0
+
diff --git a/patches/0167-tty-serial-Remove-redundant-license-text.patch b/patches/0167-tty-serial-Remove-redundant-license-text.patch
new file mode 100644
index 0000000..d548ffd
--- /dev/null
+++ b/patches/0167-tty-serial-Remove-redundant-license-text.patch
@@ -0,0 +1,2348 @@
+From 7ac4fed00d0879a50ab71c1607f830d61113dccd Mon Sep 17 00:00:00 2001
+From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Date: Mon, 6 Nov 2017 18:11:52 +0100
+Subject: [PATCH 0167/1795] tty: serial: Remove redundant license text
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Now that the SPDX tag is in all tty files, that identifies the license
+in a specific and legally-defined manner. So the extra GPL text wording
+can be removed as it is no longer needed at all.
+
+This is done on a quest to remove the 700+ different ways that files in
+the kernel describe the GPL license text. And there's unneeded stuff
+like the address (sometimes incorrect) for the FSF which is never
+needed.
+
+No copyright headers or other non-license-description text was removed.
+
+Cc: Jiri Slaby <jslaby@suse.com>
+Cc: Eric Anholt <eric@anholt.net>
+Cc: Stefan Wahren <stefan.wahren@i2se.com>
+Cc: Florian Fainelli <f.fainelli@gmail.com>
+Cc: Ray Jui <rjui@broadcom.com>
+Cc: Scott Branden <sbranden@broadcom.com>
+Cc: bcm-kernel-feedback-list@broadcom.com
+Cc: "James E.J. Bottomley" <jejb@parisc-linux.org>
+Cc: Helge Deller <deller@gmx.de>
+Cc: Joachim Eastwood <manabian@gmail.com>
+Cc: Matthias Brugger <matthias.bgg@gmail.com>
+Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
+Cc: Tobias Klauser <tklauser@distanz.ch>
+Cc: Russell King <linux@armlinux.org.uk>
+Cc: Vineet Gupta <vgupta@synopsys.com>
+Cc: Richard Genoud <richard.genoud@gmail.com>
+Cc: Alexander Shiyan <shc_work@mail.ru>
+Cc: Baruch Siach <baruch@tkos.co.il>
+Cc: Pat Gefre <pfg@sgi.com>
+Cc: "Guilherme G. Piccoli" <gpiccoli@linux.vnet.ibm.com>
+Cc: Jason Wessel <jason.wessel@windriver.com>
+Cc: Vladimir Zapolskiy <vz@mleia.com>
+Cc: Sylvain Lemieux <slemieux.tyco@gmail.com>
+Cc: Carlo Caione <carlo@caione.org>
+Cc: Kevin Hilman <khilman@baylibre.com>
+Cc: Liviu Dudau <liviu.dudau@arm.com>
+Cc: Sudeep Holla <sudeep.holla@arm.com>
+Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
+Cc: Andy Gross <andy.gross@linaro.org>
+Cc: David Brown <david.brown@linaro.org>
+Cc: "Andreas Färber" <afaerber@suse.de>
+Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
+Cc: Paul Mackerras <paulus@samba.org>
+Cc: Michael Ellerman <mpe@ellerman.id.au>
+Cc: Kevin Cernekee <cernekee@gmail.com>
+Cc: Laxman Dewangan <ldewangan@nvidia.com>
+Cc: Thierry Reding <thierry.reding@gmail.com>
+Cc: Jonathan Hunter <jonathanh@nvidia.com>
+Cc: Barry Song <baohua@kernel.org>
+Cc: Patrice Chotard <patrice.chotard@st.com>
+Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
+Cc: Alexandre Torgue <alexandre.torgue@st.com>
+Cc: Chris Metcalf <cmetcalf@mellanox.com>
+Cc: Peter Korsgaard <jacmet@sunsite.dk>
+Cc: Timur Tabi <timur@tabi.org>
+Cc: Tony Prisk <linux@prisktech.co.nz>
+Cc: Michal Simek <michal.simek@xilinx.com>
+Cc: "Sören Brinkmann" <soren.brinkmann@xilinx.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 4793f2ebff1c890386a514998606205a2948011c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/tty/serial/8250/8250.h | 5 -----
+ drivers/tty/serial/8250/8250_accent.c | 4 ----
+ drivers/tty/serial/8250/8250_acorn.c | 4 ----
+ drivers/tty/serial/8250/8250_aspeed_vuart.c | 5 -----
+ drivers/tty/serial/8250/8250_bcm2835aux.c | 5 -----
+ drivers/tty/serial/8250/8250_boca.c | 4 ----
+ drivers/tty/serial/8250/8250_core.c | 5 -----
+ drivers/tty/serial/8250/8250_dma.c | 5 -----
+ drivers/tty/serial/8250/8250_dw.c | 5 -----
+ drivers/tty/serial/8250/8250_early.c | 4 ----
+ drivers/tty/serial/8250/8250_em.c | 13 -------------
+ drivers/tty/serial/8250/8250_exar.c | 4 ----
+ drivers/tty/serial/8250/8250_exar_st16c554.c | 4 ----
+ drivers/tty/serial/8250/8250_fintek.c | 5 -----
+ drivers/tty/serial/8250/8250_fourport.c | 4 ----
+ drivers/tty/serial/8250/8250_fsl.c | 4 ----
+ drivers/tty/serial/8250/8250_gsc.c | 5 -----
+ drivers/tty/serial/8250/8250_hub6.c | 4 ----
+ drivers/tty/serial/8250/8250_ingenic.c | 9 ---------
+ drivers/tty/serial/8250/8250_lpc18xx.c | 5 -----
+ drivers/tty/serial/8250/8250_lpss.c | 4 ----
+ drivers/tty/serial/8250/8250_mid.c | 4 ----
+ drivers/tty/serial/8250/8250_moxa.c | 4 ----
+ drivers/tty/serial/8250/8250_mtk.c | 10 ----------
+ drivers/tty/serial/8250/8250_of.c | 6 ------
+ drivers/tty/serial/8250/8250_pci.c | 4 ----
+ drivers/tty/serial/8250/8250_pnp.c | 4 ----
+ drivers/tty/serial/8250/8250_port.c | 5 -----
+ drivers/tty/serial/8250/8250_pxa.c | 6 ------
+ drivers/tty/serial/8250/8250_uniphier.c | 10 ----------
+ drivers/tty/serial/altera_jtaguart.c | 5 -----
+ drivers/tty/serial/altera_uart.c | 5 -----
+ drivers/tty/serial/amba-pl010.c | 14 --------------
+ drivers/tty/serial/amba-pl011.c | 14 --------------
+ drivers/tty/serial/ar933x_uart.c | 4 ----
+ drivers/tty/serial/arc_uart.c | 4 ----
+ drivers/tty/serial/atmel_serial.c | 15 ---------------
+ drivers/tty/serial/atmel_serial.h | 5 -----
+ drivers/tty/serial/bcm63xx_uart.c | 4 ----
+ drivers/tty/serial/bfin_sport_uart.c | 2 --
+ drivers/tty/serial/bfin_sport_uart.h | 2 --
+ drivers/tty/serial/bfin_uart.c | 2 --
+ drivers/tty/serial/clps711x.c | 5 -----
+ drivers/tty/serial/cpm_uart/cpm_uart.h | 5 -----
+ drivers/tty/serial/cpm_uart/cpm_uart_core.c | 15 ---------------
+ drivers/tty/serial/cpm_uart/cpm_uart_cpm1.c | 15 ---------------
+ drivers/tty/serial/cpm_uart/cpm_uart_cpm2.c | 15 ---------------
+ drivers/tty/serial/digicolor-usart.c | 5 -----
+ drivers/tty/serial/earlycon-arm-semihost.c | 12 ------------
+ drivers/tty/serial/earlycon.c | 4 ----
+ drivers/tty/serial/fsl_lpuart.c | 5 -----
+ drivers/tty/serial/icom.c | 15 ---------------
+ drivers/tty/serial/icom.h | 14 --------------
+ drivers/tty/serial/ifx6x60.c | 14 --------------
+ drivers/tty/serial/ifx6x60.h | 17 -----------------
+ drivers/tty/serial/imx.c | 10 ----------
+ drivers/tty/serial/ioc3_serial.c | 4 ----
+ drivers/tty/serial/ioc4_serial.c | 4 ----
+ drivers/tty/serial/jsm/jsm.h | 10 ----------
+ drivers/tty/serial/jsm/jsm_cls.c | 10 ----------
+ drivers/tty/serial/jsm/jsm_driver.c | 10 ----------
+ drivers/tty/serial/jsm/jsm_neo.c | 10 ----------
+ drivers/tty/serial/jsm/jsm_tty.c | 10 ----------
+ drivers/tty/serial/kgdb_nmi.c | 4 ----
+ drivers/tty/serial/kgdboc.c | 4 ----
+ drivers/tty/serial/lantiq.c | 13 -------------
+ drivers/tty/serial/lpc32xx_hs.c | 10 ----------
+ drivers/tty/serial/m32r_sio.c | 5 -----
+ drivers/tty/serial/m32r_sio_reg.h | 3 ---
+ drivers/tty/serial/max3100.c | 6 ------
+ drivers/tty/serial/max310x.c | 5 -----
+ drivers/tty/serial/mcf.c | 5 -----
+ drivers/tty/serial/men_z135_uart.c | 4 ----
+ drivers/tty/serial/meson_uart.c | 10 ----------
+ drivers/tty/serial/mpc52xx_uart.c | 4 ----
+ drivers/tty/serial/mps2-uart.c | 4 ----
+ drivers/tty/serial/mpsc.c | 5 +----
+ drivers/tty/serial/msm_serial.c | 9 ---------
+ drivers/tty/serial/mux.c | 5 -----
+ drivers/tty/serial/mvebu-uart.c | 12 ------------
+ drivers/tty/serial/mxs-auart.c | 4 ----
+ drivers/tty/serial/netx-serial.c | 13 -------------
+ drivers/tty/serial/omap-serial.c | 5 -----
+ drivers/tty/serial/owl-uart.c | 13 -------------
+ drivers/tty/serial/pch_uart.c | 13 -------------
+ drivers/tty/serial/pic32_uart.c | 2 --
+ drivers/tty/serial/pic32_uart.h | 2 --
+ drivers/tty/serial/pmac_zilog.c | 14 --------------
+ drivers/tty/serial/pnx8xxx_uart.c | 5 -----
+ drivers/tty/serial/pxa.c | 5 -----
+ drivers/tty/serial/rp2.c | 4 ----
+ drivers/tty/serial/sa1100.c | 14 --------------
+ drivers/tty/serial/samsung.c | 4 ----
+ drivers/tty/serial/samsung.h | 4 ----
+ drivers/tty/serial/sb1250-duart.c | 5 -----
+ drivers/tty/serial/sc16is7xx.c | 6 ------
+ drivers/tty/serial/sccnxp.c | 5 -----
+ drivers/tty/serial/serial-tegra.c | 12 ------------
+ drivers/tty/serial/serial_core.c | 14 --------------
+ drivers/tty/serial/serial_ks8695.c | 6 ------
+ drivers/tty/serial/serial_mctrl_gpio.c | 10 ----------
+ drivers/tty/serial/serial_mctrl_gpio.h | 11 -----------
+ drivers/tty/serial/serial_txx9.c | 4 ----
+ drivers/tty/serial/sh-sci.c | 4 ----
+ drivers/tty/serial/sirfsoc_uart.c | 2 --
+ drivers/tty/serial/sirfsoc_uart.h | 2 --
+ drivers/tty/serial/sn_console.c | 19 -------------------
+ drivers/tty/serial/sprd_serial.c | 9 ---------
+ drivers/tty/serial/st-asc.c | 6 ------
+ drivers/tty/serial/stm32-usart.c | 1 -
+ drivers/tty/serial/stm32-usart.h | 1 -
+ drivers/tty/serial/tilegx.c | 10 ----------
+ drivers/tty/serial/timbuart.c | 13 -------------
+ drivers/tty/serial/timbuart.h | 13 -------------
+ drivers/tty/serial/uartlite.c | 4 ----
+ drivers/tty/serial/ucc_uart.c | 5 +----
+ drivers/tty/serial/vr41xx_siu.c | 14 --------------
+ drivers/tty/serial/vt8500_serial.c | 9 ---------
+ drivers/tty/serial/xilinx_uartps.c | 6 ------
+ 119 files changed, 2 insertions(+), 844 deletions(-)
+
+diff --git a/drivers/tty/serial/8250/8250.h b/drivers/tty/serial/8250/8250.h
+index 36e9ae190fc0..ebfb0bd5bef5 100644
+--- a/drivers/tty/serial/8250/8250.h
++++ b/drivers/tty/serial/8250/8250.h
+@@ -5,11 +5,6 @@
+ * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
+ *
+ * Copyright (C) 2001 Russell King.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ #include <linux/serial_8250.h>
+diff --git a/drivers/tty/serial/8250/8250_accent.c b/drivers/tty/serial/8250/8250_accent.c
+index 2c11bc1f49c2..1691f1a57f89 100644
+--- a/drivers/tty/serial/8250/8250_accent.c
++++ b/drivers/tty/serial/8250/8250_accent.c
+@@ -2,10 +2,6 @@
+ /*
+ * Copyright (C) 2005 Russell King.
+ * Data taken from include/asm-i386/serial.h
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+ */
+ #include <linux/module.h>
+ #include <linux/init.h>
+diff --git a/drivers/tty/serial/8250/8250_acorn.c b/drivers/tty/serial/8250/8250_acorn.c
+index 5395343fcf15..758c4aa203ab 100644
+--- a/drivers/tty/serial/8250/8250_acorn.c
++++ b/drivers/tty/serial/8250/8250_acorn.c
+@@ -3,10 +3,6 @@
+ * linux/drivers/serial/acorn.c
+ *
+ * Copyright (C) 1996-2003 Russell King.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+ */
+ #include <linux/module.h>
+ #include <linux/types.h>
+diff --git a/drivers/tty/serial/8250/8250_aspeed_vuart.c b/drivers/tty/serial/8250/8250_aspeed_vuart.c
+index c468bcc4e638..74a408d9db24 100644
+--- a/drivers/tty/serial/8250/8250_aspeed_vuart.c
++++ b/drivers/tty/serial/8250/8250_aspeed_vuart.c
+@@ -4,11 +4,6 @@
+ *
+ * Copyright (C) 2016 Jeremy Kerr <jk@ozlabs.org>, IBM Corp.
+ * Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
+- *
+- * This program is free software; you can redistribute it and/or
+- * modify it under the terms of the GNU General Public License
+- * as published by the Free Software Foundation; either version
+- * 2 of the License, or (at your option) any later version.
+ */
+ #include <linux/device.h>
+ #include <linux/module.h>
+diff --git a/drivers/tty/serial/8250/8250_bcm2835aux.c b/drivers/tty/serial/8250/8250_bcm2835aux.c
+index 242ec1883768..bd53661103eb 100644
+--- a/drivers/tty/serial/8250/8250_bcm2835aux.c
++++ b/drivers/tty/serial/8250/8250_bcm2835aux.c
+@@ -6,11 +6,6 @@
+ *
+ * Based on 8250_lpc18xx.c:
+ * Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- *
+ */
+
+ #include <linux/clk.h>
+diff --git a/drivers/tty/serial/8250/8250_boca.c b/drivers/tty/serial/8250/8250_boca.c
+index 4123eb887020..a9b97c034653 100644
+--- a/drivers/tty/serial/8250/8250_boca.c
++++ b/drivers/tty/serial/8250/8250_boca.c
+@@ -2,10 +2,6 @@
+ /*
+ * Copyright (C) 2005 Russell King.
+ * Data taken from include/asm-i386/serial.h
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+ */
+ #include <linux/module.h>
+ #include <linux/init.h>
+diff --git a/drivers/tty/serial/8250/8250_core.c b/drivers/tty/serial/8250/8250_core.c
+index 3975281fd66f..1a58e3ff8201 100644
+--- a/drivers/tty/serial/8250/8250_core.c
++++ b/drivers/tty/serial/8250/8250_core.c
+@@ -12,11 +12,6 @@
+ * userspace-configurable "phantom" ports
+ * "serial8250" platform devices
+ * serial8250_register_8250_port() ports
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ #include <linux/module.h>
+diff --git a/drivers/tty/serial/8250/8250_dma.c b/drivers/tty/serial/8250/8250_dma.c
+index fe9259330886..bfa1a857f3ff 100644
+--- a/drivers/tty/serial/8250/8250_dma.c
++++ b/drivers/tty/serial/8250/8250_dma.c
+@@ -3,11 +3,6 @@
+ * 8250_dma.c - DMA Engine API support for 8250.c
+ *
+ * Copyright (C) 2013 Intel Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+ #include <linux/tty.h>
+ #include <linux/tty_flip.h>
+diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
+index e4426c3d78aa..8ea6e33f72d2 100644
+--- a/drivers/tty/serial/8250/8250_dw.c
++++ b/drivers/tty/serial/8250/8250_dw.c
+@@ -5,11 +5,6 @@
+ * Copyright 2011 Picochip, Jamie Iles.
+ * Copyright 2013 Intel Corporation
+ *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+ * The Synopsys DesignWare 8250 has an extra feature whereby it detects if the
+ * LCR is written whilst busy. If it is, then a busy detect interrupt is
+ * raised, the LCR needs to be rewritten and the uart status register read.
+diff --git a/drivers/tty/serial/8250/8250_early.c b/drivers/tty/serial/8250/8250_early.c
+index bfa3dcc238ac..ae6a256524d8 100644
+--- a/drivers/tty/serial/8250/8250_early.c
++++ b/drivers/tty/serial/8250/8250_early.c
+@@ -5,10 +5,6 @@
+ * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
+ * Bjorn Helgaas <bjorn.helgaas@hp.com>
+ *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- *
+ * Based on the 8250.c serial driver, Copyright (C) 2001 Russell King,
+ * and on early_printk.c by Andi Kleen.
+ *
+diff --git a/drivers/tty/serial/8250/8250_em.c b/drivers/tty/serial/8250/8250_em.c
+index 36355b365c51..f6a86f2bc4e5 100644
+--- a/drivers/tty/serial/8250/8250_em.c
++++ b/drivers/tty/serial/8250/8250_em.c
+@@ -3,19 +3,6 @@
+ * Renesas Emma Mobile 8250 driver
+ *
+ * Copyright (C) 2012 Magnus Damm
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+ #include <linux/device.h>
+diff --git a/drivers/tty/serial/8250/8250_exar.c b/drivers/tty/serial/8250/8250_exar.c
+index 3268d3e27107..a951511f04cf 100644
+--- a/drivers/tty/serial/8250/8250_exar.c
++++ b/drivers/tty/serial/8250/8250_exar.c
+@@ -5,10 +5,6 @@
+ * Based on drivers/tty/serial/8250/8250_pci.c,
+ *
+ * Copyright (C) 2017 Sudip Mukherjee, All Rights Reserved.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License.
+ */
+ #include <linux/acpi.h>
+ #include <linux/dmi.h>
+diff --git a/drivers/tty/serial/8250/8250_exar_st16c554.c b/drivers/tty/serial/8250/8250_exar_st16c554.c
+index 0b1318b38cdf..933811ebfaac 100644
+--- a/drivers/tty/serial/8250/8250_exar_st16c554.c
++++ b/drivers/tty/serial/8250/8250_exar_st16c554.c
+@@ -5,10 +5,6 @@
+ *
+ * Copyright (C) 2005 Russell King.
+ * Data taken from include/asm-i386/serial.h
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+ */
+ #include <linux/module.h>
+ #include <linux/init.h>
+diff --git a/drivers/tty/serial/8250/8250_fintek.c b/drivers/tty/serial/8250/8250_fintek.c
+index 3b2ebff7bef0..3cf93cb1fd20 100644
+--- a/drivers/tty/serial/8250/8250_fintek.c
++++ b/drivers/tty/serial/8250/8250_fintek.c
+@@ -3,11 +3,6 @@
+ * Probe for F81216A LPC to 4 UART
+ *
+ * Copyright (C) 2014-2016 Ricardo Ribalda, Qtechnology A/S
+- *
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License.
+ */
+ #include <linux/module.h>
+ #include <linux/pci.h>
+diff --git a/drivers/tty/serial/8250/8250_fourport.c b/drivers/tty/serial/8250/8250_fourport.c
+index 1d8e936a18b4..3215b9b7afde 100644
+--- a/drivers/tty/serial/8250/8250_fourport.c
++++ b/drivers/tty/serial/8250/8250_fourport.c
+@@ -2,10 +2,6 @@
+ /*
+ * Copyright (C) 2005 Russell King.
+ * Data taken from include/asm-i386/serial.h
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+ */
+ #include <linux/module.h>
+ #include <linux/init.h>
+diff --git a/drivers/tty/serial/8250/8250_fsl.c b/drivers/tty/serial/8250/8250_fsl.c
+index dafe7aa081b3..6640a4c7ddd1 100644
+--- a/drivers/tty/serial/8250/8250_fsl.c
++++ b/drivers/tty/serial/8250/8250_fsl.c
+@@ -7,10 +7,6 @@
+ /*
+ * Freescale 16550 UART "driver", Copyright (C) 2011 Paul Gortmaker.
+ *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- *
+ * This isn't a full driver; it just provides an alternate IRQ
+ * handler to deal with an errata. Everything else is just
+ * using the bog standard 8250 support.
+diff --git a/drivers/tty/serial/8250/8250_gsc.c b/drivers/tty/serial/8250/8250_gsc.c
+index 8eea662d6987..0809ae2aa9b1 100644
+--- a/drivers/tty/serial/8250/8250_gsc.c
++++ b/drivers/tty/serial/8250/8250_gsc.c
+@@ -3,11 +3,6 @@
+ * Serial Device Initialisation for Lasi/Asp/Wax/Dino
+ *
+ * (c) Copyright Matthew Wilcox <willy@debian.org> 2001-2002
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ #include <linux/errno.h>
+diff --git a/drivers/tty/serial/8250/8250_hub6.c b/drivers/tty/serial/8250/8250_hub6.c
+index f75c89ec7ebc..273f59b9bca5 100644
+--- a/drivers/tty/serial/8250/8250_hub6.c
++++ b/drivers/tty/serial/8250/8250_hub6.c
+@@ -2,10 +2,6 @@
+ /*
+ * Copyright (C) 2005 Russell King.
+ * Data taken from include/asm-i386/serial.h
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+ */
+ #include <linux/module.h>
+ #include <linux/init.h>
+diff --git a/drivers/tty/serial/8250/8250_ingenic.c b/drivers/tty/serial/8250/8250_ingenic.c
+index 5c993a3af653..6af84900870e 100644
+--- a/drivers/tty/serial/8250/8250_ingenic.c
++++ b/drivers/tty/serial/8250/8250_ingenic.c
+@@ -4,15 +4,6 @@
+ * Copyright (C) 2015 Imagination Technologies
+ *
+ * Ingenic SoC UART support
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License as published by the
+- * Free Software Foundation; either version 2 of the License, or (at your
+- * option) any later version.
+- *
+- * You should have received a copy of the GNU General Public License along
+- * with this program; if not, write to the Free Software Foundation, Inc.,
+- * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+ #include <linux/clk.h>
+diff --git a/drivers/tty/serial/8250/8250_lpc18xx.c b/drivers/tty/serial/8250/8250_lpc18xx.c
+index e34011535a6a..eddf119374e1 100644
+--- a/drivers/tty/serial/8250/8250_lpc18xx.c
++++ b/drivers/tty/serial/8250/8250_lpc18xx.c
+@@ -7,11 +7,6 @@
+ * Based on 8250_mtk.c:
+ * Copyright (c) 2014 MundoReader S.L.
+ * Matthias Brugger <matthias.bgg@gmail.com>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- *
+ */
+
+ #include <linux/clk.h>
+diff --git a/drivers/tty/serial/8250/8250_lpss.c b/drivers/tty/serial/8250/8250_lpss.c
+index f4b596da0a3d..98dbc796353f 100644
+--- a/drivers/tty/serial/8250/8250_lpss.c
++++ b/drivers/tty/serial/8250/8250_lpss.c
+@@ -4,10 +4,6 @@
+ *
+ * Copyright (C) 2016 Intel Corporation
+ * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+ */
+
+ #include <linux/bitops.h>
+diff --git a/drivers/tty/serial/8250/8250_mid.c b/drivers/tty/serial/8250/8250_mid.c
+index 174a95778935..82d0a13b75cb 100644
+--- a/drivers/tty/serial/8250/8250_mid.c
++++ b/drivers/tty/serial/8250/8250_mid.c
+@@ -4,10 +4,6 @@
+ *
+ * Copyright (C) 2015 Intel Corporation
+ * Author: Heikki Krogerus <heikki.krogerus@linux.intel.com>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+ */
+
+ #include <linux/bitops.h>
+diff --git a/drivers/tty/serial/8250/8250_moxa.c b/drivers/tty/serial/8250/8250_moxa.c
+index da18dd62e608..1ee4cd94d4fa 100644
+--- a/drivers/tty/serial/8250/8250_moxa.c
++++ b/drivers/tty/serial/8250/8250_moxa.c
+@@ -3,10 +3,6 @@
+ * 8250_moxa.c - MOXA Smartio/Industio MUE multiport serial driver.
+ *
+ * Author: Mathieu OTHACEHE <m.othacehe@gmail.com>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+ */
+
+ #include <linux/module.h>
+diff --git a/drivers/tty/serial/8250/8250_mtk.c b/drivers/tty/serial/8250/8250_mtk.c
+index 1e3d983ac483..b1a3be655fb0 100644
+--- a/drivers/tty/serial/8250/8250_mtk.c
++++ b/drivers/tty/serial/8250/8250_mtk.c
+@@ -4,16 +4,6 @@
+ *
+ * Copyright (c) 2014 MundoReader S.L.
+ * Author: Matthias Brugger <matthias.bgg@gmail.com>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+ */
+ #include <linux/clk.h>
+ #include <linux/io.h>
+diff --git a/drivers/tty/serial/8250/8250_of.c b/drivers/tty/serial/8250/8250_of.c
+index 28118c5630ac..9835b1c1cbe1 100644
+--- a/drivers/tty/serial/8250/8250_of.c
++++ b/drivers/tty/serial/8250/8250_of.c
+@@ -3,12 +3,6 @@
+ * Serial Port driver for Open Firmware platform devices
+ *
+ * Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
+- *
+- * This program is free software; you can redistribute it and/or
+- * modify it under the terms of the GNU General Public License
+- * as published by the Free Software Foundation; either version
+- * 2 of the License, or (at your option) any later version.
+- *
+ */
+ #include <linux/console.h>
+ #include <linux/module.h>
+diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c
+index ead29f3c03e0..4346e21e50db 100644
+--- a/drivers/tty/serial/8250/8250_pci.c
++++ b/drivers/tty/serial/8250/8250_pci.c
+@@ -5,10 +5,6 @@
+ * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
+ *
+ * Copyright (C) 2001 Russell King, All Rights Reserved.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License.
+ */
+ #undef DEBUG
+ #include <linux/module.h>
+diff --git a/drivers/tty/serial/8250/8250_pnp.c b/drivers/tty/serial/8250/8250_pnp.c
+index b556f37b9ba9..431e69a5a6a0 100644
+--- a/drivers/tty/serial/8250/8250_pnp.c
++++ b/drivers/tty/serial/8250/8250_pnp.c
+@@ -7,10 +7,6 @@
+ * Copyright (C) 2001 Russell King, All Rights Reserved.
+ *
+ * Ported to the Linux PnP Layer - (C) Adam Belay.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License.
+ */
+ #include <linux/module.h>
+ #include <linux/pci.h>
+diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c
+index a8f760ea1282..2351fe829440 100644
+--- a/drivers/tty/serial/8250/8250_port.c
++++ b/drivers/tty/serial/8250/8250_port.c
+@@ -5,11 +5,6 @@
+ * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
+ * Split from 8250_core.c, Copyright (C) 2001 Russell King.
+ *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+ * A note about mapbase / membase
+ *
+ * mapbase is the physical address of the IO port.
+diff --git a/drivers/tty/serial/8250/8250_pxa.c b/drivers/tty/serial/8250/8250_pxa.c
+index 5ca660c04a9d..b9bcbe20a2be 100644
+--- a/drivers/tty/serial/8250/8250_pxa.c
++++ b/drivers/tty/serial/8250/8250_pxa.c
+@@ -8,12 +8,6 @@
+ * Copyright: (C) 2003 Monta Vista Software, Inc.
+ *
+ * Based on drivers/serial/8250.c by Russell King.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+ */
+
+ #include <linux/device.h>
+diff --git a/drivers/tty/serial/8250/8250_uniphier.c b/drivers/tty/serial/8250/8250_uniphier.c
+index 752fad67c3fe..28d88ccf5a0c 100644
+--- a/drivers/tty/serial/8250/8250_uniphier.c
++++ b/drivers/tty/serial/8250/8250_uniphier.c
+@@ -1,16 +1,6 @@
+ // SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+ */
+
+ #include <linux/clk.h>
+diff --git a/drivers/tty/serial/altera_jtaguart.c b/drivers/tty/serial/altera_jtaguart.c
+index ef444aff77c5..c90e503d6b57 100644
+--- a/drivers/tty/serial/altera_jtaguart.c
++++ b/drivers/tty/serial/altera_jtaguart.c
+@@ -7,11 +7,6 @@
+ * (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com>
+ * (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw>
+ * (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ #include <linux/kernel.h>
+diff --git a/drivers/tty/serial/altera_uart.c b/drivers/tty/serial/altera_uart.c
+index 69d9c2fd5f85..594f2af81fbc 100644
+--- a/drivers/tty/serial/altera_uart.c
++++ b/drivers/tty/serial/altera_uart.c
+@@ -7,11 +7,6 @@
+ * (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com>
+ * (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw>
+ * (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ #include <linux/kernel.h>
+diff --git a/drivers/tty/serial/amba-pl010.c b/drivers/tty/serial/amba-pl010.c
+index a64a20c8e28b..2c37d11726ab 100644
+--- a/drivers/tty/serial/amba-pl010.c
++++ b/drivers/tty/serial/amba-pl010.c
+@@ -7,20 +7,6 @@
+ * Copyright 1999 ARM Limited
+ * Copyright (C) 2000 Deep Blue Solutions Ltd.
+ *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+- *
+ * This is a generic driver for ARM AMBA-type serial ports. They
+ * have a lot of 16550-like features, but are not register compatible.
+ * Note that although they do have CTS, DCD and DSR inputs, they do
+diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
+index 51e7060599f7..13364e170d19 100644
+--- a/drivers/tty/serial/amba-pl011.c
++++ b/drivers/tty/serial/amba-pl011.c
+@@ -8,20 +8,6 @@
+ * Copyright (C) 2000 Deep Blue Solutions Ltd.
+ * Copyright (C) 2010 ST-Ericsson SA
+ *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+- *
+ * This is a generic driver for ARM AMBA-type serial ports. They
+ * have a lot of 16550-like features, but are not register compatible.
+ * Note that although they do have CTS, DCD and DSR inputs, they do
+diff --git a/drivers/tty/serial/ar933x_uart.c b/drivers/tty/serial/ar933x_uart.c
+index 15cd1a3ea6bf..db5df3d54818 100644
+--- a/drivers/tty/serial/ar933x_uart.c
++++ b/drivers/tty/serial/ar933x_uart.c
+@@ -5,10 +5,6 @@
+ * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License version 2 as published
+- * by the Free Software Foundation.
+ */
+
+ #include <linux/module.h>
+diff --git a/drivers/tty/serial/arc_uart.c b/drivers/tty/serial/arc_uart.c
+index 0a8b80fa09cd..d904a3a345e7 100644
+--- a/drivers/tty/serial/arc_uart.c
++++ b/drivers/tty/serial/arc_uart.c
+@@ -4,10 +4,6 @@
+ *
+ * Copyright (C) 2010-2012 Synopsys, Inc. (www.synopsys.com)
+ *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- *
+ * vineetg: July 10th 2012
+ * -Decoupled the driver from arch/arc
+ * +Using platform_get_resource() for irq/membase (thx to bfin_uart.c)
+diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
+index 6dbbecde955a..d2755fd81224 100644
+--- a/drivers/tty/serial/atmel_serial.c
++++ b/drivers/tty/serial/atmel_serial.c
+@@ -7,21 +7,6 @@
+ * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
+ *
+ * DMA support added by Chip Coldwell.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+- *
+ */
+ #include <linux/tty.h>
+ #include <linux/ioport.h>
+diff --git a/drivers/tty/serial/atmel_serial.h b/drivers/tty/serial/atmel_serial.h
+index b4e0e57a0a79..ba3a2437cde4 100644
+--- a/drivers/tty/serial/atmel_serial.h
++++ b/drivers/tty/serial/atmel_serial.h
+@@ -7,11 +7,6 @@
+ *
+ * USART registers.
+ * Based on AT91RM9200 datasheet revision E.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ #ifndef ATMEL_SERIAL_H
+diff --git a/drivers/tty/serial/bcm63xx_uart.c b/drivers/tty/serial/bcm63xx_uart.c
+index 474652d26c71..9d1b7bf7378c 100644
+--- a/drivers/tty/serial/bcm63xx_uart.c
++++ b/drivers/tty/serial/bcm63xx_uart.c
+@@ -1,9 +1,5 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /*
+- * This file is subject to the terms and conditions of the GNU General Public
+- * License. See the file "COPYING" in the main directory of this archive
+- * for more details.
+- *
+ * Derived from many drivers using generic_serial interface.
+ *
+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+diff --git a/drivers/tty/serial/bfin_sport_uart.c b/drivers/tty/serial/bfin_sport_uart.c
+index abd0f6cf1bba..704da91b106d 100644
+--- a/drivers/tty/serial/bfin_sport_uart.c
++++ b/drivers/tty/serial/bfin_sport_uart.c
+@@ -5,8 +5,6 @@
+ * Copyright 2006-2009 Analog Devices Inc.
+ *
+ * Enter bugs at http://blackfin.uclinux.org/
+- *
+- * Licensed under the GPL-2 or later.
+ */
+
+ /*
+diff --git a/drivers/tty/serial/bfin_sport_uart.h b/drivers/tty/serial/bfin_sport_uart.h
+index 6d9237bb7192..4b12f45d6580 100644
+--- a/drivers/tty/serial/bfin_sport_uart.h
++++ b/drivers/tty/serial/bfin_sport_uart.h
+@@ -5,8 +5,6 @@
+ * Copyright 2006-2008 Analog Devices Inc.
+ *
+ * Enter bugs at http://blackfin.uclinux.org/
+- *
+- * Licensed under the GPL-2 or later.
+ */
+
+ /*
+diff --git a/drivers/tty/serial/bfin_uart.c b/drivers/tty/serial/bfin_uart.c
+index 7fc639c47534..f23290267456 100644
+--- a/drivers/tty/serial/bfin_uart.c
++++ b/drivers/tty/serial/bfin_uart.c
+@@ -5,8 +5,6 @@
+ * Copyright 2006-2011 Analog Devices Inc.
+ *
+ * Enter bugs at http://blackfin.uclinux.org/
+- *
+- * Licensed under the GPL-2 or later.
+ */
+
+ #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+diff --git a/drivers/tty/serial/clps711x.c b/drivers/tty/serial/clps711x.c
+index 64d58f2765cc..98f193a83392 100644
+--- a/drivers/tty/serial/clps711x.c
++++ b/drivers/tty/serial/clps711x.c
+@@ -6,11 +6,6 @@
+ *
+ * Copyright 1999 ARM Limited
+ * Copyright (C) 2000 Deep Blue Solutions Ltd.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ #if defined(CONFIG_SERIAL_CLPS711X_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+diff --git a/drivers/tty/serial/cpm_uart/cpm_uart.h b/drivers/tty/serial/cpm_uart/cpm_uart.h
+index 79f1d1128c5a..9f175a92fb5d 100644
+--- a/drivers/tty/serial/cpm_uart/cpm_uart.h
++++ b/drivers/tty/serial/cpm_uart/cpm_uart.h
+@@ -6,11 +6,6 @@
+ *
+ * 2006 (c) MontaVista Software, Inc.
+ * Vitaly Bordug <vbordug@ru.mvista.com>
+- *
+- * This file is licensed under the terms of the GNU General Public License
+- * version 2. This program is licensed "as is" without any warranty of any
+- * kind, whether express or implied.
+- *
+ */
+ #ifndef CPM_UART_H
+ #define CPM_UART_H
+diff --git a/drivers/tty/serial/cpm_uart/cpm_uart_core.c b/drivers/tty/serial/cpm_uart/cpm_uart_core.c
+index a98d3ab37fac..24a5f05e769b 100644
+--- a/drivers/tty/serial/cpm_uart/cpm_uart_core.c
++++ b/drivers/tty/serial/cpm_uart/cpm_uart_core.c
+@@ -13,21 +13,6 @@
+ * (C) 2004 Intracom, S.A.
+ * (C) 2005-2006 MontaVista Software, Inc.
+ * Vitaly Bordug <vbordug@ru.mvista.com>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+- *
+ */
+
+ #include <linux/module.h>
+diff --git a/drivers/tty/serial/cpm_uart/cpm_uart_cpm1.c b/drivers/tty/serial/cpm_uart/cpm_uart_cpm1.c
+index 31e952fd98d0..4eba17f3d293 100644
+--- a/drivers/tty/serial/cpm_uart/cpm_uart_cpm1.c
++++ b/drivers/tty/serial/cpm_uart/cpm_uart_cpm1.c
+@@ -9,21 +9,6 @@
+ * (C) 2004 Intracom, S.A.
+ * (C) 2006 MontaVista Software, Inc.
+ * Vitaly Bordug <vbordug@ru.mvista.com>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+- *
+ */
+
+ #include <linux/module.h>
+diff --git a/drivers/tty/serial/cpm_uart/cpm_uart_cpm2.c b/drivers/tty/serial/cpm_uart/cpm_uart_cpm2.c
+index 84f7c8d32ab3..e3bff068dc3c 100644
+--- a/drivers/tty/serial/cpm_uart/cpm_uart_cpm2.c
++++ b/drivers/tty/serial/cpm_uart/cpm_uart_cpm2.c
+@@ -9,21 +9,6 @@
+ * (C) 2004 Intracom, S.A.
+ * (C) 2006 MontaVista Software, Inc.
+ * Vitaly Bordug <vbordug@ru.mvista.com>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+- *
+ */
+
+ #include <linux/module.h>
+diff --git a/drivers/tty/serial/digicolor-usart.c b/drivers/tty/serial/digicolor-usart.c
+index c38a16381ff3..f460cca139e2 100644
+--- a/drivers/tty/serial/digicolor-usart.c
++++ b/drivers/tty/serial/digicolor-usart.c
+@@ -5,11 +5,6 @@
+ * Author: Baruch Siach <baruch@tkos.co.il>
+ *
+ * Copyright (C) 2014 Paradox Innovation Ltd.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ #include <linux/module.h>
+diff --git a/drivers/tty/serial/earlycon-arm-semihost.c b/drivers/tty/serial/earlycon-arm-semihost.c
+index 84780c17a889..fa096c10b591 100644
+--- a/drivers/tty/serial/earlycon-arm-semihost.c
++++ b/drivers/tty/serial/earlycon-arm-semihost.c
+@@ -6,18 +6,6 @@
+ * Adapted for ARM and earlycon:
+ * Copyright (C) 2014 Linaro Ltd.
+ * Author: Rob Herring <robh@kernel.org>
+- *
+- * This program is free software: you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+ #include <linux/kernel.h>
+ #include <linux/console.h>
+diff --git a/drivers/tty/serial/earlycon.c b/drivers/tty/serial/earlycon.c
+index 57144c78518f..e20540dab7fb 100644
+--- a/drivers/tty/serial/earlycon.c
++++ b/drivers/tty/serial/earlycon.c
+@@ -6,10 +6,6 @@
+ * Based on 8250 earlycon:
+ * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
+ * Bjorn Helgaas <bjorn.helgaas@hp.com>
+- *
+- * This program is free software: you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+ */
+
+ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c
+index d0c072d5c709..63dc1d7669f9 100644
+--- a/drivers/tty/serial/fsl_lpuart.c
++++ b/drivers/tty/serial/fsl_lpuart.c
+@@ -3,11 +3,6 @@
+ * Freescale lpuart serial port driver
+ *
+ * Copyright 2012-2014 Freescale Semiconductor, Inc.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ #if defined(CONFIG_SERIAL_FSL_LPUART_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+diff --git a/drivers/tty/serial/icom.c b/drivers/tty/serial/icom.c
+index a8fd690fbf29..ad374f7c476d 100644
+--- a/drivers/tty/serial/icom.c
++++ b/drivers/tty/serial/icom.c
+@@ -7,21 +7,6 @@
+ * Serial device driver.
+ *
+ * Based on code from serial.c
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+- *
+ */
+ #include <linux/module.h>
+ #include <linux/kernel.h>
+diff --git a/drivers/tty/serial/icom.h b/drivers/tty/serial/icom.h
+index da6a38967d2f..8a77e739b333 100644
+--- a/drivers/tty/serial/icom.h
++++ b/drivers/tty/serial/icom.h
+@@ -5,20 +5,6 @@
+ * Copyright (C) 2001 Michael Anderson, IBM Corporation
+ *
+ * Serial device driver include file.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+ #include <linux/serial_core.h>
+diff --git a/drivers/tty/serial/ifx6x60.c b/drivers/tty/serial/ifx6x60.c
+index fe670f9fcbd9..f0d096b94c3f 100644
+--- a/drivers/tty/serial/ifx6x60.c
++++ b/drivers/tty/serial/ifx6x60.c
+@@ -11,20 +11,6 @@
+ * Copyright (C) 2009, 2010 Intel Corp
+ * Russ Gorby <russ.gorby@intel.com>
+ *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
+- * USA
+- *
+ * Driver modified by Intel from Option gtm501l_spi.c
+ *
+ * Notes
+diff --git a/drivers/tty/serial/ifx6x60.h b/drivers/tty/serial/ifx6x60.h
+index a5346e7672c0..c5a2514212ff 100644
+--- a/drivers/tty/serial/ifx6x60.h
++++ b/drivers/tty/serial/ifx6x60.h
+@@ -6,23 +6,6 @@
+ * Copyright (C) 2009, 2010 Intel Corp
+ * Jim Stanley <jim.stanley@intel.com>
+ *
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
+- * USA
+- *
+- *
+- *
+ *****************************************************************************/
+ #ifndef _IFX6X60_H
+ #define _IFX6X60_H
+diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
+index 13085ac31f05..ef39a7bb48b1 100644
+--- a/drivers/tty/serial/imx.c
++++ b/drivers/tty/serial/imx.c
+@@ -6,16 +6,6 @@
+ *
+ * Author: Sascha Hauer <sascha@saschahauer.de>
+ * Copyright (C) 2004 Pengutronix
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+ */
+
+ #if defined(CONFIG_SERIAL_IMX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+diff --git a/drivers/tty/serial/ioc3_serial.c b/drivers/tty/serial/ioc3_serial.c
+index fcc4bc85dab4..d8a1cdd6a53d 100644
+--- a/drivers/tty/serial/ioc3_serial.c
++++ b/drivers/tty/serial/ioc3_serial.c
+@@ -1,9 +1,5 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /*
+- * This file is subject to the terms and conditions of the GNU General Public
+- * License. See the file "COPYING" in the main directory of this archive
+- * for more details.
+- *
+ * Copyright (C) 2005 Silicon Graphics, Inc. All Rights Reserved.
+ */
+
+diff --git a/drivers/tty/serial/ioc4_serial.c b/drivers/tty/serial/ioc4_serial.c
+index 8804faad5294..db5b979e5a0c 100644
+--- a/drivers/tty/serial/ioc4_serial.c
++++ b/drivers/tty/serial/ioc4_serial.c
+@@ -1,9 +1,5 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /*
+- * This file is subject to the terms and conditions of the GNU General Public
+- * License. See the file "COPYING" in the main directory of this archive
+- * for more details.
+- *
+ * Copyright (C) 2003-2006 Silicon Graphics, Inc. All Rights Reserved.
+ */
+
+diff --git a/drivers/tty/serial/jsm/jsm.h b/drivers/tty/serial/jsm/jsm.h
+index 588080b05b07..7a128aaa3a66 100644
+--- a/drivers/tty/serial/jsm/jsm.h
++++ b/drivers/tty/serial/jsm/jsm.h
+@@ -4,16 +4,6 @@
+ *
+ * Copyright (C) 2004 IBM Corporation. All rights reserved.
+ *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2, or (at your option)
+- * any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
+- * implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
+- * PURPOSE. See the GNU General Public License for more details.
+- *
+ * Contact Information:
+ * Scott H Kilau <Scott_Kilau@digi.com>
+ * Wendy Xiong <wendyx@us.ibm.com>
+diff --git a/drivers/tty/serial/jsm/jsm_cls.c b/drivers/tty/serial/jsm/jsm_cls.c
+index 74793234e002..c061a7b7bd23 100644
+--- a/drivers/tty/serial/jsm/jsm_cls.c
++++ b/drivers/tty/serial/jsm/jsm_cls.c
+@@ -3,16 +3,6 @@
+ * Copyright 2003 Digi International (www.digi.com)
+ * Scott H Kilau <Scott_Kilau at digi dot com>
+ *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2, or (at your option)
+- * any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
+- * implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
+- * PURPOSE. See the GNU General Public License for more details.
+- *
+ * NOTE TO LINUX KERNEL HACKERS: DO NOT REFORMAT THIS CODE!
+ *
+ * This is shared code between Digi's CVS archive and the
+diff --git a/drivers/tty/serial/jsm/jsm_driver.c b/drivers/tty/serial/jsm/jsm_driver.c
+index 0ede8673f5be..592e51d8944e 100644
+--- a/drivers/tty/serial/jsm/jsm_driver.c
++++ b/drivers/tty/serial/jsm/jsm_driver.c
+@@ -4,16 +4,6 @@
+ *
+ * Copyright (C) 2004 IBM Corporation. All rights reserved.
+ *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2, or (at your option)
+- * any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
+- * implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
+- * PURPOSE. See the GNU General Public License for more details.
+- *
+ * Contact Information:
+ * Scott H Kilau <Scott_Kilau@digi.com>
+ * Wendy Xiong <wendyx@us.ibm.com>
+diff --git a/drivers/tty/serial/jsm/jsm_neo.c b/drivers/tty/serial/jsm/jsm_neo.c
+index b28a0a478d64..4718560b8fdc 100644
+--- a/drivers/tty/serial/jsm/jsm_neo.c
++++ b/drivers/tty/serial/jsm/jsm_neo.c
+@@ -4,16 +4,6 @@
+ *
+ * Copyright (C) 2004 IBM Corporation. All rights reserved.
+ *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2, or (at your option)
+- * any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
+- * implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
+- * PURPOSE. See the GNU General Public License for more details.
+- *
+ * Contact Information:
+ * Scott H Kilau <Scott_Kilau@digi.com>
+ * Wendy Xiong <wendyx@us.ibm.com>
+diff --git a/drivers/tty/serial/jsm/jsm_tty.c b/drivers/tty/serial/jsm/jsm_tty.c
+index 7753d5b364b5..84658ada4ad4 100644
+--- a/drivers/tty/serial/jsm/jsm_tty.c
++++ b/drivers/tty/serial/jsm/jsm_tty.c
+@@ -4,16 +4,6 @@
+ *
+ * Copyright (C) 2004 IBM Corporation. All rights reserved.
+ *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2, or (at your option)
+- * any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
+- * implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
+- * PURPOSE. See the GNU General Public License for more details.
+- *
+ * Contact Information:
+ * Scott H Kilau <Scott_Kilau@digi.com>
+ * Ananda Venkatarman <mansarov@us.ibm.com>
+diff --git a/drivers/tty/serial/kgdb_nmi.c b/drivers/tty/serial/kgdb_nmi.c
+index b908d4a24de5..ed2b03058627 100644
+--- a/drivers/tty/serial/kgdb_nmi.c
++++ b/drivers/tty/serial/kgdb_nmi.c
+@@ -7,10 +7,6 @@
+ * Colin Cross <ccross@android.com>
+ * Copyright 2012 Linaro Ltd.
+ * Anton Vorontsov <anton.vorontsov@linaro.org>
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License version 2 as published
+- * by the Free Software Foundation.
+ */
+
+ #include <linux/kernel.h>
+diff --git a/drivers/tty/serial/kgdboc.c b/drivers/tty/serial/kgdboc.c
+index 62d162ae7610..ddb46fa2d07f 100644
+--- a/drivers/tty/serial/kgdboc.c
++++ b/drivers/tty/serial/kgdboc.c
+@@ -7,10 +7,6 @@
+ * Maintainer: Jason Wessel <jason.wessel@windriver.com>
+ *
+ * 2007-2008 (c) Jason Wessel - Wind River Systems, Inc.
+- *
+- * This file is licensed under the terms of the GNU General Public
+- * License version 2. This program is licensed "as is" without any
+- * warranty of any kind, whether express or implied.
+ */
+ #include <linux/kernel.h>
+ #include <linux/ctype.h>
+diff --git a/drivers/tty/serial/lantiq.c b/drivers/tty/serial/lantiq.c
+index 868abff3db32..044128277248 100644
+--- a/drivers/tty/serial/lantiq.c
++++ b/drivers/tty/serial/lantiq.c
+@@ -2,19 +2,6 @@
+ /*
+ * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
+ *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License version 2 as published
+- * by the Free Software Foundation.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+- *
+ * Copyright (C) 2004 Infineon IFAP DC COM CPE
+ * Copyright (C) 2007 Felix Fietkau <nbd@openwrt.org>
+ * Copyright (C) 2007 John Crispin <john@phrozen.org>
+diff --git a/drivers/tty/serial/lpc32xx_hs.c b/drivers/tty/serial/lpc32xx_hs.c
+index 8b58256ec776..d1d73261575b 100644
+--- a/drivers/tty/serial/lpc32xx_hs.c
++++ b/drivers/tty/serial/lpc32xx_hs.c
+@@ -7,16 +7,6 @@
+ *
+ * Copyright (C) 2010 NXP Semiconductors
+ * Copyright (C) 2012 Roland Stigge
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+ */
+
+ #include <linux/module.h>
+diff --git a/drivers/tty/serial/m32r_sio.c b/drivers/tty/serial/m32r_sio.c
+index 1e44f2e6c5f7..44ae777ff035 100644
+--- a/drivers/tty/serial/m32r_sio.c
++++ b/drivers/tty/serial/m32r_sio.c
+@@ -9,11 +9,6 @@
+ *
+ * Copyright (C) 2001 Russell King.
+ * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ /*
+diff --git a/drivers/tty/serial/m32r_sio_reg.h b/drivers/tty/serial/m32r_sio_reg.h
+index 0fd9727edec3..6eed48828f94 100644
+--- a/drivers/tty/serial/m32r_sio_reg.h
++++ b/drivers/tty/serial/m32r_sio_reg.h
+@@ -5,9 +5,6 @@
+ * Copyright (C) 1992, 1994 by Theodore Ts'o.
+ * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
+ *
+- * Redistribution of this file is permitted under the terms of the GNU
+- * Public License (GPL)
+- *
+ * These are the UART port assignments, expressed as offsets from the base
+ * register. These assignments should hold for any serial port based on
+ * a 8250, 16450, or 16550(A).
+diff --git a/drivers/tty/serial/max3100.c b/drivers/tty/serial/max3100.c
+index d5e4a5336095..16d34fab895f 100644
+--- a/drivers/tty/serial/max3100.c
++++ b/drivers/tty/serial/max3100.c
+@@ -3,12 +3,6 @@
+ *
+ * Copyright (C) 2008 Christian Pellegrin <chripell@evolware.org>
+ *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+- *
+ * Notes: the MAX3100 doesn't provide an interrupt on CTS so we have
+ * to use polling for flow control. TX empty IRQ is unusable, since
+ * writing conf clears FIFO buffer and we cannot have this interrupt
+diff --git a/drivers/tty/serial/max310x.c b/drivers/tty/serial/max310x.c
+index bd626ec325d5..ecb6513a6505 100644
+--- a/drivers/tty/serial/max310x.c
++++ b/drivers/tty/serial/max310x.c
+@@ -7,11 +7,6 @@
+ * Based on max3100.c, by Christian Pellegrin <chripell@evolware.org>
+ * Based on max3110.c, by Feng Tang <feng.tang@intel.com>
+ * Based on max3107.c, by Aavamobile
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ #include <linux/bitops.h>
+diff --git a/drivers/tty/serial/mcf.c b/drivers/tty/serial/mcf.c
+index 9c779768bd16..7dbfb4cde124 100644
+--- a/drivers/tty/serial/mcf.c
++++ b/drivers/tty/serial/mcf.c
+@@ -5,11 +5,6 @@
+ * mcf.c -- Freescale ColdFire UART driver
+ *
+ * (C) Copyright 2003-2007, Greg Ungerer <gerg@uclinux.org>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ /****************************************************************************/
+diff --git a/drivers/tty/serial/men_z135_uart.c b/drivers/tty/serial/men_z135_uart.c
+index 9387b2c745a0..ef89534dd760 100644
+--- a/drivers/tty/serial/men_z135_uart.c
++++ b/drivers/tty/serial/men_z135_uart.c
+@@ -4,10 +4,6 @@
+ *
+ * Copyright (C) 2014 MEN Mikroelektronik GmbH (www.men.de)
+ * Author: Johannes Thumshirn <johannes.thumshirn@men.de>
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License as published by the Free
+- * Software Foundation; version 2 of the License.
+ */
+ #define pr_fmt(fmt) KBUILD_MODNAME ":" fmt
+
+diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uart.c
+index d4875ea65a53..ef714f779712 100644
+--- a/drivers/tty/serial/meson_uart.c
++++ b/drivers/tty/serial/meson_uart.c
+@@ -3,16 +3,6 @@
+ * Based on meson_uart.c, by AMLOGIC, INC.
+ *
+ * Copyright (C) 2014 Carlo Caione <carlo@caione.org>
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License version 2 as published
+- * by the Free Software Foundation.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+ */
+
+ #include <linux/clk.h>
+diff --git a/drivers/tty/serial/mpc52xx_uart.c b/drivers/tty/serial/mpc52xx_uart.c
+index 1c1febdf60ce..3a75ee08d619 100644
+--- a/drivers/tty/serial/mpc52xx_uart.c
++++ b/drivers/tty/serial/mpc52xx_uart.c
+@@ -24,10 +24,6 @@
+ * Grant Likely <grant.likely@secretlab.ca>
+ * Copyright (C) 2004-2006 Sylvain Munaut <tnt@246tNt.com>
+ * Copyright (C) 2003 MontaVista, Software, Inc.
+- *
+- * This file is licensed under the terms of the GNU General Public License
+- * version 2. This program is licensed "as is" without any warranty of any
+- * kind, whether express or implied.
+ */
+
+ #undef DEBUG
+diff --git a/drivers/tty/serial/mps2-uart.c b/drivers/tty/serial/mps2-uart.c
+index 5d789b584bc5..9f8f63719126 100644
+--- a/drivers/tty/serial/mps2-uart.c
++++ b/drivers/tty/serial/mps2-uart.c
+@@ -6,10 +6,6 @@
+ *
+ * Author: Vladimir Murzin <vladimir.murzin@arm.com>
+ *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- *
+ * TODO: support for SysRq
+ */
+
+diff --git a/drivers/tty/serial/mpsc.c b/drivers/tty/serial/mpsc.c
+index 21b28d8e3c02..1f60d6fe4ff2 100644
+--- a/drivers/tty/serial/mpsc.c
++++ b/drivers/tty/serial/mpsc.c
+@@ -11,10 +11,7 @@
+ * taken from PPCBoot (now U-Boot). Also based on drivers/serial/8250.c
+ * by Russell King.
+ *
+- * 2004 (c) MontaVista, Software, Inc. This file is licensed under
+- * the terms of the GNU General Public License version 2. This program
+- * is licensed "as is" without any warranty of any kind, whether express
+- * or implied.
++ * 2004 (c) MontaVista, Software, Inc.
+ */
+ /*
+ * The MPSC interface is much like a typical network controller's interface.
+diff --git a/drivers/tty/serial/msm_serial.c b/drivers/tty/serial/msm_serial.c
+index 76649fea8f6f..ee96cf0d0057 100644
+--- a/drivers/tty/serial/msm_serial.c
++++ b/drivers/tty/serial/msm_serial.c
+@@ -5,15 +5,6 @@
+ * Copyright (C) 2007 Google, Inc.
+ * Author: Robert Love <rlove@google.com>
+ * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+- *
+- * This software is licensed under the terms of the GNU General Public
+- * License version 2, as published by the Free Software Foundation, and
+- * may be copied, distributed, and modified under those terms.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+ */
+
+ #if defined(CONFIG_SERIAL_MSM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+diff --git a/drivers/tty/serial/mux.c b/drivers/tty/serial/mux.c
+index 44f503ea54d2..c164843bc32a 100644
+--- a/drivers/tty/serial/mux.c
++++ b/drivers/tty/serial/mux.c
+@@ -6,11 +6,6 @@
+ ** (c) Copyright 2002 Ryan Bradetich
+ ** (c) Copyright 2002 Hewlett-Packard Company
+ **
+-** This program is free software; you can redistribute it and/or modify
+-** it under the terms of the GNU General Public License as published by
+-** the Free Software Foundation; either version 2 of the License, or
+-** (at your option) any later version.
+-**
+ ** This Driver currently only supports the console (port 0) on the MUX.
+ ** Additional work will be needed on this driver to enable the full
+ ** functionality of the MUX.
+diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c
+index 09e7da6eab97..b1aff6346166 100644
+--- a/drivers/tty/serial/mvebu-uart.c
++++ b/drivers/tty/serial/mvebu-uart.c
+@@ -5,18 +5,6 @@
+ * Author: Wilson Ding <dingwei@marvell.com>
+ * Copyright (C) 2015 Marvell International Ltd.
+ * ***************************************************************************
+-* This program is free software: you can redistribute it and/or modify it
+-* under the terms of the GNU General Public License as published by the Free
+-* Software Foundation, either version 2 of the License, or any later version.
+-*
+-* This program is distributed in the hope that it will be useful,
+-* but WITHOUT ANY WARRANTY; without even the implied warranty of
+-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-* GNU General Public License for more details.
+-*
+-* You should have received a copy of the GNU General Public License
+-* along with this program. If not, see <http://www.gnu.org/licenses/>.
+-* ***************************************************************************
+ */
+
+ #include <linux/clk.h>
+diff --git a/drivers/tty/serial/mxs-auart.c b/drivers/tty/serial/mxs-auart.c
+index 588e08274233..4fefec8700b9 100644
+--- a/drivers/tty/serial/mxs-auart.c
++++ b/drivers/tty/serial/mxs-auart.c
+@@ -10,10 +10,6 @@
+ * Provide Alphascale ASM9260 support.
+ * Copyright 2008-2010 Freescale Semiconductor, Inc.
+ * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
+- *
+- * The code contained herein is licensed under the GNU General Public
+- * License. You may obtain a copy of the GNU General Public License
+- * Version 2 or later at the following locations:
+ */
+
+ #if defined(CONFIG_SERIAL_MXS_AUART_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+diff --git a/drivers/tty/serial/netx-serial.c b/drivers/tty/serial/netx-serial.c
+index 4201938e8aa3..b3556863491f 100644
+--- a/drivers/tty/serial/netx-serial.c
++++ b/drivers/tty/serial/netx-serial.c
+@@ -1,19 +1,6 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2
+- * as published by the Free Software Foundation.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+ #if defined(CONFIG_SERIAL_NETX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
+index f25544e8228d..366567ca2abb 100644
+--- a/drivers/tty/serial/omap-serial.c
++++ b/drivers/tty/serial/omap-serial.c
+@@ -9,11 +9,6 @@
+ * Govindraj R <govindraj.raja@ti.com>
+ * Thara Gopinath <thara@ti.com>
+ *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+ * Note: This driver is made separate from 8250 driver as we cannot
+ * over load 8250 driver with omap platform specific configuration for
+ * features like DMA, it makes easier to implement features like DMA and
+diff --git a/drivers/tty/serial/owl-uart.c b/drivers/tty/serial/owl-uart.c
+index 93fa3095a775..29a6dc6a8d23 100644
+--- a/drivers/tty/serial/owl-uart.c
++++ b/drivers/tty/serial/owl-uart.c
+@@ -6,19 +6,6 @@
+ * Author: Actions Semi, Inc.
+ *
+ * Copyright (c) 2016-2017 Andreas Färber
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License as published by the
+- * Free Software Foundation; either version 2 of the License, or (at your
+- * option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+ #include <linux/clk.h>
+diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c
+index e2c04a3334da..760d5dd0aada 100644
+--- a/drivers/tty/serial/pch_uart.c
++++ b/drivers/tty/serial/pch_uart.c
+@@ -1,19 +1,6 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /*
+ *Copyright (C) 2011 LAPIS Semiconductor Co., Ltd.
+- *
+- *This program is free software; you can redistribute it and/or modify
+- *it under the terms of the GNU General Public License as published by
+- *the Free Software Foundation; version 2 of the License.
+- *
+- *This program is distributed in the hope that it will be useful,
+- *but WITHOUT ANY WARRANTY; without even the implied warranty of
+- *MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- *GNU General Public License for more details.
+- *
+- *You should have received a copy of the GNU General Public License
+- *along with this program; if not, write to the Free Software
+- *Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
+ */
+ #if defined(CONFIG_SERIAL_PCH_UART_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+ #define SUPPORT_SYSRQ
+diff --git a/drivers/tty/serial/pic32_uart.c b/drivers/tty/serial/pic32_uart.c
+index 9f55c30d1aa6..fd80d999308d 100644
+--- a/drivers/tty/serial/pic32_uart.c
++++ b/drivers/tty/serial/pic32_uart.c
+@@ -6,8 +6,6 @@
+ *
+ * Authors:
+ * Sorin-Andrei Pistirica <andrei.pistirica@microchip.com>
+- *
+- * Licensed under GPLv2 or later.
+ */
+
+ #include <linux/kernel.h>
+diff --git a/drivers/tty/serial/pic32_uart.h b/drivers/tty/serial/pic32_uart.h
+index 43dc168dffd7..2f2b56927dc6 100644
+--- a/drivers/tty/serial/pic32_uart.h
++++ b/drivers/tty/serial/pic32_uart.h
+@@ -6,8 +6,6 @@
+ *
+ * Authors:
+ * Sorin-Andrei Pistirica <andrei.pistirica@microchip.com>
+- *
+- * Licensed under GPLv2 or later.
+ */
+ #ifndef __DT_PIC32_UART_H__
+ #define __DT_PIC32_UART_H__
+diff --git a/drivers/tty/serial/pmac_zilog.c b/drivers/tty/serial/pmac_zilog.c
+index 3afba70022b4..3d21790d961e 100644
+--- a/drivers/tty/serial/pmac_zilog.c
++++ b/drivers/tty/serial/pmac_zilog.c
+@@ -14,20 +14,6 @@
+ * and once done, I expect that driver to remain fairly stable in
+ * the long term, unless we change the driver model again...
+ *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+- *
+ * 2004-08-06 Harald Welte <laforge@gnumonks.org>
+ * - Enable BREAK interrupt
+ * - Add support for sysreq
+diff --git a/drivers/tty/serial/pnx8xxx_uart.c b/drivers/tty/serial/pnx8xxx_uart.c
+index a61fb04cca24..8073de35e56c 100644
+--- a/drivers/tty/serial/pnx8xxx_uart.c
++++ b/drivers/tty/serial/pnx8xxx_uart.c
+@@ -8,11 +8,6 @@
+ *
+ * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
+ * Copyright (C) 2000 Deep Blue Solutions Ltd.
+- *
+- * This file is licensed under the terms of the GNU General Public License
+- * version 2. This program is licensed "as is" without any warranty of
+- * any kind, whether express or implied.
+- *
+ */
+
+ #if defined(CONFIG_SERIAL_PNX8XXX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+diff --git a/drivers/tty/serial/pxa.c b/drivers/tty/serial/pxa.c
+index dd82ecb7c25d..baf552944d56 100644
+--- a/drivers/tty/serial/pxa.c
++++ b/drivers/tty/serial/pxa.c
+@@ -6,11 +6,6 @@
+ * Created: Feb 20, 2003
+ * Copyright: (C) 2003 Monta Vista Software, Inc.
+ *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+ * Note 1: This driver is made separate from the already too overloaded
+ * 8250.c because it needs some kirks of its own and that'll make it
+ * easier to add DMA support.
+diff --git a/drivers/tty/serial/rp2.c b/drivers/tty/serial/rp2.c
+index 2108bf34ff90..520b43b23543 100644
+--- a/drivers/tty/serial/rp2.c
++++ b/drivers/tty/serial/rp2.c
+@@ -11,10 +11,6 @@
+ *
+ * rocketport_infinity_express-linux-1.20.tar.gz
+ * Copyright (C) 2004-2011 Comtrol, Inc.
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License version 2 as published
+- * by the Free Software Foundation.
+ */
+
+ #include <linux/bitops.h>
+diff --git a/drivers/tty/serial/sa1100.c b/drivers/tty/serial/sa1100.c
+index 125558fa2ce9..82ad3e31e73a 100644
+--- a/drivers/tty/serial/sa1100.c
++++ b/drivers/tty/serial/sa1100.c
+@@ -5,20 +5,6 @@
+ * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
+ *
+ * Copyright (C) 2000 Deep Blue Solutions Ltd.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+ #if defined(CONFIG_SERIAL_SA1100_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
+index 9a30b12ac352..64e96926f1ad 100644
+--- a/drivers/tty/serial/samsung.c
++++ b/drivers/tty/serial/samsung.c
+@@ -4,10 +4,6 @@
+ *
+ * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
+ * http://armlinux.simtec.co.uk/
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+ */
+
+ /* Hote on 2410 error handling
+diff --git a/drivers/tty/serial/samsung.h b/drivers/tty/serial/samsung.h
+index b0461c096d0a..f93022113f59 100644
+--- a/drivers/tty/serial/samsung.h
++++ b/drivers/tty/serial/samsung.h
+@@ -7,10 +7,6 @@
+ *
+ * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
+ * http://armlinux.simtec.co.uk/
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+ */
+
+ #include <linux/dmaengine.h>
+diff --git a/drivers/tty/serial/sb1250-duart.c b/drivers/tty/serial/sb1250-duart.c
+index f3d5b4ebb9d5..329aced26bd8 100644
+--- a/drivers/tty/serial/sb1250-duart.c
++++ b/drivers/tty/serial/sb1250-duart.c
+@@ -10,11 +10,6 @@
+ *
+ * Copyright (c) 2000, 2001, 2002, 2003, 2004 Broadcom Corporation
+ *
+- * This program is free software; you can redistribute it and/or
+- * modify it under the terms of the GNU General Public License
+- * as published by the Free Software Foundation; either version
+- * 2 of the License, or (at your option) any later version.
+- *
+ * References:
+ *
+ * "BCM1250/BCM1125/BCM1125H User Manual", Broadcom Corporation
+diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c
+index f1e216e714ee..65792a3539d0 100644
+--- a/drivers/tty/serial/sc16is7xx.c
++++ b/drivers/tty/serial/sc16is7xx.c
+@@ -4,12 +4,6 @@
+ * Author: Jon Ringle <jringle@gridpoint.com>
+ *
+ * Based on max310x.c, by Alexander Shiyan <shc_work@mail.ru>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+ */
+
+ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+diff --git a/drivers/tty/serial/sccnxp.c b/drivers/tty/serial/sccnxp.c
+index 8c580d7dd2fe..149e1b53948f 100644
+--- a/drivers/tty/serial/sccnxp.c
++++ b/drivers/tty/serial/sccnxp.c
+@@ -5,11 +5,6 @@
+ * Copyright (C) 2012 Alexander Shiyan <shc_work@mail.ru>
+ *
+ * Based on sc26xx.c, by Thomas Bogendörfer (tsbogend@alpha.franken.de)
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ #if defined(CONFIG_SERIAL_SCCNXP_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+diff --git a/drivers/tty/serial/serial-tegra.c b/drivers/tty/serial/serial-tegra.c
+index fae65e76a9f3..af2a29cfbbe9 100644
+--- a/drivers/tty/serial/serial-tegra.c
++++ b/drivers/tty/serial/serial-tegra.c
+@@ -7,18 +7,6 @@
+ * Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Author: Laxman Dewangan <ldewangan@nvidia.com>
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms and conditions of the GNU General Public License,
+- * version 2, as published by the Free Software Foundation.
+- *
+- * This program is distributed in the hope it will be useful, but WITHOUT
+- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+- * more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+ #include <linux/clk.h>
+diff --git a/drivers/tty/serial/serial_core.c b/drivers/tty/serial/serial_core.c
+index 1cd0cb292ff9..e93df3b6092d 100644
+--- a/drivers/tty/serial/serial_core.c
++++ b/drivers/tty/serial/serial_core.c
+@@ -6,20 +6,6 @@
+ *
+ * Copyright 1999 ARM Limited
+ * Copyright (C) 2000-2001 Deep Blue Solutions Ltd.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+ #include <linux/module.h>
+ #include <linux/tty.h>
+diff --git a/drivers/tty/serial/serial_ks8695.c b/drivers/tty/serial/serial_ks8695.c
+index 9a894e899876..b461d791188c 100644
+--- a/drivers/tty/serial/serial_ks8695.c
++++ b/drivers/tty/serial/serial_ks8695.c
+@@ -5,12 +5,6 @@
+ * Based on drivers/serial/serial_amba.c, by Kam Lee.
+ *
+ * Copyright 2002-2005 Micrel Inc.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+ */
+ #include <linux/module.h>
+ #include <linux/tty.h>
+diff --git a/drivers/tty/serial/serial_mctrl_gpio.c b/drivers/tty/serial/serial_mctrl_gpio.c
+index 302dda18fcbd..1c06325beaca 100644
+--- a/drivers/tty/serial/serial_mctrl_gpio.c
++++ b/drivers/tty/serial/serial_mctrl_gpio.c
+@@ -3,16 +3,6 @@
+ * Helpers for controlling modem lines via GPIO
+ *
+ * Copyright (C) 2014 Paratronic S.A.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+ */
+
+ #include <linux/err.h>
+diff --git a/drivers/tty/serial/serial_mctrl_gpio.h b/drivers/tty/serial/serial_mctrl_gpio.h
+index 219eba0223bb..b7d3cca48ede 100644
+--- a/drivers/tty/serial/serial_mctrl_gpio.h
++++ b/drivers/tty/serial/serial_mctrl_gpio.h
+@@ -3,17 +3,6 @@
+ * Helpers for controlling modem lines via GPIO
+ *
+ * Copyright (C) 2014 Paratronic S.A.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+ */
+
+ #ifndef __SERIAL_MCTRL_GPIO__
+diff --git a/drivers/tty/serial/serial_txx9.c b/drivers/tty/serial/serial_txx9.c
+index 256c61d1c6a6..1b4008d022bf 100644
+--- a/drivers/tty/serial/serial_txx9.c
++++ b/drivers/tty/serial/serial_txx9.c
+@@ -9,10 +9,6 @@
+ * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
+ * Copyright (C) 2000-2002 Toshiba Corporation
+ *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- *
+ * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
+ */
+
+diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
+index eae806bd3555..5d33bc1a0e09 100644
+--- a/drivers/tty/serial/sh-sci.c
++++ b/drivers/tty/serial/sh-sci.c
+@@ -14,10 +14,6 @@
+ * Modified to support SecureEdge. David McCullough (2002)
+ * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
+ * Removed SH7300 support (Jul 2007).
+- *
+- * This file is subject to the terms and conditions of the GNU General Public
+- * License. See the file "COPYING" in the main directory of this archive
+- * for more details.
+ */
+ #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+ #define SUPPORT_SYSRQ
+diff --git a/drivers/tty/serial/sirfsoc_uart.c b/drivers/tty/serial/sirfsoc_uart.c
+index 3e3ea07c54c0..9925b00a9777 100644
+--- a/drivers/tty/serial/sirfsoc_uart.c
++++ b/drivers/tty/serial/sirfsoc_uart.c
+@@ -3,8 +3,6 @@
+ * Driver for CSR SiRFprimaII onboard UARTs.
+ *
+ * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
+- *
+- * Licensed under GPLv2 or later.
+ */
+
+ #include <linux/module.h>
+diff --git a/drivers/tty/serial/sirfsoc_uart.h b/drivers/tty/serial/sirfsoc_uart.h
+index 6d6251526631..004ca684d3ae 100644
+--- a/drivers/tty/serial/sirfsoc_uart.h
++++ b/drivers/tty/serial/sirfsoc_uart.h
+@@ -3,8 +3,6 @@
+ * Drivers for CSR SiRFprimaII onboard UARTs.
+ *
+ * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
+- *
+- * Licensed under GPLv2 or later.
+ */
+ #include <linux/bitops.h>
+ #include <linux/log2.h>
+diff --git a/drivers/tty/serial/sn_console.c b/drivers/tty/serial/sn_console.c
+index 9e0e6586c698..23c9d1fa5e33 100644
+--- a/drivers/tty/serial/sn_console.c
++++ b/drivers/tty/serial/sn_console.c
+@@ -8,25 +8,6 @@
+ *
+ * Copyright (c) 2004-2006 Silicon Graphics, Inc. All Rights Reserved.
+ *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of version 2 of the GNU General Public License
+- * as published by the Free Software Foundation.
+- *
+- * This program is distributed in the hope that it would be useful, but
+- * WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+- *
+- * Further, this software is distributed without any warranty that it is
+- * free of the rightful claim of any third person regarding infringement
+- * or the like. Any license provided herein, whether implied or
+- * otherwise, applies only to this software file. Patent licenses, if
+- * any, provided herein do not apply to combinations of this program with
+- * other software, or any other product whatsoever.
+- *
+- * You should have received a copy of the GNU General Public
+- * License along with this program; if not, write the Free Software
+- * Foundation, Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+- *
+ * Contact information: Silicon Graphics, Inc., 1500 Crittenden Lane,
+ * Mountain View, CA 94043, or:
+ *
+diff --git a/drivers/tty/serial/sprd_serial.c b/drivers/tty/serial/sprd_serial.c
+index a06d50f52ea8..828f1143859c 100644
+--- a/drivers/tty/serial/sprd_serial.c
++++ b/drivers/tty/serial/sprd_serial.c
+@@ -1,15 +1,6 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2012-2015 Spreadtrum Communications Inc.
+- *
+- * This software is licensed under the terms of the GNU General Public
+- * License version 2, as published by the Free Software Foundation, and
+- * may be copied, distributed, and modified under those terms.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+ */
+
+ #if defined(CONFIG_SERIAL_SPRD_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+diff --git a/drivers/tty/serial/st-asc.c b/drivers/tty/serial/st-asc.c
+index 1f51eef68c85..c763253514e9 100644
+--- a/drivers/tty/serial/st-asc.c
++++ b/drivers/tty/serial/st-asc.c
+@@ -3,12 +3,6 @@
+ * st-asc.c: ST Asynchronous serial controller (ASC) driver
+ *
+ * Copyright (C) 2003-2013 STMicroelectronics (R&D) Limited
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+ */
+
+ #if defined(CONFIG_SERIAL_ST_ASC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
+index 007ad0274ed0..f9f3da329daa 100644
+--- a/drivers/tty/serial/stm32-usart.c
++++ b/drivers/tty/serial/stm32-usart.c
+@@ -4,7 +4,6 @@
+ * Copyright (C) STMicroelectronics SA 2017
+ * Authors: Maxime Coquelin <mcoquelin.stm32@gmail.com>
+ * Gerald Baeza <gerald.baeza@st.com>
+- * License terms: GNU General Public License (GPL), version 2
+ *
+ * Inspired by st-asc.c from STMicroelectronics (c)
+ */
+diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
+index 174be6141cef..8a5ff54d0f42 100644
+--- a/drivers/tty/serial/stm32-usart.h
++++ b/drivers/tty/serial/stm32-usart.h
+@@ -4,7 +4,6 @@
+ * Copyright (C) STMicroelectronics SA 2017
+ * Authors: Maxime Coquelin <mcoquelin.stm32@gmail.com>
+ * Gerald Baeza <gerald_baeza@yahoo.fr>
+- * License terms: GNU General Public License (GPL), version 2
+ */
+
+ #define DRIVER_NAME "stm32-usart"
+diff --git a/drivers/tty/serial/tilegx.c b/drivers/tty/serial/tilegx.c
+index 311eea391f57..f0a3ae57f881 100644
+--- a/drivers/tty/serial/tilegx.c
++++ b/drivers/tty/serial/tilegx.c
+@@ -2,16 +2,6 @@
+ /*
+ * Copyright 2013 Tilera Corporation. All Rights Reserved.
+ *
+- * This program is free software; you can redistribute it and/or
+- * modify it under the terms of the GNU General Public License
+- * as published by the Free Software Foundation, version 2.
+- *
+- * This program is distributed in the hope that it will be useful, but
+- * WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+- * NON INFRINGEMENT. See the GNU General Public License for
+- * more details.
+- *
+ * TILEGx UART driver.
+ */
+
+diff --git a/drivers/tty/serial/timbuart.c b/drivers/tty/serial/timbuart.c
+index cdbc23fc85e3..19d38b504e27 100644
+--- a/drivers/tty/serial/timbuart.c
++++ b/drivers/tty/serial/timbuart.c
+@@ -2,19 +2,6 @@
+ /*
+ * timbuart.c timberdale FPGA UART driver
+ * Copyright (c) 2009 Intel Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+ /* Supports:
+diff --git a/drivers/tty/serial/timbuart.h b/drivers/tty/serial/timbuart.h
+index 6c642e99abcf..fb00b172117d 100644
+--- a/drivers/tty/serial/timbuart.h
++++ b/drivers/tty/serial/timbuart.h
+@@ -2,19 +2,6 @@
+ /*
+ * timbuart.c timberdale FPGA GPIO driver
+ * Copyright (c) 2009 Intel Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+ /* Supports:
+diff --git a/drivers/tty/serial/uartlite.c b/drivers/tty/serial/uartlite.c
+index 5bf19bca480d..67917622aaf3 100644
+--- a/drivers/tty/serial/uartlite.c
++++ b/drivers/tty/serial/uartlite.c
+@@ -4,10 +4,6 @@
+ *
+ * Copyright (C) 2006 Peter Korsgaard <jacmet@sunsite.dk>
+ * Copyright (C) 2007 Secret Lab Technologies Ltd.
+- *
+- * This file is licensed under the terms of the GNU General Public License
+- * version 2. This program is licensed "as is" without any warranty of any
+- * kind, whether express or implied.
+ */
+
+ #include <linux/platform_device.h>
+diff --git a/drivers/tty/serial/ucc_uart.c b/drivers/tty/serial/ucc_uart.c
+index b01772712c1d..2b6376e6e5ad 100644
+--- a/drivers/tty/serial/ucc_uart.c
++++ b/drivers/tty/serial/ucc_uart.c
+@@ -4,10 +4,7 @@
+ *
+ * Author: Timur Tabi <timur@freescale.com>
+ *
+- * Copyright 2007 Freescale Semiconductor, Inc. This file is licensed under
+- * the terms of the GNU General Public License version 2. This program
+- * is licensed "as is" without any warranty of any kind, whether express
+- * or implied.
++ * Copyright 2007 Freescale Semiconductor, Inc.
+ *
+ * This driver adds support for UART devices via Freescale's QUICC Engine
+ * found on some Freescale SOCs.
+diff --git a/drivers/tty/serial/vr41xx_siu.c b/drivers/tty/serial/vr41xx_siu.c
+index fc100ea7eded..6d106e33f842 100644
+--- a/drivers/tty/serial/vr41xx_siu.c
++++ b/drivers/tty/serial/vr41xx_siu.c
+@@ -5,20 +5,6 @@
+ * Copyright (C) 2004-2008 Yoichi Yuasa <yuasa@linux-mips.org>
+ *
+ * Based on drivers/serial/8250.c, by Russell King.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+ #if defined(CONFIG_SERIAL_VR41XX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+diff --git a/drivers/tty/serial/vt8500_serial.c b/drivers/tty/serial/vt8500_serial.c
+index 334f0f4e20f5..3d58e9b34553 100644
+--- a/drivers/tty/serial/vt8500_serial.c
++++ b/drivers/tty/serial/vt8500_serial.c
+@@ -5,15 +5,6 @@
+ * Based on msm_serial.c, which is:
+ * Copyright (C) 2007 Google, Inc.
+ * Author: Robert Love <rlove@google.com>
+- *
+- * This software is licensed under the terms of the GNU General Public
+- * License version 2, as published by the Free Software Foundation, and
+- * may be copied, distributed, and modified under those terms.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+ */
+
+ #if defined(CONFIG_SERIAL_VT8500_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
+index 09926355b7f2..69702d3eaf55 100644
+--- a/drivers/tty/serial/xilinx_uartps.c
++++ b/drivers/tty/serial/xilinx_uartps.c
+@@ -4,12 +4,6 @@
+ *
+ * 2011 - 2014 (C) Xilinx Inc.
+ *
+- * This program is free software; you can redistribute it
+- * and/or modify it under the terms of the GNU General Public
+- * License as published by the Free Software Foundation;
+- * either version 2 of the License, or (at your option) any
+- * later version.
+- *
+ * This driver has originally been pushed by Xilinx using a Zynq-branding. This
+ * still shows in the naming of this file, the kconfig symbols and some symbols
+ * in the code.
+--
+2.19.0
+
diff --git a/patches/0168-clocksource-drivers-sh_cmt-Use-0x3f-mask-for-SH_CMT_.patch b/patches/0168-clocksource-drivers-sh_cmt-Use-0x3f-mask-for-SH_CMT_.patch
new file mode 100644
index 0000000..d0aa59d
--- /dev/null
+++ b/patches/0168-clocksource-drivers-sh_cmt-Use-0x3f-mask-for-SH_CMT_.patch
@@ -0,0 +1,66 @@
+From fefd0395d34b151629d6cc717b62bb91206a0f73 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Mon, 18 Sep 2017 15:46:42 +0200
+Subject: [PATCH 0168/1795] clocksource/drivers/sh_cmt: Use 0x3f mask for
+ SH_CMT_48BIT case
+
+Always use 0x3f as channel mask for the SH_CMT_48BIT type of devices.
+Once this patch is applied the "renesas,channels-mask" property will
+be ignored by the driver for older devices matching SH_CMT_48BIT. In
+the future when all CMT types store channel mask in the driver then
+we will be able to deprecate and remove "renesas,channels-mask" from DTS.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+(cherry picked from commit 464eed841f54b56df35132434497235f06b154f6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/clocksource/sh_cmt.c | 14 +++++++++++---
+ 1 file changed, 11 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index e09e8bf0bb9b..c104c80424c8 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -74,6 +74,8 @@ enum sh_cmt_model {
+ struct sh_cmt_info {
+ enum sh_cmt_model model;
+
++ unsigned int channels_mask;
++
+ unsigned long width; /* 16 or 32 bit version of hardware block */
+ unsigned long overflow_bit;
+ unsigned long clear_bits;
+@@ -212,6 +214,7 @@ static const struct sh_cmt_info sh_cmt_info[] = {
+ },
+ [SH_CMT_48BIT] = {
+ .model = SH_CMT_48BIT,
++ .channels_mask = 0x3f,
+ .width = 32,
+ .overflow_bit = SH_CMT32_CMCSR_CMF,
+ .clear_bits = ~(SH_CMT32_CMCSR_CMF | SH_CMT32_CMCSR_OVF),
+@@ -966,9 +969,14 @@ static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev)
+ id = of_match_node(sh_cmt_of_table, pdev->dev.of_node);
+ cmt->info = id->data;
+
+- ret = sh_cmt_parse_dt(cmt);
+- if (ret < 0)
+- return ret;
++ /* prefer in-driver channel configuration over DT */
++ if (cmt->info->channels_mask) {
++ cmt->hw_channels = cmt->info->channels_mask;
++ } else {
++ ret = sh_cmt_parse_dt(cmt);
++ if (ret < 0)
++ return ret;
++ }
+ } else if (pdev->dev.platform_data) {
+ struct sh_timer_config *cfg = pdev->dev.platform_data;
+ const struct platform_device_id *id = pdev->id_entry;
+--
+2.19.0
+
diff --git a/patches/0169-clocksource-drivers-sh_cmt-Support-separate-R-Car-Ge.patch b/patches/0169-clocksource-drivers-sh_cmt-Support-separate-R-Car-Ge.patch
new file mode 100644
index 0000000..dc8512e
--- /dev/null
+++ b/patches/0169-clocksource-drivers-sh_cmt-Support-separate-R-Car-Ge.patch
@@ -0,0 +1,128 @@
+From 0d38d7f30c5416e258936dc2a11ccabfba61ca0f Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Mon, 18 Sep 2017 15:46:43 +0200
+Subject: [PATCH 0169/1795] clocksource/drivers/sh_cmt: Support separate R-Car
+ Gen2 CMT0/1
+
+Add support for the new R-Car Gen2 CMT0 and CMT1 bindings. Support
+for the old DT binding is still kept around, however devices using
+such binding will be treated as a low-feature CMT0 device. If users
+want to make use of CMT1-specific features then they need to update
+their DTBs. No special CMT1-specific features are however implemented
+by his patch, only DT bindings are redone as groundwork for future
+feature patches.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+(cherry picked from commit 83c79a6d8d7f4821ba0712da57f2f51326f0c447)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/clocksource/sh_cmt.c | 38 +++++++++++++++++++++++++-----------
+ 1 file changed, 27 insertions(+), 11 deletions(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index c104c80424c8..45af436483f3 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -39,16 +39,16 @@ struct sh_cmt_device;
+ * SoC but also on the particular instance. The following table lists the main
+ * characteristics of those flavours.
+ *
+- * 16B 32B 32B-F 48B 48B-2
++ * 16B 32B 32B-F 48B R-Car Gen2
+ * -----------------------------------------------------------------------------
+ * Channels 2 1/4 1 6 2/8
+ * Control Width 16 16 16 16 32
+ * Counter Width 16 32 32 32/48 32/48
+ * Shared Start/Stop Y Y Y Y N
+ *
+- * The 48-bit gen2 version has a per-channel start/stop register located in the
+- * channel registers block. All other versions have a shared start/stop register
+- * located in the global space.
++ * The r8a73a4 / R-Car Gen2 version has a per-channel start/stop register
++ * located in the channel registers block. All other versions have a shared
++ * start/stop register located in the global space.
+ *
+ * Channels are indexed from 0 to N-1 in the documentation. The channel index
+ * infers the start/stop bit position in the control register and the channel
+@@ -68,7 +68,8 @@ enum sh_cmt_model {
+ SH_CMT_32BIT,
+ SH_CMT_32BIT_FAST,
+ SH_CMT_48BIT,
+- SH_CMT_48BIT_GEN2,
++ SH_CMT0_RCAR_GEN2,
++ SH_CMT1_RCAR_GEN2,
+ };
+
+ struct sh_cmt_info {
+@@ -223,8 +224,20 @@ static const struct sh_cmt_info sh_cmt_info[] = {
+ .read_count = sh_cmt_read32,
+ .write_count = sh_cmt_write32,
+ },
+- [SH_CMT_48BIT_GEN2] = {
+- .model = SH_CMT_48BIT_GEN2,
++ [SH_CMT0_RCAR_GEN2] = {
++ .model = SH_CMT0_RCAR_GEN2,
++ .channels_mask = 0x60,
++ .width = 32,
++ .overflow_bit = SH_CMT32_CMCSR_CMF,
++ .clear_bits = ~(SH_CMT32_CMCSR_CMF | SH_CMT32_CMCSR_OVF),
++ .read_control = sh_cmt_read32,
++ .write_control = sh_cmt_write32,
++ .read_count = sh_cmt_read32,
++ .write_count = sh_cmt_write32,
++ },
++ [SH_CMT1_RCAR_GEN2] = {
++ .model = SH_CMT1_RCAR_GEN2,
++ .channels_mask = 0xff,
+ .width = 32,
+ .overflow_bit = SH_CMT32_CMCSR_CMF,
+ .clear_bits = ~(SH_CMT32_CMCSR_CMF | SH_CMT32_CMCSR_OVF),
+@@ -862,6 +875,7 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index,
+ ch->cmt = cmt;
+ ch->index = index;
+ ch->hwidx = hwidx;
++ ch->timer_bit = hwidx;
+
+ /*
+ * Compute the address of the channel control register block. For the
+@@ -883,9 +897,11 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index,
+ */
+ ch->ioctrl = cmt->mapbase + 0x40;
+ break;
+- case SH_CMT_48BIT_GEN2:
++ case SH_CMT0_RCAR_GEN2:
++ case SH_CMT1_RCAR_GEN2:
+ ch->iostart = cmt->mapbase + ch->hwidx * 0x100;
+ ch->ioctrl = ch->iostart + 0x10;
++ ch->timer_bit = 0;
+ break;
+ }
+
+@@ -897,8 +913,6 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index,
+ ch->match_value = ch->max_match_value;
+ raw_spin_lock_init(&ch->lock);
+
+- ch->timer_bit = cmt->info->model == SH_CMT_48BIT_GEN2 ? 0 : ch->hwidx;
+-
+ ret = sh_cmt_register(ch, dev_name(&cmt->pdev->dev),
+ clockevent, clocksource);
+ if (ret) {
+@@ -941,7 +955,9 @@ static const struct of_device_id sh_cmt_of_table[] __maybe_unused = {
+ { .compatible = "renesas,cmt-32", .data = &sh_cmt_info[SH_CMT_32BIT] },
+ { .compatible = "renesas,cmt-32-fast", .data = &sh_cmt_info[SH_CMT_32BIT_FAST] },
+ { .compatible = "renesas,cmt-48", .data = &sh_cmt_info[SH_CMT_48BIT] },
+- { .compatible = "renesas,cmt-48-gen2", .data = &sh_cmt_info[SH_CMT_48BIT_GEN2] },
++ { .compatible = "renesas,cmt-48-gen2", .data = &sh_cmt_info[SH_CMT0_RCAR_GEN2] },
++ { .compatible = "renesas,rcar-gen2-cmt0", .data = &sh_cmt_info[SH_CMT0_RCAR_GEN2] },
++ { .compatible = "renesas,rcar-gen2-cmt1", .data = &sh_cmt_info[SH_CMT1_RCAR_GEN2] },
+ { }
+ };
+ MODULE_DEVICE_TABLE(of, sh_cmt_of_table);
+--
+2.19.0
+
diff --git a/patches/0170-clocksource-drivers-sh_cmt-Remove-support-for-renesa.patch b/patches/0170-clocksource-drivers-sh_cmt-Remove-support-for-renesa.patch
new file mode 100644
index 0000000..0746698
--- /dev/null
+++ b/patches/0170-clocksource-drivers-sh_cmt-Remove-support-for-renesa.patch
@@ -0,0 +1,78 @@
+From 2193b7a6980eff2a546da074244e5ca01847421b Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 18 Sep 2017 15:46:44 +0200
+Subject: [PATCH 0170/1795] clocksource/drivers/sh_cmt: Remove support for
+ "renesas,cmt-32*"
+
+Remove driver matching support for the unused "renesas,cmt-32" and
+"renesas,cmt-32-fast" compatible values, cfr. commit 203bb3479958c48a
+("devicetree: bindings: Remove unused 32-bit CMT bindings").
+
+As this removes the last user of SH_CMT_32BIT_FAST, all support for this
+variant is removed from the driver.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+(cherry picked from commit f11fb6df3c1924e3623d1afd1db23ea16c68fbb5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/clocksource/sh_cmt.c | 20 --------------------
+ 1 file changed, 20 deletions(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index 45af436483f3..8546736e3bc8 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -66,7 +66,6 @@ struct sh_cmt_device;
+ enum sh_cmt_model {
+ SH_CMT_16BIT,
+ SH_CMT_32BIT,
+- SH_CMT_32BIT_FAST,
+ SH_CMT_48BIT,
+ SH_CMT0_RCAR_GEN2,
+ SH_CMT1_RCAR_GEN2,
+@@ -203,16 +202,6 @@ static const struct sh_cmt_info sh_cmt_info[] = {
+ .read_count = sh_cmt_read32,
+ .write_count = sh_cmt_write32,
+ },
+- [SH_CMT_32BIT_FAST] = {
+- .model = SH_CMT_32BIT_FAST,
+- .width = 32,
+- .overflow_bit = SH_CMT32_CMCSR_CMF,
+- .clear_bits = ~(SH_CMT32_CMCSR_CMF | SH_CMT32_CMCSR_OVF),
+- .read_control = sh_cmt_read16,
+- .write_control = sh_cmt_write16,
+- .read_count = sh_cmt_read32,
+- .write_count = sh_cmt_write32,
+- },
+ [SH_CMT_48BIT] = {
+ .model = SH_CMT_48BIT,
+ .channels_mask = 0x3f,
+@@ -890,13 +879,6 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index,
+ case SH_CMT_48BIT:
+ ch->ioctrl = cmt->mapbase + 0x10 + ch->hwidx * 0x10;
+ break;
+- case SH_CMT_32BIT_FAST:
+- /*
+- * The 32-bit "fast" timer has a single channel at hwidx 5 but
+- * is located at offset 0x40 instead of 0x60 for some reason.
+- */
+- ch->ioctrl = cmt->mapbase + 0x40;
+- break;
+ case SH_CMT0_RCAR_GEN2:
+ case SH_CMT1_RCAR_GEN2:
+ ch->iostart = cmt->mapbase + ch->hwidx * 0x100;
+@@ -952,8 +934,6 @@ static const struct platform_device_id sh_cmt_id_table[] = {
+ MODULE_DEVICE_TABLE(platform, sh_cmt_id_table);
+
+ static const struct of_device_id sh_cmt_of_table[] __maybe_unused = {
+- { .compatible = "renesas,cmt-32", .data = &sh_cmt_info[SH_CMT_32BIT] },
+- { .compatible = "renesas,cmt-32-fast", .data = &sh_cmt_info[SH_CMT_32BIT_FAST] },
+ { .compatible = "renesas,cmt-48", .data = &sh_cmt_info[SH_CMT_48BIT] },
+ { .compatible = "renesas,cmt-48-gen2", .data = &sh_cmt_info[SH_CMT0_RCAR_GEN2] },
+ { .compatible = "renesas,rcar-gen2-cmt0", .data = &sh_cmt_info[SH_CMT0_RCAR_GEN2] },
+--
+2.19.0
+
diff --git a/patches/0171-clocksource-drivers-sh_cmt-Mark-renesas-cmt-48-gen2-.patch b/patches/0171-clocksource-drivers-sh_cmt-Mark-renesas-cmt-48-gen2-.patch
new file mode 100644
index 0000000..12fdb20
--- /dev/null
+++ b/patches/0171-clocksource-drivers-sh_cmt-Mark-renesas-cmt-48-gen2-.patch
@@ -0,0 +1,41 @@
+From 377bf1d1537ffda132e25391f7c18903e7eec2ec Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 18 Sep 2017 15:46:45 +0200
+Subject: [PATCH 0171/1795] clocksource/drivers/sh_cmt: Mark
+ "renesas,cmt-48-gen2" deprecated
+
+Document in the driver that "renesas,cmt-48-gen2" is deprecated, but
+still supported for backward compatibility with old DTBs, cfr. commit
+4e18111ff38f0664 ("devicetree: bindings: Remove deprecated
+properties").
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+(cherry picked from commit 8d50e9476bb4aea53fca12637e71d950deafdf37)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/clocksource/sh_cmt.c | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index 8546736e3bc8..61a922509706 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -935,7 +935,11 @@ MODULE_DEVICE_TABLE(platform, sh_cmt_id_table);
+
+ static const struct of_device_id sh_cmt_of_table[] __maybe_unused = {
+ { .compatible = "renesas,cmt-48", .data = &sh_cmt_info[SH_CMT_48BIT] },
+- { .compatible = "renesas,cmt-48-gen2", .data = &sh_cmt_info[SH_CMT0_RCAR_GEN2] },
++ {
++ /* deprecated, preserved for backward compatibility */
++ .compatible = "renesas,cmt-48-gen2",
++ .data = &sh_cmt_info[SH_CMT0_RCAR_GEN2]
++ },
+ { .compatible = "renesas,rcar-gen2-cmt0", .data = &sh_cmt_info[SH_CMT0_RCAR_GEN2] },
+ { .compatible = "renesas,rcar-gen2-cmt1", .data = &sh_cmt_info[SH_CMT1_RCAR_GEN2] },
+ { }
+--
+2.19.0
+
diff --git a/patches/0172-clocksource-drivers-sh_cmt-Remove-unused-renesas-cha.patch b/patches/0172-clocksource-drivers-sh_cmt-Remove-unused-renesas-cha.patch
new file mode 100644
index 0000000..f4cc2b0
--- /dev/null
+++ b/patches/0172-clocksource-drivers-sh_cmt-Remove-unused-renesas-cha.patch
@@ -0,0 +1,62 @@
+From e71ce5c82311947f74c8634b4d4804048d695ba5 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 18 Sep 2017 15:46:46 +0200
+Subject: [PATCH 0172/1795] clocksource/drivers/sh_cmt: Remove unused "renesas,
+ channels-mask" handling
+
+The in-driver channel configuration in sh_cmt_info.channels_mask is now
+always set for all CMT devices instantiated from DT.
+
+Hence the "renesas,channels-mask" property is no longer checked, and its
+handling can be removed, cfr. commit 4e18111ff38f0664 ("devicetree:
+bindings: Remove deprecated properties").
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+(cherry picked from commit d1d285972e24b63eeee8118359dcd4c451b295c5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/clocksource/sh_cmt.c | 18 +-----------------
+ 1 file changed, 1 insertion(+), 17 deletions(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index 61a922509706..89c514cf59a4 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -946,14 +946,6 @@ static const struct of_device_id sh_cmt_of_table[] __maybe_unused = {
+ };
+ MODULE_DEVICE_TABLE(of, sh_cmt_of_table);
+
+-static int sh_cmt_parse_dt(struct sh_cmt_device *cmt)
+-{
+- struct device_node *np = cmt->pdev->dev.of_node;
+-
+- return of_property_read_u32(np, "renesas,channels-mask",
+- &cmt->hw_channels);
+-}
+-
+ static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev)
+ {
+ unsigned int mask;
+@@ -968,15 +960,7 @@ static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev)
+
+ id = of_match_node(sh_cmt_of_table, pdev->dev.of_node);
+ cmt->info = id->data;
+-
+- /* prefer in-driver channel configuration over DT */
+- if (cmt->info->channels_mask) {
+- cmt->hw_channels = cmt->info->channels_mask;
+- } else {
+- ret = sh_cmt_parse_dt(cmt);
+- if (ret < 0)
+- return ret;
+- }
++ cmt->hw_channels = cmt->info->channels_mask;
+ } else if (pdev->dev.platform_data) {
+ struct sh_timer_config *cfg = pdev->dev.platform_data;
+ const struct platform_device_id *id = pdev->id_entry;
+--
+2.19.0
+
diff --git a/patches/0173-clocksource-drivers-sh_cmt-Use-of_device_get_match_d.patch b/patches/0173-clocksource-drivers-sh_cmt-Use-of_device_get_match_d.patch
new file mode 100644
index 0000000..9567c9d
--- /dev/null
+++ b/patches/0173-clocksource-drivers-sh_cmt-Use-of_device_get_match_d.patch
@@ -0,0 +1,46 @@
+From 2e7ffb5bb7c54f689598c62d7be72a4aa8ac75b4 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 18 Sep 2017 15:46:47 +0200
+Subject: [PATCH 0173/1795] clocksource/drivers/sh_cmt: Use
+ of_device_get_match_data() helper
+
+Use the existing of_device_get_match_data() helper instead of
+open-coding its functionality.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+(cherry picked from commit 2d1d5172bf843fb44fcc7d3ff61501e9a6601e74)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/clocksource/sh_cmt.c | 6 ++----
+ 1 file changed, 2 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index 89c514cf59a4..70b3cf8e23d0 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -25,6 +25,7 @@
+ #include <linux/irq.h>
+ #include <linux/module.h>
+ #include <linux/of.h>
++#include <linux/of_device.h>
+ #include <linux/platform_device.h>
+ #include <linux/pm_domain.h>
+ #include <linux/pm_runtime.h>
+@@ -956,10 +957,7 @@ static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev)
+ raw_spin_lock_init(&cmt->lock);
+
+ if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
+- const struct of_device_id *id;
+-
+- id = of_match_node(sh_cmt_of_table, pdev->dev.of_node);
+- cmt->info = id->data;
++ cmt->info = of_device_get_match_data(&pdev->dev);
+ cmt->hw_channels = cmt->info->channels_mask;
+ } else if (pdev->dev.platform_data) {
+ struct sh_timer_config *cfg = pdev->dev.platform_data;
+--
+2.19.0
+
diff --git a/patches/0174-sh-make-dma_cache_sync-a-no-op.patch b/patches/0174-sh-make-dma_cache_sync-a-no-op.patch
new file mode 100644
index 0000000..bc28c9e
--- /dev/null
+++ b/patches/0174-sh-make-dma_cache_sync-a-no-op.patch
@@ -0,0 +1,176 @@
+From 6a0e135d500c5cfc1676464d1db13ea44385a7f9 Mon Sep 17 00:00:00 2001
+From: Christoph Hellwig <hch@lst.de>
+Date: Sun, 27 Aug 2017 10:35:40 +0200
+Subject: [PATCH 0174/1795] sh: make dma_cache_sync a no-op
+
+sh does not implement DMA_ATTR_NON_CONSISTENT allocations, so it doesn't
+make any sense to do any work in dma_cache_sync given that it
+must be a no-op when dma_alloc_attrs returns coherent memory.
+
+On the other hand sh uses dma_cache_sync internally in the dma_ops
+implementation and for the maple bus that does not use the DMA API,
+so a the old functionality for dma_cache_sync is still provided under
+the name sh_sync_dma_for_device, and without the redundant dev
+argument. While at it two of the syncing dma_ops also go the proper
+_for_device postfix.
+
+Signed-off-by: Christoph Hellwig <hch@lst.de>
+Reviewed-by: Robin Murphy <robin.murphy@arm.com>
+(cherry picked from commit e0c6584df9c414b50de17e1abc1099f7501bbb60)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/sh/include/asm/dma-mapping.h | 9 +++++++--
+ arch/sh/kernel/dma-nommu.c | 17 +++++++++--------
+ arch/sh/mm/consistent.c | 6 +++---
+ drivers/sh/maple/maple.c | 5 ++---
+ 4 files changed, 21 insertions(+), 16 deletions(-)
+
+diff --git a/arch/sh/include/asm/dma-mapping.h b/arch/sh/include/asm/dma-mapping.h
+index 68c1536b3aab..edd8d7210c93 100644
+--- a/arch/sh/include/asm/dma-mapping.h
++++ b/arch/sh/include/asm/dma-mapping.h
+@@ -10,8 +10,10 @@ static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
+ return dma_ops;
+ }
+
+-void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
+- enum dma_data_direction dir);
++static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
++ enum dma_data_direction dir)
++{
++}
+
+ /* arch/sh/mm/consistent.c */
+ extern void *dma_generic_alloc_coherent(struct device *dev, size_t size,
+@@ -21,4 +23,7 @@ extern void dma_generic_free_coherent(struct device *dev, size_t size,
+ void *vaddr, dma_addr_t dma_handle,
+ unsigned long attrs);
+
++void sh_sync_dma_for_device(void *vaddr, size_t size,
++ enum dma_data_direction dir);
++
+ #endif /* __ASM_SH_DMA_MAPPING_H */
+diff --git a/arch/sh/kernel/dma-nommu.c b/arch/sh/kernel/dma-nommu.c
+index d24c707b2181..62b485107eae 100644
+--- a/arch/sh/kernel/dma-nommu.c
++++ b/arch/sh/kernel/dma-nommu.c
+@@ -9,6 +9,7 @@
+ */
+ #include <linux/dma-mapping.h>
+ #include <linux/io.h>
++#include <asm/cacheflush.h>
+
+ static dma_addr_t nommu_map_page(struct device *dev, struct page *page,
+ unsigned long offset, size_t size,
+@@ -20,7 +21,7 @@ static dma_addr_t nommu_map_page(struct device *dev, struct page *page,
+ WARN_ON(size == 0);
+
+ if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
+- dma_cache_sync(dev, page_address(page) + offset, size, dir);
++ sh_sync_dma_for_device(page_address(page) + offset, size, dir);
+
+ return addr;
+ }
+@@ -38,7 +39,7 @@ static int nommu_map_sg(struct device *dev, struct scatterlist *sg,
+ BUG_ON(!sg_page(s));
+
+ if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
+- dma_cache_sync(dev, sg_virt(s), s->length, dir);
++ sh_sync_dma_for_device(sg_virt(s), s->length, dir);
+
+ s->dma_address = sg_phys(s);
+ s->dma_length = s->length;
+@@ -48,20 +49,20 @@ static int nommu_map_sg(struct device *dev, struct scatterlist *sg,
+ }
+
+ #ifdef CONFIG_DMA_NONCOHERENT
+-static void nommu_sync_single(struct device *dev, dma_addr_t addr,
++static void nommu_sync_single_for_device(struct device *dev, dma_addr_t addr,
+ size_t size, enum dma_data_direction dir)
+ {
+- dma_cache_sync(dev, phys_to_virt(addr), size, dir);
++ sh_sync_dma_for_device(phys_to_virt(addr), size, dir);
+ }
+
+-static void nommu_sync_sg(struct device *dev, struct scatterlist *sg,
++static void nommu_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
+ int nelems, enum dma_data_direction dir)
+ {
+ struct scatterlist *s;
+ int i;
+
+ for_each_sg(sg, s, nelems, i)
+- dma_cache_sync(dev, sg_virt(s), s->length, dir);
++ sh_sync_dma_for_device(sg_virt(s), s->length, dir);
+ }
+ #endif
+
+@@ -71,8 +72,8 @@ const struct dma_map_ops nommu_dma_ops = {
+ .map_page = nommu_map_page,
+ .map_sg = nommu_map_sg,
+ #ifdef CONFIG_DMA_NONCOHERENT
+- .sync_single_for_device = nommu_sync_single,
+- .sync_sg_for_device = nommu_sync_sg,
++ .sync_single_for_device = nommu_sync_single_for_device,
++ .sync_sg_for_device = nommu_sync_sg_for_device,
+ #endif
+ .is_phys = 1,
+ };
+diff --git a/arch/sh/mm/consistent.c b/arch/sh/mm/consistent.c
+index d1275adfa0ef..6ea3aab508f2 100644
+--- a/arch/sh/mm/consistent.c
++++ b/arch/sh/mm/consistent.c
+@@ -49,7 +49,7 @@ void *dma_generic_alloc_coherent(struct device *dev, size_t size,
+ * Pages from the page allocator may have data present in
+ * cache. So flush the cache before using uncached memory.
+ */
+- dma_cache_sync(dev, ret, size, DMA_BIDIRECTIONAL);
++ sh_sync_dma_for_device(ret, size, DMA_BIDIRECTIONAL);
+
+ ret_nocache = (void __force *)ioremap_nocache(virt_to_phys(ret), size);
+ if (!ret_nocache) {
+@@ -78,7 +78,7 @@ void dma_generic_free_coherent(struct device *dev, size_t size,
+ iounmap(vaddr);
+ }
+
+-void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
++void sh_sync_dma_for_device(void *vaddr, size_t size,
+ enum dma_data_direction direction)
+ {
+ void *addr;
+@@ -100,7 +100,7 @@ void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
+ BUG();
+ }
+ }
+-EXPORT_SYMBOL(dma_cache_sync);
++EXPORT_SYMBOL(sh_sync_dma_for_device);
+
+ static int __init memchunk_setup(char *str)
+ {
+diff --git a/drivers/sh/maple/maple.c b/drivers/sh/maple/maple.c
+index bec81c2404f7..7525039d812c 100644
+--- a/drivers/sh/maple/maple.c
++++ b/drivers/sh/maple/maple.c
+@@ -300,7 +300,7 @@ static void maple_send(void)
+ mutex_unlock(&maple_wlist_lock);
+ if (maple_packets > 0) {
+ for (i = 0; i < (1 << MAPLE_DMA_PAGES); i++)
+- dma_cache_sync(0, maple_sendbuf + i * PAGE_SIZE,
++ sh_sync_dma_for_device(maple_sendbuf + i * PAGE_SIZE,
+ PAGE_SIZE, DMA_BIDIRECTIONAL);
+ }
+
+@@ -642,8 +642,7 @@ static void maple_dma_handler(struct work_struct *work)
+ list_for_each_entry_safe(mq, nmq, &maple_sentq, list) {
+ mdev = mq->dev;
+ recvbuf = mq->recvbuf->buf;
+- dma_cache_sync(&mdev->dev, recvbuf, 0x400,
+- DMA_FROM_DEVICE);
++ sh_sync_dma_for_device(recvbuf, 0x400, DMA_FROM_DEVICE);
+ code = recvbuf[0];
+ kfree(mq->sendbuf);
+ list_del_init(&mq->list);
+--
+2.19.0
+
diff --git a/patches/0175-dt-bindings-net-sh_eth-add-R-Car-Gen-12-fallback-com.patch b/patches/0175-dt-bindings-net-sh_eth-add-R-Car-Gen-12-fallback-com.patch
new file mode 100644
index 0000000..e2f29dc
--- /dev/null
+++ b/patches/0175-dt-bindings-net-sh_eth-add-R-Car-Gen-12-fallback-com.patch
@@ -0,0 +1,79 @@
+From 6f927274a3091de07f06affdd564a16545a326a7 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Wed, 18 Oct 2017 09:21:26 +0200
+Subject: [PATCH 0175/1795] dt-bindings: net: sh_eth: add R-Car Gen[12]
+ fallback compatibility strings
+
+Add fallback compatibility strings for R-Car Gen 1 and 2.
+
+In the case of Renesas R-Car hardware we know that there are generations of
+SoCs, f.e. Gen 1 and 2. But beyond that its not clear what the relationship
+between IP blocks might be. For example, I believe that r8a7790 is older
+than r8a7791 but that doesn't imply that the latter is a descendant of the
+former or vice versa.
+
+We can, however, by examining the documentation and behaviour of the
+hardware at run-time observe that the current driver implementation appears
+to be compatible with the IP blocks on SoCs within a given generation.
+
+For the above reasons and convenience when enabling new SoCs a
+per-generation fallback compatibility string scheme is being adopted for
+drivers for Renesas SoCs.
+
+Note that R-Car Gen2 and RZ/G1 have many compatible IP blocks. The
+approach that has been consistently taken for other IP blocks is to name
+common code, compatibility strings and so on after R-Car Gen2.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 87d9fa647020fb65985ec08826f6c77b9b4084af)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/net/sh_eth.txt | 14 ++++++++++++--
+ 1 file changed, 12 insertions(+), 2 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/net/sh_eth.txt b/Documentation/devicetree/bindings/net/sh_eth.txt
+index 0115c85a2425..5172799a7f1a 100644
+--- a/Documentation/devicetree/bindings/net/sh_eth.txt
++++ b/Documentation/devicetree/bindings/net/sh_eth.txt
+@@ -4,7 +4,8 @@ This file provides information on what the device node for the SH EtherMAC
+ interface contains.
+
+ Required properties:
+-- compatible: "renesas,gether-r8a7740" if the device is a part of R8A7740 SoC.
++- compatible: Must contain one or more of the following:
++ "renesas,gether-r8a7740" if the device is a part of R8A7740 SoC.
+ "renesas,ether-r8a7743" if the device is a part of R8A7743 SoC.
+ "renesas,ether-r8a7745" if the device is a part of R8A7745 SoC.
+ "renesas,ether-r8a7778" if the device is a part of R8A7778 SoC.
+@@ -14,6 +15,14 @@ Required properties:
+ "renesas,ether-r8a7793" if the device is a part of R8A7793 SoC.
+ "renesas,ether-r8a7794" if the device is a part of R8A7794 SoC.
+ "renesas,ether-r7s72100" if the device is a part of R7S72100 SoC.
++ "renesas,rcar-gen1-ether" for a generic R-Car Gen1 device.
++ "renesas,rcar-gen2-ether" for a generic R-Car Gen2 or RZ/G1
++ device.
++
++ When compatible with the generic version, nodes must list
++ the SoC-specific version corresponding to the platform
++ first followed by the generic version.
++
+ - reg: offset and length of (1) the E-DMAC/feLic register block (required),
+ (2) the TSU register block (optional).
+ - interrupts: interrupt specifier for the sole interrupt.
+@@ -36,7 +45,8 @@ Optional properties:
+ Example (Lager board):
+
+ ethernet@ee700000 {
+- compatible = "renesas,ether-r8a7790";
++ compatible = "renesas,ether-r8a7790",
++ "renesas,rcar-gen2-ether";
+ reg = <0 0xee700000 0 0x400>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 162 IRQ_TYPE_LEVEL_HIGH>;
+--
+2.19.0
+
diff --git a/patches/0176-net-sh_eth-rename-name-structures-as-rcar_gen-12-_.patch b/patches/0176-net-sh_eth-rename-name-structures-as-rcar_gen-12-_.patch
new file mode 100644
index 0000000..a4ce019
--- /dev/null
+++ b/patches/0176-net-sh_eth-rename-name-structures-as-rcar_gen-12-_.patch
@@ -0,0 +1,99 @@
+From 97a6de8ceef89fec74e4a999f9d1260e1654d501 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Wed, 18 Oct 2017 09:21:27 +0200
+Subject: [PATCH 0176/1795] net: sh_eth: rename name structures as
+ rcar_gen[12]_*
+
+Rename structures describing R-Car SoCs as rcar_gen[12]_*
+rather than r8a77[79]x_*. This seems a little easier on the
+eyes. And will make things slightly cleaner in a follow-up
+patch that adds fallback-compatibility strings for these SoCs.
+
+Note that R-Car Gen2 and RZ/G1 have many compatible IP blocks. The
+approach that has been consistently taken for other IP blocks is to name
+common code, compatibility strings and so on after R-Car Gen2.
+
+Also rename sh_eth_set_rate_r8a777x as sh_eth_set_rate_rcar as
+it it is used by the R-Car generations supported by the driver.
+
+This patch should have no run-time effect and
+is compile-tested only.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 6c4b2f7e675cf11587182f51adcf0e129005e2f9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/net/ethernet/renesas/sh_eth.c | 30 +++++++++++++--------------
+ 1 file changed, 15 insertions(+), 15 deletions(-)
+
+diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
+index abfb9faadbc4..eee9a6ee349c 100644
+--- a/drivers/net/ethernet/renesas/sh_eth.c
++++ b/drivers/net/ethernet/renesas/sh_eth.c
+@@ -594,7 +594,7 @@ static struct sh_eth_cpu_data r8a7740_data = {
+ };
+
+ /* There is CPU dependent code */
+-static void sh_eth_set_rate_r8a777x(struct net_device *ndev)
++static void sh_eth_set_rate_rcar(struct net_device *ndev)
+ {
+ struct sh_eth_private *mdp = netdev_priv(ndev);
+
+@@ -608,10 +608,10 @@ static void sh_eth_set_rate_r8a777x(struct net_device *ndev)
+ }
+ }
+
+-/* R8A7778/9 */
+-static struct sh_eth_cpu_data r8a777x_data = {
++/* R-Car Gen1 */
++static struct sh_eth_cpu_data rcar_gen1_data = {
+ .set_duplex = sh_eth_set_duplex,
+- .set_rate = sh_eth_set_rate_r8a777x,
++ .set_rate = sh_eth_set_rate_rcar,
+
+ .register_type = SH_ETH_REG_FAST_RCAR,
+
+@@ -635,10 +635,10 @@ static struct sh_eth_cpu_data r8a777x_data = {
+ .hw_swap = 1,
+ };
+
+-/* R8A7790/1 */
+-static struct sh_eth_cpu_data r8a779x_data = {
++/* R-Car Gen2 and RZ/G1 */
++static struct sh_eth_cpu_data rcar_gen2_data = {
+ .set_duplex = sh_eth_set_duplex,
+- .set_rate = sh_eth_set_rate_r8a777x,
++ .set_rate = sh_eth_set_rate_rcar,
+
+ .register_type = SH_ETH_REG_FAST_RCAR,
+
+@@ -3063,14 +3063,14 @@ static struct sh_eth_plat_data *sh_eth_parse_dt(struct device *dev)
+
+ static const struct of_device_id sh_eth_match_table[] = {
+ { .compatible = "renesas,gether-r8a7740", .data = &r8a7740_data },
+- { .compatible = "renesas,ether-r8a7743", .data = &r8a779x_data },
+- { .compatible = "renesas,ether-r8a7745", .data = &r8a779x_data },
+- { .compatible = "renesas,ether-r8a7778", .data = &r8a777x_data },
+- { .compatible = "renesas,ether-r8a7779", .data = &r8a777x_data },
+- { .compatible = "renesas,ether-r8a7790", .data = &r8a779x_data },
+- { .compatible = "renesas,ether-r8a7791", .data = &r8a779x_data },
+- { .compatible = "renesas,ether-r8a7793", .data = &r8a779x_data },
+- { .compatible = "renesas,ether-r8a7794", .data = &r8a779x_data },
++ { .compatible = "renesas,ether-r8a7743", .data = &rcar_gen2_data },
++ { .compatible = "renesas,ether-r8a7745", .data = &rcar_gen2_data },
++ { .compatible = "renesas,ether-r8a7778", .data = &rcar_gen1_data },
++ { .compatible = "renesas,ether-r8a7779", .data = &rcar_gen1_data },
++ { .compatible = "renesas,ether-r8a7790", .data = &rcar_gen2_data },
++ { .compatible = "renesas,ether-r8a7791", .data = &rcar_gen2_data },
++ { .compatible = "renesas,ether-r8a7793", .data = &rcar_gen2_data },
++ { .compatible = "renesas,ether-r8a7794", .data = &rcar_gen2_data },
+ { .compatible = "renesas,ether-r7s72100", .data = &r7s72100_data },
+ { }
+ };
+--
+2.19.0
+
diff --git a/patches/0177-net-sh_eth-implement-R-Car-Gen-12-fallback-compatibi.patch b/patches/0177-net-sh_eth-implement-R-Car-Gen-12-fallback-compatibi.patch
new file mode 100644
index 0000000..615d433
--- /dev/null
+++ b/patches/0177-net-sh_eth-implement-R-Car-Gen-12-fallback-compatibi.patch
@@ -0,0 +1,53 @@
+From c488f818341a4ade580282bc627c18fe99cb2aad Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Wed, 18 Oct 2017 09:21:28 +0200
+Subject: [PATCH 0177/1795] net: sh_eth: implement R-Car Gen[12] fallback
+ compatibility strings
+
+Implement fallback compatibility strings for R-Car Gen 1 and 2.
+
+In the case of Renesas R-Car hardware we know that there are generations of
+SoCs, f.e. Gen 1 and 2. But beyond that its not clear what the relationship
+between IP blocks might be. For example, I believe that r8a7790 is older
+than r8a7791 but that doesn't imply that the latter is a descendant of the
+former or vice versa.
+
+We can, however, by examining the documentation and behaviour of the
+hardware at run-time observe that the current driver implementation appears
+to be compatible with the IP blocks on SoCs within a given generation.
+
+For the above reasons and convenience when enabling new SoCs a
+per-generation fallback compatibility string scheme is being adopted for
+drivers for Renesas SoCs.
+
+Note that R-Car Gen2 and RZ/G1 have many compatible IP blocks. The
+approach that has been consistently taken for other IP blocks is to name
+common code, compatibility strings and so on after R-Car Gen2.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit b4804e0c71c144b673b6c53ca4acfcac6eb98704)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/net/ethernet/renesas/sh_eth.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
+index eee9a6ee349c..987d10c2c36c 100644
+--- a/drivers/net/ethernet/renesas/sh_eth.c
++++ b/drivers/net/ethernet/renesas/sh_eth.c
+@@ -3072,6 +3072,8 @@ static const struct of_device_id sh_eth_match_table[] = {
+ { .compatible = "renesas,ether-r8a7793", .data = &rcar_gen2_data },
+ { .compatible = "renesas,ether-r8a7794", .data = &rcar_gen2_data },
+ { .compatible = "renesas,ether-r7s72100", .data = &r7s72100_data },
++ { .compatible = "renesas,rcar-gen1-ether", .data = &rcar_gen1_data },
++ { .compatible = "renesas,rcar-gen2-ether", .data = &rcar_gen2_data },
+ { }
+ };
+ MODULE_DEVICE_TABLE(of, sh_eth_match_table);
+--
+2.19.0
+
diff --git a/patches/0178-net-sh_eth-use-correct-struct-device-when-calling-DM.patch b/patches/0178-net-sh_eth-use-correct-struct-device-when-calling-DM.patch
new file mode 100644
index 0000000..f3fd63d
--- /dev/null
+++ b/patches/0178-net-sh_eth-use-correct-struct-device-when-calling-DM.patch
@@ -0,0 +1,104 @@
+From 4930f3fef598df1a9e14750dbbd6a893bea77f5d Mon Sep 17 00:00:00 2001
+From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+Date: Mon, 4 Dec 2017 14:33:26 +0100
+Subject: [PATCH 0178/1795] net: sh_eth: use correct "struct device" when
+ calling DMA mapping functions
+
+There are two types of "struct device": the one representing the
+physical device on its physical bus (platform, SPI, PCI, etc.), and
+the one representing the logical device in its device class (net,
+etc.).
+
+The DMA mapping API expects to receive as argument a "struct device"
+representing the physical device, as the "struct device" contains
+information about the bus that the DMA API needs.
+
+However, the sh_eth driver mistakenly uses the "struct device"
+representing the logical device (embedded in "struct net_device")
+rather than the "struct device" representing the physical device on
+its bus.
+
+This commit fixes that by adjusting all calls to the DMA mapping API.
+
+Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 22c1aed4093a605b120d6e566620364843a318ed)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/net/ethernet/renesas/sh_eth.c | 19 ++++++++++---------
+ 1 file changed, 10 insertions(+), 9 deletions(-)
+
+diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
+index 987d10c2c36c..31d8f943383d 100644
+--- a/drivers/net/ethernet/renesas/sh_eth.c
++++ b/drivers/net/ethernet/renesas/sh_eth.c
+@@ -1153,7 +1153,8 @@ static int sh_eth_tx_free(struct net_device *ndev, bool sent_only)
+ entry, le32_to_cpu(txdesc->status));
+ /* Free the original skb. */
+ if (mdp->tx_skbuff[entry]) {
+- dma_unmap_single(&ndev->dev, le32_to_cpu(txdesc->addr),
++ dma_unmap_single(&mdp->pdev->dev,
++ le32_to_cpu(txdesc->addr),
+ le32_to_cpu(txdesc->len) >> 16,
+ DMA_TO_DEVICE);
+ dev_kfree_skb_irq(mdp->tx_skbuff[entry]);
+@@ -1183,7 +1184,7 @@ static void sh_eth_ring_free(struct net_device *ndev)
+ if (mdp->rx_skbuff[i]) {
+ struct sh_eth_rxdesc *rxdesc = &mdp->rx_ring[i];
+
+- dma_unmap_single(&ndev->dev,
++ dma_unmap_single(&mdp->pdev->dev,
+ le32_to_cpu(rxdesc->addr),
+ ALIGN(mdp->rx_buf_sz, 32),
+ DMA_FROM_DEVICE);
+@@ -1249,9 +1250,9 @@ static void sh_eth_ring_format(struct net_device *ndev)
+
+ /* The size of the buffer is a multiple of 32 bytes. */
+ buf_len = ALIGN(mdp->rx_buf_sz, 32);
+- dma_addr = dma_map_single(&ndev->dev, skb->data, buf_len,
++ dma_addr = dma_map_single(&mdp->pdev->dev, skb->data, buf_len,
+ DMA_FROM_DEVICE);
+- if (dma_mapping_error(&ndev->dev, dma_addr)) {
++ if (dma_mapping_error(&mdp->pdev->dev, dma_addr)) {
+ kfree_skb(skb);
+ break;
+ }
+@@ -1531,7 +1532,7 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
+ mdp->rx_skbuff[entry] = NULL;
+ if (mdp->cd->rpadir)
+ skb_reserve(skb, NET_IP_ALIGN);
+- dma_unmap_single(&ndev->dev, dma_addr,
++ dma_unmap_single(&mdp->pdev->dev, dma_addr,
+ ALIGN(mdp->rx_buf_sz, 32),
+ DMA_FROM_DEVICE);
+ skb_put(skb, pkt_len);
+@@ -1559,9 +1560,9 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
+ if (skb == NULL)
+ break; /* Better luck next round. */
+ sh_eth_set_receive_align(skb);
+- dma_addr = dma_map_single(&ndev->dev, skb->data,
++ dma_addr = dma_map_single(&mdp->pdev->dev, skb->data,
+ buf_len, DMA_FROM_DEVICE);
+- if (dma_mapping_error(&ndev->dev, dma_addr)) {
++ if (dma_mapping_error(&mdp->pdev->dev, dma_addr)) {
+ kfree_skb(skb);
+ break;
+ }
+@@ -2418,9 +2419,9 @@ static int sh_eth_start_xmit(struct sk_buff *skb, struct net_device *ndev)
+ /* soft swap. */
+ if (!mdp->cd->hw_swap)
+ sh_eth_soft_swap(PTR_ALIGN(skb->data, 4), skb->len + 2);
+- dma_addr = dma_map_single(&ndev->dev, skb->data, skb->len,
++ dma_addr = dma_map_single(&mdp->pdev->dev, skb->data, skb->len,
+ DMA_TO_DEVICE);
+- if (dma_mapping_error(&ndev->dev, dma_addr)) {
++ if (dma_mapping_error(&mdp->pdev->dev, dma_addr)) {
+ kfree_skb(skb);
+ return NETDEV_TX_OK;
+ }
+--
+2.19.0
+
diff --git a/patches/0179-net-sh_eth-don-t-use-NULL-as-struct-device-for-the-D.patch b/patches/0179-net-sh_eth-don-t-use-NULL-as-struct-device-for-the-D.patch
new file mode 100644
index 0000000..eb983c6
--- /dev/null
+++ b/patches/0179-net-sh_eth-don-t-use-NULL-as-struct-device-for-the-D.patch
@@ -0,0 +1,69 @@
+From e315e56ee98299a3fc510d920c823938efba23e8 Mon Sep 17 00:00:00 2001
+From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+Date: Mon, 4 Dec 2017 14:33:27 +0100
+Subject: [PATCH 0179/1795] net: sh_eth: don't use NULL as "struct device" for
+ the DMA mapping API
+
+Using NULL as argument for the DMA mapping API is bogus, as the DMA
+mapping API may use information from the "struct device" to perform
+the DMA mapping operation. Therefore, pass the appropriate "struct
+device".
+
+Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 573500dbf0f2756947517c1d4f942767dbf16dcc)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/net/ethernet/renesas/sh_eth.c | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
+index 31d8f943383d..158ebe520505 100644
+--- a/drivers/net/ethernet/renesas/sh_eth.c
++++ b/drivers/net/ethernet/renesas/sh_eth.c
+@@ -1191,7 +1191,7 @@ static void sh_eth_ring_free(struct net_device *ndev)
+ }
+ }
+ ringsize = sizeof(struct sh_eth_rxdesc) * mdp->num_rx_ring;
+- dma_free_coherent(NULL, ringsize, mdp->rx_ring,
++ dma_free_coherent(&mdp->pdev->dev, ringsize, mdp->rx_ring,
+ mdp->rx_desc_dma);
+ mdp->rx_ring = NULL;
+ }
+@@ -1208,7 +1208,7 @@ static void sh_eth_ring_free(struct net_device *ndev)
+ sh_eth_tx_free(ndev, false);
+
+ ringsize = sizeof(struct sh_eth_txdesc) * mdp->num_tx_ring;
+- dma_free_coherent(NULL, ringsize, mdp->tx_ring,
++ dma_free_coherent(&mdp->pdev->dev, ringsize, mdp->tx_ring,
+ mdp->tx_desc_dma);
+ mdp->tx_ring = NULL;
+ }
+@@ -1328,8 +1328,8 @@ static int sh_eth_ring_init(struct net_device *ndev)
+
+ /* Allocate all Rx descriptors. */
+ rx_ringsize = sizeof(struct sh_eth_rxdesc) * mdp->num_rx_ring;
+- mdp->rx_ring = dma_alloc_coherent(NULL, rx_ringsize, &mdp->rx_desc_dma,
+- GFP_KERNEL);
++ mdp->rx_ring = dma_alloc_coherent(&mdp->pdev->dev, rx_ringsize,
++ &mdp->rx_desc_dma, GFP_KERNEL);
+ if (!mdp->rx_ring)
+ goto ring_free;
+
+@@ -1337,8 +1337,8 @@ static int sh_eth_ring_init(struct net_device *ndev)
+
+ /* Allocate all Tx descriptors. */
+ tx_ringsize = sizeof(struct sh_eth_txdesc) * mdp->num_tx_ring;
+- mdp->tx_ring = dma_alloc_coherent(NULL, tx_ringsize, &mdp->tx_desc_dma,
+- GFP_KERNEL);
++ mdp->tx_ring = dma_alloc_coherent(&mdp->pdev->dev, tx_ringsize,
++ &mdp->tx_desc_dma, GFP_KERNEL);
+ if (!mdp->tx_ring)
+ goto ring_free;
+ return 0;
+--
+2.19.0
+
diff --git a/patches/0180-net-sh_eth-do-not-advertise-Gigabit-capabilities-whe.patch b/patches/0180-net-sh_eth-do-not-advertise-Gigabit-capabilities-whe.patch
new file mode 100644
index 0000000..38b2435
--- /dev/null
+++ b/patches/0180-net-sh_eth-do-not-advertise-Gigabit-capabilities-whe.patch
@@ -0,0 +1,51 @@
+From 0ba20eabb7ad1b40df3d547b787700a1dcbd71d3 Mon Sep 17 00:00:00 2001
+From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+Date: Fri, 8 Dec 2017 16:35:40 +0100
+Subject: [PATCH 0180/1795] net: sh_eth: do not advertise Gigabit capabilities
+ when not available
+
+Not all variants of the sh_eth hardware have Gigabit
+support. Unfortunately, the current driver doesn't tell the PHY about
+the limited MAC capabilities. Due to this, if you have a Gigabit
+capable PHY, the PHY will advertise its Gigabit capability and
+establish a link at 1Gbit/s, even though the MAC doesn't support it.
+
+In order to avoid this, we use the recently introduced
+phy_set_max_speed() to tell the PHY to not advertise speed higher than
+100 MBit/s.
+
+Tested on a SH7786 platform, with a Gigabit PHY.
+
+Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 2aab6b40b03154a263463a5d992ddd7d122a016a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/net/ethernet/renesas/sh_eth.c | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
+index 158ebe520505..00e2c2bc4693 100644
+--- a/drivers/net/ethernet/renesas/sh_eth.c
++++ b/drivers/net/ethernet/renesas/sh_eth.c
+@@ -1906,6 +1906,16 @@ static int sh_eth_phy_init(struct net_device *ndev)
+ return PTR_ERR(phydev);
+ }
+
++ /* mask with MAC supported features */
++ if (mdp->cd->register_type != SH_ETH_REG_GIGABIT) {
++ int err = phy_set_max_speed(phydev, SPEED_100);
++ if (err) {
++ netdev_err(ndev, "failed to limit PHY to 100 Mbit/s\n");
++ phy_disconnect(phydev);
++ return err;
++ }
++ }
++
+ phy_attached_info(phydev);
+
+ return 0;
+--
+2.19.0
+
diff --git a/patches/0181-sh_eth-fix-TXALCR1-offsets.patch b/patches/0181-sh_eth-fix-TXALCR1-offsets.patch
new file mode 100644
index 0000000..6e8565e
--- /dev/null
+++ b/patches/0181-sh_eth-fix-TXALCR1-offsets.patch
@@ -0,0 +1,44 @@
+From 3cb67542dc391e5f5300572f3eba1327d56256cc Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sun, 7 Jan 2018 00:26:47 +0300
+Subject: [PATCH 0181/1795] sh_eth: fix TXALCR1 offsets
+
+The TXALCR1 offsets are incorrect in the register offset tables, most
+probably due to copy&paste error. Luckily, the driver never uses this
+register. :-)
+
+Fixes: 4a55530f38e4 ("net: sh_eth: modify the definitions of register")
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 50f3d740d376f664f6accc7e86c9afd8f1c7e1e4)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/net/ethernet/renesas/sh_eth.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
+index 00e2c2bc4693..4721130d6cd3 100644
+--- a/drivers/net/ethernet/renesas/sh_eth.c
++++ b/drivers/net/ethernet/renesas/sh_eth.c
+@@ -147,7 +147,7 @@ static const u16 sh_eth_offset_gigabit[SH_ETH_MAX_REGISTER_OFFSET] = {
+ [FWNLCR0] = 0x0090,
+ [FWALCR0] = 0x0094,
+ [TXNLCR1] = 0x00a0,
+- [TXALCR1] = 0x00a0,
++ [TXALCR1] = 0x00a4,
+ [RXNLCR1] = 0x00a8,
+ [RXALCR1] = 0x00ac,
+ [FWNLCR1] = 0x00b0,
+@@ -399,7 +399,7 @@ static const u16 sh_eth_offset_fast_sh3_sh2[SH_ETH_MAX_REGISTER_OFFSET] = {
+ [FWNLCR0] = 0x0090,
+ [FWALCR0] = 0x0094,
+ [TXNLCR1] = 0x00a0,
+- [TXALCR1] = 0x00a0,
++ [TXALCR1] = 0x00a4,
+ [RXNLCR1] = 0x00a8,
+ [RXALCR1] = 0x00ac,
+ [FWNLCR1] = 0x00b0,
+--
+2.19.0
+
diff --git a/patches/0182-sh_eth-fix-dumping-ARSTR.patch b/patches/0182-sh_eth-fix-dumping-ARSTR.patch
new file mode 100644
index 0000000..492fffa
--- /dev/null
+++ b/patches/0182-sh_eth-fix-dumping-ARSTR.patch
@@ -0,0 +1,37 @@
+From 7f8dd42b9ccb3011aefca6b1d043fdd771217776 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sat, 13 Jan 2018 20:22:01 +0300
+Subject: [PATCH 0182/1795] sh_eth: fix dumping ARSTR
+
+ARSTR is always located at the start of the TSU register region, thus
+using add_reg() instead of add_tsu_reg() in __sh_eth_get_regs() to dump it
+causes EDMR or EDSR (depending on the register layout) to be dumped instead
+of ARSTR. Use the correct condition/macro there...
+
+Fixes: 6b4b4fead342 ("sh_eth: Implement ethtool register dump operations")
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 17d0fb0caa68f2bfd8aaa8125ff15abebfbfa1d7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/net/ethernet/renesas/sh_eth.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
+index 4721130d6cd3..007f54b5766b 100644
+--- a/drivers/net/ethernet/renesas/sh_eth.c
++++ b/drivers/net/ethernet/renesas/sh_eth.c
+@@ -2074,8 +2074,8 @@ static size_t __sh_eth_get_regs(struct net_device *ndev, u32 *buf)
+ add_reg(CSMR);
+ if (cd->select_mii)
+ add_reg(RMII_MII);
+- add_reg(ARSTR);
+ if (cd->tsu) {
++ add_tsu_reg(ARSTR);
+ add_tsu_reg(TSU_CTRST);
+ add_tsu_reg(TSU_FWEN0);
+ add_tsu_reg(TSU_FWEN1);
+--
+2.19.0
+
diff --git a/patches/0183-mtd-nand-sh_flctl-Use-of_device_get_match_data-helpe.patch b/patches/0183-mtd-nand-sh_flctl-Use-of_device_get_match_data-helpe.patch
new file mode 100644
index 0000000..12628db
--- /dev/null
+++ b/patches/0183-mtd-nand-sh_flctl-Use-of_device_get_match_data-helpe.patch
@@ -0,0 +1,43 @@
+From 3abf36472ac08f2fbec6d7145e9be3050608486c Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 4 Oct 2017 14:19:03 +0200
+Subject: [PATCH 0183/1795] mtd: nand: sh_flctl: Use of_device_get_match_data()
+ helper
+
+Use the of_device_get_match_data() helper instead of open coding.
+While at it, make config const so the cast can be dropped.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
+(cherry picked from commit b8640c5b8bef7e24fe54d2713f4c91b563a65c55)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mtd/nand/sh_flctl.c | 9 +++------
+ 1 file changed, 3 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/mtd/nand/sh_flctl.c b/drivers/mtd/nand/sh_flctl.c
+index e7f3c98487e6..3c5008a4f5f3 100644
+--- a/drivers/mtd/nand/sh_flctl.c
++++ b/drivers/mtd/nand/sh_flctl.c
+@@ -1094,14 +1094,11 @@ MODULE_DEVICE_TABLE(of, of_flctl_match);
+
+ static struct sh_flctl_platform_data *flctl_parse_dt(struct device *dev)
+ {
+- const struct of_device_id *match;
+- struct flctl_soc_config *config;
++ const struct flctl_soc_config *config;
+ struct sh_flctl_platform_data *pdata;
+
+- match = of_match_device(of_flctl_match, dev);
+- if (match)
+- config = (struct flctl_soc_config *)match->data;
+- else {
++ config = of_device_get_match_data(dev);
++ if (!config) {
+ dev_err(dev, "%s: no OF configuration attached\n", __func__);
+ return NULL;
+ }
+--
+2.19.0
+
diff --git a/patches/0184-spi-sh-msiof-Add-compatible-strings-for-r8a774-35.patch b/patches/0184-spi-sh-msiof-Add-compatible-strings-for-r8a774-35.patch
new file mode 100644
index 0000000..67e0eb3
--- /dev/null
+++ b/patches/0184-spi-sh-msiof-Add-compatible-strings-for-r8a774-35.patch
@@ -0,0 +1,31 @@
+From ea1a5b10fb87e748a5bbd4f86a5c77964c58de46 Mon Sep 17 00:00:00 2001
+From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Date: Mon, 25 Sep 2017 09:54:19 +0100
+Subject: [PATCH 0184/1795] spi: sh-msiof: Add compatible strings for
+ r8a774[35]
+
+Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit bdacfc7b6216dd30d07c10732fd4c0a660c62853)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/spi/spi-sh-msiof.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c
+index 0fea18ab970e..aa34f5ef53f7 100644
+--- a/drivers/spi/spi-sh-msiof.c
++++ b/drivers/spi/spi-sh-msiof.c
+@@ -1047,6 +1047,8 @@ static const struct sh_msiof_chipdata rcar_gen3_data = {
+
+ static const struct of_device_id sh_msiof_match[] = {
+ { .compatible = "renesas,sh-mobile-msiof", .data = &sh_data },
++ { .compatible = "renesas,msiof-r8a7743", .data = &rcar_gen2_data },
++ { .compatible = "renesas,msiof-r8a7745", .data = &rcar_gen2_data },
+ { .compatible = "renesas,msiof-r8a7790", .data = &rcar_gen2_data },
+ { .compatible = "renesas,msiof-r8a7791", .data = &rcar_gen2_data },
+ { .compatible = "renesas,msiof-r8a7792", .data = &rcar_gen2_data },
+--
+2.19.0
+
diff --git a/patches/0185-spi-sh-msiof-Add-r8a774-35-to-the-compatible-list.patch b/patches/0185-spi-sh-msiof-Add-r8a774-35-to-the-compatible-list.patch
new file mode 100644
index 0000000..43f2556
--- /dev/null
+++ b/patches/0185-spi-sh-msiof-Add-r8a774-35-to-the-compatible-list.patch
@@ -0,0 +1,43 @@
+From 67bd6ef78195fed562d14ec70a22d9463c81aced Mon Sep 17 00:00:00 2001
+From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Date: Mon, 25 Sep 2017 09:54:20 +0100
+Subject: [PATCH 0185/1795] spi: sh-msiof: Add r8a774[35] to the compatible
+ list
+
+Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 4702f4b23a2fc6196abacf515a959e69176da40e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/spi/sh-msiof.txt | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/spi/sh-msiof.txt b/Documentation/devicetree/bindings/spi/sh-msiof.txt
+index e865855726a2..bdd83959019c 100644
+--- a/Documentation/devicetree/bindings/spi/sh-msiof.txt
++++ b/Documentation/devicetree/bindings/spi/sh-msiof.txt
+@@ -1,7 +1,9 @@
+ Renesas MSIOF spi controller
+
+ Required properties:
+-- compatible : "renesas,msiof-r8a7790" (R-Car H2)
++- compatible : "renesas,msiof-r8a7743" (RZ/G1M)
++ "renesas,msiof-r8a7745" (RZ/G1E)
++ "renesas,msiof-r8a7790" (R-Car H2)
+ "renesas,msiof-r8a7791" (R-Car M2-W)
+ "renesas,msiof-r8a7792" (R-Car V2H)
+ "renesas,msiof-r8a7793" (R-Car M2-N)
+@@ -10,7 +12,7 @@ Required properties:
+ "renesas,msiof-r8a7796" (R-Car M3-W)
+ "renesas,msiof-sh73a0" (SH-Mobile AG5)
+ "renesas,sh-mobile-msiof" (generic SH-Mobile compatibile device)
+- "renesas,rcar-gen2-msiof" (generic R-Car Gen2 compatible device)
++ "renesas,rcar-gen2-msiof" (generic R-Car Gen2 and RZ/G1 compatible device)
+ "renesas,rcar-gen3-msiof" (generic R-Car Gen3 compatible device)
+ "renesas,sh-msiof" (deprecated)
+
+--
+2.19.0
+
diff --git a/patches/0186-spi-sh-msiof-Use-of_device_get_match_data-helper.patch b/patches/0186-spi-sh-msiof-Use-of_device_get_match_data-helper.patch
new file mode 100644
index 0000000..db94878
--- /dev/null
+++ b/patches/0186-spi-sh-msiof-Use-of_device_get_match_data-helper.patch
@@ -0,0 +1,42 @@
+From b0e0fa15176857c986e87d38c2f45a4bbf495b5a Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 4 Oct 2017 14:20:27 +0200
+Subject: [PATCH 0186/1795] spi: sh-msiof: Use of_device_get_match_data()
+ helper
+
+Use the of_device_get_match_data() helper instead of open coding.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit ecb1596aa27856a256b0698a93d7be06ce041e73)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/spi/spi-sh-msiof.c | 6 ++----
+ 1 file changed, 2 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c
+index aa34f5ef53f7..a6e0c9cee35d 100644
+--- a/drivers/spi/spi-sh-msiof.c
++++ b/drivers/spi/spi-sh-msiof.c
+@@ -1237,15 +1237,13 @@ static int sh_msiof_spi_probe(struct platform_device *pdev)
+ struct resource *r;
+ struct spi_master *master;
+ const struct sh_msiof_chipdata *chipdata;
+- const struct of_device_id *of_id;
+ struct sh_msiof_spi_info *info;
+ struct sh_msiof_spi_priv *p;
+ int i;
+ int ret;
+
+- of_id = of_match_device(sh_msiof_match, &pdev->dev);
+- if (of_id) {
+- chipdata = of_id->data;
++ chipdata = of_device_get_match_data(&pdev->dev);
++ if (chipdata) {
+ info = sh_msiof_spi_parse_dt(&pdev->dev);
+ } else {
+ chipdata = (const void *)pdev->id_entry->driver_data;
+--
+2.19.0
+
diff --git a/patches/0187-spi-sh-msiof-remove-redundant-pointer-dev.patch b/patches/0187-spi-sh-msiof-remove-redundant-pointer-dev.patch
new file mode 100644
index 0000000..673eb6f
--- /dev/null
+++ b/patches/0187-spi-sh-msiof-remove-redundant-pointer-dev.patch
@@ -0,0 +1,40 @@
+From c4729360f48c1d6fa951886b6be638a1d106c37d Mon Sep 17 00:00:00 2001
+From: Colin Ian King <colin.king@canonical.com>
+Date: Fri, 3 Nov 2017 13:58:29 +0000
+Subject: [PATCH 0187/1795] spi: sh-msiof: remove redundant pointer dev
+
+The pointer dev is assigned but never read, hence it is redundant
+and can be removed. Cleans up clang warning:
+
+drivers/spi/spi-sh-msiof.c:1198:2: warning: Value stored to 'dev'
+is never read
+
+Signed-off-by: Colin Ian King <colin.king@canonical.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 6ae6678344af52cf1c05475ff3ec2f43b8b532ef)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/spi/spi-sh-msiof.c | 2 --
+ 1 file changed, 2 deletions(-)
+
+diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c
+index a6e0c9cee35d..e607e224bb7c 100644
+--- a/drivers/spi/spi-sh-msiof.c
++++ b/drivers/spi/spi-sh-msiof.c
+@@ -1216,12 +1216,10 @@ static int sh_msiof_request_dma(struct sh_msiof_spi_priv *p)
+ static void sh_msiof_release_dma(struct sh_msiof_spi_priv *p)
+ {
+ struct spi_master *master = p->master;
+- struct device *dev;
+
+ if (!master->dma_tx)
+ return;
+
+- dev = &p->pdev->dev;
+ dma_unmap_single(master->dma_rx->device->dev, p->rx_dma_addr,
+ PAGE_SIZE, DMA_FROM_DEVICE);
+ dma_unmap_single(master->dma_tx->device->dev, p->tx_dma_addr,
+--
+2.19.0
+
diff --git a/patches/0188-pinctrl-sh-pfc-r8a7795-Add-SDHI0-3-support.patch b/patches/0188-pinctrl-sh-pfc-r8a7795-Add-SDHI0-3-support.patch
new file mode 100644
index 0000000..27546be
--- /dev/null
+++ b/patches/0188-pinctrl-sh-pfc-r8a7795-Add-SDHI0-3-support.patch
@@ -0,0 +1,329 @@
+From 1fdf80b6555193fb86504b5d2e522b4ab4a7f231 Mon Sep 17 00:00:00 2001
+From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
+Date: Tue, 29 Aug 2017 17:51:57 +0200
+Subject: [PATCH 0188/1795] pinctrl: sh-pfc: r8a7795: Add SDHI0-3 support
+
+Add SDHI0-3 support for R-Car H3 ES2.0 based on a patch from the Renesas
+BSP. SDHI pin config is identical to H3 ES1.*.
+
+Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
+Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 9ed139586923becc4741c609304eecad6d5ffe53)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 275 +++++++++++++++++++++++++++
+ 1 file changed, 275 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+index 8b35772cda98..b225bc2f9bea 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+@@ -2734,6 +2734,213 @@ static const unsigned int scif5_clk_b_mux[] = {
+ SCK5_B_MARK,
+ };
+
++/* - SDHI0 ------------------------------------------------------------------ */
++static const unsigned int sdhi0_data1_pins[] = {
++ /* D0 */
++ RCAR_GP_PIN(3, 2),
++};
++static const unsigned int sdhi0_data1_mux[] = {
++ SD0_DAT0_MARK,
++};
++static const unsigned int sdhi0_data4_pins[] = {
++ /* D[0:3] */
++ RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3),
++ RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5),
++};
++static const unsigned int sdhi0_data4_mux[] = {
++ SD0_DAT0_MARK, SD0_DAT1_MARK,
++ SD0_DAT2_MARK, SD0_DAT3_MARK,
++};
++static const unsigned int sdhi0_ctrl_pins[] = {
++ /* CLK, CMD */
++ RCAR_GP_PIN(3, 0), RCAR_GP_PIN(3, 1),
++};
++static const unsigned int sdhi0_ctrl_mux[] = {
++ SD0_CLK_MARK, SD0_CMD_MARK,
++};
++static const unsigned int sdhi0_cd_pins[] = {
++ /* CD */
++ RCAR_GP_PIN(3, 12),
++};
++static const unsigned int sdhi0_cd_mux[] = {
++ SD0_CD_MARK,
++};
++static const unsigned int sdhi0_wp_pins[] = {
++ /* WP */
++ RCAR_GP_PIN(3, 13),
++};
++static const unsigned int sdhi0_wp_mux[] = {
++ SD0_WP_MARK,
++};
++/* - SDHI1 ------------------------------------------------------------------ */
++static const unsigned int sdhi1_data1_pins[] = {
++ /* D0 */
++ RCAR_GP_PIN(3, 8),
++};
++static const unsigned int sdhi1_data1_mux[] = {
++ SD1_DAT0_MARK,
++};
++static const unsigned int sdhi1_data4_pins[] = {
++ /* D[0:3] */
++ RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9),
++ RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11),
++};
++static const unsigned int sdhi1_data4_mux[] = {
++ SD1_DAT0_MARK, SD1_DAT1_MARK,
++ SD1_DAT2_MARK, SD1_DAT3_MARK,
++};
++static const unsigned int sdhi1_ctrl_pins[] = {
++ /* CLK, CMD */
++ RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
++};
++static const unsigned int sdhi1_ctrl_mux[] = {
++ SD1_CLK_MARK, SD1_CMD_MARK,
++};
++static const unsigned int sdhi1_cd_pins[] = {
++ /* CD */
++ RCAR_GP_PIN(3, 14),
++};
++static const unsigned int sdhi1_cd_mux[] = {
++ SD1_CD_MARK,
++};
++static const unsigned int sdhi1_wp_pins[] = {
++ /* WP */
++ RCAR_GP_PIN(3, 15),
++};
++static const unsigned int sdhi1_wp_mux[] = {
++ SD1_WP_MARK,
++};
++/* - SDHI2 ------------------------------------------------------------------ */
++static const unsigned int sdhi2_data1_pins[] = {
++ /* D0 */
++ RCAR_GP_PIN(4, 2),
++};
++static const unsigned int sdhi2_data1_mux[] = {
++ SD2_DAT0_MARK,
++};
++static const unsigned int sdhi2_data4_pins[] = {
++ /* D[0:3] */
++ RCAR_GP_PIN(4, 2), RCAR_GP_PIN(4, 3),
++ RCAR_GP_PIN(4, 4), RCAR_GP_PIN(4, 5),
++};
++static const unsigned int sdhi2_data4_mux[] = {
++ SD2_DAT0_MARK, SD2_DAT1_MARK,
++ SD2_DAT2_MARK, SD2_DAT3_MARK,
++};
++static const unsigned int sdhi2_data8_pins[] = {
++ /* D[0:7] */
++ RCAR_GP_PIN(4, 2), RCAR_GP_PIN(4, 3),
++ RCAR_GP_PIN(4, 4), RCAR_GP_PIN(4, 5),
++ RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9),
++ RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11),
++};
++static const unsigned int sdhi2_data8_mux[] = {
++ SD2_DAT0_MARK, SD2_DAT1_MARK,
++ SD2_DAT2_MARK, SD2_DAT3_MARK,
++ SD2_DAT4_MARK, SD2_DAT5_MARK,
++ SD2_DAT6_MARK, SD2_DAT7_MARK,
++};
++static const unsigned int sdhi2_ctrl_pins[] = {
++ /* CLK, CMD */
++ RCAR_GP_PIN(4, 0), RCAR_GP_PIN(4, 1),
++};
++static const unsigned int sdhi2_ctrl_mux[] = {
++ SD2_CLK_MARK, SD2_CMD_MARK,
++};
++static const unsigned int sdhi2_cd_a_pins[] = {
++ /* CD */
++ RCAR_GP_PIN(4, 13),
++};
++static const unsigned int sdhi2_cd_a_mux[] = {
++ SD2_CD_A_MARK,
++};
++static const unsigned int sdhi2_cd_b_pins[] = {
++ /* CD */
++ RCAR_GP_PIN(5, 10),
++};
++static const unsigned int sdhi2_cd_b_mux[] = {
++ SD2_CD_B_MARK,
++};
++static const unsigned int sdhi2_wp_a_pins[] = {
++ /* WP */
++ RCAR_GP_PIN(4, 14),
++};
++static const unsigned int sdhi2_wp_a_mux[] = {
++ SD2_WP_A_MARK,
++};
++static const unsigned int sdhi2_wp_b_pins[] = {
++ /* WP */
++ RCAR_GP_PIN(5, 11),
++};
++static const unsigned int sdhi2_wp_b_mux[] = {
++ SD2_WP_B_MARK,
++};
++static const unsigned int sdhi2_ds_pins[] = {
++ /* DS */
++ RCAR_GP_PIN(4, 6),
++};
++static const unsigned int sdhi2_ds_mux[] = {
++ SD2_DS_MARK,
++};
++/* - SDHI3 ------------------------------------------------------------------ */
++static const unsigned int sdhi3_data1_pins[] = {
++ /* D0 */
++ RCAR_GP_PIN(4, 9),
++};
++static const unsigned int sdhi3_data1_mux[] = {
++ SD3_DAT0_MARK,
++};
++static const unsigned int sdhi3_data4_pins[] = {
++ /* D[0:3] */
++ RCAR_GP_PIN(4, 9), RCAR_GP_PIN(4, 10),
++ RCAR_GP_PIN(4, 11), RCAR_GP_PIN(4, 12),
++};
++static const unsigned int sdhi3_data4_mux[] = {
++ SD3_DAT0_MARK, SD3_DAT1_MARK,
++ SD3_DAT2_MARK, SD3_DAT3_MARK,
++};
++static const unsigned int sdhi3_data8_pins[] = {
++ /* D[0:7] */
++ RCAR_GP_PIN(4, 9), RCAR_GP_PIN(4, 10),
++ RCAR_GP_PIN(4, 11), RCAR_GP_PIN(4, 12),
++ RCAR_GP_PIN(4, 13), RCAR_GP_PIN(4, 14),
++ RCAR_GP_PIN(4, 15), RCAR_GP_PIN(4, 16),
++};
++static const unsigned int sdhi3_data8_mux[] = {
++ SD3_DAT0_MARK, SD3_DAT1_MARK,
++ SD3_DAT2_MARK, SD3_DAT3_MARK,
++ SD3_DAT4_MARK, SD3_DAT5_MARK,
++ SD3_DAT6_MARK, SD3_DAT7_MARK,
++};
++static const unsigned int sdhi3_ctrl_pins[] = {
++ /* CLK, CMD */
++ RCAR_GP_PIN(4, 7), RCAR_GP_PIN(4, 8),
++};
++static const unsigned int sdhi3_ctrl_mux[] = {
++ SD3_CLK_MARK, SD3_CMD_MARK,
++};
++static const unsigned int sdhi3_cd_pins[] = {
++ /* CD */
++ RCAR_GP_PIN(4, 15),
++};
++static const unsigned int sdhi3_cd_mux[] = {
++ SD3_CD_MARK,
++};
++static const unsigned int sdhi3_wp_pins[] = {
++ /* WP */
++ RCAR_GP_PIN(4, 16),
++};
++static const unsigned int sdhi3_wp_mux[] = {
++ SD3_WP_MARK,
++};
++static const unsigned int sdhi3_ds_pins[] = {
++ /* DS */
++ RCAR_GP_PIN(4, 17),
++};
++static const unsigned int sdhi3_ds_mux[] = {
++ SD3_DS_MARK,
++};
++
+ /* - SCIF Clock ------------------------------------------------------------- */
+ static const unsigned int scif_clk_a_pins[] = {
+ /* SCIF_CLK */
+@@ -2943,6 +3150,32 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(scif5_clk_b),
+ SH_PFC_PIN_GROUP(scif_clk_a),
+ SH_PFC_PIN_GROUP(scif_clk_b),
++ SH_PFC_PIN_GROUP(sdhi0_data1),
++ SH_PFC_PIN_GROUP(sdhi0_data4),
++ SH_PFC_PIN_GROUP(sdhi0_ctrl),
++ SH_PFC_PIN_GROUP(sdhi0_cd),
++ SH_PFC_PIN_GROUP(sdhi0_wp),
++ SH_PFC_PIN_GROUP(sdhi1_data1),
++ SH_PFC_PIN_GROUP(sdhi1_data4),
++ SH_PFC_PIN_GROUP(sdhi1_ctrl),
++ SH_PFC_PIN_GROUP(sdhi1_cd),
++ SH_PFC_PIN_GROUP(sdhi1_wp),
++ SH_PFC_PIN_GROUP(sdhi2_data1),
++ SH_PFC_PIN_GROUP(sdhi2_data4),
++ SH_PFC_PIN_GROUP(sdhi2_data8),
++ SH_PFC_PIN_GROUP(sdhi2_ctrl),
++ SH_PFC_PIN_GROUP(sdhi2_cd_a),
++ SH_PFC_PIN_GROUP(sdhi2_wp_a),
++ SH_PFC_PIN_GROUP(sdhi2_cd_b),
++ SH_PFC_PIN_GROUP(sdhi2_wp_b),
++ SH_PFC_PIN_GROUP(sdhi2_ds),
++ SH_PFC_PIN_GROUP(sdhi3_data1),
++ SH_PFC_PIN_GROUP(sdhi3_data4),
++ SH_PFC_PIN_GROUP(sdhi3_data8),
++ SH_PFC_PIN_GROUP(sdhi3_ctrl),
++ SH_PFC_PIN_GROUP(sdhi3_cd),
++ SH_PFC_PIN_GROUP(sdhi3_wp),
++ SH_PFC_PIN_GROUP(sdhi3_ds),
+ SH_PFC_PIN_GROUP(usb0),
+ SH_PFC_PIN_GROUP(usb1),
+ SH_PFC_PIN_GROUP(usb2),
+@@ -3168,6 +3401,44 @@ static const char * const scif_clk_groups[] = {
+ "scif_clk_b",
+ };
+
++static const char * const sdhi0_groups[] = {
++ "sdhi0_data1",
++ "sdhi0_data4",
++ "sdhi0_ctrl",
++ "sdhi0_cd",
++ "sdhi0_wp",
++};
++
++static const char * const sdhi1_groups[] = {
++ "sdhi1_data1",
++ "sdhi1_data4",
++ "sdhi1_ctrl",
++ "sdhi1_cd",
++ "sdhi1_wp",
++};
++
++static const char * const sdhi2_groups[] = {
++ "sdhi2_data1",
++ "sdhi2_data4",
++ "sdhi2_data8",
++ "sdhi2_ctrl",
++ "sdhi2_cd_a",
++ "sdhi2_wp_a",
++ "sdhi2_cd_b",
++ "sdhi2_wp_b",
++ "sdhi2_ds",
++};
++
++static const char * const sdhi3_groups[] = {
++ "sdhi3_data1",
++ "sdhi3_data4",
++ "sdhi3_data8",
++ "sdhi3_ctrl",
++ "sdhi3_cd",
++ "sdhi3_wp",
++ "sdhi3_ds",
++};
++
+ static const char * const usb0_groups[] = {
+ "usb0",
+ };
+@@ -3205,6 +3476,10 @@ static const struct sh_pfc_function pinmux_functions[] = {
+ SH_PFC_FUNCTION(scif4),
+ SH_PFC_FUNCTION(scif5),
+ SH_PFC_FUNCTION(scif_clk),
++ SH_PFC_FUNCTION(sdhi0),
++ SH_PFC_FUNCTION(sdhi1),
++ SH_PFC_FUNCTION(sdhi2),
++ SH_PFC_FUNCTION(sdhi3),
+ SH_PFC_FUNCTION(usb0),
+ SH_PFC_FUNCTION(usb1),
+ SH_PFC_FUNCTION(usb2),
+--
+2.19.0
+
diff --git a/patches/0189-pinctrl-sh-pfc-r8a7795-Re-add-DRIF-support.patch b/patches/0189-pinctrl-sh-pfc-r8a7795-Re-add-DRIF-support.patch
new file mode 100644
index 0000000..572d492
--- /dev/null
+++ b/patches/0189-pinctrl-sh-pfc-r8a7795-Re-add-DRIF-support.patch
@@ -0,0 +1,347 @@
+From faffef37ed192db1d74b641328a420a552ed7e78 Mon Sep 17 00:00:00 2001
+From: Dirk Behme <dirk.behme@de.bosch.com>
+Date: Wed, 30 Aug 2017 10:05:48 +0200
+Subject: [PATCH 0189/1795] pinctrl: sh-pfc: r8a7795: Re-add DRIF support
+
+DRIF support for r8a7795 was initially added with commit 2d775831988
+("pinctrl: sh-pfc: r8a7795: Add DRIF support") and later dropped from
+the new pfc-r8a7795.c while re-naming the initial pfc-r8a7795.c to
+pfc-r8a7795-es1.c in commit b205914c8f8 ("pinctrl: sh-pfc: r8a7795:
+Add support for R-Car H3 ES2.0"). As the DRIF doesn't differ, re-add
+it here.
+
+Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 641b0ab8029119d777cb248ef20f920d288b322a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 291 +++++++++++++++++++++++++++
+ 1 file changed, 291 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+index b225bc2f9bea..9e420f7fed72 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+@@ -1659,6 +1659,221 @@ static const unsigned int avb_avtp_capture_b_mux[] = {
+ AVB_AVTP_CAPTURE_B_MARK,
+ };
+
++/* - DRIF0 --------------------------------------------------------------- */
++static const unsigned int drif0_ctrl_a_pins[] = {
++ /* CLK, SYNC */
++ RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
++};
++static const unsigned int drif0_ctrl_a_mux[] = {
++ RIF0_CLK_A_MARK, RIF0_SYNC_A_MARK,
++};
++static const unsigned int drif0_data0_a_pins[] = {
++ /* D0 */
++ RCAR_GP_PIN(6, 10),
++};
++static const unsigned int drif0_data0_a_mux[] = {
++ RIF0_D0_A_MARK,
++};
++static const unsigned int drif0_data1_a_pins[] = {
++ /* D1 */
++ RCAR_GP_PIN(6, 7),
++};
++static const unsigned int drif0_data1_a_mux[] = {
++ RIF0_D1_A_MARK,
++};
++static const unsigned int drif0_ctrl_b_pins[] = {
++ /* CLK, SYNC */
++ RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 4),
++};
++static const unsigned int drif0_ctrl_b_mux[] = {
++ RIF0_CLK_B_MARK, RIF0_SYNC_B_MARK,
++};
++static const unsigned int drif0_data0_b_pins[] = {
++ /* D0 */
++ RCAR_GP_PIN(5, 1),
++};
++static const unsigned int drif0_data0_b_mux[] = {
++ RIF0_D0_B_MARK,
++};
++static const unsigned int drif0_data1_b_pins[] = {
++ /* D1 */
++ RCAR_GP_PIN(5, 2),
++};
++static const unsigned int drif0_data1_b_mux[] = {
++ RIF0_D1_B_MARK,
++};
++static const unsigned int drif0_ctrl_c_pins[] = {
++ /* CLK, SYNC */
++ RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 15),
++};
++static const unsigned int drif0_ctrl_c_mux[] = {
++ RIF0_CLK_C_MARK, RIF0_SYNC_C_MARK,
++};
++static const unsigned int drif0_data0_c_pins[] = {
++ /* D0 */
++ RCAR_GP_PIN(5, 13),
++};
++static const unsigned int drif0_data0_c_mux[] = {
++ RIF0_D0_C_MARK,
++};
++static const unsigned int drif0_data1_c_pins[] = {
++ /* D1 */
++ RCAR_GP_PIN(5, 14),
++};
++static const unsigned int drif0_data1_c_mux[] = {
++ RIF0_D1_C_MARK,
++};
++/* - DRIF1 --------------------------------------------------------------- */
++static const unsigned int drif1_ctrl_a_pins[] = {
++ /* CLK, SYNC */
++ RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),
++};
++static const unsigned int drif1_ctrl_a_mux[] = {
++ RIF1_CLK_A_MARK, RIF1_SYNC_A_MARK,
++};
++static const unsigned int drif1_data0_a_pins[] = {
++ /* D0 */
++ RCAR_GP_PIN(6, 19),
++};
++static const unsigned int drif1_data0_a_mux[] = {
++ RIF1_D0_A_MARK,
++};
++static const unsigned int drif1_data1_a_pins[] = {
++ /* D1 */
++ RCAR_GP_PIN(6, 20),
++};
++static const unsigned int drif1_data1_a_mux[] = {
++ RIF1_D1_A_MARK,
++};
++static const unsigned int drif1_ctrl_b_pins[] = {
++ /* CLK, SYNC */
++ RCAR_GP_PIN(5, 9), RCAR_GP_PIN(5, 3),
++};
++static const unsigned int drif1_ctrl_b_mux[] = {
++ RIF1_CLK_B_MARK, RIF1_SYNC_B_MARK,
++};
++static const unsigned int drif1_data0_b_pins[] = {
++ /* D0 */
++ RCAR_GP_PIN(5, 7),
++};
++static const unsigned int drif1_data0_b_mux[] = {
++ RIF1_D0_B_MARK,
++};
++static const unsigned int drif1_data1_b_pins[] = {
++ /* D1 */
++ RCAR_GP_PIN(5, 8),
++};
++static const unsigned int drif1_data1_b_mux[] = {
++ RIF1_D1_B_MARK,
++};
++static const unsigned int drif1_ctrl_c_pins[] = {
++ /* CLK, SYNC */
++ RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 11),
++};
++static const unsigned int drif1_ctrl_c_mux[] = {
++ RIF1_CLK_C_MARK, RIF1_SYNC_C_MARK,
++};
++static const unsigned int drif1_data0_c_pins[] = {
++ /* D0 */
++ RCAR_GP_PIN(5, 6),
++};
++static const unsigned int drif1_data0_c_mux[] = {
++ RIF1_D0_C_MARK,
++};
++static const unsigned int drif1_data1_c_pins[] = {
++ /* D1 */
++ RCAR_GP_PIN(5, 10),
++};
++static const unsigned int drif1_data1_c_mux[] = {
++ RIF1_D1_C_MARK,
++};
++/* - DRIF2 --------------------------------------------------------------- */
++static const unsigned int drif2_ctrl_a_pins[] = {
++ /* CLK, SYNC */
++ RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
++};
++static const unsigned int drif2_ctrl_a_mux[] = {
++ RIF2_CLK_A_MARK, RIF2_SYNC_A_MARK,
++};
++static const unsigned int drif2_data0_a_pins[] = {
++ /* D0 */
++ RCAR_GP_PIN(6, 7),
++};
++static const unsigned int drif2_data0_a_mux[] = {
++ RIF2_D0_A_MARK,
++};
++static const unsigned int drif2_data1_a_pins[] = {
++ /* D1 */
++ RCAR_GP_PIN(6, 10),
++};
++static const unsigned int drif2_data1_a_mux[] = {
++ RIF2_D1_A_MARK,
++};
++static const unsigned int drif2_ctrl_b_pins[] = {
++ /* CLK, SYNC */
++ RCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27),
++};
++static const unsigned int drif2_ctrl_b_mux[] = {
++ RIF2_CLK_B_MARK, RIF2_SYNC_B_MARK,
++};
++static const unsigned int drif2_data0_b_pins[] = {
++ /* D0 */
++ RCAR_GP_PIN(6, 30),
++};
++static const unsigned int drif2_data0_b_mux[] = {
++ RIF2_D0_B_MARK,
++};
++static const unsigned int drif2_data1_b_pins[] = {
++ /* D1 */
++ RCAR_GP_PIN(6, 31),
++};
++static const unsigned int drif2_data1_b_mux[] = {
++ RIF2_D1_B_MARK,
++};
++/* - DRIF3 --------------------------------------------------------------- */
++static const unsigned int drif3_ctrl_a_pins[] = {
++ /* CLK, SYNC */
++ RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),
++};
++static const unsigned int drif3_ctrl_a_mux[] = {
++ RIF3_CLK_A_MARK, RIF3_SYNC_A_MARK,
++};
++static const unsigned int drif3_data0_a_pins[] = {
++ /* D0 */
++ RCAR_GP_PIN(6, 19),
++};
++static const unsigned int drif3_data0_a_mux[] = {
++ RIF3_D0_A_MARK,
++};
++static const unsigned int drif3_data1_a_pins[] = {
++ /* D1 */
++ RCAR_GP_PIN(6, 20),
++};
++static const unsigned int drif3_data1_a_mux[] = {
++ RIF3_D1_A_MARK,
++};
++static const unsigned int drif3_ctrl_b_pins[] = {
++ /* CLK, SYNC */
++ RCAR_GP_PIN(6, 24), RCAR_GP_PIN(6, 25),
++};
++static const unsigned int drif3_ctrl_b_mux[] = {
++ RIF3_CLK_B_MARK, RIF3_SYNC_B_MARK,
++};
++static const unsigned int drif3_data0_b_pins[] = {
++ /* D0 */
++ RCAR_GP_PIN(6, 28),
++};
++static const unsigned int drif3_data0_b_mux[] = {
++ RIF3_D0_B_MARK,
++};
++static const unsigned int drif3_data1_b_pins[] = {
++ /* D1 */
++ RCAR_GP_PIN(6, 29),
++};
++static const unsigned int drif3_data1_b_mux[] = {
++ RIF3_D1_B_MARK,
++};
++
+ /* - DU --------------------------------------------------------------------- */
+ static const unsigned int du_rgb666_pins[] = {
+ /* R[7:2], G[7:2], B[7:2] */
+@@ -3001,6 +3216,36 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(avb_avtp_capture_a),
+ SH_PFC_PIN_GROUP(avb_avtp_match_b),
+ SH_PFC_PIN_GROUP(avb_avtp_capture_b),
++ SH_PFC_PIN_GROUP(drif0_ctrl_a),
++ SH_PFC_PIN_GROUP(drif0_data0_a),
++ SH_PFC_PIN_GROUP(drif0_data1_a),
++ SH_PFC_PIN_GROUP(drif0_ctrl_b),
++ SH_PFC_PIN_GROUP(drif0_data0_b),
++ SH_PFC_PIN_GROUP(drif0_data1_b),
++ SH_PFC_PIN_GROUP(drif0_ctrl_c),
++ SH_PFC_PIN_GROUP(drif0_data0_c),
++ SH_PFC_PIN_GROUP(drif0_data1_c),
++ SH_PFC_PIN_GROUP(drif1_ctrl_a),
++ SH_PFC_PIN_GROUP(drif1_data0_a),
++ SH_PFC_PIN_GROUP(drif1_data1_a),
++ SH_PFC_PIN_GROUP(drif1_ctrl_b),
++ SH_PFC_PIN_GROUP(drif1_data0_b),
++ SH_PFC_PIN_GROUP(drif1_data1_b),
++ SH_PFC_PIN_GROUP(drif1_ctrl_c),
++ SH_PFC_PIN_GROUP(drif1_data0_c),
++ SH_PFC_PIN_GROUP(drif1_data1_c),
++ SH_PFC_PIN_GROUP(drif2_ctrl_a),
++ SH_PFC_PIN_GROUP(drif2_data0_a),
++ SH_PFC_PIN_GROUP(drif2_data1_a),
++ SH_PFC_PIN_GROUP(drif2_ctrl_b),
++ SH_PFC_PIN_GROUP(drif2_data0_b),
++ SH_PFC_PIN_GROUP(drif2_data1_b),
++ SH_PFC_PIN_GROUP(drif3_ctrl_a),
++ SH_PFC_PIN_GROUP(drif3_data0_a),
++ SH_PFC_PIN_GROUP(drif3_data1_a),
++ SH_PFC_PIN_GROUP(drif3_ctrl_b),
++ SH_PFC_PIN_GROUP(drif3_data0_b),
++ SH_PFC_PIN_GROUP(drif3_data1_b),
+ SH_PFC_PIN_GROUP(du_rgb666),
+ SH_PFC_PIN_GROUP(du_rgb888),
+ SH_PFC_PIN_GROUP(du_clk_out_0),
+@@ -3195,6 +3440,48 @@ static const char * const avb_groups[] = {
+ "avb_avtp_capture_b",
+ };
+
++static const char * const drif0_groups[] = {
++ "drif0_ctrl_a",
++ "drif0_data0_a",
++ "drif0_data1_a",
++ "drif0_ctrl_b",
++ "drif0_data0_b",
++ "drif0_data1_b",
++ "drif0_ctrl_c",
++ "drif0_data0_c",
++ "drif0_data1_c",
++};
++
++static const char * const drif1_groups[] = {
++ "drif1_ctrl_a",
++ "drif1_data0_a",
++ "drif1_data1_a",
++ "drif1_ctrl_b",
++ "drif1_data0_b",
++ "drif1_data1_b",
++ "drif1_ctrl_c",
++ "drif1_data0_c",
++ "drif1_data1_c",
++};
++
++static const char * const drif2_groups[] = {
++ "drif2_ctrl_a",
++ "drif2_data0_a",
++ "drif2_data1_a",
++ "drif2_ctrl_b",
++ "drif2_data0_b",
++ "drif2_data1_b",
++};
++
++static const char * const drif3_groups[] = {
++ "drif3_ctrl_a",
++ "drif3_data0_a",
++ "drif3_data1_a",
++ "drif3_ctrl_b",
++ "drif3_data0_b",
++ "drif3_data1_b",
++};
++
+ static const char * const du_groups[] = {
+ "du_rgb666",
+ "du_rgb888",
+@@ -3457,6 +3744,10 @@ static const char * const usb2_ch3_groups[] = {
+
+ static const struct sh_pfc_function pinmux_functions[] = {
+ SH_PFC_FUNCTION(avb),
++ SH_PFC_FUNCTION(drif0),
++ SH_PFC_FUNCTION(drif1),
++ SH_PFC_FUNCTION(drif2),
++ SH_PFC_FUNCTION(drif3),
+ SH_PFC_FUNCTION(du),
+ SH_PFC_FUNCTION(msiof0),
+ SH_PFC_FUNCTION(msiof1),
+--
+2.19.0
+
diff --git a/patches/0190-pinctrl-sh-pfc-r8a77995-Add-EthernetAVB-pins-groups-.patch b/patches/0190-pinctrl-sh-pfc-r8a77995-Add-EthernetAVB-pins-groups-.patch
new file mode 100644
index 0000000..0a17e9f
--- /dev/null
+++ b/patches/0190-pinctrl-sh-pfc-r8a77995-Add-EthernetAVB-pins-groups-.patch
@@ -0,0 +1,169 @@
+From 0eecbed85ed9dea53b414b53d04e37cd94ddeecd Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 14 Sep 2017 08:52:42 +0900
+Subject: [PATCH 0190/1795] pinctrl: sh-pfc: r8a77995: Add EthernetAVB pins,
+ groups and functions
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 66abd968d0ef3eb10dea45b48a31321eb29258f8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a77995.c | 119 ++++++++++++++++++++++++++
+ 1 file changed, 119 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
+index 4f5ee1d7317d..9fc4296f9a84 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
+@@ -936,6 +936,99 @@ static const struct sh_pfc_pin pinmux_pins[] = {
+ PINMUX_GPIO_GP_ALL(),
+ };
+
++/* - EtherAVB --------------------------------------------------------------- */
++static const unsigned int avb0_link_pins[] = {
++ /* AVB0_LINK */
++ RCAR_GP_PIN(5, 20),
++};
++static const unsigned int avb0_link_mux[] = {
++ AVB0_LINK_MARK,
++};
++static const unsigned int avb0_magic_pins[] = {
++ /* AVB0_MAGIC */
++ RCAR_GP_PIN(5, 18),
++};
++static const unsigned int avb0_magic_mux[] = {
++ AVB0_MAGIC_MARK,
++};
++static const unsigned int avb0_phy_int_pins[] = {
++ /* AVB0_PHY_INT */
++ RCAR_GP_PIN(5, 19),
++};
++static const unsigned int avb0_phy_int_mux[] = {
++ AVB0_PHY_INT_MARK,
++};
++static const unsigned int avb0_mdc_pins[] = {
++ /* AVB0_MDC, AVB0_MDIO */
++ RCAR_GP_PIN(5, 17), RCAR_GP_PIN(5, 16),
++};
++static const unsigned int avb0_mdc_mux[] = {
++ AVB0_MDC_MARK, AVB0_MDIO_MARK,
++};
++static const unsigned int avb0_mii_pins[] = {
++ /*
++ * AVB0_TX_CTL, AVB0_TXC, AVB0_TD0,
++ * AVB0_TD1, AVB0_TD2, AVB0_TD3,
++ * AVB0_RX_CTL, AVB0_RXC, AVB0_RD0,
++ * AVB0_RD1, AVB0_RD2, AVB0_RD3,
++ * AVB0_TXCREFCLK
++ */
++ RCAR_GP_PIN(5, 9), RCAR_GP_PIN(5, 10), RCAR_GP_PIN(5, 11),
++ RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 14),
++ RCAR_GP_PIN(5, 3), RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 5),
++ RCAR_GP_PIN(5, 6), RCAR_GP_PIN(5, 7), RCAR_GP_PIN(5, 8),
++ RCAR_GP_PIN(5, 15),
++};
++static const unsigned int avb0_mii_mux[] = {
++ AVB0_TX_CTL_MARK, AVB0_TXC_MARK, AVB0_TD0_MARK,
++ AVB0_TD1_MARK, AVB0_TD2_MARK, AVB0_TD3_MARK,
++ AVB0_RX_CTL_MARK, AVB0_RXC_MARK, AVB0_RD0_MARK,
++ AVB0_RD1_MARK, AVB0_RD2_MARK, AVB0_RD3_MARK,
++ AVB0_TXCREFCLK_MARK,
++};
++static const unsigned int avb0_avtp_pps_a_pins[] = {
++ /* AVB0_AVTP_PPS_A */
++ RCAR_GP_PIN(5, 2),
++};
++static const unsigned int avb0_avtp_pps_a_mux[] = {
++ AVB0_AVTP_PPS_A_MARK,
++};
++static const unsigned int avb0_avtp_match_a_pins[] = {
++ /* AVB0_AVTP_MATCH_A */
++ RCAR_GP_PIN(5, 1),
++};
++static const unsigned int avb0_avtp_match_a_mux[] = {
++ AVB0_AVTP_MATCH_A_MARK,
++};
++static const unsigned int avb0_avtp_capture_a_pins[] = {
++ /* AVB0_AVTP_CAPTURE_A */
++ RCAR_GP_PIN(5, 0),
++};
++static const unsigned int avb0_avtp_capture_a_mux[] = {
++ AVB0_AVTP_CAPTURE_A_MARK,
++};
++static const unsigned int avb0_avtp_pps_b_pins[] = {
++ /* AVB0_AVTP_PPS_B */
++ RCAR_GP_PIN(4, 16),
++};
++static const unsigned int avb0_avtp_pps_b_mux[] = {
++ AVB0_AVTP_PPS_B_MARK,
++};
++static const unsigned int avb0_avtp_match_b_pins[] = {
++ /* AVB0_AVTP_MATCH_B */
++ RCAR_GP_PIN(4, 18),
++};
++static const unsigned int avb0_avtp_match_b_mux[] = {
++ AVB0_AVTP_MATCH_B_MARK,
++};
++static const unsigned int avb0_avtp_capture_b_pins[] = {
++ /* AVB0_AVTP_CAPTURE_B */
++ RCAR_GP_PIN(4, 17),
++};
++static const unsigned int avb0_avtp_capture_b_mux[] = {
++ AVB0_AVTP_CAPTURE_B_MARK,
++};
++
+ /* - I2C -------------------------------------------------------------------- */
+ static const unsigned int i2c0_pins[] = {
+ /* SCL, SDA */
+@@ -1203,6 +1296,17 @@ static const unsigned int scif_clk_mux[] = {
+ };
+
+ static const struct sh_pfc_pin_group pinmux_groups[] = {
++ SH_PFC_PIN_GROUP(avb0_link),
++ SH_PFC_PIN_GROUP(avb0_magic),
++ SH_PFC_PIN_GROUP(avb0_phy_int),
++ SH_PFC_PIN_GROUP(avb0_mdc),
++ SH_PFC_PIN_GROUP(avb0_mii),
++ SH_PFC_PIN_GROUP(avb0_avtp_pps_a),
++ SH_PFC_PIN_GROUP(avb0_avtp_match_a),
++ SH_PFC_PIN_GROUP(avb0_avtp_capture_a),
++ SH_PFC_PIN_GROUP(avb0_avtp_pps_b),
++ SH_PFC_PIN_GROUP(avb0_avtp_match_b),
++ SH_PFC_PIN_GROUP(avb0_avtp_capture_b),
+ SH_PFC_PIN_GROUP(i2c0),
+ SH_PFC_PIN_GROUP(i2c1),
+ SH_PFC_PIN_GROUP(i2c2_a),
+@@ -1240,6 +1344,20 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(scif_clk),
+ };
+
++static const char * const avb0_groups[] = {
++ "avb0_link",
++ "avb0_magic",
++ "avb0_phy_int",
++ "avb0_mdc",
++ "avb0_mii",
++ "avb0_avtp_pps_a",
++ "avb0_avtp_match_a",
++ "avb0_avtp_capture_a",
++ "avb0_avtp_pps_b",
++ "avb0_avtp_match_b",
++ "avb0_avtp_capture_b",
++};
++
+ static const char * const i2c0_groups[] = {
+ "i2c0",
+ };
+@@ -1311,6 +1429,7 @@ static const char * const scif_clk_groups[] = {
+ };
+
+ static const struct sh_pfc_function pinmux_functions[] = {
++ SH_PFC_FUNCTION(avb0),
+ SH_PFC_FUNCTION(i2c0),
+ SH_PFC_FUNCTION(i2c1),
+ SH_PFC_FUNCTION(i2c2),
+--
+2.19.0
+
diff --git a/patches/0191-pinctrl-sh-pfc-r8a77995-Add-USB2.0-host-support.patch b/patches/0191-pinctrl-sh-pfc-r8a77995-Add-USB2.0-host-support.patch
new file mode 100644
index 0000000..2a85e80
--- /dev/null
+++ b/patches/0191-pinctrl-sh-pfc-r8a77995-Add-USB2.0-host-support.patch
@@ -0,0 +1,65 @@
+From d283c17cce8762e0c84211116bcd2c71f5644260 Mon Sep 17 00:00:00 2001
+From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
+Date: Thu, 14 Sep 2017 19:29:21 +0900
+Subject: [PATCH 0191/1795] pinctrl: sh-pfc: r8a77995: Add USB2.0 host support
+
+Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit f814def530c442bd0765db3fa7fd6f5ba4d466ca)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a77995.c | 15 +++++++++++++++
+ 1 file changed, 15 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
+index 9fc4296f9a84..442ff0f23243 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
+@@ -1295,6 +1295,15 @@ static const unsigned int scif_clk_mux[] = {
+ SCIF_CLK_MARK,
+ };
+
++/* - USB0 ------------------------------------------------------------------- */
++static const unsigned int usb0_pins[] = {
++ /* PWEN, OVC */
++ RCAR_GP_PIN(0, 0), RCAR_GP_PIN(0, 1),
++};
++static const unsigned int usb0_mux[] = {
++ USB0_PWEN_MARK, USB0_OVC_MARK,
++};
++
+ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(avb0_link),
+ SH_PFC_PIN_GROUP(avb0_magic),
+@@ -1342,6 +1351,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(scif5_data_b),
+ SH_PFC_PIN_GROUP(scif5_clk_b),
+ SH_PFC_PIN_GROUP(scif_clk),
++ SH_PFC_PIN_GROUP(usb0),
+ };
+
+ static const char * const avb0_groups[] = {
+@@ -1428,6 +1438,10 @@ static const char * const scif_clk_groups[] = {
+ "scif_clk",
+ };
+
++static const char * const usb0_groups[] = {
++ "usb0",
++};
++
+ static const struct sh_pfc_function pinmux_functions[] = {
+ SH_PFC_FUNCTION(avb0),
+ SH_PFC_FUNCTION(i2c0),
+@@ -1442,6 +1456,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
+ SH_PFC_FUNCTION(scif4),
+ SH_PFC_FUNCTION(scif5),
+ SH_PFC_FUNCTION(scif_clk),
++ SH_PFC_FUNCTION(usb0),
+ };
+
+ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
+--
+2.19.0
+
diff --git a/patches/0192-pinctrl-sh-pfc-r8a7795-es1-Add-USB3.0-host-support.patch b/patches/0192-pinctrl-sh-pfc-r8a7795-es1-Add-USB3.0-host-support.patch
new file mode 100644
index 0000000..6b21960
--- /dev/null
+++ b/patches/0192-pinctrl-sh-pfc-r8a7795-es1-Add-USB3.0-host-support.patch
@@ -0,0 +1,83 @@
+From 65dec1fa430cdb44d63eaa12740369abc0d8262d Mon Sep 17 00:00:00 2001
+From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
+Date: Mon, 2 Oct 2017 18:45:24 +0900
+Subject: [PATCH 0192/1795] pinctrl: sh-pfc: r8a7795-es1: Add USB3.0 host
+ support
+
+This patch adds USB3{0,1} (USB3.0 host) pinmux support to R8A7795 ES1.x
+SoC.
+
+Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 3627126ce39d8c7d35a9251b074fedd2edf9f743)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c | 29 ++++++++++++++++++++++++
+ 1 file changed, 29 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
+index ad037534aa13..294f4b44944e 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
+@@ -3101,6 +3101,23 @@ static const unsigned int pwm6_b_mux[] = {
+ PWM6_B_MARK,
+ };
+
++/* - USB30 ------------------------------------------------------------------ */
++static const unsigned int usb30_pins[] = {
++ /* PWEN, OVC */
++ RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 29),
++};
++static const unsigned int usb30_mux[] = {
++ USB30_PWEN_MARK, USB30_OVC_MARK,
++};
++/* - USB31 ------------------------------------------------------------------ */
++static const unsigned int usb31_pins[] = {
++ /* PWEN, OVC */
++ RCAR_GP_PIN(6, 30), RCAR_GP_PIN(6, 31),
++};
++static const unsigned int usb31_mux[] = {
++ USB31_PWEN_MARK, USB31_OVC_MARK,
++};
++
+ /* - QSPI0 ------------------------------------------------------------------ */
+ static const unsigned int qspi0_ctrl_pins[] = {
+ /* QSPI0_SPCLK, QSPI0_SSL */
+@@ -4080,6 +4097,8 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(usb0),
+ SH_PFC_PIN_GROUP(usb1),
+ SH_PFC_PIN_GROUP(usb2),
++ SH_PFC_PIN_GROUP(usb30),
++ SH_PFC_PIN_GROUP(usb31),
+ };
+
+ static const char * const audio_clk_groups[] = {
+@@ -4537,6 +4556,14 @@ static const char * const usb2_groups[] = {
+ "usb2",
+ };
+
++static const char * const usb30_groups[] = {
++ "usb30",
++};
++
++static const char * const usb31_groups[] = {
++ "usb31",
++};
++
+ static const struct sh_pfc_function pinmux_functions[] = {
+ SH_PFC_FUNCTION(audio_clk),
+ SH_PFC_FUNCTION(avb),
+@@ -4588,6 +4615,8 @@ static const struct sh_pfc_function pinmux_functions[] = {
+ SH_PFC_FUNCTION(usb0),
+ SH_PFC_FUNCTION(usb1),
+ SH_PFC_FUNCTION(usb2),
++ SH_PFC_FUNCTION(usb30),
++ SH_PFC_FUNCTION(usb31),
+ };
+
+ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
+--
+2.19.0
+
diff --git a/patches/0193-pinctrl-sh-pfc-r8a7795-Add-USB3.0-host-support.patch b/patches/0193-pinctrl-sh-pfc-r8a7795-Add-USB3.0-host-support.patch
new file mode 100644
index 0000000..42fa77f
--- /dev/null
+++ b/patches/0193-pinctrl-sh-pfc-r8a7795-Add-USB3.0-host-support.patch
@@ -0,0 +1,67 @@
+From e4acae7e4bc39578d12c117975906e290e9c9eb2 Mon Sep 17 00:00:00 2001
+From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
+Date: Mon, 2 Oct 2017 18:45:25 +0900
+Subject: [PATCH 0193/1795] pinctrl: sh-pfc: r8a7795: Add USB3.0 host support
+
+This patch adds USB3.0 ch0 pinmux support to R8A7795 SoC.
+
+Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 5ec8a41a36715cf543cb7c109097fb3b4cdfb427)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 15 +++++++++++++++
+ 1 file changed, 15 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+index 9e420f7fed72..351855b36f69 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+@@ -3205,6 +3205,15 @@ static const unsigned int usb2_ch3_mux[] = {
+ USB2_CH3_PWEN_MARK, USB2_CH3_OVC_MARK,
+ };
+
++/* - USB30 ------------------------------------------------------------------ */
++static const unsigned int usb30_pins[] = {
++ /* PWEN, OVC */
++ RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 29),
++};
++static const unsigned int usb30_mux[] = {
++ USB30_PWEN_MARK, USB30_OVC_MARK,
++};
++
+ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(avb_link),
+ SH_PFC_PIN_GROUP(avb_magic),
+@@ -3425,6 +3434,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(usb1),
+ SH_PFC_PIN_GROUP(usb2),
+ SH_PFC_PIN_GROUP(usb2_ch3),
++ SH_PFC_PIN_GROUP(usb30),
+ };
+
+ static const char * const avb_groups[] = {
+@@ -3742,6 +3752,10 @@ static const char * const usb2_ch3_groups[] = {
+ "usb2_ch3",
+ };
+
++static const char * const usb30_groups[] = {
++ "usb30",
++};
++
+ static const struct sh_pfc_function pinmux_functions[] = {
+ SH_PFC_FUNCTION(avb),
+ SH_PFC_FUNCTION(drif0),
+@@ -3775,6 +3789,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
+ SH_PFC_FUNCTION(usb1),
+ SH_PFC_FUNCTION(usb2),
+ SH_PFC_FUNCTION(usb2_ch3),
++ SH_PFC_FUNCTION(usb30),
+ };
+
+ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
+--
+2.19.0
+
diff --git a/patches/0194-pinctrl-sh-pfc-r8a7795-Add-Audio-clock-pin-support.patch b/patches/0194-pinctrl-sh-pfc-r8a7795-Add-Audio-clock-pin-support.patch
new file mode 100644
index 0000000..dfa297c
--- /dev/null
+++ b/patches/0194-pinctrl-sh-pfc-r8a7795-Add-Audio-clock-pin-support.patch
@@ -0,0 +1,209 @@
+From 6abda81d300c632161f73f14523952c01c19bad3 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 3 Oct 2017 02:22:51 +0000
+Subject: [PATCH 0194/1795] pinctrl: sh-pfc: r8a7795: Add Audio clock pin
+ support
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 55bfea9fdc05e3559164f3d58777d9a28ec42bc5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 159 +++++++++++++++++++++++++++
+ 1 file changed, 159 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+index 351855b36f69..3363453c4e4e 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+@@ -1572,6 +1572,127 @@ static const struct sh_pfc_pin pinmux_pins[] = {
+ SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 30, ASEBRK, CFG_FLAGS),
+ };
+
++/* - AUDIO CLOCK ------------------------------------------------------------ */
++static const unsigned int audio_clk_a_a_pins[] = {
++ /* CLK A */
++ RCAR_GP_PIN(6, 22),
++};
++static const unsigned int audio_clk_a_a_mux[] = {
++ AUDIO_CLKA_A_MARK,
++};
++static const unsigned int audio_clk_a_b_pins[] = {
++ /* CLK A */
++ RCAR_GP_PIN(5, 4),
++};
++static const unsigned int audio_clk_a_b_mux[] = {
++ AUDIO_CLKA_B_MARK,
++};
++static const unsigned int audio_clk_a_c_pins[] = {
++ /* CLK A */
++ RCAR_GP_PIN(5, 19),
++};
++static const unsigned int audio_clk_a_c_mux[] = {
++ AUDIO_CLKA_C_MARK,
++};
++static const unsigned int audio_clk_b_a_pins[] = {
++ /* CLK B */
++ RCAR_GP_PIN(5, 12),
++};
++static const unsigned int audio_clk_b_a_mux[] = {
++ AUDIO_CLKB_A_MARK,
++};
++static const unsigned int audio_clk_b_b_pins[] = {
++ /* CLK B */
++ RCAR_GP_PIN(6, 23),
++};
++static const unsigned int audio_clk_b_b_mux[] = {
++ AUDIO_CLKB_B_MARK,
++};
++static const unsigned int audio_clk_c_a_pins[] = {
++ /* CLK C */
++ RCAR_GP_PIN(5, 21),
++};
++static const unsigned int audio_clk_c_a_mux[] = {
++ AUDIO_CLKC_A_MARK,
++};
++static const unsigned int audio_clk_c_b_pins[] = {
++ /* CLK C */
++ RCAR_GP_PIN(5, 0),
++};
++static const unsigned int audio_clk_c_b_mux[] = {
++ AUDIO_CLKC_B_MARK,
++};
++static const unsigned int audio_clkout_a_pins[] = {
++ /* CLKOUT */
++ RCAR_GP_PIN(5, 18),
++};
++static const unsigned int audio_clkout_a_mux[] = {
++ AUDIO_CLKOUT_A_MARK,
++};
++static const unsigned int audio_clkout_b_pins[] = {
++ /* CLKOUT */
++ RCAR_GP_PIN(6, 28),
++};
++static const unsigned int audio_clkout_b_mux[] = {
++ AUDIO_CLKOUT_B_MARK,
++};
++static const unsigned int audio_clkout_c_pins[] = {
++ /* CLKOUT */
++ RCAR_GP_PIN(5, 3),
++};
++static const unsigned int audio_clkout_c_mux[] = {
++ AUDIO_CLKOUT_C_MARK,
++};
++static const unsigned int audio_clkout_d_pins[] = {
++ /* CLKOUT */
++ RCAR_GP_PIN(5, 21),
++};
++static const unsigned int audio_clkout_d_mux[] = {
++ AUDIO_CLKOUT_D_MARK,
++};
++static const unsigned int audio_clkout1_a_pins[] = {
++ /* CLKOUT1 */
++ RCAR_GP_PIN(5, 15),
++};
++static const unsigned int audio_clkout1_a_mux[] = {
++ AUDIO_CLKOUT1_A_MARK,
++};
++static const unsigned int audio_clkout1_b_pins[] = {
++ /* CLKOUT1 */
++ RCAR_GP_PIN(6, 29),
++};
++static const unsigned int audio_clkout1_b_mux[] = {
++ AUDIO_CLKOUT1_B_MARK,
++};
++static const unsigned int audio_clkout2_a_pins[] = {
++ /* CLKOUT2 */
++ RCAR_GP_PIN(5, 16),
++};
++static const unsigned int audio_clkout2_a_mux[] = {
++ AUDIO_CLKOUT2_A_MARK,
++};
++static const unsigned int audio_clkout2_b_pins[] = {
++ /* CLKOUT2 */
++ RCAR_GP_PIN(6, 30),
++};
++static const unsigned int audio_clkout2_b_mux[] = {
++ AUDIO_CLKOUT2_B_MARK,
++};
++static const unsigned int audio_clkout3_a_pins[] = {
++ /* CLKOUT3 */
++ RCAR_GP_PIN(5, 19),
++};
++static const unsigned int audio_clkout3_a_mux[] = {
++ AUDIO_CLKOUT3_A_MARK,
++};
++static const unsigned int audio_clkout3_b_pins[] = {
++ /* CLKOUT3 */
++ RCAR_GP_PIN(6, 31),
++};
++static const unsigned int audio_clkout3_b_mux[] = {
++ AUDIO_CLKOUT3_B_MARK,
++};
++
+ /* - EtherAVB --------------------------------------------------------------- */
+ static const unsigned int avb_link_pins[] = {
+ /* AVB_LINK */
+@@ -3215,6 +3336,23 @@ static const unsigned int usb30_mux[] = {
+ };
+
+ static const struct sh_pfc_pin_group pinmux_groups[] = {
++ SH_PFC_PIN_GROUP(audio_clk_a_a),
++ SH_PFC_PIN_GROUP(audio_clk_a_b),
++ SH_PFC_PIN_GROUP(audio_clk_a_c),
++ SH_PFC_PIN_GROUP(audio_clk_b_a),
++ SH_PFC_PIN_GROUP(audio_clk_b_b),
++ SH_PFC_PIN_GROUP(audio_clk_c_a),
++ SH_PFC_PIN_GROUP(audio_clk_c_b),
++ SH_PFC_PIN_GROUP(audio_clkout_a),
++ SH_PFC_PIN_GROUP(audio_clkout_b),
++ SH_PFC_PIN_GROUP(audio_clkout_c),
++ SH_PFC_PIN_GROUP(audio_clkout_d),
++ SH_PFC_PIN_GROUP(audio_clkout1_a),
++ SH_PFC_PIN_GROUP(audio_clkout1_b),
++ SH_PFC_PIN_GROUP(audio_clkout2_a),
++ SH_PFC_PIN_GROUP(audio_clkout2_b),
++ SH_PFC_PIN_GROUP(audio_clkout3_a),
++ SH_PFC_PIN_GROUP(audio_clkout3_b),
+ SH_PFC_PIN_GROUP(avb_link),
+ SH_PFC_PIN_GROUP(avb_magic),
+ SH_PFC_PIN_GROUP(avb_phy_int),
+@@ -3437,6 +3575,26 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(usb30),
+ };
+
++static const char * const audio_clk_groups[] = {
++ "audio_clk_a_a",
++ "audio_clk_a_b",
++ "audio_clk_a_c",
++ "audio_clk_b_a",
++ "audio_clk_b_b",
++ "audio_clk_c_a",
++ "audio_clk_c_b",
++ "audio_clkout_a",
++ "audio_clkout_b",
++ "audio_clkout_c",
++ "audio_clkout_d",
++ "audio_clkout1_a",
++ "audio_clkout1_b",
++ "audio_clkout2_a",
++ "audio_clkout2_b",
++ "audio_clkout3_a",
++ "audio_clkout3_b",
++};
++
+ static const char * const avb_groups[] = {
+ "avb_link",
+ "avb_magic",
+@@ -3757,6 +3915,7 @@ static const char * const usb30_groups[] = {
+ };
+
+ static const struct sh_pfc_function pinmux_functions[] = {
++ SH_PFC_FUNCTION(audio_clk),
+ SH_PFC_FUNCTION(avb),
+ SH_PFC_FUNCTION(drif0),
+ SH_PFC_FUNCTION(drif1),
+--
+2.19.0
+
diff --git a/patches/0195-pinctrl-sh-pfc-r8a7795-Add-Audio-SSI-pin-support.patch b/patches/0195-pinctrl-sh-pfc-r8a7795-Add-Audio-SSI-pin-support.patch
new file mode 100644
index 0000000..3d6f0d8
--- /dev/null
+++ b/patches/0195-pinctrl-sh-pfc-r8a7795-Add-Audio-SSI-pin-support.patch
@@ -0,0 +1,280 @@
+From ea7d11c0372f0c1dbb73c24f42a11896daa92ccf Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 3 Oct 2017 02:23:11 +0000
+Subject: [PATCH 0195/1795] pinctrl: sh-pfc: r8a7795: Add Audio SSI pin support
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 0526234d6786c749ca6014edc6dd1242dfe1ddac)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 231 +++++++++++++++++++++++++++
+ 1 file changed, 231 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+index 3363453c4e4e..3712b9187c61 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+@@ -3277,6 +3277,183 @@ static const unsigned int sdhi3_ds_mux[] = {
+ SD3_DS_MARK,
+ };
+
++/* - SSI -------------------------------------------------------------------- */
++static const unsigned int ssi0_data_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(6, 2),
++};
++static const unsigned int ssi0_data_mux[] = {
++ SSI_SDATA0_MARK,
++};
++static const unsigned int ssi01239_ctrl_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(6, 0), RCAR_GP_PIN(6, 1),
++};
++static const unsigned int ssi01239_ctrl_mux[] = {
++ SSI_SCK01239_MARK, SSI_WS01239_MARK,
++};
++static const unsigned int ssi1_data_a_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(6, 3),
++};
++static const unsigned int ssi1_data_a_mux[] = {
++ SSI_SDATA1_A_MARK,
++};
++static const unsigned int ssi1_data_b_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(5, 12),
++};
++static const unsigned int ssi1_data_b_mux[] = {
++ SSI_SDATA1_B_MARK,
++};
++static const unsigned int ssi1_ctrl_a_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27),
++};
++static const unsigned int ssi1_ctrl_a_mux[] = {
++ SSI_SCK1_A_MARK, SSI_WS1_A_MARK,
++};
++static const unsigned int ssi1_ctrl_b_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(6, 4), RCAR_GP_PIN(6, 21),
++};
++static const unsigned int ssi1_ctrl_b_mux[] = {
++ SSI_SCK1_B_MARK, SSI_WS1_B_MARK,
++};
++static const unsigned int ssi2_data_a_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(6, 4),
++};
++static const unsigned int ssi2_data_a_mux[] = {
++ SSI_SDATA2_A_MARK,
++};
++static const unsigned int ssi2_data_b_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(5, 13),
++};
++static const unsigned int ssi2_data_b_mux[] = {
++ SSI_SDATA2_B_MARK,
++};
++static const unsigned int ssi2_ctrl_a_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(5, 19), RCAR_GP_PIN(5, 21),
++};
++static const unsigned int ssi2_ctrl_a_mux[] = {
++ SSI_SCK2_A_MARK, SSI_WS2_A_MARK,
++};
++static const unsigned int ssi2_ctrl_b_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 29),
++};
++static const unsigned int ssi2_ctrl_b_mux[] = {
++ SSI_SCK2_B_MARK, SSI_WS2_B_MARK,
++};
++static const unsigned int ssi3_data_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(6, 7),
++};
++static const unsigned int ssi3_data_mux[] = {
++ SSI_SDATA3_MARK,
++};
++static const unsigned int ssi349_ctrl_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(6, 5), RCAR_GP_PIN(6, 6),
++};
++static const unsigned int ssi349_ctrl_mux[] = {
++ SSI_SCK349_MARK, SSI_WS349_MARK,
++};
++static const unsigned int ssi4_data_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(6, 10),
++};
++static const unsigned int ssi4_data_mux[] = {
++ SSI_SDATA4_MARK,
++};
++static const unsigned int ssi4_ctrl_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
++};
++static const unsigned int ssi4_ctrl_mux[] = {
++ SSI_SCK4_MARK, SSI_WS4_MARK,
++};
++static const unsigned int ssi5_data_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(6, 13),
++};
++static const unsigned int ssi5_data_mux[] = {
++ SSI_SDATA5_MARK,
++};
++static const unsigned int ssi5_ctrl_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(6, 11), RCAR_GP_PIN(6, 12),
++};
++static const unsigned int ssi5_ctrl_mux[] = {
++ SSI_SCK5_MARK, SSI_WS5_MARK,
++};
++static const unsigned int ssi6_data_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(6, 16),
++};
++static const unsigned int ssi6_data_mux[] = {
++ SSI_SDATA6_MARK,
++};
++static const unsigned int ssi6_ctrl_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(6, 14), RCAR_GP_PIN(6, 15),
++};
++static const unsigned int ssi6_ctrl_mux[] = {
++ SSI_SCK6_MARK, SSI_WS6_MARK,
++};
++static const unsigned int ssi7_data_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(6, 19),
++};
++static const unsigned int ssi7_data_mux[] = {
++ SSI_SDATA7_MARK,
++};
++static const unsigned int ssi78_ctrl_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),
++};
++static const unsigned int ssi78_ctrl_mux[] = {
++ SSI_SCK78_MARK, SSI_WS78_MARK,
++};
++static const unsigned int ssi8_data_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(6, 20),
++};
++static const unsigned int ssi8_data_mux[] = {
++ SSI_SDATA8_MARK,
++};
++static const unsigned int ssi9_data_a_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(6, 21),
++};
++static const unsigned int ssi9_data_a_mux[] = {
++ SSI_SDATA9_A_MARK,
++};
++static const unsigned int ssi9_data_b_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(5, 14),
++};
++static const unsigned int ssi9_data_b_mux[] = {
++ SSI_SDATA9_B_MARK,
++};
++static const unsigned int ssi9_ctrl_a_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 16),
++};
++static const unsigned int ssi9_ctrl_a_mux[] = {
++ SSI_SCK9_A_MARK, SSI_WS9_A_MARK,
++};
++static const unsigned int ssi9_ctrl_b_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(6, 30), RCAR_GP_PIN(6, 31),
++};
++static const unsigned int ssi9_ctrl_b_mux[] = {
++ SSI_SCK9_B_MARK, SSI_WS9_B_MARK,
++};
++
+ /* - SCIF Clock ------------------------------------------------------------- */
+ static const unsigned int scif_clk_a_pins[] = {
+ /* SCIF_CLK */
+@@ -3568,6 +3745,31 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(sdhi3_cd),
+ SH_PFC_PIN_GROUP(sdhi3_wp),
+ SH_PFC_PIN_GROUP(sdhi3_ds),
++ SH_PFC_PIN_GROUP(ssi0_data),
++ SH_PFC_PIN_GROUP(ssi01239_ctrl),
++ SH_PFC_PIN_GROUP(ssi1_data_a),
++ SH_PFC_PIN_GROUP(ssi1_data_b),
++ SH_PFC_PIN_GROUP(ssi1_ctrl_a),
++ SH_PFC_PIN_GROUP(ssi1_ctrl_b),
++ SH_PFC_PIN_GROUP(ssi2_data_a),
++ SH_PFC_PIN_GROUP(ssi2_data_b),
++ SH_PFC_PIN_GROUP(ssi2_ctrl_a),
++ SH_PFC_PIN_GROUP(ssi2_ctrl_b),
++ SH_PFC_PIN_GROUP(ssi3_data),
++ SH_PFC_PIN_GROUP(ssi349_ctrl),
++ SH_PFC_PIN_GROUP(ssi4_data),
++ SH_PFC_PIN_GROUP(ssi4_ctrl),
++ SH_PFC_PIN_GROUP(ssi5_data),
++ SH_PFC_PIN_GROUP(ssi5_ctrl),
++ SH_PFC_PIN_GROUP(ssi6_data),
++ SH_PFC_PIN_GROUP(ssi6_ctrl),
++ SH_PFC_PIN_GROUP(ssi7_data),
++ SH_PFC_PIN_GROUP(ssi78_ctrl),
++ SH_PFC_PIN_GROUP(ssi8_data),
++ SH_PFC_PIN_GROUP(ssi9_data_a),
++ SH_PFC_PIN_GROUP(ssi9_data_b),
++ SH_PFC_PIN_GROUP(ssi9_ctrl_a),
++ SH_PFC_PIN_GROUP(ssi9_ctrl_b),
+ SH_PFC_PIN_GROUP(usb0),
+ SH_PFC_PIN_GROUP(usb1),
+ SH_PFC_PIN_GROUP(usb2),
+@@ -3894,6 +4096,34 @@ static const char * const sdhi3_groups[] = {
+ "sdhi3_ds",
+ };
+
++static const char * const ssi_groups[] = {
++ "ssi0_data",
++ "ssi01239_ctrl",
++ "ssi1_data_a",
++ "ssi1_data_b",
++ "ssi1_ctrl_a",
++ "ssi1_ctrl_b",
++ "ssi2_data_a",
++ "ssi2_data_b",
++ "ssi2_ctrl_a",
++ "ssi2_ctrl_b",
++ "ssi3_data",
++ "ssi349_ctrl",
++ "ssi4_data",
++ "ssi4_ctrl",
++ "ssi5_data",
++ "ssi5_ctrl",
++ "ssi6_data",
++ "ssi6_ctrl",
++ "ssi7_data",
++ "ssi78_ctrl",
++ "ssi8_data",
++ "ssi9_data_a",
++ "ssi9_data_b",
++ "ssi9_ctrl_a",
++ "ssi9_ctrl_b",
++};
++
+ static const char * const usb0_groups[] = {
+ "usb0",
+ };
+@@ -3944,6 +4174,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
+ SH_PFC_FUNCTION(sdhi1),
+ SH_PFC_FUNCTION(sdhi2),
+ SH_PFC_FUNCTION(sdhi3),
++ SH_PFC_FUNCTION(ssi),
+ SH_PFC_FUNCTION(usb0),
+ SH_PFC_FUNCTION(usb1),
+ SH_PFC_FUNCTION(usb2),
+--
+2.19.0
+
diff --git a/patches/0196-pinctrl-sh-pfc-r8a77995-Add-PWM-pins-groups-and-func.patch b/patches/0196-pinctrl-sh-pfc-r8a77995-Add-PWM-pins-groups-and-func.patch
new file mode 100644
index 0000000..7ddf7c3
--- /dev/null
+++ b/patches/0196-pinctrl-sh-pfc-r8a77995-Add-PWM-pins-groups-and-func.patch
@@ -0,0 +1,205 @@
+From 4174b933d38d248091e3296ab287f2d1b307e512 Mon Sep 17 00:00:00 2001
+From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
+Date: Wed, 4 Oct 2017 19:22:39 +0900
+Subject: [PATCH 0196/1795] pinctrl: sh-pfc: r8a77995: Add PWM pins, groups and
+ functions
+
+This patch adds support for PWM on r8a77995.
+
+Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 47bb129679cc4cf0bdeb145694082fc0b074c947)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a77995.c | 152 ++++++++++++++++++++++++++
+ 1 file changed, 152 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
+index 442ff0f23243..3f67b8d4f050 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
+@@ -1111,6 +1111,118 @@ static const unsigned int mmc_ctrl_mux[] = {
+ MMC_CLK_MARK, MMC_CMD_MARK,
+ };
+
++/* - PWM0 ------------------------------------------------------------------ */
++static const unsigned int pwm0_a_pins[] = {
++ /* PWM */
++ RCAR_GP_PIN(2, 1),
++};
++
++static const unsigned int pwm0_a_mux[] = {
++ PWM0_A_MARK,
++};
++
++static const unsigned int pwm0_b_pins[] = {
++ /* PWM */
++ RCAR_GP_PIN(1, 18),
++};
++
++static const unsigned int pwm0_b_mux[] = {
++ PWM0_B_MARK,
++};
++
++static const unsigned int pwm0_c_pins[] = {
++ /* PWM */
++ RCAR_GP_PIN(2, 29),
++};
++
++static const unsigned int pwm0_c_mux[] = {
++ PWM0_C_MARK,
++};
++
++/* - PWM1 ------------------------------------------------------------------ */
++static const unsigned int pwm1_a_pins[] = {
++ /* PWM */
++ RCAR_GP_PIN(2, 2),
++};
++
++static const unsigned int pwm1_a_mux[] = {
++ PWM1_A_MARK,
++};
++
++static const unsigned int pwm1_b_pins[] = {
++ /* PWM */
++ RCAR_GP_PIN(1, 19),
++};
++
++static const unsigned int pwm1_b_mux[] = {
++ PWM1_B_MARK,
++};
++
++static const unsigned int pwm1_c_pins[] = {
++ /* PWM */
++ RCAR_GP_PIN(2, 30),
++};
++
++static const unsigned int pwm1_c_mux[] = {
++ PWM1_C_MARK,
++};
++
++/* - PWM2 ------------------------------------------------------------------ */
++static const unsigned int pwm2_a_pins[] = {
++ /* PWM */
++ RCAR_GP_PIN(2, 3),
++};
++
++static const unsigned int pwm2_a_mux[] = {
++ PWM2_A_MARK,
++};
++
++static const unsigned int pwm2_b_pins[] = {
++ /* PWM */
++ RCAR_GP_PIN(1, 22),
++};
++
++static const unsigned int pwm2_b_mux[] = {
++ PWM2_B_MARK,
++};
++
++static const unsigned int pwm2_c_pins[] = {
++ /* PWM */
++ RCAR_GP_PIN(2, 31),
++};
++
++static const unsigned int pwm2_c_mux[] = {
++ PWM2_C_MARK,
++};
++
++/* - PWM3 ------------------------------------------------------------------ */
++static const unsigned int pwm3_a_pins[] = {
++ /* PWM */
++ RCAR_GP_PIN(2, 4),
++};
++
++static const unsigned int pwm3_a_mux[] = {
++ PWM3_A_MARK,
++};
++
++static const unsigned int pwm3_b_pins[] = {
++ /* PWM */
++ RCAR_GP_PIN(1, 27),
++};
++
++static const unsigned int pwm3_b_mux[] = {
++ PWM3_B_MARK,
++};
++
++static const unsigned int pwm3_c_pins[] = {
++ /* PWM */
++ RCAR_GP_PIN(4, 0),
++};
++
++static const unsigned int pwm3_c_mux[] = {
++ PWM3_C_MARK,
++};
++
+ /* - SCIF0 ------------------------------------------------------------------ */
+ static const unsigned int scif0_data_a_pins[] = {
+ /* RX, TX */
+@@ -1326,6 +1438,18 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(mmc_data4),
+ SH_PFC_PIN_GROUP(mmc_data8),
+ SH_PFC_PIN_GROUP(mmc_ctrl),
++ SH_PFC_PIN_GROUP(pwm0_a),
++ SH_PFC_PIN_GROUP(pwm0_b),
++ SH_PFC_PIN_GROUP(pwm0_c),
++ SH_PFC_PIN_GROUP(pwm1_a),
++ SH_PFC_PIN_GROUP(pwm1_b),
++ SH_PFC_PIN_GROUP(pwm1_c),
++ SH_PFC_PIN_GROUP(pwm2_a),
++ SH_PFC_PIN_GROUP(pwm2_b),
++ SH_PFC_PIN_GROUP(pwm2_c),
++ SH_PFC_PIN_GROUP(pwm3_a),
++ SH_PFC_PIN_GROUP(pwm3_b),
++ SH_PFC_PIN_GROUP(pwm3_c),
+ SH_PFC_PIN_GROUP(scif0_data_a),
+ SH_PFC_PIN_GROUP(scif0_clk_a),
+ SH_PFC_PIN_GROUP(scif0_data_b),
+@@ -1392,6 +1516,30 @@ static const char * const mmc_groups[] = {
+ "mmc_ctrl",
+ };
+
++static const char * const pwm0_groups[] = {
++ "pwm0_a",
++ "pwm0_b",
++ "pwm0_c",
++};
++
++static const char * const pwm1_groups[] = {
++ "pwm1_a",
++ "pwm1_b",
++ "pwm1_c",
++};
++
++static const char * const pwm2_groups[] = {
++ "pwm2_a",
++ "pwm2_b",
++ "pwm2_c",
++};
++
++static const char * const pwm3_groups[] = {
++ "pwm3_a",
++ "pwm3_b",
++ "pwm3_c",
++};
++
+ static const char * const scif0_groups[] = {
+ "scif0_data_a",
+ "scif0_clk_a",
+@@ -1449,6 +1597,10 @@ static const struct sh_pfc_function pinmux_functions[] = {
+ SH_PFC_FUNCTION(i2c2),
+ SH_PFC_FUNCTION(i2c3),
+ SH_PFC_FUNCTION(mmc),
++ SH_PFC_FUNCTION(pwm0),
++ SH_PFC_FUNCTION(pwm1),
++ SH_PFC_FUNCTION(pwm2),
++ SH_PFC_FUNCTION(pwm3),
+ SH_PFC_FUNCTION(scif0),
+ SH_PFC_FUNCTION(scif1),
+ SH_PFC_FUNCTION(scif2),
+--
+2.19.0
+
diff --git a/patches/0197-pinctrl-sh-pfc-r8a7795-Add-I2C-pin-support.patch b/patches/0197-pinctrl-sh-pfc-r8a7795-Add-I2C-pin-support.patch
new file mode 100644
index 0000000..f05d717
--- /dev/null
+++ b/patches/0197-pinctrl-sh-pfc-r8a7795-Add-I2C-pin-support.patch
@@ -0,0 +1,136 @@
+From 213f4ddc0bdd5ad207bc2e2137918799756d9687 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Wed, 4 Oct 2017 17:52:52 +0200
+Subject: [PATCH 0197/1795] pinctrl: sh-pfc: r8a7795: Add I2C pin support
+
+Since pinmuxing for I2C is equal on H3 ES1.0 and later versions, copy
+the I2C settings from ES1.0. Fixes this error in upstream for
+Salvator-XS:
+
+sh-pfc e6060000.pin-controller: function 'i2c2' not supported
+sh-pfc e6060000.pin-controller: invalid function i2c2 in map table
+i2c-rcar: probe of e6510000.i2c failed with error -22
+
+Now, the bus works the same as with other Salvator boards.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit f62d4c9efd809b9eff28fb755d7249716d98a7af)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 77 ++++++++++++++++++++++++++++
+ 1 file changed, 77 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+index 3712b9187c61..df6a95bce4f8 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+@@ -2076,6 +2076,57 @@ static const unsigned int du_disp_mux[] = {
+ DU_DISP_MARK,
+ };
+
++/* - I2C -------------------------------------------------------------------- */
++static const unsigned int i2c1_a_pins[] = {
++ /* SDA, SCL */
++ RCAR_GP_PIN(5, 11), RCAR_GP_PIN(5, 10),
++};
++static const unsigned int i2c1_a_mux[] = {
++ SDA1_A_MARK, SCL1_A_MARK,
++};
++static const unsigned int i2c1_b_pins[] = {
++ /* SDA, SCL */
++ RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 23),
++};
++static const unsigned int i2c1_b_mux[] = {
++ SDA1_B_MARK, SCL1_B_MARK,
++};
++static const unsigned int i2c2_a_pins[] = {
++ /* SDA, SCL */
++ RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 4),
++};
++static const unsigned int i2c2_a_mux[] = {
++ SDA2_A_MARK, SCL2_A_MARK,
++};
++static const unsigned int i2c2_b_pins[] = {
++ /* SDA, SCL */
++ RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 12),
++};
++static const unsigned int i2c2_b_mux[] = {
++ SDA2_B_MARK, SCL2_B_MARK,
++};
++static const unsigned int i2c6_a_pins[] = {
++ /* SDA, SCL */
++ RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 11),
++};
++static const unsigned int i2c6_a_mux[] = {
++ SDA6_A_MARK, SCL6_A_MARK,
++};
++static const unsigned int i2c6_b_pins[] = {
++ /* SDA, SCL */
++ RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25),
++};
++static const unsigned int i2c6_b_mux[] = {
++ SDA6_B_MARK, SCL6_B_MARK,
++};
++static const unsigned int i2c6_c_pins[] = {
++ /* SDA, SCL */
++ RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14),
++};
++static const unsigned int i2c6_c_mux[] = {
++ SDA6_C_MARK, SCL6_C_MARK,
++};
++
+ /* - MSIOF0 ----------------------------------------------------------------- */
+ static const unsigned int msiof0_clk_pins[] = {
+ /* SCK */
+@@ -3578,6 +3629,13 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(du_oddf),
+ SH_PFC_PIN_GROUP(du_cde),
+ SH_PFC_PIN_GROUP(du_disp),
++ SH_PFC_PIN_GROUP(i2c1_a),
++ SH_PFC_PIN_GROUP(i2c1_b),
++ SH_PFC_PIN_GROUP(i2c2_a),
++ SH_PFC_PIN_GROUP(i2c2_b),
++ SH_PFC_PIN_GROUP(i2c6_a),
++ SH_PFC_PIN_GROUP(i2c6_b),
++ SH_PFC_PIN_GROUP(i2c6_c),
+ SH_PFC_PIN_GROUP(msiof0_clk),
+ SH_PFC_PIN_GROUP(msiof0_sync),
+ SH_PFC_PIN_GROUP(msiof0_ss1),
+@@ -3863,6 +3921,22 @@ static const char * const du_groups[] = {
+ "du_disp",
+ };
+
++static const char * const i2c1_groups[] = {
++ "i2c1_a",
++ "i2c1_b",
++};
++
++static const char * const i2c2_groups[] = {
++ "i2c2_a",
++ "i2c2_b",
++};
++
++static const char * const i2c6_groups[] = {
++ "i2c6_a",
++ "i2c6_b",
++ "i2c6_c",
++};
++
+ static const char * const msiof0_groups[] = {
+ "msiof0_clk",
+ "msiof0_sync",
+@@ -4152,6 +4226,9 @@ static const struct sh_pfc_function pinmux_functions[] = {
+ SH_PFC_FUNCTION(drif2),
+ SH_PFC_FUNCTION(drif3),
+ SH_PFC_FUNCTION(du),
++ SH_PFC_FUNCTION(i2c1),
++ SH_PFC_FUNCTION(i2c2),
++ SH_PFC_FUNCTION(i2c6),
+ SH_PFC_FUNCTION(msiof0),
+ SH_PFC_FUNCTION(msiof1),
+ SH_PFC_FUNCTION(msiof2),
+--
+2.19.0
+
diff --git a/patches/0198-pinctrl-sh-pfc-r8a7795-es1-Restore-sort-order.patch b/patches/0198-pinctrl-sh-pfc-r8a7795-es1-Restore-sort-order.patch
new file mode 100644
index 0000000..e1c923d
--- /dev/null
+++ b/patches/0198-pinctrl-sh-pfc-r8a7795-es1-Restore-sort-order.patch
@@ -0,0 +1,70 @@
+From ad8d9f1bb36ebe45f94985b378412e4592562033 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 5 Oct 2017 12:12:51 +0200
+Subject: [PATCH 0198/1795] pinctrl: sh-pfc: r8a7795-es1: Restore sort order
+
+Move the USB30 pins where they belong.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit abc053c869b6f185d2eece2aa407d82014f22280)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c | 34 ++++++++++++------------
+ 1 file changed, 17 insertions(+), 17 deletions(-)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
+index 294f4b44944e..e7fdfa4efeaa 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
+@@ -3101,23 +3101,6 @@ static const unsigned int pwm6_b_mux[] = {
+ PWM6_B_MARK,
+ };
+
+-/* - USB30 ------------------------------------------------------------------ */
+-static const unsigned int usb30_pins[] = {
+- /* PWEN, OVC */
+- RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 29),
+-};
+-static const unsigned int usb30_mux[] = {
+- USB30_PWEN_MARK, USB30_OVC_MARK,
+-};
+-/* - USB31 ------------------------------------------------------------------ */
+-static const unsigned int usb31_pins[] = {
+- /* PWEN, OVC */
+- RCAR_GP_PIN(6, 30), RCAR_GP_PIN(6, 31),
+-};
+-static const unsigned int usb31_mux[] = {
+- USB31_PWEN_MARK, USB31_OVC_MARK,
+-};
+-
+ /* - QSPI0 ------------------------------------------------------------------ */
+ static const unsigned int qspi0_ctrl_pins[] = {
+ /* QSPI0_SPCLK, QSPI0_SSL */
+@@ -3791,6 +3774,23 @@ static const unsigned int usb2_mux[] = {
+ USB2_PWEN_MARK, USB2_OVC_MARK,
+ };
+
++/* - USB30 ------------------------------------------------------------------ */
++static const unsigned int usb30_pins[] = {
++ /* PWEN, OVC */
++ RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 29),
++};
++static const unsigned int usb30_mux[] = {
++ USB30_PWEN_MARK, USB30_OVC_MARK,
++};
++/* - USB31 ------------------------------------------------------------------ */
++static const unsigned int usb31_pins[] = {
++ /* PWEN, OVC */
++ RCAR_GP_PIN(6, 30), RCAR_GP_PIN(6, 31),
++};
++static const unsigned int usb31_mux[] = {
++ USB31_PWEN_MARK, USB31_OVC_MARK,
++};
++
+ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(audio_clk_a_a),
+ SH_PFC_PIN_GROUP(audio_clk_a_b),
+--
+2.19.0
+
diff --git a/patches/0199-pinctrl-sh-pfc-r8a7795-Restore-sort-order.patch b/patches/0199-pinctrl-sh-pfc-r8a7795-Restore-sort-order.patch
new file mode 100644
index 0000000..c30ad62
--- /dev/null
+++ b/patches/0199-pinctrl-sh-pfc-r8a7795-Restore-sort-order.patch
@@ -0,0 +1,68 @@
+From c59efdbac6bb1bdd4b6e9fbf9578cfc300570a02 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 5 Oct 2017 12:14:00 +0200
+Subject: [PATCH 0199/1795] pinctrl: sh-pfc: r8a7795: Restore sort order
+
+Move the SCIF_CLK pins where they belong.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit b4062b46daabc6c0e88fa8dde8e2128138713b48)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 32 ++++++++++++++--------------
+ 1 file changed, 16 insertions(+), 16 deletions(-)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+index df6a95bce4f8..9772a6c7b303 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+@@ -3121,6 +3121,22 @@ static const unsigned int scif5_clk_b_mux[] = {
+ SCK5_B_MARK,
+ };
+
++/* - SCIF Clock ------------------------------------------------------------- */
++static const unsigned int scif_clk_a_pins[] = {
++ /* SCIF_CLK */
++ RCAR_GP_PIN(6, 23),
++};
++static const unsigned int scif_clk_a_mux[] = {
++ SCIF_CLK_A_MARK,
++};
++static const unsigned int scif_clk_b_pins[] = {
++ /* SCIF_CLK */
++ RCAR_GP_PIN(5, 9),
++};
++static const unsigned int scif_clk_b_mux[] = {
++ SCIF_CLK_B_MARK,
++};
++
+ /* - SDHI0 ------------------------------------------------------------------ */
+ static const unsigned int sdhi0_data1_pins[] = {
+ /* D0 */
+@@ -3505,22 +3521,6 @@ static const unsigned int ssi9_ctrl_b_mux[] = {
+ SSI_SCK9_B_MARK, SSI_WS9_B_MARK,
+ };
+
+-/* - SCIF Clock ------------------------------------------------------------- */
+-static const unsigned int scif_clk_a_pins[] = {
+- /* SCIF_CLK */
+- RCAR_GP_PIN(6, 23),
+-};
+-static const unsigned int scif_clk_a_mux[] = {
+- SCIF_CLK_A_MARK,
+-};
+-static const unsigned int scif_clk_b_pins[] = {
+- /* SCIF_CLK */
+- RCAR_GP_PIN(5, 9),
+-};
+-static const unsigned int scif_clk_b_mux[] = {
+- SCIF_CLK_B_MARK,
+-};
+-
+ /* - USB0 ------------------------------------------------------------------- */
+ static const unsigned int usb0_pins[] = {
+ /* PWEN, OVC */
+--
+2.19.0
+
diff --git a/patches/0200-pinctrl-sh-pfc-r8a7795-Add-INTC-EX-pins-groups-and-f.patch b/patches/0200-pinctrl-sh-pfc-r8a7795-Add-INTC-EX-pins-groups-and-f.patch
new file mode 100644
index 0000000..638dbdf
--- /dev/null
+++ b/patches/0200-pinctrl-sh-pfc-r8a7795-Add-INTC-EX-pins-groups-and-f.patch
@@ -0,0 +1,114 @@
+From e399da1134e4c85fc880d32e73fc9bfa18ef0ee4 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 13 Mar 2017 11:59:42 +0100
+Subject: [PATCH 0200/1795] pinctrl: sh-pfc: r8a7795: Add INTC-EX pins, groups
+ and function
+
+Add pins, groups, and a function for the INTC-EX interrupt controller on
+R-Car H3 ES2.0.
+
+Extracted from a big patch in the BSP by Takeshi Kihara.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 8480e6ca800046d14bfc610a24f2317341250b04)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 60 ++++++++++++++++++++++++++++
+ 1 file changed, 60 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+index 9772a6c7b303..22201fc37420 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+@@ -2127,6 +2127,50 @@ static const unsigned int i2c6_c_mux[] = {
+ SDA6_C_MARK, SCL6_C_MARK,
+ };
+
++/* - INTC-EX ---------------------------------------------------------------- */
++static const unsigned int intc_ex_irq0_pins[] = {
++ /* IRQ0 */
++ RCAR_GP_PIN(2, 0),
++};
++static const unsigned int intc_ex_irq0_mux[] = {
++ IRQ0_MARK,
++};
++static const unsigned int intc_ex_irq1_pins[] = {
++ /* IRQ1 */
++ RCAR_GP_PIN(2, 1),
++};
++static const unsigned int intc_ex_irq1_mux[] = {
++ IRQ1_MARK,
++};
++static const unsigned int intc_ex_irq2_pins[] = {
++ /* IRQ2 */
++ RCAR_GP_PIN(2, 2),
++};
++static const unsigned int intc_ex_irq2_mux[] = {
++ IRQ2_MARK,
++};
++static const unsigned int intc_ex_irq3_pins[] = {
++ /* IRQ3 */
++ RCAR_GP_PIN(2, 3),
++};
++static const unsigned int intc_ex_irq3_mux[] = {
++ IRQ3_MARK,
++};
++static const unsigned int intc_ex_irq4_pins[] = {
++ /* IRQ4 */
++ RCAR_GP_PIN(2, 4),
++};
++static const unsigned int intc_ex_irq4_mux[] = {
++ IRQ4_MARK,
++};
++static const unsigned int intc_ex_irq5_pins[] = {
++ /* IRQ5 */
++ RCAR_GP_PIN(2, 5),
++};
++static const unsigned int intc_ex_irq5_mux[] = {
++ IRQ5_MARK,
++};
++
+ /* - MSIOF0 ----------------------------------------------------------------- */
+ static const unsigned int msiof0_clk_pins[] = {
+ /* SCK */
+@@ -3636,6 +3680,12 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(i2c6_a),
+ SH_PFC_PIN_GROUP(i2c6_b),
+ SH_PFC_PIN_GROUP(i2c6_c),
++ SH_PFC_PIN_GROUP(intc_ex_irq0),
++ SH_PFC_PIN_GROUP(intc_ex_irq1),
++ SH_PFC_PIN_GROUP(intc_ex_irq2),
++ SH_PFC_PIN_GROUP(intc_ex_irq3),
++ SH_PFC_PIN_GROUP(intc_ex_irq4),
++ SH_PFC_PIN_GROUP(intc_ex_irq5),
+ SH_PFC_PIN_GROUP(msiof0_clk),
+ SH_PFC_PIN_GROUP(msiof0_sync),
+ SH_PFC_PIN_GROUP(msiof0_ss1),
+@@ -3937,6 +3987,15 @@ static const char * const i2c6_groups[] = {
+ "i2c6_c",
+ };
+
++static const char * const intc_ex_groups[] = {
++ "intc_ex_irq0",
++ "intc_ex_irq1",
++ "intc_ex_irq2",
++ "intc_ex_irq3",
++ "intc_ex_irq4",
++ "intc_ex_irq5",
++};
++
+ static const char * const msiof0_groups[] = {
+ "msiof0_clk",
+ "msiof0_sync",
+@@ -4229,6 +4288,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
+ SH_PFC_FUNCTION(i2c1),
+ SH_PFC_FUNCTION(i2c2),
+ SH_PFC_FUNCTION(i2c6),
++ SH_PFC_FUNCTION(intc_ex),
+ SH_PFC_FUNCTION(msiof0),
+ SH_PFC_FUNCTION(msiof1),
+ SH_PFC_FUNCTION(msiof2),
+--
+2.19.0
+
diff --git a/patches/0201-pinctrl-sh-pfc-r8a7796-Add-support-for-INTC-EX-IRQ-p.patch b/patches/0201-pinctrl-sh-pfc-r8a7796-Add-support-for-INTC-EX-IRQ-p.patch
new file mode 100644
index 0000000..b009e55
--- /dev/null
+++ b/patches/0201-pinctrl-sh-pfc-r8a7796-Add-support-for-INTC-EX-IRQ-p.patch
@@ -0,0 +1,121 @@
+From b078e934e30b1f207352547a30c40e098ca72409 Mon Sep 17 00:00:00 2001
+From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
+Date: Mon, 24 Oct 2016 20:40:09 +0900
+Subject: [PATCH 0201/1795] pinctrl: sh-pfc: r8a7796: Add support for INTC-EX
+ IRQ pins
+
+Most pins on the r8a7796 SoC can be configured in GPIO mode for
+interrupt and GPIO functionality, while a couple of them can also
+be routed to the INTC-EX hardware block (formerly known as IRQC).
+
+On r8a7795 the INTC-EX hardware handles pins IRQ0 -> IRQ5 and
+this patch adds support for them to the PFC driver as "intc_ex_irqN".
+
+[takeshi.kihara.df: Ported from commit bb46f6f3f3bf ("pinctrl: sh-pfc:
+ r8a7795: Add support for INTC-EX IRQ pins")
+ to drivers/pinctrl/sh-pfc/pfc-r8a7796.c]
+Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+
+(cherry picked from commit b014912f6c462223229bb9865ceb1a363984c521)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 60 ++++++++++++++++++++++++++++
+ 1 file changed, 60 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+index 711333fb2c6e..b5bba8880537 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+@@ -2392,6 +2392,50 @@ static const unsigned int i2c6_c_mux[] = {
+ SDA6_C_MARK, SCL6_C_MARK,
+ };
+
++/* - INTC-EX ---------------------------------------------------------------- */
++static const unsigned int intc_ex_irq0_pins[] = {
++ /* IRQ0 */
++ RCAR_GP_PIN(2, 0),
++};
++static const unsigned int intc_ex_irq0_mux[] = {
++ IRQ0_MARK,
++};
++static const unsigned int intc_ex_irq1_pins[] = {
++ /* IRQ1 */
++ RCAR_GP_PIN(2, 1),
++};
++static const unsigned int intc_ex_irq1_mux[] = {
++ IRQ1_MARK,
++};
++static const unsigned int intc_ex_irq2_pins[] = {
++ /* IRQ2 */
++ RCAR_GP_PIN(2, 2),
++};
++static const unsigned int intc_ex_irq2_mux[] = {
++ IRQ2_MARK,
++};
++static const unsigned int intc_ex_irq3_pins[] = {
++ /* IRQ3 */
++ RCAR_GP_PIN(2, 3),
++};
++static const unsigned int intc_ex_irq3_mux[] = {
++ IRQ3_MARK,
++};
++static const unsigned int intc_ex_irq4_pins[] = {
++ /* IRQ4 */
++ RCAR_GP_PIN(2, 4),
++};
++static const unsigned int intc_ex_irq4_mux[] = {
++ IRQ4_MARK,
++};
++static const unsigned int intc_ex_irq5_pins[] = {
++ /* IRQ5 */
++ RCAR_GP_PIN(2, 5),
++};
++static const unsigned int intc_ex_irq5_mux[] = {
++ IRQ5_MARK,
++};
++
+ /* - MSIOF0 ----------------------------------------------------------------- */
+ static const unsigned int msiof0_clk_pins[] = {
+ /* SCK */
+@@ -3922,6 +3966,12 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(i2c6_a),
+ SH_PFC_PIN_GROUP(i2c6_b),
+ SH_PFC_PIN_GROUP(i2c6_c),
++ SH_PFC_PIN_GROUP(intc_ex_irq0),
++ SH_PFC_PIN_GROUP(intc_ex_irq1),
++ SH_PFC_PIN_GROUP(intc_ex_irq2),
++ SH_PFC_PIN_GROUP(intc_ex_irq3),
++ SH_PFC_PIN_GROUP(intc_ex_irq4),
++ SH_PFC_PIN_GROUP(intc_ex_irq5),
+ SH_PFC_PIN_GROUP(msiof0_clk),
+ SH_PFC_PIN_GROUP(msiof0_sync),
+ SH_PFC_PIN_GROUP(msiof0_ss1),
+@@ -4286,6 +4336,15 @@ static const char * const i2c6_groups[] = {
+ "i2c6_c",
+ };
+
++static const char * const intc_ex_groups[] = {
++ "intc_ex_irq0",
++ "intc_ex_irq1",
++ "intc_ex_irq2",
++ "intc_ex_irq3",
++ "intc_ex_irq4",
++ "intc_ex_irq5",
++};
++
+ static const char * const msiof0_groups[] = {
+ "msiof0_clk",
+ "msiof0_sync",
+@@ -4580,6 +4639,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
+ SH_PFC_FUNCTION(i2c1),
+ SH_PFC_FUNCTION(i2c2),
+ SH_PFC_FUNCTION(i2c6),
++ SH_PFC_FUNCTION(intc_ex),
+ SH_PFC_FUNCTION(msiof0),
+ SH_PFC_FUNCTION(msiof1),
+ SH_PFC_FUNCTION(msiof2),
+--
+2.19.0
+
diff --git a/patches/0202-pinctrl-sh-pfc-r8a7795-Add-HSCIF-pins-groups-and-fun.patch b/patches/0202-pinctrl-sh-pfc-r8a7795-Add-HSCIF-pins-groups-and-fun.patch
new file mode 100644
index 0000000..fa8ed28
--- /dev/null
+++ b/patches/0202-pinctrl-sh-pfc-r8a7795-Add-HSCIF-pins-groups-and-fun.patch
@@ -0,0 +1,333 @@
+From f7de0b4f0667ef40404c5151b2bb3c2a429b6eda Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Mon, 9 Oct 2017 10:20:53 +0200
+Subject: [PATCH 0202/1795] pinctrl: sh-pfc: r8a7795: Add HSCIF pins, groups,
+ and functions
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 7a362e3488cbfa921fbca1fa62e1670283c84d19)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 283 +++++++++++++++++++++++++++
+ 1 file changed, 283 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+index 22201fc37420..1b556a8dcd5e 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+@@ -2076,6 +2076,213 @@ static const unsigned int du_disp_mux[] = {
+ DU_DISP_MARK,
+ };
+
++/* - HSCIF0 ----------------------------------------------------------------- */
++static const unsigned int hscif0_data_pins[] = {
++ /* RX, TX */
++ RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 14),
++};
++static const unsigned int hscif0_data_mux[] = {
++ HRX0_MARK, HTX0_MARK,
++};
++static const unsigned int hscif0_clk_pins[] = {
++ /* SCK */
++ RCAR_GP_PIN(5, 12),
++};
++static const unsigned int hscif0_clk_mux[] = {
++ HSCK0_MARK,
++};
++static const unsigned int hscif0_ctrl_pins[] = {
++ /* RTS, CTS */
++ RCAR_GP_PIN(5, 16), RCAR_GP_PIN(5, 15),
++};
++static const unsigned int hscif0_ctrl_mux[] = {
++ HRTS0_N_MARK, HCTS0_N_MARK,
++};
++/* - HSCIF1 ----------------------------------------------------------------- */
++static const unsigned int hscif1_data_a_pins[] = {
++ /* RX, TX */
++ RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6),
++};
++static const unsigned int hscif1_data_a_mux[] = {
++ HRX1_A_MARK, HTX1_A_MARK,
++};
++static const unsigned int hscif1_clk_a_pins[] = {
++ /* SCK */
++ RCAR_GP_PIN(6, 21),
++};
++static const unsigned int hscif1_clk_a_mux[] = {
++ HSCK1_A_MARK,
++};
++static const unsigned int hscif1_ctrl_a_pins[] = {
++ /* RTS, CTS */
++ RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 7),
++};
++static const unsigned int hscif1_ctrl_a_mux[] = {
++ HRTS1_N_A_MARK, HCTS1_N_A_MARK,
++};
++
++static const unsigned int hscif1_data_b_pins[] = {
++ /* RX, TX */
++ RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2),
++};
++static const unsigned int hscif1_data_b_mux[] = {
++ HRX1_B_MARK, HTX1_B_MARK,
++};
++static const unsigned int hscif1_clk_b_pins[] = {
++ /* SCK */
++ RCAR_GP_PIN(5, 0),
++};
++static const unsigned int hscif1_clk_b_mux[] = {
++ HSCK1_B_MARK,
++};
++static const unsigned int hscif1_ctrl_b_pins[] = {
++ /* RTS, CTS */
++ RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 3),
++};
++static const unsigned int hscif1_ctrl_b_mux[] = {
++ HRTS1_N_B_MARK, HCTS1_N_B_MARK,
++};
++/* - HSCIF2 ----------------------------------------------------------------- */
++static const unsigned int hscif2_data_a_pins[] = {
++ /* RX, TX */
++ RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
++};
++static const unsigned int hscif2_data_a_mux[] = {
++ HRX2_A_MARK, HTX2_A_MARK,
++};
++static const unsigned int hscif2_clk_a_pins[] = {
++ /* SCK */
++ RCAR_GP_PIN(6, 10),
++};
++static const unsigned int hscif2_clk_a_mux[] = {
++ HSCK2_A_MARK,
++};
++static const unsigned int hscif2_ctrl_a_pins[] = {
++ /* RTS, CTS */
++ RCAR_GP_PIN(6, 7), RCAR_GP_PIN(6, 6),
++};
++static const unsigned int hscif2_ctrl_a_mux[] = {
++ HRTS2_N_A_MARK, HCTS2_N_A_MARK,
++};
++
++static const unsigned int hscif2_data_b_pins[] = {
++ /* RX, TX */
++ RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),
++};
++static const unsigned int hscif2_data_b_mux[] = {
++ HRX2_B_MARK, HTX2_B_MARK,
++};
++static const unsigned int hscif2_clk_b_pins[] = {
++ /* SCK */
++ RCAR_GP_PIN(6, 21),
++};
++static const unsigned int hscif2_clk_b_mux[] = {
++ HSCK2_B_MARK,
++};
++static const unsigned int hscif2_ctrl_b_pins[] = {
++ /* RTS, CTS */
++ RCAR_GP_PIN(6, 20), RCAR_GP_PIN(6, 19),
++};
++static const unsigned int hscif2_ctrl_b_mux[] = {
++ HRTS2_N_B_MARK, HCTS2_N_B_MARK,
++};
++
++static const unsigned int hscif2_data_c_pins[] = {
++ /* RX, TX */
++ RCAR_GP_PIN(6, 25), RCAR_GP_PIN(6, 26),
++};
++static const unsigned int hscif2_data_c_mux[] = {
++ HRX2_C_MARK, HTX2_C_MARK,
++};
++static const unsigned int hscif2_clk_c_pins[] = {
++ /* SCK */
++ RCAR_GP_PIN(6, 24),
++};
++static const unsigned int hscif2_clk_c_mux[] = {
++ HSCK2_C_MARK,
++};
++static const unsigned int hscif2_ctrl_c_pins[] = {
++ /* RTS, CTS */
++ RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 27),
++};
++static const unsigned int hscif2_ctrl_c_mux[] = {
++ HRTS2_N_C_MARK, HCTS2_N_C_MARK,
++};
++/* - HSCIF3 ----------------------------------------------------------------- */
++static const unsigned int hscif3_data_a_pins[] = {
++ /* RX, TX */
++ RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24),
++};
++static const unsigned int hscif3_data_a_mux[] = {
++ HRX3_A_MARK, HTX3_A_MARK,
++};
++static const unsigned int hscif3_clk_pins[] = {
++ /* SCK */
++ RCAR_GP_PIN(1, 22),
++};
++static const unsigned int hscif3_clk_mux[] = {
++ HSCK3_MARK,
++};
++static const unsigned int hscif3_ctrl_pins[] = {
++ /* RTS, CTS */
++ RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25),
++};
++static const unsigned int hscif3_ctrl_mux[] = {
++ HRTS3_N_MARK, HCTS3_N_MARK,
++};
++
++static const unsigned int hscif3_data_b_pins[] = {
++ /* RX, TX */
++ RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11),
++};
++static const unsigned int hscif3_data_b_mux[] = {
++ HRX3_B_MARK, HTX3_B_MARK,
++};
++static const unsigned int hscif3_data_c_pins[] = {
++ /* RX, TX */
++ RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
++};
++static const unsigned int hscif3_data_c_mux[] = {
++ HRX3_C_MARK, HTX3_C_MARK,
++};
++static const unsigned int hscif3_data_d_pins[] = {
++ /* RX, TX */
++ RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8),
++};
++static const unsigned int hscif3_data_d_mux[] = {
++ HRX3_D_MARK, HTX3_D_MARK,
++};
++/* - HSCIF4 ----------------------------------------------------------------- */
++static const unsigned int hscif4_data_a_pins[] = {
++ /* RX, TX */
++ RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13),
++};
++static const unsigned int hscif4_data_a_mux[] = {
++ HRX4_A_MARK, HTX4_A_MARK,
++};
++static const unsigned int hscif4_clk_pins[] = {
++ /* SCK */
++ RCAR_GP_PIN(1, 11),
++};
++static const unsigned int hscif4_clk_mux[] = {
++ HSCK4_MARK,
++};
++static const unsigned int hscif4_ctrl_pins[] = {
++ /* RTS, CTS */
++ RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14),
++};
++static const unsigned int hscif4_ctrl_mux[] = {
++ HRTS4_N_MARK, HCTS4_N_MARK,
++};
++
++static const unsigned int hscif4_data_b_pins[] = {
++ /* RX, TX */
++ RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 11),
++};
++static const unsigned int hscif4_data_b_mux[] = {
++ HRX4_B_MARK, HTX4_B_MARK,
++};
++
+ /* - I2C -------------------------------------------------------------------- */
+ static const unsigned int i2c1_a_pins[] = {
+ /* SDA, SCL */
+@@ -3673,6 +3880,34 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(du_oddf),
+ SH_PFC_PIN_GROUP(du_cde),
+ SH_PFC_PIN_GROUP(du_disp),
++ SH_PFC_PIN_GROUP(hscif0_data),
++ SH_PFC_PIN_GROUP(hscif0_clk),
++ SH_PFC_PIN_GROUP(hscif0_ctrl),
++ SH_PFC_PIN_GROUP(hscif1_data_a),
++ SH_PFC_PIN_GROUP(hscif1_clk_a),
++ SH_PFC_PIN_GROUP(hscif1_ctrl_a),
++ SH_PFC_PIN_GROUP(hscif1_data_b),
++ SH_PFC_PIN_GROUP(hscif1_clk_b),
++ SH_PFC_PIN_GROUP(hscif1_ctrl_b),
++ SH_PFC_PIN_GROUP(hscif2_data_a),
++ SH_PFC_PIN_GROUP(hscif2_clk_a),
++ SH_PFC_PIN_GROUP(hscif2_ctrl_a),
++ SH_PFC_PIN_GROUP(hscif2_data_b),
++ SH_PFC_PIN_GROUP(hscif2_clk_b),
++ SH_PFC_PIN_GROUP(hscif2_ctrl_b),
++ SH_PFC_PIN_GROUP(hscif2_data_c),
++ SH_PFC_PIN_GROUP(hscif2_clk_c),
++ SH_PFC_PIN_GROUP(hscif2_ctrl_c),
++ SH_PFC_PIN_GROUP(hscif3_data_a),
++ SH_PFC_PIN_GROUP(hscif3_clk),
++ SH_PFC_PIN_GROUP(hscif3_ctrl),
++ SH_PFC_PIN_GROUP(hscif3_data_b),
++ SH_PFC_PIN_GROUP(hscif3_data_c),
++ SH_PFC_PIN_GROUP(hscif3_data_d),
++ SH_PFC_PIN_GROUP(hscif4_data_a),
++ SH_PFC_PIN_GROUP(hscif4_clk),
++ SH_PFC_PIN_GROUP(hscif4_ctrl),
++ SH_PFC_PIN_GROUP(hscif4_data_b),
+ SH_PFC_PIN_GROUP(i2c1_a),
+ SH_PFC_PIN_GROUP(i2c1_b),
+ SH_PFC_PIN_GROUP(i2c2_a),
+@@ -3971,6 +4206,49 @@ static const char * const du_groups[] = {
+ "du_disp",
+ };
+
++static const char * const hscif0_groups[] = {
++ "hscif0_data",
++ "hscif0_clk",
++ "hscif0_ctrl",
++};
++
++static const char * const hscif1_groups[] = {
++ "hscif1_data_a",
++ "hscif1_clk_a",
++ "hscif1_ctrl_a",
++ "hscif1_data_b",
++ "hscif1_clk_b",
++ "hscif1_ctrl_b",
++};
++
++static const char * const hscif2_groups[] = {
++ "hscif2_data_a",
++ "hscif2_clk_a",
++ "hscif2_ctrl_a",
++ "hscif2_data_b",
++ "hscif2_clk_b",
++ "hscif2_ctrl_b",
++ "hscif2_data_c",
++ "hscif2_clk_c",
++ "hscif2_ctrl_c",
++};
++
++static const char * const hscif3_groups[] = {
++ "hscif3_data_a",
++ "hscif3_clk",
++ "hscif3_ctrl",
++ "hscif3_data_b",
++ "hscif3_data_c",
++ "hscif3_data_d",
++};
++
++static const char * const hscif4_groups[] = {
++ "hscif4_data_a",
++ "hscif4_clk",
++ "hscif4_ctrl",
++ "hscif4_data_b",
++};
++
+ static const char * const i2c1_groups[] = {
+ "i2c1_a",
+ "i2c1_b",
+@@ -4285,6 +4563,11 @@ static const struct sh_pfc_function pinmux_functions[] = {
+ SH_PFC_FUNCTION(drif2),
+ SH_PFC_FUNCTION(drif3),
+ SH_PFC_FUNCTION(du),
++ SH_PFC_FUNCTION(hscif0),
++ SH_PFC_FUNCTION(hscif1),
++ SH_PFC_FUNCTION(hscif2),
++ SH_PFC_FUNCTION(hscif3),
++ SH_PFC_FUNCTION(hscif4),
+ SH_PFC_FUNCTION(i2c1),
+ SH_PFC_FUNCTION(i2c2),
+ SH_PFC_FUNCTION(i2c6),
+--
+2.19.0
+
diff --git a/patches/0203-pinctrl-sh-pfc-r8a7795-Fix-trivial-typo-in-comment.patch b/patches/0203-pinctrl-sh-pfc-r8a7795-Fix-trivial-typo-in-comment.patch
new file mode 100644
index 0000000..ce4738d
--- /dev/null
+++ b/patches/0203-pinctrl-sh-pfc-r8a7795-Fix-trivial-typo-in-comment.patch
@@ -0,0 +1,31 @@
+From 271db9bcbfdbff88610b298a6a1f7a809f8dd421 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Mon, 9 Oct 2017 10:37:24 +0200
+Subject: [PATCH 0203/1795] pinctrl: sh-pfc: r8a7795: Fix trivial typo in
+ comment
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit ecd54509a2fb89c533eb8984be4f6d24fb0c2e76)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+index 1b556a8dcd5e..e9ee6642a53c 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+@@ -1508,7 +1508,7 @@ static const u16 pinmux_data[] = {
+ };
+
+ /*
+- * R8A7795 has 8 banks with 32 PGIOS in each => 256 GPIOs.
++ * R8A7795 has 8 banks with 32 GPIOs in each => 256 GPIOs.
+ * Physical layout rows: A - AW, cols: 1 - 39.
+ */
+ #define ROW_GROUP_A(r) ('Z' - 'A' + 1 + (r))
+--
+2.19.0
+
diff --git a/patches/0204-pinctrl-sh-pfc-r8a7795-es1-Fix-trivial-typo-in-comme.patch b/patches/0204-pinctrl-sh-pfc-r8a7795-es1-Fix-trivial-typo-in-comme.patch
new file mode 100644
index 0000000..c61f430
--- /dev/null
+++ b/patches/0204-pinctrl-sh-pfc-r8a7795-es1-Fix-trivial-typo-in-comme.patch
@@ -0,0 +1,31 @@
+From d748539639a409542656b6e22f64752bf2745d18 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Mon, 9 Oct 2017 10:37:24 +0200
+Subject: [PATCH 0204/1795] pinctrl: sh-pfc: r8a7795-es1: Fix trivial typo in
+ comment
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit bf3278feae63d3b8aaeaafa6c9e7c8b2fb236aae)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
+index e7fdfa4efeaa..a575681cc98d 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
+@@ -1443,7 +1443,7 @@ static const u16 pinmux_data[] = {
+ };
+
+ /*
+- * R8A7795 has 8 banks with 32 PGIOS in each => 256 GPIOs.
++ * R8A7795 has 8 banks with 32 GPIOs in each => 256 GPIOs.
+ * Physical layout rows: A - AW, cols: 1 - 39.
+ */
+ #define ROW_GROUP_A(r) ('Z' - 'A' + 1 + (r))
+--
+2.19.0
+
diff --git a/patches/0205-pinctrl-sh-pfc-r8a7796-Fix-trivial-typo-in-comment.patch b/patches/0205-pinctrl-sh-pfc-r8a7796-Fix-trivial-typo-in-comment.patch
new file mode 100644
index 0000000..1dd3343
--- /dev/null
+++ b/patches/0205-pinctrl-sh-pfc-r8a7796-Fix-trivial-typo-in-comment.patch
@@ -0,0 +1,31 @@
+From 2abc6962ac1f2981d09ae3a3e979218924e83f88 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Mon, 9 Oct 2017 10:37:25 +0200
+Subject: [PATCH 0205/1795] pinctrl: sh-pfc: r8a7796: Fix trivial typo in
+ comment
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 94888a4dc39a15ae3a09e1ec4cca0f18cf03a218)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+index b5bba8880537..79304027fac7 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+@@ -495,7 +495,7 @@ FM(IP16_31_28) IP16_31_28 FM(IP17_31_28) IP17_31_28
+ #define MOD_SEL1_1 FM(SEL_PWM2_0) FM(SEL_PWM2_1)
+ #define MOD_SEL1_0 FM(SEL_PWM1_0) FM(SEL_PWM1_1)
+
+-/* MOD_SEL1 */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */
++/* MOD_SEL2 */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */
+ #define MOD_SEL2_31 FM(I2C_SEL_5_0) FM(I2C_SEL_5_1)
+ #define MOD_SEL2_30 FM(I2C_SEL_3_0) FM(I2C_SEL_3_1)
+ #define MOD_SEL2_29 FM(I2C_SEL_0_0) FM(I2C_SEL_0_1)
+--
+2.19.0
+
diff --git a/patches/0206-pinctrl-sh-pfc-r8a77995-Add-Audio-clock-pin-support.patch b/patches/0206-pinctrl-sh-pfc-r8a77995-Add-Audio-clock-pin-support.patch
new file mode 100644
index 0000000..038153f
--- /dev/null
+++ b/patches/0206-pinctrl-sh-pfc-r8a77995-Add-Audio-clock-pin-support.patch
@@ -0,0 +1,92 @@
+From ae0d89f075dfa3399a05d2fb2f170784011b84e2 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 10 Oct 2017 07:57:17 +0000
+Subject: [PATCH 0206/1795] pinctrl: sh-pfc: r8a77995: Add Audio clock pin
+ support
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 6e7b1ee885793ecfa8e1194f92e23856b6c07c41)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a77995.c | 42 +++++++++++++++++++++++++++
+ 1 file changed, 42 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
+index 3f67b8d4f050..fa000a91f881 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
+@@ -936,6 +936,36 @@ static const struct sh_pfc_pin pinmux_pins[] = {
+ PINMUX_GPIO_GP_ALL(),
+ };
+
++/* - AUDIO CLOCK ------------------------------------------------------------- */
++static const unsigned int audio_clk_a_pins[] = {
++ /* CLK A */
++ RCAR_GP_PIN(4, 1),
++};
++static const unsigned int audio_clk_a_mux[] = {
++ AUDIO_CLKA_MARK,
++};
++static const unsigned int audio_clk_b_pins[] = {
++ /* CLK B */
++ RCAR_GP_PIN(2, 27),
++};
++static const unsigned int audio_clk_b_mux[] = {
++ AUDIO_CLKB_MARK,
++};
++static const unsigned int audio_clkout_pins[] = {
++ /* CLKOUT */
++ RCAR_GP_PIN(4, 5),
++};
++static const unsigned int audio_clkout_mux[] = {
++ AUDIO_CLKOUT_MARK,
++};
++static const unsigned int audio_clkout1_pins[] = {
++ /* CLKOUT1 */
++ RCAR_GP_PIN(4, 22),
++};
++static const unsigned int audio_clkout1_mux[] = {
++ AUDIO_CLKOUT1_MARK,
++};
++
+ /* - EtherAVB --------------------------------------------------------------- */
+ static const unsigned int avb0_link_pins[] = {
+ /* AVB0_LINK */
+@@ -1417,6 +1447,10 @@ static const unsigned int usb0_mux[] = {
+ };
+
+ static const struct sh_pfc_pin_group pinmux_groups[] = {
++ SH_PFC_PIN_GROUP(audio_clk_a),
++ SH_PFC_PIN_GROUP(audio_clk_b),
++ SH_PFC_PIN_GROUP(audio_clkout),
++ SH_PFC_PIN_GROUP(audio_clkout1),
+ SH_PFC_PIN_GROUP(avb0_link),
+ SH_PFC_PIN_GROUP(avb0_magic),
+ SH_PFC_PIN_GROUP(avb0_phy_int),
+@@ -1478,6 +1512,13 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(usb0),
+ };
+
++static const char * const audio_clk_groups[] = {
++ "audio_clk_a",
++ "audio_clk_b",
++ "audio_clkout",
++ "audio_clkout1",
++};
++
+ static const char * const avb0_groups[] = {
+ "avb0_link",
+ "avb0_magic",
+@@ -1591,6 +1632,7 @@ static const char * const usb0_groups[] = {
+ };
+
+ static const struct sh_pfc_function pinmux_functions[] = {
++ SH_PFC_FUNCTION(audio_clk),
+ SH_PFC_FUNCTION(avb0),
+ SH_PFC_FUNCTION(i2c0),
+ SH_PFC_FUNCTION(i2c1),
+--
+2.19.0
+
diff --git a/patches/0207-pinctrl-sh-pfc-r8a77995-Add-Audio-SSI-pin-support.patch b/patches/0207-pinctrl-sh-pfc-r8a77995-Add-Audio-SSI-pin-support.patch
new file mode 100644
index 0000000..dfbfabb
--- /dev/null
+++ b/patches/0207-pinctrl-sh-pfc-r8a77995-Add-Audio-SSI-pin-support.patch
@@ -0,0 +1,110 @@
+From ea18f2b602ec0ffeb05758780d47ae98915ab143 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 10 Oct 2017 07:57:40 +0000
+Subject: [PATCH 0207/1795] pinctrl: sh-pfc: r8a77995: Add Audio SSI pin
+ support
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 7b9e64a6571ee9132f3515434b7047738cd28075)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a77995.c | 60 +++++++++++++++++++++++++++
+ 1 file changed, 60 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
+index fa000a91f881..1e226c25ce7b 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
+@@ -1437,6 +1437,50 @@ static const unsigned int scif_clk_mux[] = {
+ SCIF_CLK_MARK,
+ };
+
++/* - SSI ---------------------------------------------------------------*/
++static const unsigned int ssi3_data_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(4, 3),
++};
++static const unsigned int ssi3_data_mux[] = {
++ SSI_SDATA3_MARK,
++};
++static const unsigned int ssi34_ctrl_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(4, 2), RCAR_GP_PIN(4, 4),
++};
++static const unsigned int ssi34_ctrl_mux[] = {
++ SSI_SCK34_MARK, SSI_WS34_MARK,
++};
++static const unsigned int ssi4_ctrl_a_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(4, 5), RCAR_GP_PIN(4, 7),
++};
++static const unsigned int ssi4_ctrl_a_mux[] = {
++ SSI_SCK4_A_MARK, SSI_WS4_A_MARK,
++};
++static const unsigned int ssi4_data_a_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(4, 6),
++};
++static const unsigned int ssi4_data_a_mux[] = {
++ SSI_SDATA4_A_MARK,
++};
++static const unsigned int ssi4_ctrl_b_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(2, 15), RCAR_GP_PIN(2, 20),
++};
++static const unsigned int ssi4_ctrl_b_mux[] = {
++ SSI_SCK4_B_MARK, SSI_WS4_B_MARK,
++};
++static const unsigned int ssi4_data_b_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(2, 16),
++};
++static const unsigned int ssi4_data_b_mux[] = {
++ SSI_SDATA4_B_MARK,
++};
++
+ /* - USB0 ------------------------------------------------------------------- */
+ static const unsigned int usb0_pins[] = {
+ /* PWEN, OVC */
+@@ -1509,6 +1553,12 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(scif5_data_b),
+ SH_PFC_PIN_GROUP(scif5_clk_b),
+ SH_PFC_PIN_GROUP(scif_clk),
++ SH_PFC_PIN_GROUP(ssi3_data),
++ SH_PFC_PIN_GROUP(ssi34_ctrl),
++ SH_PFC_PIN_GROUP(ssi4_ctrl_a),
++ SH_PFC_PIN_GROUP(ssi4_data_a),
++ SH_PFC_PIN_GROUP(ssi4_ctrl_b),
++ SH_PFC_PIN_GROUP(ssi4_data_b),
+ SH_PFC_PIN_GROUP(usb0),
+ };
+
+@@ -1627,6 +1677,15 @@ static const char * const scif_clk_groups[] = {
+ "scif_clk",
+ };
+
++static const char * const ssi_groups[] = {
++ "ssi3_data",
++ "ssi34_ctrl",
++ "ssi4_ctrl_a",
++ "ssi4_data_a",
++ "ssi4_ctrl_b",
++ "ssi4_data_b",
++};
++
+ static const char * const usb0_groups[] = {
+ "usb0",
+ };
+@@ -1650,6 +1709,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
+ SH_PFC_FUNCTION(scif4),
+ SH_PFC_FUNCTION(scif5),
+ SH_PFC_FUNCTION(scif_clk),
++ SH_PFC_FUNCTION(ssi),
+ SH_PFC_FUNCTION(usb0),
+ };
+
+--
+2.19.0
+
diff --git a/patches/0208-pinctrl-sh-pfc-r8a77995-Remove-USB0_IDIN-and-USB0_ID.patch b/patches/0208-pinctrl-sh-pfc-r8a77995-Remove-USB0_IDIN-and-USB0_ID.patch
new file mode 100644
index 0000000..ef28a8d
--- /dev/null
+++ b/patches/0208-pinctrl-sh-pfc-r8a77995-Remove-USB0_IDIN-and-USB0_ID.patch
@@ -0,0 +1,48 @@
+From 9330711de656995c0b9699c065968ccfc64ba1f0 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Tue, 10 Oct 2017 13:09:37 +0200
+Subject: [PATCH 0208/1795] pinctrl: sh-pfc: r8a77995: Remove USB0_IDIN and
+ USB0_IDPU pins
+
+R-Car Gen3 Hardware Manual Errata for Rev 0.55 of September 8, 2017
+removed the USB0_IDIN and USB0_IDPU pins on R-Car D3.
+
+This change has no functional impact, as these definitions were unused.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit d8ee17f4f2230446309240ed772ece1f8f4ac6fd)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a77995.c | 6 ++----
+ 1 file changed, 2 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
+index 1e226c25ce7b..89b7541ab1ed 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
+@@ -198,8 +198,8 @@
+ #define GPSR6_0 FM(QSPI0_SPCLK)
+
+ /* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 - F */
+-#define IP0_3_0 FM(IRQ0_A) FM(MSIOF2_SYNC_B) FM(USB0_IDIN) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+-#define IP0_7_4 FM(MSIOF2_SCK) F_(0, 0) FM(USB0_IDPU) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP0_3_0 FM(IRQ0_A) FM(MSIOF2_SYNC_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP0_7_4 FM(MSIOF2_SCK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+ #define IP0_11_8 FM(MSIOF2_TXD) FM(SCL3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+ #define IP0_15_12 FM(MSIOF2_RXD) FM(SDA3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+ #define IP0_19_16 FM(MLB_CLK) FM(MSIOF2_SYNC_A) FM(SCK5_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+@@ -522,10 +522,8 @@ static const u16 pinmux_data[] = {
+ /* IPSR0 */
+ PINMUX_IPSR_MSEL(IP0_3_0, IRQ0_A, SEL_IRQ_0_0),
+ PINMUX_IPSR_MSEL(IP0_3_0, MSIOF2_SYNC_B, SEL_MSIOF2_1),
+- PINMUX_IPSR_GPSR(IP0_3_0, USB0_IDIN),
+
+ PINMUX_IPSR_GPSR(IP0_7_4, MSIOF2_SCK),
+- PINMUX_IPSR_GPSR(IP0_7_4, USB0_IDPU),
+
+ PINMUX_IPSR_GPSR(IP0_11_8, MSIOF2_TXD),
+ PINMUX_IPSR_MSEL(IP0_11_8, SCL3_A, SEL_I2C3_0),
+--
+2.19.0
+
diff --git a/patches/0209-pinctrl-sh-pfc-r8a7745-Implement-voltage-switching-f.patch b/patches/0209-pinctrl-sh-pfc-r8a7745-Implement-voltage-switching-f.patch
new file mode 100644
index 0000000..9f9f9bf
--- /dev/null
+++ b/patches/0209-pinctrl-sh-pfc-r8a7745-Implement-voltage-switching-f.patch
@@ -0,0 +1,32 @@
+From c4b5499846f7d31bcf1c8397112de811b4de5563 Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Fri, 13 Oct 2017 15:49:15 +0100
+Subject: [PATCH 0209/1795] pinctrl: sh-pfc: r8a7745: Implement voltage
+ switching for SDHI
+
+Voltage switching is the same as on the r8a7794.
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit df73da6317322e731edc53a95f28af7aab7bee00)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7794.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7794.c b/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
+index a0ed220071f5..333a3470e842 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
+@@ -5097,6 +5097,7 @@ static const struct sh_pfc_soc_operations r8a7794_pinmux_ops = {
+ #ifdef CONFIG_PINCTRL_PFC_R8A7745
+ const struct sh_pfc_soc_info r8a7745_pinmux_info = {
+ .name = "r8a77450_pfc",
++ .ops = &r8a7794_pinmux_ops,
+ .unlock_reg = 0xe6060000, /* PMMR */
+
+ .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
+--
+2.19.0
+
diff --git a/patches/0210-pinctrl-sh-pfc-Remove-matching-on-plain-sh-pfc-platf.patch b/patches/0210-pinctrl-sh-pfc-Remove-matching-on-plain-sh-pfc-platf.patch
new file mode 100644
index 0000000..07b5a17
--- /dev/null
+++ b/patches/0210-pinctrl-sh-pfc-Remove-matching-on-plain-sh-pfc-platf.patch
@@ -0,0 +1,55 @@
+From b4702ca7d1a9d772a2a335892d4bc1d7f4c6c8e6 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 29 Sep 2017 10:08:56 +0200
+Subject: [PATCH 0210/1795] pinctrl: sh-pfc: Remove matching on plain sh-pfc
+ platform device
+
+As of commit 8682b3c522c639f3 ("sh-pfc: Remove platform device
+registration"), plain "sh-pfc" platform devices are no longer created.
+Hence remove their match entry, and the now obsolete checks for missing
+device IDs and driver data.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+(cherry picked from commit 35406b1fd68dec6d8b1badd69fcfb65646745dfd)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/core.c | 7 +------
+ 1 file changed, 1 insertion(+), 6 deletions(-)
+
+diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
+index 0c5e952461fd..9cdbaeab2cf1 100644
+--- a/drivers/pinctrl/sh-pfc/core.c
++++ b/drivers/pinctrl/sh-pfc/core.c
+@@ -569,7 +569,6 @@ static const struct of_device_id sh_pfc_of_table[] = {
+
+ static int sh_pfc_probe(struct platform_device *pdev)
+ {
+- const struct platform_device_id *platid = platform_get_device_id(pdev);
+ #ifdef CONFIG_OF
+ struct device_node *np = pdev->dev.of_node;
+ #endif
+@@ -582,10 +581,7 @@ static int sh_pfc_probe(struct platform_device *pdev)
+ info = of_device_get_match_data(&pdev->dev);
+ else
+ #endif
+- info = platid ? (const void *)platid->driver_data : NULL;
+-
+- if (info == NULL)
+- return -ENODEV;
++ info = (const void *)platform_get_device_id(pdev)->driver_data;
+
+ pfc = devm_kzalloc(&pdev->dev, sizeof(*pfc), GFP_KERNEL);
+ if (pfc == NULL)
+@@ -683,7 +679,6 @@ static const struct platform_device_id sh_pfc_id_table[] = {
+ #ifdef CONFIG_PINCTRL_PFC_SHX3
+ { "pfc-shx3", (kernel_ulong_t)&shx3_pinmux_info },
+ #endif
+- { "sh-pfc", 0 },
+ { },
+ };
+
+--
+2.19.0
+
diff --git a/patches/0211-pinctrl-sh-pfc-Drop-width-parameter-of-sh_pfc_-read-.patch b/patches/0211-pinctrl-sh-pfc-Drop-width-parameter-of-sh_pfc_-read-.patch
new file mode 100644
index 0000000..e1b0749
--- /dev/null
+++ b/patches/0211-pinctrl-sh-pfc-Drop-width-parameter-of-sh_pfc_-read-.patch
@@ -0,0 +1,237 @@
+From 56c693ef642533b43526e88787c1ee4a0a6287ba Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 29 Sep 2017 11:03:11 +0200
+Subject: [PATCH 0211/1795] pinctrl: sh-pfc: Drop width parameter of
+ sh_pfc_{read,write}_reg()
+
+On modern Renesas SoCs, all PFC registers are 32-bit, and all callers of
+sh_pfc_{read,write}_reg() already operate on 32-bit registers only.
+Hence make the 32-bit width implicit, and rename the functions to
+sh_pfc_{read,write}() to shorten lines.
+
+All accesses to 8-bit or 16-bit registers are still done using
+sh_pfc_{read,write}_raw_reg().
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+(cherry picked from commit e16a2c7aced8422cda2b7f13ea3f3daccb150db6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/core.c | 8 ++++----
+ drivers/pinctrl/sh-pfc/core.h | 5 ++---
+ drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c | 12 ++++++------
+ drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 12 ++++++------
+ drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 12 ++++++------
+ drivers/pinctrl/sh-pfc/pinctrl.c | 12 ++++++------
+ 6 files changed, 30 insertions(+), 31 deletions(-)
+
+diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
+index 9cdbaeab2cf1..8b422ac07e57 100644
+--- a/drivers/pinctrl/sh-pfc/core.c
++++ b/drivers/pinctrl/sh-pfc/core.c
+@@ -175,19 +175,19 @@ void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned int reg_width,
+ BUG();
+ }
+
+-u32 sh_pfc_read_reg(struct sh_pfc *pfc, u32 reg, unsigned int width)
++u32 sh_pfc_read(struct sh_pfc *pfc, u32 reg)
+ {
+- return sh_pfc_read_raw_reg(sh_pfc_phys_to_virt(pfc, reg), width);
++ return sh_pfc_read_raw_reg(sh_pfc_phys_to_virt(pfc, reg), 32);
+ }
+
+-void sh_pfc_write_reg(struct sh_pfc *pfc, u32 reg, unsigned int width, u32 data)
++void sh_pfc_write(struct sh_pfc *pfc, u32 reg, u32 data)
+ {
+ if (pfc->info->unlock_reg)
+ sh_pfc_write_raw_reg(
+ sh_pfc_phys_to_virt(pfc, pfc->info->unlock_reg), 32,
+ ~data);
+
+- sh_pfc_write_raw_reg(sh_pfc_phys_to_virt(pfc, reg), width, data);
++ sh_pfc_write_raw_reg(sh_pfc_phys_to_virt(pfc, reg), 32, data);
+ }
+
+ static void sh_pfc_config_reg_helper(struct sh_pfc *pfc,
+diff --git a/drivers/pinctrl/sh-pfc/core.h b/drivers/pinctrl/sh-pfc/core.h
+index 6d598dd63720..dd215d36dcc8 100644
+--- a/drivers/pinctrl/sh-pfc/core.h
++++ b/drivers/pinctrl/sh-pfc/core.h
+@@ -26,9 +26,8 @@ int sh_pfc_register_pinctrl(struct sh_pfc *pfc);
+ u32 sh_pfc_read_raw_reg(void __iomem *mapped_reg, unsigned int reg_width);
+ void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned int reg_width,
+ u32 data);
+-u32 sh_pfc_read_reg(struct sh_pfc *pfc, u32 reg, unsigned int width);
+-void sh_pfc_write_reg(struct sh_pfc *pfc, u32 reg, unsigned int width,
+- u32 data);
++u32 sh_pfc_read(struct sh_pfc *pfc, u32 reg);
++void sh_pfc_write(struct sh_pfc *pfc, u32 reg, u32 data);
+
+ int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin);
+ int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type);
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
+index a575681cc98d..61bcae5dac52 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
+@@ -5671,9 +5671,9 @@ static unsigned int r8a7795es1_pinmux_get_bias(struct sh_pfc *pfc,
+ reg = info->reg;
+ bit = BIT(info->bit);
+
+- if (!(sh_pfc_read_reg(pfc, PUEN + reg, 32) & bit))
++ if (!(sh_pfc_read(pfc, PUEN + reg) & bit))
+ return PIN_CONFIG_BIAS_DISABLE;
+- else if (sh_pfc_read_reg(pfc, PUD + reg, 32) & bit)
++ else if (sh_pfc_read(pfc, PUD + reg) & bit)
+ return PIN_CONFIG_BIAS_PULL_UP;
+ else
+ return PIN_CONFIG_BIAS_PULL_DOWN;
+@@ -5694,16 +5694,16 @@ static void r8a7795es1_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
+ reg = info->reg;
+ bit = BIT(info->bit);
+
+- enable = sh_pfc_read_reg(pfc, PUEN + reg, 32) & ~bit;
++ enable = sh_pfc_read(pfc, PUEN + reg) & ~bit;
+ if (bias != PIN_CONFIG_BIAS_DISABLE)
+ enable |= bit;
+
+- updown = sh_pfc_read_reg(pfc, PUD + reg, 32) & ~bit;
++ updown = sh_pfc_read(pfc, PUD + reg) & ~bit;
+ if (bias == PIN_CONFIG_BIAS_PULL_UP)
+ updown |= bit;
+
+- sh_pfc_write_reg(pfc, PUD + reg, 32, updown);
+- sh_pfc_write_reg(pfc, PUEN + reg, 32, enable);
++ sh_pfc_write(pfc, PUD + reg, updown);
++ sh_pfc_write(pfc, PUEN + reg, enable);
+ }
+
+ static const struct sh_pfc_soc_operations r8a7795es1_pinmux_ops = {
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+index e9ee6642a53c..eea29ef65ec4 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+@@ -5660,9 +5660,9 @@ static unsigned int r8a7795_pinmux_get_bias(struct sh_pfc *pfc,
+ reg = info->reg;
+ bit = BIT(info->bit);
+
+- if (!(sh_pfc_read_reg(pfc, PUEN + reg, 32) & bit))
++ if (!(sh_pfc_read(pfc, PUEN + reg) & bit))
+ return PIN_CONFIG_BIAS_DISABLE;
+- else if (sh_pfc_read_reg(pfc, PUD + reg, 32) & bit)
++ else if (sh_pfc_read(pfc, PUD + reg) & bit)
+ return PIN_CONFIG_BIAS_PULL_UP;
+ else
+ return PIN_CONFIG_BIAS_PULL_DOWN;
+@@ -5683,16 +5683,16 @@ static void r8a7795_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
+ reg = info->reg;
+ bit = BIT(info->bit);
+
+- enable = sh_pfc_read_reg(pfc, PUEN + reg, 32) & ~bit;
++ enable = sh_pfc_read(pfc, PUEN + reg) & ~bit;
+ if (bias != PIN_CONFIG_BIAS_DISABLE)
+ enable |= bit;
+
+- updown = sh_pfc_read_reg(pfc, PUD + reg, 32) & ~bit;
++ updown = sh_pfc_read(pfc, PUD + reg) & ~bit;
+ if (bias == PIN_CONFIG_BIAS_PULL_UP)
+ updown |= bit;
+
+- sh_pfc_write_reg(pfc, PUD + reg, 32, updown);
+- sh_pfc_write_reg(pfc, PUEN + reg, 32, enable);
++ sh_pfc_write(pfc, PUD + reg, updown);
++ sh_pfc_write(pfc, PUEN + reg, enable);
+ }
+
+ static const struct soc_device_attribute r8a7795es1[] = {
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+index 79304027fac7..970d97b9eb45 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+@@ -5724,9 +5724,9 @@ static unsigned int r8a7796_pinmux_get_bias(struct sh_pfc *pfc,
+ reg = info->reg;
+ bit = BIT(info->bit);
+
+- if (!(sh_pfc_read_reg(pfc, PUEN + reg, 32) & bit))
++ if (!(sh_pfc_read(pfc, PUEN + reg) & bit))
+ return PIN_CONFIG_BIAS_DISABLE;
+- else if (sh_pfc_read_reg(pfc, PUD + reg, 32) & bit)
++ else if (sh_pfc_read(pfc, PUD + reg) & bit)
+ return PIN_CONFIG_BIAS_PULL_UP;
+ else
+ return PIN_CONFIG_BIAS_PULL_DOWN;
+@@ -5747,16 +5747,16 @@ static void r8a7796_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
+ reg = info->reg;
+ bit = BIT(info->bit);
+
+- enable = sh_pfc_read_reg(pfc, PUEN + reg, 32) & ~bit;
++ enable = sh_pfc_read(pfc, PUEN + reg) & ~bit;
+ if (bias != PIN_CONFIG_BIAS_DISABLE)
+ enable |= bit;
+
+- updown = sh_pfc_read_reg(pfc, PUD + reg, 32) & ~bit;
++ updown = sh_pfc_read(pfc, PUD + reg) & ~bit;
+ if (bias == PIN_CONFIG_BIAS_PULL_UP)
+ updown |= bit;
+
+- sh_pfc_write_reg(pfc, PUD + reg, 32, updown);
+- sh_pfc_write_reg(pfc, PUEN + reg, 32, enable);
++ sh_pfc_write(pfc, PUD + reg, updown);
++ sh_pfc_write(pfc, PUEN + reg, enable);
+ }
+
+ static const struct sh_pfc_soc_operations r8a7796_pinmux_ops = {
+diff --git a/drivers/pinctrl/sh-pfc/pinctrl.c b/drivers/pinctrl/sh-pfc/pinctrl.c
+index 5c9d79981e6d..736634aee500 100644
+--- a/drivers/pinctrl/sh-pfc/pinctrl.c
++++ b/drivers/pinctrl/sh-pfc/pinctrl.c
+@@ -513,7 +513,7 @@ static int sh_pfc_pinconf_get_drive_strength(struct sh_pfc *pfc,
+ return -EINVAL;
+
+ spin_lock_irqsave(&pfc->lock, flags);
+- val = sh_pfc_read_reg(pfc, reg, 32);
++ val = sh_pfc_read(pfc, reg);
+ spin_unlock_irqrestore(&pfc->lock, flags);
+
+ val = (val >> offset) & GENMASK(size - 1, 0);
+@@ -550,11 +550,11 @@ static int sh_pfc_pinconf_set_drive_strength(struct sh_pfc *pfc,
+
+ spin_lock_irqsave(&pfc->lock, flags);
+
+- val = sh_pfc_read_reg(pfc, reg, 32);
++ val = sh_pfc_read(pfc, reg);
+ val &= ~GENMASK(offset + size - 1, offset);
+ val |= strength << offset;
+
+- sh_pfc_write_reg(pfc, reg, 32, val);
++ sh_pfc_write(pfc, reg, val);
+
+ spin_unlock_irqrestore(&pfc->lock, flags);
+
+@@ -645,7 +645,7 @@ static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned _pin,
+ return bit;
+
+ spin_lock_irqsave(&pfc->lock, flags);
+- val = sh_pfc_read_reg(pfc, pocctrl, 32);
++ val = sh_pfc_read(pfc, pocctrl);
+ spin_unlock_irqrestore(&pfc->lock, flags);
+
+ arg = (val & BIT(bit)) ? 3300 : 1800;
+@@ -716,12 +716,12 @@ static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned _pin,
+ return -EINVAL;
+
+ spin_lock_irqsave(&pfc->lock, flags);
+- val = sh_pfc_read_reg(pfc, pocctrl, 32);
++ val = sh_pfc_read(pfc, pocctrl);
+ if (mV == 3300)
+ val |= BIT(bit);
+ else
+ val &= ~BIT(bit);
+- sh_pfc_write_reg(pfc, pocctrl, 32, val);
++ sh_pfc_write(pfc, pocctrl, val);
+ spin_unlock_irqrestore(&pfc->lock, flags);
+
+ break;
+--
+2.19.0
+
diff --git a/patches/0212-pinctrl-sh-pfc-Add-generic-bias-register-description.patch b/patches/0212-pinctrl-sh-pfc-Add-generic-bias-register-description.patch
new file mode 100644
index 0000000..3dd81c3
--- /dev/null
+++ b/patches/0212-pinctrl-sh-pfc-Add-generic-bias-register-description.patch
@@ -0,0 +1,54 @@
+From 539ac74ff21330c0941901ad7e20bdd5be8f0923 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 29 Sep 2017 14:16:14 +0200
+Subject: [PATCH 0212/1795] pinctrl: sh-pfc: Add generic bias register
+ description
+
+Add a generic way to describe bias registers (for pull-up/down control),
+like is already done for config and drive registers.
+
+This makes the sh-pfc core code aware of these registers, which will
+ease introducing suspend/resume support later.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+(cherry picked from commit beaa34d9080f20c9f0994071703c5d5c012afb56)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/sh_pfc.h | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
+index 8688b405e081..1914f4b5fef5 100644
+--- a/drivers/pinctrl/sh-pfc/sh_pfc.h
++++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
+@@ -148,6 +148,17 @@ struct pinmux_drive_reg {
+ .reg = r, \
+ .fields =
+
++struct pinmux_bias_reg {
++ u32 puen; /* Pull-enable or pull-up control register */
++ u32 pud; /* Pull-up/down control register (optional) */
++ const u16 pins[32];
++};
++
++#define PINMUX_BIAS_REG(name1, r1, name2, r2) \
++ .puen = r1, \
++ .pud = r2, \
++ .pins =
++
+ struct pinmux_data_reg {
+ u32 reg;
+ u8 reg_width;
+@@ -245,6 +256,7 @@ struct sh_pfc_soc_info {
+
+ const struct pinmux_cfg_reg *cfg_regs;
+ const struct pinmux_drive_reg *drive_regs;
++ const struct pinmux_bias_reg *bias_regs;
+ const struct pinmux_data_reg *data_regs;
+
+ const u16 *pinmux_data;
+--
+2.19.0
+
diff --git a/patches/0213-pinctrl-sh-pfc-Add-sh_pfc_pin_to_bias_reg-helper.patch b/patches/0213-pinctrl-sh-pfc-Add-sh_pfc_pin_to_bias_reg-helper.patch
new file mode 100644
index 0000000..003475a
--- /dev/null
+++ b/patches/0213-pinctrl-sh-pfc-Add-sh_pfc_pin_to_bias_reg-helper.patch
@@ -0,0 +1,65 @@
+From 4192a50a337e1192a0d2ecd6edfad01e41019042 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 29 Sep 2017 15:44:38 +0200
+Subject: [PATCH 0213/1795] pinctrl: sh-pfc: Add sh_pfc_pin_to_bias_reg()
+ helper
+
+Add a helper to look up bias registers and bit number for a specific
+pin, using the generic bias register description.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit acdb12453910d86dce3baa95c12178893c0aa32d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/core.c | 20 ++++++++++++++++++++
+ drivers/pinctrl/sh-pfc/core.h | 3 +++
+ 2 files changed, 23 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
+index 8b422ac07e57..01c408a3dee4 100644
+--- a/drivers/pinctrl/sh-pfc/core.c
++++ b/drivers/pinctrl/sh-pfc/core.c
+@@ -404,6 +404,26 @@ sh_pfc_pin_to_bias_info(const struct sh_pfc_bias_info *info,
+ return NULL;
+ }
+
++const struct pinmux_bias_reg *
++sh_pfc_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin,
++ unsigned int *bit)
++{
++ unsigned int i, j;
++
++ for (i = 0; pfc->info->bias_regs[i].puen; i++) {
++ for (j = 0; j < ARRAY_SIZE(pfc->info->bias_regs[i].pins); j++) {
++ if (pfc->info->bias_regs[i].pins[j] == pin) {
++ *bit = j;
++ return &pfc->info->bias_regs[i];
++ }
++ }
++ }
++
++ WARN_ONCE(1, "Pin %u is not in bias info list\n", pin);
++
++ return NULL;
++}
++
+ static int sh_pfc_init_ranges(struct sh_pfc *pfc)
+ {
+ struct sh_pfc_pin_range *range;
+diff --git a/drivers/pinctrl/sh-pfc/core.h b/drivers/pinctrl/sh-pfc/core.h
+index dd215d36dcc8..460d996513ac 100644
+--- a/drivers/pinctrl/sh-pfc/core.h
++++ b/drivers/pinctrl/sh-pfc/core.h
+@@ -35,5 +35,8 @@ int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type);
+ const struct sh_pfc_bias_info *
+ sh_pfc_pin_to_bias_info(const struct sh_pfc_bias_info *info,
+ unsigned int num, unsigned int pin);
++const struct pinmux_bias_reg *
++sh_pfc_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin,
++ unsigned int *bit);
+
+ #endif /* __SH_PFC_CORE_H__ */
+--
+2.19.0
+
diff --git a/patches/0214-pinctrl-sh-pfc-r8a7795-es1-Use-generic-bias-register.patch b/patches/0214-pinctrl-sh-pfc-r8a7795-es1-Use-generic-bias-register.patch
new file mode 100644
index 0000000..f02faad
--- /dev/null
+++ b/patches/0214-pinctrl-sh-pfc-r8a7795-es1-Use-generic-bias-register.patch
@@ -0,0 +1,572 @@
+From 0b35e6dabb38934976a2bdd994945d098e59db05 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 29 Sep 2017 14:12:32 +0200
+Subject: [PATCH 0214/1795] pinctrl: sh-pfc: r8a7795-es1: Use generic bias
+ register description
+
+Move R-Car H3 ES1.x bias support over to the generic way to describe
+bias registers, which will be needed for suspend/resume support.
+
+As the new description is more compact, this decreases kernel size by
+ca. 304 bytes.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+(cherry picked from commit e1a16b5b426c5c10dbe2653af93d12d939855b65)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c | 499 ++++++++++++-----------
+ 1 file changed, 258 insertions(+), 241 deletions(-)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
+index 61bcae5dac52..8042c9331a51 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
+@@ -1449,6 +1449,7 @@ static const u16 pinmux_data[] = {
+ #define ROW_GROUP_A(r) ('Z' - 'A' + 1 + (r))
+ #define PIN_NUMBER(r, c) (((r) - 'A') * 39 + (c) + 300)
+ #define PIN_A_NUMBER(r, c) PIN_NUMBER(ROW_GROUP_A(r), c)
++#define PIN_NONE U16_MAX
+
+ static const struct sh_pfc_pin pinmux_pins[] = {
+ PINMUX_GPIO_GP_ALL(),
+@@ -5438,242 +5439,261 @@ static int r8a7795es1_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin,
+ return bit;
+ }
+
+-#define PUEN 0xe6060400
+-#define PUD 0xe6060440
+-
+-#define PU0 0x00
+-#define PU1 0x04
+-#define PU2 0x08
+-#define PU3 0x0c
+-#define PU4 0x10
+-#define PU5 0x14
+-#define PU6 0x18
+-
+-static const struct sh_pfc_bias_info bias_info[] = {
+- { RCAR_GP_PIN(2, 11), PU0, 31 }, /* AVB_PHY_INT */
+- { RCAR_GP_PIN(2, 10), PU0, 30 }, /* AVB_MAGIC */
+- { RCAR_GP_PIN(2, 9), PU0, 29 }, /* AVB_MDC */
+- { PIN_NUMBER('A', 9), PU0, 28 }, /* AVB_MDIO */
+- { PIN_NUMBER('A', 12), PU0, 27 }, /* AVB_TXCREFCLK */
+- { PIN_NUMBER('B', 17), PU0, 26 }, /* AVB_TD3 */
+- { PIN_NUMBER('A', 17), PU0, 25 }, /* AVB_TD2 */
+- { PIN_NUMBER('B', 18), PU0, 24 }, /* AVB_TD1 */
+- { PIN_NUMBER('A', 18), PU0, 23 }, /* AVB_TD0 */
+- { PIN_NUMBER('A', 19), PU0, 22 }, /* AVB_TXC */
+- { PIN_NUMBER('A', 8), PU0, 21 }, /* AVB_TX_CTL */
+- { PIN_NUMBER('B', 14), PU0, 20 }, /* AVB_RD3 */
+- { PIN_NUMBER('A', 14), PU0, 19 }, /* AVB_RD2 */
+- { PIN_NUMBER('B', 13), PU0, 18 }, /* AVB_RD1 */
+- { PIN_NUMBER('A', 13), PU0, 17 }, /* AVB_RD0 */
+- { PIN_NUMBER('B', 19), PU0, 16 }, /* AVB_RXC */
+- { PIN_NUMBER('A', 16), PU0, 15 }, /* AVB_RX_CTL */
+- { PIN_NUMBER('V', 7), PU0, 14 }, /* RPC_RESET# */
+- { PIN_NUMBER('V', 6), PU0, 13 }, /* RPC_WP# */
+- { PIN_NUMBER('Y', 7), PU0, 12 }, /* RPC_INT# */
+- { PIN_NUMBER('V', 5), PU0, 11 }, /* QSPI1_SSL */
+- { PIN_A_NUMBER('C', 3), PU0, 10 }, /* QSPI1_IO3 */
+- { PIN_A_NUMBER('E', 4), PU0, 9 }, /* QSPI1_IO2 */
+- { PIN_A_NUMBER('E', 5), PU0, 8 }, /* QSPI1_MISO_IO1 */
+- { PIN_A_NUMBER('C', 7), PU0, 7 }, /* QSPI1_MOSI_IO0 */
+- { PIN_NUMBER('V', 3), PU0, 6 }, /* QSPI1_SPCLK */
+- { PIN_NUMBER('Y', 3), PU0, 5 }, /* QSPI0_SSL */
+- { PIN_A_NUMBER('B', 6), PU0, 4 }, /* QSPI0_IO3 */
+- { PIN_NUMBER('Y', 6), PU0, 3 }, /* QSPI0_IO2 */
+- { PIN_A_NUMBER('B', 4), PU0, 2 }, /* QSPI0_MISO_IO1 */
+- { PIN_A_NUMBER('C', 5), PU0, 1 }, /* QSPI0_MOSI_IO0 */
+- { PIN_NUMBER('W', 3), PU0, 0 }, /* QSPI0_SPCLK */
+-
+- { RCAR_GP_PIN(1, 19), PU1, 31 }, /* A19 */
+- { RCAR_GP_PIN(1, 18), PU1, 30 }, /* A18 */
+- { RCAR_GP_PIN(1, 17), PU1, 29 }, /* A17 */
+- { RCAR_GP_PIN(1, 16), PU1, 28 }, /* A16 */
+- { RCAR_GP_PIN(1, 15), PU1, 27 }, /* A15 */
+- { RCAR_GP_PIN(1, 14), PU1, 26 }, /* A14 */
+- { RCAR_GP_PIN(1, 13), PU1, 25 }, /* A13 */
+- { RCAR_GP_PIN(1, 12), PU1, 24 }, /* A12 */
+- { RCAR_GP_PIN(1, 11), PU1, 23 }, /* A11 */
+- { RCAR_GP_PIN(1, 10), PU1, 22 }, /* A10 */
+- { RCAR_GP_PIN(1, 9), PU1, 21 }, /* A9 */
+- { RCAR_GP_PIN(1, 8), PU1, 20 }, /* A8 */
+- { RCAR_GP_PIN(1, 7), PU1, 19 }, /* A7 */
+- { RCAR_GP_PIN(1, 6), PU1, 18 }, /* A6 */
+- { RCAR_GP_PIN(1, 5), PU1, 17 }, /* A5 */
+- { RCAR_GP_PIN(1, 4), PU1, 16 }, /* A4 */
+- { RCAR_GP_PIN(1, 3), PU1, 15 }, /* A3 */
+- { RCAR_GP_PIN(1, 2), PU1, 14 }, /* A2 */
+- { RCAR_GP_PIN(1, 1), PU1, 13 }, /* A1 */
+- { RCAR_GP_PIN(1, 0), PU1, 12 }, /* A0 */
+- { RCAR_GP_PIN(2, 8), PU1, 11 }, /* PWM2_A */
+- { RCAR_GP_PIN(2, 7), PU1, 10 }, /* PWM1_A */
+- { RCAR_GP_PIN(2, 6), PU1, 9 }, /* PWM0 */
+- { RCAR_GP_PIN(2, 5), PU1, 8 }, /* IRQ5 */
+- { RCAR_GP_PIN(2, 4), PU1, 7 }, /* IRQ4 */
+- { RCAR_GP_PIN(2, 3), PU1, 6 }, /* IRQ3 */
+- { RCAR_GP_PIN(2, 2), PU1, 5 }, /* IRQ2 */
+- { RCAR_GP_PIN(2, 1), PU1, 4 }, /* IRQ1 */
+- { RCAR_GP_PIN(2, 0), PU1, 3 }, /* IRQ0 */
+- { RCAR_GP_PIN(2, 14), PU1, 2 }, /* AVB_AVTP_CAPTURE_A */
+- { RCAR_GP_PIN(2, 13), PU1, 1 }, /* AVB_AVTP_MATCH_A */
+- { RCAR_GP_PIN(2, 12), PU1, 0 }, /* AVB_LINK */
+-
+- { PIN_A_NUMBER('P', 8), PU2, 31 }, /* DU_DOTCLKIN1 */
+- { PIN_A_NUMBER('P', 7), PU2, 30 }, /* DU_DOTCLKIN0 */
+- { RCAR_GP_PIN(7, 3), PU2, 29 }, /* HDMI1_CEC */
+- { RCAR_GP_PIN(7, 2), PU2, 28 }, /* HDMI0_CEC */
+- { RCAR_GP_PIN(7, 1), PU2, 27 }, /* AVS2 */
+- { RCAR_GP_PIN(7, 0), PU2, 26 }, /* AVS1 */
+- { RCAR_GP_PIN(0, 15), PU2, 25 }, /* D15 */
+- { RCAR_GP_PIN(0, 14), PU2, 24 }, /* D14 */
+- { RCAR_GP_PIN(0, 13), PU2, 23 }, /* D13 */
+- { RCAR_GP_PIN(0, 12), PU2, 22 }, /* D12 */
+- { RCAR_GP_PIN(0, 11), PU2, 21 }, /* D11 */
+- { RCAR_GP_PIN(0, 10), PU2, 20 }, /* D10 */
+- { RCAR_GP_PIN(0, 9), PU2, 19 }, /* D9 */
+- { RCAR_GP_PIN(0, 8), PU2, 18 }, /* D8 */
+- { RCAR_GP_PIN(0, 7), PU2, 17 }, /* D7 */
+- { RCAR_GP_PIN(0, 6), PU2, 16 }, /* D6 */
+- { RCAR_GP_PIN(0, 5), PU2, 15 }, /* D5 */
+- { RCAR_GP_PIN(0, 4), PU2, 14 }, /* D4 */
+- { RCAR_GP_PIN(0, 3), PU2, 13 }, /* D3 */
+- { RCAR_GP_PIN(0, 2), PU2, 12 }, /* D2 */
+- { RCAR_GP_PIN(0, 1), PU2, 11 }, /* D1 */
+- { RCAR_GP_PIN(0, 0), PU2, 10 }, /* D0 */
+- { PIN_NUMBER('C', 1), PU2, 9 }, /* PRESETOUT# */
+- { RCAR_GP_PIN(1, 27), PU2, 8 }, /* EX_WAIT0_A */
+- { RCAR_GP_PIN(1, 26), PU2, 7 }, /* WE1_N */
+- { RCAR_GP_PIN(1, 25), PU2, 6 }, /* WE0_N */
+- { RCAR_GP_PIN(1, 24), PU2, 5 }, /* RD_WR_N */
+- { RCAR_GP_PIN(1, 23), PU2, 4 }, /* RD_N */
+- { RCAR_GP_PIN(1, 22), PU2, 3 }, /* BS_N */
+- { RCAR_GP_PIN(1, 21), PU2, 2 }, /* CS1_N_A26 */
+- { RCAR_GP_PIN(1, 20), PU2, 1 }, /* CS0_N */
+- { PIN_NUMBER('F', 1), PU2, 0 }, /* CLKOUT */
+-
+- { RCAR_GP_PIN(4, 9), PU3, 31 }, /* SD3_DAT0 */
+- { RCAR_GP_PIN(4, 8), PU3, 30 }, /* SD3_CMD */
+- { RCAR_GP_PIN(4, 7), PU3, 29 }, /* SD3_CLK */
+- { RCAR_GP_PIN(4, 6), PU3, 28 }, /* SD2_DS */
+- { RCAR_GP_PIN(4, 5), PU3, 27 }, /* SD2_DAT3 */
+- { RCAR_GP_PIN(4, 4), PU3, 26 }, /* SD2_DAT2 */
+- { RCAR_GP_PIN(4, 3), PU3, 25 }, /* SD2_DAT1 */
+- { RCAR_GP_PIN(4, 2), PU3, 24 }, /* SD2_DAT0 */
+- { RCAR_GP_PIN(4, 1), PU3, 23 }, /* SD2_CMD */
+- { RCAR_GP_PIN(4, 0), PU3, 22 }, /* SD2_CLK */
+- { RCAR_GP_PIN(3, 11), PU3, 21 }, /* SD1_DAT3 */
+- { RCAR_GP_PIN(3, 10), PU3, 20 }, /* SD1_DAT2 */
+- { RCAR_GP_PIN(3, 9), PU3, 19 }, /* SD1_DAT1 */
+- { RCAR_GP_PIN(3, 8), PU3, 18 }, /* SD1_DAT0 */
+- { RCAR_GP_PIN(3, 7), PU3, 17 }, /* SD1_CMD */
+- { RCAR_GP_PIN(3, 6), PU3, 16 }, /* SD1_CLK */
+- { RCAR_GP_PIN(3, 5), PU3, 15 }, /* SD0_DAT3 */
+- { RCAR_GP_PIN(3, 4), PU3, 14 }, /* SD0_DAT2 */
+- { RCAR_GP_PIN(3, 3), PU3, 13 }, /* SD0_DAT1 */
+- { RCAR_GP_PIN(3, 2), PU3, 12 }, /* SD0_DAT0 */
+- { RCAR_GP_PIN(3, 1), PU3, 11 }, /* SD0_CMD */
+- { RCAR_GP_PIN(3, 0), PU3, 10 }, /* SD0_CLK */
+- { PIN_A_NUMBER('T', 30), PU3, 9 }, /* ASEBRK */
+- /* bit 8 n/a */
+- { PIN_A_NUMBER('R', 29), PU3, 7 }, /* TDI */
+- { PIN_A_NUMBER('R', 30), PU3, 6 }, /* TMS */
+- { PIN_A_NUMBER('T', 27), PU3, 5 }, /* TCK */
+- { PIN_A_NUMBER('R', 26), PU3, 4 }, /* TRST# */
+- { PIN_A_NUMBER('D', 39), PU3, 3 }, /* EXTALR*/
+- { PIN_A_NUMBER('D', 38), PU3, 2 }, /* FSCLKST# */
+- { PIN_A_NUMBER('R', 8), PU3, 1 }, /* DU_DOTCLKIN3 */
+- { PIN_A_NUMBER('R', 7), PU3, 0 }, /* DU_DOTCLKIN2 */
+-
+- { RCAR_GP_PIN(5, 19), PU4, 31 }, /* MSIOF0_SS1 */
+- { RCAR_GP_PIN(5, 18), PU4, 30 }, /* MSIOF0_SYNC */
+- { RCAR_GP_PIN(5, 17), PU4, 29 }, /* MSIOF0_SCK */
+- { RCAR_GP_PIN(5, 16), PU4, 28 }, /* HRTS0_N */
+- { RCAR_GP_PIN(5, 15), PU4, 27 }, /* HCTS0_N */
+- { RCAR_GP_PIN(5, 14), PU4, 26 }, /* HTX0 */
+- { RCAR_GP_PIN(5, 13), PU4, 25 }, /* HRX0 */
+- { RCAR_GP_PIN(5, 12), PU4, 24 }, /* HSCK0 */
+- { RCAR_GP_PIN(5, 11), PU4, 23 }, /* RX2_A */
+- { RCAR_GP_PIN(5, 10), PU4, 22 }, /* TX2_A */
+- { RCAR_GP_PIN(5, 9), PU4, 21 }, /* SCK2 */
+- { RCAR_GP_PIN(5, 8), PU4, 20 }, /* RTS1_N_TANS */
+- { RCAR_GP_PIN(5, 7), PU4, 19 }, /* CTS1_N */
+- { RCAR_GP_PIN(5, 6), PU4, 18 }, /* TX1_A */
+- { RCAR_GP_PIN(5, 5), PU4, 17 }, /* RX1_A */
+- { RCAR_GP_PIN(5, 4), PU4, 16 }, /* RTS0_N_TANS */
+- { RCAR_GP_PIN(5, 3), PU4, 15 }, /* CTS0_N */
+- { RCAR_GP_PIN(5, 2), PU4, 14 }, /* TX0 */
+- { RCAR_GP_PIN(5, 1), PU4, 13 }, /* RX0 */
+- { RCAR_GP_PIN(5, 0), PU4, 12 }, /* SCK0 */
+- { RCAR_GP_PIN(3, 15), PU4, 11 }, /* SD1_WP */
+- { RCAR_GP_PIN(3, 14), PU4, 10 }, /* SD1_CD */
+- { RCAR_GP_PIN(3, 13), PU4, 9 }, /* SD0_WP */
+- { RCAR_GP_PIN(3, 12), PU4, 8 }, /* SD0_CD */
+- { RCAR_GP_PIN(4, 17), PU4, 7 }, /* SD3_DS */
+- { RCAR_GP_PIN(4, 16), PU4, 6 }, /* SD3_DAT7 */
+- { RCAR_GP_PIN(4, 15), PU4, 5 }, /* SD3_DAT6 */
+- { RCAR_GP_PIN(4, 14), PU4, 4 }, /* SD3_DAT5 */
+- { RCAR_GP_PIN(4, 13), PU4, 3 }, /* SD3_DAT4 */
+- { RCAR_GP_PIN(4, 12), PU4, 2 }, /* SD3_DAT3 */
+- { RCAR_GP_PIN(4, 11), PU4, 1 }, /* SD3_DAT2 */
+- { RCAR_GP_PIN(4, 10), PU4, 0 }, /* SD3_DAT1 */
+-
+- { RCAR_GP_PIN(6, 24), PU5, 31 }, /* USB0_PWEN */
+- { RCAR_GP_PIN(6, 23), PU5, 30 }, /* AUDIO_CLKB_B */
+- { RCAR_GP_PIN(6, 22), PU5, 29 }, /* AUDIO_CLKA_A */
+- { RCAR_GP_PIN(6, 21), PU5, 28 }, /* SSI_SDATA9_A */
+- { RCAR_GP_PIN(6, 20), PU5, 27 }, /* SSI_SDATA8 */
+- { RCAR_GP_PIN(6, 19), PU5, 26 }, /* SSI_SDATA7 */
+- { RCAR_GP_PIN(6, 18), PU5, 25 }, /* SSI_WS78 */
+- { RCAR_GP_PIN(6, 17), PU5, 24 }, /* SSI_SCK78 */
+- { RCAR_GP_PIN(6, 16), PU5, 23 }, /* SSI_SDATA6 */
+- { RCAR_GP_PIN(6, 15), PU5, 22 }, /* SSI_WS6 */
+- { RCAR_GP_PIN(6, 14), PU5, 21 }, /* SSI_SCK6 */
+- { RCAR_GP_PIN(6, 13), PU5, 20 }, /* SSI_SDATA5 */
+- { RCAR_GP_PIN(6, 12), PU5, 19 }, /* SSI_WS5 */
+- { RCAR_GP_PIN(6, 11), PU5, 18 }, /* SSI_SCK5 */
+- { RCAR_GP_PIN(6, 10), PU5, 17 }, /* SSI_SDATA4 */
+- { RCAR_GP_PIN(6, 9), PU5, 16 }, /* SSI_WS4 */
+- { RCAR_GP_PIN(6, 8), PU5, 15 }, /* SSI_SCK4 */
+- { RCAR_GP_PIN(6, 7), PU5, 14 }, /* SSI_SDATA3 */
+- { RCAR_GP_PIN(6, 6), PU5, 13 }, /* SSI_WS349 */
+- { RCAR_GP_PIN(6, 5), PU5, 12 }, /* SSI_SCK349 */
+- { RCAR_GP_PIN(6, 4), PU5, 11 }, /* SSI_SDATA2_A */
+- { RCAR_GP_PIN(6, 3), PU5, 10 }, /* SSI_SDATA1_A */
+- { RCAR_GP_PIN(6, 2), PU5, 9 }, /* SSI_SDATA0 */
+- { RCAR_GP_PIN(6, 1), PU5, 8 }, /* SSI_WS01239 */
+- { RCAR_GP_PIN(6, 0), PU5, 7 }, /* SSI_SCK01239 */
+- { PIN_NUMBER('H', 37), PU5, 6 }, /* MLB_REF */
+- { RCAR_GP_PIN(5, 25), PU5, 5 }, /* MLB_DAT */
+- { RCAR_GP_PIN(5, 24), PU5, 4 }, /* MLB_SIG */
+- { RCAR_GP_PIN(5, 23), PU5, 3 }, /* MLB_CLK */
+- { RCAR_GP_PIN(5, 22), PU5, 2 }, /* MSIOF0_RXD */
+- { RCAR_GP_PIN(5, 21), PU5, 1 }, /* MSIOF0_SS2 */
+- { RCAR_GP_PIN(5, 20), PU5, 0 }, /* MSIOF0_TXD */
+-
+- { RCAR_GP_PIN(6, 31), PU6, 6 }, /* USB31_OVC */
+- { RCAR_GP_PIN(6, 30), PU6, 5 }, /* USB31_PWEN */
+- { RCAR_GP_PIN(6, 29), PU6, 4 }, /* USB30_OVC */
+- { RCAR_GP_PIN(6, 28), PU6, 3 }, /* USB30_PWEN */
+- { RCAR_GP_PIN(6, 27), PU6, 2 }, /* USB1_OVC */
+- { RCAR_GP_PIN(6, 26), PU6, 1 }, /* USB1_PWEN */
+- { RCAR_GP_PIN(6, 25), PU6, 0 }, /* USB0_OVC */
++static const struct pinmux_bias_reg pinmux_bias_regs[] = {
++ { PINMUX_BIAS_REG("PUEN0", 0xe6060400, "PUD0", 0xe6060440) {
++ [ 0] = PIN_NUMBER('W', 3), /* QSPI0_SPCLK */
++ [ 1] = PIN_A_NUMBER('C', 5), /* QSPI0_MOSI_IO0 */
++ [ 2] = PIN_A_NUMBER('B', 4), /* QSPI0_MISO_IO1 */
++ [ 3] = PIN_NUMBER('Y', 6), /* QSPI0_IO2 */
++ [ 4] = PIN_A_NUMBER('B', 6), /* QSPI0_IO3 */
++ [ 5] = PIN_NUMBER('Y', 3), /* QSPI0_SSL */
++ [ 6] = PIN_NUMBER('V', 3), /* QSPI1_SPCLK */
++ [ 7] = PIN_A_NUMBER('C', 7), /* QSPI1_MOSI_IO0 */
++ [ 8] = PIN_A_NUMBER('E', 5), /* QSPI1_MISO_IO1 */
++ [ 9] = PIN_A_NUMBER('E', 4), /* QSPI1_IO2 */
++ [10] = PIN_A_NUMBER('C', 3), /* QSPI1_IO3 */
++ [11] = PIN_NUMBER('V', 5), /* QSPI1_SSL */
++ [12] = PIN_NUMBER('Y', 7), /* RPC_INT# */
++ [13] = PIN_NUMBER('V', 6), /* RPC_WP# */
++ [14] = PIN_NUMBER('V', 7), /* RPC_RESET# */
++ [15] = PIN_NUMBER('A', 16), /* AVB_RX_CTL */
++ [16] = PIN_NUMBER('B', 19), /* AVB_RXC */
++ [17] = PIN_NUMBER('A', 13), /* AVB_RD0 */
++ [18] = PIN_NUMBER('B', 13), /* AVB_RD1 */
++ [19] = PIN_NUMBER('A', 14), /* AVB_RD2 */
++ [20] = PIN_NUMBER('B', 14), /* AVB_RD3 */
++ [21] = PIN_NUMBER('A', 8), /* AVB_TX_CTL */
++ [22] = PIN_NUMBER('A', 19), /* AVB_TXC */
++ [23] = PIN_NUMBER('A', 18), /* AVB_TD0 */
++ [24] = PIN_NUMBER('B', 18), /* AVB_TD1 */
++ [25] = PIN_NUMBER('A', 17), /* AVB_TD2 */
++ [26] = PIN_NUMBER('B', 17), /* AVB_TD3 */
++ [27] = PIN_NUMBER('A', 12), /* AVB_TXCREFCLK */
++ [28] = PIN_NUMBER('A', 9), /* AVB_MDIO */
++ [29] = RCAR_GP_PIN(2, 9), /* AVB_MDC */
++ [30] = RCAR_GP_PIN(2, 10), /* AVB_MAGIC */
++ [31] = RCAR_GP_PIN(2, 11), /* AVB_PHY_INT */
++ } },
++ { PINMUX_BIAS_REG("PUEN1", 0xe6060404, "PUD1", 0xe6060444) {
++ [ 0] = RCAR_GP_PIN(2, 12), /* AVB_LINK */
++ [ 1] = RCAR_GP_PIN(2, 13), /* AVB_AVTP_MATCH_A */
++ [ 2] = RCAR_GP_PIN(2, 14), /* AVB_AVTP_CAPTURE_A */
++ [ 3] = RCAR_GP_PIN(2, 0), /* IRQ0 */
++ [ 4] = RCAR_GP_PIN(2, 1), /* IRQ1 */
++ [ 5] = RCAR_GP_PIN(2, 2), /* IRQ2 */
++ [ 6] = RCAR_GP_PIN(2, 3), /* IRQ3 */
++ [ 7] = RCAR_GP_PIN(2, 4), /* IRQ4 */
++ [ 8] = RCAR_GP_PIN(2, 5), /* IRQ5 */
++ [ 9] = RCAR_GP_PIN(2, 6), /* PWM0 */
++ [10] = RCAR_GP_PIN(2, 7), /* PWM1_A */
++ [11] = RCAR_GP_PIN(2, 8), /* PWM2_A */
++ [12] = RCAR_GP_PIN(1, 0), /* A0 */
++ [13] = RCAR_GP_PIN(1, 1), /* A1 */
++ [14] = RCAR_GP_PIN(1, 2), /* A2 */
++ [15] = RCAR_GP_PIN(1, 3), /* A3 */
++ [16] = RCAR_GP_PIN(1, 4), /* A4 */
++ [17] = RCAR_GP_PIN(1, 5), /* A5 */
++ [18] = RCAR_GP_PIN(1, 6), /* A6 */
++ [19] = RCAR_GP_PIN(1, 7), /* A7 */
++ [20] = RCAR_GP_PIN(1, 8), /* A8 */
++ [21] = RCAR_GP_PIN(1, 9), /* A9 */
++ [22] = RCAR_GP_PIN(1, 10), /* A10 */
++ [23] = RCAR_GP_PIN(1, 11), /* A11 */
++ [24] = RCAR_GP_PIN(1, 12), /* A12 */
++ [25] = RCAR_GP_PIN(1, 13), /* A13 */
++ [26] = RCAR_GP_PIN(1, 14), /* A14 */
++ [27] = RCAR_GP_PIN(1, 15), /* A15 */
++ [28] = RCAR_GP_PIN(1, 16), /* A16 */
++ [29] = RCAR_GP_PIN(1, 17), /* A17 */
++ [30] = RCAR_GP_PIN(1, 18), /* A18 */
++ [31] = RCAR_GP_PIN(1, 19), /* A19 */
++ } },
++ { PINMUX_BIAS_REG("PUEN2", 0xe6060408, "PUD2", 0xe6060448) {
++ [ 0] = PIN_NUMBER('F', 1), /* CLKOUT */
++ [ 1] = RCAR_GP_PIN(1, 20), /* CS0_N */
++ [ 2] = RCAR_GP_PIN(1, 21), /* CS1_N_A26 */
++ [ 3] = RCAR_GP_PIN(1, 22), /* BS_N */
++ [ 4] = RCAR_GP_PIN(1, 23), /* RD_N */
++ [ 5] = RCAR_GP_PIN(1, 24), /* RD_WR_N */
++ [ 6] = RCAR_GP_PIN(1, 25), /* WE0_N */
++ [ 7] = RCAR_GP_PIN(1, 26), /* WE1_N */
++ [ 8] = RCAR_GP_PIN(1, 27), /* EX_WAIT0_A */
++ [ 9] = PIN_NUMBER('C', 1), /* PRESETOUT# */
++ [10] = RCAR_GP_PIN(0, 0), /* D0 */
++ [11] = RCAR_GP_PIN(0, 1), /* D1 */
++ [12] = RCAR_GP_PIN(0, 2), /* D2 */
++ [13] = RCAR_GP_PIN(0, 3), /* D3 */
++ [14] = RCAR_GP_PIN(0, 4), /* D4 */
++ [15] = RCAR_GP_PIN(0, 5), /* D5 */
++ [16] = RCAR_GP_PIN(0, 6), /* D6 */
++ [17] = RCAR_GP_PIN(0, 7), /* D7 */
++ [18] = RCAR_GP_PIN(0, 8), /* D8 */
++ [19] = RCAR_GP_PIN(0, 9), /* D9 */
++ [20] = RCAR_GP_PIN(0, 10), /* D10 */
++ [21] = RCAR_GP_PIN(0, 11), /* D11 */
++ [22] = RCAR_GP_PIN(0, 12), /* D12 */
++ [23] = RCAR_GP_PIN(0, 13), /* D13 */
++ [24] = RCAR_GP_PIN(0, 14), /* D14 */
++ [25] = RCAR_GP_PIN(0, 15), /* D15 */
++ [26] = RCAR_GP_PIN(7, 0), /* AVS1 */
++ [27] = RCAR_GP_PIN(7, 1), /* AVS2 */
++ [28] = RCAR_GP_PIN(7, 2), /* HDMI0_CEC */
++ [29] = RCAR_GP_PIN(7, 3), /* HDMI1_CEC */
++ [30] = PIN_A_NUMBER('P', 7), /* DU_DOTCLKIN0 */
++ [31] = PIN_A_NUMBER('P', 8), /* DU_DOTCLKIN1 */
++ } },
++ { PINMUX_BIAS_REG("PUEN3", 0xe606040c, "PUD3", 0xe606044c) {
++ [ 0] = PIN_A_NUMBER('R', 7), /* DU_DOTCLKIN2 */
++ [ 1] = PIN_A_NUMBER('R', 8), /* DU_DOTCLKIN3 */
++ [ 2] = PIN_A_NUMBER('D', 38), /* FSCLKST# */
++ [ 3] = PIN_A_NUMBER('D', 39), /* EXTALR*/
++ [ 4] = PIN_A_NUMBER('R', 26), /* TRST# */
++ [ 5] = PIN_A_NUMBER('T', 27), /* TCK */
++ [ 6] = PIN_A_NUMBER('R', 30), /* TMS */
++ [ 7] = PIN_A_NUMBER('R', 29), /* TDI */
++ [ 8] = PIN_NONE,
++ [ 9] = PIN_A_NUMBER('T', 30), /* ASEBRK */
++ [10] = RCAR_GP_PIN(3, 0), /* SD0_CLK */
++ [11] = RCAR_GP_PIN(3, 1), /* SD0_CMD */
++ [12] = RCAR_GP_PIN(3, 2), /* SD0_DAT0 */
++ [13] = RCAR_GP_PIN(3, 3), /* SD0_DAT1 */
++ [14] = RCAR_GP_PIN(3, 4), /* SD0_DAT2 */
++ [15] = RCAR_GP_PIN(3, 5), /* SD0_DAT3 */
++ [16] = RCAR_GP_PIN(3, 6), /* SD1_CLK */
++ [17] = RCAR_GP_PIN(3, 7), /* SD1_CMD */
++ [18] = RCAR_GP_PIN(3, 8), /* SD1_DAT0 */
++ [19] = RCAR_GP_PIN(3, 9), /* SD1_DAT1 */
++ [20] = RCAR_GP_PIN(3, 10), /* SD1_DAT2 */
++ [21] = RCAR_GP_PIN(3, 11), /* SD1_DAT3 */
++ [22] = RCAR_GP_PIN(4, 0), /* SD2_CLK */
++ [23] = RCAR_GP_PIN(4, 1), /* SD2_CMD */
++ [24] = RCAR_GP_PIN(4, 2), /* SD2_DAT0 */
++ [25] = RCAR_GP_PIN(4, 3), /* SD2_DAT1 */
++ [26] = RCAR_GP_PIN(4, 4), /* SD2_DAT2 */
++ [27] = RCAR_GP_PIN(4, 5), /* SD2_DAT3 */
++ [28] = RCAR_GP_PIN(4, 6), /* SD2_DS */
++ [29] = RCAR_GP_PIN(4, 7), /* SD3_CLK */
++ [30] = RCAR_GP_PIN(4, 8), /* SD3_CMD */
++ [31] = RCAR_GP_PIN(4, 9), /* SD3_DAT0 */
++ } },
++ { PINMUX_BIAS_REG("PUEN4", 0xe6060410, "PUD4", 0xe6060450) {
++ [ 0] = RCAR_GP_PIN(4, 10), /* SD3_DAT1 */
++ [ 1] = RCAR_GP_PIN(4, 11), /* SD3_DAT2 */
++ [ 2] = RCAR_GP_PIN(4, 12), /* SD3_DAT3 */
++ [ 3] = RCAR_GP_PIN(4, 13), /* SD3_DAT4 */
++ [ 4] = RCAR_GP_PIN(4, 14), /* SD3_DAT5 */
++ [ 5] = RCAR_GP_PIN(4, 15), /* SD3_DAT6 */
++ [ 6] = RCAR_GP_PIN(4, 16), /* SD3_DAT7 */
++ [ 7] = RCAR_GP_PIN(4, 17), /* SD3_DS */
++ [ 8] = RCAR_GP_PIN(3, 12), /* SD0_CD */
++ [ 9] = RCAR_GP_PIN(3, 13), /* SD0_WP */
++ [10] = RCAR_GP_PIN(3, 14), /* SD1_CD */
++ [11] = RCAR_GP_PIN(3, 15), /* SD1_WP */
++ [12] = RCAR_GP_PIN(5, 0), /* SCK0 */
++ [13] = RCAR_GP_PIN(5, 1), /* RX0 */
++ [14] = RCAR_GP_PIN(5, 2), /* TX0 */
++ [15] = RCAR_GP_PIN(5, 3), /* CTS0_N */
++ [16] = RCAR_GP_PIN(5, 4), /* RTS0_N_TANS */
++ [17] = RCAR_GP_PIN(5, 5), /* RX1_A */
++ [18] = RCAR_GP_PIN(5, 6), /* TX1_A */
++ [19] = RCAR_GP_PIN(5, 7), /* CTS1_N */
++ [20] = RCAR_GP_PIN(5, 8), /* RTS1_N_TANS */
++ [21] = RCAR_GP_PIN(5, 9), /* SCK2 */
++ [22] = RCAR_GP_PIN(5, 10), /* TX2_A */
++ [23] = RCAR_GP_PIN(5, 11), /* RX2_A */
++ [24] = RCAR_GP_PIN(5, 12), /* HSCK0 */
++ [25] = RCAR_GP_PIN(5, 13), /* HRX0 */
++ [26] = RCAR_GP_PIN(5, 14), /* HTX0 */
++ [27] = RCAR_GP_PIN(5, 15), /* HCTS0_N */
++ [28] = RCAR_GP_PIN(5, 16), /* HRTS0_N */
++ [29] = RCAR_GP_PIN(5, 17), /* MSIOF0_SCK */
++ [30] = RCAR_GP_PIN(5, 18), /* MSIOF0_SYNC */
++ [31] = RCAR_GP_PIN(5, 19), /* MSIOF0_SS1 */
++ } },
++ { PINMUX_BIAS_REG("PUEN5", 0xe6060414, "PUD5", 0xe6060454) {
++ [ 0] = RCAR_GP_PIN(5, 20), /* MSIOF0_TXD */
++ [ 1] = RCAR_GP_PIN(5, 21), /* MSIOF0_SS2 */
++ [ 2] = RCAR_GP_PIN(5, 22), /* MSIOF0_RXD */
++ [ 3] = RCAR_GP_PIN(5, 23), /* MLB_CLK */
++ [ 4] = RCAR_GP_PIN(5, 24), /* MLB_SIG */
++ [ 5] = RCAR_GP_PIN(5, 25), /* MLB_DAT */
++ [ 6] = PIN_NUMBER('H', 37), /* MLB_REF */
++ [ 7] = RCAR_GP_PIN(6, 0), /* SSI_SCK01239 */
++ [ 8] = RCAR_GP_PIN(6, 1), /* SSI_WS01239 */
++ [ 9] = RCAR_GP_PIN(6, 2), /* SSI_SDATA0 */
++ [10] = RCAR_GP_PIN(6, 3), /* SSI_SDATA1_A */
++ [11] = RCAR_GP_PIN(6, 4), /* SSI_SDATA2_A */
++ [12] = RCAR_GP_PIN(6, 5), /* SSI_SCK349 */
++ [13] = RCAR_GP_PIN(6, 6), /* SSI_WS349 */
++ [14] = RCAR_GP_PIN(6, 7), /* SSI_SDATA3 */
++ [15] = RCAR_GP_PIN(6, 8), /* SSI_SCK4 */
++ [16] = RCAR_GP_PIN(6, 9), /* SSI_WS4 */
++ [17] = RCAR_GP_PIN(6, 10), /* SSI_SDATA4 */
++ [18] = RCAR_GP_PIN(6, 11), /* SSI_SCK5 */
++ [19] = RCAR_GP_PIN(6, 12), /* SSI_WS5 */
++ [20] = RCAR_GP_PIN(6, 13), /* SSI_SDATA5 */
++ [21] = RCAR_GP_PIN(6, 14), /* SSI_SCK6 */
++ [22] = RCAR_GP_PIN(6, 15), /* SSI_WS6 */
++ [23] = RCAR_GP_PIN(6, 16), /* SSI_SDATA6 */
++ [24] = RCAR_GP_PIN(6, 17), /* SSI_SCK78 */
++ [25] = RCAR_GP_PIN(6, 18), /* SSI_WS78 */
++ [26] = RCAR_GP_PIN(6, 19), /* SSI_SDATA7 */
++ [27] = RCAR_GP_PIN(6, 20), /* SSI_SDATA8 */
++ [28] = RCAR_GP_PIN(6, 21), /* SSI_SDATA9_A */
++ [29] = RCAR_GP_PIN(6, 22), /* AUDIO_CLKA_A */
++ [30] = RCAR_GP_PIN(6, 23), /* AUDIO_CLKB_B */
++ [31] = RCAR_GP_PIN(6, 24), /* USB0_PWEN */
++ } },
++ { PINMUX_BIAS_REG("PUEN6", 0xe6060418, "PUD6", 0xe6060458) {
++ [ 0] = RCAR_GP_PIN(6, 25), /* USB0_OVC */
++ [ 1] = RCAR_GP_PIN(6, 26), /* USB1_PWEN */
++ [ 2] = RCAR_GP_PIN(6, 27), /* USB1_OVC */
++ [ 3] = RCAR_GP_PIN(6, 28), /* USB30_PWEN */
++ [ 4] = RCAR_GP_PIN(6, 29), /* USB30_OVC */
++ [ 5] = RCAR_GP_PIN(6, 30), /* USB31_PWEN */
++ [ 6] = RCAR_GP_PIN(6, 31), /* USB31_OVC */
++ [ 7] = PIN_NONE,
++ [ 8] = PIN_NONE,
++ [ 9] = PIN_NONE,
++ [10] = PIN_NONE,
++ [11] = PIN_NONE,
++ [12] = PIN_NONE,
++ [13] = PIN_NONE,
++ [14] = PIN_NONE,
++ [15] = PIN_NONE,
++ [16] = PIN_NONE,
++ [17] = PIN_NONE,
++ [18] = PIN_NONE,
++ [19] = PIN_NONE,
++ [20] = PIN_NONE,
++ [21] = PIN_NONE,
++ [22] = PIN_NONE,
++ [23] = PIN_NONE,
++ [24] = PIN_NONE,
++ [25] = PIN_NONE,
++ [26] = PIN_NONE,
++ [27] = PIN_NONE,
++ [28] = PIN_NONE,
++ [29] = PIN_NONE,
++ [30] = PIN_NONE,
++ [31] = PIN_NONE,
++ } },
++ { /* sentinel */ },
+ };
+
+ static unsigned int r8a7795es1_pinmux_get_bias(struct sh_pfc *pfc,
+ unsigned int pin)
+ {
+- const struct sh_pfc_bias_info *info;
+- u32 reg;
+- u32 bit;
++ const struct pinmux_bias_reg *reg;
++ unsigned int bit;
+
+- info = sh_pfc_pin_to_bias_info(bias_info, ARRAY_SIZE(bias_info), pin);
+- if (!info)
++ reg = sh_pfc_pin_to_bias_reg(pfc, pin, &bit);
++ if (!reg)
+ return PIN_CONFIG_BIAS_DISABLE;
+
+- reg = info->reg;
+- bit = BIT(info->bit);
+-
+- if (!(sh_pfc_read(pfc, PUEN + reg) & bit))
++ if (!(sh_pfc_read(pfc, reg->puen) & BIT(bit)))
+ return PIN_CONFIG_BIAS_DISABLE;
+- else if (sh_pfc_read(pfc, PUD + reg) & bit)
++ else if (sh_pfc_read(pfc, reg->pud) & BIT(bit))
+ return PIN_CONFIG_BIAS_PULL_UP;
+ else
+ return PIN_CONFIG_BIAS_PULL_DOWN;
+@@ -5682,28 +5702,24 @@ static unsigned int r8a7795es1_pinmux_get_bias(struct sh_pfc *pfc,
+ static void r8a7795es1_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
+ unsigned int bias)
+ {
+- const struct sh_pfc_bias_info *info;
++ const struct pinmux_bias_reg *reg;
+ u32 enable, updown;
+- u32 reg;
+- u32 bit;
++ unsigned int bit;
+
+- info = sh_pfc_pin_to_bias_info(bias_info, ARRAY_SIZE(bias_info), pin);
+- if (!info)
++ reg = sh_pfc_pin_to_bias_reg(pfc, pin, &bit);
++ if (!reg)
+ return;
+
+- reg = info->reg;
+- bit = BIT(info->bit);
+-
+- enable = sh_pfc_read(pfc, PUEN + reg) & ~bit;
++ enable = sh_pfc_read(pfc, reg->puen) & ~BIT(bit);
+ if (bias != PIN_CONFIG_BIAS_DISABLE)
+- enable |= bit;
++ enable |= BIT(bit);
+
+- updown = sh_pfc_read(pfc, PUD + reg) & ~bit;
++ updown = sh_pfc_read(pfc, reg->pud) & ~BIT(bit);
+ if (bias == PIN_CONFIG_BIAS_PULL_UP)
+- updown |= bit;
++ updown |= BIT(bit);
+
+- sh_pfc_write(pfc, PUD + reg, updown);
+- sh_pfc_write(pfc, PUEN + reg, enable);
++ sh_pfc_write(pfc, reg->pud, updown);
++ sh_pfc_write(pfc, reg->puen, enable);
+ }
+
+ static const struct sh_pfc_soc_operations r8a7795es1_pinmux_ops = {
+@@ -5728,6 +5744,7 @@ const struct sh_pfc_soc_info r8a7795es1_pinmux_info = {
+
+ .cfg_regs = pinmux_config_regs,
+ .drive_regs = pinmux_drive_regs,
++ .bias_regs = pinmux_bias_regs,
+
+ .pinmux_data = pinmux_data,
+ .pinmux_data_size = ARRAY_SIZE(pinmux_data),
+--
+2.19.0
+
diff --git a/patches/0215-pinctrl-sh-pfc-r8a7795-Use-generic-bias-register-des.patch b/patches/0215-pinctrl-sh-pfc-r8a7795-Use-generic-bias-register-des.patch
new file mode 100644
index 0000000..98e7a4b
--- /dev/null
+++ b/patches/0215-pinctrl-sh-pfc-r8a7795-Use-generic-bias-register-des.patch
@@ -0,0 +1,571 @@
+From 8a4eb0e9cd6bad312e33f4b11e46cea2455dc569 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 29 Sep 2017 14:13:35 +0200
+Subject: [PATCH 0215/1795] pinctrl: sh-pfc: r8a7795: Use generic bias register
+ description
+
+Move R-Car H3 ES2.0 bias support over to the generic way to describe
+bias registers, which will be needed for suspend/resume support.
+
+As the new description is more compact, this decreases kernel size by
+ca. 308 bytes.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 6f4b74f37576a6d1356b435c42df07d2b8dc9e13)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 499 ++++++++++++++-------------
+ 1 file changed, 258 insertions(+), 241 deletions(-)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+index eea29ef65ec4..0a16dea0dace 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+@@ -1514,6 +1514,7 @@ static const u16 pinmux_data[] = {
+ #define ROW_GROUP_A(r) ('Z' - 'A' + 1 + (r))
+ #define PIN_NUMBER(r, c) (((r) - 'A') * 39 + (c) + 300)
+ #define PIN_A_NUMBER(r, c) PIN_NUMBER(ROW_GROUP_A(r), c)
++#define PIN_NONE U16_MAX
+
+ static const struct sh_pfc_pin pinmux_pins[] = {
+ PINMUX_GPIO_GP_ALL(),
+@@ -5427,242 +5428,261 @@ static int r8a7795_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *poc
+ return bit;
+ }
+
+-#define PUEN 0xe6060400
+-#define PUD 0xe6060440
+-
+-#define PU0 0x00
+-#define PU1 0x04
+-#define PU2 0x08
+-#define PU3 0x0c
+-#define PU4 0x10
+-#define PU5 0x14
+-#define PU6 0x18
+-
+-static const struct sh_pfc_bias_info bias_info[] = {
+- { RCAR_GP_PIN(2, 11), PU0, 31 }, /* AVB_PHY_INT */
+- { RCAR_GP_PIN(2, 10), PU0, 30 }, /* AVB_MAGIC */
+- { RCAR_GP_PIN(2, 9), PU0, 29 }, /* AVB_MDC */
+- { PIN_NUMBER('A', 9), PU0, 28 }, /* AVB_MDIO */
+- { PIN_NUMBER('A', 12), PU0, 27 }, /* AVB_TXCREFCLK */
+- { PIN_NUMBER('B', 17), PU0, 26 }, /* AVB_TD3 */
+- { PIN_NUMBER('A', 17), PU0, 25 }, /* AVB_TD2 */
+- { PIN_NUMBER('B', 18), PU0, 24 }, /* AVB_TD1 */
+- { PIN_NUMBER('A', 18), PU0, 23 }, /* AVB_TD0 */
+- { PIN_NUMBER('A', 19), PU0, 22 }, /* AVB_TXC */
+- { PIN_NUMBER('A', 8), PU0, 21 }, /* AVB_TX_CTL */
+- { PIN_NUMBER('B', 14), PU0, 20 }, /* AVB_RD3 */
+- { PIN_NUMBER('A', 14), PU0, 19 }, /* AVB_RD2 */
+- { PIN_NUMBER('B', 13), PU0, 18 }, /* AVB_RD1 */
+- { PIN_NUMBER('A', 13), PU0, 17 }, /* AVB_RD0 */
+- { PIN_NUMBER('B', 19), PU0, 16 }, /* AVB_RXC */
+- { PIN_NUMBER('A', 16), PU0, 15 }, /* AVB_RX_CTL */
+- { PIN_NUMBER('V', 7), PU0, 14 }, /* RPC_RESET# */
+- { PIN_NUMBER('V', 6), PU0, 13 }, /* RPC_WP# */
+- { PIN_NUMBER('Y', 7), PU0, 12 }, /* RPC_INT# */
+- { PIN_NUMBER('V', 5), PU0, 11 }, /* QSPI1_SSL */
+- { PIN_A_NUMBER('C', 3), PU0, 10 }, /* QSPI1_IO3 */
+- { PIN_A_NUMBER('E', 4), PU0, 9 }, /* QSPI1_IO2 */
+- { PIN_A_NUMBER('E', 5), PU0, 8 }, /* QSPI1_MISO_IO1 */
+- { PIN_A_NUMBER('C', 7), PU0, 7 }, /* QSPI1_MOSI_IO0 */
+- { PIN_NUMBER('V', 3), PU0, 6 }, /* QSPI1_SPCLK */
+- { PIN_NUMBER('Y', 3), PU0, 5 }, /* QSPI0_SSL */
+- { PIN_A_NUMBER('B', 6), PU0, 4 }, /* QSPI0_IO3 */
+- { PIN_NUMBER('Y', 6), PU0, 3 }, /* QSPI0_IO2 */
+- { PIN_A_NUMBER('B', 4), PU0, 2 }, /* QSPI0_MISO_IO1 */
+- { PIN_A_NUMBER('C', 5), PU0, 1 }, /* QSPI0_MOSI_IO0 */
+- { PIN_NUMBER('W', 3), PU0, 0 }, /* QSPI0_SPCLK */
+-
+- { RCAR_GP_PIN(1, 19), PU1, 31 }, /* A19 */
+- { RCAR_GP_PIN(1, 18), PU1, 30 }, /* A18 */
+- { RCAR_GP_PIN(1, 17), PU1, 29 }, /* A17 */
+- { RCAR_GP_PIN(1, 16), PU1, 28 }, /* A16 */
+- { RCAR_GP_PIN(1, 15), PU1, 27 }, /* A15 */
+- { RCAR_GP_PIN(1, 14), PU1, 26 }, /* A14 */
+- { RCAR_GP_PIN(1, 13), PU1, 25 }, /* A13 */
+- { RCAR_GP_PIN(1, 12), PU1, 24 }, /* A12 */
+- { RCAR_GP_PIN(1, 11), PU1, 23 }, /* A11 */
+- { RCAR_GP_PIN(1, 10), PU1, 22 }, /* A10 */
+- { RCAR_GP_PIN(1, 9), PU1, 21 }, /* A9 */
+- { RCAR_GP_PIN(1, 8), PU1, 20 }, /* A8 */
+- { RCAR_GP_PIN(1, 7), PU1, 19 }, /* A7 */
+- { RCAR_GP_PIN(1, 6), PU1, 18 }, /* A6 */
+- { RCAR_GP_PIN(1, 5), PU1, 17 }, /* A5 */
+- { RCAR_GP_PIN(1, 4), PU1, 16 }, /* A4 */
+- { RCAR_GP_PIN(1, 3), PU1, 15 }, /* A3 */
+- { RCAR_GP_PIN(1, 2), PU1, 14 }, /* A2 */
+- { RCAR_GP_PIN(1, 1), PU1, 13 }, /* A1 */
+- { RCAR_GP_PIN(1, 0), PU1, 12 }, /* A0 */
+- { RCAR_GP_PIN(2, 8), PU1, 11 }, /* PWM2_A */
+- { RCAR_GP_PIN(2, 7), PU1, 10 }, /* PWM1_A */
+- { RCAR_GP_PIN(2, 6), PU1, 9 }, /* PWM0 */
+- { RCAR_GP_PIN(2, 5), PU1, 8 }, /* IRQ5 */
+- { RCAR_GP_PIN(2, 4), PU1, 7 }, /* IRQ4 */
+- { RCAR_GP_PIN(2, 3), PU1, 6 }, /* IRQ3 */
+- { RCAR_GP_PIN(2, 2), PU1, 5 }, /* IRQ2 */
+- { RCAR_GP_PIN(2, 1), PU1, 4 }, /* IRQ1 */
+- { RCAR_GP_PIN(2, 0), PU1, 3 }, /* IRQ0 */
+- { RCAR_GP_PIN(2, 14), PU1, 2 }, /* AVB_AVTP_CAPTURE_A */
+- { RCAR_GP_PIN(2, 13), PU1, 1 }, /* AVB_AVTP_MATCH_A */
+- { RCAR_GP_PIN(2, 12), PU1, 0 }, /* AVB_LINK */
+-
+- { PIN_A_NUMBER('P', 8), PU2, 31 }, /* DU_DOTCLKIN1 */
+- { PIN_A_NUMBER('P', 7), PU2, 30 }, /* DU_DOTCLKIN0 */
+- { RCAR_GP_PIN(7, 3), PU2, 29 }, /* HDMI1_CEC */
+- { RCAR_GP_PIN(7, 2), PU2, 28 }, /* HDMI0_CEC */
+- { RCAR_GP_PIN(7, 1), PU2, 27 }, /* AVS2 */
+- { RCAR_GP_PIN(7, 0), PU2, 26 }, /* AVS1 */
+- { RCAR_GP_PIN(0, 15), PU2, 25 }, /* D15 */
+- { RCAR_GP_PIN(0, 14), PU2, 24 }, /* D14 */
+- { RCAR_GP_PIN(0, 13), PU2, 23 }, /* D13 */
+- { RCAR_GP_PIN(0, 12), PU2, 22 }, /* D12 */
+- { RCAR_GP_PIN(0, 11), PU2, 21 }, /* D11 */
+- { RCAR_GP_PIN(0, 10), PU2, 20 }, /* D10 */
+- { RCAR_GP_PIN(0, 9), PU2, 19 }, /* D9 */
+- { RCAR_GP_PIN(0, 8), PU2, 18 }, /* D8 */
+- { RCAR_GP_PIN(0, 7), PU2, 17 }, /* D7 */
+- { RCAR_GP_PIN(0, 6), PU2, 16 }, /* D6 */
+- { RCAR_GP_PIN(0, 5), PU2, 15 }, /* D5 */
+- { RCAR_GP_PIN(0, 4), PU2, 14 }, /* D4 */
+- { RCAR_GP_PIN(0, 3), PU2, 13 }, /* D3 */
+- { RCAR_GP_PIN(0, 2), PU2, 12 }, /* D2 */
+- { RCAR_GP_PIN(0, 1), PU2, 11 }, /* D1 */
+- { RCAR_GP_PIN(0, 0), PU2, 10 }, /* D0 */
+- { PIN_NUMBER('C', 1), PU2, 9 }, /* PRESETOUT# */
+- { RCAR_GP_PIN(1, 27), PU2, 8 }, /* EX_WAIT0_A */
+- { RCAR_GP_PIN(1, 26), PU2, 7 }, /* WE1_N */
+- { RCAR_GP_PIN(1, 25), PU2, 6 }, /* WE0_N */
+- { RCAR_GP_PIN(1, 24), PU2, 5 }, /* RD_WR_N */
+- { RCAR_GP_PIN(1, 23), PU2, 4 }, /* RD_N */
+- { RCAR_GP_PIN(1, 22), PU2, 3 }, /* BS_N */
+- { RCAR_GP_PIN(1, 21), PU2, 2 }, /* CS1_N */
+- { RCAR_GP_PIN(1, 20), PU2, 1 }, /* CS0_N */
+- { PIN_NUMBER('F', 1), PU2, 0 }, /* CLKOUT */
+-
+- { RCAR_GP_PIN(4, 9), PU3, 31 }, /* SD3_DAT0 */
+- { RCAR_GP_PIN(4, 8), PU3, 30 }, /* SD3_CMD */
+- { RCAR_GP_PIN(4, 7), PU3, 29 }, /* SD3_CLK */
+- { RCAR_GP_PIN(4, 6), PU3, 28 }, /* SD2_DS */
+- { RCAR_GP_PIN(4, 5), PU3, 27 }, /* SD2_DAT3 */
+- { RCAR_GP_PIN(4, 4), PU3, 26 }, /* SD2_DAT2 */
+- { RCAR_GP_PIN(4, 3), PU3, 25 }, /* SD2_DAT1 */
+- { RCAR_GP_PIN(4, 2), PU3, 24 }, /* SD2_DAT0 */
+- { RCAR_GP_PIN(4, 1), PU3, 23 }, /* SD2_CMD */
+- { RCAR_GP_PIN(4, 0), PU3, 22 }, /* SD2_CLK */
+- { RCAR_GP_PIN(3, 11), PU3, 21 }, /* SD1_DAT3 */
+- { RCAR_GP_PIN(3, 10), PU3, 20 }, /* SD1_DAT2 */
+- { RCAR_GP_PIN(3, 9), PU3, 19 }, /* SD1_DAT1 */
+- { RCAR_GP_PIN(3, 8), PU3, 18 }, /* SD1_DAT0 */
+- { RCAR_GP_PIN(3, 7), PU3, 17 }, /* SD1_CMD */
+- { RCAR_GP_PIN(3, 6), PU3, 16 }, /* SD1_CLK */
+- { RCAR_GP_PIN(3, 5), PU3, 15 }, /* SD0_DAT3 */
+- { RCAR_GP_PIN(3, 4), PU3, 14 }, /* SD0_DAT2 */
+- { RCAR_GP_PIN(3, 3), PU3, 13 }, /* SD0_DAT1 */
+- { RCAR_GP_PIN(3, 2), PU3, 12 }, /* SD0_DAT0 */
+- { RCAR_GP_PIN(3, 1), PU3, 11 }, /* SD0_CMD */
+- { RCAR_GP_PIN(3, 0), PU3, 10 }, /* SD0_CLK */
+- { PIN_A_NUMBER('T', 30), PU3, 9 }, /* ASEBRK */
+- /* bit 8 n/a */
+- { PIN_A_NUMBER('R', 29), PU3, 7 }, /* TDI */
+- { PIN_A_NUMBER('R', 30), PU3, 6 }, /* TMS */
+- { PIN_A_NUMBER('T', 27), PU3, 5 }, /* TCK */
+- { PIN_A_NUMBER('R', 26), PU3, 4 }, /* TRST# */
+- { PIN_A_NUMBER('D', 39), PU3, 3 }, /* EXTALR*/
+- { PIN_A_NUMBER('D', 38), PU3, 2 }, /* FSCLKST# */
+- { PIN_A_NUMBER('R', 8), PU3, 1 }, /* DU_DOTCLKIN3 */
+- { PIN_A_NUMBER('R', 7), PU3, 0 }, /* DU_DOTCLKIN2 */
+-
+- { RCAR_GP_PIN(5, 19), PU4, 31 }, /* MSIOF0_SS1 */
+- { RCAR_GP_PIN(5, 18), PU4, 30 }, /* MSIOF0_SYNC */
+- { RCAR_GP_PIN(5, 17), PU4, 29 }, /* MSIOF0_SCK */
+- { RCAR_GP_PIN(5, 16), PU4, 28 }, /* HRTS0_N */
+- { RCAR_GP_PIN(5, 15), PU4, 27 }, /* HCTS0_N */
+- { RCAR_GP_PIN(5, 14), PU4, 26 }, /* HTX0 */
+- { RCAR_GP_PIN(5, 13), PU4, 25 }, /* HRX0 */
+- { RCAR_GP_PIN(5, 12), PU4, 24 }, /* HSCK0 */
+- { RCAR_GP_PIN(5, 11), PU4, 23 }, /* RX2_A */
+- { RCAR_GP_PIN(5, 10), PU4, 22 }, /* TX2_A */
+- { RCAR_GP_PIN(5, 9), PU4, 21 }, /* SCK2 */
+- { RCAR_GP_PIN(5, 8), PU4, 20 }, /* RTS1_N_TANS */
+- { RCAR_GP_PIN(5, 7), PU4, 19 }, /* CTS1_N */
+- { RCAR_GP_PIN(5, 6), PU4, 18 }, /* TX1_A */
+- { RCAR_GP_PIN(5, 5), PU4, 17 }, /* RX1_A */
+- { RCAR_GP_PIN(5, 4), PU4, 16 }, /* RTS0_N_TANS */
+- { RCAR_GP_PIN(5, 3), PU4, 15 }, /* CTS0_N */
+- { RCAR_GP_PIN(5, 2), PU4, 14 }, /* TX0 */
+- { RCAR_GP_PIN(5, 1), PU4, 13 }, /* RX0 */
+- { RCAR_GP_PIN(5, 0), PU4, 12 }, /* SCK0 */
+- { RCAR_GP_PIN(3, 15), PU4, 11 }, /* SD1_WP */
+- { RCAR_GP_PIN(3, 14), PU4, 10 }, /* SD1_CD */
+- { RCAR_GP_PIN(3, 13), PU4, 9 }, /* SD0_WP */
+- { RCAR_GP_PIN(3, 12), PU4, 8 }, /* SD0_CD */
+- { RCAR_GP_PIN(4, 17), PU4, 7 }, /* SD3_DS */
+- { RCAR_GP_PIN(4, 16), PU4, 6 }, /* SD3_DAT7 */
+- { RCAR_GP_PIN(4, 15), PU4, 5 }, /* SD3_DAT6 */
+- { RCAR_GP_PIN(4, 14), PU4, 4 }, /* SD3_DAT5 */
+- { RCAR_GP_PIN(4, 13), PU4, 3 }, /* SD3_DAT4 */
+- { RCAR_GP_PIN(4, 12), PU4, 2 }, /* SD3_DAT3 */
+- { RCAR_GP_PIN(4, 11), PU4, 1 }, /* SD3_DAT2 */
+- { RCAR_GP_PIN(4, 10), PU4, 0 }, /* SD3_DAT1 */
+-
+- { RCAR_GP_PIN(6, 24), PU5, 31 }, /* USB0_PWEN */
+- { RCAR_GP_PIN(6, 23), PU5, 30 }, /* AUDIO_CLKB_B */
+- { RCAR_GP_PIN(6, 22), PU5, 29 }, /* AUDIO_CLKA_A */
+- { RCAR_GP_PIN(6, 21), PU5, 28 }, /* SSI_SDATA9_A */
+- { RCAR_GP_PIN(6, 20), PU5, 27 }, /* SSI_SDATA8 */
+- { RCAR_GP_PIN(6, 19), PU5, 26 }, /* SSI_SDATA7 */
+- { RCAR_GP_PIN(6, 18), PU5, 25 }, /* SSI_WS78 */
+- { RCAR_GP_PIN(6, 17), PU5, 24 }, /* SSI_SCK78 */
+- { RCAR_GP_PIN(6, 16), PU5, 23 }, /* SSI_SDATA6 */
+- { RCAR_GP_PIN(6, 15), PU5, 22 }, /* SSI_WS6 */
+- { RCAR_GP_PIN(6, 14), PU5, 21 }, /* SSI_SCK6 */
+- { RCAR_GP_PIN(6, 13), PU5, 20 }, /* SSI_SDATA5 */
+- { RCAR_GP_PIN(6, 12), PU5, 19 }, /* SSI_WS5 */
+- { RCAR_GP_PIN(6, 11), PU5, 18 }, /* SSI_SCK5 */
+- { RCAR_GP_PIN(6, 10), PU5, 17 }, /* SSI_SDATA4 */
+- { RCAR_GP_PIN(6, 9), PU5, 16 }, /* SSI_WS4 */
+- { RCAR_GP_PIN(6, 8), PU5, 15 }, /* SSI_SCK4 */
+- { RCAR_GP_PIN(6, 7), PU5, 14 }, /* SSI_SDATA3 */
+- { RCAR_GP_PIN(6, 6), PU5, 13 }, /* SSI_WS349 */
+- { RCAR_GP_PIN(6, 5), PU5, 12 }, /* SSI_SCK349 */
+- { RCAR_GP_PIN(6, 4), PU5, 11 }, /* SSI_SDATA2_A */
+- { RCAR_GP_PIN(6, 3), PU5, 10 }, /* SSI_SDATA1_A */
+- { RCAR_GP_PIN(6, 2), PU5, 9 }, /* SSI_SDATA0 */
+- { RCAR_GP_PIN(6, 1), PU5, 8 }, /* SSI_WS01239 */
+- { RCAR_GP_PIN(6, 0), PU5, 7 }, /* SSI_SCK01239 */
+- { PIN_NUMBER('H', 37), PU5, 6 }, /* MLB_REF */
+- { RCAR_GP_PIN(5, 25), PU5, 5 }, /* MLB_DAT */
+- { RCAR_GP_PIN(5, 24), PU5, 4 }, /* MLB_SIG */
+- { RCAR_GP_PIN(5, 23), PU5, 3 }, /* MLB_CLK */
+- { RCAR_GP_PIN(5, 22), PU5, 2 }, /* MSIOF0_RXD */
+- { RCAR_GP_PIN(5, 21), PU5, 1 }, /* MSIOF0_SS2 */
+- { RCAR_GP_PIN(5, 20), PU5, 0 }, /* MSIOF0_TXD */
+-
+- { RCAR_GP_PIN(6, 31), PU6, 6 }, /* USB2_CH3_OVC */
+- { RCAR_GP_PIN(6, 30), PU6, 5 }, /* USB2_CH3_PWEN */
+- { RCAR_GP_PIN(6, 29), PU6, 4 }, /* USB30_OVC */
+- { RCAR_GP_PIN(6, 28), PU6, 3 }, /* USB30_PWEN */
+- { RCAR_GP_PIN(6, 27), PU6, 2 }, /* USB1_OVC */
+- { RCAR_GP_PIN(6, 26), PU6, 1 }, /* USB1_PWEN */
+- { RCAR_GP_PIN(6, 25), PU6, 0 }, /* USB0_OVC */
++static const struct pinmux_bias_reg pinmux_bias_regs[] = {
++ { PINMUX_BIAS_REG("PUEN0", 0xe6060400, "PUD0", 0xe6060440) {
++ [ 0] = PIN_NUMBER('W', 3), /* QSPI0_SPCLK */
++ [ 1] = PIN_A_NUMBER('C', 5), /* QSPI0_MOSI_IO0 */
++ [ 2] = PIN_A_NUMBER('B', 4), /* QSPI0_MISO_IO1 */
++ [ 3] = PIN_NUMBER('Y', 6), /* QSPI0_IO2 */
++ [ 4] = PIN_A_NUMBER('B', 6), /* QSPI0_IO3 */
++ [ 5] = PIN_NUMBER('Y', 3), /* QSPI0_SSL */
++ [ 6] = PIN_NUMBER('V', 3), /* QSPI1_SPCLK */
++ [ 7] = PIN_A_NUMBER('C', 7), /* QSPI1_MOSI_IO0 */
++ [ 8] = PIN_A_NUMBER('E', 5), /* QSPI1_MISO_IO1 */
++ [ 9] = PIN_A_NUMBER('E', 4), /* QSPI1_IO2 */
++ [10] = PIN_A_NUMBER('C', 3), /* QSPI1_IO3 */
++ [11] = PIN_NUMBER('V', 5), /* QSPI1_SSL */
++ [12] = PIN_NUMBER('Y', 7), /* RPC_INT# */
++ [13] = PIN_NUMBER('V', 6), /* RPC_WP# */
++ [14] = PIN_NUMBER('V', 7), /* RPC_RESET# */
++ [15] = PIN_NUMBER('A', 16), /* AVB_RX_CTL */
++ [16] = PIN_NUMBER('B', 19), /* AVB_RXC */
++ [17] = PIN_NUMBER('A', 13), /* AVB_RD0 */
++ [18] = PIN_NUMBER('B', 13), /* AVB_RD1 */
++ [19] = PIN_NUMBER('A', 14), /* AVB_RD2 */
++ [20] = PIN_NUMBER('B', 14), /* AVB_RD3 */
++ [21] = PIN_NUMBER('A', 8), /* AVB_TX_CTL */
++ [22] = PIN_NUMBER('A', 19), /* AVB_TXC */
++ [23] = PIN_NUMBER('A', 18), /* AVB_TD0 */
++ [24] = PIN_NUMBER('B', 18), /* AVB_TD1 */
++ [25] = PIN_NUMBER('A', 17), /* AVB_TD2 */
++ [26] = PIN_NUMBER('B', 17), /* AVB_TD3 */
++ [27] = PIN_NUMBER('A', 12), /* AVB_TXCREFCLK */
++ [28] = PIN_NUMBER('A', 9), /* AVB_MDIO */
++ [29] = RCAR_GP_PIN(2, 9), /* AVB_MDC */
++ [30] = RCAR_GP_PIN(2, 10), /* AVB_MAGIC */
++ [31] = RCAR_GP_PIN(2, 11), /* AVB_PHY_INT */
++ } },
++ { PINMUX_BIAS_REG("PUEN1", 0xe6060404, "PUD1", 0xe6060444) {
++ [ 0] = RCAR_GP_PIN(2, 12), /* AVB_LINK */
++ [ 1] = RCAR_GP_PIN(2, 13), /* AVB_AVTP_MATCH_A */
++ [ 2] = RCAR_GP_PIN(2, 14), /* AVB_AVTP_CAPTURE_A */
++ [ 3] = RCAR_GP_PIN(2, 0), /* IRQ0 */
++ [ 4] = RCAR_GP_PIN(2, 1), /* IRQ1 */
++ [ 5] = RCAR_GP_PIN(2, 2), /* IRQ2 */
++ [ 6] = RCAR_GP_PIN(2, 3), /* IRQ3 */
++ [ 7] = RCAR_GP_PIN(2, 4), /* IRQ4 */
++ [ 8] = RCAR_GP_PIN(2, 5), /* IRQ5 */
++ [ 9] = RCAR_GP_PIN(2, 6), /* PWM0 */
++ [10] = RCAR_GP_PIN(2, 7), /* PWM1_A */
++ [11] = RCAR_GP_PIN(2, 8), /* PWM2_A */
++ [12] = RCAR_GP_PIN(1, 0), /* A0 */
++ [13] = RCAR_GP_PIN(1, 1), /* A1 */
++ [14] = RCAR_GP_PIN(1, 2), /* A2 */
++ [15] = RCAR_GP_PIN(1, 3), /* A3 */
++ [16] = RCAR_GP_PIN(1, 4), /* A4 */
++ [17] = RCAR_GP_PIN(1, 5), /* A5 */
++ [18] = RCAR_GP_PIN(1, 6), /* A6 */
++ [19] = RCAR_GP_PIN(1, 7), /* A7 */
++ [20] = RCAR_GP_PIN(1, 8), /* A8 */
++ [21] = RCAR_GP_PIN(1, 9), /* A9 */
++ [22] = RCAR_GP_PIN(1, 10), /* A10 */
++ [23] = RCAR_GP_PIN(1, 11), /* A11 */
++ [24] = RCAR_GP_PIN(1, 12), /* A12 */
++ [25] = RCAR_GP_PIN(1, 13), /* A13 */
++ [26] = RCAR_GP_PIN(1, 14), /* A14 */
++ [27] = RCAR_GP_PIN(1, 15), /* A15 */
++ [28] = RCAR_GP_PIN(1, 16), /* A16 */
++ [29] = RCAR_GP_PIN(1, 17), /* A17 */
++ [30] = RCAR_GP_PIN(1, 18), /* A18 */
++ [31] = RCAR_GP_PIN(1, 19), /* A19 */
++ } },
++ { PINMUX_BIAS_REG("PUEN2", 0xe6060408, "PUD2", 0xe6060448) {
++ [ 0] = PIN_NUMBER('F', 1), /* CLKOUT */
++ [ 1] = RCAR_GP_PIN(1, 20), /* CS0_N */
++ [ 2] = RCAR_GP_PIN(1, 21), /* CS1_N */
++ [ 3] = RCAR_GP_PIN(1, 22), /* BS_N */
++ [ 4] = RCAR_GP_PIN(1, 23), /* RD_N */
++ [ 5] = RCAR_GP_PIN(1, 24), /* RD_WR_N */
++ [ 6] = RCAR_GP_PIN(1, 25), /* WE0_N */
++ [ 7] = RCAR_GP_PIN(1, 26), /* WE1_N */
++ [ 8] = RCAR_GP_PIN(1, 27), /* EX_WAIT0_A */
++ [ 9] = PIN_NUMBER('C', 1), /* PRESETOUT# */
++ [10] = RCAR_GP_PIN(0, 0), /* D0 */
++ [11] = RCAR_GP_PIN(0, 1), /* D1 */
++ [12] = RCAR_GP_PIN(0, 2), /* D2 */
++ [13] = RCAR_GP_PIN(0, 3), /* D3 */
++ [14] = RCAR_GP_PIN(0, 4), /* D4 */
++ [15] = RCAR_GP_PIN(0, 5), /* D5 */
++ [16] = RCAR_GP_PIN(0, 6), /* D6 */
++ [17] = RCAR_GP_PIN(0, 7), /* D7 */
++ [18] = RCAR_GP_PIN(0, 8), /* D8 */
++ [19] = RCAR_GP_PIN(0, 9), /* D9 */
++ [20] = RCAR_GP_PIN(0, 10), /* D10 */
++ [21] = RCAR_GP_PIN(0, 11), /* D11 */
++ [22] = RCAR_GP_PIN(0, 12), /* D12 */
++ [23] = RCAR_GP_PIN(0, 13), /* D13 */
++ [24] = RCAR_GP_PIN(0, 14), /* D14 */
++ [25] = RCAR_GP_PIN(0, 15), /* D15 */
++ [26] = RCAR_GP_PIN(7, 0), /* AVS1 */
++ [27] = RCAR_GP_PIN(7, 1), /* AVS2 */
++ [28] = RCAR_GP_PIN(7, 2), /* HDMI0_CEC */
++ [29] = RCAR_GP_PIN(7, 3), /* HDMI1_CEC */
++ [30] = PIN_A_NUMBER('P', 7), /* DU_DOTCLKIN0 */
++ [31] = PIN_A_NUMBER('P', 8), /* DU_DOTCLKIN1 */
++ } },
++ { PINMUX_BIAS_REG("PUEN3", 0xe606040c, "PUD3", 0xe606044c) {
++ [ 0] = PIN_A_NUMBER('R', 7), /* DU_DOTCLKIN2 */
++ [ 1] = PIN_A_NUMBER('R', 8), /* DU_DOTCLKIN3 */
++ [ 2] = PIN_A_NUMBER('D', 38), /* FSCLKST# */
++ [ 3] = PIN_A_NUMBER('D', 39), /* EXTALR*/
++ [ 4] = PIN_A_NUMBER('R', 26), /* TRST# */
++ [ 5] = PIN_A_NUMBER('T', 27), /* TCK */
++ [ 6] = PIN_A_NUMBER('R', 30), /* TMS */
++ [ 7] = PIN_A_NUMBER('R', 29), /* TDI */
++ [ 8] = PIN_NONE,
++ [ 9] = PIN_A_NUMBER('T', 30), /* ASEBRK */
++ [10] = RCAR_GP_PIN(3, 0), /* SD0_CLK */
++ [11] = RCAR_GP_PIN(3, 1), /* SD0_CMD */
++ [12] = RCAR_GP_PIN(3, 2), /* SD0_DAT0 */
++ [13] = RCAR_GP_PIN(3, 3), /* SD0_DAT1 */
++ [14] = RCAR_GP_PIN(3, 4), /* SD0_DAT2 */
++ [15] = RCAR_GP_PIN(3, 5), /* SD0_DAT3 */
++ [16] = RCAR_GP_PIN(3, 6), /* SD1_CLK */
++ [17] = RCAR_GP_PIN(3, 7), /* SD1_CMD */
++ [18] = RCAR_GP_PIN(3, 8), /* SD1_DAT0 */
++ [19] = RCAR_GP_PIN(3, 9), /* SD1_DAT1 */
++ [20] = RCAR_GP_PIN(3, 10), /* SD1_DAT2 */
++ [21] = RCAR_GP_PIN(3, 11), /* SD1_DAT3 */
++ [22] = RCAR_GP_PIN(4, 0), /* SD2_CLK */
++ [23] = RCAR_GP_PIN(4, 1), /* SD2_CMD */
++ [24] = RCAR_GP_PIN(4, 2), /* SD2_DAT0 */
++ [25] = RCAR_GP_PIN(4, 3), /* SD2_DAT1 */
++ [26] = RCAR_GP_PIN(4, 4), /* SD2_DAT2 */
++ [27] = RCAR_GP_PIN(4, 5), /* SD2_DAT3 */
++ [28] = RCAR_GP_PIN(4, 6), /* SD2_DS */
++ [29] = RCAR_GP_PIN(4, 7), /* SD3_CLK */
++ [30] = RCAR_GP_PIN(4, 8), /* SD3_CMD */
++ [31] = RCAR_GP_PIN(4, 9), /* SD3_DAT0 */
++ } },
++ { PINMUX_BIAS_REG("PUEN4", 0xe6060410, "PUD4", 0xe6060450) {
++ [ 0] = RCAR_GP_PIN(4, 10), /* SD3_DAT1 */
++ [ 1] = RCAR_GP_PIN(4, 11), /* SD3_DAT2 */
++ [ 2] = RCAR_GP_PIN(4, 12), /* SD3_DAT3 */
++ [ 3] = RCAR_GP_PIN(4, 13), /* SD3_DAT4 */
++ [ 4] = RCAR_GP_PIN(4, 14), /* SD3_DAT5 */
++ [ 5] = RCAR_GP_PIN(4, 15), /* SD3_DAT6 */
++ [ 6] = RCAR_GP_PIN(4, 16), /* SD3_DAT7 */
++ [ 7] = RCAR_GP_PIN(4, 17), /* SD3_DS */
++ [ 8] = RCAR_GP_PIN(3, 12), /* SD0_CD */
++ [ 9] = RCAR_GP_PIN(3, 13), /* SD0_WP */
++ [10] = RCAR_GP_PIN(3, 14), /* SD1_CD */
++ [11] = RCAR_GP_PIN(3, 15), /* SD1_WP */
++ [12] = RCAR_GP_PIN(5, 0), /* SCK0 */
++ [13] = RCAR_GP_PIN(5, 1), /* RX0 */
++ [14] = RCAR_GP_PIN(5, 2), /* TX0 */
++ [15] = RCAR_GP_PIN(5, 3), /* CTS0_N */
++ [16] = RCAR_GP_PIN(5, 4), /* RTS0_N_TANS */
++ [17] = RCAR_GP_PIN(5, 5), /* RX1_A */
++ [18] = RCAR_GP_PIN(5, 6), /* TX1_A */
++ [19] = RCAR_GP_PIN(5, 7), /* CTS1_N */
++ [20] = RCAR_GP_PIN(5, 8), /* RTS1_N_TANS */
++ [21] = RCAR_GP_PIN(5, 9), /* SCK2 */
++ [22] = RCAR_GP_PIN(5, 10), /* TX2_A */
++ [23] = RCAR_GP_PIN(5, 11), /* RX2_A */
++ [24] = RCAR_GP_PIN(5, 12), /* HSCK0 */
++ [25] = RCAR_GP_PIN(5, 13), /* HRX0 */
++ [26] = RCAR_GP_PIN(5, 14), /* HTX0 */
++ [27] = RCAR_GP_PIN(5, 15), /* HCTS0_N */
++ [28] = RCAR_GP_PIN(5, 16), /* HRTS0_N */
++ [29] = RCAR_GP_PIN(5, 17), /* MSIOF0_SCK */
++ [30] = RCAR_GP_PIN(5, 18), /* MSIOF0_SYNC */
++ [31] = RCAR_GP_PIN(5, 19), /* MSIOF0_SS1 */
++ } },
++ { PINMUX_BIAS_REG("PUEN5", 0xe6060414, "PUD5", 0xe6060454) {
++ [ 0] = RCAR_GP_PIN(5, 20), /* MSIOF0_TXD */
++ [ 1] = RCAR_GP_PIN(5, 21), /* MSIOF0_SS2 */
++ [ 2] = RCAR_GP_PIN(5, 22), /* MSIOF0_RXD */
++ [ 3] = RCAR_GP_PIN(5, 23), /* MLB_CLK */
++ [ 4] = RCAR_GP_PIN(5, 24), /* MLB_SIG */
++ [ 5] = RCAR_GP_PIN(5, 25), /* MLB_DAT */
++ [ 6] = PIN_NUMBER('H', 37), /* MLB_REF */
++ [ 7] = RCAR_GP_PIN(6, 0), /* SSI_SCK01239 */
++ [ 8] = RCAR_GP_PIN(6, 1), /* SSI_WS01239 */
++ [ 9] = RCAR_GP_PIN(6, 2), /* SSI_SDATA0 */
++ [10] = RCAR_GP_PIN(6, 3), /* SSI_SDATA1_A */
++ [11] = RCAR_GP_PIN(6, 4), /* SSI_SDATA2_A */
++ [12] = RCAR_GP_PIN(6, 5), /* SSI_SCK349 */
++ [13] = RCAR_GP_PIN(6, 6), /* SSI_WS349 */
++ [14] = RCAR_GP_PIN(6, 7), /* SSI_SDATA3 */
++ [15] = RCAR_GP_PIN(6, 8), /* SSI_SCK4 */
++ [16] = RCAR_GP_PIN(6, 9), /* SSI_WS4 */
++ [17] = RCAR_GP_PIN(6, 10), /* SSI_SDATA4 */
++ [18] = RCAR_GP_PIN(6, 11), /* SSI_SCK5 */
++ [19] = RCAR_GP_PIN(6, 12), /* SSI_WS5 */
++ [20] = RCAR_GP_PIN(6, 13), /* SSI_SDATA5 */
++ [21] = RCAR_GP_PIN(6, 14), /* SSI_SCK6 */
++ [22] = RCAR_GP_PIN(6, 15), /* SSI_WS6 */
++ [23] = RCAR_GP_PIN(6, 16), /* SSI_SDATA6 */
++ [24] = RCAR_GP_PIN(6, 17), /* SSI_SCK78 */
++ [25] = RCAR_GP_PIN(6, 18), /* SSI_WS78 */
++ [26] = RCAR_GP_PIN(6, 19), /* SSI_SDATA7 */
++ [27] = RCAR_GP_PIN(6, 20), /* SSI_SDATA8 */
++ [28] = RCAR_GP_PIN(6, 21), /* SSI_SDATA9_A */
++ [29] = RCAR_GP_PIN(6, 22), /* AUDIO_CLKA_A */
++ [30] = RCAR_GP_PIN(6, 23), /* AUDIO_CLKB_B */
++ [31] = RCAR_GP_PIN(6, 24), /* USB0_PWEN */
++ } },
++ { PINMUX_BIAS_REG("PUEN6", 0xe6060418, "PUD6", 0xe6060458) {
++ [ 0] = RCAR_GP_PIN(6, 25), /* USB0_OVC */
++ [ 1] = RCAR_GP_PIN(6, 26), /* USB1_PWEN */
++ [ 2] = RCAR_GP_PIN(6, 27), /* USB1_OVC */
++ [ 3] = RCAR_GP_PIN(6, 28), /* USB30_PWEN */
++ [ 4] = RCAR_GP_PIN(6, 29), /* USB30_OVC */
++ [ 5] = RCAR_GP_PIN(6, 30), /* USB2_CH3_PWEN */
++ [ 6] = RCAR_GP_PIN(6, 31), /* USB2_CH3_OVC */
++ [ 7] = PIN_NONE,
++ [ 8] = PIN_NONE,
++ [ 9] = PIN_NONE,
++ [10] = PIN_NONE,
++ [11] = PIN_NONE,
++ [12] = PIN_NONE,
++ [13] = PIN_NONE,
++ [14] = PIN_NONE,
++ [15] = PIN_NONE,
++ [16] = PIN_NONE,
++ [17] = PIN_NONE,
++ [18] = PIN_NONE,
++ [19] = PIN_NONE,
++ [20] = PIN_NONE,
++ [21] = PIN_NONE,
++ [22] = PIN_NONE,
++ [23] = PIN_NONE,
++ [24] = PIN_NONE,
++ [25] = PIN_NONE,
++ [26] = PIN_NONE,
++ [27] = PIN_NONE,
++ [28] = PIN_NONE,
++ [29] = PIN_NONE,
++ [30] = PIN_NONE,
++ [31] = PIN_NONE,
++ } },
++ { /* sentinel */ },
+ };
+
+ static unsigned int r8a7795_pinmux_get_bias(struct sh_pfc *pfc,
+ unsigned int pin)
+ {
+- const struct sh_pfc_bias_info *info;
+- u32 reg;
+- u32 bit;
++ const struct pinmux_bias_reg *reg;
++ unsigned int bit;
+
+- info = sh_pfc_pin_to_bias_info(bias_info, ARRAY_SIZE(bias_info), pin);
+- if (!info)
++ reg = sh_pfc_pin_to_bias_reg(pfc, pin, &bit);
++ if (!reg)
+ return PIN_CONFIG_BIAS_DISABLE;
+
+- reg = info->reg;
+- bit = BIT(info->bit);
+-
+- if (!(sh_pfc_read(pfc, PUEN + reg) & bit))
++ if (!(sh_pfc_read(pfc, reg->puen) & BIT(bit)))
+ return PIN_CONFIG_BIAS_DISABLE;
+- else if (sh_pfc_read(pfc, PUD + reg) & bit)
++ else if (sh_pfc_read(pfc, reg->pud) & BIT(bit))
+ return PIN_CONFIG_BIAS_PULL_UP;
+ else
+ return PIN_CONFIG_BIAS_PULL_DOWN;
+@@ -5671,28 +5691,24 @@ static unsigned int r8a7795_pinmux_get_bias(struct sh_pfc *pfc,
+ static void r8a7795_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
+ unsigned int bias)
+ {
+- const struct sh_pfc_bias_info *info;
++ const struct pinmux_bias_reg *reg;
+ u32 enable, updown;
+- u32 reg;
+- u32 bit;
++ unsigned int bit;
+
+- info = sh_pfc_pin_to_bias_info(bias_info, ARRAY_SIZE(bias_info), pin);
+- if (!info)
++ reg = sh_pfc_pin_to_bias_reg(pfc, pin, &bit);
++ if (!reg)
+ return;
+
+- reg = info->reg;
+- bit = BIT(info->bit);
+-
+- enable = sh_pfc_read(pfc, PUEN + reg) & ~bit;
++ enable = sh_pfc_read(pfc, reg->puen) & ~BIT(bit);
+ if (bias != PIN_CONFIG_BIAS_DISABLE)
+- enable |= bit;
++ enable |= BIT(bit);
+
+- updown = sh_pfc_read(pfc, PUD + reg) & ~bit;
++ updown = sh_pfc_read(pfc, reg->pud) & ~BIT(bit);
+ if (bias == PIN_CONFIG_BIAS_PULL_UP)
+- updown |= bit;
++ updown |= BIT(bit);
+
+- sh_pfc_write(pfc, PUD + reg, updown);
+- sh_pfc_write(pfc, PUEN + reg, enable);
++ sh_pfc_write(pfc, reg->pud, updown);
++ sh_pfc_write(pfc, reg->puen, enable);
+ }
+
+ static const struct soc_device_attribute r8a7795es1[] = {
+@@ -5731,6 +5747,7 @@ const struct sh_pfc_soc_info r8a7795_pinmux_info = {
+
+ .cfg_regs = pinmux_config_regs,
+ .drive_regs = pinmux_drive_regs,
++ .bias_regs = pinmux_bias_regs,
+
+ .pinmux_data = pinmux_data,
+ .pinmux_data_size = ARRAY_SIZE(pinmux_data),
+--
+2.19.0
+
diff --git a/patches/0216-pinctrl-sh-pfc-r8a7796-Use-generic-bias-register-des.patch b/patches/0216-pinctrl-sh-pfc-r8a7796-Use-generic-bias-register-des.patch
new file mode 100644
index 0000000..0e269e1
--- /dev/null
+++ b/patches/0216-pinctrl-sh-pfc-r8a7796-Use-generic-bias-register-des.patch
@@ -0,0 +1,571 @@
+From 4d8a0298a38b8b7b1607cf463850d5f51f0bde79 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 29 Sep 2017 14:14:29 +0200
+Subject: [PATCH 0216/1795] pinctrl: sh-pfc: r8a7796: Use generic bias register
+ description
+
+Move R-Car M3-W bias support over to the generic way to describe bias
+registers, which will be needed for suspend/resume support.
+
+As the new description is more compact, this decreases kernel size by
+ca. 304 bytes.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 58668a67afa19a445f6446d7abc1636ad5237c68)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 499 ++++++++++++++-------------
+ 1 file changed, 258 insertions(+), 241 deletions(-)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+index 970d97b9eb45..ebf38ea8abbe 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+@@ -1518,6 +1518,7 @@ static const u16 pinmux_data[] = {
+ #define ROW_GROUP_A(r) ('Z' - 'A' + 1 + (r))
+ #define PIN_NUMBER(r, c) (((r) - 'A') * 39 + (c) + 300)
+ #define PIN_A_NUMBER(r, c) PIN_NUMBER(ROW_GROUP_A(r), c)
++#define PIN_NONE U16_MAX
+
+ static const struct sh_pfc_pin pinmux_pins[] = {
+ PINMUX_GPIO_GP_ALL(),
+@@ -5491,242 +5492,261 @@ static int r8a7796_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *poc
+ return bit;
+ }
+
+-#define PUEN 0xe6060400
+-#define PUD 0xe6060440
+-
+-#define PU0 0x00
+-#define PU1 0x04
+-#define PU2 0x08
+-#define PU3 0x0c
+-#define PU4 0x10
+-#define PU5 0x14
+-#define PU6 0x18
+-
+-static const struct sh_pfc_bias_info bias_info[] = {
+- { RCAR_GP_PIN(2, 11), PU0, 31 }, /* AVB_PHY_INT */
+- { RCAR_GP_PIN(2, 10), PU0, 30 }, /* AVB_MAGIC */
+- { RCAR_GP_PIN(2, 9), PU0, 29 }, /* AVB_MDC */
+- { PIN_NUMBER('A', 9), PU0, 28 }, /* AVB_MDIO */
+- { PIN_NUMBER('A', 12), PU0, 27 }, /* AVB_TXCREFCLK */
+- { PIN_NUMBER('B', 17), PU0, 26 }, /* AVB_TD3 */
+- { PIN_NUMBER('A', 17), PU0, 25 }, /* AVB_TD2 */
+- { PIN_NUMBER('B', 18), PU0, 24 }, /* AVB_TD1 */
+- { PIN_NUMBER('A', 18), PU0, 23 }, /* AVB_TD0 */
+- { PIN_NUMBER('A', 19), PU0, 22 }, /* AVB_TXC */
+- { PIN_NUMBER('A', 8), PU0, 21 }, /* AVB_TX_CTL */
+- { PIN_NUMBER('B', 14), PU0, 20 }, /* AVB_RD3 */
+- { PIN_NUMBER('A', 14), PU0, 19 }, /* AVB_RD2 */
+- { PIN_NUMBER('B', 13), PU0, 18 }, /* AVB_RD1 */
+- { PIN_NUMBER('A', 13), PU0, 17 }, /* AVB_RD0 */
+- { PIN_NUMBER('B', 19), PU0, 16 }, /* AVB_RXC */
+- { PIN_NUMBER('A', 16), PU0, 15 }, /* AVB_RX_CTL */
+- { PIN_NUMBER('V', 7), PU0, 14 }, /* RPC_RESET# */
+- { PIN_NUMBER('V', 6), PU0, 13 }, /* RPC_WP# */
+- { PIN_NUMBER('Y', 7), PU0, 12 }, /* RPC_INT# */
+- { PIN_NUMBER('V', 5), PU0, 11 }, /* QSPI1_SSL */
+- { PIN_A_NUMBER('C', 3), PU0, 10 }, /* QSPI1_IO3 */
+- { PIN_A_NUMBER('E', 4), PU0, 9 }, /* QSPI1_IO2 */
+- { PIN_A_NUMBER('E', 5), PU0, 8 }, /* QSPI1_MISO_IO1 */
+- { PIN_A_NUMBER('C', 7), PU0, 7 }, /* QSPI1_MOSI_IO0 */
+- { PIN_NUMBER('V', 3), PU0, 6 }, /* QSPI1_SPCLK */
+- { PIN_NUMBER('Y', 3), PU0, 5 }, /* QSPI0_SSL */
+- { PIN_A_NUMBER('B', 6), PU0, 4 }, /* QSPI0_IO3 */
+- { PIN_NUMBER('Y', 6), PU0, 3 }, /* QSPI0_IO2 */
+- { PIN_A_NUMBER('B', 4), PU0, 2 }, /* QSPI0_MISO_IO1 */
+- { PIN_A_NUMBER('C', 5), PU0, 1 }, /* QSPI0_MOSI_IO0 */
+- { PIN_NUMBER('W', 3), PU0, 0 }, /* QSPI0_SPCLK */
+-
+- { RCAR_GP_PIN(1, 19), PU1, 31 }, /* A19 */
+- { RCAR_GP_PIN(1, 18), PU1, 30 }, /* A18 */
+- { RCAR_GP_PIN(1, 17), PU1, 29 }, /* A17 */
+- { RCAR_GP_PIN(1, 16), PU1, 28 }, /* A16 */
+- { RCAR_GP_PIN(1, 15), PU1, 27 }, /* A15 */
+- { RCAR_GP_PIN(1, 14), PU1, 26 }, /* A14 */
+- { RCAR_GP_PIN(1, 13), PU1, 25 }, /* A13 */
+- { RCAR_GP_PIN(1, 12), PU1, 24 }, /* A12 */
+- { RCAR_GP_PIN(1, 11), PU1, 23 }, /* A11 */
+- { RCAR_GP_PIN(1, 10), PU1, 22 }, /* A10 */
+- { RCAR_GP_PIN(1, 9), PU1, 21 }, /* A9 */
+- { RCAR_GP_PIN(1, 8), PU1, 20 }, /* A8 */
+- { RCAR_GP_PIN(1, 7), PU1, 19 }, /* A7 */
+- { RCAR_GP_PIN(1, 6), PU1, 18 }, /* A6 */
+- { RCAR_GP_PIN(1, 5), PU1, 17 }, /* A5 */
+- { RCAR_GP_PIN(1, 4), PU1, 16 }, /* A4 */
+- { RCAR_GP_PIN(1, 3), PU1, 15 }, /* A3 */
+- { RCAR_GP_PIN(1, 2), PU1, 14 }, /* A2 */
+- { RCAR_GP_PIN(1, 1), PU1, 13 }, /* A1 */
+- { RCAR_GP_PIN(1, 0), PU1, 12 }, /* A0 */
+- { RCAR_GP_PIN(2, 8), PU1, 11 }, /* PWM2_A */
+- { RCAR_GP_PIN(2, 7), PU1, 10 }, /* PWM1_A */
+- { RCAR_GP_PIN(2, 6), PU1, 9 }, /* PWM0 */
+- { RCAR_GP_PIN(2, 5), PU1, 8 }, /* IRQ5 */
+- { RCAR_GP_PIN(2, 4), PU1, 7 }, /* IRQ4 */
+- { RCAR_GP_PIN(2, 3), PU1, 6 }, /* IRQ3 */
+- { RCAR_GP_PIN(2, 2), PU1, 5 }, /* IRQ2 */
+- { RCAR_GP_PIN(2, 1), PU1, 4 }, /* IRQ1 */
+- { RCAR_GP_PIN(2, 0), PU1, 3 }, /* IRQ0 */
+- { RCAR_GP_PIN(2, 14), PU1, 2 }, /* AVB_AVTP_CAPTURE_A */
+- { RCAR_GP_PIN(2, 13), PU1, 1 }, /* AVB_AVTP_MATCH_A */
+- { RCAR_GP_PIN(2, 12), PU1, 0 }, /* AVB_LINK */
+-
+- { PIN_A_NUMBER('P', 8), PU2, 31 }, /* DU_DOTCLKIN1 */
+- { PIN_A_NUMBER('P', 7), PU2, 30 }, /* DU_DOTCLKIN0 */
+- { RCAR_GP_PIN(7, 3), PU2, 29 }, /* GP7_03 */
+- { RCAR_GP_PIN(7, 2), PU2, 28 }, /* HDMI0_CEC */
+- { RCAR_GP_PIN(7, 1), PU2, 27 }, /* AVS2 */
+- { RCAR_GP_PIN(7, 0), PU2, 26 }, /* AVS1 */
+- { RCAR_GP_PIN(0, 15), PU2, 25 }, /* D15 */
+- { RCAR_GP_PIN(0, 14), PU2, 24 }, /* D14 */
+- { RCAR_GP_PIN(0, 13), PU2, 23 }, /* D13 */
+- { RCAR_GP_PIN(0, 12), PU2, 22 }, /* D12 */
+- { RCAR_GP_PIN(0, 11), PU2, 21 }, /* D11 */
+- { RCAR_GP_PIN(0, 10), PU2, 20 }, /* D10 */
+- { RCAR_GP_PIN(0, 9), PU2, 19 }, /* D9 */
+- { RCAR_GP_PIN(0, 8), PU2, 18 }, /* D8 */
+- { RCAR_GP_PIN(0, 7), PU2, 17 }, /* D7 */
+- { RCAR_GP_PIN(0, 6), PU2, 16 }, /* D6 */
+- { RCAR_GP_PIN(0, 5), PU2, 15 }, /* D5 */
+- { RCAR_GP_PIN(0, 4), PU2, 14 }, /* D4 */
+- { RCAR_GP_PIN(0, 3), PU2, 13 }, /* D3 */
+- { RCAR_GP_PIN(0, 2), PU2, 12 }, /* D2 */
+- { RCAR_GP_PIN(0, 1), PU2, 11 }, /* D1 */
+- { RCAR_GP_PIN(0, 0), PU2, 10 }, /* D0 */
+- { PIN_NUMBER('C', 1), PU2, 9 }, /* PRESETOUT# */
+- { RCAR_GP_PIN(1, 27), PU2, 8 }, /* EX_WAIT0_A */
+- { RCAR_GP_PIN(1, 26), PU2, 7 }, /* WE1_N */
+- { RCAR_GP_PIN(1, 25), PU2, 6 }, /* WE0_N */
+- { RCAR_GP_PIN(1, 24), PU2, 5 }, /* RD_WR_N */
+- { RCAR_GP_PIN(1, 23), PU2, 4 }, /* RD_N */
+- { RCAR_GP_PIN(1, 22), PU2, 3 }, /* BS_N */
+- { RCAR_GP_PIN(1, 21), PU2, 2 }, /* CS1_N */
+- { RCAR_GP_PIN(1, 20), PU2, 1 }, /* CS0_N */
+- { RCAR_GP_PIN(1, 28), PU2, 0 }, /* CLKOUT */
+-
+- { RCAR_GP_PIN(4, 9), PU3, 31 }, /* SD3_DAT0 */
+- { RCAR_GP_PIN(4, 8), PU3, 30 }, /* SD3_CMD */
+- { RCAR_GP_PIN(4, 7), PU3, 29 }, /* SD3_CLK */
+- { RCAR_GP_PIN(4, 6), PU3, 28 }, /* SD2_DS */
+- { RCAR_GP_PIN(4, 5), PU3, 27 }, /* SD2_DAT3 */
+- { RCAR_GP_PIN(4, 4), PU3, 26 }, /* SD2_DAT2 */
+- { RCAR_GP_PIN(4, 3), PU3, 25 }, /* SD2_DAT1 */
+- { RCAR_GP_PIN(4, 2), PU3, 24 }, /* SD2_DAT0 */
+- { RCAR_GP_PIN(4, 1), PU3, 23 }, /* SD2_CMD */
+- { RCAR_GP_PIN(4, 0), PU3, 22 }, /* SD2_CLK */
+- { RCAR_GP_PIN(3, 11), PU3, 21 }, /* SD1_DAT3 */
+- { RCAR_GP_PIN(3, 10), PU3, 20 }, /* SD1_DAT2 */
+- { RCAR_GP_PIN(3, 9), PU3, 19 }, /* SD1_DAT1 */
+- { RCAR_GP_PIN(3, 8), PU3, 18 }, /* SD1_DAT0 */
+- { RCAR_GP_PIN(3, 7), PU3, 17 }, /* SD1_CMD */
+- { RCAR_GP_PIN(3, 6), PU3, 16 }, /* SD1_CLK */
+- { RCAR_GP_PIN(3, 5), PU3, 15 }, /* SD0_DAT3 */
+- { RCAR_GP_PIN(3, 4), PU3, 14 }, /* SD0_DAT2 */
+- { RCAR_GP_PIN(3, 3), PU3, 13 }, /* SD0_DAT1 */
+- { RCAR_GP_PIN(3, 2), PU3, 12 }, /* SD0_DAT0 */
+- { RCAR_GP_PIN(3, 1), PU3, 11 }, /* SD0_CMD */
+- { RCAR_GP_PIN(3, 0), PU3, 10 }, /* SD0_CLK */
+- { PIN_A_NUMBER('T', 30), PU3, 9 }, /* ASEBRK */
+- /* bit 8 n/a */
+- { PIN_A_NUMBER('R', 29), PU3, 7 }, /* TDI */
+- { PIN_A_NUMBER('R', 30), PU3, 6 }, /* TMS */
+- { PIN_A_NUMBER('T', 27), PU3, 5 }, /* TCK */
+- { PIN_A_NUMBER('R', 26), PU3, 4 }, /* TRST# */
+- { PIN_A_NUMBER('D', 39), PU3, 3 }, /* EXTALR*/
+- { PIN_A_NUMBER('D', 38), PU3, 2 }, /* FSCLKST */
+- /* bit 1 n/a on M3*/
+- { PIN_A_NUMBER('R', 8), PU3, 0 }, /* DU_DOTCLKIN2 */
+-
+- { RCAR_GP_PIN(5, 19), PU4, 31 }, /* MSIOF0_SS1 */
+- { RCAR_GP_PIN(5, 18), PU4, 30 }, /* MSIOF0_SYNC */
+- { RCAR_GP_PIN(5, 17), PU4, 29 }, /* MSIOF0_SCK */
+- { RCAR_GP_PIN(5, 16), PU4, 28 }, /* HRTS0_N */
+- { RCAR_GP_PIN(5, 15), PU4, 27 }, /* HCTS0_N */
+- { RCAR_GP_PIN(5, 14), PU4, 26 }, /* HTX0 */
+- { RCAR_GP_PIN(5, 13), PU4, 25 }, /* HRX0 */
+- { RCAR_GP_PIN(5, 12), PU4, 24 }, /* HSCK0 */
+- { RCAR_GP_PIN(5, 11), PU4, 23 }, /* RX2_A */
+- { RCAR_GP_PIN(5, 10), PU4, 22 }, /* TX2_A */
+- { RCAR_GP_PIN(5, 9), PU4, 21 }, /* SCK2 */
+- { RCAR_GP_PIN(5, 8), PU4, 20 }, /* RTS1_N_TANS */
+- { RCAR_GP_PIN(5, 7), PU4, 19 }, /* CTS1_N */
+- { RCAR_GP_PIN(5, 6), PU4, 18 }, /* TX1_A */
+- { RCAR_GP_PIN(5, 5), PU4, 17 }, /* RX1_A */
+- { RCAR_GP_PIN(5, 4), PU4, 16 }, /* RTS0_N_TANS */
+- { RCAR_GP_PIN(5, 3), PU4, 15 }, /* CTS0_N */
+- { RCAR_GP_PIN(5, 2), PU4, 14 }, /* TX0 */
+- { RCAR_GP_PIN(5, 1), PU4, 13 }, /* RX0 */
+- { RCAR_GP_PIN(5, 0), PU4, 12 }, /* SCK0 */
+- { RCAR_GP_PIN(3, 15), PU4, 11 }, /* SD1_WP */
+- { RCAR_GP_PIN(3, 14), PU4, 10 }, /* SD1_CD */
+- { RCAR_GP_PIN(3, 13), PU4, 9 }, /* SD0_WP */
+- { RCAR_GP_PIN(3, 12), PU4, 8 }, /* SD0_CD */
+- { RCAR_GP_PIN(4, 17), PU4, 7 }, /* SD3_DS */
+- { RCAR_GP_PIN(4, 16), PU4, 6 }, /* SD3_DAT7 */
+- { RCAR_GP_PIN(4, 15), PU4, 5 }, /* SD3_DAT6 */
+- { RCAR_GP_PIN(4, 14), PU4, 4 }, /* SD3_DAT5 */
+- { RCAR_GP_PIN(4, 13), PU4, 3 }, /* SD3_DAT4 */
+- { RCAR_GP_PIN(4, 12), PU4, 2 }, /* SD3_DAT3 */
+- { RCAR_GP_PIN(4, 11), PU4, 1 }, /* SD3_DAT2 */
+- { RCAR_GP_PIN(4, 10), PU4, 0 }, /* SD3_DAT1 */
+-
+- { RCAR_GP_PIN(6, 24), PU5, 31 }, /* USB0_PWEN */
+- { RCAR_GP_PIN(6, 23), PU5, 30 }, /* AUDIO_CLKB_B */
+- { RCAR_GP_PIN(6, 22), PU5, 29 }, /* AUDIO_CLKA_A */
+- { RCAR_GP_PIN(6, 21), PU5, 28 }, /* SSI_SDATA9_A */
+- { RCAR_GP_PIN(6, 20), PU5, 27 }, /* SSI_SDATA8 */
+- { RCAR_GP_PIN(6, 19), PU5, 26 }, /* SSI_SDATA7 */
+- { RCAR_GP_PIN(6, 18), PU5, 25 }, /* SSI_WS78 */
+- { RCAR_GP_PIN(6, 17), PU5, 24 }, /* SSI_SCK78 */
+- { RCAR_GP_PIN(6, 16), PU5, 23 }, /* SSI_SDATA6 */
+- { RCAR_GP_PIN(6, 15), PU5, 22 }, /* SSI_WS6 */
+- { RCAR_GP_PIN(6, 14), PU5, 21 }, /* SSI_SCK6 */
+- { RCAR_GP_PIN(6, 13), PU5, 20 }, /* SSI_SDATA5 */
+- { RCAR_GP_PIN(6, 12), PU5, 19 }, /* SSI_WS5 */
+- { RCAR_GP_PIN(6, 11), PU5, 18 }, /* SSI_SCK5 */
+- { RCAR_GP_PIN(6, 10), PU5, 17 }, /* SSI_SDATA4 */
+- { RCAR_GP_PIN(6, 9), PU5, 16 }, /* SSI_WS4 */
+- { RCAR_GP_PIN(6, 8), PU5, 15 }, /* SSI_SCK4 */
+- { RCAR_GP_PIN(6, 7), PU5, 14 }, /* SSI_SDATA3 */
+- { RCAR_GP_PIN(6, 6), PU5, 13 }, /* SSI_WS349 */
+- { RCAR_GP_PIN(6, 5), PU5, 12 }, /* SSI_SCK349 */
+- { RCAR_GP_PIN(6, 4), PU5, 11 }, /* SSI_SDATA2_A */
+- { RCAR_GP_PIN(6, 3), PU5, 10 }, /* SSI_SDATA1_A */
+- { RCAR_GP_PIN(6, 2), PU5, 9 }, /* SSI_SDATA0 */
+- { RCAR_GP_PIN(6, 1), PU5, 8 }, /* SSI_WS01239 */
+- { RCAR_GP_PIN(6, 0), PU5, 7 }, /* SSI_SCK01239 */
+- { PIN_NUMBER('H', 37), PU5, 6 }, /* MLB_REF */
+- { RCAR_GP_PIN(5, 25), PU5, 5 }, /* MLB_DAT */
+- { RCAR_GP_PIN(5, 24), PU5, 4 }, /* MLB_SIG */
+- { RCAR_GP_PIN(5, 23), PU5, 3 }, /* MLB_CLK */
+- { RCAR_GP_PIN(5, 22), PU5, 2 }, /* MSIOF0_RXD */
+- { RCAR_GP_PIN(5, 21), PU5, 1 }, /* MSIOF0_SS2 */
+- { RCAR_GP_PIN(5, 20), PU5, 0 }, /* MSIOF0_TXD */
+-
+- { RCAR_GP_PIN(6, 31), PU6, 6 }, /* GP6_31 */
+- { RCAR_GP_PIN(6, 30), PU6, 5 }, /* GP6_30 */
+- { RCAR_GP_PIN(6, 29), PU6, 4 }, /* USB30_OVC */
+- { RCAR_GP_PIN(6, 28), PU6, 3 }, /* USB30_PWEN */
+- { RCAR_GP_PIN(6, 27), PU6, 2 }, /* USB1_OVC */
+- { RCAR_GP_PIN(6, 26), PU6, 1 }, /* USB1_PWEN */
+- { RCAR_GP_PIN(6, 25), PU6, 0 }, /* USB0_OVC */
++static const struct pinmux_bias_reg pinmux_bias_regs[] = {
++ { PINMUX_BIAS_REG("PUEN0", 0xe6060400, "PUD0", 0xe6060440) {
++ [ 0] = PIN_NUMBER('W', 3), /* QSPI0_SPCLK */
++ [ 1] = PIN_A_NUMBER('C', 5), /* QSPI0_MOSI_IO0 */
++ [ 2] = PIN_A_NUMBER('B', 4), /* QSPI0_MISO_IO1 */
++ [ 3] = PIN_NUMBER('Y', 6), /* QSPI0_IO2 */
++ [ 4] = PIN_A_NUMBER('B', 6), /* QSPI0_IO3 */
++ [ 5] = PIN_NUMBER('Y', 3), /* QSPI0_SSL */
++ [ 6] = PIN_NUMBER('V', 3), /* QSPI1_SPCLK */
++ [ 7] = PIN_A_NUMBER('C', 7), /* QSPI1_MOSI_IO0 */
++ [ 8] = PIN_A_NUMBER('E', 5), /* QSPI1_MISO_IO1 */
++ [ 9] = PIN_A_NUMBER('E', 4), /* QSPI1_IO2 */
++ [10] = PIN_A_NUMBER('C', 3), /* QSPI1_IO3 */
++ [11] = PIN_NUMBER('V', 5), /* QSPI1_SSL */
++ [12] = PIN_NUMBER('Y', 7), /* RPC_INT# */
++ [13] = PIN_NUMBER('V', 6), /* RPC_WP# */
++ [14] = PIN_NUMBER('V', 7), /* RPC_RESET# */
++ [15] = PIN_NUMBER('A', 16), /* AVB_RX_CTL */
++ [16] = PIN_NUMBER('B', 19), /* AVB_RXC */
++ [17] = PIN_NUMBER('A', 13), /* AVB_RD0 */
++ [18] = PIN_NUMBER('B', 13), /* AVB_RD1 */
++ [19] = PIN_NUMBER('A', 14), /* AVB_RD2 */
++ [20] = PIN_NUMBER('B', 14), /* AVB_RD3 */
++ [21] = PIN_NUMBER('A', 8), /* AVB_TX_CTL */
++ [22] = PIN_NUMBER('A', 19), /* AVB_TXC */
++ [23] = PIN_NUMBER('A', 18), /* AVB_TD0 */
++ [24] = PIN_NUMBER('B', 18), /* AVB_TD1 */
++ [25] = PIN_NUMBER('A', 17), /* AVB_TD2 */
++ [26] = PIN_NUMBER('B', 17), /* AVB_TD3 */
++ [27] = PIN_NUMBER('A', 12), /* AVB_TXCREFCLK */
++ [28] = PIN_NUMBER('A', 9), /* AVB_MDIO */
++ [29] = RCAR_GP_PIN(2, 9), /* AVB_MDC */
++ [30] = RCAR_GP_PIN(2, 10), /* AVB_MAGIC */
++ [31] = RCAR_GP_PIN(2, 11), /* AVB_PHY_INT */
++ } },
++ { PINMUX_BIAS_REG("PUEN1", 0xe6060404, "PUD1", 0xe6060444) {
++ [ 0] = RCAR_GP_PIN(2, 12), /* AVB_LINK */
++ [ 1] = RCAR_GP_PIN(2, 13), /* AVB_AVTP_MATCH_A */
++ [ 2] = RCAR_GP_PIN(2, 14), /* AVB_AVTP_CAPTURE_A */
++ [ 3] = RCAR_GP_PIN(2, 0), /* IRQ0 */
++ [ 4] = RCAR_GP_PIN(2, 1), /* IRQ1 */
++ [ 5] = RCAR_GP_PIN(2, 2), /* IRQ2 */
++ [ 6] = RCAR_GP_PIN(2, 3), /* IRQ3 */
++ [ 7] = RCAR_GP_PIN(2, 4), /* IRQ4 */
++ [ 8] = RCAR_GP_PIN(2, 5), /* IRQ5 */
++ [ 9] = RCAR_GP_PIN(2, 6), /* PWM0 */
++ [10] = RCAR_GP_PIN(2, 7), /* PWM1_A */
++ [11] = RCAR_GP_PIN(2, 8), /* PWM2_A */
++ [12] = RCAR_GP_PIN(1, 0), /* A0 */
++ [13] = RCAR_GP_PIN(1, 1), /* A1 */
++ [14] = RCAR_GP_PIN(1, 2), /* A2 */
++ [15] = RCAR_GP_PIN(1, 3), /* A3 */
++ [16] = RCAR_GP_PIN(1, 4), /* A4 */
++ [17] = RCAR_GP_PIN(1, 5), /* A5 */
++ [18] = RCAR_GP_PIN(1, 6), /* A6 */
++ [19] = RCAR_GP_PIN(1, 7), /* A7 */
++ [20] = RCAR_GP_PIN(1, 8), /* A8 */
++ [21] = RCAR_GP_PIN(1, 9), /* A9 */
++ [22] = RCAR_GP_PIN(1, 10), /* A10 */
++ [23] = RCAR_GP_PIN(1, 11), /* A11 */
++ [24] = RCAR_GP_PIN(1, 12), /* A12 */
++ [25] = RCAR_GP_PIN(1, 13), /* A13 */
++ [26] = RCAR_GP_PIN(1, 14), /* A14 */
++ [27] = RCAR_GP_PIN(1, 15), /* A15 */
++ [28] = RCAR_GP_PIN(1, 16), /* A16 */
++ [29] = RCAR_GP_PIN(1, 17), /* A17 */
++ [30] = RCAR_GP_PIN(1, 18), /* A18 */
++ [31] = RCAR_GP_PIN(1, 19), /* A19 */
++ } },
++ { PINMUX_BIAS_REG("PUEN2", 0xe6060408, "PUD2", 0xe6060448) {
++ [ 0] = RCAR_GP_PIN(1, 28), /* CLKOUT */
++ [ 1] = RCAR_GP_PIN(1, 20), /* CS0_N */
++ [ 2] = RCAR_GP_PIN(1, 21), /* CS1_N */
++ [ 3] = RCAR_GP_PIN(1, 22), /* BS_N */
++ [ 4] = RCAR_GP_PIN(1, 23), /* RD_N */
++ [ 5] = RCAR_GP_PIN(1, 24), /* RD_WR_N */
++ [ 6] = RCAR_GP_PIN(1, 25), /* WE0_N */
++ [ 7] = RCAR_GP_PIN(1, 26), /* WE1_N */
++ [ 8] = RCAR_GP_PIN(1, 27), /* EX_WAIT0_A */
++ [ 9] = PIN_NUMBER('C', 1), /* PRESETOUT# */
++ [10] = RCAR_GP_PIN(0, 0), /* D0 */
++ [11] = RCAR_GP_PIN(0, 1), /* D1 */
++ [12] = RCAR_GP_PIN(0, 2), /* D2 */
++ [13] = RCAR_GP_PIN(0, 3), /* D3 */
++ [14] = RCAR_GP_PIN(0, 4), /* D4 */
++ [15] = RCAR_GP_PIN(0, 5), /* D5 */
++ [16] = RCAR_GP_PIN(0, 6), /* D6 */
++ [17] = RCAR_GP_PIN(0, 7), /* D7 */
++ [18] = RCAR_GP_PIN(0, 8), /* D8 */
++ [19] = RCAR_GP_PIN(0, 9), /* D9 */
++ [20] = RCAR_GP_PIN(0, 10), /* D10 */
++ [21] = RCAR_GP_PIN(0, 11), /* D11 */
++ [22] = RCAR_GP_PIN(0, 12), /* D12 */
++ [23] = RCAR_GP_PIN(0, 13), /* D13 */
++ [24] = RCAR_GP_PIN(0, 14), /* D14 */
++ [25] = RCAR_GP_PIN(0, 15), /* D15 */
++ [26] = RCAR_GP_PIN(7, 0), /* AVS1 */
++ [27] = RCAR_GP_PIN(7, 1), /* AVS2 */
++ [28] = RCAR_GP_PIN(7, 2), /* HDMI0_CEC */
++ [29] = RCAR_GP_PIN(7, 3), /* GP7_03 */
++ [30] = PIN_A_NUMBER('P', 7), /* DU_DOTCLKIN0 */
++ [31] = PIN_A_NUMBER('P', 8), /* DU_DOTCLKIN1 */
++ } },
++ { PINMUX_BIAS_REG("PUEN3", 0xe606040c, "PUD3", 0xe606044c) {
++ [ 0] = PIN_A_NUMBER('R', 8), /* DU_DOTCLKIN2 */
++ [ 1] = PIN_NONE,
++ [ 2] = PIN_A_NUMBER('D', 38), /* FSCLKST */
++ [ 3] = PIN_A_NUMBER('D', 39), /* EXTALR*/
++ [ 4] = PIN_A_NUMBER('R', 26), /* TRST# */
++ [ 5] = PIN_A_NUMBER('T', 27), /* TCK */
++ [ 6] = PIN_A_NUMBER('R', 30), /* TMS */
++ [ 7] = PIN_A_NUMBER('R', 29), /* TDI */
++ [ 8] = PIN_NONE,
++ [ 9] = PIN_A_NUMBER('T', 30), /* ASEBRK */
++ [10] = RCAR_GP_PIN(3, 0), /* SD0_CLK */
++ [11] = RCAR_GP_PIN(3, 1), /* SD0_CMD */
++ [12] = RCAR_GP_PIN(3, 2), /* SD0_DAT0 */
++ [13] = RCAR_GP_PIN(3, 3), /* SD0_DAT1 */
++ [14] = RCAR_GP_PIN(3, 4), /* SD0_DAT2 */
++ [15] = RCAR_GP_PIN(3, 5), /* SD0_DAT3 */
++ [16] = RCAR_GP_PIN(3, 6), /* SD1_CLK */
++ [17] = RCAR_GP_PIN(3, 7), /* SD1_CMD */
++ [18] = RCAR_GP_PIN(3, 8), /* SD1_DAT0 */
++ [19] = RCAR_GP_PIN(3, 9), /* SD1_DAT1 */
++ [20] = RCAR_GP_PIN(3, 10), /* SD1_DAT2 */
++ [21] = RCAR_GP_PIN(3, 11), /* SD1_DAT3 */
++ [22] = RCAR_GP_PIN(4, 0), /* SD2_CLK */
++ [23] = RCAR_GP_PIN(4, 1), /* SD2_CMD */
++ [24] = RCAR_GP_PIN(4, 2), /* SD2_DAT0 */
++ [25] = RCAR_GP_PIN(4, 3), /* SD2_DAT1 */
++ [26] = RCAR_GP_PIN(4, 4), /* SD2_DAT2 */
++ [27] = RCAR_GP_PIN(4, 5), /* SD2_DAT3 */
++ [28] = RCAR_GP_PIN(4, 6), /* SD2_DS */
++ [29] = RCAR_GP_PIN(4, 7), /* SD3_CLK */
++ [30] = RCAR_GP_PIN(4, 8), /* SD3_CMD */
++ [31] = RCAR_GP_PIN(4, 9), /* SD3_DAT0 */
++ } },
++ { PINMUX_BIAS_REG("PUEN4", 0xe6060410, "PUD4", 0xe6060450) {
++ [ 0] = RCAR_GP_PIN(4, 10), /* SD3_DAT1 */
++ [ 1] = RCAR_GP_PIN(4, 11), /* SD3_DAT2 */
++ [ 2] = RCAR_GP_PIN(4, 12), /* SD3_DAT3 */
++ [ 3] = RCAR_GP_PIN(4, 13), /* SD3_DAT4 */
++ [ 4] = RCAR_GP_PIN(4, 14), /* SD3_DAT5 */
++ [ 5] = RCAR_GP_PIN(4, 15), /* SD3_DAT6 */
++ [ 6] = RCAR_GP_PIN(4, 16), /* SD3_DAT7 */
++ [ 7] = RCAR_GP_PIN(4, 17), /* SD3_DS */
++ [ 8] = RCAR_GP_PIN(3, 12), /* SD0_CD */
++ [ 9] = RCAR_GP_PIN(3, 13), /* SD0_WP */
++ [10] = RCAR_GP_PIN(3, 14), /* SD1_CD */
++ [11] = RCAR_GP_PIN(3, 15), /* SD1_WP */
++ [12] = RCAR_GP_PIN(5, 0), /* SCK0 */
++ [13] = RCAR_GP_PIN(5, 1), /* RX0 */
++ [14] = RCAR_GP_PIN(5, 2), /* TX0 */
++ [15] = RCAR_GP_PIN(5, 3), /* CTS0_N */
++ [16] = RCAR_GP_PIN(5, 4), /* RTS0_N_TANS */
++ [17] = RCAR_GP_PIN(5, 5), /* RX1_A */
++ [18] = RCAR_GP_PIN(5, 6), /* TX1_A */
++ [19] = RCAR_GP_PIN(5, 7), /* CTS1_N */
++ [20] = RCAR_GP_PIN(5, 8), /* RTS1_N_TANS */
++ [21] = RCAR_GP_PIN(5, 9), /* SCK2 */
++ [22] = RCAR_GP_PIN(5, 10), /* TX2_A */
++ [23] = RCAR_GP_PIN(5, 11), /* RX2_A */
++ [24] = RCAR_GP_PIN(5, 12), /* HSCK0 */
++ [25] = RCAR_GP_PIN(5, 13), /* HRX0 */
++ [26] = RCAR_GP_PIN(5, 14), /* HTX0 */
++ [27] = RCAR_GP_PIN(5, 15), /* HCTS0_N */
++ [28] = RCAR_GP_PIN(5, 16), /* HRTS0_N */
++ [29] = RCAR_GP_PIN(5, 17), /* MSIOF0_SCK */
++ [30] = RCAR_GP_PIN(5, 18), /* MSIOF0_SYNC */
++ [31] = RCAR_GP_PIN(5, 19), /* MSIOF0_SS1 */
++ } },
++ { PINMUX_BIAS_REG("PUEN5", 0xe6060414, "PUD5", 0xe6060454) {
++ [ 0] = RCAR_GP_PIN(5, 20), /* MSIOF0_TXD */
++ [ 1] = RCAR_GP_PIN(5, 21), /* MSIOF0_SS2 */
++ [ 2] = RCAR_GP_PIN(5, 22), /* MSIOF0_RXD */
++ [ 3] = RCAR_GP_PIN(5, 23), /* MLB_CLK */
++ [ 4] = RCAR_GP_PIN(5, 24), /* MLB_SIG */
++ [ 5] = RCAR_GP_PIN(5, 25), /* MLB_DAT */
++ [ 6] = PIN_NUMBER('H', 37), /* MLB_REF */
++ [ 7] = RCAR_GP_PIN(6, 0), /* SSI_SCK01239 */
++ [ 8] = RCAR_GP_PIN(6, 1), /* SSI_WS01239 */
++ [ 9] = RCAR_GP_PIN(6, 2), /* SSI_SDATA0 */
++ [10] = RCAR_GP_PIN(6, 3), /* SSI_SDATA1_A */
++ [11] = RCAR_GP_PIN(6, 4), /* SSI_SDATA2_A */
++ [12] = RCAR_GP_PIN(6, 5), /* SSI_SCK349 */
++ [13] = RCAR_GP_PIN(6, 6), /* SSI_WS349 */
++ [14] = RCAR_GP_PIN(6, 7), /* SSI_SDATA3 */
++ [15] = RCAR_GP_PIN(6, 8), /* SSI_SCK4 */
++ [16] = RCAR_GP_PIN(6, 9), /* SSI_WS4 */
++ [17] = RCAR_GP_PIN(6, 10), /* SSI_SDATA4 */
++ [18] = RCAR_GP_PIN(6, 11), /* SSI_SCK5 */
++ [19] = RCAR_GP_PIN(6, 12), /* SSI_WS5 */
++ [20] = RCAR_GP_PIN(6, 13), /* SSI_SDATA5 */
++ [21] = RCAR_GP_PIN(6, 14), /* SSI_SCK6 */
++ [22] = RCAR_GP_PIN(6, 15), /* SSI_WS6 */
++ [23] = RCAR_GP_PIN(6, 16), /* SSI_SDATA6 */
++ [24] = RCAR_GP_PIN(6, 17), /* SSI_SCK78 */
++ [25] = RCAR_GP_PIN(6, 18), /* SSI_WS78 */
++ [26] = RCAR_GP_PIN(6, 19), /* SSI_SDATA7 */
++ [27] = RCAR_GP_PIN(6, 20), /* SSI_SDATA8 */
++ [28] = RCAR_GP_PIN(6, 21), /* SSI_SDATA9_A */
++ [29] = RCAR_GP_PIN(6, 22), /* AUDIO_CLKA_A */
++ [30] = RCAR_GP_PIN(6, 23), /* AUDIO_CLKB_B */
++ [31] = RCAR_GP_PIN(6, 24), /* USB0_PWEN */
++ } },
++ { PINMUX_BIAS_REG("PUEN6", 0xe6060418, "PUD6", 0xe6060458) {
++ [ 0] = RCAR_GP_PIN(6, 25), /* USB0_OVC */
++ [ 1] = RCAR_GP_PIN(6, 26), /* USB1_PWEN */
++ [ 2] = RCAR_GP_PIN(6, 27), /* USB1_OVC */
++ [ 3] = RCAR_GP_PIN(6, 28), /* USB30_PWEN */
++ [ 4] = RCAR_GP_PIN(6, 29), /* USB30_OVC */
++ [ 5] = RCAR_GP_PIN(6, 30), /* GP6_30 */
++ [ 6] = RCAR_GP_PIN(6, 31), /* GP6_31 */
++ [ 7] = PIN_NONE,
++ [ 8] = PIN_NONE,
++ [ 9] = PIN_NONE,
++ [10] = PIN_NONE,
++ [11] = PIN_NONE,
++ [12] = PIN_NONE,
++ [13] = PIN_NONE,
++ [14] = PIN_NONE,
++ [15] = PIN_NONE,
++ [16] = PIN_NONE,
++ [17] = PIN_NONE,
++ [18] = PIN_NONE,
++ [19] = PIN_NONE,
++ [20] = PIN_NONE,
++ [21] = PIN_NONE,
++ [22] = PIN_NONE,
++ [23] = PIN_NONE,
++ [24] = PIN_NONE,
++ [25] = PIN_NONE,
++ [26] = PIN_NONE,
++ [27] = PIN_NONE,
++ [28] = PIN_NONE,
++ [29] = PIN_NONE,
++ [30] = PIN_NONE,
++ [31] = PIN_NONE,
++ } },
++ { /* sentinel */ },
+ };
+
+ static unsigned int r8a7796_pinmux_get_bias(struct sh_pfc *pfc,
+ unsigned int pin)
+ {
+- const struct sh_pfc_bias_info *info;
+- u32 reg;
+- u32 bit;
++ const struct pinmux_bias_reg *reg;
++ unsigned int bit;
+
+- info = sh_pfc_pin_to_bias_info(bias_info, ARRAY_SIZE(bias_info), pin);
+- if (!info)
++ reg = sh_pfc_pin_to_bias_reg(pfc, pin, &bit);
++ if (!reg)
+ return PIN_CONFIG_BIAS_DISABLE;
+
+- reg = info->reg;
+- bit = BIT(info->bit);
+-
+- if (!(sh_pfc_read(pfc, PUEN + reg) & bit))
++ if (!(sh_pfc_read(pfc, reg->puen) & BIT(bit)))
+ return PIN_CONFIG_BIAS_DISABLE;
+- else if (sh_pfc_read(pfc, PUD + reg) & bit)
++ else if (sh_pfc_read(pfc, reg->pud) & BIT(bit))
+ return PIN_CONFIG_BIAS_PULL_UP;
+ else
+ return PIN_CONFIG_BIAS_PULL_DOWN;
+@@ -5735,28 +5755,24 @@ static unsigned int r8a7796_pinmux_get_bias(struct sh_pfc *pfc,
+ static void r8a7796_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
+ unsigned int bias)
+ {
+- const struct sh_pfc_bias_info *info;
++ const struct pinmux_bias_reg *reg;
+ u32 enable, updown;
+- u32 reg;
+- u32 bit;
++ unsigned int bit;
+
+- info = sh_pfc_pin_to_bias_info(bias_info, ARRAY_SIZE(bias_info), pin);
+- if (!info)
++ reg = sh_pfc_pin_to_bias_reg(pfc, pin, &bit);
++ if (!reg)
+ return;
+
+- reg = info->reg;
+- bit = BIT(info->bit);
+-
+- enable = sh_pfc_read(pfc, PUEN + reg) & ~bit;
++ enable = sh_pfc_read(pfc, reg->puen) & ~BIT(bit);
+ if (bias != PIN_CONFIG_BIAS_DISABLE)
+- enable |= bit;
++ enable |= BIT(bit);
+
+- updown = sh_pfc_read(pfc, PUD + reg) & ~bit;
++ updown = sh_pfc_read(pfc, reg->pud) & ~BIT(bit);
+ if (bias == PIN_CONFIG_BIAS_PULL_UP)
+- updown |= bit;
++ updown |= BIT(bit);
+
+- sh_pfc_write(pfc, PUD + reg, updown);
+- sh_pfc_write(pfc, PUEN + reg, enable);
++ sh_pfc_write(pfc, reg->pud, updown);
++ sh_pfc_write(pfc, reg->puen, enable);
+ }
+
+ static const struct sh_pfc_soc_operations r8a7796_pinmux_ops = {
+@@ -5781,6 +5797,7 @@ const struct sh_pfc_soc_info r8a7796_pinmux_info = {
+
+ .cfg_regs = pinmux_config_regs,
+ .drive_regs = pinmux_drive_regs,
++ .bias_regs = pinmux_bias_regs,
+
+ .pinmux_data = pinmux_data,
+ .pinmux_data_size = ARRAY_SIZE(pinmux_data),
+--
+2.19.0
+
diff --git a/patches/0217-pinctrl-sh-pfc-r8a7778-Use-generic-bias-register-des.patch b/patches/0217-pinctrl-sh-pfc-r8a7778-Use-generic-bias-register-des.patch
new file mode 100644
index 0000000..dc5f003
--- /dev/null
+++ b/patches/0217-pinctrl-sh-pfc-r8a7778-Use-generic-bias-register-des.patch
@@ -0,0 +1,468 @@
+From 6a6c47f957e8720a093aee0305b64c09be899f85 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 29 Sep 2017 16:57:20 +0200
+Subject: [PATCH 0217/1795] pinctrl: sh-pfc: r8a7778: Use generic bias register
+ description
+
+Move R-Car M1A bias support over to the generic way to describe bias
+registers.
+
+As the new description is more compact, this decreases kernel size by
+ca. 148 bytes.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 3f8833ad66519cf2e4373bf3153f9937ef691717)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7778.c | 403 +++++++++++++++------------
+ 1 file changed, 222 insertions(+), 181 deletions(-)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
+index c3af9ebee4af..00d61d175249 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
+@@ -2912,189 +2912,230 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
+ { },
+ };
+
+-#define PUPR0 0x100
+-#define PUPR1 0x104
+-#define PUPR2 0x108
+-#define PUPR3 0x10c
+-#define PUPR4 0x110
+-#define PUPR5 0x114
+-
+-static const struct sh_pfc_bias_info bias_info[] = {
+- { RCAR_GP_PIN(0, 6), PUPR0, 0 }, /* A0 */
+- { RCAR_GP_PIN(0, 7), PUPR0, 1 }, /* A1 */
+- { RCAR_GP_PIN(0, 8), PUPR0, 2 }, /* A2 */
+- { RCAR_GP_PIN(0, 9), PUPR0, 3 }, /* A3 */
+- { RCAR_GP_PIN(0, 10), PUPR0, 4 }, /* A4 */
+- { RCAR_GP_PIN(0, 11), PUPR0, 5 }, /* A5 */
+- { RCAR_GP_PIN(0, 12), PUPR0, 6 }, /* A6 */
+- { RCAR_GP_PIN(0, 13), PUPR0, 7 }, /* A7 */
+- { RCAR_GP_PIN(0, 14), PUPR0, 8 }, /* A8 */
+- { RCAR_GP_PIN(0, 15), PUPR0, 9 }, /* A9 */
+- { RCAR_GP_PIN(0, 16), PUPR0, 10 }, /* A10 */
+- { RCAR_GP_PIN(0, 17), PUPR0, 11 }, /* A11 */
+- { RCAR_GP_PIN(0, 18), PUPR0, 12 }, /* A12 */
+- { RCAR_GP_PIN(0, 19), PUPR0, 13 }, /* A13 */
+- { RCAR_GP_PIN(0, 20), PUPR0, 14 }, /* A14 */
+- { RCAR_GP_PIN(0, 21), PUPR0, 15 }, /* A15 */
+- { RCAR_GP_PIN(0, 22), PUPR0, 16 }, /* A16 */
+- { RCAR_GP_PIN(0, 23), PUPR0, 17 }, /* A17 */
+- { RCAR_GP_PIN(0, 24), PUPR0, 18 }, /* A18 */
+- { RCAR_GP_PIN(0, 25), PUPR0, 19 }, /* A19 */
+- { RCAR_GP_PIN(0, 26), PUPR0, 20 }, /* A20 */
+- { RCAR_GP_PIN(0, 27), PUPR0, 21 }, /* A21 */
+- { RCAR_GP_PIN(0, 28), PUPR0, 22 }, /* A22 */
+- { RCAR_GP_PIN(0, 29), PUPR0, 23 }, /* A23 */
+- { RCAR_GP_PIN(0, 30), PUPR0, 24 }, /* A24 */
+- { RCAR_GP_PIN(0, 31), PUPR0, 25 }, /* A25 */
+- { RCAR_GP_PIN(1, 3), PUPR0, 26 }, /* /EX_CS0 */
+- { RCAR_GP_PIN(1, 4), PUPR0, 27 }, /* /EX_CS1 */
+- { RCAR_GP_PIN(1, 5), PUPR0, 28 }, /* /EX_CS2 */
+- { RCAR_GP_PIN(1, 6), PUPR0, 29 }, /* /EX_CS3 */
+- { RCAR_GP_PIN(1, 7), PUPR0, 30 }, /* /EX_CS4 */
+- { RCAR_GP_PIN(1, 8), PUPR0, 31 }, /* /EX_CS5 */
+-
+- { RCAR_GP_PIN(0, 0), PUPR1, 0 }, /* /PRESETOUT */
+- { RCAR_GP_PIN(0, 5), PUPR1, 1 }, /* /BS */
+- { RCAR_GP_PIN(1, 0), PUPR1, 2 }, /* RD//WR */
+- { RCAR_GP_PIN(1, 1), PUPR1, 3 }, /* /WE0 */
+- { RCAR_GP_PIN(1, 2), PUPR1, 4 }, /* /WE1 */
+- { RCAR_GP_PIN(1, 11), PUPR1, 5 }, /* EX_WAIT0 */
+- { RCAR_GP_PIN(1, 9), PUPR1, 6 }, /* DREQ0 */
+- { RCAR_GP_PIN(1, 10), PUPR1, 7 }, /* DACK0 */
+- { RCAR_GP_PIN(1, 12), PUPR1, 8 }, /* IRQ0 */
+- { RCAR_GP_PIN(1, 13), PUPR1, 9 }, /* IRQ1 */
+-
+- { RCAR_GP_PIN(1, 22), PUPR2, 0 }, /* DU0_DR0 */
+- { RCAR_GP_PIN(1, 23), PUPR2, 1 }, /* DU0_DR1 */
+- { RCAR_GP_PIN(1, 24), PUPR2, 2 }, /* DU0_DR2 */
+- { RCAR_GP_PIN(1, 25), PUPR2, 3 }, /* DU0_DR3 */
+- { RCAR_GP_PIN(1, 26), PUPR2, 4 }, /* DU0_DR4 */
+- { RCAR_GP_PIN(1, 27), PUPR2, 5 }, /* DU0_DR5 */
+- { RCAR_GP_PIN(1, 28), PUPR2, 6 }, /* DU0_DR6 */
+- { RCAR_GP_PIN(1, 29), PUPR2, 7 }, /* DU0_DR7 */
+- { RCAR_GP_PIN(1, 30), PUPR2, 8 }, /* DU0_DG0 */
+- { RCAR_GP_PIN(1, 31), PUPR2, 9 }, /* DU0_DG1 */
+- { RCAR_GP_PIN(2, 0), PUPR2, 10 }, /* DU0_DG2 */
+- { RCAR_GP_PIN(2, 1), PUPR2, 11 }, /* DU0_DG3 */
+- { RCAR_GP_PIN(2, 2), PUPR2, 12 }, /* DU0_DG4 */
+- { RCAR_GP_PIN(2, 3), PUPR2, 13 }, /* DU0_DG5 */
+- { RCAR_GP_PIN(2, 4), PUPR2, 14 }, /* DU0_DG6 */
+- { RCAR_GP_PIN(2, 5), PUPR2, 15 }, /* DU0_DG7 */
+- { RCAR_GP_PIN(2, 6), PUPR2, 16 }, /* DU0_DB0 */
+- { RCAR_GP_PIN(2, 7), PUPR2, 17 }, /* DU0_DB1 */
+- { RCAR_GP_PIN(2, 8), PUPR2, 18 }, /* DU0_DB2 */
+- { RCAR_GP_PIN(2, 9), PUPR2, 19 }, /* DU0_DB3 */
+- { RCAR_GP_PIN(2, 10), PUPR2, 20 }, /* DU0_DB4 */
+- { RCAR_GP_PIN(2, 11), PUPR2, 21 }, /* DU0_DB5 */
+- { RCAR_GP_PIN(2, 12), PUPR2, 22 }, /* DU0_DB6 */
+- { RCAR_GP_PIN(2, 13), PUPR2, 23 }, /* DU0_DB7 */
+- { RCAR_GP_PIN(2, 14), PUPR2, 24 }, /* DU0_DOTCLKIN */
+- { RCAR_GP_PIN(2, 15), PUPR2, 25 }, /* DU0_DOTCLKOUT0 */
+- { RCAR_GP_PIN(2, 17), PUPR2, 26 }, /* DU0_HSYNC */
+- { RCAR_GP_PIN(2, 18), PUPR2, 27 }, /* DU0_VSYNC */
+- { RCAR_GP_PIN(2, 19), PUPR2, 28 }, /* DU0_EXODDF */
+- { RCAR_GP_PIN(2, 20), PUPR2, 29 }, /* DU0_DISP */
+- { RCAR_GP_PIN(2, 21), PUPR2, 30 }, /* DU0_CDE */
+- { RCAR_GP_PIN(2, 16), PUPR2, 31 }, /* DU0_DOTCLKOUT1 */
+-
+- { RCAR_GP_PIN(3, 24), PUPR3, 0 }, /* VI0_CLK */
+- { RCAR_GP_PIN(3, 25), PUPR3, 1 }, /* VI0_CLKENB */
+- { RCAR_GP_PIN(3, 26), PUPR3, 2 }, /* VI0_FIELD */
+- { RCAR_GP_PIN(3, 27), PUPR3, 3 }, /* /VI0_HSYNC */
+- { RCAR_GP_PIN(3, 28), PUPR3, 4 }, /* /VI0_VSYNC */
+- { RCAR_GP_PIN(3, 29), PUPR3, 5 }, /* VI0_DATA0 */
+- { RCAR_GP_PIN(3, 30), PUPR3, 6 }, /* VI0_DATA1 */
+- { RCAR_GP_PIN(3, 31), PUPR3, 7 }, /* VI0_DATA2 */
+- { RCAR_GP_PIN(4, 0), PUPR3, 8 }, /* VI0_DATA3 */
+- { RCAR_GP_PIN(4, 1), PUPR3, 9 }, /* VI0_DATA4 */
+- { RCAR_GP_PIN(4, 2), PUPR3, 10 }, /* VI0_DATA5 */
+- { RCAR_GP_PIN(4, 3), PUPR3, 11 }, /* VI0_DATA6 */
+- { RCAR_GP_PIN(4, 4), PUPR3, 12 }, /* VI0_DATA7 */
+- { RCAR_GP_PIN(4, 5), PUPR3, 13 }, /* VI0_G2 */
+- { RCAR_GP_PIN(4, 6), PUPR3, 14 }, /* VI0_G3 */
+- { RCAR_GP_PIN(4, 7), PUPR3, 15 }, /* VI0_G4 */
+- { RCAR_GP_PIN(4, 8), PUPR3, 16 }, /* VI0_G5 */
+- { RCAR_GP_PIN(4, 21), PUPR3, 17 }, /* VI1_DATA12 */
+- { RCAR_GP_PIN(4, 22), PUPR3, 18 }, /* VI1_DATA13 */
+- { RCAR_GP_PIN(4, 23), PUPR3, 19 }, /* VI1_DATA14 */
+- { RCAR_GP_PIN(4, 24), PUPR3, 20 }, /* VI1_DATA15 */
+- { RCAR_GP_PIN(4, 9), PUPR3, 21 }, /* ETH_REF_CLK */
+- { RCAR_GP_PIN(4, 10), PUPR3, 22 }, /* ETH_TXD0 */
+- { RCAR_GP_PIN(4, 11), PUPR3, 23 }, /* ETH_TXD1 */
+- { RCAR_GP_PIN(4, 12), PUPR3, 24 }, /* ETH_CRS_DV */
+- { RCAR_GP_PIN(4, 13), PUPR3, 25 }, /* ETH_TX_EN */
+- { RCAR_GP_PIN(4, 14), PUPR3, 26 }, /* ETH_RX_ER */
+- { RCAR_GP_PIN(4, 15), PUPR3, 27 }, /* ETH_RXD0 */
+- { RCAR_GP_PIN(4, 16), PUPR3, 28 }, /* ETH_RXD1 */
+- { RCAR_GP_PIN(4, 17), PUPR3, 29 }, /* ETH_MDC */
+- { RCAR_GP_PIN(4, 18), PUPR3, 30 }, /* ETH_MDIO */
+- { RCAR_GP_PIN(4, 19), PUPR3, 31 }, /* ETH_LINK */
+-
+- { RCAR_GP_PIN(3, 6), PUPR4, 0 }, /* SSI_SCK012 */
+- { RCAR_GP_PIN(3, 7), PUPR4, 1 }, /* SSI_WS012 */
+- { RCAR_GP_PIN(3, 10), PUPR4, 2 }, /* SSI_SDATA0 */
+- { RCAR_GP_PIN(3, 9), PUPR4, 3 }, /* SSI_SDATA1 */
+- { RCAR_GP_PIN(3, 8), PUPR4, 4 }, /* SSI_SDATA2 */
+- { RCAR_GP_PIN(3, 2), PUPR4, 5 }, /* SSI_SCK34 */
+- { RCAR_GP_PIN(3, 3), PUPR4, 6 }, /* SSI_WS34 */
+- { RCAR_GP_PIN(3, 5), PUPR4, 7 }, /* SSI_SDATA3 */
+- { RCAR_GP_PIN(3, 4), PUPR4, 8 }, /* SSI_SDATA4 */
+- { RCAR_GP_PIN(2, 31), PUPR4, 9 }, /* SSI_SCK5 */
+- { RCAR_GP_PIN(3, 0), PUPR4, 10 }, /* SSI_WS5 */
+- { RCAR_GP_PIN(3, 1), PUPR4, 11 }, /* SSI_SDATA5 */
+- { RCAR_GP_PIN(2, 28), PUPR4, 12 }, /* SSI_SCK6 */
+- { RCAR_GP_PIN(2, 29), PUPR4, 13 }, /* SSI_WS6 */
+- { RCAR_GP_PIN(2, 30), PUPR4, 14 }, /* SSI_SDATA6 */
+- { RCAR_GP_PIN(2, 24), PUPR4, 15 }, /* SSI_SCK78 */
+- { RCAR_GP_PIN(2, 25), PUPR4, 16 }, /* SSI_WS78 */
+- { RCAR_GP_PIN(2, 27), PUPR4, 17 }, /* SSI_SDATA7 */
+- { RCAR_GP_PIN(2, 26), PUPR4, 18 }, /* SSI_SDATA8 */
+- { RCAR_GP_PIN(3, 23), PUPR4, 19 }, /* TCLK0 */
+- { RCAR_GP_PIN(3, 11), PUPR4, 20 }, /* SD0_CLK */
+- { RCAR_GP_PIN(3, 12), PUPR4, 21 }, /* SD0_CMD */
+- { RCAR_GP_PIN(3, 13), PUPR4, 22 }, /* SD0_DAT0 */
+- { RCAR_GP_PIN(3, 14), PUPR4, 23 }, /* SD0_DAT1 */
+- { RCAR_GP_PIN(3, 15), PUPR4, 24 }, /* SD0_DAT2 */
+- { RCAR_GP_PIN(3, 16), PUPR4, 25 }, /* SD0_DAT3 */
+- { RCAR_GP_PIN(3, 17), PUPR4, 26 }, /* SD0_CD */
+- { RCAR_GP_PIN(3, 18), PUPR4, 27 }, /* SD0_WP */
+- { RCAR_GP_PIN(2, 22), PUPR4, 28 }, /* AUDIO_CLKA */
+- { RCAR_GP_PIN(2, 23), PUPR4, 29 }, /* AUDIO_CLKB */
+- { RCAR_GP_PIN(1, 14), PUPR4, 30 }, /* IRQ2 */
+- { RCAR_GP_PIN(1, 15), PUPR4, 31 }, /* IRQ3 */
+-
+- { RCAR_GP_PIN(0, 1), PUPR5, 0 }, /* PENC0 */
+- { RCAR_GP_PIN(0, 2), PUPR5, 1 }, /* PENC1 */
+- { RCAR_GP_PIN(0, 3), PUPR5, 2 }, /* USB_OVC0 */
+- { RCAR_GP_PIN(0, 4), PUPR5, 3 }, /* USB_OVC1 */
+- { RCAR_GP_PIN(1, 16), PUPR5, 4 }, /* SCIF_CLK */
+- { RCAR_GP_PIN(1, 17), PUPR5, 5 }, /* TX0 */
+- { RCAR_GP_PIN(1, 18), PUPR5, 6 }, /* RX0 */
+- { RCAR_GP_PIN(1, 19), PUPR5, 7 }, /* SCK0 */
+- { RCAR_GP_PIN(1, 20), PUPR5, 8 }, /* /CTS0 */
+- { RCAR_GP_PIN(1, 21), PUPR5, 9 }, /* /RTS0 */
+- { RCAR_GP_PIN(3, 19), PUPR5, 10 }, /* HSPI_CLK0 */
+- { RCAR_GP_PIN(3, 20), PUPR5, 11 }, /* /HSPI_CS0 */
+- { RCAR_GP_PIN(3, 21), PUPR5, 12 }, /* HSPI_RX0 */
+- { RCAR_GP_PIN(3, 22), PUPR5, 13 }, /* HSPI_TX0 */
+- { RCAR_GP_PIN(4, 20), PUPR5, 14 }, /* ETH_MAGIC */
+- { RCAR_GP_PIN(4, 25), PUPR5, 15 }, /* AVS1 */
+- { RCAR_GP_PIN(4, 26), PUPR5, 16 }, /* AVS2 */
++#define PIN_NONE U16_MAX
++
++static const struct pinmux_bias_reg pinmux_bias_regs[] = {
++ { PINMUX_BIAS_REG("PUPR0", 0x100, "N/A", 0) {
++ [ 0] = RCAR_GP_PIN(0, 6), /* A0 */
++ [ 1] = RCAR_GP_PIN(0, 7), /* A1 */
++ [ 2] = RCAR_GP_PIN(0, 8), /* A2 */
++ [ 3] = RCAR_GP_PIN(0, 9), /* A3 */
++ [ 4] = RCAR_GP_PIN(0, 10), /* A4 */
++ [ 5] = RCAR_GP_PIN(0, 11), /* A5 */
++ [ 6] = RCAR_GP_PIN(0, 12), /* A6 */
++ [ 7] = RCAR_GP_PIN(0, 13), /* A7 */
++ [ 8] = RCAR_GP_PIN(0, 14), /* A8 */
++ [ 9] = RCAR_GP_PIN(0, 15), /* A9 */
++ [10] = RCAR_GP_PIN(0, 16), /* A10 */
++ [11] = RCAR_GP_PIN(0, 17), /* A11 */
++ [12] = RCAR_GP_PIN(0, 18), /* A12 */
++ [13] = RCAR_GP_PIN(0, 19), /* A13 */
++ [14] = RCAR_GP_PIN(0, 20), /* A14 */
++ [15] = RCAR_GP_PIN(0, 21), /* A15 */
++ [16] = RCAR_GP_PIN(0, 22), /* A16 */
++ [17] = RCAR_GP_PIN(0, 23), /* A17 */
++ [18] = RCAR_GP_PIN(0, 24), /* A18 */
++ [19] = RCAR_GP_PIN(0, 25), /* A19 */
++ [20] = RCAR_GP_PIN(0, 26), /* A20 */
++ [21] = RCAR_GP_PIN(0, 27), /* A21 */
++ [22] = RCAR_GP_PIN(0, 28), /* A22 */
++ [23] = RCAR_GP_PIN(0, 29), /* A23 */
++ [24] = RCAR_GP_PIN(0, 30), /* A24 */
++ [25] = RCAR_GP_PIN(0, 31), /* A25 */
++ [26] = RCAR_GP_PIN(1, 3), /* /EX_CS0 */
++ [27] = RCAR_GP_PIN(1, 4), /* /EX_CS1 */
++ [28] = RCAR_GP_PIN(1, 5), /* /EX_CS2 */
++ [29] = RCAR_GP_PIN(1, 6), /* /EX_CS3 */
++ [30] = RCAR_GP_PIN(1, 7), /* /EX_CS4 */
++ [31] = RCAR_GP_PIN(1, 8), /* /EX_CS5 */
++ } },
++ { PINMUX_BIAS_REG("PUPR1", 0x104, "N/A", 0) {
++ [ 0] = RCAR_GP_PIN(0, 0), /* /PRESETOUT */
++ [ 1] = RCAR_GP_PIN(0, 5), /* /BS */
++ [ 2] = RCAR_GP_PIN(1, 0), /* RD//WR */
++ [ 3] = RCAR_GP_PIN(1, 1), /* /WE0 */
++ [ 4] = RCAR_GP_PIN(1, 2), /* /WE1 */
++ [ 5] = RCAR_GP_PIN(1, 11), /* EX_WAIT0 */
++ [ 6] = RCAR_GP_PIN(1, 9), /* DREQ0 */
++ [ 7] = RCAR_GP_PIN(1, 10), /* DACK0 */
++ [ 8] = RCAR_GP_PIN(1, 12), /* IRQ0 */
++ [ 9] = RCAR_GP_PIN(1, 13), /* IRQ1 */
++ [10] = PIN_NONE,
++ [11] = PIN_NONE,
++ [12] = PIN_NONE,
++ [13] = PIN_NONE,
++ [14] = PIN_NONE,
++ [15] = PIN_NONE,
++ [16] = PIN_NONE,
++ [17] = PIN_NONE,
++ [18] = PIN_NONE,
++ [19] = PIN_NONE,
++ [20] = PIN_NONE,
++ [21] = PIN_NONE,
++ [22] = PIN_NONE,
++ [23] = PIN_NONE,
++ [24] = PIN_NONE,
++ [25] = PIN_NONE,
++ [26] = PIN_NONE,
++ [27] = PIN_NONE,
++ [28] = PIN_NONE,
++ [29] = PIN_NONE,
++ [30] = PIN_NONE,
++ [31] = PIN_NONE,
++ } },
++ { PINMUX_BIAS_REG("PUPR2", 0x108, "N/A", 0) {
++ [ 0] = RCAR_GP_PIN(1, 22), /* DU0_DR0 */
++ [ 1] = RCAR_GP_PIN(1, 23), /* DU0_DR1 */
++ [ 2] = RCAR_GP_PIN(1, 24), /* DU0_DR2 */
++ [ 3] = RCAR_GP_PIN(1, 25), /* DU0_DR3 */
++ [ 4] = RCAR_GP_PIN(1, 26), /* DU0_DR4 */
++ [ 5] = RCAR_GP_PIN(1, 27), /* DU0_DR5 */
++ [ 6] = RCAR_GP_PIN(1, 28), /* DU0_DR6 */
++ [ 7] = RCAR_GP_PIN(1, 29), /* DU0_DR7 */
++ [ 8] = RCAR_GP_PIN(1, 30), /* DU0_DG0 */
++ [ 9] = RCAR_GP_PIN(1, 31), /* DU0_DG1 */
++ [10] = RCAR_GP_PIN(2, 0), /* DU0_DG2 */
++ [11] = RCAR_GP_PIN(2, 1), /* DU0_DG3 */
++ [12] = RCAR_GP_PIN(2, 2), /* DU0_DG4 */
++ [13] = RCAR_GP_PIN(2, 3), /* DU0_DG5 */
++ [14] = RCAR_GP_PIN(2, 4), /* DU0_DG6 */
++ [15] = RCAR_GP_PIN(2, 5), /* DU0_DG7 */
++ [16] = RCAR_GP_PIN(2, 6), /* DU0_DB0 */
++ [17] = RCAR_GP_PIN(2, 7), /* DU0_DB1 */
++ [18] = RCAR_GP_PIN(2, 8), /* DU0_DB2 */
++ [19] = RCAR_GP_PIN(2, 9), /* DU0_DB3 */
++ [20] = RCAR_GP_PIN(2, 10), /* DU0_DB4 */
++ [21] = RCAR_GP_PIN(2, 11), /* DU0_DB5 */
++ [22] = RCAR_GP_PIN(2, 12), /* DU0_DB6 */
++ [23] = RCAR_GP_PIN(2, 13), /* DU0_DB7 */
++ [24] = RCAR_GP_PIN(2, 14), /* DU0_DOTCLKIN */
++ [25] = RCAR_GP_PIN(2, 15), /* DU0_DOTCLKOUT0 */
++ [26] = RCAR_GP_PIN(2, 17), /* DU0_HSYNC */
++ [27] = RCAR_GP_PIN(2, 18), /* DU0_VSYNC */
++ [28] = RCAR_GP_PIN(2, 19), /* DU0_EXODDF */
++ [29] = RCAR_GP_PIN(2, 20), /* DU0_DISP */
++ [30] = RCAR_GP_PIN(2, 21), /* DU0_CDE */
++ [31] = RCAR_GP_PIN(2, 16), /* DU0_DOTCLKOUT1 */
++ } },
++ { PINMUX_BIAS_REG("PUPR3", 0x10c, "N/A", 0) {
++ [ 0] = RCAR_GP_PIN(3, 24), /* VI0_CLK */
++ [ 1] = RCAR_GP_PIN(3, 25), /* VI0_CLKENB */
++ [ 2] = RCAR_GP_PIN(3, 26), /* VI0_FIELD */
++ [ 3] = RCAR_GP_PIN(3, 27), /* /VI0_HSYNC */
++ [ 4] = RCAR_GP_PIN(3, 28), /* /VI0_VSYNC */
++ [ 5] = RCAR_GP_PIN(3, 29), /* VI0_DATA0 */
++ [ 6] = RCAR_GP_PIN(3, 30), /* VI0_DATA1 */
++ [ 7] = RCAR_GP_PIN(3, 31), /* VI0_DATA2 */
++ [ 8] = RCAR_GP_PIN(4, 0), /* VI0_DATA3 */
++ [ 9] = RCAR_GP_PIN(4, 1), /* VI0_DATA4 */
++ [10] = RCAR_GP_PIN(4, 2), /* VI0_DATA5 */
++ [11] = RCAR_GP_PIN(4, 3), /* VI0_DATA6 */
++ [12] = RCAR_GP_PIN(4, 4), /* VI0_DATA7 */
++ [13] = RCAR_GP_PIN(4, 5), /* VI0_G2 */
++ [14] = RCAR_GP_PIN(4, 6), /* VI0_G3 */
++ [15] = RCAR_GP_PIN(4, 7), /* VI0_G4 */
++ [16] = RCAR_GP_PIN(4, 8), /* VI0_G5 */
++ [17] = RCAR_GP_PIN(4, 21), /* VI1_DATA12 */
++ [18] = RCAR_GP_PIN(4, 22), /* VI1_DATA13 */
++ [19] = RCAR_GP_PIN(4, 23), /* VI1_DATA14 */
++ [20] = RCAR_GP_PIN(4, 24), /* VI1_DATA15 */
++ [21] = RCAR_GP_PIN(4, 9), /* ETH_REF_CLK */
++ [22] = RCAR_GP_PIN(4, 10), /* ETH_TXD0 */
++ [23] = RCAR_GP_PIN(4, 11), /* ETH_TXD1 */
++ [24] = RCAR_GP_PIN(4, 12), /* ETH_CRS_DV */
++ [25] = RCAR_GP_PIN(4, 13), /* ETH_TX_EN */
++ [26] = RCAR_GP_PIN(4, 14), /* ETH_RX_ER */
++ [27] = RCAR_GP_PIN(4, 15), /* ETH_RXD0 */
++ [28] = RCAR_GP_PIN(4, 16), /* ETH_RXD1 */
++ [29] = RCAR_GP_PIN(4, 17), /* ETH_MDC */
++ [30] = RCAR_GP_PIN(4, 18), /* ETH_MDIO */
++ [31] = RCAR_GP_PIN(4, 19), /* ETH_LINK */
++ } },
++ { PINMUX_BIAS_REG("PUPR4", 0x110, "N/A", 0) {
++ [ 0] = RCAR_GP_PIN(3, 6), /* SSI_SCK012 */
++ [ 1] = RCAR_GP_PIN(3, 7), /* SSI_WS012 */
++ [ 2] = RCAR_GP_PIN(3, 10), /* SSI_SDATA0 */
++ [ 3] = RCAR_GP_PIN(3, 9), /* SSI_SDATA1 */
++ [ 4] = RCAR_GP_PIN(3, 8), /* SSI_SDATA2 */
++ [ 5] = RCAR_GP_PIN(3, 2), /* SSI_SCK34 */
++ [ 6] = RCAR_GP_PIN(3, 3), /* SSI_WS34 */
++ [ 7] = RCAR_GP_PIN(3, 5), /* SSI_SDATA3 */
++ [ 8] = RCAR_GP_PIN(3, 4), /* SSI_SDATA4 */
++ [ 9] = RCAR_GP_PIN(2, 31), /* SSI_SCK5 */
++ [10] = RCAR_GP_PIN(3, 0), /* SSI_WS5 */
++ [11] = RCAR_GP_PIN(3, 1), /* SSI_SDATA5 */
++ [12] = RCAR_GP_PIN(2, 28), /* SSI_SCK6 */
++ [13] = RCAR_GP_PIN(2, 29), /* SSI_WS6 */
++ [14] = RCAR_GP_PIN(2, 30), /* SSI_SDATA6 */
++ [15] = RCAR_GP_PIN(2, 24), /* SSI_SCK78 */
++ [16] = RCAR_GP_PIN(2, 25), /* SSI_WS78 */
++ [17] = RCAR_GP_PIN(2, 27), /* SSI_SDATA7 */
++ [18] = RCAR_GP_PIN(2, 26), /* SSI_SDATA8 */
++ [19] = RCAR_GP_PIN(3, 23), /* TCLK0 */
++ [20] = RCAR_GP_PIN(3, 11), /* SD0_CLK */
++ [21] = RCAR_GP_PIN(3, 12), /* SD0_CMD */
++ [22] = RCAR_GP_PIN(3, 13), /* SD0_DAT0 */
++ [23] = RCAR_GP_PIN(3, 14), /* SD0_DAT1 */
++ [24] = RCAR_GP_PIN(3, 15), /* SD0_DAT2 */
++ [25] = RCAR_GP_PIN(3, 16), /* SD0_DAT3 */
++ [26] = RCAR_GP_PIN(3, 17), /* SD0_CD */
++ [27] = RCAR_GP_PIN(3, 18), /* SD0_WP */
++ [28] = RCAR_GP_PIN(2, 22), /* AUDIO_CLKA */
++ [29] = RCAR_GP_PIN(2, 23), /* AUDIO_CLKB */
++ [30] = RCAR_GP_PIN(1, 14), /* IRQ2 */
++ [31] = RCAR_GP_PIN(1, 15), /* IRQ3 */
++ } },
++ { PINMUX_BIAS_REG("PUPR5", 0x114, "N/A", 0) {
++ [ 0] = RCAR_GP_PIN(0, 1), /* PENC0 */
++ [ 1] = RCAR_GP_PIN(0, 2), /* PENC1 */
++ [ 2] = RCAR_GP_PIN(0, 3), /* USB_OVC0 */
++ [ 3] = RCAR_GP_PIN(0, 4), /* USB_OVC1 */
++ [ 4] = RCAR_GP_PIN(1, 16), /* SCIF_CLK */
++ [ 5] = RCAR_GP_PIN(1, 17), /* TX0 */
++ [ 6] = RCAR_GP_PIN(1, 18), /* RX0 */
++ [ 7] = RCAR_GP_PIN(1, 19), /* SCK0 */
++ [ 8] = RCAR_GP_PIN(1, 20), /* /CTS0 */
++ [ 9] = RCAR_GP_PIN(1, 21), /* /RTS0 */
++ [10] = RCAR_GP_PIN(3, 19), /* HSPI_CLK0 */
++ [11] = RCAR_GP_PIN(3, 20), /* /HSPI_CS0 */
++ [12] = RCAR_GP_PIN(3, 21), /* HSPI_RX0 */
++ [13] = RCAR_GP_PIN(3, 22), /* HSPI_TX0 */
++ [14] = RCAR_GP_PIN(4, 20), /* ETH_MAGIC */
++ [15] = RCAR_GP_PIN(4, 25), /* AVS1 */
++ [16] = RCAR_GP_PIN(4, 26), /* AVS2 */
++ [17] = PIN_NONE,
++ [18] = PIN_NONE,
++ [19] = PIN_NONE,
++ [20] = PIN_NONE,
++ [21] = PIN_NONE,
++ [22] = PIN_NONE,
++ [23] = PIN_NONE,
++ [24] = PIN_NONE,
++ [25] = PIN_NONE,
++ [26] = PIN_NONE,
++ [27] = PIN_NONE,
++ [28] = PIN_NONE,
++ [29] = PIN_NONE,
++ [30] = PIN_NONE,
++ [31] = PIN_NONE,
++ } },
++ { /* sentinel */ },
+ };
+
+ static unsigned int r8a7778_pinmux_get_bias(struct sh_pfc *pfc,
+ unsigned int pin)
+ {
+- const struct sh_pfc_bias_info *info;
++ const struct pinmux_bias_reg *reg;
+ void __iomem *addr;
++ unsigned int bit;
+
+- info = sh_pfc_pin_to_bias_info(bias_info, ARRAY_SIZE(bias_info), pin);
+- if (!info)
++ reg = sh_pfc_pin_to_bias_reg(pfc, pin, &bit);
++ if (!reg)
+ return PIN_CONFIG_BIAS_DISABLE;
+
+- addr = pfc->windows->virt + info->reg;
++ addr = pfc->windows->virt + reg->puen;
+
+- if (ioread32(addr) & BIT(info->bit))
++ if (ioread32(addr) & BIT(bit))
+ return PIN_CONFIG_BIAS_PULL_UP;
+ else
+ return PIN_CONFIG_BIAS_DISABLE;
+@@ -3103,21 +3144,20 @@ static unsigned int r8a7778_pinmux_get_bias(struct sh_pfc *pfc,
+ static void r8a7778_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
+ unsigned int bias)
+ {
+- const struct sh_pfc_bias_info *info;
++ const struct pinmux_bias_reg *reg;
+ void __iomem *addr;
++ unsigned int bit;
+ u32 value;
+- u32 bit;
+
+- info = sh_pfc_pin_to_bias_info(bias_info, ARRAY_SIZE(bias_info), pin);
+- if (!info)
++ reg = sh_pfc_pin_to_bias_reg(pfc, pin, &bit);
++ if (!reg)
+ return;
+
+- addr = pfc->windows->virt + info->reg;
+- bit = BIT(info->bit);
++ addr = pfc->windows->virt + reg->puen;
+
+- value = ioread32(addr) & ~bit;
++ value = ioread32(addr) & ~BIT(bit);
+ if (bias == PIN_CONFIG_BIAS_PULL_UP)
+- value |= bit;
++ value |= BIT(bit);
+ iowrite32(value, addr);
+ }
+
+@@ -3144,6 +3184,7 @@ const struct sh_pfc_soc_info r8a7778_pinmux_info = {
+ .nr_functions = ARRAY_SIZE(pinmux_functions),
+
+ .cfg_regs = pinmux_config_regs,
++ .bias_regs = pinmux_bias_regs,
+
+ .pinmux_data = pinmux_data,
+ .pinmux_data_size = ARRAY_SIZE(pinmux_data),
+--
+2.19.0
+
diff --git a/patches/0218-pinctrl-sh-pfc-Remove-obsolete-sh_pfc_pin_to_bias_in.patch b/patches/0218-pinctrl-sh-pfc-Remove-obsolete-sh_pfc_pin_to_bias_in.patch
new file mode 100644
index 0000000..a087304
--- /dev/null
+++ b/patches/0218-pinctrl-sh-pfc-Remove-obsolete-sh_pfc_pin_to_bias_in.patch
@@ -0,0 +1,81 @@
+From a6ad0cae8dff4147623ffea53e769b7de76305e2 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 29 Sep 2017 17:12:39 +0200
+Subject: [PATCH 0218/1795] pinctrl: sh-pfc: Remove obsolete
+ sh_pfc_pin_to_bias_info()
+
+All users of sh_pfc_pin_to_bias_info() and the related data structures
+have been converted to sh_pfc_pin_to_bias_reg(), so those can be
+removed.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+(cherry picked from commit 1860bb134fc29dee0aeb912ae20799119b920df9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/core.c | 15 ---------------
+ drivers/pinctrl/sh-pfc/core.h | 3 ---
+ drivers/pinctrl/sh-pfc/sh_pfc.h | 6 ------
+ 3 files changed, 24 deletions(-)
+
+diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
+index 01c408a3dee4..2fe5fd6c5d17 100644
+--- a/drivers/pinctrl/sh-pfc/core.c
++++ b/drivers/pinctrl/sh-pfc/core.c
+@@ -389,21 +389,6 @@ int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type)
+ return 0;
+ }
+
+-const struct sh_pfc_bias_info *
+-sh_pfc_pin_to_bias_info(const struct sh_pfc_bias_info *info,
+- unsigned int num, unsigned int pin)
+-{
+- unsigned int i;
+-
+- for (i = 0; i < num; i++)
+- if (info[i].pin == pin)
+- return &info[i];
+-
+- WARN_ONCE(1, "Pin %u is not in bias info list\n", pin);
+-
+- return NULL;
+-}
+-
+ const struct pinmux_bias_reg *
+ sh_pfc_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin,
+ unsigned int *bit)
+diff --git a/drivers/pinctrl/sh-pfc/core.h b/drivers/pinctrl/sh-pfc/core.h
+index 460d996513ac..5af8ee26c03e 100644
+--- a/drivers/pinctrl/sh-pfc/core.h
++++ b/drivers/pinctrl/sh-pfc/core.h
+@@ -32,9 +32,6 @@ void sh_pfc_write(struct sh_pfc *pfc, u32 reg, u32 data);
+ int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin);
+ int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type);
+
+-const struct sh_pfc_bias_info *
+-sh_pfc_pin_to_bias_info(const struct sh_pfc_bias_info *info,
+- unsigned int num, unsigned int pin);
+ const struct pinmux_bias_reg *
+ sh_pfc_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin,
+ unsigned int *bit);
+diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
+index 1914f4b5fef5..18fd87826629 100644
+--- a/drivers/pinctrl/sh-pfc/sh_pfc.h
++++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
+@@ -200,12 +200,6 @@ struct sh_pfc_window {
+ unsigned long size;
+ };
+
+-struct sh_pfc_bias_info {
+- u16 pin;
+- u16 reg : 11;
+- u16 bit : 5;
+-};
+-
+ struct sh_pfc_pin_range;
+
+ struct sh_pfc {
+--
+2.19.0
+
diff --git a/patches/0219-pinctrl-sh-pfc-Add-generic-IOCTRL-register-descripti.patch b/patches/0219-pinctrl-sh-pfc-Add-generic-IOCTRL-register-descripti.patch
new file mode 100644
index 0000000..4dbda13
--- /dev/null
+++ b/patches/0219-pinctrl-sh-pfc-Add-generic-IOCTRL-register-descripti.patch
@@ -0,0 +1,47 @@
+From 2a2278d75807c8374cb358073e0fc503d2a0d8d9 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 29 Sep 2017 14:16:31 +0200
+Subject: [PATCH 0219/1795] pinctrl: sh-pfc: Add generic IOCTRL register
+ description
+
+Add a generic way to describe IOCTRL registers (for e.g. SD I/O voltage
+and time delay control), like is already done for config, drive, and
+bias registers.
+
+This makes the sh-pfc core code aware of these registers, which will
+ease introducing suspend/resume support later.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 9e9bd06a353786ac3c01e76606e64aa660243aab)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/sh_pfc.h | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
+index 18fd87826629..b9bb56c91b6f 100644
+--- a/drivers/pinctrl/sh-pfc/sh_pfc.h
++++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
+@@ -159,6 +159,10 @@ struct pinmux_bias_reg {
+ .pud = r2, \
+ .pins =
+
++struct pinmux_ioctrl_reg {
++ u32 reg;
++};
++
+ struct pinmux_data_reg {
+ u32 reg;
+ u8 reg_width;
+@@ -251,6 +255,7 @@ struct sh_pfc_soc_info {
+ const struct pinmux_cfg_reg *cfg_regs;
+ const struct pinmux_drive_reg *drive_regs;
+ const struct pinmux_bias_reg *bias_regs;
++ const struct pinmux_ioctrl_reg *ioctrl_regs;
+ const struct pinmux_data_reg *data_regs;
+
+ const u16 *pinmux_data;
+--
+2.19.0
+
diff --git a/patches/0220-pinctrl-sh-pfc-r8a7795-es1-Use-generic-IOCTRL-regist.patch b/patches/0220-pinctrl-sh-pfc-r8a7795-es1-Use-generic-IOCTRL-regist.patch
new file mode 100644
index 0000000..dd742db
--- /dev/null
+++ b/patches/0220-pinctrl-sh-pfc-r8a7795-es1-Use-generic-IOCTRL-regist.patch
@@ -0,0 +1,56 @@
+From af0a61ea63d6523aec3578b626d9c83d846761f6 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 29 Sep 2017 14:14:56 +0200
+Subject: [PATCH 0220/1795] pinctrl: sh-pfc: r8a7795-es1: Use generic IOCTRL
+ register description
+
+Move R-Car H3 ES1.x I/O voltage support over to the generic way to
+describe IOCTRL registers, which will be needed for suspend/resume
+support.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 5d9d1d1ae512600bd1d050cc0a55235435fc3050)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c | 12 +++++++++++-
+ 1 file changed, 11 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
+index 8042c9331a51..292e35d4d2f4 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
+@@ -5423,12 +5423,21 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
+ { },
+ };
+
++enum ioctrl_regs {
++ POCCTRL,
++};
++
++static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
++ [POCCTRL] = { 0xe6060380, },
++ { /* sentinel */ },
++};
++
+ static int r8a7795es1_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin,
+ u32 *pocctrl)
+ {
+ int bit = -EINVAL;
+
+- *pocctrl = 0xe6060380;
++ *pocctrl = pinmux_ioctrl_regs[POCCTRL].reg;
+
+ if (pin >= RCAR_GP_PIN(3, 0) && pin <= RCAR_GP_PIN(3, 11))
+ bit = pin & 0x1f;
+@@ -5745,6 +5754,7 @@ const struct sh_pfc_soc_info r8a7795es1_pinmux_info = {
+ .cfg_regs = pinmux_config_regs,
+ .drive_regs = pinmux_drive_regs,
+ .bias_regs = pinmux_bias_regs,
++ .ioctrl_regs = pinmux_ioctrl_regs,
+
+ .pinmux_data = pinmux_data,
+ .pinmux_data_size = ARRAY_SIZE(pinmux_data),
+--
+2.19.0
+
diff --git a/patches/0221-pinctrl-sh-pfc-r8a7795-Use-generic-IOCTRL-register-d.patch b/patches/0221-pinctrl-sh-pfc-r8a7795-Use-generic-IOCTRL-register-d.patch
new file mode 100644
index 0000000..b9282f5
--- /dev/null
+++ b/patches/0221-pinctrl-sh-pfc-r8a7795-Use-generic-IOCTRL-register-d.patch
@@ -0,0 +1,55 @@
+From 023f553357c868d539615823f404d21afc97df53 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 29 Sep 2017 14:15:06 +0200
+Subject: [PATCH 0221/1795] pinctrl: sh-pfc: r8a7795: Use generic IOCTRL
+ register description
+
+Move R-Car H3 ES2.0 I/O voltage support over to the generic way to
+describe IOCTRL registers, which will be needed for suspend/resume
+support.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit e2aad8464c0bf183be64c2120a37e87790dba367)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 12 +++++++++++-
+ 1 file changed, 11 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+index 0a16dea0dace..d1cec6d12e81 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+@@ -5413,11 +5413,20 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
+ { },
+ };
+
++enum ioctrl_regs {
++ POCCTRL,
++};
++
++static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
++ [POCCTRL] = { 0xe6060380, },
++ { /* sentinel */ },
++};
++
+ static int r8a7795_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *pocctrl)
+ {
+ int bit = -EINVAL;
+
+- *pocctrl = 0xe6060380;
++ *pocctrl = pinmux_ioctrl_regs[POCCTRL].reg;
+
+ if (pin >= RCAR_GP_PIN(3, 0) && pin <= RCAR_GP_PIN(3, 11))
+ bit = pin & 0x1f;
+@@ -5748,6 +5757,7 @@ const struct sh_pfc_soc_info r8a7795_pinmux_info = {
+ .cfg_regs = pinmux_config_regs,
+ .drive_regs = pinmux_drive_regs,
+ .bias_regs = pinmux_bias_regs,
++ .ioctrl_regs = pinmux_ioctrl_regs,
+
+ .pinmux_data = pinmux_data,
+ .pinmux_data_size = ARRAY_SIZE(pinmux_data),
+--
+2.19.0
+
diff --git a/patches/0222-pinctrl-sh-pfc-r8a7796-Use-generic-IOCTRL-register-d.patch b/patches/0222-pinctrl-sh-pfc-r8a7796-Use-generic-IOCTRL-register-d.patch
new file mode 100644
index 0000000..8f1b26d
--- /dev/null
+++ b/patches/0222-pinctrl-sh-pfc-r8a7796-Use-generic-IOCTRL-register-d.patch
@@ -0,0 +1,54 @@
+From 37f4d24cd799739ea0b859214a0a96d3c1b7e69d Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 29 Sep 2017 14:15:17 +0200
+Subject: [PATCH 0222/1795] pinctrl: sh-pfc: r8a7796: Use generic IOCTRL
+ register description
+
+Move R-Car M3-W I/O voltage support over to the generic way to describe
+IOCTRL registers, which will be needed for suspend/resume support.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 3870a6f6ac255340767de64e71fbbfc54eb39403)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 12 +++++++++++-
+ 1 file changed, 11 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+index ebf38ea8abbe..d8dc984cde6d 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+@@ -5477,11 +5477,20 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
+ { },
+ };
+
++enum ioctrl_regs {
++ POCCTRL,
++};
++
++static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
++ [POCCTRL] = { 0xe6060380, },
++ { /* sentinel */ },
++};
++
+ static int r8a7796_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *pocctrl)
+ {
+ int bit = -EINVAL;
+
+- *pocctrl = 0xe6060380;
++ *pocctrl = pinmux_ioctrl_regs[POCCTRL].reg;
+
+ if (pin >= RCAR_GP_PIN(3, 0) && pin <= RCAR_GP_PIN(3, 11))
+ bit = pin & 0x1f;
+@@ -5798,6 +5807,7 @@ const struct sh_pfc_soc_info r8a7796_pinmux_info = {
+ .cfg_regs = pinmux_config_regs,
+ .drive_regs = pinmux_drive_regs,
+ .bias_regs = pinmux_bias_regs,
++ .ioctrl_regs = pinmux_ioctrl_regs,
+
+ .pinmux_data = pinmux_data,
+ .pinmux_data_size = ARRAY_SIZE(pinmux_data),
+--
+2.19.0
+
diff --git a/patches/0223-pinctrl-sh-pfc-Save-restore-registers-for-PSCI-syste.patch b/patches/0223-pinctrl-sh-pfc-Save-restore-registers-for-PSCI-syste.patch
new file mode 100644
index 0000000..f8a23f7
--- /dev/null
+++ b/patches/0223-pinctrl-sh-pfc-Save-restore-registers-for-PSCI-syste.patch
@@ -0,0 +1,174 @@
+From f25ccbb1aaa5adbb6bdc7b60d439b140822134b1 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 29 Sep 2017 14:17:18 +0200
+Subject: [PATCH 0223/1795] pinctrl: sh-pfc: Save/restore registers for PSCI
+ system suspend
+
+During PSCI system suspend, R-Car Gen3 SoCs are powered down, and their
+pinctrl register state is lost. Note that as the boot loader skips most
+initialization after system resume, pinctrl register state differs from
+the state encountered during normal system boot, too.
+
+To fix this, save all GPIO and peripheral function select, module
+select, drive strength control, bias, and other I/O control registers
+during system suspend, and restore them during system resume.
+
+Note that to avoid overhead on platforms not needing it, the
+suspend/resume code has a build time dependency on sleep and PSCI
+support, and a runtime dependency on PSCI.
+
+Inspired by a patch in the BSP by Hien Dang.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 8843797df383ac7ed7cf4f87cc18a4ec6d929b60)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/core.c | 97 +++++++++++++++++++++++++++++++++
+ drivers/pinctrl/sh-pfc/sh_pfc.h | 1 +
+ 2 files changed, 98 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
+index 2fe5fd6c5d17..cf4ae4bc9115 100644
+--- a/drivers/pinctrl/sh-pfc/core.c
++++ b/drivers/pinctrl/sh-pfc/core.c
+@@ -24,6 +24,7 @@
+ #include <linux/of_device.h>
+ #include <linux/pinctrl/machine.h>
+ #include <linux/platform_device.h>
++#include <linux/psci.h>
+ #include <linux/slab.h>
+
+ #include "core.h"
+@@ -572,6 +573,97 @@ static const struct of_device_id sh_pfc_of_table[] = {
+ };
+ #endif
+
++#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_ARM_PSCI_FW)
++static void sh_pfc_nop_reg(struct sh_pfc *pfc, u32 reg, unsigned int idx)
++{
++}
++
++static void sh_pfc_save_reg(struct sh_pfc *pfc, u32 reg, unsigned int idx)
++{
++ pfc->saved_regs[idx] = sh_pfc_read(pfc, reg);
++}
++
++static void sh_pfc_restore_reg(struct sh_pfc *pfc, u32 reg, unsigned int idx)
++{
++ sh_pfc_write(pfc, reg, pfc->saved_regs[idx]);
++}
++
++static unsigned int sh_pfc_walk_regs(struct sh_pfc *pfc,
++ void (*do_reg)(struct sh_pfc *pfc, u32 reg, unsigned int idx))
++{
++ unsigned int i, n = 0;
++
++ if (pfc->info->cfg_regs)
++ for (i = 0; pfc->info->cfg_regs[i].reg; i++)
++ do_reg(pfc, pfc->info->cfg_regs[i].reg, n++);
++
++ if (pfc->info->drive_regs)
++ for (i = 0; pfc->info->drive_regs[i].reg; i++)
++ do_reg(pfc, pfc->info->drive_regs[i].reg, n++);
++
++ if (pfc->info->bias_regs)
++ for (i = 0; pfc->info->bias_regs[i].puen; i++) {
++ do_reg(pfc, pfc->info->bias_regs[i].puen, n++);
++ if (pfc->info->bias_regs[i].pud)
++ do_reg(pfc, pfc->info->bias_regs[i].pud, n++);
++ }
++
++ if (pfc->info->ioctrl_regs)
++ for (i = 0; pfc->info->ioctrl_regs[i].reg; i++)
++ do_reg(pfc, pfc->info->ioctrl_regs[i].reg, n++);
++
++ return n;
++}
++
++static int sh_pfc_suspend_init(struct sh_pfc *pfc)
++{
++ unsigned int n;
++
++ /* This is the best we can do to check for the presence of PSCI */
++ if (!psci_ops.cpu_suspend)
++ return 0;
++
++ n = sh_pfc_walk_regs(pfc, sh_pfc_nop_reg);
++ if (!n)
++ return 0;
++
++ pfc->saved_regs = devm_kmalloc_array(pfc->dev, n,
++ sizeof(*pfc->saved_regs),
++ GFP_KERNEL);
++ if (!pfc->saved_regs)
++ return -ENOMEM;
++
++ dev_dbg(pfc->dev, "Allocated space to save %u regs\n", n);
++ return 0;
++}
++
++static int sh_pfc_suspend_noirq(struct device *dev)
++{
++ struct sh_pfc *pfc = dev_get_drvdata(dev);
++
++ if (pfc->saved_regs)
++ sh_pfc_walk_regs(pfc, sh_pfc_save_reg);
++ return 0;
++}
++
++static int sh_pfc_resume_noirq(struct device *dev)
++{
++ struct sh_pfc *pfc = dev_get_drvdata(dev);
++
++ if (pfc->saved_regs)
++ sh_pfc_walk_regs(pfc, sh_pfc_restore_reg);
++ return 0;
++}
++
++static const struct dev_pm_ops sh_pfc_pm = {
++ SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sh_pfc_suspend_noirq, sh_pfc_resume_noirq)
++};
++#define DEV_PM_OPS &sh_pfc_pm
++#else
++static int sh_pfc_suspend_init(struct sh_pfc *pfc) { return 0; }
++#define DEV_PM_OPS NULL
++#endif /* CONFIG_PM_SLEEP && CONFIG_ARM_PSCI_FW */
++
+ static int sh_pfc_probe(struct platform_device *pdev)
+ {
+ #ifdef CONFIG_OF
+@@ -610,6 +702,10 @@ static int sh_pfc_probe(struct platform_device *pdev)
+ info = pfc->info;
+ }
+
++ ret = sh_pfc_suspend_init(pfc);
++ if (ret)
++ return ret;
++
+ /* Enable dummy states for those platforms without pinctrl support */
+ if (!of_have_populated_dt())
+ pinctrl_provide_dummies();
+@@ -693,6 +789,7 @@ static struct platform_driver sh_pfc_driver = {
+ .driver = {
+ .name = DRV_NAME,
+ .of_match_table = of_match_ptr(sh_pfc_of_table),
++ .pm = DEV_PM_OPS,
+ },
+ };
+
+diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
+index b9bb56c91b6f..213108a058fe 100644
+--- a/drivers/pinctrl/sh-pfc/sh_pfc.h
++++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
+@@ -222,6 +222,7 @@ struct sh_pfc {
+ unsigned int nr_gpio_pins;
+
+ struct sh_pfc_chip *gpio;
++ u32 *saved_regs;
+ };
+
+ struct sh_pfc_soc_operations {
+--
+2.19.0
+
diff --git a/patches/0224-serial-sh-sci-Support-for-variable-HSCIF-hardware-RX.patch b/patches/0224-serial-sh-sci-Support-for-variable-HSCIF-hardware-RX.patch
new file mode 100644
index 0000000..61d4436
--- /dev/null
+++ b/patches/0224-serial-sh-sci-Support-for-variable-HSCIF-hardware-RX.patch
@@ -0,0 +1,181 @@
+From 315999a928cd1ceea3148a6e43c04c7c8a5b02ea Mon Sep 17 00:00:00 2001
+From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Date: Fri, 29 Sep 2017 15:08:53 +0200
+Subject: [PATCH 0224/1795] serial: sh-sci: Support for variable HSCIF hardware
+ RX timeout
+
+HSCIF has facilities that allow changing the timeout after which an RX
+interrupt is triggered even if the FIFO is not filled. This patch allows
+changing the default (15 bits of silence) using the existing sysfs
+attribute "rx_fifo_timeout".
+
+Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit fa2abb03637a55288b22082d3d679db4fe74112a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/tty/serial/sh-sci.c | 52 ++++++++++++++++++++++++++-----------
+ drivers/tty/serial/sh-sci.h | 3 +++
+ 2 files changed, 40 insertions(+), 15 deletions(-)
+
+diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
+index 5d33bc1a0e09..6c9f99e67c13 100644
+--- a/drivers/tty/serial/sh-sci.c
++++ b/drivers/tty/serial/sh-sci.c
+@@ -149,6 +149,7 @@ struct sci_port {
+ int rx_trigger;
+ struct timer_list rx_fifo_timer;
+ int rx_fifo_timeout;
++ u16 hscif_tot;
+
+ bool has_rtscts;
+ bool autorts;
+@@ -1106,8 +1107,14 @@ static ssize_t rx_fifo_timeout_show(struct device *dev,
+ {
+ struct uart_port *port = dev_get_drvdata(dev);
+ struct sci_port *sci = to_sci_port(port);
++ int v;
+
+- return sprintf(buf, "%d\n", sci->rx_fifo_timeout);
++ if (port->type == PORT_HSCIF)
++ v = sci->hscif_tot >> HSSCR_TOT_SHIFT;
++ else
++ v = sci->rx_fifo_timeout;
++
++ return sprintf(buf, "%d\n", v);
+ }
+
+ static ssize_t rx_fifo_timeout_store(struct device *dev,
+@@ -1123,11 +1130,19 @@ static ssize_t rx_fifo_timeout_store(struct device *dev,
+ ret = kstrtol(buf, 0, &r);
+ if (ret)
+ return ret;
+- sci->rx_fifo_timeout = r;
+- scif_set_rtrg(port, 1);
+- if (r > 0)
+- setup_timer(&sci->rx_fifo_timer, rx_fifo_timer_fn,
+- (unsigned long)sci);
++
++ if (port->type == PORT_HSCIF) {
++ if (r < 0 || r > 3)
++ return -EINVAL;
++ sci->hscif_tot = r << HSSCR_TOT_SHIFT;
++ } else {
++ sci->rx_fifo_timeout = r;
++ scif_set_rtrg(port, 1);
++ if (r > 0)
++ setup_timer(&sci->rx_fifo_timer, rx_fifo_timer_fn,
++ (unsigned long)sci);
++ }
++
+ return count;
+ }
+
+@@ -2044,9 +2059,13 @@ static void sci_shutdown(struct uart_port *port)
+ spin_lock_irqsave(&port->lock, flags);
+ sci_stop_rx(port);
+ sci_stop_tx(port);
+- /* Stop RX and TX, disable related interrupts, keep clock source */
++ /*
++ * Stop RX and TX, disable related interrupts, keep clock source
++ * and HSCIF TOT bits
++ */
+ scr = serial_port_in(port, SCSCR);
+- serial_port_out(port, SCSCR, scr & (SCSCR_CKE1 | SCSCR_CKE0));
++ serial_port_out(port, SCSCR, scr &
++ (SCSCR_CKE1 | SCSCR_CKE0 | s->hscif_tot));
+ spin_unlock_irqrestore(&port->lock, flags);
+
+ #ifdef CONFIG_SERIAL_SH_SCI_DMA
+@@ -2193,7 +2212,7 @@ static void sci_reset(struct uart_port *port)
+ unsigned int status;
+ struct sci_port *s = to_sci_port(port);
+
+- serial_port_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */
++ serial_port_out(port, SCSCR, s->hscif_tot); /* TE=0, RE=0, CKE1=0 */
+
+ reg = sci_getreg(port, SCFCR);
+ if (reg->size)
+@@ -2363,7 +2382,7 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
+ dev_dbg(port->dev,
+ "SCR 0x%x SMR 0x%x BRR %u CKS 0x%x DL %u SRR %u\n",
+ scr_val, smr_val, brr, sccks, dl, srr);
+- serial_port_out(port, SCSCR, scr_val);
++ serial_port_out(port, SCSCR, scr_val | s->hscif_tot);
+ serial_port_out(port, SCSMR, smr_val);
+ serial_port_out(port, SCBRR, brr);
+ if (sci_getreg(port, HSSRR)->size)
+@@ -2377,7 +2396,7 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
+ smr_val |= serial_port_in(port, SCSMR) &
+ (SCSMR_CKEDG | SCSMR_SRC_MASK | SCSMR_CKS);
+ dev_dbg(port->dev, "SCR 0x%x SMR 0x%x\n", scr_val, smr_val);
+- serial_port_out(port, SCSCR, scr_val);
++ serial_port_out(port, SCSCR, scr_val | s->hscif_tot);
+ serial_port_out(port, SCSMR, smr_val);
+ }
+
+@@ -2414,7 +2433,7 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
+ scr_val |= SCSCR_RE | SCSCR_TE |
+ (s->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0));
+ dev_dbg(port->dev, "SCSCR 0x%x\n", scr_val);
+- serial_port_out(port, SCSCR, scr_val);
++ serial_port_out(port, SCSCR, scr_val | s->hscif_tot);
+ if ((srr + 1 == 5) &&
+ (port->type == PORT_SCIFA || port->type == PORT_SCIFB)) {
+ /*
+@@ -2780,6 +2799,7 @@ static int sci_init_single(struct platform_device *dev,
+ }
+
+ sci_port->rx_fifo_timeout = 0;
++ sci_port->hscif_tot = 0;
+
+ /* SCIFA on sh7723 and sh7724 need a custom sampling rate that doesn't
+ * match the SoC datasheet, this should be investigated. Let platform
+@@ -2866,7 +2886,7 @@ static void serial_console_write(struct console *co, const char *s,
+ ctrl_temp = SCSCR_RE | SCSCR_TE |
+ (sci_port->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0)) |
+ (ctrl & (SCSCR_CKE1 | SCSCR_CKE0));
+- serial_port_out(port, SCSCR, ctrl_temp);
++ serial_port_out(port, SCSCR, ctrl_temp | sci_port->hscif_tot);
+
+ uart_console_write(port, s, count, serial_console_putchar);
+
+@@ -2993,7 +3013,8 @@ static int sci_remove(struct platform_device *dev)
+ sysfs_remove_file(&dev->dev.kobj,
+ &dev_attr_rx_fifo_trigger.attr);
+ }
+- if (port->port.type == PORT_SCIFA || port->port.type == PORT_SCIFB) {
++ if (port->port.type == PORT_SCIFA || port->port.type == PORT_SCIFB ||
++ port->port.type == PORT_HSCIF) {
+ sysfs_remove_file(&dev->dev.kobj,
+ &dev_attr_rx_fifo_timeout.attr);
+ }
+@@ -3182,7 +3203,8 @@ static int sci_probe(struct platform_device *dev)
+ if (ret)
+ return ret;
+ }
+- if (sp->port.type == PORT_SCIFA || sp->port.type == PORT_SCIFB) {
++ if (sp->port.type == PORT_SCIFA || sp->port.type == PORT_SCIFB ||
++ sp->port.type == PORT_HSCIF) {
+ ret = sysfs_create_file(&dev->dev.kobj,
+ &dev_attr_rx_fifo_timeout.attr);
+ if (ret) {
+diff --git a/drivers/tty/serial/sh-sci.h b/drivers/tty/serial/sh-sci.h
+index 938e23a2d166..a5f792fd48d9 100644
+--- a/drivers/tty/serial/sh-sci.h
++++ b/drivers/tty/serial/sh-sci.h
+@@ -63,6 +63,9 @@ enum {
+ #define SCSCR_TDRQE BIT(15) /* Tx Data Transfer Request Enable */
+ #define SCSCR_RDRQE BIT(14) /* Rx Data Transfer Request Enable */
+
++/* Serial Control Register, HSCIF-only bits */
++#define HSSCR_TOT_SHIFT 14
++
+ /* SCxSR (Serial Status Register) on SCI */
+ #define SCI_TDRE BIT(7) /* Transmit Data Register Empty */
+ #define SCI_RDRF BIT(6) /* Receive Data Register Full */
+--
+2.19.0
+
diff --git a/patches/0225-serial-sh-sci-Use-of_device_get_match_data-helper.patch b/patches/0225-serial-sh-sci-Use-of_device_get_match_data-helper.patch
new file mode 100644
index 0000000..201924a
--- /dev/null
+++ b/patches/0225-serial-sh-sci-Use-of_device_get_match_data-helper.patch
@@ -0,0 +1,65 @@
+From 91b4056ca5ae05b69c021e40c64c41cf3a085f73 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 4 Oct 2017 14:21:56 +0200
+Subject: [PATCH 0225/1795] serial: sh-sci: Use of_device_get_match_data()
+ helper
+
+Use the of_device_get_match_data() helper instead of open coding.
+Note that when used with DT, there's always a valid match.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 6e605a01501b20ba8ace196536899195c8d296f5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/tty/serial/sh-sci.c | 11 +++++------
+ 1 file changed, 5 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
+index 6c9f99e67c13..2ce33146928c 100644
+--- a/drivers/tty/serial/sh-sci.c
++++ b/drivers/tty/serial/sh-sci.c
+@@ -37,6 +37,7 @@
+ #include <linux/module.h>
+ #include <linux/mm.h>
+ #include <linux/of.h>
++#include <linux/of_device.h>
+ #include <linux/platform_device.h>
+ #include <linux/pm_runtime.h>
+ #include <linux/scatterlist.h>
+@@ -3070,17 +3071,15 @@ static struct plat_sci_port *sci_parse_dt(struct platform_device *pdev,
+ unsigned int *dev_id)
+ {
+ struct device_node *np = pdev->dev.of_node;
+- const struct of_device_id *match;
+ struct plat_sci_port *p;
+ struct sci_port *sp;
++ const void *data;
+ int id;
+
+ if (!IS_ENABLED(CONFIG_OF) || !np)
+ return NULL;
+
+- match = of_match_node(of_sci_match, np);
+- if (!match)
+- return NULL;
++ data = of_device_get_match_data(&pdev->dev);
+
+ p = devm_kzalloc(&pdev->dev, sizeof(struct plat_sci_port), GFP_KERNEL);
+ if (!p)
+@@ -3100,8 +3099,8 @@ static struct plat_sci_port *sci_parse_dt(struct platform_device *pdev,
+ sp = &sci_ports[id];
+ *dev_id = id;
+
+- p->type = SCI_OF_TYPE(match->data);
+- p->regtype = SCI_OF_REGTYPE(match->data);
++ p->type = SCI_OF_TYPE(data);
++ p->regtype = SCI_OF_REGTYPE(data);
+
+ sp->has_rtscts = of_property_read_bool(np, "uart-has-rtscts");
+
+--
+2.19.0
+
diff --git a/patches/0226-serial-sh-sci-Fix-init-data-attribute-for-struct-por.patch b/patches/0226-serial-sh-sci-Fix-init-data-attribute-for-struct-por.patch
new file mode 100644
index 0000000..80815e6
--- /dev/null
+++ b/patches/0226-serial-sh-sci-Fix-init-data-attribute-for-struct-por.patch
@@ -0,0 +1,41 @@
+From d9a67bba32c654ddb30d93a75a7aa0bd932ae5c5 Mon Sep 17 00:00:00 2001
+From: Matthias Kaehlcke <mka@chromium.org>
+Date: Mon, 9 Oct 2017 18:26:22 -0700
+Subject: [PATCH 0226/1795] serial: sh-sci: Fix init data attribute for struct
+ 'port_cfg'
+
+The __init attribute is meant to mark functions, use __initdata instead
+for the data structure.
+
+This fixes the following error when building with clang:
+
+drivers/tty/serial/sh-sci.c:3247:15: error: '__section__' attribute only
+ applies to functions, methods, properties, and global variables
+ static struct __init plat_sci_port port_cfg;
+
+Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
+Reviewed-by: Guenter Roeck <groeck@chromium.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit dd076cffb8cd675a8973fc9b6cea0c04be6f0111)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/tty/serial/sh-sci.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
+index 2ce33146928c..7a6b896a2324 100644
+--- a/drivers/tty/serial/sh-sci.c
++++ b/drivers/tty/serial/sh-sci.c
+@@ -3274,7 +3274,7 @@ early_platform_init_buffer("earlyprintk", &sci_driver,
+ early_serial_buf, ARRAY_SIZE(early_serial_buf));
+ #endif
+ #ifdef CONFIG_SERIAL_SH_SCI_EARLYCON
+-static struct __init plat_sci_port port_cfg;
++static struct plat_sci_port port_cfg __initdata;
+
+ static int __init early_console_setup(struct earlycon_device *device,
+ int type)
+--
+2.19.0
+
diff --git a/patches/0227-serial-sh-sci-Fix-unlocked-access-to-SCSCR-register.patch b/patches/0227-serial-sh-sci-Fix-unlocked-access-to-SCSCR-register.patch
new file mode 100644
index 0000000..a5df46b
--- /dev/null
+++ b/patches/0227-serial-sh-sci-Fix-unlocked-access-to-SCSCR-register.patch
@@ -0,0 +1,152 @@
+From a0ec1fcfd1a61b1e07e971941299db39889a7715 Mon Sep 17 00:00:00 2001
+From: Takatoshi Akiyama <takatoshi.akiyama.kj@ps.hitachi-solutions.com>
+Date: Thu, 2 Nov 2017 11:14:55 +0100
+Subject: [PATCH 0227/1795] serial: sh-sci: Fix unlocked access to SCSCR
+ register
+
+The SCSCR register access in sci_break_ctl() is not locked.
+
+sci_start_tx() and sci_set_termios() changes the SCSCR register,
+but does not lock sci_port.
+
+Therefore, this patch adds lock during register access.
+
+Also, remove the log output that leads to a double lock.
+
+Some analysis of where locks are not taken is as follows.
+It appears that the lock is not taken in:
+ - sci_start_tx(), sci_stop_tx() as this is installed as a callback.
+ And all callers of the callback take the lock.
+ - start_rx as callers take the lock.
+ - stop_rx. this is both installed as a callback and called directly.
+ In both cases the caller takes the lock.
+
+Signed-off-by: Takatoshi Akiyama <takatoshi.akiyama.kj@ps.hitachi-solutions.com>
+Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 1be2266392196de82d1cfcc8a68e770cf8f48c60)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/tty/serial/sh-sci.c | 25 ++++++++++++++++---------
+ 1 file changed, 16 insertions(+), 9 deletions(-)
+
+diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
+index 7a6b896a2324..78f862df4f6e 100644
+--- a/drivers/tty/serial/sh-sci.c
++++ b/drivers/tty/serial/sh-sci.c
+@@ -1225,8 +1225,11 @@ static void sci_rx_dma_release(struct sci_port *s, bool enable_pio)
+ dma_free_coherent(chan->device->dev, s->buf_len_rx * 2, s->rx_buf[0],
+ sg_dma_address(&s->sg_rx[0]));
+ dma_release_channel(chan);
+- if (enable_pio)
++ if (enable_pio) {
++ spin_lock_irqsave(&port->lock, flags);
+ sci_start_rx(port);
++ spin_unlock_irqrestore(&port->lock, flags);
++ }
+ }
+
+ static void sci_dma_rx_complete(void *arg)
+@@ -1293,8 +1296,11 @@ static void sci_tx_dma_release(struct sci_port *s, bool enable_pio)
+ dma_unmap_single(chan->device->dev, s->tx_dma_addr, UART_XMIT_SIZE,
+ DMA_TO_DEVICE);
+ dma_release_channel(chan);
+- if (enable_pio)
++ if (enable_pio) {
++ spin_lock_irqsave(&port->lock, flags);
+ sci_start_tx(port);
++ spin_unlock_irqrestore(&port->lock, flags);
++ }
+ }
+
+ static void sci_submit_rx(struct sci_port *s)
+@@ -2003,6 +2009,7 @@ static void sci_enable_ms(struct uart_port *port)
+ static void sci_break_ctl(struct uart_port *port, int break_state)
+ {
+ unsigned short scscr, scsptr;
++ unsigned long flags;
+
+ /* check wheter the port has SCSPTR */
+ if (!sci_getreg(port, SCSPTR)->size) {
+@@ -2013,6 +2020,7 @@ static void sci_break_ctl(struct uart_port *port, int break_state)
+ return;
+ }
+
++ spin_lock_irqsave(&port->lock, flags);
+ scsptr = serial_port_in(port, SCSPTR);
+ scscr = serial_port_in(port, SCSCR);
+
+@@ -2026,6 +2034,7 @@ static void sci_break_ctl(struct uart_port *port, int break_state)
+
+ serial_port_out(port, SCSPTR, scsptr);
+ serial_port_out(port, SCSCR, scscr);
++ spin_unlock_irqrestore(&port->lock, flags);
+ }
+
+ static int sci_startup(struct uart_port *port)
+@@ -2254,6 +2263,7 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
+ int min_err = INT_MAX, err;
+ unsigned long max_freq = 0;
+ int best_clk = -1;
++ unsigned long flags;
+
+ if ((termios->c_cflag & CSIZE) == CS7)
+ smr_val |= SCSMR_CHR;
+@@ -2363,6 +2373,8 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
+ serial_port_out(port, SCCKS, sccks);
+ }
+
++ spin_lock_irqsave(&port->lock, flags);
++
+ sci_reset(port);
+
+ uart_update_timeout(port, termios->c_cflag, baud);
+@@ -2380,9 +2392,6 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
+ case 27: smr_val |= SCSMR_SRC_27; break;
+ }
+ smr_val |= cks;
+- dev_dbg(port->dev,
+- "SCR 0x%x SMR 0x%x BRR %u CKS 0x%x DL %u SRR %u\n",
+- scr_val, smr_val, brr, sccks, dl, srr);
+ serial_port_out(port, SCSCR, scr_val | s->hscif_tot);
+ serial_port_out(port, SCSMR, smr_val);
+ serial_port_out(port, SCBRR, brr);
+@@ -2396,7 +2405,6 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
+ scr_val = s->cfg->scscr & (SCSCR_CKE1 | SCSCR_CKE0);
+ smr_val |= serial_port_in(port, SCSMR) &
+ (SCSMR_CKEDG | SCSMR_SRC_MASK | SCSMR_CKS);
+- dev_dbg(port->dev, "SCR 0x%x SMR 0x%x\n", scr_val, smr_val);
+ serial_port_out(port, SCSCR, scr_val | s->hscif_tot);
+ serial_port_out(port, SCSMR, smr_val);
+ }
+@@ -2433,7 +2441,6 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
+
+ scr_val |= SCSCR_RE | SCSCR_TE |
+ (s->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0));
+- dev_dbg(port->dev, "SCSCR 0x%x\n", scr_val);
+ serial_port_out(port, SCSCR, scr_val | s->hscif_tot);
+ if ((srr + 1 == 5) &&
+ (port->type == PORT_SCIFA || port->type == PORT_SCIFB)) {
+@@ -2480,8 +2487,6 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
+ s->rx_frame = (100 * bits * HZ) / (baud / 10);
+ #ifdef CONFIG_SERIAL_SH_SCI_DMA
+ s->rx_timeout = DIV_ROUND_UP(s->buf_len_rx * 2 * s->rx_frame, 1000);
+- dev_dbg(port->dev, "DMA Rx t-out %ums, tty t-out %u jiffies\n",
+- s->rx_timeout * 1000 / HZ, port->timeout);
+ if (s->rx_timeout < msecs_to_jiffies(20))
+ s->rx_timeout = msecs_to_jiffies(20);
+ #endif
+@@ -2489,6 +2494,8 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
+ if ((termios->c_cflag & CREAD) != 0)
+ sci_start_rx(port);
+
++ spin_unlock_irqrestore(&port->lock, flags);
++
+ sci_port_disable(s);
+
+ if (UART_ENABLE_MS(port, termios->c_cflag))
+--
+2.19.0
+
diff --git a/patches/0228-Input-st1232-remove-obsolete-platform-device-support.patch b/patches/0228-Input-st1232-remove-obsolete-platform-device-support.patch
new file mode 100644
index 0000000..a495a6b
--- /dev/null
+++ b/patches/0228-Input-st1232-remove-obsolete-platform-device-support.patch
@@ -0,0 +1,106 @@
+From abf37b18d56babeae031e39766b7bd7e8119b0be Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Tue, 31 Oct 2017 09:47:28 -0700
+Subject: [PATCH 0228/1795] Input: st1232 - remove obsolete platform device
+ support
+
+Commit 1fa59bda21c7fa36 ("ARM: shmobile: Remove legacy board code for
+Armadillo-800 EVA"), removed the last user of st1232_pdata and the
+"st1232-ts" platform device. All remaining users use DT.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
+(cherry picked from commit 4a1a57df97636b9323c4221cc75a35694b6d34c7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/input/touchscreen/st1232.c | 16 +++-------------
+ include/linux/platform_data/st1232_pdata.h | 14 --------------
+ 2 files changed, 3 insertions(+), 27 deletions(-)
+ delete mode 100644 include/linux/platform_data/st1232_pdata.h
+
+diff --git a/drivers/input/touchscreen/st1232.c b/drivers/input/touchscreen/st1232.c
+index be5615c6bf8f..d5dfa4053bbf 100644
+--- a/drivers/input/touchscreen/st1232.c
++++ b/drivers/input/touchscreen/st1232.c
+@@ -29,7 +29,6 @@
+ #include <linux/pm_qos.h>
+ #include <linux/slab.h>
+ #include <linux/types.h>
+-#include <linux/platform_data/st1232_pdata.h>
+
+ #define ST1232_TS_NAME "st1232-ts"
+
+@@ -152,10 +151,9 @@ static void st1232_ts_power(struct st1232_ts_data *ts, bool poweron)
+ }
+
+ static int st1232_ts_probe(struct i2c_client *client,
+- const struct i2c_device_id *id)
++ const struct i2c_device_id *id)
+ {
+ struct st1232_ts_data *ts;
+- struct st1232_pdata *pdata = dev_get_platdata(&client->dev);
+ struct input_dev *input_dev;
+ int error;
+
+@@ -180,13 +178,7 @@ static int st1232_ts_probe(struct i2c_client *client,
+ ts->client = client;
+ ts->input_dev = input_dev;
+
+- if (pdata)
+- ts->reset_gpio = pdata->reset_gpio;
+- else if (client->dev.of_node)
+- ts->reset_gpio = of_get_gpio(client->dev.of_node, 0);
+- else
+- ts->reset_gpio = -ENODEV;
+-
++ ts->reset_gpio = of_get_gpio(client->dev.of_node, 0);
+ if (gpio_is_valid(ts->reset_gpio)) {
+ error = devm_gpio_request(&client->dev, ts->reset_gpio, NULL);
+ if (error) {
+@@ -281,13 +273,11 @@ static const struct i2c_device_id st1232_ts_id[] = {
+ };
+ MODULE_DEVICE_TABLE(i2c, st1232_ts_id);
+
+-#ifdef CONFIG_OF
+ static const struct of_device_id st1232_ts_dt_ids[] = {
+ { .compatible = "sitronix,st1232", },
+ { }
+ };
+ MODULE_DEVICE_TABLE(of, st1232_ts_dt_ids);
+-#endif
+
+ static struct i2c_driver st1232_ts_driver = {
+ .probe = st1232_ts_probe,
+@@ -295,7 +285,7 @@ static struct i2c_driver st1232_ts_driver = {
+ .id_table = st1232_ts_id,
+ .driver = {
+ .name = ST1232_TS_NAME,
+- .of_match_table = of_match_ptr(st1232_ts_dt_ids),
++ .of_match_table = st1232_ts_dt_ids,
+ .pm = &st1232_ts_pm_ops,
+ },
+ };
+diff --git a/include/linux/platform_data/st1232_pdata.h b/include/linux/platform_data/st1232_pdata.h
+deleted file mode 100644
+index 1dcd23bee24e..000000000000
+--- a/include/linux/platform_data/st1232_pdata.h
++++ /dev/null
+@@ -1,14 +0,0 @@
+-/* SPDX-License-Identifier: GPL-2.0 */
+-#ifndef _LINUX_ST1232_PDATA_H
+-#define _LINUX_ST1232_PDATA_H
+-
+-/*
+- * Optional platform data
+- *
+- * Use this if you want the driver to drive the reset pin.
+- */
+-struct st1232_pdata {
+- int reset_gpio;
+-};
+-
+-#endif
+--
+2.19.0
+
diff --git a/patches/0229-usb-gadget-udc-renesas_usb3-move-pm_runtime_-en-dis-.patch b/patches/0229-usb-gadget-udc-renesas_usb3-move-pm_runtime_-en-dis-.patch
new file mode 100644
index 0000000..47752e7
--- /dev/null
+++ b/patches/0229-usb-gadget-udc-renesas_usb3-move-pm_runtime_-en-dis-.patch
@@ -0,0 +1,61 @@
+From e47755f19d73ee0f9b76b6aab46148b36eaf947e Mon Sep 17 00:00:00 2001
+From: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
+Date: Fri, 29 Sep 2017 20:44:59 +0900
+Subject: [PATCH 0229/1795] usb: gadget: udc: renesas_usb3: move
+ pm_runtime_{en,dis}able()
+
+This patch moves pm_runtime_{en,dis}able() call timing to
+renesas_usb3_{probe,remove}() for supporting PM_SLEEP feature in
+the future.
+
+Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
+[shimoda: Revise the commit log]
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
+
+(cherry picked from commit cf06df3fae286b795c1abf59c4b493ebf30a7a9f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/usb/gadget/udc/renesas_usb3.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/usb/gadget/udc/renesas_usb3.c b/drivers/usb/gadget/udc/renesas_usb3.c
+index 8de7d72b130b..3f662e524300 100644
+--- a/drivers/usb/gadget/udc/renesas_usb3.c
++++ b/drivers/usb/gadget/udc/renesas_usb3.c
+@@ -2247,7 +2247,6 @@ static int renesas_usb3_start(struct usb_gadget *gadget,
+ /* hook up the driver */
+ usb3->driver = driver;
+
+- pm_runtime_enable(usb3_to_dev(usb3));
+ pm_runtime_get_sync(usb3_to_dev(usb3));
+
+ renesas_usb3_init_controller(usb3);
+@@ -2265,7 +2264,6 @@ static int renesas_usb3_stop(struct usb_gadget *gadget)
+ renesas_usb3_stop_controller(usb3);
+
+ pm_runtime_put(usb3_to_dev(usb3));
+- pm_runtime_disable(usb3_to_dev(usb3));
+
+ return 0;
+ }
+@@ -2418,6 +2416,7 @@ static int renesas_usb3_remove(struct platform_device *pdev)
+ renesas_usb3_dma_free_prd(usb3, &pdev->dev);
+
+ __renesas_usb3_ep_free_request(usb3->ep0_req);
++ pm_runtime_disable(usb3_to_dev(usb3));
+
+ return 0;
+ }
+@@ -2653,6 +2652,7 @@ static int renesas_usb3_probe(struct platform_device *pdev)
+ renesas_usb3_debugfs_init(usb3, &pdev->dev);
+
+ dev_info(&pdev->dev, "probed\n");
++ pm_runtime_enable(usb3_to_dev(usb3));
+
+ return 0;
+
+--
+2.19.0
+
diff --git a/patches/0230-usb-gadget-udc-renesas_usb3-Add-suspend-resume-funct.patch b/patches/0230-usb-gadget-udc-renesas_usb3-Add-suspend-resume-funct.patch
new file mode 100644
index 0000000..58a3f9e
--- /dev/null
+++ b/patches/0230-usb-gadget-udc-renesas_usb3-Add-suspend-resume-funct.patch
@@ -0,0 +1,73 @@
+From 4a8fe03b5d9996f0223676cb95584dcb72239152 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Fri, 29 Sep 2017 20:45:00 +0900
+Subject: [PATCH 0230/1795] usb: gadget: udc: renesas_usb3: Add suspend/resume
+ functions
+
+This patch adds support suspend/resume functions
+
+Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
+[shimoda: add the commit log]
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
+
+(cherry picked from commit 90d588642a7ff598533f68c2f56ee64657a40186)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/usb/gadget/udc/renesas_usb3.c | 34 +++++++++++++++++++++++++++
+ 1 file changed, 34 insertions(+)
+
+diff --git a/drivers/usb/gadget/udc/renesas_usb3.c b/drivers/usb/gadget/udc/renesas_usb3.c
+index 3f662e524300..3368cb1ac51c 100644
+--- a/drivers/usb/gadget/udc/renesas_usb3.c
++++ b/drivers/usb/gadget/udc/renesas_usb3.c
+@@ -2668,11 +2668,45 @@ static int renesas_usb3_probe(struct platform_device *pdev)
+ return ret;
+ }
+
++#ifdef CONFIG_PM_SLEEP
++static int renesas_usb3_suspend(struct device *dev)
++{
++ struct renesas_usb3 *usb3 = dev_get_drvdata(dev);
++
++ /* Not started */
++ if (!usb3->driver)
++ return 0;
++
++ renesas_usb3_stop_controller(usb3);
++ pm_runtime_put(dev);
++
++ return 0;
++}
++
++static int renesas_usb3_resume(struct device *dev)
++{
++ struct renesas_usb3 *usb3 = dev_get_drvdata(dev);
++
++ /* Not started */
++ if (!usb3->driver)
++ return 0;
++
++ pm_runtime_get_sync(dev);
++ renesas_usb3_init_controller(usb3);
++
++ return 0;
++}
++#endif
++
++static SIMPLE_DEV_PM_OPS(renesas_usb3_pm_ops, renesas_usb3_suspend,
++ renesas_usb3_resume);
++
+ static struct platform_driver renesas_usb3_driver = {
+ .probe = renesas_usb3_probe,
+ .remove = renesas_usb3_remove,
+ .driver = {
+ .name = (char *)udc_name,
++ .pm = &renesas_usb3_pm_ops,
+ .of_match_table = of_match_ptr(usb3_of_match),
+ },
+ };
+--
+2.19.0
+
diff --git a/patches/0231-usb-gadget-udc-renesas_usb3-add-support-for-generic-.patch b/patches/0231-usb-gadget-udc-renesas_usb3-add-support-for-generic-.patch
new file mode 100644
index 0000000..57b060d
--- /dev/null
+++ b/patches/0231-usb-gadget-udc-renesas_usb3-add-support-for-generic-.patch
@@ -0,0 +1,139 @@
+From 7fc5a807ad121c4c9eb52c022037f1df5ad8a442 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Fri, 29 Sep 2017 20:45:01 +0900
+Subject: [PATCH 0231/1795] usb: gadget: udc: renesas_usb3: add support for
+ generic phy
+
+This patch adds support for generic phy as an optional. If you want
+to use a generic phy (e.g. phy-rcar-gen3-usb3 driver) on this driver,
+you have to do "insmod phy-rcar-gen3-usb3.ko" first for now.
+
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
+(cherry picked from commit 279d4bc6406022461713cd6a3e5411336d2ff26b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+
+ Conflicts:
+ drivers/usb/gadget/udc/renesas_usb3.c
+---
+ .../devicetree/bindings/usb/renesas_usb3.txt | 4 +++
+ drivers/usb/gadget/udc/renesas_usb3.c | 26 +++++++++++++++++--
+ 2 files changed, 28 insertions(+), 2 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/usb/renesas_usb3.txt b/Documentation/devicetree/bindings/usb/renesas_usb3.txt
+index e28025883b79..87a45e2f9b7f 100644
+--- a/Documentation/devicetree/bindings/usb/renesas_usb3.txt
++++ b/Documentation/devicetree/bindings/usb/renesas_usb3.txt
+@@ -15,6 +15,10 @@ Required properties:
+ - interrupts: Interrupt specifier for the USB3.0 Peripheral
+ - clocks: clock phandle and specifier pair
+
++Optional properties:
++ - phys: phandle + phy specifier pair
++ - phy-names: must be "usb"
++
+ Example of R-Car H3 ES1.x:
+ usb3_peri0: usb@ee020000 {
+ compatible = "renesas,r8a7795-usb3-peri",
+diff --git a/drivers/usb/gadget/udc/renesas_usb3.c b/drivers/usb/gadget/udc/renesas_usb3.c
+index 3368cb1ac51c..ef833f5c2523 100644
+--- a/drivers/usb/gadget/udc/renesas_usb3.c
++++ b/drivers/usb/gadget/udc/renesas_usb3.c
+@@ -1,7 +1,7 @@
+ /*
+ * Renesas USB3.0 Peripheral driver (USB gadget)
+ *
+- * Copyright (C) 2015 Renesas Electronics Corporation
++ * Copyright (C) 2015-2017 Renesas Electronics Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+@@ -17,6 +17,7 @@
+ #include <linux/io.h>
+ #include <linux/module.h>
+ #include <linux/of_device.h>
++#include <linux/phy/phy.h>
+ #include <linux/platform_device.h>
+ #include <linux/pm_runtime.h>
+ #include <linux/sizes.h>
+@@ -334,6 +335,7 @@ struct renesas_usb3 {
+ struct usb_gadget_driver *driver;
+ struct extcon_dev *extcon;
+ struct work_struct extcon_work;
++ struct phy *phy;
+ struct dentry *dentry;
+
+ struct renesas_usb3_ep *usb3_ep;
+@@ -2247,6 +2249,9 @@ static int renesas_usb3_start(struct usb_gadget *gadget,
+ /* hook up the driver */
+ usb3->driver = driver;
+
++ if (usb3->phy)
++ phy_init(usb3->phy);
++
+ pm_runtime_get_sync(usb3_to_dev(usb3));
+
+ renesas_usb3_init_controller(usb3);
+@@ -2263,6 +2268,9 @@ static int renesas_usb3_stop(struct usb_gadget *gadget)
+ usb3->driver = NULL;
+ renesas_usb3_stop_controller(usb3);
+
++ if (usb3->phy)
++ phy_exit(usb3->phy);
++
+ pm_runtime_put(usb3_to_dev(usb3));
+
+ return 0;
+@@ -2416,6 +2424,8 @@ static int renesas_usb3_remove(struct platform_device *pdev)
+ renesas_usb3_dma_free_prd(usb3, &pdev->dev);
+
+ __renesas_usb3_ep_free_request(usb3->ep0_req);
++ if (usb3->phy)
++ phy_put(usb3->phy);
+ pm_runtime_disable(usb3_to_dev(usb3));
+
+ return 0;
+@@ -2647,11 +2657,19 @@ static int renesas_usb3_probe(struct platform_device *pdev)
+ if (ret < 0)
+ goto err_dev_create;
+
++ /*
++ * This is an optional. So, if this driver cannot get a phy,
++ * this driver will not handle a phy anymore.
++ */
++ usb3->phy = devm_phy_get(&pdev->dev, "usb");
++ if (IS_ERR(usb3->phy))
++ usb3->phy = NULL;
++
+ usb3->workaround_for_vbus = priv->workaround_for_vbus;
+
+ renesas_usb3_debugfs_init(usb3, &pdev->dev);
+
+- dev_info(&pdev->dev, "probed\n");
++ dev_info(&pdev->dev, "probed%s\n", usb3->phy ? " with phy" : "");
+ pm_runtime_enable(usb3_to_dev(usb3));
+
+ return 0;
+@@ -2678,6 +2696,8 @@ static int renesas_usb3_suspend(struct device *dev)
+ return 0;
+
+ renesas_usb3_stop_controller(usb3);
++ if (usb3->phy)
++ phy_exit(usb3->phy);
+ pm_runtime_put(dev);
+
+ return 0;
+@@ -2691,6 +2711,8 @@ static int renesas_usb3_resume(struct device *dev)
+ if (!usb3->driver)
+ return 0;
+
++ if (usb3->phy)
++ phy_init(usb3->phy);
+ pm_runtime_get_sync(dev);
+ renesas_usb3_init_controller(usb3);
+
+--
+2.19.0
+
diff --git a/patches/0232-usb-gadget-udc-renesas_usb3-Use-of_device_get_match_.patch b/patches/0232-usb-gadget-udc-renesas_usb3-Use-of_device_get_match_.patch
new file mode 100644
index 0000000..4e893f8
--- /dev/null
+++ b/patches/0232-usb-gadget-udc-renesas_usb3-Use-of_device_get_match_.patch
@@ -0,0 +1,51 @@
+From aa05d4b8bc56911dd2ac9793871436e2f6f9792a Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 4 Oct 2017 14:23:31 +0200
+Subject: [PATCH 0232/1795] usb: gadget: udc: renesas_usb3: Use
+ of_device_get_match_data() helper
+
+Use the of_device_get_match_data() helper instead of open coding,
+postponing the matching until when it's really needed.
+Note that the renesas_usb3 driver is used with DT only, so there's
+always a valid match.
+
+Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
+(cherry picked from commit ca02a5af650cf3addb004196c2ab713b020445ef)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/usb/gadget/udc/renesas_usb3.c | 7 +------
+ 1 file changed, 1 insertion(+), 6 deletions(-)
+
+diff --git a/drivers/usb/gadget/udc/renesas_usb3.c b/drivers/usb/gadget/udc/renesas_usb3.c
+index ef833f5c2523..0a74919bd754 100644
+--- a/drivers/usb/gadget/udc/renesas_usb3.c
++++ b/drivers/usb/gadget/udc/renesas_usb3.c
+@@ -2582,20 +2582,15 @@ static int renesas_usb3_probe(struct platform_device *pdev)
+ {
+ struct renesas_usb3 *usb3;
+ struct resource *res;
+- const struct of_device_id *match;
+ int irq, ret;
+ const struct renesas_usb3_priv *priv;
+ const struct soc_device_attribute *attr;
+
+- match = of_match_node(usb3_of_match, pdev->dev.of_node);
+- if (!match)
+- return -ENODEV;
+-
+ attr = soc_device_match(renesas_usb3_quirks_match);
+ if (attr)
+ priv = attr->data;
+ else
+- priv = match->data;
++ priv = of_device_get_match_data(&pdev->dev);
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0) {
+--
+2.19.0
+
diff --git a/patches/0233-usb-gadget-udc-renesas_usb3-make-const-array-max_pac.patch b/patches/0233-usb-gadget-udc-renesas_usb3-make-const-array-max_pac.patch
new file mode 100644
index 0000000..0b1f67c
--- /dev/null
+++ b/patches/0233-usb-gadget-udc-renesas_usb3-make-const-array-max_pac.patch
@@ -0,0 +1,44 @@
+From 9f7c4bf1285af7b5ed33355cf03b9c58d3404c2e Mon Sep 17 00:00:00 2001
+From: Colin Ian King <colin.king@canonical.com>
+Date: Thu, 2 Nov 2017 15:53:25 +0000
+Subject: [PATCH 0233/1795] usb: gadget: udc: renesas_usb3: make const array
+ max_packet_array static
+
+Don't populate the const array max_packet_array on the stack, instead make
+it static. Makes the object code smaller by over 90 bytes:
+
+Before:
+ text data bss dec hex filename
+ 34337 5612 128 40077 9c8d renesas_usb3.o
+
+After:
+ text data bss dec hex filename
+ 34149 5708 128 39985 9c31 renesas_usb3.o
+
+(gcc version 7.2.0 x86_64)
+
+Signed-off-by: Colin Ian King <colin.king@canonical.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 8af620f06f015eb9e9062f6398204ee011b5ef22)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/usb/gadget/udc/renesas_usb3.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/usb/gadget/udc/renesas_usb3.c b/drivers/usb/gadget/udc/renesas_usb3.c
+index 0a74919bd754..7e0548f6bd9e 100644
+--- a/drivers/usb/gadget/udc/renesas_usb3.c
++++ b/drivers/usb/gadget/udc/renesas_usb3.c
+@@ -2066,7 +2066,7 @@ static u32 usb3_calc_rammap_val(struct renesas_usb3_ep *usb3_ep,
+ const struct usb_endpoint_descriptor *desc)
+ {
+ int i;
+- const u32 max_packet_array[] = {8, 16, 32, 64, 512};
++ static const u32 max_packet_array[] = {8, 16, 32, 64, 512};
+ u32 mpkt = PN_RAMMAP_MPKT(1024);
+
+ for (i = 0; i < ARRAY_SIZE(max_packet_array); i++) {
+--
+2.19.0
+
diff --git a/patches/0234-USB-add-SPDX-identifiers-to-all-remaining-files-in-d.patch b/patches/0234-USB-add-SPDX-identifiers-to-all-remaining-files-in-d.patch
new file mode 100644
index 0000000..710c02b
--- /dev/null
+++ b/patches/0234-USB-add-SPDX-identifiers-to-all-remaining-files-in-d.patch
@@ -0,0 +1,6543 @@
+From e87ed8b2a6064dff3432e141f58bf5259ac7d626 Mon Sep 17 00:00:00 2001
+From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Date: Fri, 3 Nov 2017 11:28:30 +0100
+Subject: [PATCH 0234/1795] USB: add SPDX identifiers to all remaining files in
+ drivers/usb/
+
+It's good to have SPDX identifiers in all files to make it easier to
+audit the kernel tree for correct licenses.
+
+Update the drivers/usb/ and include/linux/usb* files with the correct
+SPDX license identifier based on the license text in the file itself.
+The SPDX identifier is a legally binding shorthand, which can be used
+instead of the full boiler plate text.
+
+This work is based on a script and data from Thomas Gleixner, Philippe
+Ombredanne, and Kate Stewart.
+
+Cc: Thomas Gleixner <tglx@linutronix.de>
+Cc: Kate Stewart <kstewart@linuxfoundation.org>
+Cc: Philippe Ombredanne <pombredanne@nexb.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Acked-by: Felipe Balbi <felipe.balbi@linux.intel.com>
+Acked-by: Johan Hovold <johan@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 5fd54ace4721fc5ce2bb5aef6318fcf17f421460)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/usb/atm/cxacru.c | 1 +
+ drivers/usb/atm/speedtch.c | 1 +
+ drivers/usb/atm/ueagle-atm.c | 1 +
+ drivers/usb/atm/usbatm.c | 1 +
+ drivers/usb/atm/usbatm.h | 1 +
+ drivers/usb/atm/xusbatm.c | 1 +
+ drivers/usb/c67x00/c67x00-drv.c | 1 +
+ drivers/usb/c67x00/c67x00-hcd.c | 1 +
+ drivers/usb/c67x00/c67x00-hcd.h | 1 +
+ drivers/usb/c67x00/c67x00-ll-hpi.c | 1 +
+ drivers/usb/c67x00/c67x00-sched.c | 1 +
+ drivers/usb/c67x00/c67x00.h | 1 +
+ drivers/usb/chipidea/bits.h | 1 +
+ drivers/usb/chipidea/ci.h | 1 +
+ drivers/usb/chipidea/ci_hdrc_imx.c | 1 +
+ drivers/usb/chipidea/ci_hdrc_imx.h | 1 +
+ drivers/usb/chipidea/ci_hdrc_msm.c | 1 +
+ drivers/usb/chipidea/ci_hdrc_pci.c | 1 +
+ drivers/usb/chipidea/ci_hdrc_usb2.c | 1 +
+ drivers/usb/chipidea/ci_hdrc_zevio.c | 1 +
+ drivers/usb/chipidea/core.c | 1 +
+ drivers/usb/chipidea/host.c | 1 +
+ drivers/usb/chipidea/otg.c | 1 +
+ drivers/usb/chipidea/otg.h | 1 +
+ drivers/usb/chipidea/otg_fsm.c | 1 +
+ drivers/usb/chipidea/otg_fsm.h | 1 +
+ drivers/usb/chipidea/udc.c | 1 +
+ drivers/usb/chipidea/udc.h | 1 +
+ drivers/usb/chipidea/ulpi.c | 1 +
+ drivers/usb/chipidea/usbmisc_imx.c | 1 +
+ drivers/usb/class/cdc-acm.c | 1 +
+ drivers/usb/class/cdc-wdm.c | 1 +
+ drivers/usb/class/usblp.c | 1 +
+ drivers/usb/class/usbtmc.c | 1 +
+ drivers/usb/common/common.c | 1 +
+ drivers/usb/common/led.c | 1 +
+ drivers/usb/common/ulpi.c | 1 +
+ drivers/usb/common/usb-otg-fsm.c | 1 +
+ drivers/usb/core/devices.c | 1 +
+ drivers/usb/core/devio.c | 1 +
+ drivers/usb/core/hcd-pci.c | 1 +
+ drivers/usb/core/hcd.c | 1 +
+ drivers/usb/core/hub.h | 1 +
+ drivers/usb/core/ledtrig-usbport.c | 1 +
+ drivers/usb/core/of.c | 1 +
+ drivers/usb/core/otg_whitelist.h | 1 +
+ drivers/usb/core/port.c | 1 +
+ drivers/usb/core/quirks.c | 1 +
+ drivers/usb/core/usb-acpi.c | 1 +
+ drivers/usb/dwc2/core.c | 1 +
+ drivers/usb/dwc2/core.h | 1 +
+ drivers/usb/dwc2/core_intr.c | 1 +
+ drivers/usb/dwc2/debug.h | 1 +
+ drivers/usb/dwc2/debugfs.c | 1 +
+ drivers/usb/dwc2/gadget.c | 1 +
+ drivers/usb/dwc2/hcd.c | 1 +
+ drivers/usb/dwc2/hcd.h | 1 +
+ drivers/usb/dwc2/hcd_ddma.c | 1 +
+ drivers/usb/dwc2/hcd_intr.c | 1 +
+ drivers/usb/dwc2/hcd_queue.c | 1 +
+ drivers/usb/dwc2/hw.h | 1 +
+ drivers/usb/dwc2/params.c | 1 +
+ drivers/usb/dwc2/pci.c | 1 +
+ drivers/usb/dwc2/platform.c | 1 +
+ drivers/usb/dwc3/core.c | 1 +
+ drivers/usb/dwc3/core.h | 1 +
+ drivers/usb/dwc3/debug.h | 1 +
+ drivers/usb/dwc3/debugfs.c | 1 +
+ drivers/usb/dwc3/drd.c | 1 +
+ drivers/usb/dwc3/dwc3-exynos.c | 1 +
+ drivers/usb/dwc3/dwc3-keystone.c | 1 +
+ drivers/usb/dwc3/dwc3-of-simple.c | 1 +
+ drivers/usb/dwc3/dwc3-omap.c | 1 +
+ drivers/usb/dwc3/dwc3-pci.c | 1 +
+ drivers/usb/dwc3/dwc3-st.c | 1 +
+ drivers/usb/dwc3/ep0.c | 1 +
+ drivers/usb/dwc3/gadget.c | 1 +
+ drivers/usb/dwc3/gadget.h | 1 +
+ drivers/usb/dwc3/host.c | 1 +
+ drivers/usb/dwc3/io.h | 1 +
+ drivers/usb/dwc3/trace.c | 1 +
+ drivers/usb/dwc3/trace.h | 1 +
+ drivers/usb/dwc3/ulpi.c | 1 +
+ drivers/usb/early/ehci-dbgp.c | 1 +
+ drivers/usb/early/xhci-dbc.c | 1 +
+ drivers/usb/early/xhci-dbc.h | 1 +
+ drivers/usb/gadget/composite.c | 1 +
+ drivers/usb/gadget/config.c | 1 +
+ drivers/usb/gadget/configfs.c | 1 +
+ drivers/usb/gadget/epautoconf.c | 1 +
+ drivers/usb/gadget/function/f_acm.c | 1 +
+ drivers/usb/gadget/function/f_ecm.c | 1 +
+ drivers/usb/gadget/function/f_eem.c | 1 +
+ drivers/usb/gadget/function/f_fs.c | 1 +
+ drivers/usb/gadget/function/f_hid.c | 1 +
+ drivers/usb/gadget/function/f_loopback.c | 1 +
+ drivers/usb/gadget/function/f_mass_storage.c | 1 +
+ drivers/usb/gadget/function/f_midi.c | 1 +
+ drivers/usb/gadget/function/f_ncm.c | 1 +
+ drivers/usb/gadget/function/f_obex.c | 1 +
+ drivers/usb/gadget/function/f_phonet.c | 1 +
+ drivers/usb/gadget/function/f_printer.c | 1 +
+ drivers/usb/gadget/function/f_rndis.c | 1 +
+ drivers/usb/gadget/function/f_serial.c | 1 +
+ drivers/usb/gadget/function/f_sourcesink.c | 1 +
+ drivers/usb/gadget/function/f_subset.c | 1 +
+ drivers/usb/gadget/function/f_tcm.c | 1 +
+ drivers/usb/gadget/function/f_uac1.c | 1 +
+ drivers/usb/gadget/function/f_uac1_legacy.c | 1 +
+ drivers/usb/gadget/function/f_uac2.c | 1 +
+ drivers/usb/gadget/function/f_uvc.c | 1 +
+ drivers/usb/gadget/function/f_uvc.h | 1 +
+ drivers/usb/gadget/function/rndis.c | 1 +
+ drivers/usb/gadget/function/rndis.h | 1 +
+ drivers/usb/gadget/function/storage_common.c | 1 +
+ drivers/usb/gadget/function/u_audio.c | 1 +
+ drivers/usb/gadget/function/u_audio.h | 1 +
+ drivers/usb/gadget/function/u_ecm.h | 1 +
+ drivers/usb/gadget/function/u_eem.h | 1 +
+ drivers/usb/gadget/function/u_ether.c | 1 +
+ drivers/usb/gadget/function/u_ether.h | 1 +
+ drivers/usb/gadget/function/u_ether_configfs.h | 1 +
+ drivers/usb/gadget/function/u_fs.h | 1 +
+ drivers/usb/gadget/function/u_gether.h | 1 +
+ drivers/usb/gadget/function/u_hid.h | 1 +
+ drivers/usb/gadget/function/u_midi.h | 1 +
+ drivers/usb/gadget/function/u_ncm.h | 1 +
+ drivers/usb/gadget/function/u_phonet.h | 1 +
+ drivers/usb/gadget/function/u_printer.h | 1 +
+ drivers/usb/gadget/function/u_rndis.h | 1 +
+ drivers/usb/gadget/function/u_serial.c | 1 +
+ drivers/usb/gadget/function/u_serial.h | 1 +
+ drivers/usb/gadget/function/u_tcm.h | 1 +
+ drivers/usb/gadget/function/u_uac1.h | 1 +
+ drivers/usb/gadget/function/u_uac1_legacy.c | 1 +
+ drivers/usb/gadget/function/u_uac1_legacy.h | 1 +
+ drivers/usb/gadget/function/u_uac2.h | 1 +
+ drivers/usb/gadget/function/u_uvc.h | 1 +
+ drivers/usb/gadget/function/uvc.h | 1 +
+ drivers/usb/gadget/function/uvc_configfs.c | 1 +
+ drivers/usb/gadget/function/uvc_configfs.h | 1 +
+ drivers/usb/gadget/function/uvc_queue.c | 1 +
+ drivers/usb/gadget/function/uvc_v4l2.c | 1 +
+ drivers/usb/gadget/function/uvc_v4l2.h | 1 +
+ drivers/usb/gadget/function/uvc_video.c | 1 +
+ drivers/usb/gadget/function/uvc_video.h | 1 +
+ drivers/usb/gadget/functions.c | 1 +
+ drivers/usb/gadget/legacy/acm_ms.c | 1 +
+ drivers/usb/gadget/legacy/audio.c | 1 +
+ drivers/usb/gadget/legacy/cdc2.c | 1 +
+ drivers/usb/gadget/legacy/dbgp.c | 1 +
+ drivers/usb/gadget/legacy/ether.c | 1 +
+ drivers/usb/gadget/legacy/g_ffs.c | 1 +
+ drivers/usb/gadget/legacy/gmidi.c | 1 +
+ drivers/usb/gadget/legacy/hid.c | 1 +
+ drivers/usb/gadget/legacy/inode.c | 1 +
+ drivers/usb/gadget/legacy/mass_storage.c | 1 +
+ drivers/usb/gadget/legacy/multi.c | 1 +
+ drivers/usb/gadget/legacy/ncm.c | 1 +
+ drivers/usb/gadget/legacy/nokia.c | 1 +
+ drivers/usb/gadget/legacy/printer.c | 1 +
+ drivers/usb/gadget/legacy/serial.c | 1 +
+ drivers/usb/gadget/legacy/tcm_usb_gadget.c | 1 +
+ drivers/usb/gadget/legacy/webcam.c | 1 +
+ drivers/usb/gadget/legacy/zero.c | 1 +
+ drivers/usb/gadget/u_f.c | 1 +
+ drivers/usb/gadget/u_f.h | 1 +
+ drivers/usb/gadget/u_os_desc.h | 1 +
+ drivers/usb/gadget/udc/amd5536udc.h | 1 +
+ drivers/usb/gadget/udc/amd5536udc_pci.c | 1 +
+ drivers/usb/gadget/udc/at91_udc.c | 1 +
+ drivers/usb/gadget/udc/at91_udc.h | 1 +
+ drivers/usb/gadget/udc/atmel_usba_udc.c | 1 +
+ drivers/usb/gadget/udc/atmel_usba_udc.h | 1 +
+ drivers/usb/gadget/udc/bcm63xx_udc.c | 1 +
+ drivers/usb/gadget/udc/bdc/bdc.h | 1 +
+ drivers/usb/gadget/udc/bdc/bdc_cmd.c | 1 +
+ drivers/usb/gadget/udc/bdc/bdc_cmd.h | 1 +
+ drivers/usb/gadget/udc/bdc/bdc_core.c | 1 +
+ drivers/usb/gadget/udc/bdc/bdc_dbg.c | 1 +
+ drivers/usb/gadget/udc/bdc/bdc_dbg.h | 1 +
+ drivers/usb/gadget/udc/bdc/bdc_ep.c | 1 +
+ drivers/usb/gadget/udc/bdc/bdc_ep.h | 1 +
+ drivers/usb/gadget/udc/bdc/bdc_pci.c | 1 +
+ drivers/usb/gadget/udc/bdc/bdc_udc.c | 1 +
+ drivers/usb/gadget/udc/core.c | 1 +
+ drivers/usb/gadget/udc/dummy_hcd.c | 1 +
+ drivers/usb/gadget/udc/fotg210-udc.c | 1 +
+ drivers/usb/gadget/udc/fotg210.h | 1 +
+ drivers/usb/gadget/udc/fsl_mxc_udc.c | 1 +
+ drivers/usb/gadget/udc/fsl_qe_udc.c | 1 +
+ drivers/usb/gadget/udc/fsl_qe_udc.h | 1 +
+ drivers/usb/gadget/udc/fsl_udc_core.c | 1 +
+ drivers/usb/gadget/udc/fsl_usb2_udc.h | 1 +
+ drivers/usb/gadget/udc/fusb300_udc.c | 1 +
+ drivers/usb/gadget/udc/fusb300_udc.h | 1 +
+ drivers/usb/gadget/udc/goku_udc.c | 1 +
+ drivers/usb/gadget/udc/goku_udc.h | 1 +
+ drivers/usb/gadget/udc/gr_udc.c | 1 +
+ drivers/usb/gadget/udc/gr_udc.h | 1 +
+ drivers/usb/gadget/udc/lpc32xx_udc.c | 1 +
+ drivers/usb/gadget/udc/m66592-udc.c | 1 +
+ drivers/usb/gadget/udc/m66592-udc.h | 1 +
+ drivers/usb/gadget/udc/mv_u3d.h | 1 +
+ drivers/usb/gadget/udc/mv_u3d_core.c | 1 +
+ drivers/usb/gadget/udc/mv_udc.h | 1 +
+ drivers/usb/gadget/udc/mv_udc_core.c | 1 +
+ drivers/usb/gadget/udc/net2272.c | 1 +
+ drivers/usb/gadget/udc/net2272.h | 1 +
+ drivers/usb/gadget/udc/net2280.c | 1 +
+ drivers/usb/gadget/udc/net2280.h | 1 +
+ drivers/usb/gadget/udc/omap_udc.c | 1 +
+ drivers/usb/gadget/udc/pch_udc.c | 1 +
+ drivers/usb/gadget/udc/pxa25x_udc.c | 1 +
+ drivers/usb/gadget/udc/pxa25x_udc.h | 1 +
+ drivers/usb/gadget/udc/pxa27x_udc.c | 1 +
+ drivers/usb/gadget/udc/pxa27x_udc.h | 1 +
+ drivers/usb/gadget/udc/r8a66597-udc.c | 1 +
+ drivers/usb/gadget/udc/r8a66597-udc.h | 1 +
+ drivers/usb/gadget/udc/renesas_usb3.c | 1 +
+ drivers/usb/gadget/udc/s3c-hsudc.c | 1 +
+ drivers/usb/gadget/udc/s3c2410_udc.c | 1 +
+ drivers/usb/gadget/udc/s3c2410_udc.h | 1 +
+ drivers/usb/gadget/udc/snps_udc_core.c | 1 +
+ drivers/usb/gadget/udc/snps_udc_plat.c | 1 +
+ drivers/usb/gadget/udc/trace.c | 1 +
+ drivers/usb/gadget/udc/trace.h | 1 +
+ drivers/usb/gadget/udc/udc-xilinx.c | 1 +
+ drivers/usb/gadget/usbstring.c | 1 +
+ drivers/usb/host/bcma-hcd.c | 1 +
+ drivers/usb/host/ehci-atmel.c | 1 +
+ drivers/usb/host/ehci-dbg.c | 1 +
+ drivers/usb/host/ehci-exynos.c | 1 +
+ drivers/usb/host/ehci-fsl.c | 1 +
+ drivers/usb/host/ehci-fsl.h | 1 +
+ drivers/usb/host/ehci-grlib.c | 1 +
+ drivers/usb/host/ehci-hcd.c | 1 +
+ drivers/usb/host/ehci-hub.c | 1 +
+ drivers/usb/host/ehci-mem.c | 1 +
+ drivers/usb/host/ehci-mv.c | 1 +
+ drivers/usb/host/ehci-mxc.c | 1 +
+ drivers/usb/host/ehci-omap.c | 1 +
+ drivers/usb/host/ehci-orion.c | 1 +
+ drivers/usb/host/ehci-pci.c | 1 +
+ drivers/usb/host/ehci-platform.c | 1 +
+ drivers/usb/host/ehci-pmcmsp.c | 1 +
+ drivers/usb/host/ehci-ppc-of.c | 1 +
+ drivers/usb/host/ehci-ps3.c | 1 +
+ drivers/usb/host/ehci-q.c | 1 +
+ drivers/usb/host/ehci-sched.c | 1 +
+ drivers/usb/host/ehci-sh.c | 1 +
+ drivers/usb/host/ehci-spear.c | 1 +
+ drivers/usb/host/ehci-st.c | 1 +
+ drivers/usb/host/ehci-sysfs.c | 1 +
+ drivers/usb/host/ehci-tegra.c | 1 +
+ drivers/usb/host/ehci-tilegx.c | 1 +
+ drivers/usb/host/ehci-timer.c | 1 +
+ drivers/usb/host/ehci-w90x900.c | 1 +
+ drivers/usb/host/ehci-xilinx-of.c | 1 +
+ drivers/usb/host/ehci.h | 1 +
+ drivers/usb/host/fhci-dbg.c | 1 +
+ drivers/usb/host/fhci-hcd.c | 1 +
+ drivers/usb/host/fhci-hub.c | 1 +
+ drivers/usb/host/fhci-mem.c | 1 +
+ drivers/usb/host/fhci-q.c | 1 +
+ drivers/usb/host/fhci-sched.c | 1 +
+ drivers/usb/host/fhci-tds.c | 1 +
+ drivers/usb/host/fhci.h | 1 +
+ drivers/usb/host/fotg210-hcd.c | 1 +
+ drivers/usb/host/fsl-mph-dr-of.c | 1 +
+ drivers/usb/host/hwa-hc.c | 1 +
+ drivers/usb/host/imx21-dbg.c | 1 +
+ drivers/usb/host/imx21-hcd.c | 1 +
+ drivers/usb/host/imx21-hcd.h | 1 +
+ drivers/usb/host/isp116x-hcd.c | 1 +
+ drivers/usb/host/isp1362-hcd.c | 1 +
+ drivers/usb/host/max3421-hcd.c | 1 +
+ drivers/usb/host/ohci-at91.c | 1 +
+ drivers/usb/host/ohci-da8xx.c | 1 +
+ drivers/usb/host/ohci-dbg.c | 1 +
+ drivers/usb/host/ohci-exynos.c | 1 +
+ drivers/usb/host/ohci-hcd.c | 1 +
+ drivers/usb/host/ohci-hub.c | 1 +
+ drivers/usb/host/ohci-mem.c | 1 +
+ drivers/usb/host/ohci-nxp.c | 1 +
+ drivers/usb/host/ohci-omap.c | 1 +
+ drivers/usb/host/ohci-pci.c | 1 +
+ drivers/usb/host/ohci-platform.c | 1 +
+ drivers/usb/host/ohci-ppc-of.c | 1 +
+ drivers/usb/host/ohci-ps3.c | 1 +
+ drivers/usb/host/ohci-pxa27x.c | 1 +
+ drivers/usb/host/ohci-q.c | 1 +
+ drivers/usb/host/ohci-s3c2410.c | 1 +
+ drivers/usb/host/ohci-sa1111.c | 1 +
+ drivers/usb/host/ohci-sm501.c | 1 +
+ drivers/usb/host/ohci-spear.c | 1 +
+ drivers/usb/host/ohci-st.c | 1 +
+ drivers/usb/host/ohci-tilegx.c | 1 +
+ drivers/usb/host/ohci-tmio.c | 1 +
+ drivers/usb/host/ohci.h | 1 +
+ drivers/usb/host/oxu210hp-hcd.c | 1 +
+ drivers/usb/host/pci-quirks.c | 1 +
+ drivers/usb/host/r8a66597-hcd.c | 1 +
+ drivers/usb/host/r8a66597.h | 1 +
+ drivers/usb/host/sl811-hcd.c | 1 +
+ drivers/usb/host/sl811_cs.c | 1 +
+ drivers/usb/host/ssb-hcd.c | 1 +
+ drivers/usb/host/u132-hcd.c | 1 +
+ drivers/usb/host/uhci-hcd.c | 1 +
+ drivers/usb/host/whci/asl.c | 1 +
+ drivers/usb/host/whci/debug.c | 1 +
+ drivers/usb/host/whci/hcd.c | 1 +
+ drivers/usb/host/whci/hw.c | 1 +
+ drivers/usb/host/whci/init.c | 1 +
+ drivers/usb/host/whci/int.c | 1 +
+ drivers/usb/host/whci/pzl.c | 1 +
+ drivers/usb/host/whci/qset.c | 1 +
+ drivers/usb/host/whci/whcd.h | 1 +
+ drivers/usb/host/whci/whci-hc.h | 1 +
+ drivers/usb/host/whci/wusb.c | 1 +
+ drivers/usb/host/xhci-dbg.c | 1 +
+ drivers/usb/host/xhci-ext-caps.h | 1 +
+ drivers/usb/host/xhci-hub.c | 1 +
+ drivers/usb/host/xhci-mem.c | 1 +
+ drivers/usb/host/xhci-mtk-sch.c | 1 +
+ drivers/usb/host/xhci-mtk.c | 1 +
+ drivers/usb/host/xhci-mtk.h | 1 +
+ drivers/usb/host/xhci-mvebu.c | 1 +
+ drivers/usb/host/xhci-mvebu.h | 1 +
+ drivers/usb/host/xhci-pci.c | 1 +
+ drivers/usb/host/xhci-plat.c | 1 +
+ drivers/usb/host/xhci-plat.h | 1 +
+ drivers/usb/host/xhci-rcar.c | 1 +
+ drivers/usb/host/xhci-rcar.h | 1 +
+ drivers/usb/host/xhci-ring.c | 1 +
+ drivers/usb/host/xhci-tegra.c | 1 +
+ drivers/usb/host/xhci-trace.c | 1 +
+ drivers/usb/host/xhci-trace.h | 1 +
+ drivers/usb/host/xhci.c | 1 +
+ drivers/usb/host/xhci.h | 1 +
+ drivers/usb/image/mdc800.c | 1 +
+ drivers/usb/image/microtek.c | 1 +
+ drivers/usb/isp1760/isp1760-core.c | 1 +
+ drivers/usb/isp1760/isp1760-core.h | 1 +
+ drivers/usb/isp1760/isp1760-regs.h | 1 +
+ drivers/usb/isp1760/isp1760-udc.c | 1 +
+ drivers/usb/isp1760/isp1760-udc.h | 1 +
+ drivers/usb/misc/adutux.c | 1 +
+ drivers/usb/misc/appledisplay.c | 1 +
+ drivers/usb/misc/chaoskey.c | 1 +
+ drivers/usb/misc/cypress_cy7c63.c | 1 +
+ drivers/usb/misc/cytherm.c | 1 +
+ drivers/usb/misc/ehset.c | 1 +
+ drivers/usb/misc/emi26.c | 1 +
+ drivers/usb/misc/emi62.c | 1 +
+ drivers/usb/misc/ezusb.c | 1 +
+ drivers/usb/misc/ftdi-elan.c | 1 +
+ drivers/usb/misc/idmouse.c | 1 +
+ drivers/usb/misc/iowarrior.c | 1 +
+ drivers/usb/misc/isight_firmware.c | 1 +
+ drivers/usb/misc/ldusb.c | 1 +
+ drivers/usb/misc/legousbtower.c | 1 +
+ drivers/usb/misc/lvstest.c | 1 +
+ drivers/usb/misc/rio500.c | 1 +
+ drivers/usb/misc/rio500_usb.h | 1 +
+ drivers/usb/misc/sisusbvga/sisusb.c | 1 +
+ drivers/usb/misc/sisusbvga/sisusb.h | 1 +
+ drivers/usb/misc/sisusbvga/sisusb_con.c | 1 +
+ drivers/usb/misc/sisusbvga/sisusb_init.c | 1 +
+ drivers/usb/misc/sisusbvga/sisusb_init.h | 1 +
+ drivers/usb/misc/sisusbvga/sisusb_struct.h | 1 +
+ drivers/usb/misc/trancevibrator.c | 1 +
+ drivers/usb/misc/usb251xb.c | 1 +
+ drivers/usb/misc/usb3503.c | 1 +
+ drivers/usb/misc/usb4604.c | 1 +
+ drivers/usb/misc/usb_u132.h | 1 +
+ drivers/usb/misc/usblcd.c | 1 +
+ drivers/usb/misc/usbsevseg.c | 1 +
+ drivers/usb/misc/usbtest.c | 1 +
+ drivers/usb/misc/uss720.c | 1 +
+ drivers/usb/misc/yurex.c | 1 +
+ drivers/usb/mon/mon_main.c | 1 +
+ drivers/usb/mtu3/mtu3.h | 1 +
+ drivers/usb/mtu3/mtu3_core.c | 1 +
+ drivers/usb/mtu3/mtu3_dr.c | 1 +
+ drivers/usb/mtu3/mtu3_dr.h | 1 +
+ drivers/usb/mtu3/mtu3_gadget.c | 1 +
+ drivers/usb/mtu3/mtu3_gadget_ep0.c | 1 +
+ drivers/usb/mtu3/mtu3_host.c | 1 +
+ drivers/usb/mtu3/mtu3_hw_regs.h | 1 +
+ drivers/usb/mtu3/mtu3_plat.c | 1 +
+ drivers/usb/mtu3/mtu3_qmu.c | 1 +
+ drivers/usb/mtu3/mtu3_qmu.h | 1 +
+ drivers/usb/musb/am35x.c | 1 +
+ drivers/usb/musb/blackfin.c | 1 +
+ drivers/usb/musb/blackfin.h | 1 +
+ drivers/usb/musb/cppi_dma.c | 1 +
+ drivers/usb/musb/da8xx.c | 1 +
+ drivers/usb/musb/davinci.c | 1 +
+ drivers/usb/musb/davinci.h | 1 +
+ drivers/usb/musb/jz4740.c | 1 +
+ drivers/usb/musb/musb_am335x.c | 1 +
+ drivers/usb/musb/musb_core.c | 1 +
+ drivers/usb/musb/musb_core.h | 1 +
+ drivers/usb/musb/musb_cppi41.c | 1 +
+ drivers/usb/musb/musb_debug.h | 1 +
+ drivers/usb/musb/musb_debugfs.c | 1 +
+ drivers/usb/musb/musb_dma.h | 1 +
+ drivers/usb/musb/musb_dsps.c | 1 +
+ drivers/usb/musb/musb_gadget.c | 1 +
+ drivers/usb/musb/musb_gadget.h | 1 +
+ drivers/usb/musb/musb_gadget_ep0.c | 1 +
+ drivers/usb/musb/musb_host.c | 1 +
+ drivers/usb/musb/musb_host.h | 1 +
+ drivers/usb/musb/musb_io.h | 1 +
+ drivers/usb/musb/musb_regs.h | 1 +
+ drivers/usb/musb/musb_trace.c | 1 +
+ drivers/usb/musb/musb_trace.h | 1 +
+ drivers/usb/musb/musb_virthub.c | 1 +
+ drivers/usb/musb/musbhsdma.c | 1 +
+ drivers/usb/musb/musbhsdma.h | 1 +
+ drivers/usb/musb/omap2430.c | 1 +
+ drivers/usb/musb/omap2430.h | 1 +
+ drivers/usb/musb/sunxi.c | 1 +
+ drivers/usb/musb/tusb6010.c | 1 +
+ drivers/usb/musb/tusb6010.h | 1 +
+ drivers/usb/musb/tusb6010_omap.c | 1 +
+ drivers/usb/musb/ux500.c | 1 +
+ drivers/usb/musb/ux500_dma.c | 1 +
+ drivers/usb/phy/of.c | 1 +
+ drivers/usb/phy/phy-ab8500-usb.c | 1 +
+ drivers/usb/phy/phy-am335x-control.c | 1 +
+ drivers/usb/phy/phy-am335x.c | 1 +
+ drivers/usb/phy/phy-fsl-usb.c | 1 +
+ drivers/usb/phy/phy-fsl-usb.h | 1 +
+ drivers/usb/phy/phy-generic.c | 1 +
+ drivers/usb/phy/phy-gpio-vbus-usb.c | 1 +
+ drivers/usb/phy/phy-isp1301-omap.c | 1 +
+ drivers/usb/phy/phy-isp1301.c | 1 +
+ drivers/usb/phy/phy-keystone.c | 1 +
+ drivers/usb/phy/phy-mv-usb.c | 1 +
+ drivers/usb/phy/phy-mv-usb.h | 1 +
+ drivers/usb/phy/phy-mxs-usb.c | 1 +
+ drivers/usb/phy/phy-omap-otg.c | 1 +
+ drivers/usb/phy/phy-tahvo.c | 1 +
+ drivers/usb/phy/phy-tegra-usb.c | 1 +
+ drivers/usb/phy/phy-twl6030-usb.c | 1 +
+ drivers/usb/phy/phy-ulpi-viewport.c | 1 +
+ drivers/usb/phy/phy-ulpi.c | 1 +
+ drivers/usb/phy/phy.c | 1 +
+ drivers/usb/renesas_usbhs/common.c | 1 +
+ drivers/usb/renesas_usbhs/common.h | 1 +
+ drivers/usb/renesas_usbhs/fifo.c | 1 +
+ drivers/usb/renesas_usbhs/fifo.h | 1 +
+ drivers/usb/renesas_usbhs/mod.c | 1 +
+ drivers/usb/renesas_usbhs/mod.h | 1 +
+ drivers/usb/renesas_usbhs/mod_gadget.c | 1 +
+ drivers/usb/renesas_usbhs/mod_host.c | 1 +
+ drivers/usb/renesas_usbhs/pipe.c | 1 +
+ drivers/usb/renesas_usbhs/pipe.h | 1 +
+ drivers/usb/renesas_usbhs/rcar2.c | 1 +
+ drivers/usb/renesas_usbhs/rcar3.c | 1 +
+ drivers/usb/serial/aircable.c | 1 +
+ drivers/usb/serial/ark3116.c | 1 +
+ drivers/usb/serial/belkin_sa.c | 1 +
+ drivers/usb/serial/belkin_sa.h | 1 +
+ drivers/usb/serial/bus.c | 1 +
+ drivers/usb/serial/ch341.c | 1 +
+ drivers/usb/serial/console.c | 1 +
+ drivers/usb/serial/cp210x.c | 1 +
+ drivers/usb/serial/cyberjack.c | 1 +
+ drivers/usb/serial/cypress_m8.c | 1 +
+ drivers/usb/serial/digi_acceleport.c | 1 +
+ drivers/usb/serial/empeg.c | 1 +
+ drivers/usb/serial/f81232.c | 1 +
+ drivers/usb/serial/f81534.c | 1 +
+ drivers/usb/serial/ftdi_sio.c | 1 +
+ drivers/usb/serial/garmin_gps.c | 1 +
+ drivers/usb/serial/generic.c | 1 +
+ drivers/usb/serial/io_16654.h | 1 +
+ drivers/usb/serial/io_edgeport.c | 1 +
+ drivers/usb/serial/io_edgeport.h | 1 +
+ drivers/usb/serial/io_ionsp.h | 1 +
+ drivers/usb/serial/io_ti.c | 1 +
+ drivers/usb/serial/io_ti.h | 1 +
+ drivers/usb/serial/io_usbvend.h | 1 +
+ drivers/usb/serial/ipaq.c | 1 +
+ drivers/usb/serial/ipw.c | 1 +
+ drivers/usb/serial/ir-usb.c | 1 +
+ drivers/usb/serial/iuu_phoenix.c | 1 +
+ drivers/usb/serial/iuu_phoenix.h | 1 +
+ drivers/usb/serial/keyspan.c | 1 +
+ drivers/usb/serial/keyspan_pda.c | 1 +
+ drivers/usb/serial/kl5kusb105.c | 1 +
+ drivers/usb/serial/kobil_sct.c | 1 +
+ drivers/usb/serial/mct_u232.c | 1 +
+ drivers/usb/serial/mct_u232.h | 1 +
+ drivers/usb/serial/metro-usb.c | 1 +
+ drivers/usb/serial/mos7720.c | 1 +
+ drivers/usb/serial/mos7840.c | 1 +
+ drivers/usb/serial/mxuport.c | 1 +
+ drivers/usb/serial/navman.c | 1 +
+ drivers/usb/serial/omninet.c | 1 +
+ drivers/usb/serial/opticon.c | 1 +
+ drivers/usb/serial/option.c | 1 +
+ drivers/usb/serial/oti6858.c | 1 +
+ drivers/usb/serial/oti6858.h | 1 +
+ drivers/usb/serial/pl2303.c | 1 +
+ drivers/usb/serial/pl2303.h | 1 +
+ drivers/usb/serial/qcaux.c | 1 +
+ drivers/usb/serial/qcserial.c | 1 +
+ drivers/usb/serial/quatech2.c | 1 +
+ drivers/usb/serial/safe_serial.c | 1 +
+ drivers/usb/serial/sierra.c | 1 +
+ drivers/usb/serial/spcp8x5.c | 1 +
+ drivers/usb/serial/ssu100.c | 1 +
+ drivers/usb/serial/symbolserial.c | 1 +
+ drivers/usb/serial/ti_usb_3410_5052.c | 1 +
+ drivers/usb/serial/upd78f0730.c | 1 +
+ drivers/usb/serial/usb-serial-simple.c | 1 +
+ drivers/usb/serial/usb-serial.c | 1 +
+ drivers/usb/serial/usb_debug.c | 1 +
+ drivers/usb/serial/usb_wwan.c | 1 +
+ drivers/usb/serial/visor.c | 1 +
+ drivers/usb/serial/visor.h | 1 +
+ drivers/usb/serial/whiteheat.c | 1 +
+ drivers/usb/serial/whiteheat.h | 1 +
+ drivers/usb/serial/wishbone-serial.c | 1 +
+ drivers/usb/serial/xsens_mt.c | 1 +
+ drivers/usb/storage/alauda.c | 1 +
+ drivers/usb/storage/cypress_atacb.c | 1 +
+ drivers/usb/storage/datafab.c | 1 +
+ drivers/usb/storage/debug.c | 1 +
+ drivers/usb/storage/debug.h | 1 +
+ drivers/usb/storage/ene_ub6250.c | 1 +
+ drivers/usb/storage/freecom.c | 1 +
+ drivers/usb/storage/initializers.c | 1 +
+ drivers/usb/storage/initializers.h | 1 +
+ drivers/usb/storage/isd200.c | 1 +
+ drivers/usb/storage/jumpshot.c | 1 +
+ drivers/usb/storage/karma.c | 1 +
+ drivers/usb/storage/onetouch.c | 1 +
+ drivers/usb/storage/option_ms.c | 1 +
+ drivers/usb/storage/protocol.c | 1 +
+ drivers/usb/storage/protocol.h | 1 +
+ drivers/usb/storage/realtek_cr.c | 1 +
+ drivers/usb/storage/scsiglue.c | 1 +
+ drivers/usb/storage/scsiglue.h | 1 +
+ drivers/usb/storage/sddr09.c | 1 +
+ drivers/usb/storage/sddr55.c | 1 +
+ drivers/usb/storage/shuttle_usbat.c | 1 +
+ drivers/usb/storage/transport.c | 1 +
+ drivers/usb/storage/transport.h | 1 +
+ drivers/usb/storage/uas.c | 1 +
+ drivers/usb/storage/unusual_alauda.h | 1 +
+ drivers/usb/storage/unusual_cypress.h | 1 +
+ drivers/usb/storage/unusual_datafab.h | 1 +
+ drivers/usb/storage/unusual_devs.h | 1 +
+ drivers/usb/storage/unusual_ene_ub6250.h | 1 +
+ drivers/usb/storage/unusual_freecom.h | 1 +
+ drivers/usb/storage/unusual_isd200.h | 1 +
+ drivers/usb/storage/unusual_jumpshot.h | 1 +
+ drivers/usb/storage/unusual_karma.h | 1 +
+ drivers/usb/storage/unusual_onetouch.h | 1 +
+ drivers/usb/storage/unusual_realtek.h | 1 +
+ drivers/usb/storage/unusual_sddr09.h | 1 +
+ drivers/usb/storage/unusual_sddr55.h | 1 +
+ drivers/usb/storage/unusual_uas.h | 1 +
+ drivers/usb/storage/unusual_usbat.h | 1 +
+ drivers/usb/storage/usb.c | 1 +
+ drivers/usb/storage/usb.h | 1 +
+ drivers/usb/storage/usual-tables.c | 1 +
+ drivers/usb/typec/typec.c | 1 +
+ drivers/usb/typec/typec_wcove.c | 1 +
+ drivers/usb/typec/ucsi/ucsi.c | 1 +
+ drivers/usb/typec/ucsi/ucsi_acpi.c | 1 +
+ drivers/usb/usb-skeleton.c | 1 +
+ drivers/usb/usbip/stub.h | 1 +
+ drivers/usb/usbip/stub_dev.c | 1 +
+ drivers/usb/usbip/stub_main.c | 1 +
+ drivers/usb/usbip/stub_rx.c | 1 +
+ drivers/usb/usbip/stub_tx.c | 1 +
+ drivers/usb/usbip/usbip_common.c | 1 +
+ drivers/usb/usbip/usbip_common.h | 1 +
+ drivers/usb/usbip/usbip_event.c | 1 +
+ drivers/usb/usbip/vhci.h | 1 +
+ drivers/usb/usbip/vhci_hcd.c | 1 +
+ drivers/usb/usbip/vhci_rx.c | 1 +
+ drivers/usb/usbip/vhci_sysfs.c | 1 +
+ drivers/usb/usbip/vhci_tx.c | 1 +
+ drivers/usb/usbip/vudc.h | 1 +
+ drivers/usb/usbip/vudc_dev.c | 1 +
+ drivers/usb/usbip/vudc_main.c | 1 +
+ drivers/usb/usbip/vudc_rx.c | 1 +
+ drivers/usb/usbip/vudc_sysfs.c | 1 +
+ drivers/usb/usbip/vudc_transfer.c | 1 +
+ drivers/usb/usbip/vudc_tx.c | 1 +
+ drivers/usb/wusbcore/cbaf.c | 1 +
+ drivers/usb/wusbcore/crypto.c | 1 +
+ drivers/usb/wusbcore/dev-sysfs.c | 1 +
+ drivers/usb/wusbcore/devconnect.c | 1 +
+ drivers/usb/wusbcore/mmc.c | 1 +
+ drivers/usb/wusbcore/pal.c | 1 +
+ drivers/usb/wusbcore/reservation.c | 1 +
+ drivers/usb/wusbcore/rh.c | 1 +
+ drivers/usb/wusbcore/security.c | 1 +
+ drivers/usb/wusbcore/wa-hc.c | 1 +
+ drivers/usb/wusbcore/wa-hc.h | 1 +
+ drivers/usb/wusbcore/wa-nep.c | 1 +
+ drivers/usb/wusbcore/wa-rpipe.c | 1 +
+ drivers/usb/wusbcore/wa-xfer.c | 1 +
+ drivers/usb/wusbcore/wusbhc.c | 1 +
+ drivers/usb/wusbcore/wusbhc.h | 1 +
+ include/linux/usb/association.h | 1 +
+ include/linux/usb/audio-v2.h | 1 +
+ include/linux/usb/audio.h | 1 +
+ include/linux/usb/c67x00.h | 1 +
+ include/linux/usb/cdc-wdm.h | 1 +
+ include/linux/usb/cdc.h | 1 +
+ include/linux/usb/cdc_ncm.h | 1 +
+ include/linux/usb/composite.h | 1 +
+ include/linux/usb/ehci_def.h | 1 +
+ include/linux/usb/ehci_pdriver.h | 1 +
+ include/linux/usb/g_hid.h | 1 +
+ include/linux/usb/gadget.h | 1 +
+ include/linux/usb/gpio_vbus.h | 1 +
+ include/linux/usb/hcd.h | 1 +
+ include/linux/usb/input.h | 1 +
+ include/linux/usb/isp1301.h | 1 +
+ include/linux/usb/m66592.h | 1 +
+ include/linux/usb/musb-ux500.h | 1 +
+ include/linux/usb/net2280.h | 1 +
+ include/linux/usb/of.h | 1 +
+ include/linux/usb/ohci_pdriver.h | 1 +
+ include/linux/usb/otg-fsm.h | 1 +
+ include/linux/usb/phy_companion.h | 1 +
+ include/linux/usb/r8a66597.h | 1 +
+ include/linux/usb/renesas_usbhs.h | 1 +
+ include/linux/usb/rndis_host.h | 1 +
+ include/linux/usb/samsung_usb_phy.h | 1 +
+ include/linux/usb/serial.h | 1 +
+ include/linux/usb/storage.h | 1 +
+ include/linux/usb/tegra_usb_phy.h | 1 +
+ include/linux/usb/tilegx.h | 1 +
+ include/linux/usb/ulpi.h | 1 +
+ include/linux/usb/usb338x.h | 1 +
+ include/linux/usb/usbnet.h | 1 +
+ include/linux/usb/wusb-wa.h | 1 +
+ include/linux/usb/wusb.h | 1 +
+ include/linux/usb/xhci-dbgp.h | 1 +
+ include/linux/usbdevice_fs.h | 1 +
+ 651 files changed, 651 insertions(+)
+
+diff --git a/drivers/usb/atm/cxacru.c b/drivers/usb/atm/cxacru.c
+index 5160a4a966b3..d72ff2ee4a6f 100644
+--- a/drivers/usb/atm/cxacru.c
++++ b/drivers/usb/atm/cxacru.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /******************************************************************************
+ * cxacru.c - driver for USB ADSL modems based on
+ * Conexant AccessRunner chipset
+diff --git a/drivers/usb/atm/speedtch.c b/drivers/usb/atm/speedtch.c
+index 3676adb40d89..811ec79bf756 100644
+--- a/drivers/usb/atm/speedtch.c
++++ b/drivers/usb/atm/speedtch.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /******************************************************************************
+ * speedtch.c - Alcatel SpeedTouch USB xDSL modem driver
+ *
+diff --git a/drivers/usb/atm/ueagle-atm.c b/drivers/usb/atm/ueagle-atm.c
+index ba7616395db2..ab75690044bb 100644
+--- a/drivers/usb/atm/ueagle-atm.c
++++ b/drivers/usb/atm/ueagle-atm.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+ /*-
+ * Copyright (c) 2003, 2004
+ * Damien Bergamini <damien.bergamini@free.fr>. All rights reserved.
+diff --git a/drivers/usb/atm/usbatm.c b/drivers/usb/atm/usbatm.c
+index 8607af758bbd..ce1c57cb413f 100644
+--- a/drivers/usb/atm/usbatm.c
++++ b/drivers/usb/atm/usbatm.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /******************************************************************************
+ * usbatm.c - Generic USB xDSL driver core
+ *
+diff --git a/drivers/usb/atm/usbatm.h b/drivers/usb/atm/usbatm.h
+index f3eecd967a8a..72f9d3b8adb6 100644
+--- a/drivers/usb/atm/usbatm.h
++++ b/drivers/usb/atm/usbatm.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /******************************************************************************
+ * usbatm.h - Generic USB xDSL driver core
+ *
+diff --git a/drivers/usb/atm/xusbatm.c b/drivers/usb/atm/xusbatm.c
+index c73c1ec3005e..7c55032a2c2c 100644
+--- a/drivers/usb/atm/xusbatm.c
++++ b/drivers/usb/atm/xusbatm.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /******************************************************************************
+ * xusbatm.c - dumb usbatm-based driver for modems initialized in userspace
+ *
+diff --git a/drivers/usb/c67x00/c67x00-drv.c b/drivers/usb/c67x00/c67x00-drv.c
+index 5796c8820514..3e4b46f8aa67 100644
+--- a/drivers/usb/c67x00/c67x00-drv.c
++++ b/drivers/usb/c67x00/c67x00-drv.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * c67x00-drv.c: Cypress C67X00 USB Common infrastructure
+ *
+diff --git a/drivers/usb/c67x00/c67x00-hcd.c b/drivers/usb/c67x00/c67x00-hcd.c
+index 30d3f346686e..705c40a0097d 100644
+--- a/drivers/usb/c67x00/c67x00-hcd.c
++++ b/drivers/usb/c67x00/c67x00-hcd.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * c67x00-hcd.c: Cypress C67X00 USB Host Controller Driver
+ *
+diff --git a/drivers/usb/c67x00/c67x00-hcd.h b/drivers/usb/c67x00/c67x00-hcd.h
+index cf8a455a6403..05ab1ba3b327 100644
+--- a/drivers/usb/c67x00/c67x00-hcd.h
++++ b/drivers/usb/c67x00/c67x00-hcd.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * c67x00-hcd.h: Cypress C67X00 USB HCD
+ *
+diff --git a/drivers/usb/c67x00/c67x00-ll-hpi.c b/drivers/usb/c67x00/c67x00-ll-hpi.c
+index b58151841e10..285f40aa16bf 100644
+--- a/drivers/usb/c67x00/c67x00-ll-hpi.c
++++ b/drivers/usb/c67x00/c67x00-ll-hpi.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * c67x00-ll-hpi.c: Cypress C67X00 USB Low level interface using HPI
+ *
+diff --git a/drivers/usb/c67x00/c67x00-sched.c b/drivers/usb/c67x00/c67x00-sched.c
+index 7311ed61e99a..d2a96eb457f7 100644
+--- a/drivers/usb/c67x00/c67x00-sched.c
++++ b/drivers/usb/c67x00/c67x00-sched.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * c67x00-sched.c: Cypress C67X00 USB Host Controller Driver - TD scheduling
+ *
+diff --git a/drivers/usb/c67x00/c67x00.h b/drivers/usb/c67x00/c67x00.h
+index a26e9ded0f32..31339d7f7a4b 100644
+--- a/drivers/usb/c67x00/c67x00.h
++++ b/drivers/usb/c67x00/c67x00.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * c67x00.h: Cypress C67X00 USB register and field definitions
+ *
+diff --git a/drivers/usb/chipidea/bits.h b/drivers/usb/chipidea/bits.h
+index e462f55c8b99..018a28e2e7d8 100644
+--- a/drivers/usb/chipidea/bits.h
++++ b/drivers/usb/chipidea/bits.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * bits.h - register bits of the ChipIdea USB IP core
+ *
+diff --git a/drivers/usb/chipidea/ci.h b/drivers/usb/chipidea/ci.h
+index 6743f85b1b7a..fa6dd9d9f5c6 100644
+--- a/drivers/usb/chipidea/ci.h
++++ b/drivers/usb/chipidea/ci.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * ci.h - common structures, functions, and macros of the ChipIdea driver
+ *
+diff --git a/drivers/usb/chipidea/ci_hdrc_imx.c b/drivers/usb/chipidea/ci_hdrc_imx.c
+index 5f4a8157fad8..9a2f7416ff9e 100644
+--- a/drivers/usb/chipidea/ci_hdrc_imx.c
++++ b/drivers/usb/chipidea/ci_hdrc_imx.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright (C) 2012 Marek Vasut <marex@denx.de>
+diff --git a/drivers/usb/chipidea/ci_hdrc_imx.h b/drivers/usb/chipidea/ci_hdrc_imx.h
+index d666c9f036ba..98a8b8c817ff 100644
+--- a/drivers/usb/chipidea/ci_hdrc_imx.h
++++ b/drivers/usb/chipidea/ci_hdrc_imx.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ *
+diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c b/drivers/usb/chipidea/ci_hdrc_msm.c
+index 53f3bf459dd1..eefa9eb6478d 100644
+--- a/drivers/usb/chipidea/ci_hdrc_msm.c
++++ b/drivers/usb/chipidea/ci_hdrc_msm.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+diff --git a/drivers/usb/chipidea/ci_hdrc_pci.c b/drivers/usb/chipidea/ci_hdrc_pci.c
+index 39414e4b2d81..a9dd661026bf 100644
+--- a/drivers/usb/chipidea/ci_hdrc_pci.c
++++ b/drivers/usb/chipidea/ci_hdrc_pci.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * ci_hdrc_pci.c - MIPS USB IP core family device controller
+ *
+diff --git a/drivers/usb/chipidea/ci_hdrc_usb2.c b/drivers/usb/chipidea/ci_hdrc_usb2.c
+index 99425db9ba62..41c5f8b9c0b9 100644
+--- a/drivers/usb/chipidea/ci_hdrc_usb2.c
++++ b/drivers/usb/chipidea/ci_hdrc_usb2.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2014 Marvell Technology Group Ltd.
+ *
+diff --git a/drivers/usb/chipidea/ci_hdrc_zevio.c b/drivers/usb/chipidea/ci_hdrc_zevio.c
+index 1264de505527..b8c75304d805 100644
+--- a/drivers/usb/chipidea/ci_hdrc_zevio.c
++++ b/drivers/usb/chipidea/ci_hdrc_zevio.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
+ *
+diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
+index 43ea5fb87b9a..708c2eaba81c 100644
+--- a/drivers/usb/chipidea/core.c
++++ b/drivers/usb/chipidea/core.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * core.c - ChipIdea USB IP core family device controller
+ *
+diff --git a/drivers/usb/chipidea/host.c b/drivers/usb/chipidea/host.c
+index 18cb8e46262d..a49e8567ac7d 100644
+--- a/drivers/usb/chipidea/host.c
++++ b/drivers/usb/chipidea/host.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * host.c - ChipIdea USB host controller driver
+ *
+diff --git a/drivers/usb/chipidea/otg.c b/drivers/usb/chipidea/otg.c
+index 10236fe71522..ef22fcc63f33 100644
+--- a/drivers/usb/chipidea/otg.c
++++ b/drivers/usb/chipidea/otg.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * otg.c - ChipIdea USB IP core OTG driver
+ *
+diff --git a/drivers/usb/chipidea/otg.h b/drivers/usb/chipidea/otg.h
+index 9ecb598e48f0..b8e2415bfa7c 100644
+--- a/drivers/usb/chipidea/otg.h
++++ b/drivers/usb/chipidea/otg.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2013-2014 Freescale Semiconductor, Inc.
+ *
+diff --git a/drivers/usb/chipidea/otg_fsm.c b/drivers/usb/chipidea/otg_fsm.c
+index 5ea0246f650d..485aaa1747e8 100644
+--- a/drivers/usb/chipidea/otg_fsm.c
++++ b/drivers/usb/chipidea/otg_fsm.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * otg_fsm.c - ChipIdea USB IP core OTG FSM driver
+ *
+diff --git a/drivers/usb/chipidea/otg_fsm.h b/drivers/usb/chipidea/otg_fsm.h
+index 6366fe398ba6..08e74aeea21d 100644
+--- a/drivers/usb/chipidea/otg_fsm.h
++++ b/drivers/usb/chipidea/otg_fsm.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ *
+diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c
+index fe8a90543ea3..b575bf171866 100644
+--- a/drivers/usb/chipidea/udc.c
++++ b/drivers/usb/chipidea/udc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * udc.c - ChipIdea UDC driver
+ *
+diff --git a/drivers/usb/chipidea/udc.h b/drivers/usb/chipidea/udc.h
+index 2ecd1174d66c..840275342873 100644
+--- a/drivers/usb/chipidea/udc.h
++++ b/drivers/usb/chipidea/udc.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * udc.h - ChipIdea UDC structures
+ *
+diff --git a/drivers/usb/chipidea/ulpi.c b/drivers/usb/chipidea/ulpi.c
+index 1219583dc1b2..c4e1900b9777 100644
+--- a/drivers/usb/chipidea/ulpi.c
++++ b/drivers/usb/chipidea/ulpi.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (c) 2016 Linaro Ltd.
+ *
+diff --git a/drivers/usb/chipidea/usbmisc_imx.c b/drivers/usb/chipidea/usbmisc_imx.c
+index 9f4a0185dd60..e3842238adeb 100644
+--- a/drivers/usb/chipidea/usbmisc_imx.c
++++ b/drivers/usb/chipidea/usbmisc_imx.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ *
+diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c
+index f2f31fc16f29..df5affe54b11 100644
+--- a/drivers/usb/class/cdc-acm.c
++++ b/drivers/usb/class/cdc-acm.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * cdc-acm.c
+ *
+diff --git a/drivers/usb/class/cdc-wdm.c b/drivers/usb/class/cdc-wdm.c
+index 3e865dbf878c..80529ac4b083 100644
+--- a/drivers/usb/class/cdc-wdm.c
++++ b/drivers/usb/class/cdc-wdm.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * cdc-wdm.c
+ *
+diff --git a/drivers/usb/class/usblp.c b/drivers/usb/class/usblp.c
+index fb87c17ed6fa..af771fa25800 100644
+--- a/drivers/usb/class/usblp.c
++++ b/drivers/usb/class/usblp.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * usblp.c
+ *
+diff --git a/drivers/usb/class/usbtmc.c b/drivers/usb/class/usbtmc.c
+index 6ebfabfa0dc7..c2f1e3f9946d 100644
+--- a/drivers/usb/class/usbtmc.c
++++ b/drivers/usb/class/usbtmc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /**
+ * drivers/usb/class/usbtmc.c - USB Test & Measurement class driver
+ *
+diff --git a/drivers/usb/common/common.c b/drivers/usb/common/common.c
+index 552ff7ac5a6b..2b45b0517b3d 100644
+--- a/drivers/usb/common/common.c
++++ b/drivers/usb/common/common.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Provides code common for host and device side USB.
+ *
+diff --git a/drivers/usb/common/led.c b/drivers/usb/common/led.c
+index df23da00a901..fd5538c8e067 100644
+--- a/drivers/usb/common/led.c
++++ b/drivers/usb/common/led.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * LED Triggers for USB Activity
+ *
+diff --git a/drivers/usb/common/ulpi.c b/drivers/usb/common/ulpi.c
+index e02acfb1ca95..315724ee9f07 100644
+--- a/drivers/usb/common/ulpi.c
++++ b/drivers/usb/common/ulpi.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /**
+ * ulpi.c - USB ULPI PHY bus
+ *
+diff --git a/drivers/usb/common/usb-otg-fsm.c b/drivers/usb/common/usb-otg-fsm.c
+index b8fe31e409a5..f960d5374ee0 100644
+--- a/drivers/usb/common/usb-otg-fsm.c
++++ b/drivers/usb/common/usb-otg-fsm.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * OTG Finite State Machine from OTG spec
+ *
+diff --git a/drivers/usb/core/devices.c b/drivers/usb/core/devices.c
+index 55dea2e7828f..1c8b6faa7e66 100644
+--- a/drivers/usb/core/devices.c
++++ b/drivers/usb/core/devices.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * devices.c
+ * (C) Copyright 1999 Randy Dunlap.
+diff --git a/drivers/usb/core/devio.c b/drivers/usb/core/devio.c
+index ab245352f102..85e1d230499f 100644
+--- a/drivers/usb/core/devio.c
++++ b/drivers/usb/core/devio.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*****************************************************************************/
+
+ /*
+diff --git a/drivers/usb/core/hcd-pci.c b/drivers/usb/core/hcd-pci.c
+index ea829ad798c0..07d5919ccae1 100644
+--- a/drivers/usb/core/hcd-pci.c
++++ b/drivers/usb/core/hcd-pci.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * (C) Copyright David Brownell 2000-2002
+ *
+diff --git a/drivers/usb/core/hcd.c b/drivers/usb/core/hcd.c
+index d0b2e0ed9bab..9fa30a6ada6e 100644
+--- a/drivers/usb/core/hcd.c
++++ b/drivers/usb/core/hcd.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * (C) Copyright Linus Torvalds 1999
+ * (C) Copyright Johannes Erdfelt 1999-2001
+diff --git a/drivers/usb/core/hub.h b/drivers/usb/core/hub.h
+index 34c1a7e22aae..7d29bf3f095b 100644
+--- a/drivers/usb/core/hub.h
++++ b/drivers/usb/core/hub.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * usb hub driver head file
+ *
+diff --git a/drivers/usb/core/ledtrig-usbport.c b/drivers/usb/core/ledtrig-usbport.c
+index 2de0444c95a8..68cebddde0b8 100644
+--- a/drivers/usb/core/ledtrig-usbport.c
++++ b/drivers/usb/core/ledtrig-usbport.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * USB port LED trigger
+ *
+diff --git a/drivers/usb/core/of.c b/drivers/usb/core/of.c
+index 3863bb1ce8c5..a95416d28aa6 100644
+--- a/drivers/usb/core/of.c
++++ b/drivers/usb/core/of.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * of.c The helpers for hcd device tree support
+ *
+diff --git a/drivers/usb/core/otg_whitelist.h b/drivers/usb/core/otg_whitelist.h
+index 085049d37d7a..4629f6e93954 100644
+--- a/drivers/usb/core/otg_whitelist.h
++++ b/drivers/usb/core/otg_whitelist.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * drivers/usb/core/otg_whitelist.h
+ *
+diff --git a/drivers/usb/core/port.c b/drivers/usb/core/port.c
+index 460c855be0d0..bd757a951a18 100644
+--- a/drivers/usb/core/port.c
++++ b/drivers/usb/core/port.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * usb port device code
+ *
+diff --git a/drivers/usb/core/quirks.c b/drivers/usb/core/quirks.c
+index 99f67764765f..bfd913ab5d7d 100644
+--- a/drivers/usb/core/quirks.c
++++ b/drivers/usb/core/quirks.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * USB device quirk handling logic and table
+ *
+diff --git a/drivers/usb/core/usb-acpi.c b/drivers/usb/core/usb-acpi.c
+index ef9cf4a21afe..90afee5079dc 100644
+--- a/drivers/usb/core/usb-acpi.c
++++ b/drivers/usb/core/usb-acpi.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * USB-ACPI glue code
+ *
+diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
+index 1b6612c2cdda..82a7d98c3436 100644
+--- a/drivers/usb/dwc2/core.c
++++ b/drivers/usb/dwc2/core.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+ /*
+ * core.c - DesignWare HS OTG Controller common routines
+ *
+diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
+index 3c0d386dc62f..70cea7441650 100644
+--- a/drivers/usb/dwc2/core.h
++++ b/drivers/usb/dwc2/core.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+ /*
+ * core.h - DesignWare HS OTG Controller common declarations
+ *
+diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
+index b8bcb007c92a..ab3fa1630853 100644
+--- a/drivers/usb/dwc2/core_intr.c
++++ b/drivers/usb/dwc2/core_intr.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+ /*
+ * core_intr.c - DesignWare HS OTG Controller common interrupt handling
+ *
+diff --git a/drivers/usb/dwc2/debug.h b/drivers/usb/dwc2/debug.h
+index 8222783e6822..7e2442bcbb2e 100644
+--- a/drivers/usb/dwc2/debug.h
++++ b/drivers/usb/dwc2/debug.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /**
+ * debug.h - Designware USB2 DRD controller debug header
+ *
+diff --git a/drivers/usb/dwc2/debugfs.c b/drivers/usb/dwc2/debugfs.c
+index 794b959a7c8c..c6492cca872f 100644
+--- a/drivers/usb/dwc2/debugfs.c
++++ b/drivers/usb/dwc2/debugfs.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /**
+ * debugfs.c - Designware USB2 DRD controller debugfs
+ *
+diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
+index e164439b2154..83c413511b17 100644
+--- a/drivers/usb/dwc2/gadget.c
++++ b/drivers/usb/dwc2/gadget.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /**
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
+index fa20ec43a187..32ccdb9c7f78 100644
+--- a/drivers/usb/dwc2/hcd.c
++++ b/drivers/usb/dwc2/hcd.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+ /*
+ * hcd.c - DesignWare HS OTG Controller host-mode routines
+ *
+diff --git a/drivers/usb/dwc2/hcd.h b/drivers/usb/dwc2/hcd.h
+index 461bdc67df6f..72e9bb4981f5 100644
+--- a/drivers/usb/dwc2/hcd.h
++++ b/drivers/usb/dwc2/hcd.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+ /*
+ * hcd.h - DesignWare HS OTG Controller host-mode declarations
+ *
+diff --git a/drivers/usb/dwc2/hcd_ddma.c b/drivers/usb/dwc2/hcd_ddma.c
+index b8bdf545c3a7..28c8898b3b66 100644
+--- a/drivers/usb/dwc2/hcd_ddma.c
++++ b/drivers/usb/dwc2/hcd_ddma.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+ /*
+ * hcd_ddma.c - DesignWare HS OTG Controller descriptor DMA routines
+ *
+diff --git a/drivers/usb/dwc2/hcd_intr.c b/drivers/usb/dwc2/hcd_intr.c
+index 17905ba1139c..4e462a30fbc9 100644
+--- a/drivers/usb/dwc2/hcd_intr.c
++++ b/drivers/usb/dwc2/hcd_intr.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+ /*
+ * hcd_intr.c - DesignWare HS OTG Controller host-mode interrupt handling
+ *
+diff --git a/drivers/usb/dwc2/hcd_queue.c b/drivers/usb/dwc2/hcd_queue.c
+index 56e61220efc6..2a915c5adfdb 100644
+--- a/drivers/usb/dwc2/hcd_queue.c
++++ b/drivers/usb/dwc2/hcd_queue.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+ /*
+ * hcd_queue.c - DesignWare HS OTG Controller host queuing routines
+ *
+diff --git a/drivers/usb/dwc2/hw.h b/drivers/usb/dwc2/hw.h
+index 4592012c4743..2c906d8ee465 100644
+--- a/drivers/usb/dwc2/hw.h
++++ b/drivers/usb/dwc2/hw.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+ /*
+ * hw.h - DesignWare HS OTG Controller hardware definitions
+ *
+diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
+index a3ffe97170ff..a0aa0c7cf645 100644
+--- a/drivers/usb/dwc2/params.c
++++ b/drivers/usb/dwc2/params.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+ /*
+ * Copyright (C) 2004-2016 Synopsys, Inc.
+ *
+diff --git a/drivers/usb/dwc2/pci.c b/drivers/usb/dwc2/pci.c
+index fdeb8c7bf30a..3ecc951a1aea 100644
+--- a/drivers/usb/dwc2/pci.c
++++ b/drivers/usb/dwc2/pci.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+ /*
+ * pci.c - DesignWare HS OTG Controller PCI driver
+ *
+diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
+index daf0d37acb37..3e26550d13dd 100644
+--- a/drivers/usb/dwc2/platform.c
++++ b/drivers/usb/dwc2/platform.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+ /*
+ * platform.c - DesignWare HS OTG Controller platform driver
+ *
+diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
+index 8b323a360e03..0855c26d2649 100644
+--- a/drivers/usb/dwc3/core.c
++++ b/drivers/usb/dwc3/core.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /**
+ * core.c - DesignWare USB3 DRD Controller Core file
+ *
+diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
+index abd1142c9e4d..371dc5140bae 100644
+--- a/drivers/usb/dwc3/core.h
++++ b/drivers/usb/dwc3/core.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * core.h - DesignWare USB3 DRD Core Header
+ *
+diff --git a/drivers/usb/dwc3/debug.h b/drivers/usb/dwc3/debug.h
+index 5e9c070ec874..2778d2d1e9b6 100644
+--- a/drivers/usb/dwc3/debug.h
++++ b/drivers/usb/dwc3/debug.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /**
+ * debug.h - DesignWare USB3 DRD Controller Debug Header
+ *
+diff --git a/drivers/usb/dwc3/debugfs.c b/drivers/usb/dwc3/debugfs.c
+index 4e09be80e59f..b104a8786896 100644
+--- a/drivers/usb/dwc3/debugfs.c
++++ b/drivers/usb/dwc3/debugfs.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /**
+ * debugfs.c - DesignWare USB3 DRD Controller DebugFS file
+ *
+diff --git a/drivers/usb/dwc3/drd.c b/drivers/usb/dwc3/drd.c
+index 2765c51c7ef5..a7e6803ba2e1 100644
+--- a/drivers/usb/dwc3/drd.c
++++ b/drivers/usb/dwc3/drd.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /**
+ * drd.c - DesignWare USB3 DRD Controller Dual-role support
+ *
+diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-exynos.c
+index e089df72f766..24294c3e3c9b 100644
+--- a/drivers/usb/dwc3/dwc3-exynos.c
++++ b/drivers/usb/dwc3/dwc3-exynos.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /**
+ * dwc3-exynos.c - Samsung EXYNOS DWC3 Specific Glue layer
+ *
+diff --git a/drivers/usb/dwc3/dwc3-keystone.c b/drivers/usb/dwc3/dwc3-keystone.c
+index d2ed9523e77c..7310646aec33 100644
+--- a/drivers/usb/dwc3/dwc3-keystone.c
++++ b/drivers/usb/dwc3/dwc3-keystone.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /**
+ * dwc3-keystone.c - Keystone Specific Glue layer
+ *
+diff --git a/drivers/usb/dwc3/dwc3-of-simple.c b/drivers/usb/dwc3/dwc3-of-simple.c
+index acf41ba3638d..5257d8b60bfa 100644
+--- a/drivers/usb/dwc3/dwc3-of-simple.c
++++ b/drivers/usb/dwc3/dwc3-of-simple.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /**
+ * dwc3-of-simple.c - OF glue layer for simple integrations
+ *
+diff --git a/drivers/usb/dwc3/dwc3-omap.c b/drivers/usb/dwc3/dwc3-omap.c
+index fdd0d5aa1f5e..4eb197f90b3a 100644
+--- a/drivers/usb/dwc3/dwc3-omap.c
++++ b/drivers/usb/dwc3/dwc3-omap.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /**
+ * dwc3-omap.c - OMAP Specific Glue layer
+ *
+diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c
+index 09c0454833ad..b0a1463c659a 100644
+--- a/drivers/usb/dwc3/dwc3-pci.c
++++ b/drivers/usb/dwc3/dwc3-pci.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /**
+ * dwc3-pci.c - PCI Specific glue layer
+ *
+diff --git a/drivers/usb/dwc3/dwc3-st.c b/drivers/usb/dwc3/dwc3-st.c
+index 505676fd3ba4..3d635df22568 100644
+--- a/drivers/usb/dwc3/dwc3-st.c
++++ b/drivers/usb/dwc3/dwc3-st.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /**
+ * dwc3-st.c Support for dwc3 platform devices on ST Microelectronics platforms
+ *
+diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
+index 89fe53c846ef..09973b017e01 100644
+--- a/drivers/usb/dwc3/ep0.c
++++ b/drivers/usb/dwc3/ep0.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * ep0.c - DesignWare USB3 DRD Controller Endpoint 0 Handling
+ *
+diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
+index d7fae66a0681..021ec29890b8 100644
+--- a/drivers/usb/dwc3/gadget.c
++++ b/drivers/usb/dwc3/gadget.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * gadget.c - DesignWare USB3 DRD Controller Gadget Framework Link
+ *
+diff --git a/drivers/usb/dwc3/gadget.h b/drivers/usb/dwc3/gadget.h
+index 4a3227543255..fe502e542c39 100644
+--- a/drivers/usb/dwc3/gadget.h
++++ b/drivers/usb/dwc3/gadget.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * gadget.h - DesignWare USB3 DRD Gadget Header
+ *
+diff --git a/drivers/usb/dwc3/host.c b/drivers/usb/dwc3/host.c
+index 76f0b0df37c1..8eddbe17e99e 100644
+--- a/drivers/usb/dwc3/host.c
++++ b/drivers/usb/dwc3/host.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /**
+ * host.c - DesignWare USB3 DRD Controller Host Glue
+ *
+diff --git a/drivers/usb/dwc3/io.h b/drivers/usb/dwc3/io.h
+index c69b06696824..085db0412ce0 100644
+--- a/drivers/usb/dwc3/io.h
++++ b/drivers/usb/dwc3/io.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /**
+ * io.h - DesignWare USB3 DRD IO Header
+ *
+diff --git a/drivers/usb/dwc3/trace.c b/drivers/usb/dwc3/trace.c
+index 6cd166412ad0..31acdc3ce436 100644
+--- a/drivers/usb/dwc3/trace.c
++++ b/drivers/usb/dwc3/trace.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /**
+ * trace.c - DesignWare USB3 DRD Controller Trace Support
+ *
+diff --git a/drivers/usb/dwc3/trace.h b/drivers/usb/dwc3/trace.h
+index 6504b116da04..9e6e10b2ea5c 100644
+--- a/drivers/usb/dwc3/trace.h
++++ b/drivers/usb/dwc3/trace.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /**
+ * trace.h - DesignWare USB3 DRD Controller Trace Support
+ *
+diff --git a/drivers/usb/dwc3/ulpi.c b/drivers/usb/dwc3/ulpi.c
+index e87ce8e9edee..5a6edbfc9e88 100644
+--- a/drivers/usb/dwc3/ulpi.c
++++ b/drivers/usb/dwc3/ulpi.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /**
+ * ulpi.c - DesignWare USB3 Controller's ULPI PHY interface
+ *
+diff --git a/drivers/usb/early/ehci-dbgp.c b/drivers/usb/early/ehci-dbgp.c
+index e2654443e8eb..d633c2abe5a4 100644
+--- a/drivers/usb/early/ehci-dbgp.c
++++ b/drivers/usb/early/ehci-dbgp.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Standalone EHCI usb debug driver
+ *
+diff --git a/drivers/usb/early/xhci-dbc.c b/drivers/usb/early/xhci-dbc.c
+index 12fe70beae69..6901a08a6866 100644
+--- a/drivers/usb/early/xhci-dbc.c
++++ b/drivers/usb/early/xhci-dbc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /**
+ * xhci-dbc.c - xHCI debug capability early driver
+ *
+diff --git a/drivers/usb/early/xhci-dbc.h b/drivers/usb/early/xhci-dbc.h
+index a516cab0bf4a..1107ef5f2ebd 100644
+--- a/drivers/usb/early/xhci-dbc.h
++++ b/drivers/usb/early/xhci-dbc.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * xhci-dbc.h - xHCI debug capability early driver
+ *
+diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
+index b805962f5154..cde9f6c6ba45 100644
+--- a/drivers/usb/gadget/composite.c
++++ b/drivers/usb/gadget/composite.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * composite.c - infrastructure for Composite USB Gadgets
+ *
+diff --git a/drivers/usb/gadget/config.c b/drivers/usb/gadget/config.c
+index 17a6077b89a4..80a75c038696 100644
+--- a/drivers/usb/gadget/config.c
++++ b/drivers/usb/gadget/config.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * usb/gadget/config.c -- simplify building config descriptors
+ *
+diff --git a/drivers/usb/gadget/configfs.c b/drivers/usb/gadget/configfs.c
+index aeb9f3c40521..4ddf063b9f47 100644
+--- a/drivers/usb/gadget/configfs.c
++++ b/drivers/usb/gadget/configfs.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ #include <linux/configfs.h>
+ #include <linux/module.h>
+ #include <linux/slab.h>
+diff --git a/drivers/usb/gadget/epautoconf.c b/drivers/usb/gadget/epautoconf.c
+index 30fdab0ae383..3a3b3027f234 100644
+--- a/drivers/usb/gadget/epautoconf.c
++++ b/drivers/usb/gadget/epautoconf.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * epautoconf.c -- endpoint autoconfiguration for usb gadget drivers
+ *
+diff --git a/drivers/usb/gadget/function/f_acm.c b/drivers/usb/gadget/function/f_acm.c
+index 5e3828d9dac7..5a2229784bd6 100644
+--- a/drivers/usb/gadget/function/f_acm.c
++++ b/drivers/usb/gadget/function/f_acm.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * f_acm.c -- USB CDC serial (ACM) function driver
+ *
+diff --git a/drivers/usb/gadget/function/f_ecm.c b/drivers/usb/gadget/function/f_ecm.c
+index 4c488d15b6f6..d2a83dd78cb9 100644
+--- a/drivers/usb/gadget/function/f_ecm.c
++++ b/drivers/usb/gadget/function/f_ecm.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * f_ecm.c -- USB CDC Ethernet (ECM) link function driver
+ *
+diff --git a/drivers/usb/gadget/function/f_eem.c b/drivers/usb/gadget/function/f_eem.c
+index 007ec6e4a5d4..bfb4cacc8b8e 100644
+--- a/drivers/usb/gadget/function/f_eem.c
++++ b/drivers/usb/gadget/function/f_eem.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * f_eem.c -- USB CDC Ethernet (EEM) link function driver
+ *
+diff --git a/drivers/usb/gadget/function/f_fs.c b/drivers/usb/gadget/function/f_fs.c
+index 17467545391b..3910c1cda7a5 100644
+--- a/drivers/usb/gadget/function/f_fs.c
++++ b/drivers/usb/gadget/function/f_fs.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * f_fs.c -- user mode file system API for USB composite function controllers
+ *
+diff --git a/drivers/usb/gadget/function/f_hid.c b/drivers/usb/gadget/function/f_hid.c
+index d8e359ef6eb1..fc1d9282c1d9 100644
+--- a/drivers/usb/gadget/function/f_hid.c
++++ b/drivers/usb/gadget/function/f_hid.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * f_hid.c -- USB HID function driver
+ *
+diff --git a/drivers/usb/gadget/function/f_loopback.c b/drivers/usb/gadget/function/f_loopback.c
+index e70093835e14..2dea6e63ef4d 100644
+--- a/drivers/usb/gadget/function/f_loopback.c
++++ b/drivers/usb/gadget/function/f_loopback.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * f_loopback.c - USB peripheral loopback configuration driver
+ *
+diff --git a/drivers/usb/gadget/function/f_mass_storage.c b/drivers/usb/gadget/function/f_mass_storage.c
+index 5153e29870c3..697224237976 100644
+--- a/drivers/usb/gadget/function/f_mass_storage.c
++++ b/drivers/usb/gadget/function/f_mass_storage.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+ /*
+ * f_mass_storage.c -- Mass Storage USB Composite Function
+ *
+diff --git a/drivers/usb/gadget/function/f_midi.c b/drivers/usb/gadget/function/f_midi.c
+index 71cf552b8828..8e43a6459c73 100644
+--- a/drivers/usb/gadget/function/f_midi.c
++++ b/drivers/usb/gadget/function/f_midi.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * f_midi.c -- USB MIDI class function driver
+ *
+diff --git a/drivers/usb/gadget/function/f_ncm.c b/drivers/usb/gadget/function/f_ncm.c
+index 45b334ceaf2e..a45e6174a387 100644
+--- a/drivers/usb/gadget/function/f_ncm.c
++++ b/drivers/usb/gadget/function/f_ncm.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * f_ncm.c -- USB CDC Network (NCM) link function driver
+ *
+diff --git a/drivers/usb/gadget/function/f_obex.c b/drivers/usb/gadget/function/f_obex.c
+index d43e86cea74f..34e81d888b24 100644
+--- a/drivers/usb/gadget/function/f_obex.c
++++ b/drivers/usb/gadget/function/f_obex.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * f_obex.c -- USB CDC OBEX function driver
+ *
+diff --git a/drivers/usb/gadget/function/f_phonet.c b/drivers/usb/gadget/function/f_phonet.c
+index 9c4c58e4a1a2..1dc3aa62223d 100644
+--- a/drivers/usb/gadget/function/f_phonet.c
++++ b/drivers/usb/gadget/function/f_phonet.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * f_phonet.c -- USB CDC Phonet function
+ *
+diff --git a/drivers/usb/gadget/function/f_printer.c b/drivers/usb/gadget/function/f_printer.c
+index e6d4fa5eeff1..7e8da6af745e 100644
+--- a/drivers/usb/gadget/function/f_printer.c
++++ b/drivers/usb/gadget/function/f_printer.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * f_printer.c - USB printer function driver
+ *
+diff --git a/drivers/usb/gadget/function/f_rndis.c b/drivers/usb/gadget/function/f_rndis.c
+index c7c5b3ce1d98..355e2308bd7a 100644
+--- a/drivers/usb/gadget/function/f_rndis.c
++++ b/drivers/usb/gadget/function/f_rndis.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * f_rndis.c -- RNDIS link function driver
+ *
+diff --git a/drivers/usb/gadget/function/f_serial.c b/drivers/usb/gadget/function/f_serial.c
+index cb00ada21d9c..9dae136d81e4 100644
+--- a/drivers/usb/gadget/function/f_serial.c
++++ b/drivers/usb/gadget/function/f_serial.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * f_serial.c - generic USB serial function driver
+ *
+diff --git a/drivers/usb/gadget/function/f_sourcesink.c b/drivers/usb/gadget/function/f_sourcesink.c
+index 8784fa12ea2c..4581b172ced7 100644
+--- a/drivers/usb/gadget/function/f_sourcesink.c
++++ b/drivers/usb/gadget/function/f_sourcesink.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * f_sourcesink.c - USB peripheral source/sink configuration driver
+ *
+diff --git a/drivers/usb/gadget/function/f_subset.c b/drivers/usb/gadget/function/f_subset.c
+index 434b983f3b4c..8e13415cf91e 100644
+--- a/drivers/usb/gadget/function/f_subset.c
++++ b/drivers/usb/gadget/function/f_subset.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * f_subset.c -- "CDC Subset" Ethernet link function driver
+ *
+diff --git a/drivers/usb/gadget/function/f_tcm.c b/drivers/usb/gadget/function/f_tcm.c
+index a82e2bd5ea34..5f2890902270 100644
+--- a/drivers/usb/gadget/function/f_tcm.c
++++ b/drivers/usb/gadget/function/f_tcm.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /* Target based USB-Gadget
+ *
+ * UAS protocol handling, target callbacks, configfs handling,
+diff --git a/drivers/usb/gadget/function/f_uac1.c b/drivers/usb/gadget/function/f_uac1.c
+index 29efbedc91f9..9dc33cbcc06c 100644
+--- a/drivers/usb/gadget/function/f_uac1.c
++++ b/drivers/usb/gadget/function/f_uac1.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * f_uac1.c -- USB Audio Class 1.0 Function (using u_audio API)
+ *
+diff --git a/drivers/usb/gadget/function/f_uac1_legacy.c b/drivers/usb/gadget/function/f_uac1_legacy.c
+index 5d229e72912e..83d33ee3c40a 100644
+--- a/drivers/usb/gadget/function/f_uac1_legacy.c
++++ b/drivers/usb/gadget/function/f_uac1_legacy.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * f_audio.c -- USB Audio class function driver
+ *
+diff --git a/drivers/usb/gadget/function/f_uac2.c b/drivers/usb/gadget/function/f_uac2.c
+index d063f0401f84..c64662849e79 100644
+--- a/drivers/usb/gadget/function/f_uac2.c
++++ b/drivers/usb/gadget/function/f_uac2.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * f_uac2.c -- USB Audio Class 2.0 Function
+ *
+diff --git a/drivers/usb/gadget/function/f_uvc.c b/drivers/usb/gadget/function/f_uvc.c
+index f8a1881609a2..67af76361e7f 100644
+--- a/drivers/usb/gadget/function/f_uvc.c
++++ b/drivers/usb/gadget/function/f_uvc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * uvc_gadget.c -- USB Video Class Gadget driver
+ *
+diff --git a/drivers/usb/gadget/function/f_uvc.h b/drivers/usb/gadget/function/f_uvc.h
+index d0a73bdcbba1..b78d1af0aa9c 100644
+--- a/drivers/usb/gadget/function/f_uvc.h
++++ b/drivers/usb/gadget/function/f_uvc.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * f_uvc.h -- USB Video Class Gadget driver
+ *
+diff --git a/drivers/usb/gadget/function/rndis.c b/drivers/usb/gadget/function/rndis.c
+index d6341045c631..ac8a5476d968 100644
+--- a/drivers/usb/gadget/function/rndis.c
++++ b/drivers/usb/gadget/function/rndis.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * RNDIS MSG parser
+ *
+diff --git a/drivers/usb/gadget/function/rndis.h b/drivers/usb/gadget/function/rndis.h
+index 21e0430ffb98..f3bbd224cc16 100644
+--- a/drivers/usb/gadget/function/rndis.h
++++ b/drivers/usb/gadget/function/rndis.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * RNDIS Definitions for Remote NDIS
+ *
+diff --git a/drivers/usb/gadget/function/storage_common.c b/drivers/usb/gadget/function/storage_common.c
+index 8fbf6861690d..1beb7ce507ce 100644
+--- a/drivers/usb/gadget/function/storage_common.c
++++ b/drivers/usb/gadget/function/storage_common.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * storage_common.c -- Common definitions for mass storage functionality
+ *
+diff --git a/drivers/usb/gadget/function/u_audio.c b/drivers/usb/gadget/function/u_audio.c
+index d3a639297e06..f21bede8cf90 100644
+--- a/drivers/usb/gadget/function/u_audio.c
++++ b/drivers/usb/gadget/function/u_audio.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * u_audio.c -- interface to USB gadget "ALSA sound card" utilities
+ *
+diff --git a/drivers/usb/gadget/function/u_audio.h b/drivers/usb/gadget/function/u_audio.h
+index 07e13784cbb8..fae06fa2ef5d 100644
+--- a/drivers/usb/gadget/function/u_audio.h
++++ b/drivers/usb/gadget/function/u_audio.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * u_audio.h -- interface to USB gadget "ALSA sound card" utilities
+ *
+diff --git a/drivers/usb/gadget/function/u_ecm.h b/drivers/usb/gadget/function/u_ecm.h
+index 262cc03cc2c0..320cd890bb0e 100644
+--- a/drivers/usb/gadget/function/u_ecm.h
++++ b/drivers/usb/gadget/function/u_ecm.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * u_ecm.h
+ *
+diff --git a/drivers/usb/gadget/function/u_eem.h b/drivers/usb/gadget/function/u_eem.h
+index e3ae97874c4f..b756664f9c5e 100644
+--- a/drivers/usb/gadget/function/u_eem.h
++++ b/drivers/usb/gadget/function/u_eem.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * u_eem.h
+ *
+diff --git a/drivers/usb/gadget/function/u_ether.c b/drivers/usb/gadget/function/u_ether.c
+index bdbc3fdc7c4f..247eb69cb99b 100644
+--- a/drivers/usb/gadget/function/u_ether.c
++++ b/drivers/usb/gadget/function/u_ether.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * u_ether.c -- Ethernet-over-USB link layer utilities for Gadget stack
+ *
+diff --git a/drivers/usb/gadget/function/u_ether.h b/drivers/usb/gadget/function/u_ether.h
+index c77145bd6b5b..015084eda722 100644
+--- a/drivers/usb/gadget/function/u_ether.h
++++ b/drivers/usb/gadget/function/u_ether.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * u_ether.h -- interface to USB gadget "ethernet link" utilities
+ *
+diff --git a/drivers/usb/gadget/function/u_ether_configfs.h b/drivers/usb/gadget/function/u_ether_configfs.h
+index e4c3f84af4c3..0f303fc288fa 100644
+--- a/drivers/usb/gadget/function/u_ether_configfs.h
++++ b/drivers/usb/gadget/function/u_ether_configfs.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * u_ether_configfs.h
+ *
+diff --git a/drivers/usb/gadget/function/u_fs.h b/drivers/usb/gadget/function/u_fs.h
+index 79f70ebf85dc..79a585ce51c1 100644
+--- a/drivers/usb/gadget/function/u_fs.h
++++ b/drivers/usb/gadget/function/u_fs.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * u_fs.h
+ *
+diff --git a/drivers/usb/gadget/function/u_gether.h b/drivers/usb/gadget/function/u_gether.h
+index d4078426ba5d..b9643d83b5cc 100644
+--- a/drivers/usb/gadget/function/u_gether.h
++++ b/drivers/usb/gadget/function/u_gether.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * u_gether.h
+ *
+diff --git a/drivers/usb/gadget/function/u_hid.h b/drivers/usb/gadget/function/u_hid.h
+index aaa0e368a159..5c9cae57b41a 100644
+--- a/drivers/usb/gadget/function/u_hid.h
++++ b/drivers/usb/gadget/function/u_hid.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * u_hid.h
+ *
+diff --git a/drivers/usb/gadget/function/u_midi.h b/drivers/usb/gadget/function/u_midi.h
+index 22510189758e..0b3e14bb9021 100644
+--- a/drivers/usb/gadget/function/u_midi.h
++++ b/drivers/usb/gadget/function/u_midi.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * u_midi.h
+ *
+diff --git a/drivers/usb/gadget/function/u_ncm.h b/drivers/usb/gadget/function/u_ncm.h
+index ce0f3a78ca13..e90054039f40 100644
+--- a/drivers/usb/gadget/function/u_ncm.h
++++ b/drivers/usb/gadget/function/u_ncm.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * u_ncm.h
+ *
+diff --git a/drivers/usb/gadget/function/u_phonet.h b/drivers/usb/gadget/function/u_phonet.h
+index 98ced18779ea..5387ed46f415 100644
+--- a/drivers/usb/gadget/function/u_phonet.h
++++ b/drivers/usb/gadget/function/u_phonet.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * u_phonet.h - interface to Phonet
+ *
+diff --git a/drivers/usb/gadget/function/u_printer.h b/drivers/usb/gadget/function/u_printer.h
+index 8d30b7577f87..65737e58259a 100644
+--- a/drivers/usb/gadget/function/u_printer.h
++++ b/drivers/usb/gadget/function/u_printer.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * u_printer.h
+ *
+diff --git a/drivers/usb/gadget/function/u_rndis.h b/drivers/usb/gadget/function/u_rndis.h
+index efdb7ac381d9..87d365d9cf5d 100644
+--- a/drivers/usb/gadget/function/u_rndis.h
++++ b/drivers/usb/gadget/function/u_rndis.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * u_rndis.h
+ *
+diff --git a/drivers/usb/gadget/function/u_serial.c b/drivers/usb/gadget/function/u_serial.c
+index 4176216d54be..b0ab05716f2b 100644
+--- a/drivers/usb/gadget/function/u_serial.c
++++ b/drivers/usb/gadget/function/u_serial.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * u_serial.c - utilities for USB gadget "serial port"/TTY support
+ *
+diff --git a/drivers/usb/gadget/function/u_serial.h b/drivers/usb/gadget/function/u_serial.h
+index c20210c0babd..44617b205bc7 100644
+--- a/drivers/usb/gadget/function/u_serial.h
++++ b/drivers/usb/gadget/function/u_serial.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * u_serial.h - interface to USB gadget "serial port"/TTY utilities
+ *
+diff --git a/drivers/usb/gadget/function/u_tcm.h b/drivers/usb/gadget/function/u_tcm.h
+index 0bd751e0483f..1ec6f702d400 100644
+--- a/drivers/usb/gadget/function/u_tcm.h
++++ b/drivers/usb/gadget/function/u_tcm.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * u_tcm.h
+ *
+diff --git a/drivers/usb/gadget/function/u_uac1.h b/drivers/usb/gadget/function/u_uac1.h
+index 6f188fd8633f..84e05cc42659 100644
+--- a/drivers/usb/gadget/function/u_uac1.h
++++ b/drivers/usb/gadget/function/u_uac1.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * u_uac1.h - Utility definitions for UAC1 function
+ *
+diff --git a/drivers/usb/gadget/function/u_uac1_legacy.c b/drivers/usb/gadget/function/u_uac1_legacy.c
+index fa4684a1c54c..0f66c4b4f772 100644
+--- a/drivers/usb/gadget/function/u_uac1_legacy.c
++++ b/drivers/usb/gadget/function/u_uac1_legacy.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * u_uac1.c -- ALSA audio utilities for Gadget stack
+ *
+diff --git a/drivers/usb/gadget/function/u_uac1_legacy.h b/drivers/usb/gadget/function/u_uac1_legacy.h
+index d715b1af56a4..ad77043567cd 100644
+--- a/drivers/usb/gadget/function/u_uac1_legacy.h
++++ b/drivers/usb/gadget/function/u_uac1_legacy.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * u_uac1.h -- interface to USB gadget "ALSA AUDIO" utilities
+ *
+diff --git a/drivers/usb/gadget/function/u_uac2.h b/drivers/usb/gadget/function/u_uac2.h
+index 19eeb83538a5..6ad31b29df8a 100644
+--- a/drivers/usb/gadget/function/u_uac2.h
++++ b/drivers/usb/gadget/function/u_uac2.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * u_uac2.h
+ *
+diff --git a/drivers/usb/gadget/function/u_uvc.h b/drivers/usb/gadget/function/u_uvc.h
+index 4676b60a5063..ec5b5e6839b3 100644
+--- a/drivers/usb/gadget/function/u_uvc.h
++++ b/drivers/usb/gadget/function/u_uvc.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * u_uvc.h
+ *
+diff --git a/drivers/usb/gadget/function/uvc.h b/drivers/usb/gadget/function/uvc.h
+index 11d70dead32b..f6388ddad19f 100644
+--- a/drivers/usb/gadget/function/uvc.h
++++ b/drivers/usb/gadget/function/uvc.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * uvc_gadget.h -- USB Video Class Gadget driver
+ *
+diff --git a/drivers/usb/gadget/function/uvc_configfs.c b/drivers/usb/gadget/function/uvc_configfs.c
+index 844cb738bafd..66f1312d50e7 100644
+--- a/drivers/usb/gadget/function/uvc_configfs.c
++++ b/drivers/usb/gadget/function/uvc_configfs.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * uvc_configfs.c
+ *
+diff --git a/drivers/usb/gadget/function/uvc_configfs.h b/drivers/usb/gadget/function/uvc_configfs.h
+index 085e67be7c71..f604bcb241ea 100644
+--- a/drivers/usb/gadget/function/uvc_configfs.h
++++ b/drivers/usb/gadget/function/uvc_configfs.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * uvc_configfs.h
+ *
+diff --git a/drivers/usb/gadget/function/uvc_queue.c b/drivers/usb/gadget/function/uvc_queue.c
+index 6377e9fee6e5..6c819d9fa7af 100644
+--- a/drivers/usb/gadget/function/uvc_queue.c
++++ b/drivers/usb/gadget/function/uvc_queue.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * uvc_queue.c -- USB Video Class driver - Buffers management
+ *
+diff --git a/drivers/usb/gadget/function/uvc_v4l2.c b/drivers/usb/gadget/function/uvc_v4l2.c
+index 3e22b45687d3..207df9e51d34 100644
+--- a/drivers/usb/gadget/function/uvc_v4l2.c
++++ b/drivers/usb/gadget/function/uvc_v4l2.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * uvc_v4l2.c -- USB Video Class Gadget driver
+ *
+diff --git a/drivers/usb/gadget/function/uvc_v4l2.h b/drivers/usb/gadget/function/uvc_v4l2.h
+index 2683b92fda65..0b3a2a88799d 100644
+--- a/drivers/usb/gadget/function/uvc_v4l2.h
++++ b/drivers/usb/gadget/function/uvc_v4l2.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * uvc_v4l2.h -- USB Video Class Gadget driver
+ *
+diff --git a/drivers/usb/gadget/function/uvc_video.c b/drivers/usb/gadget/function/uvc_video.c
+index 0f01c04d7cbd..29d81ac02391 100644
+--- a/drivers/usb/gadget/function/uvc_video.c
++++ b/drivers/usb/gadget/function/uvc_video.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * uvc_video.c -- USB Video Class Gadget driver
+ *
+diff --git a/drivers/usb/gadget/function/uvc_video.h b/drivers/usb/gadget/function/uvc_video.h
+index ef00f06fa00b..1c48a8bdca02 100644
+--- a/drivers/usb/gadget/function/uvc_video.h
++++ b/drivers/usb/gadget/function/uvc_video.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * uvc_video.h -- USB Video Class Gadget driver
+ *
+diff --git a/drivers/usb/gadget/functions.c b/drivers/usb/gadget/functions.c
+index b13f839e7368..203361a64212 100644
+--- a/drivers/usb/gadget/functions.c
++++ b/drivers/usb/gadget/functions.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ #include <linux/kernel.h>
+ #include <linux/slab.h>
+ #include <linux/module.h>
+diff --git a/drivers/usb/gadget/legacy/acm_ms.c b/drivers/usb/gadget/legacy/acm_ms.c
+index c39de65a448b..eed2cb6483b6 100644
+--- a/drivers/usb/gadget/legacy/acm_ms.c
++++ b/drivers/usb/gadget/legacy/acm_ms.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * acm_ms.c -- Composite driver, with ACM and mass storage support
+ *
+diff --git a/drivers/usb/gadget/legacy/audio.c b/drivers/usb/gadget/legacy/audio.c
+index 1f5cdbe162df..d0bffaa0bc09 100644
+--- a/drivers/usb/gadget/legacy/audio.c
++++ b/drivers/usb/gadget/legacy/audio.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * audio.c -- Audio gadget driver
+ *
+diff --git a/drivers/usb/gadget/legacy/cdc2.c b/drivers/usb/gadget/legacy/cdc2.c
+index 51c08682de84..074c0d4efcf9 100644
+--- a/drivers/usb/gadget/legacy/cdc2.c
++++ b/drivers/usb/gadget/legacy/cdc2.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * cdc2.c -- CDC Composite driver, with ECM and ACM support
+ *
+diff --git a/drivers/usb/gadget/legacy/dbgp.c b/drivers/usb/gadget/legacy/dbgp.c
+index 99ca3dabc4f3..e1d566c9918a 100644
+--- a/drivers/usb/gadget/legacy/dbgp.c
++++ b/drivers/usb/gadget/legacy/dbgp.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * dbgp.c -- EHCI Debug Port device gadget
+ *
+diff --git a/drivers/usb/gadget/legacy/ether.c b/drivers/usb/gadget/legacy/ether.c
+index 25a2c2e48592..8eb0043f6697 100644
+--- a/drivers/usb/gadget/legacy/ether.c
++++ b/drivers/usb/gadget/legacy/ether.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * ether.c -- Ethernet gadget driver, with CDC and non-CDC options
+ *
+diff --git a/drivers/usb/gadget/legacy/g_ffs.c b/drivers/usb/gadget/legacy/g_ffs.c
+index 6da7316f8e87..95db302cec7d 100644
+--- a/drivers/usb/gadget/legacy/g_ffs.c
++++ b/drivers/usb/gadget/legacy/g_ffs.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * g_ffs.c -- user mode file system API for USB composite function controllers
+ *
+diff --git a/drivers/usb/gadget/legacy/gmidi.c b/drivers/usb/gadget/legacy/gmidi.c
+index 0bf39c3ccdb1..c03674b02718 100644
+--- a/drivers/usb/gadget/legacy/gmidi.c
++++ b/drivers/usb/gadget/legacy/gmidi.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * gmidi.c -- USB MIDI Gadget Driver
+ *
+diff --git a/drivers/usb/gadget/legacy/hid.c b/drivers/usb/gadget/legacy/hid.c
+index a71a884f79fc..c9fb9a3c034f 100644
+--- a/drivers/usb/gadget/legacy/hid.c
++++ b/drivers/usb/gadget/legacy/hid.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * hid.c -- HID Composite driver
+ *
+diff --git a/drivers/usb/gadget/legacy/inode.c b/drivers/usb/gadget/legacy/inode.c
+index 5c28bee327e1..ae4fe683f7e0 100644
+--- a/drivers/usb/gadget/legacy/inode.c
++++ b/drivers/usb/gadget/legacy/inode.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * inode.c -- user mode filesystem api for usb gadget controllers
+ *
+diff --git a/drivers/usb/gadget/legacy/mass_storage.c b/drivers/usb/gadget/legacy/mass_storage.c
+index fcba59782f26..3700cd272d75 100644
+--- a/drivers/usb/gadget/legacy/mass_storage.c
++++ b/drivers/usb/gadget/legacy/mass_storage.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * mass_storage.c -- Mass Storage USB Gadget
+ *
+diff --git a/drivers/usb/gadget/legacy/multi.c b/drivers/usb/gadget/legacy/multi.c
+index a70a406580ea..7dc276c68b54 100644
+--- a/drivers/usb/gadget/legacy/multi.c
++++ b/drivers/usb/gadget/legacy/multi.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * multi.c -- Multifunction Composite driver
+ *
+diff --git a/drivers/usb/gadget/legacy/ncm.c b/drivers/usb/gadget/legacy/ncm.c
+index 0aba68253e3d..7bfd306ea1ee 100644
+--- a/drivers/usb/gadget/legacy/ncm.c
++++ b/drivers/usb/gadget/legacy/ncm.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * ncm.c -- NCM gadget driver
+ *
+diff --git a/drivers/usb/gadget/legacy/nokia.c b/drivers/usb/gadget/legacy/nokia.c
+index b1e535f4022e..f10dd6e19cc9 100644
+--- a/drivers/usb/gadget/legacy/nokia.c
++++ b/drivers/usb/gadget/legacy/nokia.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * nokia.c -- Nokia Composite Gadget Driver
+ *
+diff --git a/drivers/usb/gadget/legacy/printer.c b/drivers/usb/gadget/legacy/printer.c
+index 4c9cfff34a03..6e1eef41ad86 100644
+--- a/drivers/usb/gadget/legacy/printer.c
++++ b/drivers/usb/gadget/legacy/printer.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * printer.c -- Printer gadget driver
+ *
+diff --git a/drivers/usb/gadget/legacy/serial.c b/drivers/usb/gadget/legacy/serial.c
+index 9d89adce756d..e84cb9f97b5d 100644
+--- a/drivers/usb/gadget/legacy/serial.c
++++ b/drivers/usb/gadget/legacy/serial.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * serial.c -- USB gadget serial driver
+ *
+diff --git a/drivers/usb/gadget/legacy/tcm_usb_gadget.c b/drivers/usb/gadget/legacy/tcm_usb_gadget.c
+index 0b0bb98319cd..1089cb118b66 100644
+--- a/drivers/usb/gadget/legacy/tcm_usb_gadget.c
++++ b/drivers/usb/gadget/legacy/tcm_usb_gadget.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /* Target based USB-Gadget
+ *
+ * UAS protocol handling, target callbacks, configfs handling,
+diff --git a/drivers/usb/gadget/legacy/webcam.c b/drivers/usb/gadget/legacy/webcam.c
+index 82c13fce9232..a3929a38ede9 100644
+--- a/drivers/usb/gadget/legacy/webcam.c
++++ b/drivers/usb/gadget/legacy/webcam.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * webcam.c -- USB webcam gadget driver
+ *
+diff --git a/drivers/usb/gadget/legacy/zero.c b/drivers/usb/gadget/legacy/zero.c
+index d02e2ce73ea5..521f4484ad4d 100644
+--- a/drivers/usb/gadget/legacy/zero.c
++++ b/drivers/usb/gadget/legacy/zero.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * zero.c -- Gadget Zero, for USB development
+ *
+diff --git a/drivers/usb/gadget/u_f.c b/drivers/usb/gadget/u_f.c
+index 18839732c840..f52fb321d266 100644
+--- a/drivers/usb/gadget/u_f.c
++++ b/drivers/usb/gadget/u_f.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * u_f.c -- USB function utilities for Gadget stack
+ *
+diff --git a/drivers/usb/gadget/u_f.h b/drivers/usb/gadget/u_f.h
+index 2f03334c6874..0fb702c8a250 100644
+--- a/drivers/usb/gadget/u_f.h
++++ b/drivers/usb/gadget/u_f.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * u_f.h
+ *
+diff --git a/drivers/usb/gadget/u_os_desc.h b/drivers/usb/gadget/u_os_desc.h
+index 947b7ddff691..cfa53a204de1 100644
+--- a/drivers/usb/gadget/u_os_desc.h
++++ b/drivers/usb/gadget/u_os_desc.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * u_os_desc.h
+ *
+diff --git a/drivers/usb/gadget/udc/amd5536udc.h b/drivers/usb/gadget/udc/amd5536udc.h
+index 4fe22d432af2..5a92388ef8bb 100644
+--- a/drivers/usb/gadget/udc/amd5536udc.h
++++ b/drivers/usb/gadget/udc/amd5536udc.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * amd5536.h -- header for AMD 5536 UDC high/full speed USB device controller
+ *
+diff --git a/drivers/usb/gadget/udc/amd5536udc_pci.c b/drivers/usb/gadget/udc/amd5536udc_pci.c
+index 57a13f080a79..cf9117e84534 100644
+--- a/drivers/usb/gadget/udc/amd5536udc_pci.c
++++ b/drivers/usb/gadget/udc/amd5536udc_pci.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * amd5536udc_pci.c -- AMD 5536 UDC high/full speed USB device controller
+ *
+diff --git a/drivers/usb/gadget/udc/at91_udc.c b/drivers/usb/gadget/udc/at91_udc.c
+index 8bc78418d40e..972f78409df7 100644
+--- a/drivers/usb/gadget/udc/at91_udc.c
++++ b/drivers/usb/gadget/udc/at91_udc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * at91_udc -- driver for at91-series USB peripheral controller
+ *
+diff --git a/drivers/usb/gadget/udc/at91_udc.h b/drivers/usb/gadget/udc/at91_udc.h
+index 9bbe72764f31..9581a868032e 100644
+--- a/drivers/usb/gadget/udc/at91_udc.h
++++ b/drivers/usb/gadget/udc/at91_udc.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2004 by Thomas Rathbone, HP Labs
+ * Copyright (C) 2005 by Ivan Kokshaysky
+diff --git a/drivers/usb/gadget/udc/atmel_usba_udc.c b/drivers/usb/gadget/udc/atmel_usba_udc.c
+index a884c022df7a..12543decf9ab 100644
+--- a/drivers/usb/gadget/udc/atmel_usba_udc.c
++++ b/drivers/usb/gadget/udc/atmel_usba_udc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Driver for the Atmel USBA high speed USB device controller
+ *
+diff --git a/drivers/usb/gadget/udc/atmel_usba_udc.h b/drivers/usb/gadget/udc/atmel_usba_udc.h
+index f8ebe0389bd4..10df5e4aaeb2 100644
+--- a/drivers/usb/gadget/udc/atmel_usba_udc.h
++++ b/drivers/usb/gadget/udc/atmel_usba_udc.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Driver for the Atmel USBA high speed USB device controller
+ *
+diff --git a/drivers/usb/gadget/udc/bcm63xx_udc.c b/drivers/usb/gadget/udc/bcm63xx_udc.c
+index f78503203f42..403cb339fd7b 100644
+--- a/drivers/usb/gadget/udc/bcm63xx_udc.c
++++ b/drivers/usb/gadget/udc/bcm63xx_udc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * bcm63xx_udc.c -- BCM63xx UDC high/full speed USB device controller
+ *
+diff --git a/drivers/usb/gadget/udc/bdc/bdc.h b/drivers/usb/gadget/udc/bdc/bdc.h
+index 6df0352cdc50..960620bccc25 100644
+--- a/drivers/usb/gadget/udc/bdc/bdc.h
++++ b/drivers/usb/gadget/udc/bdc/bdc.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * bdc.h - header for the BRCM BDC USB3.0 device controller
+ *
+diff --git a/drivers/usb/gadget/udc/bdc/bdc_cmd.c b/drivers/usb/gadget/udc/bdc/bdc_cmd.c
+index 6e920f1dce02..ad3240375f87 100644
+--- a/drivers/usb/gadget/udc/bdc/bdc_cmd.c
++++ b/drivers/usb/gadget/udc/bdc/bdc_cmd.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * bdc_cmd.c - BRCM BDC USB3.0 device controller
+ *
+diff --git a/drivers/usb/gadget/udc/bdc/bdc_cmd.h b/drivers/usb/gadget/udc/bdc/bdc_cmd.h
+index 61d0e3bf9853..64648fbef233 100644
+--- a/drivers/usb/gadget/udc/bdc/bdc_cmd.h
++++ b/drivers/usb/gadget/udc/bdc/bdc_cmd.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * bdc_cmd.h - header for the BDC debug functions
+ *
+diff --git a/drivers/usb/gadget/udc/bdc/bdc_core.c b/drivers/usb/gadget/udc/bdc/bdc_core.c
+index 7a8af4b916cf..2ab6a6b45f9e 100644
+--- a/drivers/usb/gadget/udc/bdc/bdc_core.c
++++ b/drivers/usb/gadget/udc/bdc/bdc_core.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * bdc_core.c - BRCM BDC USB3.0 device controller core operations
+ *
+diff --git a/drivers/usb/gadget/udc/bdc/bdc_dbg.c b/drivers/usb/gadget/udc/bdc/bdc_dbg.c
+index ac98f6f681b7..11216cd6cb94 100644
+--- a/drivers/usb/gadget/udc/bdc/bdc_dbg.c
++++ b/drivers/usb/gadget/udc/bdc/bdc_dbg.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * bdc_dbg.c - BRCM BDC USB3.0 device controller debug functions
+ *
+diff --git a/drivers/usb/gadget/udc/bdc/bdc_dbg.h b/drivers/usb/gadget/udc/bdc/bdc_dbg.h
+index 338a6c701315..f62d59b30a3e 100644
+--- a/drivers/usb/gadget/udc/bdc/bdc_dbg.h
++++ b/drivers/usb/gadget/udc/bdc/bdc_dbg.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * bdc_dbg.h - header for the BDC debug functions
+ *
+diff --git a/drivers/usb/gadget/udc/bdc/bdc_ep.c b/drivers/usb/gadget/udc/bdc/bdc_ep.c
+index bfd8f7ade935..e9fda8e6e87d 100644
+--- a/drivers/usb/gadget/udc/bdc/bdc_ep.c
++++ b/drivers/usb/gadget/udc/bdc/bdc_ep.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * bdc_ep.c - BRCM BDC USB3.0 device controller endpoint related functions
+ *
+diff --git a/drivers/usb/gadget/udc/bdc/bdc_ep.h b/drivers/usb/gadget/udc/bdc/bdc_ep.h
+index 8a6b36cbf2ea..db52fc78c8bf 100644
+--- a/drivers/usb/gadget/udc/bdc/bdc_ep.h
++++ b/drivers/usb/gadget/udc/bdc/bdc_ep.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * bdc_ep.h - header for the BDC debug functions
+ *
+diff --git a/drivers/usb/gadget/udc/bdc/bdc_pci.c b/drivers/usb/gadget/udc/bdc/bdc_pci.c
+index 708e36f530d8..1fec9c4fdadd 100644
+--- a/drivers/usb/gadget/udc/bdc/bdc_pci.c
++++ b/drivers/usb/gadget/udc/bdc/bdc_pci.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * bdc_pci.c - BRCM BDC USB3.0 device controller PCI interface file.
+ *
+diff --git a/drivers/usb/gadget/udc/bdc/bdc_udc.c b/drivers/usb/gadget/udc/bdc/bdc_udc.c
+index c84346146456..492b8b872d2c 100644
+--- a/drivers/usb/gadget/udc/bdc/bdc_udc.c
++++ b/drivers/usb/gadget/udc/bdc/bdc_udc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * bdc_udc.c - BRCM BDC USB3.0 device controller gagdet ops
+ *
+diff --git a/drivers/usb/gadget/udc/core.c b/drivers/usb/gadget/udc/core.c
+index ad315c4c6f35..9f928875d411 100644
+--- a/drivers/usb/gadget/udc/core.c
++++ b/drivers/usb/gadget/udc/core.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /**
+ * udc.c - Core UDC Framework
+ *
+diff --git a/drivers/usb/gadget/udc/dummy_hcd.c b/drivers/usb/gadget/udc/dummy_hcd.c
+index f04e91ef9e7c..af3dc1d33683 100644
+--- a/drivers/usb/gadget/udc/dummy_hcd.c
++++ b/drivers/usb/gadget/udc/dummy_hcd.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * dummy_hcd.c -- Dummy/Loopback USB host and device emulator driver.
+ *
+diff --git a/drivers/usb/gadget/udc/fotg210-udc.c b/drivers/usb/gadget/udc/fotg210-udc.c
+index 78d0204e3e20..6a7e0e26a1d1 100644
+--- a/drivers/usb/gadget/udc/fotg210-udc.c
++++ b/drivers/usb/gadget/udc/fotg210-udc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * FOTG210 UDC Driver supports Bulk transfer so far
+ *
+diff --git a/drivers/usb/gadget/udc/fotg210.h b/drivers/usb/gadget/udc/fotg210.h
+index bbf991bcbe7c..2c825a884ebc 100644
+--- a/drivers/usb/gadget/udc/fotg210.h
++++ b/drivers/usb/gadget/udc/fotg210.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Faraday FOTG210 USB OTG controller
+ *
+diff --git a/drivers/usb/gadget/udc/fsl_mxc_udc.c b/drivers/usb/gadget/udc/fsl_mxc_udc.c
+index f16e149c5b3e..089fbfc44da7 100644
+--- a/drivers/usb/gadget/udc/fsl_mxc_udc.c
++++ b/drivers/usb/gadget/udc/fsl_mxc_udc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2009
+ * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
+diff --git a/drivers/usb/gadget/udc/fsl_qe_udc.c b/drivers/usb/gadget/udc/fsl_qe_udc.c
+index a3e72d690eef..228577c6c180 100644
+--- a/drivers/usb/gadget/udc/fsl_qe_udc.c
++++ b/drivers/usb/gadget/udc/fsl_qe_udc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * driver/usb/gadget/fsl_qe_udc.c
+ *
+diff --git a/drivers/usb/gadget/udc/fsl_qe_udc.h b/drivers/usb/gadget/udc/fsl_qe_udc.h
+index 7026919fc901..2b1aec81c397 100644
+--- a/drivers/usb/gadget/udc/fsl_qe_udc.h
++++ b/drivers/usb/gadget/udc/fsl_qe_udc.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * drivers/usb/gadget/qe_udc.h
+ *
+diff --git a/drivers/usb/gadget/udc/fsl_udc_core.c b/drivers/usb/gadget/udc/fsl_udc_core.c
+index 7874c112f3fd..e728a7f481d9 100644
+--- a/drivers/usb/gadget/udc/fsl_udc_core.c
++++ b/drivers/usb/gadget/udc/fsl_udc_core.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2004-2007,2011-2012 Freescale Semiconductor, Inc.
+ * All rights reserved.
+diff --git a/drivers/usb/gadget/udc/fsl_usb2_udc.h b/drivers/usb/gadget/udc/fsl_usb2_udc.h
+index e92b8408b6f6..e5a25ef5803b 100644
+--- a/drivers/usb/gadget/udc/fsl_usb2_udc.h
++++ b/drivers/usb/gadget/udc/fsl_usb2_udc.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2004,2012 Freescale Semiconductor, Inc
+ * All rights reserved.
+diff --git a/drivers/usb/gadget/udc/fusb300_udc.c b/drivers/usb/gadget/udc/fusb300_udc.c
+index e0c1b0099265..e05946c421ed 100644
+--- a/drivers/usb/gadget/udc/fusb300_udc.c
++++ b/drivers/usb/gadget/udc/fusb300_udc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Fusb300 UDC (USB gadget)
+ *
+diff --git a/drivers/usb/gadget/udc/fusb300_udc.h b/drivers/usb/gadget/udc/fusb300_udc.h
+index ad39f892d200..4b055ef31cc1 100644
+--- a/drivers/usb/gadget/udc/fusb300_udc.h
++++ b/drivers/usb/gadget/udc/fusb300_udc.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Fusb300 UDC (USB gadget)
+ *
+diff --git a/drivers/usb/gadget/udc/goku_udc.c b/drivers/usb/gadget/udc/goku_udc.c
+index 8433c22900dc..f90a82a739c4 100644
+--- a/drivers/usb/gadget/udc/goku_udc.c
++++ b/drivers/usb/gadget/udc/goku_udc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Toshiba TC86C001 ("Goku-S") USB Device Controller driver
+ *
+diff --git a/drivers/usb/gadget/udc/goku_udc.h b/drivers/usb/gadget/udc/goku_udc.h
+index 64eb0f2b5ea0..99a01453df06 100644
+--- a/drivers/usb/gadget/udc/goku_udc.h
++++ b/drivers/usb/gadget/udc/goku_udc.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Toshiba TC86C001 ("Goku-S") USB Device Controller driver
+ *
+diff --git a/drivers/usb/gadget/udc/gr_udc.c b/drivers/usb/gadget/udc/gr_udc.c
+index 1f9941145746..675aa1043be4 100644
+--- a/drivers/usb/gadget/udc/gr_udc.c
++++ b/drivers/usb/gadget/udc/gr_udc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * USB Peripheral Controller driver for Aeroflex Gaisler GRUSBDC.
+ *
+diff --git a/drivers/usb/gadget/udc/gr_udc.h b/drivers/usb/gadget/udc/gr_udc.h
+index 4297c4e8021f..6c08ddf03521 100644
+--- a/drivers/usb/gadget/udc/gr_udc.h
++++ b/drivers/usb/gadget/udc/gr_udc.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * USB Peripheral Controller driver for Aeroflex Gaisler GRUSBDC.
+ *
+diff --git a/drivers/usb/gadget/udc/lpc32xx_udc.c b/drivers/usb/gadget/udc/lpc32xx_udc.c
+index 8f32b5ee7734..7dcd0904bf25 100644
+--- a/drivers/usb/gadget/udc/lpc32xx_udc.c
++++ b/drivers/usb/gadget/udc/lpc32xx_udc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * USB Gadget driver for LPC32xx
+ *
+diff --git a/drivers/usb/gadget/udc/m66592-udc.c b/drivers/usb/gadget/udc/m66592-udc.c
+index 46ce7bc15f2b..39076551e325 100644
+--- a/drivers/usb/gadget/udc/m66592-udc.c
++++ b/drivers/usb/gadget/udc/m66592-udc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * M66592 UDC (USB gadget)
+ *
+diff --git a/drivers/usb/gadget/udc/m66592-udc.h b/drivers/usb/gadget/udc/m66592-udc.h
+index 96d49d7bfb6b..4a62b4fda942 100644
+--- a/drivers/usb/gadget/udc/m66592-udc.h
++++ b/drivers/usb/gadget/udc/m66592-udc.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * M66592 UDC (USB gadget)
+ *
+diff --git a/drivers/usb/gadget/udc/mv_u3d.h b/drivers/usb/gadget/udc/mv_u3d.h
+index e32a787ac373..4c7812429920 100644
+--- a/drivers/usb/gadget/udc/mv_u3d.h
++++ b/drivers/usb/gadget/udc/mv_u3d.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
+ *
+diff --git a/drivers/usb/gadget/udc/mv_u3d_core.c b/drivers/usb/gadget/udc/mv_u3d_core.c
+index 772049afe166..6f336fe8bbef 100644
+--- a/drivers/usb/gadget/udc/mv_u3d_core.c
++++ b/drivers/usb/gadget/udc/mv_u3d_core.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
+ *
+diff --git a/drivers/usb/gadget/udc/mv_udc.h b/drivers/usb/gadget/udc/mv_udc.h
+index be77f207dbaf..4acf7edf4d86 100644
+--- a/drivers/usb/gadget/udc/mv_udc.h
++++ b/drivers/usb/gadget/udc/mv_udc.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
+ *
+diff --git a/drivers/usb/gadget/udc/mv_udc_core.c b/drivers/usb/gadget/udc/mv_udc_core.c
+index 4103bf7cf52a..df4065cf5fcd 100644
+--- a/drivers/usb/gadget/udc/mv_udc_core.c
++++ b/drivers/usb/gadget/udc/mv_udc_core.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
+ * Author: Chao Xie <chao.xie@marvell.com>
+diff --git a/drivers/usb/gadget/udc/net2272.c b/drivers/usb/gadget/udc/net2272.c
+index 8f85a51bd2b3..a3018f93df58 100644
+--- a/drivers/usb/gadget/udc/net2272.c
++++ b/drivers/usb/gadget/udc/net2272.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for PLX NET2272 USB device controller
+ *
+diff --git a/drivers/usb/gadget/udc/net2272.h b/drivers/usb/gadget/udc/net2272.h
+index 69bc9c3c6ce4..f0212cf042a2 100644
+--- a/drivers/usb/gadget/udc/net2272.h
++++ b/drivers/usb/gadget/udc/net2272.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * PLX NET2272 high/full speed USB device controller
+ *
+diff --git a/drivers/usb/gadget/udc/net2280.c b/drivers/usb/gadget/udc/net2280.c
+index f608c1f85e61..a0b2ab0c04f7 100644
+--- a/drivers/usb/gadget/udc/net2280.c
++++ b/drivers/usb/gadget/udc/net2280.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for the PLX NET2280 USB device controller.
+ * Specs and errata are available from <http://www.plxtech.com>.
+diff --git a/drivers/usb/gadget/udc/net2280.h b/drivers/usb/gadget/udc/net2280.h
+index 1088c3745999..18a881e7f93f 100644
+--- a/drivers/usb/gadget/udc/net2280.h
++++ b/drivers/usb/gadget/udc/net2280.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * NetChip 2280 high/full speed USB device controller.
+ * Unlike many such controllers, this one talks PCI.
+diff --git a/drivers/usb/gadget/udc/omap_udc.c b/drivers/usb/gadget/udc/omap_udc.c
+index f05ba6825bfe..5531ea492ed2 100644
+--- a/drivers/usb/gadget/udc/omap_udc.c
++++ b/drivers/usb/gadget/udc/omap_udc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * omap_udc.c -- for OMAP full speed udc; most chips support OTG.
+ *
+diff --git a/drivers/usb/gadget/udc/pch_udc.c b/drivers/usb/gadget/udc/pch_udc.c
+index 84dcbcd756f0..cc24334504b8 100644
+--- a/drivers/usb/gadget/udc/pch_udc.c
++++ b/drivers/usb/gadget/udc/pch_udc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2011 LAPIS Semiconductor Co., Ltd.
+ *
+diff --git a/drivers/usb/gadget/udc/pxa25x_udc.c b/drivers/usb/gadget/udc/pxa25x_udc.c
+index a238da906115..ffbd4dd84c15 100644
+--- a/drivers/usb/gadget/udc/pxa25x_udc.c
++++ b/drivers/usb/gadget/udc/pxa25x_udc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Intel PXA25x and IXP4xx on-chip full speed USB device controllers
+ *
+diff --git a/drivers/usb/gadget/udc/pxa25x_udc.h b/drivers/usb/gadget/udc/pxa25x_udc.h
+index a458bec2536d..1532e7e71f99 100644
+--- a/drivers/usb/gadget/udc/pxa25x_udc.h
++++ b/drivers/usb/gadget/udc/pxa25x_udc.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Intel PXA25x on-chip full speed USB device controller
+ *
+diff --git a/drivers/usb/gadget/udc/pxa27x_udc.c b/drivers/usb/gadget/udc/pxa27x_udc.c
+index d48e239660c3..14606f340325 100644
+--- a/drivers/usb/gadget/udc/pxa27x_udc.c
++++ b/drivers/usb/gadget/udc/pxa27x_udc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Handles the Intel 27x USB Device Controller (UDC)
+ *
+diff --git a/drivers/usb/gadget/udc/pxa27x_udc.h b/drivers/usb/gadget/udc/pxa27x_udc.h
+index cea2cb79b30c..cfdece686abe 100644
+--- a/drivers/usb/gadget/udc/pxa27x_udc.h
++++ b/drivers/usb/gadget/udc/pxa27x_udc.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * linux/drivers/usb/gadget/pxa27x_udc.h
+ * Intel PXA27x on-chip full speed USB device controller
+diff --git a/drivers/usb/gadget/udc/r8a66597-udc.c b/drivers/usb/gadget/udc/r8a66597-udc.c
+index 84b227ede082..8d876d90b7ff 100644
+--- a/drivers/usb/gadget/udc/r8a66597-udc.c
++++ b/drivers/usb/gadget/udc/r8a66597-udc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * R8A66597 UDC (USB gadget)
+ *
+diff --git a/drivers/usb/gadget/udc/r8a66597-udc.h b/drivers/usb/gadget/udc/r8a66597-udc.h
+index 45c4b2df1785..0f6d41e61841 100644
+--- a/drivers/usb/gadget/udc/r8a66597-udc.h
++++ b/drivers/usb/gadget/udc/r8a66597-udc.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * R8A66597 UDC
+ *
+diff --git a/drivers/usb/gadget/udc/renesas_usb3.c b/drivers/usb/gadget/udc/renesas_usb3.c
+index 7e0548f6bd9e..9f68b46d5d1a 100644
+--- a/drivers/usb/gadget/udc/renesas_usb3.c
++++ b/drivers/usb/gadget/udc/renesas_usb3.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Renesas USB3.0 Peripheral driver (USB gadget)
+ *
+diff --git a/drivers/usb/gadget/udc/s3c-hsudc.c b/drivers/usb/gadget/udc/s3c-hsudc.c
+index 42587b738a1f..9707b945eef2 100644
+--- a/drivers/usb/gadget/udc/s3c-hsudc.c
++++ b/drivers/usb/gadget/udc/s3c-hsudc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /* linux/drivers/usb/gadget/s3c-hsudc.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+diff --git a/drivers/usb/gadget/udc/s3c2410_udc.c b/drivers/usb/gadget/udc/s3c2410_udc.c
+index 394abd5d65c0..ed874cabd339 100644
+--- a/drivers/usb/gadget/udc/s3c2410_udc.c
++++ b/drivers/usb/gadget/udc/s3c2410_udc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * linux/drivers/usb/gadget/s3c2410_udc.c
+ *
+diff --git a/drivers/usb/gadget/udc/s3c2410_udc.h b/drivers/usb/gadget/udc/s3c2410_udc.h
+index 93bf225f1969..cfabc83c2244 100644
+--- a/drivers/usb/gadget/udc/s3c2410_udc.h
++++ b/drivers/usb/gadget/udc/s3c2410_udc.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * linux/drivers/usb/gadget/s3c2410_udc.h
+ * Samsung on-chip full speed USB device controllers
+diff --git a/drivers/usb/gadget/udc/snps_udc_core.c b/drivers/usb/gadget/udc/snps_udc_core.c
+index 38a165dbf924..dba9359ece0d 100644
+--- a/drivers/usb/gadget/udc/snps_udc_core.c
++++ b/drivers/usb/gadget/udc/snps_udc_core.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * amd5536.c -- AMD 5536 UDC high/full speed USB device controller
+ *
+diff --git a/drivers/usb/gadget/udc/snps_udc_plat.c b/drivers/usb/gadget/udc/snps_udc_plat.c
+index e8a5fdaee37d..800a35b48ab1 100644
+--- a/drivers/usb/gadget/udc/snps_udc_plat.c
++++ b/drivers/usb/gadget/udc/snps_udc_plat.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * snps_udc_plat.c - Synopsys UDC Platform Driver
+ *
+diff --git a/drivers/usb/gadget/udc/trace.c b/drivers/usb/gadget/udc/trace.c
+index 8c551ab91ad8..fbc139292245 100644
+--- a/drivers/usb/gadget/udc/trace.c
++++ b/drivers/usb/gadget/udc/trace.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /**
+ * trace.c - USB Gadget Framework Trace Support
+ *
+diff --git a/drivers/usb/gadget/udc/trace.h b/drivers/usb/gadget/udc/trace.h
+index da29874b5366..06b162bcdb54 100644
+--- a/drivers/usb/gadget/udc/trace.h
++++ b/drivers/usb/gadget/udc/trace.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /**
+ * udc.c - Core UDC Framework
+ *
+diff --git a/drivers/usb/gadget/udc/udc-xilinx.c b/drivers/usb/gadget/udc/udc-xilinx.c
+index de207a90571e..374a75d68365 100644
+--- a/drivers/usb/gadget/udc/udc-xilinx.c
++++ b/drivers/usb/gadget/udc/udc-xilinx.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Xilinx USB peripheral controller driver
+ *
+diff --git a/drivers/usb/gadget/usbstring.c b/drivers/usb/gadget/usbstring.c
+index 73a4dfba0edb..6c7a4e0c45c8 100644
+--- a/drivers/usb/gadget/usbstring.c
++++ b/drivers/usb/gadget/usbstring.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: LGPL-2.1+
+ /*
+ * Copyright (C) 2003 David Brownell
+ *
+diff --git a/drivers/usb/host/bcma-hcd.c b/drivers/usb/host/bcma-hcd.c
+index 5f425c89faf1..0f595c630600 100644
+--- a/drivers/usb/host/bcma-hcd.c
++++ b/drivers/usb/host/bcma-hcd.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Broadcom specific Advanced Microcontroller Bus
+ * Broadcom USB-core driver (BCMA bus glue)
+diff --git a/drivers/usb/host/ehci-atmel.c b/drivers/usb/host/ehci-atmel.c
+index 7440722bfbf0..a058c0310a5a 100644
+--- a/drivers/usb/host/ehci-atmel.c
++++ b/drivers/usb/host/ehci-atmel.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Driver for EHCI UHP on Atmel chips
+ *
+diff --git a/drivers/usb/host/ehci-dbg.c b/drivers/usb/host/ehci-dbg.c
+index 8c5a6fee4dfd..3bd0b2273171 100644
+--- a/drivers/usb/host/ehci-dbg.c
++++ b/drivers/usb/host/ehci-dbg.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (c) 2001-2002 by David Brownell
+ *
+diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c
+index 26b641100639..0a131659fc33 100644
+--- a/drivers/usb/host/ehci-exynos.c
++++ b/drivers/usb/host/ehci-exynos.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * SAMSUNG EXYNOS USB HOST EHCI Controller
+ *
+diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
+index d025cc06dda7..7c4bb32230d2 100644
+--- a/drivers/usb/host/ehci-fsl.c
++++ b/drivers/usb/host/ehci-fsl.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright 2005-2009 MontaVista Software, Inc.
+ * Copyright 2008,2012,2015 Freescale Semiconductor, Inc.
+diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h
+index 1a8a60a57cf2..21a6f10b5e3a 100644
+--- a/drivers/usb/host/ehci-fsl.h
++++ b/drivers/usb/host/ehci-fsl.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /* Copyright (C) 2005-2010,2012 Freescale Semiconductor, Inc.
+ * Copyright (c) 2005 MontaVista Software
+ *
+diff --git a/drivers/usb/host/ehci-grlib.c b/drivers/usb/host/ehci-grlib.c
+index 21650044b09e..a8cffcf13451 100644
+--- a/drivers/usb/host/ehci-grlib.c
++++ b/drivers/usb/host/ehci-grlib.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for Aeroflex Gaisler GRLIB GRUSBHC EHCI host controller
+ *
+diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
+index 6e834b83a104..f3e18dbf821c 100644
+--- a/drivers/usb/host/ehci-hcd.c
++++ b/drivers/usb/host/ehci-hcd.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Enhanced Host Controller Interface (EHCI) driver for USB.
+ *
+diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c
+index 37ef2ac9cdae..fcf339aef017 100644
+--- a/drivers/usb/host/ehci-hub.c
++++ b/drivers/usb/host/ehci-hub.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2001-2004 by David Brownell
+ *
+diff --git a/drivers/usb/host/ehci-mem.c b/drivers/usb/host/ehci-mem.c
+index 9b7e63977215..212d2042fb9f 100644
+--- a/drivers/usb/host/ehci-mem.c
++++ b/drivers/usb/host/ehci-mem.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (c) 2001 by David Brownell
+ *
+diff --git a/drivers/usb/host/ehci-mv.c b/drivers/usb/host/ehci-mv.c
+index 849806a75f1c..c9e15225a30f 100644
+--- a/drivers/usb/host/ehci-mv.c
++++ b/drivers/usb/host/ehci-mv.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
+ * Author: Chao Xie <chao.xie@marvell.com>
+diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c
+index c7a9b31eeaef..67adea97c26c 100644
+--- a/drivers/usb/host/ehci-mxc.c
++++ b/drivers/usb/host/ehci-mxc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (c) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
+ * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
+diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
+index 4d308533bc83..dd319d3219b6 100644
+--- a/drivers/usb/host/ehci-omap.c
++++ b/drivers/usb/host/ehci-omap.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * ehci-omap.c - driver for USBHOST on OMAP3/4 processors
+ *
+diff --git a/drivers/usb/host/ehci-orion.c b/drivers/usb/host/ehci-orion.c
+index 1aec87ec68df..199a6d2778dd 100644
+--- a/drivers/usb/host/ehci-orion.c
++++ b/drivers/usb/host/ehci-orion.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * drivers/usb/host/ehci-orion.c
+ *
+diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
+index 93326974ff4b..f6015f6ca488 100644
+--- a/drivers/usb/host/ehci-pci.c
++++ b/drivers/usb/host/ehci-pci.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * EHCI HCD (Host Controller Driver) PCI Bus Glue.
+ *
+diff --git a/drivers/usb/host/ehci-platform.c b/drivers/usb/host/ehci-platform.c
+index f1908ea9fbd8..cb77af3a71c1 100644
+--- a/drivers/usb/host/ehci-platform.c
++++ b/drivers/usb/host/ehci-platform.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Generic platform ehci driver
+ *
+diff --git a/drivers/usb/host/ehci-pmcmsp.c b/drivers/usb/host/ehci-pmcmsp.c
+index 342816a7f8b1..9a05bff230bb 100644
+--- a/drivers/usb/host/ehci-pmcmsp.c
++++ b/drivers/usb/host/ehci-pmcmsp.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * PMC MSP EHCI (Host Controller Driver) for USB.
+ *
+diff --git a/drivers/usb/host/ehci-ppc-of.c b/drivers/usb/host/ehci-ppc-of.c
+index 1a10c8d542ca..576f7d79ad4e 100644
+--- a/drivers/usb/host/ehci-ppc-of.c
++++ b/drivers/usb/host/ehci-ppc-of.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * EHCI HCD (Host Controller Driver) for USB.
+ *
+diff --git a/drivers/usb/host/ehci-ps3.c b/drivers/usb/host/ehci-ps3.c
+index 7934ff9b35e1..c74066790e69 100644
+--- a/drivers/usb/host/ehci-ps3.c
++++ b/drivers/usb/host/ehci-ps3.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * PS3 EHCI Host Controller driver
+ *
+diff --git a/drivers/usb/host/ehci-q.c b/drivers/usb/host/ehci-q.c
+index 8f3f055c05fa..c0074f212a09 100644
+--- a/drivers/usb/host/ehci-q.c
++++ b/drivers/usb/host/ehci-q.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2001-2004 by David Brownell
+ *
+diff --git a/drivers/usb/host/ehci-sched.c b/drivers/usb/host/ehci-sched.c
+index 6bc6304672bc..ebbc2c60de89 100644
+--- a/drivers/usb/host/ehci-sched.c
++++ b/drivers/usb/host/ehci-sched.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (c) 2001-2004 by David Brownell
+ * Copyright (c) 2003 Michal Sojka, for high-speed iso transfers
+diff --git a/drivers/usb/host/ehci-sh.c b/drivers/usb/host/ehci-sh.c
+index 5caf88d679e4..d565f24ca7f5 100644
+--- a/drivers/usb/host/ehci-sh.c
++++ b/drivers/usb/host/ehci-sh.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * SuperH EHCI host controller driver
+ *
+diff --git a/drivers/usb/host/ehci-spear.c b/drivers/usb/host/ehci-spear.c
+index 1f25c7985f5b..d12259d06f53 100644
+--- a/drivers/usb/host/ehci-spear.c
++++ b/drivers/usb/host/ehci-spear.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Driver for EHCI HCD on SPEAr SOC
+ *
+diff --git a/drivers/usb/host/ehci-st.c b/drivers/usb/host/ehci-st.c
+index be4a2788fc58..336e9fa5274f 100644
+--- a/drivers/usb/host/ehci-st.c
++++ b/drivers/usb/host/ehci-st.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * ST EHCI driver
+ *
+diff --git a/drivers/usb/host/ehci-sysfs.c b/drivers/usb/host/ehci-sysfs.c
+index 5216f2b09d63..16669619cfc5 100644
+--- a/drivers/usb/host/ehci-sysfs.c
++++ b/drivers/usb/host/ehci-sysfs.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2007 by Alan Stern
+ *
+diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
+index 9a3d7db5be57..fe8423e17877 100644
+--- a/drivers/usb/host/ehci-tegra.c
++++ b/drivers/usb/host/ehci-tegra.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * EHCI-compliant USB host controller driver for NVIDIA Tegra SoCs
+ *
+diff --git a/drivers/usb/host/ehci-tilegx.c b/drivers/usb/host/ehci-tilegx.c
+index bdb93b6a356f..d41b3d217253 100644
+--- a/drivers/usb/host/ehci-tilegx.c
++++ b/drivers/usb/host/ehci-tilegx.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright 2012 Tilera Corporation. All Rights Reserved.
+ *
+diff --git a/drivers/usb/host/ehci-timer.c b/drivers/usb/host/ehci-timer.c
+index 0b6cdb723192..047a5b131717 100644
+--- a/drivers/usb/host/ehci-timer.c
++++ b/drivers/usb/host/ehci-timer.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2012 by Alan Stern
+ *
+diff --git a/drivers/usb/host/ehci-w90x900.c b/drivers/usb/host/ehci-w90x900.c
+index 63b9d0c67963..da2c99d3ba6b 100644
+--- a/drivers/usb/host/ehci-w90x900.c
++++ b/drivers/usb/host/ehci-w90x900.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * linux/driver/usb/host/ehci-w90x900.c
+ *
+diff --git a/drivers/usb/host/ehci-xilinx-of.c b/drivers/usb/host/ehci-xilinx-of.c
+index f54480850bb8..886b05678de9 100644
+--- a/drivers/usb/host/ehci-xilinx-of.c
++++ b/drivers/usb/host/ehci-xilinx-of.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * EHCI HCD (Host Controller Driver) for USB.
+ *
+diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
+index a8e36170d8b8..1794d6254cfc 100644
+--- a/drivers/usb/host/ehci.h
++++ b/drivers/usb/host/ehci.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (c) 2001-2002 by David Brownell
+ *
+diff --git a/drivers/usb/host/fhci-dbg.c b/drivers/usb/host/fhci-dbg.c
+index b58e7a60913a..9935f10ad407 100644
+--- a/drivers/usb/host/fhci-dbg.c
++++ b/drivers/usb/host/fhci-dbg.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Freescale QUICC Engine USB Host Controller Driver
+ *
+diff --git a/drivers/usb/host/fhci-hcd.c b/drivers/usb/host/fhci-hcd.c
+index 55a0ae6f2d74..763131134ab1 100644
+--- a/drivers/usb/host/fhci-hcd.c
++++ b/drivers/usb/host/fhci-hcd.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Freescale QUICC Engine USB Host Controller Driver
+ *
+diff --git a/drivers/usb/host/fhci-hub.c b/drivers/usb/host/fhci-hub.c
+index 60d55eb3de0d..d50a9ca15830 100644
+--- a/drivers/usb/host/fhci-hub.c
++++ b/drivers/usb/host/fhci-hub.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Freescale QUICC Engine USB Host Controller Driver
+ *
+diff --git a/drivers/usb/host/fhci-mem.c b/drivers/usb/host/fhci-mem.c
+index b0b88f57a5ac..532a5960ff48 100644
+--- a/drivers/usb/host/fhci-mem.c
++++ b/drivers/usb/host/fhci-mem.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Freescale QUICC Engine USB Host Controller Driver
+ *
+diff --git a/drivers/usb/host/fhci-q.c b/drivers/usb/host/fhci-q.c
+index 03be7494a476..664e1f98d68f 100644
+--- a/drivers/usb/host/fhci-q.c
++++ b/drivers/usb/host/fhci-q.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Freescale QUICC Engine USB Host Controller Driver
+ *
+diff --git a/drivers/usb/host/fhci-sched.c b/drivers/usb/host/fhci-sched.c
+index 2f162faabbca..c8f3de90f464 100644
+--- a/drivers/usb/host/fhci-sched.c
++++ b/drivers/usb/host/fhci-sched.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Freescale QUICC Engine USB Host Controller Driver
+ *
+diff --git a/drivers/usb/host/fhci-tds.c b/drivers/usb/host/fhci-tds.c
+index f82ad5df1b0d..fa54315064da 100644
+--- a/drivers/usb/host/fhci-tds.c
++++ b/drivers/usb/host/fhci-tds.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Freescale QUICC Engine USB Host Controller Driver
+ *
+diff --git a/drivers/usb/host/fhci.h b/drivers/usb/host/fhci.h
+index 3fc82c1c3c73..257c04c8af0c 100644
+--- a/drivers/usb/host/fhci.h
++++ b/drivers/usb/host/fhci.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Freescale QUICC Engine USB Host Controller Driver
+ *
+diff --git a/drivers/usb/host/fotg210-hcd.c b/drivers/usb/host/fotg210-hcd.c
+index 457cc6525abd..26f1c5d533f2 100644
+--- a/drivers/usb/host/fotg210-hcd.c
++++ b/drivers/usb/host/fotg210-hcd.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /* Faraday FOTG210 EHCI-like driver
+ *
+ * Copyright (c) 2013 Faraday Technology Corporation
+diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
+index ba557cdba8ef..c749cbd8dd3c 100644
+--- a/drivers/usb/host/fsl-mph-dr-of.c
++++ b/drivers/usb/host/fsl-mph-dr-of.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Setup platform devices needed by the Freescale multi-port host
+ * and/or dual-role USB controller modules based on the description
+diff --git a/drivers/usb/host/hwa-hc.c b/drivers/usb/host/hwa-hc.c
+index da3b18038d23..e5fda058b5d6 100644
+--- a/drivers/usb/host/hwa-hc.c
++++ b/drivers/usb/host/hwa-hc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Host Wire Adapter:
+ * Driver glue, HWA-specific functions, bridges to WAHC and WUSBHC
+diff --git a/drivers/usb/host/imx21-dbg.c b/drivers/usb/host/imx21-dbg.c
+index 4f320d050da7..d6a72acceacf 100644
+--- a/drivers/usb/host/imx21-dbg.c
++++ b/drivers/usb/host/imx21-dbg.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (c) 2009 by Martin Fuzzey
+ *
+diff --git a/drivers/usb/host/imx21-hcd.c b/drivers/usb/host/imx21-hcd.c
+index 39ae7fb64b6f..4dbf28bc2652 100644
+--- a/drivers/usb/host/imx21-hcd.c
++++ b/drivers/usb/host/imx21-hcd.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * USB Host Controller Driver for IMX21
+ *
+diff --git a/drivers/usb/host/imx21-hcd.h b/drivers/usb/host/imx21-hcd.h
+index 05122f8a6983..768e714bcb30 100644
+--- a/drivers/usb/host/imx21-hcd.h
++++ b/drivers/usb/host/imx21-hcd.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Macros and prototypes for i.MX21
+ *
+diff --git a/drivers/usb/host/isp116x-hcd.c b/drivers/usb/host/isp116x-hcd.c
+index 73fec38754f9..2488cc80ae20 100644
+--- a/drivers/usb/host/isp116x-hcd.c
++++ b/drivers/usb/host/isp116x-hcd.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * ISP116x HCD (Host Controller Driver) for USB.
+ *
+diff --git a/drivers/usb/host/isp1362-hcd.c b/drivers/usb/host/isp1362-hcd.c
+index 9b7e307e2d54..079bc8e5e241 100644
+--- a/drivers/usb/host/isp1362-hcd.c
++++ b/drivers/usb/host/isp1362-hcd.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * ISP1362 HCD (Host Controller Driver) for USB.
+ *
+diff --git a/drivers/usb/host/max3421-hcd.c b/drivers/usb/host/max3421-hcd.c
+index 0ece9a9341e5..6a007f91a863 100644
+--- a/drivers/usb/host/max3421-hcd.c
++++ b/drivers/usb/host/max3421-hcd.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * MAX3421 Host Controller driver for USB.
+ *
+diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
+index 5302f988e7e6..5ad9e9bdc8ee 100644
+--- a/drivers/usb/host/ohci-at91.c
++++ b/drivers/usb/host/ohci-at91.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * OHCI HCD (Host Controller Driver) for USB.
+ *
+diff --git a/drivers/usb/host/ohci-da8xx.c b/drivers/usb/host/ohci-da8xx.c
+index 05da2cb59612..2056573c2b12 100644
+--- a/drivers/usb/host/ohci-da8xx.c
++++ b/drivers/usb/host/ohci-da8xx.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * OHCI HCD (Host Controller Driver) for USB.
+ *
+diff --git a/drivers/usb/host/ohci-dbg.c b/drivers/usb/host/ohci-dbg.c
+index c3eded317495..ac7d4ac34b02 100644
+--- a/drivers/usb/host/ohci-dbg.c
++++ b/drivers/usb/host/ohci-dbg.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * OHCI HCD (Host Controller Driver) for USB.
+ *
+diff --git a/drivers/usb/host/ohci-exynos.c b/drivers/usb/host/ohci-exynos.c
+index 6865b919403f..a12cbb295425 100644
+--- a/drivers/usb/host/ohci-exynos.c
++++ b/drivers/usb/host/ohci-exynos.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * SAMSUNG EXYNOS USB HOST OHCI Controller
+ *
+diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
+index b4599aa428f3..41fd0b8937d7 100644
+--- a/drivers/usb/host/ohci-hcd.c
++++ b/drivers/usb/host/ohci-hcd.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * Open Host Controller Interface (OHCI) driver for USB.
+ *
+diff --git a/drivers/usb/host/ohci-hub.c b/drivers/usb/host/ohci-hub.c
+index aca57bcb9afe..634f3c7bf774 100644
+--- a/drivers/usb/host/ohci-hub.c
++++ b/drivers/usb/host/ohci-hub.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * OHCI HCD (Host Controller Driver) for USB.
+ *
+diff --git a/drivers/usb/host/ohci-mem.c b/drivers/usb/host/ohci-mem.c
+index ed8a762b8670..b3da3f12e5b1 100644
+--- a/drivers/usb/host/ohci-mem.c
++++ b/drivers/usb/host/ohci-mem.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * OHCI HCD (Host Controller Driver) for USB.
+ *
+diff --git a/drivers/usb/host/ohci-nxp.c b/drivers/usb/host/ohci-nxp.c
+index 6df8e2ed40fd..5509b50bc417 100644
+--- a/drivers/usb/host/ohci-nxp.c
++++ b/drivers/usb/host/ohci-nxp.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * driver for NXP USB Host devices
+ *
+diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c
+index 91393ec7d850..0201c49bc4fc 100644
+--- a/drivers/usb/host/ohci-omap.c
++++ b/drivers/usb/host/ohci-omap.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * OHCI HCD (Host Controller Driver) for USB.
+ *
+diff --git a/drivers/usb/host/ohci-pci.c b/drivers/usb/host/ohci-pci.c
+index a84aebe9b0a9..fbcd34911025 100644
+--- a/drivers/usb/host/ohci-pci.c
++++ b/drivers/usb/host/ohci-pci.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * OHCI HCD (Host Controller Driver) for USB.
+ *
+diff --git a/drivers/usb/host/ohci-platform.c b/drivers/usb/host/ohci-platform.c
+index 61fe2b985070..908ebcfbc350 100644
+--- a/drivers/usb/host/ohci-platform.c
++++ b/drivers/usb/host/ohci-platform.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Generic platform ohci driver
+ *
+diff --git a/drivers/usb/host/ohci-ppc-of.c b/drivers/usb/host/ohci-ppc-of.c
+index 4f87a5c61b08..76a9b40b08f1 100644
+--- a/drivers/usb/host/ohci-ppc-of.c
++++ b/drivers/usb/host/ohci-ppc-of.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * OHCI HCD (Host Controller Driver) for USB.
+ *
+diff --git a/drivers/usb/host/ohci-ps3.c b/drivers/usb/host/ohci-ps3.c
+index 71d8bc4c27f6..bb0375d9eef0 100644
+--- a/drivers/usb/host/ohci-ps3.c
++++ b/drivers/usb/host/ohci-ps3.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * PS3 OHCI Host Controller driver
+ *
+diff --git a/drivers/usb/host/ohci-pxa27x.c b/drivers/usb/host/ohci-pxa27x.c
+index 21c010ffb03c..3e2474959735 100644
+--- a/drivers/usb/host/ohci-pxa27x.c
++++ b/drivers/usb/host/ohci-pxa27x.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * OHCI HCD (Host Controller Driver) for USB.
+ *
+diff --git a/drivers/usb/host/ohci-q.c b/drivers/usb/host/ohci-q.c
+index 24edb7674710..4ccb85a67bb3 100644
+--- a/drivers/usb/host/ohci-q.c
++++ b/drivers/usb/host/ohci-q.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * OHCI HCD (Host Controller Driver) for USB.
+ *
+diff --git a/drivers/usb/host/ohci-s3c2410.c b/drivers/usb/host/ohci-s3c2410.c
+index b006b93126f7..4511e27e9da8 100644
+--- a/drivers/usb/host/ohci-s3c2410.c
++++ b/drivers/usb/host/ohci-s3c2410.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * OHCI HCD (Host Controller Driver) for USB.
+ *
+diff --git a/drivers/usb/host/ohci-sa1111.c b/drivers/usb/host/ohci-sa1111.c
+index 3a9ea32508df..a022db46e999 100644
+--- a/drivers/usb/host/ohci-sa1111.c
++++ b/drivers/usb/host/ohci-sa1111.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * OHCI HCD (Host Controller Driver) for USB.
+ *
+diff --git a/drivers/usb/host/ohci-sm501.c b/drivers/usb/host/ohci-sm501.c
+index d4e0f7cd96fa..c9233cddf9a2 100644
+--- a/drivers/usb/host/ohci-sm501.c
++++ b/drivers/usb/host/ohci-sm501.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * OHCI HCD (Host Controller Driver) for USB.
+ *
+diff --git a/drivers/usb/host/ohci-spear.c b/drivers/usb/host/ohci-spear.c
+index 56478ed2f932..b3554f70bd27 100644
+--- a/drivers/usb/host/ohci-spear.c
++++ b/drivers/usb/host/ohci-spear.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * OHCI HCD (Host Controller Driver) for USB.
+ *
+diff --git a/drivers/usb/host/ohci-st.c b/drivers/usb/host/ohci-st.c
+index 02816a1515a1..697e6d95bb7e 100644
+--- a/drivers/usb/host/ohci-st.c
++++ b/drivers/usb/host/ohci-st.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * ST OHCI driver
+ *
+diff --git a/drivers/usb/host/ohci-tilegx.c b/drivers/usb/host/ohci-tilegx.c
+index e1b208da460a..e5a9f68cd648 100644
+--- a/drivers/usb/host/ohci-tilegx.c
++++ b/drivers/usb/host/ohci-tilegx.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright 2012 Tilera Corporation. All Rights Reserved.
+ *
+diff --git a/drivers/usb/host/ohci-tmio.c b/drivers/usb/host/ohci-tmio.c
+index 16d081a093bb..5702964408db 100644
+--- a/drivers/usb/host/ohci-tmio.c
++++ b/drivers/usb/host/ohci-tmio.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * OHCI HCD(Host Controller Driver) for USB.
+ *
+diff --git a/drivers/usb/host/ohci.h b/drivers/usb/host/ohci.h
+index 12742d002d2d..508a803139dd 100644
+--- a/drivers/usb/host/ohci.h
++++ b/drivers/usb/host/ohci.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * OHCI HCD (Host Controller Driver) for USB.
+ *
+diff --git a/drivers/usb/host/oxu210hp-hcd.c b/drivers/usb/host/oxu210hp-hcd.c
+index ed20fb34c897..b0cb356f9d72 100644
+--- a/drivers/usb/host/oxu210hp-hcd.c
++++ b/drivers/usb/host/oxu210hp-hcd.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (c) 2008 Rodolfo Giometti <giometti@linux.it>
+ * Copyright (c) 2008 Eurotech S.p.A. <info@eurtech.it>
+diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c
+index e1faee1f8602..db85ac6f89fc 100644
+--- a/drivers/usb/host/pci-quirks.c
++++ b/drivers/usb/host/pci-quirks.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * This file contains code to reset and initialize USB host controllers.
+ * Some of it includes work-arounds for PCI hardware and BIOS quirks.
+diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c
+index 5e5fc9d7d533..e4e0d2ac24ce 100644
+--- a/drivers/usb/host/r8a66597-hcd.c
++++ b/drivers/usb/host/r8a66597-hcd.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * R8A66597 HCD (Host Controller Driver)
+ *
+diff --git a/drivers/usb/host/r8a66597.h b/drivers/usb/host/r8a66597.h
+index 672cea307abb..0e1a0c3a805a 100644
+--- a/drivers/usb/host/r8a66597.h
++++ b/drivers/usb/host/r8a66597.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * R8A66597 HCD (Host Controller Driver)
+ *
+diff --git a/drivers/usb/host/sl811-hcd.c b/drivers/usb/host/sl811-hcd.c
+index 24ad1d6cec25..601fb00603cc 100644
+--- a/drivers/usb/host/sl811-hcd.c
++++ b/drivers/usb/host/sl811-hcd.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * SL811HS HCD (Host Controller Driver) for USB.
+ *
+diff --git a/drivers/usb/host/sl811_cs.c b/drivers/usb/host/sl811_cs.c
+index 88a9bffe93df..72136373ffab 100644
+--- a/drivers/usb/host/sl811_cs.c
++++ b/drivers/usb/host/sl811_cs.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * PCMCIA driver for SL811HS (as found in REX-CFU1U)
+ * Filename: sl811_cs.c
+diff --git a/drivers/usb/host/ssb-hcd.c b/drivers/usb/host/ssb-hcd.c
+index 62b6b7804c66..2f9087dc4cab 100644
+--- a/drivers/usb/host/ssb-hcd.c
++++ b/drivers/usb/host/ssb-hcd.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Sonics Silicon Backplane
+ * Broadcom USB-core driver (SSB bus glue)
+diff --git a/drivers/usb/host/u132-hcd.c b/drivers/usb/host/u132-hcd.c
+index c38855aed62c..228d22bfb36e 100644
+--- a/drivers/usb/host/u132-hcd.c
++++ b/drivers/usb/host/u132-hcd.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Host Controller Driver for the Elan Digital Systems U132 adapter
+ *
+diff --git a/drivers/usb/host/uhci-hcd.c b/drivers/usb/host/uhci-hcd.c
+index c3267a78c94e..babeefd84ffd 100644
+--- a/drivers/usb/host/uhci-hcd.c
++++ b/drivers/usb/host/uhci-hcd.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Universal Host Controller Interface driver for USB.
+ *
+diff --git a/drivers/usb/host/whci/asl.c b/drivers/usb/host/whci/asl.c
+index 773249306031..81a6286f50cf 100644
+--- a/drivers/usb/host/whci/asl.c
++++ b/drivers/usb/host/whci/asl.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Wireless Host Controller (WHC) asynchronous schedule management.
+ *
+diff --git a/drivers/usb/host/whci/debug.c b/drivers/usb/host/whci/debug.c
+index 774b89d28fae..3cbd84893b6f 100644
+--- a/drivers/usb/host/whci/debug.c
++++ b/drivers/usb/host/whci/debug.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Wireless Host Controller (WHC) debug.
+ *
+diff --git a/drivers/usb/host/whci/hcd.c b/drivers/usb/host/whci/hcd.c
+index cf84269c3e6d..eb30567fa6d1 100644
+--- a/drivers/usb/host/whci/hcd.c
++++ b/drivers/usb/host/whci/hcd.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Wireless Host Controller (WHC) driver.
+ *
+diff --git a/drivers/usb/host/whci/hw.c b/drivers/usb/host/whci/hw.c
+index 6afa2e379160..2a89686d6971 100644
+--- a/drivers/usb/host/whci/hw.c
++++ b/drivers/usb/host/whci/hw.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Wireless Host Controller (WHC) hardware access helpers.
+ *
+diff --git a/drivers/usb/host/whci/init.c b/drivers/usb/host/whci/init.c
+index ad8eb575c30a..48a6f50df24a 100644
+--- a/drivers/usb/host/whci/init.c
++++ b/drivers/usb/host/whci/init.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Wireless Host Controller (WHC) initialization.
+ *
+diff --git a/drivers/usb/host/whci/int.c b/drivers/usb/host/whci/int.c
+index 0c086b2790d1..15a2df0b29ab 100644
+--- a/drivers/usb/host/whci/int.c
++++ b/drivers/usb/host/whci/int.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Wireless Host Controller (WHC) interrupt handling.
+ *
+diff --git a/drivers/usb/host/whci/pzl.c b/drivers/usb/host/whci/pzl.c
+index 33c5580b4d25..bafac6a88551 100644
+--- a/drivers/usb/host/whci/pzl.c
++++ b/drivers/usb/host/whci/pzl.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Wireless Host Controller (WHC) periodic schedule management.
+ *
+diff --git a/drivers/usb/host/whci/qset.c b/drivers/usb/host/whci/qset.c
+index c0e6812426b3..1a92d0e492a0 100644
+--- a/drivers/usb/host/whci/qset.c
++++ b/drivers/usb/host/whci/qset.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Wireless Host Controller (WHC) qset management.
+ *
+diff --git a/drivers/usb/host/whci/whcd.h b/drivers/usb/host/whci/whcd.h
+index c80c7d93bc4a..4712972682fe 100644
+--- a/drivers/usb/host/whci/whcd.h
++++ b/drivers/usb/host/whci/whcd.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Wireless Host Controller (WHC) private header.
+ *
+diff --git a/drivers/usb/host/whci/whci-hc.h b/drivers/usb/host/whci/whci-hc.h
+index 4d4cbc0730bf..5dfbc9837b00 100644
+--- a/drivers/usb/host/whci/whci-hc.h
++++ b/drivers/usb/host/whci/whci-hc.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Wireless Host Controller (WHC) data structures.
+ *
+diff --git a/drivers/usb/host/whci/wusb.c b/drivers/usb/host/whci/wusb.c
+index 8d2762682869..8c8d8bc8eac4 100644
+--- a/drivers/usb/host/whci/wusb.c
++++ b/drivers/usb/host/whci/wusb.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Wireless Host Controller (WHC) WUSB operations.
+ *
+diff --git a/drivers/usb/host/xhci-dbg.c b/drivers/usb/host/xhci-dbg.c
+index 2c83b37ae8f2..83904170be5c 100644
+--- a/drivers/usb/host/xhci-dbg.c
++++ b/drivers/usb/host/xhci-dbg.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * xHCI host controller driver
+ *
+diff --git a/drivers/usb/host/xhci-ext-caps.h b/drivers/usb/host/xhci-ext-caps.h
+index 28deea584884..259963bbe3aa 100644
+--- a/drivers/usb/host/xhci-ext-caps.h
++++ b/drivers/usb/host/xhci-ext-caps.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * xHCI host controller driver
+ *
+diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c
+index c01d1f3a1c7d..fff62fe0a097 100644
+--- a/drivers/usb/host/xhci-hub.c
++++ b/drivers/usb/host/xhci-hub.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * xHCI host controller driver
+ *
+diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
+index b7b55eb82714..17dcc8ae6859 100644
+--- a/drivers/usb/host/xhci-mem.c
++++ b/drivers/usb/host/xhci-mem.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * xHCI host controller driver
+ *
+diff --git a/drivers/usb/host/xhci-mtk-sch.c b/drivers/usb/host/xhci-mtk-sch.c
+index 6e7ddf6cafae..42e4701ee944 100644
+--- a/drivers/usb/host/xhci-mtk-sch.c
++++ b/drivers/usb/host/xhci-mtk-sch.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (c) 2015 MediaTek Inc.
+ * Author:
+diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
+index 8fb60657ed4f..4e2fb05282a6 100644
+--- a/drivers/usb/host/xhci-mtk.c
++++ b/drivers/usb/host/xhci-mtk.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * MediaTek xHCI Host Controller Driver
+ *
+diff --git a/drivers/usb/host/xhci-mtk.h b/drivers/usb/host/xhci-mtk.h
+index 3aa5e1d25064..047d1a60341b 100644
+--- a/drivers/usb/host/xhci-mtk.h
++++ b/drivers/usb/host/xhci-mtk.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (c) 2015 MediaTek Inc.
+ * Author:
+diff --git a/drivers/usb/host/xhci-mvebu.c b/drivers/usb/host/xhci-mvebu.c
+index 85908a3ecb8f..fe7a2f84faeb 100644
+--- a/drivers/usb/host/xhci-mvebu.c
++++ b/drivers/usb/host/xhci-mvebu.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2014 Marvell
+ * Author: Gregory CLEMENT <gregory.clement@free-electrons.com>
+diff --git a/drivers/usb/host/xhci-mvebu.h b/drivers/usb/host/xhci-mvebu.h
+index 301fc984cae6..619792ae75b8 100644
+--- a/drivers/usb/host/xhci-mvebu.h
++++ b/drivers/usb/host/xhci-mvebu.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2014 Marvell
+ *
+diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
+index 838d37e79fa2..dd4b5e2615cf 100644
+--- a/drivers/usb/host/xhci-pci.c
++++ b/drivers/usb/host/xhci-pci.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * xHCI host controller driver PCI Bus Glue.
+ *
+diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c
+index 830dd0dbbce0..a15f1f295afc 100644
+--- a/drivers/usb/host/xhci-plat.c
++++ b/drivers/usb/host/xhci-plat.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * xhci-plat.c - xHCI host controller driver platform Bus Glue.
+ *
+diff --git a/drivers/usb/host/xhci-plat.h b/drivers/usb/host/xhci-plat.h
+index 29b227895b07..ac8f8eb0bf49 100644
+--- a/drivers/usb/host/xhci-plat.h
++++ b/drivers/usb/host/xhci-plat.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * xhci-plat.h - xHCI host controller driver platform Bus Glue.
+ *
+diff --git a/drivers/usb/host/xhci-rcar.c b/drivers/usb/host/xhci-rcar.c
+index 97f23cc31f4c..407fa95f7122 100644
+--- a/drivers/usb/host/xhci-rcar.c
++++ b/drivers/usb/host/xhci-rcar.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * xHCI host controller driver for R-Car SoCs
+ *
+diff --git a/drivers/usb/host/xhci-rcar.h b/drivers/usb/host/xhci-rcar.h
+index d247951147a1..162706528c4c 100644
+--- a/drivers/usb/host/xhci-rcar.h
++++ b/drivers/usb/host/xhci-rcar.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * drivers/usb/host/xhci-rcar.h
+ *
+diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
+index 6996235e34a9..3a50897ed766 100644
+--- a/drivers/usb/host/xhci-ring.c
++++ b/drivers/usb/host/xhci-ring.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * xHCI host controller driver
+ *
+diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c
+index 32ddafe7af87..6197fce3dce2 100644
+--- a/drivers/usb/host/xhci-tegra.c
++++ b/drivers/usb/host/xhci-tegra.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * NVIDIA Tegra xHCI host controller driver
+ *
+diff --git a/drivers/usb/host/xhci-trace.c b/drivers/usb/host/xhci-trace.c
+index 367b630bdb3c..0be3e83025ae 100644
+--- a/drivers/usb/host/xhci-trace.c
++++ b/drivers/usb/host/xhci-trace.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * xHCI host controller driver
+ *
+diff --git a/drivers/usb/host/xhci-trace.h b/drivers/usb/host/xhci-trace.h
+index 02a1164ca599..447edc6343d2 100644
+--- a/drivers/usb/host/xhci-trace.h
++++ b/drivers/usb/host/xhci-trace.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * xHCI host controller driver
+ *
+diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
+index 6b11fd9d8efe..55bb05893c55 100644
+--- a/drivers/usb/host/xhci.c
++++ b/drivers/usb/host/xhci.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * xHCI host controller driver
+ *
+diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
+index 11232e62b898..6b4c7ae70ab1 100644
+--- a/drivers/usb/host/xhci.h
++++ b/drivers/usb/host/xhci.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+
+ /*
+ * xHCI host controller driver
+diff --git a/drivers/usb/image/mdc800.c b/drivers/usb/image/mdc800.c
+index e92540a21b6b..ef10a0ecae1b 100644
+--- a/drivers/usb/image/mdc800.c
++++ b/drivers/usb/image/mdc800.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * copyright (C) 1999/2000 by Henning Zabel <henning@uni-paderborn.de>
+ *
+diff --git a/drivers/usb/image/microtek.c b/drivers/usb/image/microtek.c
+index 0b21ba757bba..9f2f563c82ed 100644
+--- a/drivers/usb/image/microtek.c
++++ b/drivers/usb/image/microtek.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /* Driver for Microtek Scanmaker X6 USB scanner, and possibly others.
+ *
+ * (C) Copyright 2000 John Fremlin <vii@penguinpowered.com>
+diff --git a/drivers/usb/isp1760/isp1760-core.c b/drivers/usb/isp1760/isp1760-core.c
+index bfa402cf3a27..8157d18135b8 100644
+--- a/drivers/usb/isp1760/isp1760-core.c
++++ b/drivers/usb/isp1760/isp1760-core.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Driver for the NXP ISP1760 chip
+ *
+diff --git a/drivers/usb/isp1760/isp1760-core.h b/drivers/usb/isp1760/isp1760-core.h
+index c70f8368a794..47985161ee77 100644
+--- a/drivers/usb/isp1760/isp1760-core.h
++++ b/drivers/usb/isp1760/isp1760-core.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Driver for the NXP ISP1760 chip
+ *
+diff --git a/drivers/usb/isp1760/isp1760-regs.h b/drivers/usb/isp1760/isp1760-regs.h
+index b67095c9a9d4..eecdb76c132c 100644
+--- a/drivers/usb/isp1760/isp1760-regs.h
++++ b/drivers/usb/isp1760/isp1760-regs.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Driver for the NXP ISP1760 chip
+ *
+diff --git a/drivers/usb/isp1760/isp1760-udc.c b/drivers/usb/isp1760/isp1760-udc.c
+index 69400f3da886..1300154252dc 100644
+--- a/drivers/usb/isp1760/isp1760-udc.c
++++ b/drivers/usb/isp1760/isp1760-udc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Driver for the NXP ISP1761 device controller
+ *
+diff --git a/drivers/usb/isp1760/isp1760-udc.h b/drivers/usb/isp1760/isp1760-udc.h
+index 26899ed81145..ea1598df1f11 100644
+--- a/drivers/usb/isp1760/isp1760-udc.h
++++ b/drivers/usb/isp1760/isp1760-udc.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Driver for the NXP ISP1761 device controller
+ *
+diff --git a/drivers/usb/misc/adutux.c b/drivers/usb/misc/adutux.c
+index 1c0ada75c35d..092db5ae5fa1 100644
+--- a/drivers/usb/misc/adutux.c
++++ b/drivers/usb/misc/adutux.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * adutux - driver for ADU devices from Ontrak Control Systems
+ * This is an experimental driver. Use at your own risk.
+diff --git a/drivers/usb/misc/appledisplay.c b/drivers/usb/misc/appledisplay.c
+index 8efdc500e790..b75defc52c24 100644
+--- a/drivers/usb/misc/appledisplay.c
++++ b/drivers/usb/misc/appledisplay.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Apple Cinema Display driver
+ *
+diff --git a/drivers/usb/misc/chaoskey.c b/drivers/usb/misc/chaoskey.c
+index abec6e604a62..8a22b4997c5f 100644
+--- a/drivers/usb/misc/chaoskey.c
++++ b/drivers/usb/misc/chaoskey.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * chaoskey - driver for ChaosKey device from Altus Metrum.
+ *
+diff --git a/drivers/usb/misc/cypress_cy7c63.c b/drivers/usb/misc/cypress_cy7c63.c
+index 5c93a888c40e..819ad8dc2376 100644
+--- a/drivers/usb/misc/cypress_cy7c63.c
++++ b/drivers/usb/misc/cypress_cy7c63.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * cypress_cy7c63.c
+ *
+diff --git a/drivers/usb/misc/cytherm.c b/drivers/usb/misc/cytherm.c
+index 63207c42acf6..a65f8817ecf8 100644
+--- a/drivers/usb/misc/cytherm.c
++++ b/drivers/usb/misc/cytherm.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /* -*- linux-c -*-
+ * Cypress USB Thermometer driver
+ *
+diff --git a/drivers/usb/misc/ehset.c b/drivers/usb/misc/ehset.c
+index c31b4a33e6bb..8b8e25424aa1 100644
+--- a/drivers/usb/misc/ehset.c
++++ b/drivers/usb/misc/ehset.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
+ *
+diff --git a/drivers/usb/misc/emi26.c b/drivers/usb/misc/emi26.c
+index 8950fa5e973d..81836e9d787f 100644
+--- a/drivers/usb/misc/emi26.c
++++ b/drivers/usb/misc/emi26.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Emagic EMI 2|6 usb audio interface firmware loader.
+ * Copyright (C) 2002
+diff --git a/drivers/usb/misc/emi62.c b/drivers/usb/misc/emi62.c
+index 1d9be4431b72..fad894a63c52 100644
+--- a/drivers/usb/misc/emi62.c
++++ b/drivers/usb/misc/emi62.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Emagic EMI 2|6 usb audio interface firmware loader.
+ * Copyright (C) 2002
+diff --git a/drivers/usb/misc/ezusb.c b/drivers/usb/misc/ezusb.c
+index 837208f14f86..c9be0d484e5c 100644
+--- a/drivers/usb/misc/ezusb.c
++++ b/drivers/usb/misc/ezusb.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * EZ-USB specific functions used by some of the USB to Serial drivers.
+ *
+diff --git a/drivers/usb/misc/ftdi-elan.c b/drivers/usb/misc/ftdi-elan.c
+index 424ff12f3b51..c1fbc2a32eb2 100644
+--- a/drivers/usb/misc/ftdi-elan.c
++++ b/drivers/usb/misc/ftdi-elan.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * USB FTDI client driver for Elan Digital Systems's Uxxx adapters
+ *
+diff --git a/drivers/usb/misc/idmouse.c b/drivers/usb/misc/idmouse.c
+index 39d8fedfaf3b..8d144903f05e 100644
+--- a/drivers/usb/misc/idmouse.c
++++ b/drivers/usb/misc/idmouse.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /* Siemens ID Mouse driver v0.6
+
+ This program is free software; you can redistribute it and/or
+diff --git a/drivers/usb/misc/iowarrior.c b/drivers/usb/misc/iowarrior.c
+index be5881303681..ad3109490c0f 100644
+--- a/drivers/usb/misc/iowarrior.c
++++ b/drivers/usb/misc/iowarrior.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Native support for the I/O-Warrior USB devices
+ *
+diff --git a/drivers/usb/misc/isight_firmware.c b/drivers/usb/misc/isight_firmware.c
+index 1c61830e96f9..91c028f16d31 100644
+--- a/drivers/usb/misc/isight_firmware.c
++++ b/drivers/usb/misc/isight_firmware.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Driver for loading USB isight firmware
+ *
+diff --git a/drivers/usb/misc/ldusb.c b/drivers/usb/misc/ldusb.c
+index 6635a3c990f6..ff69a1284886 100644
+--- a/drivers/usb/misc/ldusb.c
++++ b/drivers/usb/misc/ldusb.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /**
+ * Generic USB driver for report based interrupt in/out devices
+ * like LD Didactic's USB devices. LD Didactic's USB devices are
+diff --git a/drivers/usb/misc/legousbtower.c b/drivers/usb/misc/legousbtower.c
+index 5628f678ab59..cd4d49d8aea5 100644
+--- a/drivers/usb/misc/legousbtower.c
++++ b/drivers/usb/misc/legousbtower.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * LEGO USB Tower driver
+ *
+diff --git a/drivers/usb/misc/lvstest.c b/drivers/usb/misc/lvstest.c
+index ddddd6387f66..5e5d128e16c0 100644
+--- a/drivers/usb/misc/lvstest.c
++++ b/drivers/usb/misc/lvstest.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * drivers/usb/misc/lvstest.c
+ *
+diff --git a/drivers/usb/misc/rio500.c b/drivers/usb/misc/rio500.c
+index ddfebb144aaa..84bd682e9e61 100644
+--- a/drivers/usb/misc/rio500.c
++++ b/drivers/usb/misc/rio500.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /* -*- linux-c -*- */
+
+ /*
+diff --git a/drivers/usb/misc/rio500_usb.h b/drivers/usb/misc/rio500_usb.h
+index 359abc98e706..ce2ac1099d86 100644
+--- a/drivers/usb/misc/rio500_usb.h
++++ b/drivers/usb/misc/rio500_usb.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /* ----------------------------------------------------------------------
+
+ Copyright (C) 2000 Cesar Miquel (miquel@df.uba.ar)
+diff --git a/drivers/usb/misc/sisusbvga/sisusb.c b/drivers/usb/misc/sisusbvga/sisusb.c
+index 30774e0aeadd..3e65bdc2615c 100644
+--- a/drivers/usb/misc/sisusbvga/sisusb.c
++++ b/drivers/usb/misc/sisusbvga/sisusb.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
+ /*
+ * sisusb - usb kernel driver for SiS315(E) based USB2VGA dongles
+ *
+diff --git a/drivers/usb/misc/sisusbvga/sisusb.h b/drivers/usb/misc/sisusbvga/sisusb.h
+index 55492a5930bd..20f03ad0ea16 100644
+--- a/drivers/usb/misc/sisusbvga/sisusb.h
++++ b/drivers/usb/misc/sisusbvga/sisusb.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
+ /*
+ * sisusb - usb kernel driver for Net2280/SiS315 based USB2VGA dongles
+ *
+diff --git a/drivers/usb/misc/sisusbvga/sisusb_con.c b/drivers/usb/misc/sisusbvga/sisusb_con.c
+index f019d80ca9e4..73f7bde78e11 100644
+--- a/drivers/usb/misc/sisusbvga/sisusb_con.c
++++ b/drivers/usb/misc/sisusbvga/sisusb_con.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
+ /*
+ * sisusb - usb kernel driver for SiS315(E) based USB2VGA dongles
+ *
+diff --git a/drivers/usb/misc/sisusbvga/sisusb_init.c b/drivers/usb/misc/sisusbvga/sisusb_init.c
+index bf0032ca35ed..6a30e8bd9221 100644
+--- a/drivers/usb/misc/sisusbvga/sisusb_init.c
++++ b/drivers/usb/misc/sisusbvga/sisusb_init.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
+ /*
+ * sisusb - usb kernel driver for SiS315(E) based USB2VGA dongles
+ *
+diff --git a/drivers/usb/misc/sisusbvga/sisusb_init.h b/drivers/usb/misc/sisusbvga/sisusb_init.h
+index e79a616f0d26..1782c759c4ad 100644
+--- a/drivers/usb/misc/sisusbvga/sisusb_init.h
++++ b/drivers/usb/misc/sisusbvga/sisusb_init.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+ /* $XFree86$ */
+ /* $XdotOrg$ */
+ /*
+diff --git a/drivers/usb/misc/sisusbvga/sisusb_struct.h b/drivers/usb/misc/sisusbvga/sisusb_struct.h
+index 1c4240e802c1..706d77090e00 100644
+--- a/drivers/usb/misc/sisusbvga/sisusb_struct.h
++++ b/drivers/usb/misc/sisusbvga/sisusb_struct.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+ /*
+ * General structure definitions for universal mode switching modules
+ *
+diff --git a/drivers/usb/misc/trancevibrator.c b/drivers/usb/misc/trancevibrator.c
+index 1862ed15ce28..405726b8ebe6 100644
+--- a/drivers/usb/misc/trancevibrator.c
++++ b/drivers/usb/misc/trancevibrator.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * PlayStation 2 Trance Vibrator driver
+ *
+diff --git a/drivers/usb/misc/usb251xb.c b/drivers/usb/misc/usb251xb.c
+index 135c91c434bf..e1153c4fe97f 100644
+--- a/drivers/usb/misc/usb251xb.c
++++ b/drivers/usb/misc/usb251xb.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for Microchip USB251xB USB 2.0 Hi-Speed Hub Controller
+ * Configuration via SMBus.
+diff --git a/drivers/usb/misc/usb3503.c b/drivers/usb/misc/usb3503.c
+index 03be5d574f23..e9ed1623d6f1 100644
+--- a/drivers/usb/misc/usb3503.c
++++ b/drivers/usb/misc/usb3503.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for SMSC USB3503 USB 2.0 hub controller driver
+ *
+diff --git a/drivers/usb/misc/usb4604.c b/drivers/usb/misc/usb4604.c
+index e9f37fb746ac..40fa85807aae 100644
+--- a/drivers/usb/misc/usb4604.c
++++ b/drivers/usb/misc/usb4604.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for SMSC USB4604 USB HSIC 4-port 2.0 hub controller driver
+ * Based on usb3503 driver
+diff --git a/drivers/usb/misc/usb_u132.h b/drivers/usb/misc/usb_u132.h
+index dc2e5a31caec..4dbfea3237f7 100644
+--- a/drivers/usb/misc/usb_u132.h
++++ b/drivers/usb/misc/usb_u132.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Common Header File for the Elan Digital Systems U132 adapter
+ * this file should be included by both the "ftdi-u132" and
+diff --git a/drivers/usb/misc/usblcd.c b/drivers/usb/misc/usblcd.c
+index 0f5ad896c7e3..9ba4a4e68d91 100644
+--- a/drivers/usb/misc/usblcd.c
++++ b/drivers/usb/misc/usblcd.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*****************************************************************************
+ * USBLCD Kernel Driver *
+ * Version 1.05 *
+diff --git a/drivers/usb/misc/usbsevseg.c b/drivers/usb/misc/usbsevseg.c
+index 3f6a28045b53..4990d5757019 100644
+--- a/drivers/usb/misc/usbsevseg.c
++++ b/drivers/usb/misc/usbsevseg.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * USB 7 Segment Driver
+ *
+diff --git a/drivers/usb/misc/usbtest.c b/drivers/usb/misc/usbtest.c
+index b3fc602b2e24..ae6c20ce998c 100644
+--- a/drivers/usb/misc/usbtest.c
++++ b/drivers/usb/misc/usbtest.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ #include <linux/kernel.h>
+ #include <linux/errno.h>
+ #include <linux/init.h>
+diff --git a/drivers/usb/misc/uss720.c b/drivers/usb/misc/uss720.c
+index 8a13b2fcf3e1..876a7a32defc 100644
+--- a/drivers/usb/misc/uss720.c
++++ b/drivers/usb/misc/uss720.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*****************************************************************************/
+
+ /*
+diff --git a/drivers/usb/misc/yurex.c b/drivers/usb/misc/yurex.c
+index 47763311a42e..ceb35dbcd4d0 100644
+--- a/drivers/usb/misc/yurex.c
++++ b/drivers/usb/misc/yurex.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Driver for Meywa-Denki & KAYAC YUREX
+ *
+diff --git a/drivers/usb/mon/mon_main.c b/drivers/usb/mon/mon_main.c
+index 46847340b819..9812d102a005 100644
+--- a/drivers/usb/mon/mon_main.c
++++ b/drivers/usb/mon/mon_main.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * The USB Monitor, inspired by Dave Harding's USBMon.
+ *
+diff --git a/drivers/usb/mtu3/mtu3.h b/drivers/usb/mtu3/mtu3.h
+index b26fffc58446..375958b516e3 100644
+--- a/drivers/usb/mtu3/mtu3.h
++++ b/drivers/usb/mtu3/mtu3.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * mtu3.h - MediaTek USB3 DRD header
+ *
+diff --git a/drivers/usb/mtu3/mtu3_core.c b/drivers/usb/mtu3/mtu3_core.c
+index 947579842ad7..415579fc6d9f 100644
+--- a/drivers/usb/mtu3/mtu3_core.c
++++ b/drivers/usb/mtu3/mtu3_core.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * mtu3_core.c - hardware access layer and gadget init/exit of
+ * MediaTek usb3 Dual-Role Controller Driver
+diff --git a/drivers/usb/mtu3/mtu3_dr.c b/drivers/usb/mtu3/mtu3_dr.c
+index 560256115b23..fe8ff399777d 100644
+--- a/drivers/usb/mtu3/mtu3_dr.c
++++ b/drivers/usb/mtu3/mtu3_dr.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * mtu3_dr.c - dual role switch and host glue layer
+ *
+diff --git a/drivers/usb/mtu3/mtu3_dr.h b/drivers/usb/mtu3/mtu3_dr.h
+index 9b228b5811b0..d4d07ac115fd 100644
+--- a/drivers/usb/mtu3/mtu3_dr.h
++++ b/drivers/usb/mtu3/mtu3_dr.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * mtu3_dr.h - dual role switch and host glue layer header
+ *
+diff --git a/drivers/usb/mtu3/mtu3_gadget.c b/drivers/usb/mtu3/mtu3_gadget.c
+index 434fca58143c..e7eefc516432 100644
+--- a/drivers/usb/mtu3/mtu3_gadget.c
++++ b/drivers/usb/mtu3/mtu3_gadget.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * mtu3_gadget.c - MediaTek usb3 DRD peripheral support
+ *
+diff --git a/drivers/usb/mtu3/mtu3_gadget_ep0.c b/drivers/usb/mtu3/mtu3_gadget_ep0.c
+index 958d74dd2b78..228444361a24 100644
+--- a/drivers/usb/mtu3/mtu3_gadget_ep0.c
++++ b/drivers/usb/mtu3/mtu3_gadget_ep0.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * mtu3_gadget_ep0.c - MediaTek USB3 DRD peripheral driver ep0 handling
+ *
+diff --git a/drivers/usb/mtu3/mtu3_host.c b/drivers/usb/mtu3/mtu3_host.c
+index e42d308b8dc2..36d6660d09bd 100644
+--- a/drivers/usb/mtu3/mtu3_host.c
++++ b/drivers/usb/mtu3/mtu3_host.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * mtu3_dr.c - dual role switch and host glue layer
+ *
+diff --git a/drivers/usb/mtu3/mtu3_hw_regs.h b/drivers/usb/mtu3/mtu3_hw_regs.h
+index 06b29664470f..3d9127917981 100644
+--- a/drivers/usb/mtu3/mtu3_hw_regs.h
++++ b/drivers/usb/mtu3/mtu3_hw_regs.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * mtu3_hw_regs.h - MediaTek USB3 DRD register and field definitions
+ *
+diff --git a/drivers/usb/mtu3/mtu3_plat.c b/drivers/usb/mtu3/mtu3_plat.c
+index 088e3e685c4f..742b269b6e02 100644
+--- a/drivers/usb/mtu3/mtu3_plat.c
++++ b/drivers/usb/mtu3/mtu3_plat.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2016 MediaTek Inc.
+ *
+diff --git a/drivers/usb/mtu3/mtu3_qmu.c b/drivers/usb/mtu3/mtu3_qmu.c
+index 7d9ba8a52368..78328677681e 100644
+--- a/drivers/usb/mtu3/mtu3_qmu.c
++++ b/drivers/usb/mtu3/mtu3_qmu.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * mtu3_qmu.c - Queue Management Unit driver for device controller
+ *
+diff --git a/drivers/usb/mtu3/mtu3_qmu.h b/drivers/usb/mtu3/mtu3_qmu.h
+index 4dafa16bf120..05cfdfe8be4c 100644
+--- a/drivers/usb/mtu3/mtu3_qmu.h
++++ b/drivers/usb/mtu3/mtu3_qmu.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * mtu3_qmu.h - Queue Management Unit driver header
+ *
+diff --git a/drivers/usb/musb/am35x.c b/drivers/usb/musb/am35x.c
+index 02fbb4fe3745..cfaf98251735 100644
+--- a/drivers/usb/musb/am35x.c
++++ b/drivers/usb/musb/am35x.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+
+ /*
+ * Texas Instruments AM35x "glue layer"
+diff --git a/drivers/usb/musb/blackfin.c b/drivers/usb/musb/blackfin.c
+index 4418574a36a1..b0b2a8ef48ab 100644
+--- a/drivers/usb/musb/blackfin.c
++++ b/drivers/usb/musb/blackfin.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * MUSB OTG controller driver for Blackfin Processors
+ *
+diff --git a/drivers/usb/musb/blackfin.h b/drivers/usb/musb/blackfin.h
+index c84dae546dc6..f3cedcf693b2 100644
+--- a/drivers/usb/musb/blackfin.h
++++ b/drivers/usb/musb/blackfin.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2007 by Analog Devices, Inc.
+ *
+diff --git a/drivers/usb/musb/cppi_dma.c b/drivers/usb/musb/cppi_dma.c
+index a13bd3625043..b4d6d9bb3239 100644
+--- a/drivers/usb/musb/cppi_dma.c
++++ b/drivers/usb/musb/cppi_dma.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2005-2006 by Texas Instruments
+ *
+diff --git a/drivers/usb/musb/da8xx.c b/drivers/usb/musb/da8xx.c
+index 972bf4210189..685e11868d35 100644
+--- a/drivers/usb/musb/da8xx.c
++++ b/drivers/usb/musb/da8xx.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Texas Instruments DA8xx/OMAP-L1x "glue layer"
+ *
+diff --git a/drivers/usb/musb/davinci.c b/drivers/usb/musb/davinci.c
+index 52b491d3d5d8..321199f35881 100644
+--- a/drivers/usb/musb/davinci.c
++++ b/drivers/usb/musb/davinci.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2005-2006 by Texas Instruments
+ *
+diff --git a/drivers/usb/musb/davinci.h b/drivers/usb/musb/davinci.h
+index 371baa0ee509..2e507cedf2f4 100644
+--- a/drivers/usb/musb/davinci.h
++++ b/drivers/usb/musb/davinci.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2005-2006 by Texas Instruments
+ *
+diff --git a/drivers/usb/musb/jz4740.c b/drivers/usb/musb/jz4740.c
+index 40c68c23d553..354d143ad740 100644
+--- a/drivers/usb/musb/jz4740.c
++++ b/drivers/usb/musb/jz4740.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Ingenic JZ4740 "glue layer"
+ *
+diff --git a/drivers/usb/musb/musb_am335x.c b/drivers/usb/musb/musb_am335x.c
+index 1e58ed2361cc..5f04f8e3a640 100644
+--- a/drivers/usb/musb/musb_am335x.c
++++ b/drivers/usb/musb/musb_am335x.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ #include <linux/platform_device.h>
+ #include <linux/pm_runtime.h>
+ #include <linux/module.h>
+diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
+index ff17e94ef465..43af5ee3784b 100644
+--- a/drivers/usb/musb/musb_core.c
++++ b/drivers/usb/musb/musb_core.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * MUSB OTG driver core code
+ *
+diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h
+index 20f4614178d9..ea4a67486009 100644
+--- a/drivers/usb/musb/musb_core.h
++++ b/drivers/usb/musb/musb_core.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * MUSB OTG driver defines
+ *
+diff --git a/drivers/usb/musb/musb_cppi41.c b/drivers/usb/musb/musb_cppi41.c
+index 1ec0a4947b6b..d0dd4f470bbe 100644
+--- a/drivers/usb/musb/musb_cppi41.c
++++ b/drivers/usb/musb/musb_cppi41.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ #include <linux/device.h>
+ #include <linux/dma-mapping.h>
+ #include <linux/dmaengine.h>
+diff --git a/drivers/usb/musb/musb_debug.h b/drivers/usb/musb/musb_debug.h
+index 9a78877a8afe..345a359de57a 100644
+--- a/drivers/usb/musb/musb_debug.h
++++ b/drivers/usb/musb/musb_debug.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * MUSB OTG driver debug defines
+ *
+diff --git a/drivers/usb/musb/musb_debugfs.c b/drivers/usb/musb/musb_debugfs.c
+index 952733ceaac8..b91d4b60b8c7 100644
+--- a/drivers/usb/musb/musb_debugfs.c
++++ b/drivers/usb/musb/musb_debugfs.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * MUSB OTG driver debugfs support
+ *
+diff --git a/drivers/usb/musb/musb_dma.h b/drivers/usb/musb/musb_dma.h
+index 04c3bd86bd62..7fea3455cd3b 100644
+--- a/drivers/usb/musb/musb_dma.h
++++ b/drivers/usb/musb/musb_dma.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * MUSB OTG driver DMA controller abstraction
+ *
+diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c
+index f6b526606ad1..ba8ea45e58b5 100644
+--- a/drivers/usb/musb/musb_dsps.c
++++ b/drivers/usb/musb/musb_dsps.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Texas Instruments DSPS platforms "glue layer"
+ *
+diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c
+index 87f932d4b72c..738c5c39031e 100644
+--- a/drivers/usb/musb/musb_gadget.c
++++ b/drivers/usb/musb/musb_gadget.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * MUSB OTG driver peripheral support
+ *
+diff --git a/drivers/usb/musb/musb_gadget.h b/drivers/usb/musb/musb_gadget.h
+index 0314dfc770c7..c8c9d5565848 100644
+--- a/drivers/usb/musb/musb_gadget.h
++++ b/drivers/usb/musb/musb_gadget.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * MUSB OTG driver peripheral defines
+ *
+diff --git a/drivers/usb/musb/musb_gadget_ep0.c b/drivers/usb/musb/musb_gadget_ep0.c
+index e85b9c2a4910..fd79b55b96a5 100644
+--- a/drivers/usb/musb/musb_gadget_ep0.c
++++ b/drivers/usb/musb/musb_gadget_ep0.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * MUSB OTG peripheral driver ep0 handling
+ *
+diff --git a/drivers/usb/musb/musb_host.c b/drivers/usb/musb/musb_host.c
+index 802388bb42ba..28e9e6198d9c 100644
+--- a/drivers/usb/musb/musb_host.c
++++ b/drivers/usb/musb/musb_host.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * MUSB OTG driver host support
+ *
+diff --git a/drivers/usb/musb/musb_host.h b/drivers/usb/musb/musb_host.h
+index 54d02ed032df..686f3dba5e46 100644
+--- a/drivers/usb/musb/musb_host.h
++++ b/drivers/usb/musb/musb_host.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * MUSB OTG driver host defines
+ *
+diff --git a/drivers/usb/musb/musb_io.h b/drivers/usb/musb/musb_io.h
+index 17a80ae20674..2ebf033ced87 100644
+--- a/drivers/usb/musb/musb_io.h
++++ b/drivers/usb/musb/musb_io.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * MUSB OTG driver register I/O
+ *
+diff --git a/drivers/usb/musb/musb_regs.h b/drivers/usb/musb/musb_regs.h
+index cff5bcf0d00f..31f92798b408 100644
+--- a/drivers/usb/musb/musb_regs.h
++++ b/drivers/usb/musb/musb_regs.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * MUSB OTG driver register defines
+ *
+diff --git a/drivers/usb/musb/musb_trace.c b/drivers/usb/musb/musb_trace.c
+index 70973d901a21..037509918844 100644
+--- a/drivers/usb/musb/musb_trace.c
++++ b/drivers/usb/musb/musb_trace.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * musb_trace.c - MUSB Controller Trace Support
+ *
+diff --git a/drivers/usb/musb/musb_trace.h b/drivers/usb/musb/musb_trace.h
+index f031c9e74322..669cd1df5bf8 100644
+--- a/drivers/usb/musb/musb_trace.h
++++ b/drivers/usb/musb/musb_trace.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * musb_trace.h - MUSB Controller Trace Support
+ *
+diff --git a/drivers/usb/musb/musb_virthub.c b/drivers/usb/musb/musb_virthub.c
+index 5eca5d2d5e00..76fd93a65e7b 100644
+--- a/drivers/usb/musb/musb_virthub.c
++++ b/drivers/usb/musb/musb_virthub.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * MUSB OTG driver virtual root hub support
+ *
+diff --git a/drivers/usb/musb/musbhsdma.c b/drivers/usb/musb/musbhsdma.c
+index 3620073da58c..d1bb309070a4 100644
+--- a/drivers/usb/musb/musbhsdma.c
++++ b/drivers/usb/musb/musbhsdma.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * MUSB OTG driver - support for Mentor's DMA controller
+ *
+diff --git a/drivers/usb/musb/musbhsdma.h b/drivers/usb/musb/musbhsdma.h
+index a3dcbd55e436..51289c0b277e 100644
+--- a/drivers/usb/musb/musbhsdma.h
++++ b/drivers/usb/musb/musbhsdma.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * MUSB OTG driver - support for Mentor's DMA controller
+ *
+diff --git a/drivers/usb/musb/omap2430.c b/drivers/usb/musb/omap2430.c
+index 456f3e6ecf03..f68053165b05 100644
+--- a/drivers/usb/musb/omap2430.c
++++ b/drivers/usb/musb/omap2430.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2005-2007 by Texas Instruments
+ * Some code has been taken from tusb6010.c
+diff --git a/drivers/usb/musb/omap2430.h b/drivers/usb/musb/omap2430.h
+index 1b5e83a9840e..f484ba592d40 100644
+--- a/drivers/usb/musb/omap2430.h
++++ b/drivers/usb/musb/omap2430.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2005-2006 by Texas Instruments
+ *
+diff --git a/drivers/usb/musb/sunxi.c b/drivers/usb/musb/sunxi.c
+index dc353e24d53c..ecc9e1a60f46 100644
+--- a/drivers/usb/musb/sunxi.c
++++ b/drivers/usb/musb/sunxi.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Allwinner sun4i MUSB Glue Layer
+ *
+diff --git a/drivers/usb/musb/tusb6010.c b/drivers/usb/musb/tusb6010.c
+index 4eb640c54f2c..9ec06c573e96 100644
+--- a/drivers/usb/musb/tusb6010.c
++++ b/drivers/usb/musb/tusb6010.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * TUSB6010 USB 2.0 OTG Dual Role controller
+ *
+diff --git a/drivers/usb/musb/tusb6010.h b/drivers/usb/musb/tusb6010.h
+index 72cdad23ced9..fc8c01d994c6 100644
+--- a/drivers/usb/musb/tusb6010.h
++++ b/drivers/usb/musb/tusb6010.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Definitions for TUSB6010 USB 2.0 OTG Dual Role controller
+ *
+diff --git a/drivers/usb/musb/tusb6010_omap.c b/drivers/usb/musb/tusb6010_omap.c
+index e8060e49b0f4..9db5eb9ba215 100644
+--- a/drivers/usb/musb/tusb6010_omap.c
++++ b/drivers/usb/musb/tusb6010_omap.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * TUSB6010 USB 2.0 OTG Dual Role controller OMAP DMA interface
+ *
+diff --git a/drivers/usb/musb/ux500.c b/drivers/usb/musb/ux500.c
+index 5a572500c418..b29930253acb 100644
+--- a/drivers/usb/musb/ux500.c
++++ b/drivers/usb/musb/ux500.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2010 ST-Ericsson AB
+ * Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>
+diff --git a/drivers/usb/musb/ux500_dma.c b/drivers/usb/musb/ux500_dma.c
+index c92a295049ad..1a14b0e15ba3 100644
+--- a/drivers/usb/musb/ux500_dma.c
++++ b/drivers/usb/musb/ux500_dma.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * drivers/usb/musb/ux500_dma.c
+ *
+diff --git a/drivers/usb/phy/of.c b/drivers/usb/phy/of.c
+index 66ffa82457a8..3b0ebdb63488 100644
+--- a/drivers/usb/phy/of.c
++++ b/drivers/usb/phy/of.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * USB of helper code
+ *
+diff --git a/drivers/usb/phy/phy-ab8500-usb.c b/drivers/usb/phy/phy-ab8500-usb.c
+index 61bf2285d5b1..c1394c524c6b 100644
+--- a/drivers/usb/phy/phy-ab8500-usb.c
++++ b/drivers/usb/phy/phy-ab8500-usb.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * USB transceiver driver for AB8500 family chips
+ *
+diff --git a/drivers/usb/phy/phy-am335x-control.c b/drivers/usb/phy/phy-am335x-control.c
+index 5f5f19813fde..a3cb25cb74f8 100644
+--- a/drivers/usb/phy/phy-am335x-control.c
++++ b/drivers/usb/phy/phy-am335x-control.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ #include <linux/module.h>
+ #include <linux/platform_device.h>
+ #include <linux/err.h>
+diff --git a/drivers/usb/phy/phy-am335x.c b/drivers/usb/phy/phy-am335x.c
+index 7e5aece769da..b36fa8b953d0 100644
+--- a/drivers/usb/phy/phy-am335x.c
++++ b/drivers/usb/phy/phy-am335x.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ #include <linux/module.h>
+ #include <linux/platform_device.h>
+ #include <linux/dma-mapping.h>
+diff --git a/drivers/usb/phy/phy-fsl-usb.c b/drivers/usb/phy/phy-fsl-usb.c
+index 9b4354a00ca7..b55d4b800647 100644
+--- a/drivers/usb/phy/phy-fsl-usb.c
++++ b/drivers/usb/phy/phy-fsl-usb.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2007,2008 Freescale semiconductor, Inc.
+ *
+diff --git a/drivers/usb/phy/phy-fsl-usb.h b/drivers/usb/phy/phy-fsl-usb.h
+index 23149954a09c..5db4668661cd 100644
+--- a/drivers/usb/phy/phy-fsl-usb.h
++++ b/drivers/usb/phy/phy-fsl-usb.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /* Copyright (C) 2007,2008 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+diff --git a/drivers/usb/phy/phy-generic.c b/drivers/usb/phy/phy-generic.c
+index 89d6e7a5fdb7..055ecf416aae 100644
+--- a/drivers/usb/phy/phy-generic.c
++++ b/drivers/usb/phy/phy-generic.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * NOP USB transceiver for all USB transceiver which are either built-in
+ * into USB IP or which are mostly autonomous.
+diff --git a/drivers/usb/phy/phy-gpio-vbus-usb.c b/drivers/usb/phy/phy-gpio-vbus-usb.c
+index f66120db8a41..d7a3aeaa5ae6 100644
+--- a/drivers/usb/phy/phy-gpio-vbus-usb.c
++++ b/drivers/usb/phy/phy-gpio-vbus-usb.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * gpio-vbus.c - simple GPIO VBUS sensing driver for B peripheral devices
+ *
+diff --git a/drivers/usb/phy/phy-isp1301-omap.c b/drivers/usb/phy/phy-isp1301-omap.c
+index c6052c814bcc..453dfeab0b58 100644
+--- a/drivers/usb/phy/phy-isp1301-omap.c
++++ b/drivers/usb/phy/phy-isp1301-omap.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * isp1301_omap - ISP 1301 USB transceiver, talking to OMAP OTG controller
+ *
+diff --git a/drivers/usb/phy/phy-isp1301.c b/drivers/usb/phy/phy-isp1301.c
+index f333024660b4..22499abc8272 100644
+--- a/drivers/usb/phy/phy-isp1301.c
++++ b/drivers/usb/phy/phy-isp1301.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * NXP ISP1301 USB transceiver driver
+ *
+diff --git a/drivers/usb/phy/phy-keystone.c b/drivers/usb/phy/phy-keystone.c
+index 01d4e4cdbc79..0670414ccc38 100644
+--- a/drivers/usb/phy/phy-keystone.c
++++ b/drivers/usb/phy/phy-keystone.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * phy-keystone - USB PHY, talking to dwc3 controller in Keystone.
+ *
+diff --git a/drivers/usb/phy/phy-mv-usb.c b/drivers/usb/phy/phy-mv-usb.c
+index 0e315694adc9..8c21b7efb2d8 100644
+--- a/drivers/usb/phy/phy-mv-usb.c
++++ b/drivers/usb/phy/phy-mv-usb.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
+ * Author: Chao Xie <chao.xie@marvell.com>
+diff --git a/drivers/usb/phy/phy-mv-usb.h b/drivers/usb/phy/phy-mv-usb.h
+index 551da6eb0ba8..6150f6bba30b 100644
+--- a/drivers/usb/phy/phy-mv-usb.h
++++ b/drivers/usb/phy/phy-mv-usb.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
+ *
+diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
+index 0e2f1a36d315..7ffc367a1581 100644
+--- a/drivers/usb/phy/phy-mxs-usb.c
++++ b/drivers/usb/phy/phy-mxs-usb.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright 2012-2014 Freescale Semiconductor, Inc.
+ * Copyright (C) 2012 Marek Vasut <marex@denx.de>
+diff --git a/drivers/usb/phy/phy-omap-otg.c b/drivers/usb/phy/phy-omap-otg.c
+index 800d1d90753d..1ce4a846d9b0 100644
+--- a/drivers/usb/phy/phy-omap-otg.c
++++ b/drivers/usb/phy/phy-omap-otg.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * OMAP OTG controller driver
+ *
+diff --git a/drivers/usb/phy/phy-tahvo.c b/drivers/usb/phy/phy-tahvo.c
+index bf2c364867a0..3a437bf5e004 100644
+--- a/drivers/usb/phy/phy-tahvo.c
++++ b/drivers/usb/phy/phy-tahvo.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Tahvo USB transceiver driver
+ *
+diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
+index ccc2bf5274b4..1ebfbdef4529 100644
+--- a/drivers/usb/phy/phy-tegra-usb.c
++++ b/drivers/usb/phy/phy-tegra-usb.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2010 Google, Inc.
+ * Copyright (C) 2013 NVIDIA Corporation
+diff --git a/drivers/usb/phy/phy-twl6030-usb.c b/drivers/usb/phy/phy-twl6030-usb.c
+index b5dc077ed7d3..ddcb0dff4d5e 100644
+--- a/drivers/usb/phy/phy-twl6030-usb.c
++++ b/drivers/usb/phy/phy-twl6030-usb.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * twl6030_usb - TWL6030 USB transceiver, talking to OMAP OTG driver.
+ *
+diff --git a/drivers/usb/phy/phy-ulpi-viewport.c b/drivers/usb/phy/phy-ulpi-viewport.c
+index 18bb8264b5a0..394778a5219c 100644
+--- a/drivers/usb/phy/phy-ulpi-viewport.c
++++ b/drivers/usb/phy/phy-ulpi-viewport.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2011 Google, Inc.
+ *
+diff --git a/drivers/usb/phy/phy-ulpi.c b/drivers/usb/phy/phy-ulpi.c
+index f48a7a21e3c2..1a594b356ad8 100644
+--- a/drivers/usb/phy/phy-ulpi.c
++++ b/drivers/usb/phy/phy-ulpi.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Generic ULPI USB transceiver support
+ *
+diff --git a/drivers/usb/phy/phy.c b/drivers/usb/phy/phy.c
+index 89f4ac4cd93e..3405e8e30a01 100644
+--- a/drivers/usb/phy/phy.c
++++ b/drivers/usb/phy/phy.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * phy.c -- USB phy handling
+ *
+diff --git a/drivers/usb/renesas_usbhs/common.c b/drivers/usb/renesas_usbhs/common.c
+index f0ce304c5aaf..f5968a0d392a 100644
+--- a/drivers/usb/renesas_usbhs/common.c
++++ b/drivers/usb/renesas_usbhs/common.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * Renesas USB driver
+ *
+diff --git a/drivers/usb/renesas_usbhs/common.h b/drivers/usb/renesas_usbhs/common.h
+index 8c5fc12ad778..416331c6990a 100644
+--- a/drivers/usb/renesas_usbhs/common.h
++++ b/drivers/usb/renesas_usbhs/common.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * Renesas USB driver
+ *
+diff --git a/drivers/usb/renesas_usbhs/fifo.c b/drivers/usb/renesas_usbhs/fifo.c
+index 5d369b38868a..e3be608993af 100644
+--- a/drivers/usb/renesas_usbhs/fifo.c
++++ b/drivers/usb/renesas_usbhs/fifo.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * Renesas USB driver
+ *
+diff --git a/drivers/usb/renesas_usbhs/fifo.h b/drivers/usb/renesas_usbhs/fifo.h
+index 8b98507d7abc..7a741234c24b 100644
+--- a/drivers/usb/renesas_usbhs/fifo.h
++++ b/drivers/usb/renesas_usbhs/fifo.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * Renesas USB driver
+ *
+diff --git a/drivers/usb/renesas_usbhs/mod.c b/drivers/usb/renesas_usbhs/mod.c
+index 28965ef4f824..c0a0789d8b1e 100644
+--- a/drivers/usb/renesas_usbhs/mod.c
++++ b/drivers/usb/renesas_usbhs/mod.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * Renesas USB driver
+ *
+diff --git a/drivers/usb/renesas_usbhs/mod.h b/drivers/usb/renesas_usbhs/mod.h
+index 1ef5bf604070..5355a13045d9 100644
+--- a/drivers/usb/renesas_usbhs/mod.h
++++ b/drivers/usb/renesas_usbhs/mod.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * Renesas USB driver
+ *
+diff --git a/drivers/usb/renesas_usbhs/mod_gadget.c b/drivers/usb/renesas_usbhs/mod_gadget.c
+index c068b673420b..019bbc8bf9b2 100644
+--- a/drivers/usb/renesas_usbhs/mod_gadget.c
++++ b/drivers/usb/renesas_usbhs/mod_gadget.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * Renesas USB driver
+ *
+diff --git a/drivers/usb/renesas_usbhs/mod_host.c b/drivers/usb/renesas_usbhs/mod_host.c
+index e256351cb72d..1ab0ac83b00c 100644
+--- a/drivers/usb/renesas_usbhs/mod_host.c
++++ b/drivers/usb/renesas_usbhs/mod_host.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * Renesas USB driver
+ *
+diff --git a/drivers/usb/renesas_usbhs/pipe.c b/drivers/usb/renesas_usbhs/pipe.c
+index d811f0550c04..3c500aaadf35 100644
+--- a/drivers/usb/renesas_usbhs/pipe.c
++++ b/drivers/usb/renesas_usbhs/pipe.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * Renesas USB driver
+ *
+diff --git a/drivers/usb/renesas_usbhs/pipe.h b/drivers/usb/renesas_usbhs/pipe.h
+index 95185fdb29b1..ed32cb11fe09 100644
+--- a/drivers/usb/renesas_usbhs/pipe.h
++++ b/drivers/usb/renesas_usbhs/pipe.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * Renesas USB driver
+ *
+diff --git a/drivers/usb/renesas_usbhs/rcar2.c b/drivers/usb/renesas_usbhs/rcar2.c
+index 277160bc6f25..b03b3cb36b49 100644
+--- a/drivers/usb/renesas_usbhs/rcar2.c
++++ b/drivers/usb/renesas_usbhs/rcar2.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * Renesas USB driver R-Car Gen. 2 initialization and power control
+ *
+diff --git a/drivers/usb/renesas_usbhs/rcar3.c b/drivers/usb/renesas_usbhs/rcar3.c
+index 02b67abfc2a1..0857d0d0abcd 100644
+--- a/drivers/usb/renesas_usbhs/rcar3.c
++++ b/drivers/usb/renesas_usbhs/rcar3.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Renesas USB driver R-Car Gen. 3 initialization and power control
+ *
+diff --git a/drivers/usb/serial/aircable.c b/drivers/usb/serial/aircable.c
+index 569c2200ba42..2ea3fc79acd6 100644
+--- a/drivers/usb/serial/aircable.c
++++ b/drivers/usb/serial/aircable.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * AIRcable USB Bluetooth Dongle Driver.
+ *
+diff --git a/drivers/usb/serial/ark3116.c b/drivers/usb/serial/ark3116.c
+index 0adbd38b4eea..a0cc93b0c64d 100644
+--- a/drivers/usb/serial/ark3116.c
++++ b/drivers/usb/serial/ark3116.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2009 by Bart Hartgers (bart.hartgers+ark3116@gmail.com)
+ * Original version:
+diff --git a/drivers/usb/serial/belkin_sa.c b/drivers/usb/serial/belkin_sa.c
+index 15bc71853db5..6e0c98bde745 100644
+--- a/drivers/usb/serial/belkin_sa.c
++++ b/drivers/usb/serial/belkin_sa.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Belkin USB Serial Adapter Driver
+ *
+diff --git a/drivers/usb/serial/belkin_sa.h b/drivers/usb/serial/belkin_sa.h
+index c74b58ab56f9..345c57f63831 100644
+--- a/drivers/usb/serial/belkin_sa.h
++++ b/drivers/usb/serial/belkin_sa.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Definitions for Belkin USB Serial Adapter Driver
+ *
+diff --git a/drivers/usb/serial/bus.c b/drivers/usb/serial/bus.c
+index 8936a83c96cd..db49e2a4346b 100644
+--- a/drivers/usb/serial/bus.c
++++ b/drivers/usb/serial/bus.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * USB Serial Converter Bus specific functions
+ *
+diff --git a/drivers/usb/serial/ch341.c b/drivers/usb/serial/ch341.c
+index 578596d301b8..ce021982aad8 100644
+--- a/drivers/usb/serial/ch341.c
++++ b/drivers/usb/serial/ch341.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright 2007, Frank A Kingswood <frank@kingswood-consulting.co.uk>
+ * Copyright 2007, Werner Cornelius <werner@cornelius-consult.de>
+diff --git a/drivers/usb/serial/console.c b/drivers/usb/serial/console.c
+index 43a862a90a77..4f80a422d4e5 100644
+--- a/drivers/usb/serial/console.c
++++ b/drivers/usb/serial/console.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * USB Serial Console driver
+ *
+diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c
+index c931ae689a91..1f7c7949e134 100644
+--- a/drivers/usb/serial/cp210x.c
++++ b/drivers/usb/serial/cp210x.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Silicon Laboratories CP210x USB to RS232 serial adaptor driver
+ *
+diff --git a/drivers/usb/serial/cyberjack.c b/drivers/usb/serial/cyberjack.c
+index 47fbd9f0c0c7..830e793dfe44 100644
+--- a/drivers/usb/serial/cyberjack.c
++++ b/drivers/usb/serial/cyberjack.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * REINER SCT cyberJack pinpad/e-com USB Chipcard Reader Driver
+ *
+diff --git a/drivers/usb/serial/cypress_m8.c b/drivers/usb/serial/cypress_m8.c
+index 90110de715e0..a43ee56d3032 100644
+--- a/drivers/usb/serial/cypress_m8.c
++++ b/drivers/usb/serial/cypress_m8.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * USB Cypress M8 driver
+ *
+diff --git a/drivers/usb/serial/digi_acceleport.c b/drivers/usb/serial/digi_acceleport.c
+index 2ce39af32cfa..fc30c1d04d6e 100644
+--- a/drivers/usb/serial/digi_acceleport.c
++++ b/drivers/usb/serial/digi_acceleport.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Digi AccelePort USB-4 and USB-2 Serial Converters
+ *
+diff --git a/drivers/usb/serial/empeg.c b/drivers/usb/serial/empeg.c
+index 90e603d5f660..b270ff3a721a 100644
+--- a/drivers/usb/serial/empeg.c
++++ b/drivers/usb/serial/empeg.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * USB Empeg empeg-car player driver
+ *
+diff --git a/drivers/usb/serial/f81232.c b/drivers/usb/serial/f81232.c
+index 972f5a5fe577..869bfd05e02e 100644
+--- a/drivers/usb/serial/f81232.c
++++ b/drivers/usb/serial/f81232.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Fintek F81232 USB to serial adaptor driver
+ *
+diff --git a/drivers/usb/serial/f81534.c b/drivers/usb/serial/f81534.c
+index 3d616a2a9f96..c1cc5ef18bf6 100644
+--- a/drivers/usb/serial/f81534.c
++++ b/drivers/usb/serial/f81534.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * F81532/F81534 USB to Serial Ports Bridge
+ *
+diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c
+index 385f2ae3be24..1b037348d3fc 100644
+--- a/drivers/usb/serial/ftdi_sio.c
++++ b/drivers/usb/serial/ftdi_sio.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * USB FTDI SIO driver
+ *
+diff --git a/drivers/usb/serial/garmin_gps.c b/drivers/usb/serial/garmin_gps.c
+index 91e7e3a166a5..3f9340669e01 100644
+--- a/drivers/usb/serial/garmin_gps.c
++++ b/drivers/usb/serial/garmin_gps.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Garmin GPS driver
+ *
+diff --git a/drivers/usb/serial/generic.c b/drivers/usb/serial/generic.c
+index 35cb8c0e584f..6d64595df6fd 100644
+--- a/drivers/usb/serial/generic.c
++++ b/drivers/usb/serial/generic.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * USB Serial Converter Generic functions
+ *
+diff --git a/drivers/usb/serial/io_16654.h b/drivers/usb/serial/io_16654.h
+index a53abc9530ff..9a594aa65cd8 100644
+--- a/drivers/usb/serial/io_16654.h
++++ b/drivers/usb/serial/io_16654.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /************************************************************************
+ *
+ * 16654.H Definitions for 16C654 UART used on EdgePorts
+diff --git a/drivers/usb/serial/io_edgeport.c b/drivers/usb/serial/io_edgeport.c
+index 01f3ac7769f3..3b16370697f4 100644
+--- a/drivers/usb/serial/io_edgeport.c
++++ b/drivers/usb/serial/io_edgeport.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Edgeport USB Serial Converter driver
+ *
+diff --git a/drivers/usb/serial/io_edgeport.h b/drivers/usb/serial/io_edgeport.h
+index ad9c1d47a619..657158133a88 100644
+--- a/drivers/usb/serial/io_edgeport.h
++++ b/drivers/usb/serial/io_edgeport.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /************************************************************************
+ *
+ * io_edgeport.h Edgeport Linux Interface definitions
+diff --git a/drivers/usb/serial/io_ionsp.h b/drivers/usb/serial/io_ionsp.h
+index 5cc591bae54d..e9d5cde2e4a6 100644
+--- a/drivers/usb/serial/io_ionsp.h
++++ b/drivers/usb/serial/io_ionsp.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /************************************************************************
+ *
+ * IONSP.H Definitions for I/O Networks Serial Protocol
+diff --git a/drivers/usb/serial/io_ti.c b/drivers/usb/serial/io_ti.c
+index 6cefb9cb133d..c6fc62447b25 100644
+--- a/drivers/usb/serial/io_ti.c
++++ b/drivers/usb/serial/io_ti.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Edgeport USB Serial Converter driver
+ *
+diff --git a/drivers/usb/serial/io_ti.h b/drivers/usb/serial/io_ti.h
+index 1bd67b24f916..42eb4afc4550 100644
+--- a/drivers/usb/serial/io_ti.h
++++ b/drivers/usb/serial/io_ti.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*****************************************************************************
+ *
+ * Copyright (C) 1997-2002 Inside Out Networks, Inc.
+diff --git a/drivers/usb/serial/io_usbvend.h b/drivers/usb/serial/io_usbvend.h
+index 6f6a856bc37c..fec5a0aec075 100644
+--- a/drivers/usb/serial/io_usbvend.h
++++ b/drivers/usb/serial/io_usbvend.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /************************************************************************
+ *
+ * USBVEND.H Vendor-specific USB definitions
+diff --git a/drivers/usb/serial/ipaq.c b/drivers/usb/serial/ipaq.c
+index cde0dcdce9c4..52da1a82d7f0 100644
+--- a/drivers/usb/serial/ipaq.c
++++ b/drivers/usb/serial/ipaq.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * USB Compaq iPAQ driver
+ *
+diff --git a/drivers/usb/serial/ipw.c b/drivers/usb/serial/ipw.c
+index 8b1cf18a668b..4a534e8037d5 100644
+--- a/drivers/usb/serial/ipw.c
++++ b/drivers/usb/serial/ipw.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * IPWireless 3G UMTS TDD Modem driver (USB connected)
+ *
+diff --git a/drivers/usb/serial/ir-usb.c b/drivers/usb/serial/ir-usb.c
+index f9734a96d516..8109bcfed9f4 100644
+--- a/drivers/usb/serial/ir-usb.c
++++ b/drivers/usb/serial/ir-usb.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * USB IR Dongle driver
+ *
+diff --git a/drivers/usb/serial/iuu_phoenix.c b/drivers/usb/serial/iuu_phoenix.c
+index 18fc992a245f..c0565a352674 100644
+--- a/drivers/usb/serial/iuu_phoenix.c
++++ b/drivers/usb/serial/iuu_phoenix.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Infinity Unlimited USB Phoenix driver
+ *
+diff --git a/drivers/usb/serial/iuu_phoenix.h b/drivers/usb/serial/iuu_phoenix.h
+index b82630a3b8fd..d473cde2aae7 100644
+--- a/drivers/usb/serial/iuu_phoenix.h
++++ b/drivers/usb/serial/iuu_phoenix.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Infinity Unlimited USB Phoenix driver
+ *
+diff --git a/drivers/usb/serial/keyspan.c b/drivers/usb/serial/keyspan.c
+index 5662d324edd2..c5e34999bea4 100644
+--- a/drivers/usb/serial/keyspan.c
++++ b/drivers/usb/serial/keyspan.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ Keyspan USB to Serial Converter driver
+
+diff --git a/drivers/usb/serial/keyspan_pda.c b/drivers/usb/serial/keyspan_pda.c
+index f8e8285663a6..40b87c48e585 100644
+--- a/drivers/usb/serial/keyspan_pda.c
++++ b/drivers/usb/serial/keyspan_pda.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * USB Keyspan PDA / Xircom / Entrega Converter driver
+ *
+diff --git a/drivers/usb/serial/kl5kusb105.c b/drivers/usb/serial/kl5kusb105.c
+index 595415e59d5d..e71978840780 100644
+--- a/drivers/usb/serial/kl5kusb105.c
++++ b/drivers/usb/serial/kl5kusb105.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * KLSI KL5KUSB105 chip RS232 converter driver
+ *
+diff --git a/drivers/usb/serial/kobil_sct.c b/drivers/usb/serial/kobil_sct.c
+index 3024b9b25360..32e5b6b3a85a 100644
+--- a/drivers/usb/serial/kobil_sct.c
++++ b/drivers/usb/serial/kobil_sct.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * KOBIL USB Smart Card Terminal Driver
+ *
+diff --git a/drivers/usb/serial/mct_u232.c b/drivers/usb/serial/mct_u232.c
+index 70f346f1aa86..ef4f9067499a 100644
+--- a/drivers/usb/serial/mct_u232.c
++++ b/drivers/usb/serial/mct_u232.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * MCT (Magic Control Technology Corp.) USB RS232 Converter Driver
+ *
+diff --git a/drivers/usb/serial/mct_u232.h b/drivers/usb/serial/mct_u232.h
+index d325bb8cb583..bd3f40770adb 100644
+--- a/drivers/usb/serial/mct_u232.h
++++ b/drivers/usb/serial/mct_u232.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Definitions for MCT (Magic Control Technology) USB-RS232 Converter Driver
+ *
+diff --git a/drivers/usb/serial/metro-usb.c b/drivers/usb/serial/metro-usb.c
+index 3950d44b80f1..3b78b446aadc 100644
+--- a/drivers/usb/serial/metro-usb.c
++++ b/drivers/usb/serial/metro-usb.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ Some of this code is credited to Linux USB open source files that are
+ distributed with Linux.
+diff --git a/drivers/usb/serial/mos7720.c b/drivers/usb/serial/mos7720.c
+index a453965f9e9a..b7075252e9ca 100644
+--- a/drivers/usb/serial/mos7720.c
++++ b/drivers/usb/serial/mos7720.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * mos7720.c
+ * Controls the Moschip 7720 usb to dual port serial converter
+diff --git a/drivers/usb/serial/mos7840.c b/drivers/usb/serial/mos7840.c
+index 5e490177cf75..a6d39a0a3c46 100644
+--- a/drivers/usb/serial/mos7840.c
++++ b/drivers/usb/serial/mos7840.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+diff --git a/drivers/usb/serial/mxuport.c b/drivers/usb/serial/mxuport.c
+index 3aef091fe88b..1e9430b077f2 100644
+--- a/drivers/usb/serial/mxuport.c
++++ b/drivers/usb/serial/mxuport.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * mxuport.c - MOXA UPort series driver
+ *
+diff --git a/drivers/usb/serial/navman.c b/drivers/usb/serial/navman.c
+index 2a97cdc078d5..ab387a58992b 100644
+--- a/drivers/usb/serial/navman.c
++++ b/drivers/usb/serial/navman.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Navman Serial USB driver
+ *
+diff --git a/drivers/usb/serial/omninet.c b/drivers/usb/serial/omninet.c
+index efcd7feed6f4..8e1406aecafb 100644
+--- a/drivers/usb/serial/omninet.c
++++ b/drivers/usb/serial/omninet.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * USB ZyXEL omni.net LCD PLUS driver
+ *
+diff --git a/drivers/usb/serial/opticon.c b/drivers/usb/serial/opticon.c
+index 58657d64678b..66e6f77d27c2 100644
+--- a/drivers/usb/serial/opticon.c
++++ b/drivers/usb/serial/opticon.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Opticon USB barcode to serial driver
+ *
+diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c
+index 0600dadd6a0c..9a777a6d1ad6 100644
+--- a/drivers/usb/serial/option.c
++++ b/drivers/usb/serial/option.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ USB Driver for GSM modems
+
+diff --git a/drivers/usb/serial/oti6858.c b/drivers/usb/serial/oti6858.c
+index b11eead469ee..c6adf41b62da 100644
+--- a/drivers/usb/serial/oti6858.c
++++ b/drivers/usb/serial/oti6858.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Ours Technology Inc. OTi-6858 USB to serial adapter driver.
+ *
+diff --git a/drivers/usb/serial/oti6858.h b/drivers/usb/serial/oti6858.h
+index 704ac3a532b3..9fb62f03005d 100644
+--- a/drivers/usb/serial/oti6858.h
++++ b/drivers/usb/serial/oti6858.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Ours Technology Inc. OTi-6858 USB to serial adapter driver.
+ *
+diff --git a/drivers/usb/serial/pl2303.c b/drivers/usb/serial/pl2303.c
+index 2153e67eeeee..9dad6fdf5e08 100644
+--- a/drivers/usb/serial/pl2303.c
++++ b/drivers/usb/serial/pl2303.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Prolific PL2303 USB to serial adaptor driver
+ *
+diff --git a/drivers/usb/serial/pl2303.h b/drivers/usb/serial/pl2303.h
+index cec7141245ef..1f17e074a1b8 100644
+--- a/drivers/usb/serial/pl2303.h
++++ b/drivers/usb/serial/pl2303.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Prolific PL2303 USB to serial adaptor driver header file
+ *
+diff --git a/drivers/usb/serial/qcaux.c b/drivers/usb/serial/qcaux.c
+index 6e9f8af96959..f4a5921cc500 100644
+--- a/drivers/usb/serial/qcaux.c
++++ b/drivers/usb/serial/qcaux.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Qualcomm USB Auxiliary Serial Port driver
+ *
+diff --git a/drivers/usb/serial/qcserial.c b/drivers/usb/serial/qcserial.c
+index 55a8fb25ce2b..246213c03920 100644
+--- a/drivers/usb/serial/qcserial.c
++++ b/drivers/usb/serial/qcserial.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Qualcomm Serial USB driver
+ *
+diff --git a/drivers/usb/serial/quatech2.c b/drivers/usb/serial/quatech2.c
+index 60e17d1444c3..58fe44db82e8 100644
+--- a/drivers/usb/serial/quatech2.c
++++ b/drivers/usb/serial/quatech2.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * usb-serial driver for Quatech USB 2 devices
+ *
+diff --git a/drivers/usb/serial/safe_serial.c b/drivers/usb/serial/safe_serial.c
+index 27d7a7016298..3dd85f025cbe 100644
+--- a/drivers/usb/serial/safe_serial.c
++++ b/drivers/usb/serial/safe_serial.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Safe Encapsulated USB Serial Driver
+ *
+diff --git a/drivers/usb/serial/sierra.c b/drivers/usb/serial/sierra.c
+index a9c5564b6b65..75adcf1607a0 100644
+--- a/drivers/usb/serial/sierra.c
++++ b/drivers/usb/serial/sierra.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ USB Driver for Sierra Wireless
+
+diff --git a/drivers/usb/serial/spcp8x5.c b/drivers/usb/serial/spcp8x5.c
+index 5167b6564c8b..48d330ff03fa 100644
+--- a/drivers/usb/serial/spcp8x5.c
++++ b/drivers/usb/serial/spcp8x5.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * spcp8x5 USB to serial adaptor driver
+ *
+diff --git a/drivers/usb/serial/ssu100.c b/drivers/usb/serial/ssu100.c
+index 5aa7bbbeba3d..a7db9aff97a1 100644
+--- a/drivers/usb/serial/ssu100.c
++++ b/drivers/usb/serial/ssu100.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * usb-serial driver for Quatech SSU-100
+ *
+diff --git a/drivers/usb/serial/symbolserial.c b/drivers/usb/serial/symbolserial.c
+index 0d1727232d0c..25d966165211 100644
+--- a/drivers/usb/serial/symbolserial.c
++++ b/drivers/usb/serial/symbolserial.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Symbol USB barcode to serial driver
+ *
+diff --git a/drivers/usb/serial/ti_usb_3410_5052.c b/drivers/usb/serial/ti_usb_3410_5052.c
+index 8fc3854e5e69..eb184a78db94 100644
+--- a/drivers/usb/serial/ti_usb_3410_5052.c
++++ b/drivers/usb/serial/ti_usb_3410_5052.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * TI 3410/5052 USB Serial Driver
+ *
+diff --git a/drivers/usb/serial/upd78f0730.c b/drivers/usb/serial/upd78f0730.c
+index 6819a3486e5d..facad97ff487 100644
+--- a/drivers/usb/serial/upd78f0730.c
++++ b/drivers/usb/serial/upd78f0730.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Renesas Electronics uPD78F0730 USB to serial converter driver
+ *
+diff --git a/drivers/usb/serial/usb-serial-simple.c b/drivers/usb/serial/usb-serial-simple.c
+index 2674da40d9cd..1e8c1ae1209c 100644
+--- a/drivers/usb/serial/usb-serial-simple.c
++++ b/drivers/usb/serial/usb-serial-simple.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * USB Serial "Simple" driver
+ *
+diff --git a/drivers/usb/serial/usb-serial.c b/drivers/usb/serial/usb-serial.c
+index bb34f9f7eaf4..1030949a9647 100644
+--- a/drivers/usb/serial/usb-serial.c
++++ b/drivers/usb/serial/usb-serial.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * USB Serial Converter driver
+ *
+diff --git a/drivers/usb/serial/usb_debug.c b/drivers/usb/serial/usb_debug.c
+index c593ca8800e5..97e03e538009 100644
+--- a/drivers/usb/serial/usb_debug.c
++++ b/drivers/usb/serial/usb_debug.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * USB Debug cable driver
+ *
+diff --git a/drivers/usb/serial/usb_wwan.c b/drivers/usb/serial/usb_wwan.c
+index 59bfcb3da116..9e48be615b2f 100644
+--- a/drivers/usb/serial/usb_wwan.c
++++ b/drivers/usb/serial/usb_wwan.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ USB Driver layer for GSM modems
+
+diff --git a/drivers/usb/serial/visor.c b/drivers/usb/serial/visor.c
+index 879840ec0658..3ad6fb4523b1 100644
+--- a/drivers/usb/serial/visor.c
++++ b/drivers/usb/serial/visor.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * USB HandSpring Visor, Palm m50x, and Sony Clie driver
+ * (supports all of the Palm OS USB devices)
+diff --git a/drivers/usb/serial/visor.h b/drivers/usb/serial/visor.h
+index 4c456dd69ce5..e87de8c0c239 100644
+--- a/drivers/usb/serial/visor.h
++++ b/drivers/usb/serial/visor.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * USB HandSpring Visor driver
+ *
+diff --git a/drivers/usb/serial/whiteheat.c b/drivers/usb/serial/whiteheat.c
+index 55cebc1e6fec..1873f1046c58 100644
+--- a/drivers/usb/serial/whiteheat.c
++++ b/drivers/usb/serial/whiteheat.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * USB ConnectTech WhiteHEAT driver
+ *
+diff --git a/drivers/usb/serial/whiteheat.h b/drivers/usb/serial/whiteheat.h
+index 38065df4d2d8..024cc9266ecb 100644
+--- a/drivers/usb/serial/whiteheat.h
++++ b/drivers/usb/serial/whiteheat.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * USB ConnectTech WhiteHEAT driver
+ *
+diff --git a/drivers/usb/serial/wishbone-serial.c b/drivers/usb/serial/wishbone-serial.c
+index 4fed4a0bd702..8f227c485bfd 100644
+--- a/drivers/usb/serial/wishbone-serial.c
++++ b/drivers/usb/serial/wishbone-serial.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * USB Wishbone-Serial adapter driver
+ *
+diff --git a/drivers/usb/serial/xsens_mt.c b/drivers/usb/serial/xsens_mt.c
+index 3837d5113bb2..ef5f3f655a42 100644
+--- a/drivers/usb/serial/xsens_mt.c
++++ b/drivers/usb/serial/xsens_mt.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Xsens MT USB driver
+ *
+diff --git a/drivers/usb/storage/alauda.c b/drivers/usb/storage/alauda.c
+index 878b4b8761f5..ad71ff132080 100644
+--- a/drivers/usb/storage/alauda.c
++++ b/drivers/usb/storage/alauda.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for Alauda-based card readers
+ *
+diff --git a/drivers/usb/storage/cypress_atacb.c b/drivers/usb/storage/cypress_atacb.c
+index 5e4af44d7d9f..a326ad73de16 100644
+--- a/drivers/usb/storage/cypress_atacb.c
++++ b/drivers/usb/storage/cypress_atacb.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Support for emulating SAT (ata pass through) on devices based
+ * on the Cypress USB/ATA bridge supporting ATACB.
+diff --git a/drivers/usb/storage/datafab.c b/drivers/usb/storage/datafab.c
+index 723197af6ec5..f408d26700ce 100644
+--- a/drivers/usb/storage/datafab.c
++++ b/drivers/usb/storage/datafab.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for Datafab USB Compact Flash reader
+ *
+diff --git a/drivers/usb/storage/debug.c b/drivers/usb/storage/debug.c
+index 8d20804a59e6..182d2f8e9b2b 100644
+--- a/drivers/usb/storage/debug.c
++++ b/drivers/usb/storage/debug.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for USB Mass Storage compliant devices
+ * Debugging Functions Source Code File
+diff --git a/drivers/usb/storage/debug.h b/drivers/usb/storage/debug.h
+index 8ab73299b650..69dd4c480fb2 100644
+--- a/drivers/usb/storage/debug.h
++++ b/drivers/usb/storage/debug.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for USB Mass Storage compliant devices
+ * Debugging Functions Header File
+diff --git a/drivers/usb/storage/ene_ub6250.c b/drivers/usb/storage/ene_ub6250.c
+index 28100374f7bd..fc733fa14415 100644
+--- a/drivers/usb/storage/ene_ub6250.c
++++ b/drivers/usb/storage/ene_ub6250.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ *
+ * This program is free software; you can redistribute it and/or modify it
+diff --git a/drivers/usb/storage/freecom.c b/drivers/usb/storage/freecom.c
+index c0a5d954414b..3b1ffadd07bf 100644
+--- a/drivers/usb/storage/freecom.c
++++ b/drivers/usb/storage/freecom.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for Freecom USB/IDE adaptor
+ *
+diff --git a/drivers/usb/storage/initializers.c b/drivers/usb/storage/initializers.c
+index d9d8c17e05d1..9b574caa80ac 100644
+--- a/drivers/usb/storage/initializers.c
++++ b/drivers/usb/storage/initializers.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Special Initializers for certain USB Mass Storage devices
+ *
+diff --git a/drivers/usb/storage/initializers.h b/drivers/usb/storage/initializers.h
+index 039abf4d1cb7..9e6f6efb57f4 100644
+--- a/drivers/usb/storage/initializers.h
++++ b/drivers/usb/storage/initializers.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Header file for Special Initializers for certain USB Mass Storage devices
+ *
+diff --git a/drivers/usb/storage/isd200.c b/drivers/usb/storage/isd200.c
+index 6a7720e66595..0f8603cf2755 100644
+--- a/drivers/usb/storage/isd200.c
++++ b/drivers/usb/storage/isd200.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Transport & Protocol Driver for In-System Design, Inc. ISD200 ASIC
+ *
+diff --git a/drivers/usb/storage/jumpshot.c b/drivers/usb/storage/jumpshot.c
+index 011e5270690a..a1ead5b9d559 100644
+--- a/drivers/usb/storage/jumpshot.c
++++ b/drivers/usb/storage/jumpshot.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for Lexar "Jumpshot" Compact Flash reader
+ *
+diff --git a/drivers/usb/storage/karma.c b/drivers/usb/storage/karma.c
+index b05ba4929f00..7ecf2f83f8c9 100644
+--- a/drivers/usb/storage/karma.c
++++ b/drivers/usb/storage/karma.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for Rio Karma
+ *
+diff --git a/drivers/usb/storage/onetouch.c b/drivers/usb/storage/onetouch.c
+index acc3d03d8c1e..27873d0ad130 100644
+--- a/drivers/usb/storage/onetouch.c
++++ b/drivers/usb/storage/onetouch.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Support for the Maxtor OneTouch USB hard drive's button
+ *
+diff --git a/drivers/usb/storage/option_ms.c b/drivers/usb/storage/option_ms.c
+index 57282f12317b..7146c83bf82b 100644
+--- a/drivers/usb/storage/option_ms.c
++++ b/drivers/usb/storage/option_ms.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for Option High Speed Mobile Devices.
+ *
+diff --git a/drivers/usb/storage/protocol.c b/drivers/usb/storage/protocol.c
+index 74c38870a17e..b8b8e7066a04 100644
+--- a/drivers/usb/storage/protocol.c
++++ b/drivers/usb/storage/protocol.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for USB Mass Storage compliant devices
+ *
+diff --git a/drivers/usb/storage/protocol.h b/drivers/usb/storage/protocol.h
+index a55666880b7b..abedf13a8cf1 100644
+--- a/drivers/usb/storage/protocol.h
++++ b/drivers/usb/storage/protocol.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for USB Mass Storage compliant devices
+ * Protocol Functions Header File
+diff --git a/drivers/usb/storage/realtek_cr.c b/drivers/usb/storage/realtek_cr.c
+index ec83b3b5efa9..7d02a7c5cdd6 100644
+--- a/drivers/usb/storage/realtek_cr.c
++++ b/drivers/usb/storage/realtek_cr.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for Realtek RTS51xx USB card reader
+ *
+diff --git a/drivers/usb/storage/scsiglue.c b/drivers/usb/storage/scsiglue.c
+index 8cd2926fb1fe..878922fb54b8 100644
+--- a/drivers/usb/storage/scsiglue.c
++++ b/drivers/usb/storage/scsiglue.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for USB Mass Storage compliant devices
+ * SCSI layer glue code
+diff --git a/drivers/usb/storage/scsiglue.h b/drivers/usb/storage/scsiglue.h
+index d0a331dd9bc5..add14c47ce1d 100644
+--- a/drivers/usb/storage/scsiglue.h
++++ b/drivers/usb/storage/scsiglue.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for USB Mass Storage compliant devices
+ * SCSI Connecting Glue Header File
+diff --git a/drivers/usb/storage/sddr09.c b/drivers/usb/storage/sddr09.c
+index 44f8ffccd031..b37cb07dfc80 100644
+--- a/drivers/usb/storage/sddr09.c
++++ b/drivers/usb/storage/sddr09.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for SanDisk SDDR-09 SmartMedia reader
+ *
+diff --git a/drivers/usb/storage/sddr55.c b/drivers/usb/storage/sddr55.c
+index 147c50b3e00f..2e76b8e8c6ca 100644
+--- a/drivers/usb/storage/sddr55.c
++++ b/drivers/usb/storage/sddr55.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for SanDisk SDDR-55 SmartMedia reader
+ *
+diff --git a/drivers/usb/storage/shuttle_usbat.c b/drivers/usb/storage/shuttle_usbat.c
+index 3b0294e4df93..3e9da1d257b6 100644
+--- a/drivers/usb/storage/shuttle_usbat.c
++++ b/drivers/usb/storage/shuttle_usbat.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for SCM Microsystems (a.k.a. Shuttle) USB-ATAPI cable
+ *
+diff --git a/drivers/usb/storage/transport.c b/drivers/usb/storage/transport.c
+index a3ccb899df60..b31568e8f6c3 100644
+--- a/drivers/usb/storage/transport.c
++++ b/drivers/usb/storage/transport.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for USB Mass Storage compliant devices
+ *
+diff --git a/drivers/usb/storage/transport.h b/drivers/usb/storage/transport.h
+index dae3ecd2e6cf..98591db5fb6a 100644
+--- a/drivers/usb/storage/transport.h
++++ b/drivers/usb/storage/transport.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for USB Mass Storage compliant devices
+ * Transport Functions Header File
+diff --git a/drivers/usb/storage/uas.c b/drivers/usb/storage/uas.c
+index 33a6d624c843..4aadb1ccbf1f 100644
+--- a/drivers/usb/storage/uas.c
++++ b/drivers/usb/storage/uas.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * USB Attached SCSI
+ * Note that this is not the same as the USB Mass Storage driver
+diff --git a/drivers/usb/storage/unusual_alauda.h b/drivers/usb/storage/unusual_alauda.h
+index 763bc03032a1..311c5a21ac13 100644
+--- a/drivers/usb/storage/unusual_alauda.h
++++ b/drivers/usb/storage/unusual_alauda.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Unusual Devices File for the Alauda-based card readers
+ *
+diff --git a/drivers/usb/storage/unusual_cypress.h b/drivers/usb/storage/unusual_cypress.h
+index e9a2eb88869a..285370f13ee4 100644
+--- a/drivers/usb/storage/unusual_cypress.h
++++ b/drivers/usb/storage/unusual_cypress.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Unusual Devices File for devices based on the Cypress USB/ATA bridge
+ * with support for ATACB
+diff --git a/drivers/usb/storage/unusual_datafab.h b/drivers/usb/storage/unusual_datafab.h
+index 5049b6bbe5d5..03c0e72d7b9d 100644
+--- a/drivers/usb/storage/unusual_datafab.h
++++ b/drivers/usb/storage/unusual_datafab.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Unusual Devices File for the Datafab USB Compact Flash reader
+ *
+diff --git a/drivers/usb/storage/unusual_devs.h b/drivers/usb/storage/unusual_devs.h
+index d100290628bd..389cb4a1f9ba 100644
+--- a/drivers/usb/storage/unusual_devs.h
++++ b/drivers/usb/storage/unusual_devs.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for USB Mass Storage compliant devices
+ * Unusual Devices File
+diff --git a/drivers/usb/storage/unusual_ene_ub6250.h b/drivers/usb/storage/unusual_ene_ub6250.h
+index 5667f5d365c6..c9d9e52d884d 100644
+--- a/drivers/usb/storage/unusual_ene_ub6250.h
++++ b/drivers/usb/storage/unusual_ene_ub6250.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ *
+ * This program is free software; you can redistribute it and/or modify it
+diff --git a/drivers/usb/storage/unusual_freecom.h b/drivers/usb/storage/unusual_freecom.h
+index 1f5aab42ece2..06088feb8f96 100644
+--- a/drivers/usb/storage/unusual_freecom.h
++++ b/drivers/usb/storage/unusual_freecom.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Unusual Devices File for the Freecom USB/IDE adaptor
+ *
+diff --git a/drivers/usb/storage/unusual_isd200.h b/drivers/usb/storage/unusual_isd200.h
+index 9b6862ec3d4f..b924e3d75960 100644
+--- a/drivers/usb/storage/unusual_isd200.h
++++ b/drivers/usb/storage/unusual_isd200.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Unusual Devices File for In-System Design, Inc. ISD200 ASIC
+ *
+diff --git a/drivers/usb/storage/unusual_jumpshot.h b/drivers/usb/storage/unusual_jumpshot.h
+index 413e64fa6b95..1ca977374ba4 100644
+--- a/drivers/usb/storage/unusual_jumpshot.h
++++ b/drivers/usb/storage/unusual_jumpshot.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Unusual Devices File for the Lexar "Jumpshot" Compact Flash reader
+ *
+diff --git a/drivers/usb/storage/unusual_karma.h b/drivers/usb/storage/unusual_karma.h
+index e6fad3aeae20..84910d13c80a 100644
+--- a/drivers/usb/storage/unusual_karma.h
++++ b/drivers/usb/storage/unusual_karma.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Unusual Devices File for the Rio Karma
+ *
+diff --git a/drivers/usb/storage/unusual_onetouch.h b/drivers/usb/storage/unusual_onetouch.h
+index 425dc22f345a..28d39c4e20e2 100644
+--- a/drivers/usb/storage/unusual_onetouch.h
++++ b/drivers/usb/storage/unusual_onetouch.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Unusual Devices File for the Maxtor OneTouch USB hard drive's button
+ *
+diff --git a/drivers/usb/storage/unusual_realtek.h b/drivers/usb/storage/unusual_realtek.h
+index 8fe624ad302a..736e4f7ebe10 100644
+--- a/drivers/usb/storage/unusual_realtek.h
++++ b/drivers/usb/storage/unusual_realtek.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for Realtek RTS51xx USB card reader
+ *
+diff --git a/drivers/usb/storage/unusual_sddr09.h b/drivers/usb/storage/unusual_sddr09.h
+index d9d38ac4abf9..1098646d4b75 100644
+--- a/drivers/usb/storage/unusual_sddr09.h
++++ b/drivers/usb/storage/unusual_sddr09.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Unusual Devices File for SanDisk SDDR-09 SmartMedia reader
+ *
+diff --git a/drivers/usb/storage/unusual_sddr55.h b/drivers/usb/storage/unusual_sddr55.h
+index ebb1d1c6c467..b98c778051b8 100644
+--- a/drivers/usb/storage/unusual_sddr55.h
++++ b/drivers/usb/storage/unusual_sddr55.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Unusual Devices File for SanDisk SDDR-55 SmartMedia reader
+ *
+diff --git a/drivers/usb/storage/unusual_uas.h b/drivers/usb/storage/unusual_uas.h
+index f15aa47c54a9..3abe950e24e1 100644
+--- a/drivers/usb/storage/unusual_uas.h
++++ b/drivers/usb/storage/unusual_uas.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for USB Attached SCSI devices - Unusual Devices File
+ *
+diff --git a/drivers/usb/storage/unusual_usbat.h b/drivers/usb/storage/unusual_usbat.h
+index 2044ad5ef5e4..ac6bae08ac79 100644
+--- a/drivers/usb/storage/unusual_usbat.h
++++ b/drivers/usb/storage/unusual_usbat.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Unusual Devices File for SCM Microsystems (a.k.a. Shuttle) USB-ATAPI cable
+ *
+diff --git a/drivers/usb/storage/usb.c b/drivers/usb/storage/usb.c
+index 0dceb9fa3a06..84b8553944da 100644
+--- a/drivers/usb/storage/usb.c
++++ b/drivers/usb/storage/usb.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for USB Mass Storage compliant devices
+ *
+diff --git a/drivers/usb/storage/usb.h b/drivers/usb/storage/usb.h
+index 8fae28b40bb4..aa3da222f6b1 100644
+--- a/drivers/usb/storage/usb.h
++++ b/drivers/usb/storage/usb.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for USB Mass Storage compliant devices
+ * Main Header File
+diff --git a/drivers/usb/storage/usual-tables.c b/drivers/usb/storage/usual-tables.c
+index 499669bcf700..90ac516c1f12 100644
+--- a/drivers/usb/storage/usual-tables.c
++++ b/drivers/usb/storage/usual-tables.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Driver for USB Mass Storage devices
+ * Usual Tables File for usb-storage and libusual
+diff --git a/drivers/usb/typec/typec.c b/drivers/usb/typec/typec.c
+index 24e355ba109d..51fbd9a3ef9f 100644
+--- a/drivers/usb/typec/typec.c
++++ b/drivers/usb/typec/typec.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * USB Type-C Connector Class
+ *
+diff --git a/drivers/usb/typec/typec_wcove.c b/drivers/usb/typec/typec_wcove.c
+index e9c4e784a9cb..d51535a6b31a 100644
+--- a/drivers/usb/typec/typec_wcove.c
++++ b/drivers/usb/typec/typec_wcove.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /**
+ * typec_wcove.c - WhiskeyCove PMIC USB Type-C PHY driver
+ *
+diff --git a/drivers/usb/typec/ucsi/ucsi.c b/drivers/usb/typec/ucsi/ucsi.c
+index 251f5d66651e..d6e299ff28cf 100644
+--- a/drivers/usb/typec/ucsi/ucsi.c
++++ b/drivers/usb/typec/ucsi/ucsi.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * USB Type-C Connector System Software Interface driver
+ *
+diff --git a/drivers/usb/typec/ucsi/ucsi_acpi.c b/drivers/usb/typec/ucsi/ucsi_acpi.c
+index 494d2a49203a..1972507bfe23 100644
+--- a/drivers/usb/typec/ucsi/ucsi_acpi.c
++++ b/drivers/usb/typec/ucsi/ucsi_acpi.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * UCSI ACPI driver
+ *
+diff --git a/drivers/usb/usb-skeleton.c b/drivers/usb/usb-skeleton.c
+index bb0bd732e29a..cc31a1b6c7bd 100644
+--- a/drivers/usb/usb-skeleton.c
++++ b/drivers/usb/usb-skeleton.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * USB Skeleton driver - 2.2
+ *
+diff --git a/drivers/usb/usbip/stub.h b/drivers/usb/usbip/stub.h
+index 84c0599b45b7..fb03061a979e 100644
+--- a/drivers/usb/usbip/stub.h
++++ b/drivers/usb/usbip/stub.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2003-2008 Takahiro Hirofuchi
+ *
+diff --git a/drivers/usb/usbip/stub_dev.c b/drivers/usb/usbip/stub_dev.c
+index cc847f2edf38..fa4d107053f0 100644
+--- a/drivers/usb/usbip/stub_dev.c
++++ b/drivers/usb/usbip/stub_dev.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2003-2008 Takahiro Hirofuchi
+ *
+diff --git a/drivers/usb/usbip/stub_main.c b/drivers/usb/usbip/stub_main.c
+index 108dd65fbfbc..f595d9d62d94 100644
+--- a/drivers/usb/usbip/stub_main.c
++++ b/drivers/usb/usbip/stub_main.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2003-2008 Takahiro Hirofuchi
+ *
+diff --git a/drivers/usb/usbip/stub_rx.c b/drivers/usb/usbip/stub_rx.c
+index 5b807185f79e..874f1d21ba5d 100644
+--- a/drivers/usb/usbip/stub_rx.c
++++ b/drivers/usb/usbip/stub_rx.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2003-2008 Takahiro Hirofuchi
+ *
+diff --git a/drivers/usb/usbip/stub_tx.c b/drivers/usb/usbip/stub_tx.c
+index 96aa375b80d9..24e6a71f6c91 100644
+--- a/drivers/usb/usbip/stub_tx.c
++++ b/drivers/usb/usbip/stub_tx.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2003-2008 Takahiro Hirofuchi
+ *
+diff --git a/drivers/usb/usbip/usbip_common.c b/drivers/usb/usbip/usbip_common.c
+index 7f0d22131121..31d9019ea177 100644
+--- a/drivers/usb/usbip/usbip_common.c
++++ b/drivers/usb/usbip/usbip_common.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2003-2008 Takahiro Hirofuchi
+ * Copyright (C) 2015-2016 Samsung Electronics
+diff --git a/drivers/usb/usbip/usbip_common.h b/drivers/usb/usbip/usbip_common.h
+index c81c44c13a56..0598bb144cc6 100644
+--- a/drivers/usb/usbip/usbip_common.h
++++ b/drivers/usb/usbip/usbip_common.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2003-2008 Takahiro Hirofuchi
+ * Copyright (C) 2015-2016 Samsung Electronics
+diff --git a/drivers/usb/usbip/usbip_event.c b/drivers/usb/usbip/usbip_event.c
+index f8f7f3803a99..734d44d186e9 100644
+--- a/drivers/usb/usbip/usbip_event.c
++++ b/drivers/usb/usbip/usbip_event.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2003-2008 Takahiro Hirofuchi
+ * Copyright (C) 2015 Nobuo Iwata
+diff --git a/drivers/usb/usbip/vhci.h b/drivers/usb/usbip/vhci.h
+index 5cfb59e98e44..04240e450e3f 100644
+--- a/drivers/usb/usbip/vhci.h
++++ b/drivers/usb/usbip/vhci.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2003-2008 Takahiro Hirofuchi
+ * Copyright (C) 2015 Nobuo Iwata
+diff --git a/drivers/usb/usbip/vhci_hcd.c b/drivers/usb/usbip/vhci_hcd.c
+index 05aa1ba351b6..d95801e42fe7 100644
+--- a/drivers/usb/usbip/vhci_hcd.c
++++ b/drivers/usb/usbip/vhci_hcd.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2003-2008 Takahiro Hirofuchi
+ * Copyright (C) 2015-2016 Nobuo Iwata
+diff --git a/drivers/usb/usbip/vhci_rx.c b/drivers/usb/usbip/vhci_rx.c
+index 1343037d00f9..c7bef8d1db7f 100644
+--- a/drivers/usb/usbip/vhci_rx.c
++++ b/drivers/usb/usbip/vhci_rx.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2003-2008 Takahiro Hirofuchi
+ *
+diff --git a/drivers/usb/usbip/vhci_sysfs.c b/drivers/usb/usbip/vhci_sysfs.c
+index 4a22a9f06d96..6e6dbc3d184a 100644
+--- a/drivers/usb/usbip/vhci_sysfs.c
++++ b/drivers/usb/usbip/vhci_sysfs.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2003-2008 Takahiro Hirofuchi
+ * Copyright (C) 2015-2016 Nobuo Iwata
+diff --git a/drivers/usb/usbip/vhci_tx.c b/drivers/usb/usbip/vhci_tx.c
+index a9a663a578b6..3669fd53c354 100644
+--- a/drivers/usb/usbip/vhci_tx.c
++++ b/drivers/usb/usbip/vhci_tx.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2003-2008 Takahiro Hirofuchi
+ *
+diff --git a/drivers/usb/usbip/vudc.h b/drivers/usb/usbip/vudc.h
+index 25e01b09c4c3..44fb24193acd 100644
+--- a/drivers/usb/usbip/vudc.h
++++ b/drivers/usb/usbip/vudc.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2015 Karol Kosik <karo9@interia.eu>
+ * Copyright (C) 2015-2016 Samsung Electronics
+diff --git a/drivers/usb/usbip/vudc_dev.c b/drivers/usb/usbip/vudc_dev.c
+index 968471b62cbc..0c07348820ea 100644
+--- a/drivers/usb/usbip/vudc_dev.c
++++ b/drivers/usb/usbip/vudc_dev.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2015 Karol Kosik <karo9@interia.eu>
+ * Copyright (C) 2015-2016 Samsung Electronics
+diff --git a/drivers/usb/usbip/vudc_main.c b/drivers/usb/usbip/vudc_main.c
+index 9e655714e389..63aee6bb0dd9 100644
+--- a/drivers/usb/usbip/vudc_main.c
++++ b/drivers/usb/usbip/vudc_main.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2015 Karol Kosik <karo9@interia.eu>
+ * Copyright (C) 2015-2016 Samsung Electronics
+diff --git a/drivers/usb/usbip/vudc_rx.c b/drivers/usb/usbip/vudc_rx.c
+index d020e72b3122..be847fdd7df9 100644
+--- a/drivers/usb/usbip/vudc_rx.c
++++ b/drivers/usb/usbip/vudc_rx.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2015 Karol Kosik <karo9@interia.eu>
+ * Copyright (C) 2015-2016 Samsung Electronics
+diff --git a/drivers/usb/usbip/vudc_sysfs.c b/drivers/usb/usbip/vudc_sysfs.c
+index 7efa374a4970..8fca14efc827 100644
+--- a/drivers/usb/usbip/vudc_sysfs.c
++++ b/drivers/usb/usbip/vudc_sysfs.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2015 Karol Kosik <karo9@interia.eu>
+ * Copyright (C) 2015-2016 Samsung Electronics
+diff --git a/drivers/usb/usbip/vudc_transfer.c b/drivers/usb/usbip/vudc_transfer.c
+index 4cfd475ee865..11604fa586b4 100644
+--- a/drivers/usb/usbip/vudc_transfer.c
++++ b/drivers/usb/usbip/vudc_transfer.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2015 Karol Kosik <karo9@interia.eu>
+ * Copyright (C) 2015-2016 Samsung Electronics
+diff --git a/drivers/usb/usbip/vudc_tx.c b/drivers/usb/usbip/vudc_tx.c
+index 3ab4c86486a7..2b954cea8336 100644
+--- a/drivers/usb/usbip/vudc_tx.c
++++ b/drivers/usb/usbip/vudc_tx.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2015 Karol Kosik <karo9@interia.eu>
+ * Copyright (C) 2015-2016 Samsung Electronics
+diff --git a/drivers/usb/wusbcore/cbaf.c b/drivers/usb/wusbcore/cbaf.c
+index aa4e440e9975..5a3ee0d6cf31 100644
+--- a/drivers/usb/wusbcore/cbaf.c
++++ b/drivers/usb/wusbcore/cbaf.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Wireless USB - Cable Based Association
+ *
+diff --git a/drivers/usb/wusbcore/crypto.c b/drivers/usb/wusbcore/crypto.c
+index 062c205f0046..011ce6a35137 100644
+--- a/drivers/usb/wusbcore/crypto.c
++++ b/drivers/usb/wusbcore/crypto.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Ultra Wide Band
+ * AES-128 CCM Encryption
+diff --git a/drivers/usb/wusbcore/dev-sysfs.c b/drivers/usb/wusbcore/dev-sysfs.c
+index 78212f8180ce..02457f7e2ee3 100644
+--- a/drivers/usb/wusbcore/dev-sysfs.c
++++ b/drivers/usb/wusbcore/dev-sysfs.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * WUSB devices
+ * sysfs bindings
+diff --git a/drivers/usb/wusbcore/devconnect.c b/drivers/usb/wusbcore/devconnect.c
+index bf9551735938..18826c98b7d6 100644
+--- a/drivers/usb/wusbcore/devconnect.c
++++ b/drivers/usb/wusbcore/devconnect.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * WUSB Wire Adapter: Control/Data Streaming Interface (WUSB[8])
+ * Device Connect handling
+diff --git a/drivers/usb/wusbcore/mmc.c b/drivers/usb/wusbcore/mmc.c
+index 3f485df96226..235099df783e 100644
+--- a/drivers/usb/wusbcore/mmc.c
++++ b/drivers/usb/wusbcore/mmc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * WUSB Wire Adapter: Control/Data Streaming Interface (WUSB[8])
+ * MMC (Microscheduled Management Command) handling
+diff --git a/drivers/usb/wusbcore/pal.c b/drivers/usb/wusbcore/pal.c
+index 090f27371a8f..6e47b055ad47 100644
+--- a/drivers/usb/wusbcore/pal.c
++++ b/drivers/usb/wusbcore/pal.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Wireless USB Host Controller
+ * UWB Protocol Adaptation Layer (PAL) glue.
+diff --git a/drivers/usb/wusbcore/reservation.c b/drivers/usb/wusbcore/reservation.c
+index 7b1b2e2fb673..9463afe44c09 100644
+--- a/drivers/usb/wusbcore/reservation.c
++++ b/drivers/usb/wusbcore/reservation.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * WUSB cluster reservation management
+ *
+diff --git a/drivers/usb/wusbcore/rh.c b/drivers/usb/wusbcore/rh.c
+index a082fe62b1f0..0fb11cde5ff8 100644
+--- a/drivers/usb/wusbcore/rh.c
++++ b/drivers/usb/wusbcore/rh.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Wireless USB Host Controller
+ * Root Hub operations
+diff --git a/drivers/usb/wusbcore/security.c b/drivers/usb/wusbcore/security.c
+index 170f2c38de9b..1f84d4aea125 100644
+--- a/drivers/usb/wusbcore/security.c
++++ b/drivers/usb/wusbcore/security.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Wireless USB Host Controller
+ * Security support: encryption enablement, etc
+diff --git a/drivers/usb/wusbcore/wa-hc.c b/drivers/usb/wusbcore/wa-hc.c
+index d01496fd27fe..80e539931e34 100644
+--- a/drivers/usb/wusbcore/wa-hc.c
++++ b/drivers/usb/wusbcore/wa-hc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Wire Adapter Host Controller Driver
+ * Common items to HWA and DWA based HCDs
+diff --git a/drivers/usb/wusbcore/wa-hc.h b/drivers/usb/wusbcore/wa-hc.h
+index edc7267157f3..ab5fc274a73f 100644
+--- a/drivers/usb/wusbcore/wa-hc.h
++++ b/drivers/usb/wusbcore/wa-hc.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * HWA Host Controller Driver
+ * Wire Adapter Control/Data Streaming Iface (WUSB1.0[8])
+diff --git a/drivers/usb/wusbcore/wa-nep.c b/drivers/usb/wusbcore/wa-nep.c
+index e3819fc182b0..4cfc5ba70e62 100644
+--- a/drivers/usb/wusbcore/wa-nep.c
++++ b/drivers/usb/wusbcore/wa-nep.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * WUSB Wire Adapter: Control/Data Streaming Interface (WUSB[8])
+ * Notification EndPoint support
+diff --git a/drivers/usb/wusbcore/wa-rpipe.c b/drivers/usb/wusbcore/wa-rpipe.c
+index c7ecdbe19a32..aff01f19f09e 100644
+--- a/drivers/usb/wusbcore/wa-rpipe.c
++++ b/drivers/usb/wusbcore/wa-rpipe.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * WUSB Wire Adapter
+ * rpipe management
+diff --git a/drivers/usb/wusbcore/wa-xfer.c b/drivers/usb/wusbcore/wa-xfer.c
+index e70322b1dd02..e9c09155432d 100644
+--- a/drivers/usb/wusbcore/wa-xfer.c
++++ b/drivers/usb/wusbcore/wa-xfer.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * WUSB Wire Adapter
+ * Data transfer and URB enqueing
+diff --git a/drivers/usb/wusbcore/wusbhc.c b/drivers/usb/wusbcore/wusbhc.c
+index 5338e42533c8..ebd07e906906 100644
+--- a/drivers/usb/wusbcore/wusbhc.c
++++ b/drivers/usb/wusbcore/wusbhc.c
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Wireless USB Host Controller
+ * sysfs glue, wusbcore module support and life cycle management
+diff --git a/drivers/usb/wusbcore/wusbhc.h b/drivers/usb/wusbcore/wusbhc.h
+index 8c5bd000739b..6ccef2d0c7b3 100644
+--- a/drivers/usb/wusbcore/wusbhc.h
++++ b/drivers/usb/wusbcore/wusbhc.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Wireless USB Host Controller
+ * Common infrastructure for WHCI and HWA WUSB-HC drivers
+diff --git a/include/linux/usb/association.h b/include/linux/usb/association.h
+index 0a4a18b3c1bb..d7f3cb9b9db5 100644
+--- a/include/linux/usb/association.h
++++ b/include/linux/usb/association.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Wireless USB - Cable Based Association
+ *
+diff --git a/include/linux/usb/audio-v2.h b/include/linux/usb/audio-v2.h
+index fd73bc0e9027..3119d0ace7aa 100644
+--- a/include/linux/usb/audio-v2.h
++++ b/include/linux/usb/audio-v2.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (c) 2010 Daniel Mack <daniel@caiaq.de>
+ *
+diff --git a/include/linux/usb/audio.h b/include/linux/usb/audio.h
+index 3d84619110a4..170acd500ea1 100644
+--- a/include/linux/usb/audio.h
++++ b/include/linux/usb/audio.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * <linux/usb/audio.h> -- USB Audio definitions.
+ *
+diff --git a/include/linux/usb/c67x00.h b/include/linux/usb/c67x00.h
+index 83c6b45470ca..2fc39e3b7281 100644
+--- a/include/linux/usb/c67x00.h
++++ b/include/linux/usb/c67x00.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * usb_c67x00.h: platform definitions for the Cypress C67X00 USB chip
+ *
+diff --git a/include/linux/usb/cdc-wdm.h b/include/linux/usb/cdc-wdm.h
+index 0b3f4295c025..9b895f93d8de 100644
+--- a/include/linux/usb/cdc-wdm.h
++++ b/include/linux/usb/cdc-wdm.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * USB CDC Device Management subdriver
+ *
+diff --git a/include/linux/usb/cdc.h b/include/linux/usb/cdc.h
+index b5706f94ee9e..35d784cf32a4 100644
+--- a/include/linux/usb/cdc.h
++++ b/include/linux/usb/cdc.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * USB CDC common helpers
+ *
+diff --git a/include/linux/usb/cdc_ncm.h b/include/linux/usb/cdc_ncm.h
+index 1a59699cf82a..1646c06989df 100644
+--- a/include/linux/usb/cdc_ncm.h
++++ b/include/linux/usb/cdc_ncm.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+ /*
+ * Copyright (C) ST-Ericsson 2010-2012
+ * Contact: Alexey Orishko <alexey.orishko@stericsson.com>
+diff --git a/include/linux/usb/composite.h b/include/linux/usb/composite.h
+index 590d313b5f39..4b6b9283fa7b 100644
+--- a/include/linux/usb/composite.h
++++ b/include/linux/usb/composite.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * composite.h -- framework for usb gadgets which are composite devices
+ *
+diff --git a/include/linux/usb/ehci_def.h b/include/linux/usb/ehci_def.h
+index e479033bd782..a15ce99dfc2d 100644
+--- a/include/linux/usb/ehci_def.h
++++ b/include/linux/usb/ehci_def.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (c) 2001-2002 by David Brownell
+ *
+diff --git a/include/linux/usb/ehci_pdriver.h b/include/linux/usb/ehci_pdriver.h
+index db0431b39a63..dd742afdc03f 100644
+--- a/include/linux/usb/ehci_pdriver.h
++++ b/include/linux/usb/ehci_pdriver.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2012 Hauke Mehrtens <hauke@hauke-m.de>
+ *
+diff --git a/include/linux/usb/g_hid.h b/include/linux/usb/g_hid.h
+index 50f5745df28c..7581e488c237 100644
+--- a/include/linux/usb/g_hid.h
++++ b/include/linux/usb/g_hid.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * g_hid.h -- Header file for USB HID gadget driver
+ *
+diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h
+index 21468a722c4a..d3badbbbda97 100644
+--- a/include/linux/usb/gadget.h
++++ b/include/linux/usb/gadget.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * <linux/usb/gadget.h>
+ *
+diff --git a/include/linux/usb/gpio_vbus.h b/include/linux/usb/gpio_vbus.h
+index 837bba604a0b..804fb06cf6d6 100644
+--- a/include/linux/usb/gpio_vbus.h
++++ b/include/linux/usb/gpio_vbus.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * A simple GPIO VBUS sensing driver for B peripheral only devices
+ * with internal transceivers.
+diff --git a/include/linux/usb/hcd.h b/include/linux/usb/hcd.h
+index a1f03ebfde47..176900528822 100644
+--- a/include/linux/usb/hcd.h
++++ b/include/linux/usb/hcd.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (c) 2001-2002 by David Brownell
+ *
+diff --git a/include/linux/usb/input.h b/include/linux/usb/input.h
+index 0e010b220e85..974befa72ac0 100644
+--- a/include/linux/usb/input.h
++++ b/include/linux/usb/input.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2005 Dmitry Torokhov
+ *
+diff --git a/include/linux/usb/isp1301.h b/include/linux/usb/isp1301.h
+index d3a851c28b6a..dedb3b2473e8 100644
+--- a/include/linux/usb/isp1301.h
++++ b/include/linux/usb/isp1301.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * NXP ISP1301 USB transceiver driver
+ *
+diff --git a/include/linux/usb/m66592.h b/include/linux/usb/m66592.h
+index a4ba31ab2fed..2dfe68183495 100644
+--- a/include/linux/usb/m66592.h
++++ b/include/linux/usb/m66592.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * M66592 driver platform data
+ *
+diff --git a/include/linux/usb/musb-ux500.h b/include/linux/usb/musb-ux500.h
+index 1e2c7130f6e1..c4b7ad9850ca 100644
+--- a/include/linux/usb/musb-ux500.h
++++ b/include/linux/usb/musb-ux500.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2013 ST-Ericsson AB
+ *
+diff --git a/include/linux/usb/net2280.h b/include/linux/usb/net2280.h
+index 725120224472..08b85caecfaf 100644
+--- a/include/linux/usb/net2280.h
++++ b/include/linux/usb/net2280.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * NetChip 2280 high/full speed USB device controller.
+ * Unlike many such controllers, this one talks PCI.
+diff --git a/include/linux/usb/of.h b/include/linux/usb/of.h
+index 4031f47629ec..6cbe7a5c2b57 100644
+--- a/include/linux/usb/of.h
++++ b/include/linux/usb/of.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * OF helpers for usb devices.
+ *
+diff --git a/include/linux/usb/ohci_pdriver.h b/include/linux/usb/ohci_pdriver.h
+index 012f2b7eb2b6..7eb16cf587ee 100644
+--- a/include/linux/usb/ohci_pdriver.h
++++ b/include/linux/usb/ohci_pdriver.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2012 Hauke Mehrtens <hauke@hauke-m.de>
+ *
+diff --git a/include/linux/usb/otg-fsm.h b/include/linux/usb/otg-fsm.h
+index a0a8f878503c..e78eb577d0fa 100644
+--- a/include/linux/usb/otg-fsm.h
++++ b/include/linux/usb/otg-fsm.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /* Copyright (C) 2007,2008 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+diff --git a/include/linux/usb/phy_companion.h b/include/linux/usb/phy_companion.h
+index edd2ec23d282..407f530061cd 100644
+--- a/include/linux/usb/phy_companion.h
++++ b/include/linux/usb/phy_companion.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * phy-companion.h -- phy companion to indicate the comparator part of PHY
+ *
+diff --git a/include/linux/usb/r8a66597.h b/include/linux/usb/r8a66597.h
+index 55805f9dcf21..c0753d026bbf 100644
+--- a/include/linux/usb/r8a66597.h
++++ b/include/linux/usb/r8a66597.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * R8A66597 driver platform data
+ *
+diff --git a/include/linux/usb/renesas_usbhs.h b/include/linux/usb/renesas_usbhs.h
+index 00a47d058d83..88b002252551 100644
+--- a/include/linux/usb/renesas_usbhs.h
++++ b/include/linux/usb/renesas_usbhs.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-1.0+
+ /*
+ * Renesas USB
+ *
+diff --git a/include/linux/usb/rndis_host.h b/include/linux/usb/rndis_host.h
+index d44ef85db177..809bccd08455 100644
+--- a/include/linux/usb/rndis_host.h
++++ b/include/linux/usb/rndis_host.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Host Side support for RNDIS Networking Links
+ * Copyright (C) 2005 by David Brownell
+diff --git a/include/linux/usb/samsung_usb_phy.h b/include/linux/usb/samsung_usb_phy.h
+index 916782699f1c..dc0071741695 100644
+--- a/include/linux/usb/samsung_usb_phy.h
++++ b/include/linux/usb/samsung_usb_phy.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2012 Samsung Electronics Co.Ltd
+ * http://www.samsung.com/
+diff --git a/include/linux/usb/serial.h b/include/linux/usb/serial.h
+index e2f0ab07eea5..106551a5616e 100644
+--- a/include/linux/usb/serial.h
++++ b/include/linux/usb/serial.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * USB Serial Converter stuff
+ *
+diff --git a/include/linux/usb/storage.h b/include/linux/usb/storage.h
+index 305ee8db7faf..e0240f864548 100644
+--- a/include/linux/usb/storage.h
++++ b/include/linux/usb/storage.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ #ifndef __LINUX_USB_STORAGE_H
+ #define __LINUX_USB_STORAGE_H
+
+diff --git a/include/linux/usb/tegra_usb_phy.h b/include/linux/usb/tegra_usb_phy.h
+index 1de16c324ec8..d641ea1660b7 100644
+--- a/include/linux/usb/tegra_usb_phy.h
++++ b/include/linux/usb/tegra_usb_phy.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2010 Google, Inc.
+ *
+diff --git a/include/linux/usb/tilegx.h b/include/linux/usb/tilegx.h
+index 2d65e3435680..817908573fe8 100644
+--- a/include/linux/usb/tilegx.h
++++ b/include/linux/usb/tilegx.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright 2012 Tilera Corporation. All Rights Reserved.
+ *
+diff --git a/include/linux/usb/ulpi.h b/include/linux/usb/ulpi.h
+index 5f07407a367a..c515765adab7 100644
+--- a/include/linux/usb/ulpi.h
++++ b/include/linux/usb/ulpi.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * ulpi.h -- ULPI defines and function prorotypes
+ *
+diff --git a/include/linux/usb/usb338x.h b/include/linux/usb/usb338x.h
+index 11525d8d89a7..7189e3387bf9 100644
+--- a/include/linux/usb/usb338x.h
++++ b/include/linux/usb/usb338x.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * USB 338x super/high/full speed USB device controller.
+ * Unlike many such controllers, this one talks PCI.
+diff --git a/include/linux/usb/usbnet.h b/include/linux/usb/usbnet.h
+index e87a805cbfef..e2ec3582e549 100644
+--- a/include/linux/usb/usbnet.h
++++ b/include/linux/usb/usbnet.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*
+ * USB Networking Link Interface
+ *
+diff --git a/include/linux/usb/wusb-wa.h b/include/linux/usb/wusb-wa.h
+index c1257130769b..64a840b5106e 100644
+--- a/include/linux/usb/wusb-wa.h
++++ b/include/linux/usb/wusb-wa.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Wireless USB Wire Adapter constants and structures.
+ *
+diff --git a/include/linux/usb/wusb.h b/include/linux/usb/wusb.h
+index eeb28329fa3c..9e4a3213f2c2 100644
+--- a/include/linux/usb/wusb.h
++++ b/include/linux/usb/wusb.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Wireless USB Standard Definitions
+ * Event Size Tables
+diff --git a/include/linux/usb/xhci-dbgp.h b/include/linux/usb/xhci-dbgp.h
+index 80c1cca1f529..0a37f1283bf0 100644
+--- a/include/linux/usb/xhci-dbgp.h
++++ b/include/linux/usb/xhci-dbgp.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Standalone xHCI debug capability driver
+ *
+diff --git a/include/linux/usbdevice_fs.h b/include/linux/usbdevice_fs.h
+index 04a26285416c..79aab0065ec8 100644
+--- a/include/linux/usbdevice_fs.h
++++ b/include/linux/usbdevice_fs.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
+ /*****************************************************************************/
+
+ /*
+--
+2.19.0
+
diff --git a/patches/0235-USB-gadget-udc-Remove-redundant-license-text.patch b/patches/0235-USB-gadget-udc-Remove-redundant-license-text.patch
new file mode 100644
index 0000000..3bd38af
--- /dev/null
+++ b/patches/0235-USB-gadget-udc-Remove-redundant-license-text.patch
@@ -0,0 +1,1121 @@
+From b84a248245993bdfe08bc9aa11218b11daa2e634 Mon Sep 17 00:00:00 2001
+From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Date: Mon, 6 Nov 2017 15:37:31 +0100
+Subject: [PATCH 0235/1795] USB: gadget: udc: Remove redundant license text
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Now that the SPDX tag is in all USB files, that identifies the license
+in a specific and legally-defined manner. So the extra GPL text wording
+can be removed as it is no longer needed at all.
+
+This is done on a quest to remove the 700+ different ways that files in
+the kernel describe the GPL license text. And there's unneeded stuff
+like the address (sometimes incorrect) for the FSF which is never
+needed.
+
+No copyright headers or other non-license-description text was removed.
+
+Cc: Kevin Cernekee <cernekee@gmail.com>
+Cc: Florian Fainelli <f.fainelli@gmail.com>
+Cc: Vladimir Zapolskiy <vz@mleia.com>
+Cc: Sylvain Lemieux <slemieux.tyco@gmail.com>
+Cc: Daniel Mack <daniel@zonque.org>
+Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
+Cc: Michal Simek <michal.simek@xilinx.com>
+Cc: "Sören Brinkmann" <soren.brinkmann@xilinx.com>
+Cc: Raviteja Garimella <raviteja.garimella@broadcom.com>
+Cc: Romain Perier <romain.perier@collabora.com>
+Cc: Johan Hovold <johan@kernel.org>
+Cc: Al Cooper <alcooperx@gmail.com>
+Cc: Srinath Mannam <srinath.mannam@broadcom.com>
+Cc: Roger Quadros <rogerq@ti.com>
+Cc: Krzysztof Opasiak <k.opasiak@samsung.com>
+Cc: Stefan Agner <stefan@agner.ch>
+Cc: Alan Stern <stern@rowland.harvard.edu>
+Cc: "Felix Hädicke" <felixhaedicke@web.de>
+Cc: Peter Chen <peter.chen@nxp.com>
+Cc: Allen Pais <allen.lkml@gmail.com>
+Cc: Yuyang Du <yuyang.du@intel.com>
+Acked-by: Felipe Balbi <felipe.balbi@linux.intel.com>
+Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
+Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
+Acked-by: Li Yang <leoyang.li@nxp.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 229e3682393c31349539c79131996feeee6d5387)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/usb/gadget/udc/amd5536udc.h | 5 -----
+ drivers/usb/gadget/udc/amd5536udc_pci.c | 5 -----
+ drivers/usb/gadget/udc/at91_udc.c | 5 -----
+ drivers/usb/gadget/udc/at91_udc.h | 5 -----
+ drivers/usb/gadget/udc/atmel_usba_udc.c | 4 ----
+ drivers/usb/gadget/udc/atmel_usba_udc.h | 4 ----
+ drivers/usb/gadget/udc/bcm63xx_udc.c | 5 -----
+ drivers/usb/gadget/udc/bdc/bdc.h | 6 ------
+ drivers/usb/gadget/udc/bdc/bdc_cmd.c | 6 ------
+ drivers/usb/gadget/udc/bdc/bdc_cmd.h | 6 ------
+ drivers/usb/gadget/udc/bdc/bdc_core.c | 6 ------
+ drivers/usb/gadget/udc/bdc/bdc_dbg.c | 6 ------
+ drivers/usb/gadget/udc/bdc/bdc_dbg.h | 6 ------
+ drivers/usb/gadget/udc/bdc/bdc_ep.c | 6 ------
+ drivers/usb/gadget/udc/bdc/bdc_ep.h | 6 ------
+ drivers/usb/gadget/udc/bdc/bdc_pci.c | 6 ------
+ drivers/usb/gadget/udc/bdc/bdc_udc.c | 6 ------
+ drivers/usb/gadget/udc/core.c | 12 ------------
+ drivers/usb/gadget/udc/dummy_hcd.c | 5 -----
+ drivers/usb/gadget/udc/fotg210-udc.c | 4 ----
+ drivers/usb/gadget/udc/fotg210.h | 5 -----
+ drivers/usb/gadget/udc/fsl_mxc_udc.c | 5 -----
+ drivers/usb/gadget/udc/fsl_qe_udc.c | 5 -----
+ drivers/usb/gadget/udc/fsl_qe_udc.h | 5 -----
+ drivers/usb/gadget/udc/fsl_udc_core.c | 5 -----
+ drivers/usb/gadget/udc/fsl_usb2_udc.h | 5 -----
+ drivers/usb/gadget/udc/fusb300_udc.c | 4 ----
+ drivers/usb/gadget/udc/fusb300_udc.h | 4 ----
+ drivers/usb/gadget/udc/goku_udc.c | 4 ----
+ drivers/usb/gadget/udc/goku_udc.h | 4 ----
+ drivers/usb/gadget/udc/gr_udc.c | 5 -----
+ drivers/usb/gadget/udc/gr_udc.h | 5 -----
+ drivers/usb/gadget/udc/lpc32xx_udc.c | 14 --------------
+ drivers/usb/gadget/udc/m66592-udc.c | 4 ----
+ drivers/usb/gadget/udc/m66592-udc.h | 4 ----
+ drivers/usb/gadget/udc/mv_u3d.h | 4 ----
+ drivers/usb/gadget/udc/mv_u3d_core.c | 4 ----
+ drivers/usb/gadget/udc/mv_udc.h | 5 -----
+ drivers/usb/gadget/udc/mv_udc_core.c | 5 -----
+ drivers/usb/gadget/udc/net2272.c | 14 --------------
+ drivers/usb/gadget/udc/net2272.h | 14 --------------
+ drivers/usb/gadget/udc/net2280.c | 5 -----
+ drivers/usb/gadget/udc/net2280.h | 5 -----
+ drivers/usb/gadget/udc/omap_udc.c | 5 -----
+ drivers/usb/gadget/udc/pch_udc.c | 4 ----
+ drivers/usb/gadget/udc/pxa25x_udc.c | 5 -----
+ drivers/usb/gadget/udc/pxa25x_udc.h | 6 ------
+ drivers/usb/gadget/udc/pxa27x_udc.c | 5 -----
+ drivers/usb/gadget/udc/pxa27x_udc.h | 5 -----
+ drivers/usb/gadget/udc/r8a66597-udc.c | 4 ----
+ drivers/usb/gadget/udc/r8a66597-udc.h | 4 ----
+ drivers/usb/gadget/udc/renesas_usb3.c | 4 ----
+ drivers/usb/gadget/udc/s3c-hsudc.c | 6 +-----
+ drivers/usb/gadget/udc/s3c2410_udc.c | 5 -----
+ drivers/usb/gadget/udc/s3c2410_udc.h | 5 -----
+ drivers/usb/gadget/udc/snps_udc_core.c | 5 -----
+ drivers/usb/gadget/udc/snps_udc_plat.c | 9 ---------
+ drivers/usb/gadget/udc/trace.c | 9 ---------
+ drivers/usb/gadget/udc/trace.h | 12 ------------
+ drivers/usb/gadget/udc/udc-xilinx.c | 6 ------
+ 60 files changed, 1 insertion(+), 346 deletions(-)
+
+diff --git a/drivers/usb/gadget/udc/amd5536udc.h b/drivers/usb/gadget/udc/amd5536udc.h
+index 5a92388ef8bb..dfdef6a28904 100644
+--- a/drivers/usb/gadget/udc/amd5536udc.h
++++ b/drivers/usb/gadget/udc/amd5536udc.h
+@@ -4,11 +4,6 @@
+ *
+ * Copyright (C) 2007 AMD (http://www.amd.com)
+ * Author: Thomas Dahlmann
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ #ifndef AMD5536UDC_H
+diff --git a/drivers/usb/gadget/udc/amd5536udc_pci.c b/drivers/usb/gadget/udc/amd5536udc_pci.c
+index cf9117e84534..57b6f66331cf 100644
+--- a/drivers/usb/gadget/udc/amd5536udc_pci.c
++++ b/drivers/usb/gadget/udc/amd5536udc_pci.c
+@@ -4,11 +4,6 @@
+ *
+ * Copyright (C) 2005-2007 AMD (http://www.amd.com)
+ * Author: Thomas Dahlmann
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ /*
+diff --git a/drivers/usb/gadget/udc/at91_udc.c b/drivers/usb/gadget/udc/at91_udc.c
+index 972f78409df7..bfe278294e88 100644
+--- a/drivers/usb/gadget/udc/at91_udc.c
++++ b/drivers/usb/gadget/udc/at91_udc.c
+@@ -5,11 +5,6 @@
+ * Copyright (C) 2004 by Thomas Rathbone
+ * Copyright (C) 2005 by HP Labs
+ * Copyright (C) 2005 by David Brownell
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ #undef VERBOSE_DEBUG
+diff --git a/drivers/usb/gadget/udc/at91_udc.h b/drivers/usb/gadget/udc/at91_udc.h
+index 9581a868032e..fd58c5b81826 100644
+--- a/drivers/usb/gadget/udc/at91_udc.h
++++ b/drivers/usb/gadget/udc/at91_udc.h
+@@ -3,11 +3,6 @@
+ * Copyright (C) 2004 by Thomas Rathbone, HP Labs
+ * Copyright (C) 2005 by Ivan Kokshaysky
+ * Copyright (C) 2006 by SAN People
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ #ifndef AT91_UDC_H
+diff --git a/drivers/usb/gadget/udc/atmel_usba_udc.c b/drivers/usb/gadget/udc/atmel_usba_udc.c
+index 12543decf9ab..075eaaa8a408 100644
+--- a/drivers/usb/gadget/udc/atmel_usba_udc.c
++++ b/drivers/usb/gadget/udc/atmel_usba_udc.c
+@@ -3,10 +3,6 @@
+ * Driver for the Atmel USBA high speed USB device controller
+ *
+ * Copyright (C) 2005-2007 Atmel Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+ */
+ #include <linux/clk.h>
+ #include <linux/clk/at91_pmc.h>
+diff --git a/drivers/usb/gadget/udc/atmel_usba_udc.h b/drivers/usb/gadget/udc/atmel_usba_udc.h
+index 10df5e4aaeb2..860a00a6fdd0 100644
+--- a/drivers/usb/gadget/udc/atmel_usba_udc.h
++++ b/drivers/usb/gadget/udc/atmel_usba_udc.h
+@@ -3,10 +3,6 @@
+ * Driver for the Atmel USBA high speed USB device controller
+ *
+ * Copyright (C) 2005-2007 Atmel Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+ */
+ #ifndef __LINUX_USB_GADGET_USBA_UDC_H__
+ #define __LINUX_USB_GADGET_USBA_UDC_H__
+diff --git a/drivers/usb/gadget/udc/bcm63xx_udc.c b/drivers/usb/gadget/udc/bcm63xx_udc.c
+index 403cb339fd7b..29f254793592 100644
+--- a/drivers/usb/gadget/udc/bcm63xx_udc.c
++++ b/drivers/usb/gadget/udc/bcm63xx_udc.c
+@@ -4,11 +4,6 @@
+ *
+ * Copyright (C) 2012 Kevin Cernekee <cernekee@gmail.com>
+ * Copyright (C) 2012 Broadcom Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ #include <linux/bitops.h>
+diff --git a/drivers/usb/gadget/udc/bdc/bdc.h b/drivers/usb/gadget/udc/bdc/bdc.h
+index 960620bccc25..6e1e881dc51e 100644
+--- a/drivers/usb/gadget/udc/bdc/bdc.h
++++ b/drivers/usb/gadget/udc/bdc/bdc.h
+@@ -5,12 +5,6 @@
+ * Copyright (C) 2014 Broadcom Corporation
+ *
+ * Author: Ashwini Pahuja
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License as published by the
+- * Free Software Foundation; either version 2 of the License, or (at your
+- * option) any later version.
+- *
+ */
+
+ #ifndef __LINUX_BDC_H__
+diff --git a/drivers/usb/gadget/udc/bdc/bdc_cmd.c b/drivers/usb/gadget/udc/bdc/bdc_cmd.c
+index ad3240375f87..6305bf2c8b59 100644
+--- a/drivers/usb/gadget/udc/bdc/bdc_cmd.c
++++ b/drivers/usb/gadget/udc/bdc/bdc_cmd.c
+@@ -5,12 +5,6 @@
+ * Copyright (C) 2014 Broadcom Corporation
+ *
+ * Author: Ashwini Pahuja
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License as published by the
+- * Free Software Foundation; either version 2 of the License, or (at your
+- * option) any later version.
+- *
+ */
+ #include <linux/scatterlist.h>
+ #include <linux/slab.h>
+diff --git a/drivers/usb/gadget/udc/bdc/bdc_cmd.h b/drivers/usb/gadget/udc/bdc/bdc_cmd.h
+index 64648fbef233..29cc988a671a 100644
+--- a/drivers/usb/gadget/udc/bdc/bdc_cmd.h
++++ b/drivers/usb/gadget/udc/bdc/bdc_cmd.h
+@@ -5,12 +5,6 @@
+ * Copyright (C) 2014 Broadcom Corporation
+ *
+ * Author: Ashwini Pahuja
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License as published by the
+- * Free Software Foundation; either version 2 of the License, or (at your
+- * option) any later version.
+- *
+ */
+ #ifndef __LINUX_BDC_CMD_H__
+ #define __LINUX_BDC_CMD_H__
+diff --git a/drivers/usb/gadget/udc/bdc/bdc_core.c b/drivers/usb/gadget/udc/bdc/bdc_core.c
+index 2ab6a6b45f9e..d39f070acbd7 100644
+--- a/drivers/usb/gadget/udc/bdc/bdc_core.c
++++ b/drivers/usb/gadget/udc/bdc/bdc_core.c
+@@ -5,12 +5,6 @@
+ * Copyright (C) 2014 Broadcom Corporation
+ *
+ * Author: Ashwini Pahuja
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License as published by the
+- * Free Software Foundation; either version 2 of the License, or (at your
+- * option) any later version.
+- *
+ */
+ #include <linux/module.h>
+ #include <linux/kernel.h>
+diff --git a/drivers/usb/gadget/udc/bdc/bdc_dbg.c b/drivers/usb/gadget/udc/bdc/bdc_dbg.c
+index 11216cd6cb94..7ba7448ad743 100644
+--- a/drivers/usb/gadget/udc/bdc/bdc_dbg.c
++++ b/drivers/usb/gadget/udc/bdc/bdc_dbg.c
+@@ -5,12 +5,6 @@
+ * Copyright (C) 2014 Broadcom Corporation
+ *
+ * Author: Ashwini Pahuja
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License as published by the
+- * Free Software Foundation; either version 2 of the License, or (at your
+- * option) any later version.
+- *
+ */
+
+ #include "bdc.h"
+diff --git a/drivers/usb/gadget/udc/bdc/bdc_dbg.h b/drivers/usb/gadget/udc/bdc/bdc_dbg.h
+index f62d59b30a3e..373d5abffbb8 100644
+--- a/drivers/usb/gadget/udc/bdc/bdc_dbg.h
++++ b/drivers/usb/gadget/udc/bdc/bdc_dbg.h
+@@ -5,12 +5,6 @@
+ * Copyright (C) 2014 Broadcom Corporation
+ *
+ * Author: Ashwini Pahuja
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License as published by the
+- * Free Software Foundation; either version 2 of the License, or (at your
+- * option) any later version.
+- *
+ */
+ #ifndef __LINUX_BDC_DBG_H__
+ #define __LINUX_BDC_DBG_H__
+diff --git a/drivers/usb/gadget/udc/bdc/bdc_ep.c b/drivers/usb/gadget/udc/bdc/bdc_ep.c
+index e9fda8e6e87d..f40d4c13cfa4 100644
+--- a/drivers/usb/gadget/udc/bdc/bdc_ep.c
++++ b/drivers/usb/gadget/udc/bdc/bdc_ep.c
+@@ -7,12 +7,6 @@
+ * Author: Ashwini Pahuja
+ *
+ * Based on drivers under drivers/usb/
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License as published by the
+- * Free Software Foundation; either version 2 of the License, or (at your
+- * option) any later version.
+- *
+ */
+ #include <linux/module.h>
+ #include <linux/pci.h>
+diff --git a/drivers/usb/gadget/udc/bdc/bdc_ep.h b/drivers/usb/gadget/udc/bdc/bdc_ep.h
+index db52fc78c8bf..a37ff8033b4f 100644
+--- a/drivers/usb/gadget/udc/bdc/bdc_ep.h
++++ b/drivers/usb/gadget/udc/bdc/bdc_ep.h
+@@ -5,12 +5,6 @@
+ * Copyright (C) 2014 Broadcom Corporation
+ *
+ * Author: Ashwini Pahuja
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License as published by the
+- * Free Software Foundation; either version 2 of the License, or (at your
+- * option) any later version.
+- *
+ */
+ #ifndef __LINUX_BDC_EP_H__
+ #define __LINUX_BDC_EP_H__
+diff --git a/drivers/usb/gadget/udc/bdc/bdc_pci.c b/drivers/usb/gadget/udc/bdc/bdc_pci.c
+index 1fec9c4fdadd..6dbc489513cd 100644
+--- a/drivers/usb/gadget/udc/bdc/bdc_pci.c
++++ b/drivers/usb/gadget/udc/bdc/bdc_pci.c
+@@ -7,12 +7,6 @@
+ * Author: Ashwini Pahuja
+ *
+ * Based on drivers under drivers/usb/
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License as published by the
+- * Free Software Foundation; either version 2 of the License, or (at your
+- * option) any later version.
+- *
+ */
+
+ #include <linux/kernel.h>
+diff --git a/drivers/usb/gadget/udc/bdc/bdc_udc.c b/drivers/usb/gadget/udc/bdc/bdc_udc.c
+index 492b8b872d2c..7bfd58c846f7 100644
+--- a/drivers/usb/gadget/udc/bdc/bdc_udc.c
++++ b/drivers/usb/gadget/udc/bdc/bdc_udc.c
+@@ -7,12 +7,6 @@
+ * Author: Ashwini Pahuja
+ *
+ * Based on drivers under drivers/usb/gadget/udc/
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License as published by the
+- * Free Software Foundation; either version 2 of the License, or (at your
+- * option) any later version.
+- *
+ */
+ #include <linux/module.h>
+ #include <linux/pci.h>
+diff --git a/drivers/usb/gadget/udc/core.c b/drivers/usb/gadget/udc/core.c
+index 9f928875d411..2908c1a0eb6d 100644
+--- a/drivers/usb/gadget/udc/core.c
++++ b/drivers/usb/gadget/udc/core.c
+@@ -4,18 +4,6 @@
+ *
+ * Copyright (C) 2010 Texas Instruments
+ * Author: Felipe Balbi <balbi@ti.com>
+- *
+- * This program is free software: you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 of
+- * the License as published by the Free Software Foundation.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+ #include <linux/kernel.h>
+diff --git a/drivers/usb/gadget/udc/dummy_hcd.c b/drivers/usb/gadget/udc/dummy_hcd.c
+index af3dc1d33683..2edca6213a8b 100644
+--- a/drivers/usb/gadget/udc/dummy_hcd.c
++++ b/drivers/usb/gadget/udc/dummy_hcd.c
+@@ -6,11 +6,6 @@
+ *
+ * Copyright (C) 2003 David Brownell
+ * Copyright (C) 2003-2005 Alan Stern
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+
+diff --git a/drivers/usb/gadget/udc/fotg210-udc.c b/drivers/usb/gadget/udc/fotg210-udc.c
+index 6a7e0e26a1d1..53a48f561458 100644
+--- a/drivers/usb/gadget/udc/fotg210-udc.c
++++ b/drivers/usb/gadget/udc/fotg210-udc.c
+@@ -5,10 +5,6 @@
+ * Copyright (C) 2013 Faraday Technology Corporation
+ *
+ * Author : Yuan-Hsin Chen <yhchen@faraday-tech.com>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; version 2 of the License.
+ */
+
+ #include <linux/dma-mapping.h>
+diff --git a/drivers/usb/gadget/udc/fotg210.h b/drivers/usb/gadget/udc/fotg210.h
+index 2c825a884ebc..08c32957503b 100644
+--- a/drivers/usb/gadget/udc/fotg210.h
++++ b/drivers/usb/gadget/udc/fotg210.h
+@@ -4,11 +4,6 @@
+ *
+ * Copyright (C) 2013 Faraday Technology Corporation
+ * Author: Yuan-Hsin Chen <yhchen@faraday-tech.com>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ #include <linux/kernel.h>
+diff --git a/drivers/usb/gadget/udc/fsl_mxc_udc.c b/drivers/usb/gadget/udc/fsl_mxc_udc.c
+index 089fbfc44da7..f29cf5c6160c 100644
+--- a/drivers/usb/gadget/udc/fsl_mxc_udc.c
++++ b/drivers/usb/gadget/udc/fsl_mxc_udc.c
+@@ -6,11 +6,6 @@
+ * Description:
+ * Helper routines for i.MX3x SoCs from Freescale, needed by the fsl_usb2_udc.c
+ * driver to function correctly on these systems.
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License as published by the
+- * Free Software Foundation; either version 2 of the License, or (at your
+- * option) any later version.
+ */
+ #include <linux/clk.h>
+ #include <linux/delay.h>
+diff --git a/drivers/usb/gadget/udc/fsl_qe_udc.c b/drivers/usb/gadget/udc/fsl_qe_udc.c
+index 228577c6c180..2707be628298 100644
+--- a/drivers/usb/gadget/udc/fsl_qe_udc.c
++++ b/drivers/usb/gadget/udc/fsl_qe_udc.c
+@@ -12,11 +12,6 @@
+ * Freescle QE/CPM USB Pheripheral Controller Driver
+ * The controller can be found on MPC8360, MPC8272, and etc.
+ * MPC8360 Rev 1.1 may need QE mircocode update
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License as published by the
+- * Free Software Foundation; either version 2 of the License, or (at your
+- * option) any later version.
+ */
+
+ #undef USB_TRACE
+diff --git a/drivers/usb/gadget/udc/fsl_qe_udc.h b/drivers/usb/gadget/udc/fsl_qe_udc.h
+index 2b1aec81c397..2c537a904ee7 100644
+--- a/drivers/usb/gadget/udc/fsl_qe_udc.h
++++ b/drivers/usb/gadget/udc/fsl_qe_udc.h
+@@ -9,11 +9,6 @@
+ *
+ * Description:
+ * Freescale USB device/endpoint management registers
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or (at
+- * your option) any later version.
+ */
+
+ #ifndef __FSL_QE_UDC_H
+diff --git a/drivers/usb/gadget/udc/fsl_udc_core.c b/drivers/usb/gadget/udc/fsl_udc_core.c
+index e728a7f481d9..f210cfdb9d44 100644
+--- a/drivers/usb/gadget/udc/fsl_udc_core.c
++++ b/drivers/usb/gadget/udc/fsl_udc_core.c
+@@ -11,11 +11,6 @@
+ * This can be found on MPC8349E/MPC8313E/MPC5121E cpus.
+ * The driver is previously named as mpc_udc. Based on bare board
+ * code from Dave Liu and Shlomi Gridish.
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License as published by the
+- * Free Software Foundation; either version 2 of the License, or (at your
+- * option) any later version.
+ */
+
+ #undef VERBOSE
+diff --git a/drivers/usb/gadget/udc/fsl_usb2_udc.h b/drivers/usb/gadget/udc/fsl_usb2_udc.h
+index e5a25ef5803b..4ba651ae9048 100644
+--- a/drivers/usb/gadget/udc/fsl_usb2_udc.h
++++ b/drivers/usb/gadget/udc/fsl_usb2_udc.h
+@@ -3,11 +3,6 @@
+ * Copyright (C) 2004,2012 Freescale Semiconductor, Inc
+ * All rights reserved.
+ *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License as published by the
+- * Free Software Foundation; either version 2 of the License, or (at your
+- * option) any later version.
+- *
+ * Freescale USB device/endpoint management registers
+ */
+ #ifndef __FSL_USB2_UDC_H
+diff --git a/drivers/usb/gadget/udc/fusb300_udc.c b/drivers/usb/gadget/udc/fusb300_udc.c
+index e05946c421ed..263804d154a7 100644
+--- a/drivers/usb/gadget/udc/fusb300_udc.c
++++ b/drivers/usb/gadget/udc/fusb300_udc.c
+@@ -5,10 +5,6 @@
+ * Copyright (C) 2010 Faraday Technology Corp.
+ *
+ * Author : Yuan-hsin Chen <yhchen@faraday-tech.com>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; version 2 of the License.
+ */
+ #include <linux/dma-mapping.h>
+ #include <linux/err.h>
+diff --git a/drivers/usb/gadget/udc/fusb300_udc.h b/drivers/usb/gadget/udc/fusb300_udc.h
+index 4b055ef31cc1..eb3d6d379ba7 100644
+--- a/drivers/usb/gadget/udc/fusb300_udc.h
++++ b/drivers/usb/gadget/udc/fusb300_udc.h
+@@ -5,10 +5,6 @@
+ * Copyright (C) 2010 Faraday Technology Corp.
+ *
+ * Author : Yuan-hsin Chen <yhchen@faraday-tech.com>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; version 2 of the License.
+ */
+
+
+diff --git a/drivers/usb/gadget/udc/goku_udc.c b/drivers/usb/gadget/udc/goku_udc.c
+index f90a82a739c4..41590ac57d7d 100644
+--- a/drivers/usb/gadget/udc/goku_udc.c
++++ b/drivers/usb/gadget/udc/goku_udc.c
+@@ -6,10 +6,6 @@
+ * by Stuart Lynne, Tom Rushworth, and Bruce Balden
+ * Copyright (C) 2002 Toshiba Corporation
+ * Copyright (C) 2003 MontaVista Software (source@mvista.com)
+- *
+- * This file is licensed under the terms of the GNU General Public
+- * License version 2. This program is licensed "as is" without any
+- * warranty of any kind, whether express or implied.
+ */
+
+ /*
+diff --git a/drivers/usb/gadget/udc/goku_udc.h b/drivers/usb/gadget/udc/goku_udc.h
+index 99a01453df06..70023d401079 100644
+--- a/drivers/usb/gadget/udc/goku_udc.h
++++ b/drivers/usb/gadget/udc/goku_udc.h
+@@ -6,10 +6,6 @@
+ * by Stuart Lynne, Tom Rushworth, and Bruce Balden
+ * Copyright (C) 2002 Toshiba Corporation
+ * Copyright (C) 2003 MontaVista Software (source@mvista.com)
+- *
+- * This file is licensed under the terms of the GNU General Public
+- * License version 2. This program is licensed "as is" without any
+- * warranty of any kind, whether express or implied.
+ */
+
+ /*
+diff --git a/drivers/usb/gadget/udc/gr_udc.c b/drivers/usb/gadget/udc/gr_udc.c
+index 675aa1043be4..936ec65c09b3 100644
+--- a/drivers/usb/gadget/udc/gr_udc.c
++++ b/drivers/usb/gadget/udc/gr_udc.c
+@@ -10,11 +10,6 @@
+ * Full documentation of the GRUSBDC core can be found here:
+ * http://www.gaisler.com/products/grlib/grip.pdf
+ *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License as published by the
+- * Free Software Foundation; either version 2 of the License, or (at your
+- * option) any later version.
+- *
+ * Contributors:
+ * - Andreas Larsson <andreas@gaisler.com>
+ * - Marko Isomaki
+diff --git a/drivers/usb/gadget/udc/gr_udc.h b/drivers/usb/gadget/udc/gr_udc.h
+index 6c08ddf03521..3e913268c8c5 100644
+--- a/drivers/usb/gadget/udc/gr_udc.h
++++ b/drivers/usb/gadget/udc/gr_udc.h
+@@ -10,11 +10,6 @@
+ * Full documentation of the GRUSBDC core can be found here:
+ * http://www.gaisler.com/products/grlib/grip.pdf
+ *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License as published by the
+- * Free Software Foundation; either version 2 of the License, or (at your
+- * option) any later version.
+- *
+ * Contributors:
+ * - Andreas Larsson <andreas@gaisler.com>
+ * - Marko Isomaki
+diff --git a/drivers/usb/gadget/udc/lpc32xx_udc.c b/drivers/usb/gadget/udc/lpc32xx_udc.c
+index 7dcd0904bf25..b0781771704e 100644
+--- a/drivers/usb/gadget/udc/lpc32xx_udc.c
++++ b/drivers/usb/gadget/udc/lpc32xx_udc.c
+@@ -13,20 +13,6 @@
+ *
+ * Note: This driver is based on original work done by Mike James for
+ * the LPC3180.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+ #include <linux/clk.h>
+diff --git a/drivers/usb/gadget/udc/m66592-udc.c b/drivers/usb/gadget/udc/m66592-udc.c
+index 39076551e325..1b43a6e95d70 100644
+--- a/drivers/usb/gadget/udc/m66592-udc.c
++++ b/drivers/usb/gadget/udc/m66592-udc.c
+@@ -5,10 +5,6 @@
+ * Copyright (C) 2006-2007 Renesas Solutions Corp.
+ *
+ * Author : Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; version 2 of the License.
+ */
+
+ #include <linux/module.h>
+diff --git a/drivers/usb/gadget/udc/m66592-udc.h b/drivers/usb/gadget/udc/m66592-udc.h
+index 4a62b4fda942..01a64685b8a3 100644
+--- a/drivers/usb/gadget/udc/m66592-udc.h
++++ b/drivers/usb/gadget/udc/m66592-udc.h
+@@ -5,10 +5,6 @@
+ * Copyright (C) 2006-2007 Renesas Solutions Corp.
+ *
+ * Author : Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; version 2 of the License.
+ */
+
+ #ifndef __M66592_UDC_H__
+diff --git a/drivers/usb/gadget/udc/mv_u3d.h b/drivers/usb/gadget/udc/mv_u3d.h
+index 4c7812429920..982625b7197a 100644
+--- a/drivers/usb/gadget/udc/mv_u3d.h
++++ b/drivers/usb/gadget/udc/mv_u3d.h
+@@ -1,10 +1,6 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms and conditions of the GNU General Public License,
+- * version 2, as published by the Free Software Foundation.
+ */
+
+ #ifndef __MV_U3D_H
+diff --git a/drivers/usb/gadget/udc/mv_u3d_core.c b/drivers/usb/gadget/udc/mv_u3d_core.c
+index 6f336fe8bbef..35e02a8d0091 100644
+--- a/drivers/usb/gadget/udc/mv_u3d_core.c
++++ b/drivers/usb/gadget/udc/mv_u3d_core.c
+@@ -1,10 +1,6 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms and conditions of the GNU General Public License,
+- * version 2, as published by the Free Software Foundation.
+ */
+
+ #include <linux/module.h>
+diff --git a/drivers/usb/gadget/udc/mv_udc.h b/drivers/usb/gadget/udc/mv_udc.h
+index 4acf7edf4d86..b3f759c0962c 100644
+--- a/drivers/usb/gadget/udc/mv_udc.h
++++ b/drivers/usb/gadget/udc/mv_udc.h
+@@ -1,11 +1,6 @@
+ // SPDX-License-Identifier: GPL-2.0+
+ /*
+ * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License as published by the
+- * Free Software Foundation; either version 2 of the License, or (at your
+- * option) any later version.
+ */
+
+ #ifndef __MV_UDC_H
+diff --git a/drivers/usb/gadget/udc/mv_udc_core.c b/drivers/usb/gadget/udc/mv_udc_core.c
+index df4065cf5fcd..95f52232493b 100644
+--- a/drivers/usb/gadget/udc/mv_udc_core.c
++++ b/drivers/usb/gadget/udc/mv_udc_core.c
+@@ -3,11 +3,6 @@
+ * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
+ * Author: Chao Xie <chao.xie@marvell.com>
+ * Neil Zhang <zhangwm@marvell.com>
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License as published by the
+- * Free Software Foundation; either version 2 of the License, or (at your
+- * option) any later version.
+ */
+
+ #include <linux/module.h>
+diff --git a/drivers/usb/gadget/udc/net2272.c b/drivers/usb/gadget/udc/net2272.c
+index a3018f93df58..660878a19505 100644
+--- a/drivers/usb/gadget/udc/net2272.c
++++ b/drivers/usb/gadget/udc/net2272.c
+@@ -4,20 +4,6 @@
+ *
+ * Copyright (C) 2005-2006 PLX Technology, Inc.
+ * Copyright (C) 2006-2011 Analog Devices, Inc.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+ #include <linux/delay.h>
+diff --git a/drivers/usb/gadget/udc/net2272.h b/drivers/usb/gadget/udc/net2272.h
+index f0212cf042a2..8e644627992d 100644
+--- a/drivers/usb/gadget/udc/net2272.h
++++ b/drivers/usb/gadget/udc/net2272.h
+@@ -4,20 +4,6 @@
+ *
+ * Copyright (C) 2005-2006 PLX Technology, Inc.
+ * Copyright (C) 2006-2011 Analog Devices, Inc.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+ #ifndef __NET2272_H__
+diff --git a/drivers/usb/gadget/udc/net2280.c b/drivers/usb/gadget/udc/net2280.c
+index a0b2ab0c04f7..318246d8b2e2 100644
+--- a/drivers/usb/gadget/udc/net2280.c
++++ b/drivers/usb/gadget/udc/net2280.c
+@@ -32,11 +32,6 @@
+ *
+ * Modified Ricardo Ribalda Qtechnology AS to provide compatibility
+ * with usb 338x chip. Based on PLX driver
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ #include <linux/module.h>
+diff --git a/drivers/usb/gadget/udc/net2280.h b/drivers/usb/gadget/udc/net2280.h
+index 18a881e7f93f..b65a797544d7 100644
+--- a/drivers/usb/gadget/udc/net2280.h
++++ b/drivers/usb/gadget/udc/net2280.h
+@@ -8,11 +8,6 @@
+ * Copyright (C) 2002 NetChip Technology, Inc. (http://www.netchip.com)
+ * Copyright (C) 2003 David Brownell
+ * Copyright (C) 2014 Ricardo Ribalda - Qtechnology/AS
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ #include <linux/usb/net2280.h>
+diff --git a/drivers/usb/gadget/udc/omap_udc.c b/drivers/usb/gadget/udc/omap_udc.c
+index 5531ea492ed2..fc7f810baef7 100644
+--- a/drivers/usb/gadget/udc/omap_udc.c
++++ b/drivers/usb/gadget/udc/omap_udc.c
+@@ -6,11 +6,6 @@
+ * Copyright (C) 2004-2005 David Brownell
+ *
+ * OMAP2 & DMA support by Kyungmin Park <kyungmin.park@samsung.com>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ #undef DEBUG
+diff --git a/drivers/usb/gadget/udc/pch_udc.c b/drivers/usb/gadget/udc/pch_udc.c
+index cc24334504b8..afaea11ec771 100644
+--- a/drivers/usb/gadget/udc/pch_udc.c
++++ b/drivers/usb/gadget/udc/pch_udc.c
+@@ -1,10 +1,6 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2011 LAPIS Semiconductor Co., Ltd.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; version 2 of the License.
+ */
+ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+ #include <linux/kernel.h>
+diff --git a/drivers/usb/gadget/udc/pxa25x_udc.c b/drivers/usb/gadget/udc/pxa25x_udc.c
+index ffbd4dd84c15..da0daa1432de 100644
+--- a/drivers/usb/gadget/udc/pxa25x_udc.c
++++ b/drivers/usb/gadget/udc/pxa25x_udc.c
+@@ -7,11 +7,6 @@
+ * Copyright (C) 2003 Benedikt Spranger, Pengutronix
+ * Copyright (C) 2003 David Brownell
+ * Copyright (C) 2003 Joshua Wise
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ /* #define VERBOSE_DEBUG */
+diff --git a/drivers/usb/gadget/udc/pxa25x_udc.h b/drivers/usb/gadget/udc/pxa25x_udc.h
+index 1532e7e71f99..ccc6b921f067 100644
+--- a/drivers/usb/gadget/udc/pxa25x_udc.h
++++ b/drivers/usb/gadget/udc/pxa25x_udc.h
+@@ -4,12 +4,6 @@
+ *
+ * Copyright (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
+ * Copyright (C) 2003 David Brownell
+- *
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ #ifndef __LINUX_USB_GADGET_PXA25X_H
+diff --git a/drivers/usb/gadget/udc/pxa27x_udc.c b/drivers/usb/gadget/udc/pxa27x_udc.c
+index 14606f340325..be2761f1b3f5 100644
+--- a/drivers/usb/gadget/udc/pxa27x_udc.c
++++ b/drivers/usb/gadget/udc/pxa27x_udc.c
+@@ -4,11 +4,6 @@
+ *
+ * Inspired by original driver by Frank Becker, David Brownell, and others.
+ * Copyright (C) 2008 Robert Jarzmik
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+ #include <linux/module.h>
+ #include <linux/kernel.h>
+diff --git a/drivers/usb/gadget/udc/pxa27x_udc.h b/drivers/usb/gadget/udc/pxa27x_udc.h
+index cfdece686abe..1128d39a4255 100644
+--- a/drivers/usb/gadget/udc/pxa27x_udc.h
++++ b/drivers/usb/gadget/udc/pxa27x_udc.h
+@@ -5,11 +5,6 @@
+ *
+ * Inspired by original driver by Frank Becker, David Brownell, and others.
+ * Copyright (C) 2008 Robert Jarzmik
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ #ifndef __LINUX_USB_GADGET_PXA27X_H
+diff --git a/drivers/usb/gadget/udc/r8a66597-udc.c b/drivers/usb/gadget/udc/r8a66597-udc.c
+index 8d876d90b7ff..5f0618716ca7 100644
+--- a/drivers/usb/gadget/udc/r8a66597-udc.c
++++ b/drivers/usb/gadget/udc/r8a66597-udc.c
+@@ -5,10 +5,6 @@
+ * Copyright (C) 2006-2009 Renesas Solutions Corp.
+ *
+ * Author : Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; version 2 of the License.
+ */
+
+ #include <linux/module.h>
+diff --git a/drivers/usb/gadget/udc/r8a66597-udc.h b/drivers/usb/gadget/udc/r8a66597-udc.h
+index 0f6d41e61841..9a115caba661 100644
+--- a/drivers/usb/gadget/udc/r8a66597-udc.h
++++ b/drivers/usb/gadget/udc/r8a66597-udc.h
+@@ -5,10 +5,6 @@
+ * Copyright (C) 2007-2009 Renesas Solutions Corp.
+ *
+ * Author : Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; version 2 of the License.
+ */
+
+ #ifndef __R8A66597_H__
+diff --git a/drivers/usb/gadget/udc/renesas_usb3.c b/drivers/usb/gadget/udc/renesas_usb3.c
+index 9f68b46d5d1a..7e04b5c0fd32 100644
+--- a/drivers/usb/gadget/udc/renesas_usb3.c
++++ b/drivers/usb/gadget/udc/renesas_usb3.c
+@@ -3,10 +3,6 @@
+ * Renesas USB3.0 Peripheral driver (USB gadget)
+ *
+ * Copyright (C) 2015-2017 Renesas Electronics Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; version 2 of the License.
+ */
+
+ #include <linux/debugfs.h>
+diff --git a/drivers/usb/gadget/udc/s3c-hsudc.c b/drivers/usb/gadget/udc/s3c-hsudc.c
+index 9707b945eef2..31c7c5587cf9 100644
+--- a/drivers/usb/gadget/udc/s3c-hsudc.c
++++ b/drivers/usb/gadget/udc/s3c-hsudc.c
+@@ -9,11 +9,7 @@
+ * The S3C24XX USB 2.0 high-speed USB controller supports upto 9 endpoints.
+ * Each endpoint can be configured as either in or out endpoint. Endpoints
+ * can be configured for Bulk or Interrupt transfer mode.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+-*/
++ */
+
+ #include <linux/kernel.h>
+ #include <linux/module.h>
+diff --git a/drivers/usb/gadget/udc/s3c2410_udc.c b/drivers/usb/gadget/udc/s3c2410_udc.c
+index ed874cabd339..f154f49e98c8 100644
+--- a/drivers/usb/gadget/udc/s3c2410_udc.c
++++ b/drivers/usb/gadget/udc/s3c2410_udc.c
+@@ -6,11 +6,6 @@
+ *
+ * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard
+ * Additional cleanups by Ben Dooks <ben-linux@fluff.org>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ #define pr_fmt(fmt) "s3c2410_udc: " fmt
+diff --git a/drivers/usb/gadget/udc/s3c2410_udc.h b/drivers/usb/gadget/udc/s3c2410_udc.h
+index cfabc83c2244..bdcaa8dd300f 100644
+--- a/drivers/usb/gadget/udc/s3c2410_udc.h
++++ b/drivers/usb/gadget/udc/s3c2410_udc.h
+@@ -5,11 +5,6 @@
+ *
+ * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard
+ * Additional cleanups by Ben Dooks <ben-linux@fluff.org>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ #ifndef _S3C2410_UDC_H
+diff --git a/drivers/usb/gadget/udc/snps_udc_core.c b/drivers/usb/gadget/udc/snps_udc_core.c
+index dba9359ece0d..4f2233b91d38 100644
+--- a/drivers/usb/gadget/udc/snps_udc_core.c
++++ b/drivers/usb/gadget/udc/snps_udc_core.c
+@@ -4,11 +4,6 @@
+ *
+ * Copyright (C) 2005-2007 AMD (http://www.amd.com)
+ * Author: Thomas Dahlmann
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+ */
+
+ /*
+diff --git a/drivers/usb/gadget/udc/snps_udc_plat.c b/drivers/usb/gadget/udc/snps_udc_plat.c
+index 800a35b48ab1..32f1d3e90c26 100644
+--- a/drivers/usb/gadget/udc/snps_udc_plat.c
++++ b/drivers/usb/gadget/udc/snps_udc_plat.c
+@@ -3,15 +3,6 @@
+ * snps_udc_plat.c - Synopsys UDC Platform Driver
+ *
+ * Copyright (C) 2016 Broadcom
+- *
+- * This program is free software; you can redistribute it and/or
+- * modify it under the terms of the GNU General Public License as
+- * published by the Free Software Foundation version 2.
+- *
+- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+- * kind, whether express or implied; without even the implied warranty
+- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+ */
+
+ #include <linux/extcon.h>
+diff --git a/drivers/usb/gadget/udc/trace.c b/drivers/usb/gadget/udc/trace.c
+index fbc139292245..7430624c0bd7 100644
+--- a/drivers/usb/gadget/udc/trace.c
++++ b/drivers/usb/gadget/udc/trace.c
+@@ -4,15 +4,6 @@
+ *
+ * Copyright (C) 2016 Intel Corporation
+ * Author: Felipe Balbi <felipe.balbi@linux.intel.com>
+- *
+- * This program is free software: you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 of
+- * the License as published by the Free Software Foundation.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+ */
+
+ #define CREATE_TRACE_POINTS
+diff --git a/drivers/usb/gadget/udc/trace.h b/drivers/usb/gadget/udc/trace.h
+index 06b162bcdb54..f07ddb3f4bb9 100644
+--- a/drivers/usb/gadget/udc/trace.h
++++ b/drivers/usb/gadget/udc/trace.h
+@@ -4,18 +4,6 @@
+ *
+ * Copyright (C) 2016 Intel Corporation
+ * Author: Felipe Balbi <felipe.balbi@linux.intel.com>
+- *
+- * This program is free software: you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 of
+- * the License as published by the Free Software Foundation.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+ #undef TRACE_SYSTEM
+diff --git a/drivers/usb/gadget/udc/udc-xilinx.c b/drivers/usb/gadget/udc/udc-xilinx.c
+index 374a75d68365..7da2b9ce8cb3 100644
+--- a/drivers/usb/gadget/udc/udc-xilinx.c
++++ b/drivers/usb/gadget/udc/udc-xilinx.c
+@@ -9,12 +9,6 @@
+ *
+ * Some parts of this driver code is based on the driver for at91-series
+ * USB peripheral controller (at91_udc.c).
+- *
+- * This program is free software; you can redistribute it
+- * and/or modify it under the terms of the GNU General Public
+- * License as published by the Free Software Foundation;
+- * either version 2 of the License, or (at your option) any
+- * later version.
+ */
+
+ #include <linux/delay.h>
+--
+2.19.0
+
diff --git a/patches/0236-usb-renesas_usbhs-unify-Gen2-3-pipe_config-setting.patch b/patches/0236-usb-renesas_usbhs-unify-Gen2-3-pipe_config-setting.patch
new file mode 100644
index 0000000..f231384
--- /dev/null
+++ b/patches/0236-usb-renesas_usbhs-unify-Gen2-3-pipe_config-setting.patch
@@ -0,0 +1,56 @@
+From 0277eb130c00c4dbcba8a152569403bc58378423 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Tue, 3 Oct 2017 20:09:13 +0900
+Subject: [PATCH 0236/1795] usb: renesas_usbhs: unify Gen2/3 pipe_config
+ setting
+
+This patch unifies the Gen2 and Gen3 pipe_config setting on
+usbhs_parse_dt().
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
+(cherry picked from commit a877b8e553fd2808e8693c75e0d945f413ccf5b6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/usb/renesas_usbhs/common.c | 13 ++++---------
+ 1 file changed, 4 insertions(+), 9 deletions(-)
+
+diff --git a/drivers/usb/renesas_usbhs/common.c b/drivers/usb/renesas_usbhs/common.c
+index f5968a0d392a..8392de20cac1 100644
+--- a/drivers/usb/renesas_usbhs/common.c
++++ b/drivers/usb/renesas_usbhs/common.c
+@@ -520,8 +520,11 @@ static struct renesas_usbhs_platform_info *usbhs_parse_dt(struct device *dev)
+ dparam->enable_gpio = gpio;
+
+ if (dparam->type == USBHS_TYPE_RCAR_GEN2 ||
+- dparam->type == USBHS_TYPE_RCAR_GEN3)
++ dparam->type == USBHS_TYPE_RCAR_GEN3) {
+ dparam->has_usb_dmac = 1;
++ dparam->pipe_configs = usbhsc_new_pipe;
++ dparam->pipe_size = ARRAY_SIZE(usbhsc_new_pipe);
++ }
+
+ return info;
+ }
+@@ -578,17 +581,9 @@ static int usbhs_probe(struct platform_device *pdev)
+ switch (priv->dparam.type) {
+ case USBHS_TYPE_RCAR_GEN2:
+ priv->pfunc = usbhs_rcar2_ops;
+- if (!priv->dparam.pipe_configs) {
+- priv->dparam.pipe_configs = usbhsc_new_pipe;
+- priv->dparam.pipe_size = ARRAY_SIZE(usbhsc_new_pipe);
+- }
+ break;
+ case USBHS_TYPE_RCAR_GEN3:
+ priv->pfunc = usbhs_rcar3_ops;
+- if (!priv->dparam.pipe_configs) {
+- priv->dparam.pipe_configs = usbhsc_new_pipe;
+- priv->dparam.pipe_size = ARRAY_SIZE(usbhsc_new_pipe);
+- }
+ break;
+ default:
+ if (!info->platform_callback.get_id) {
+--
+2.19.0
+
diff --git a/patches/0237-usb-renesas_usbhs-add-support-for-R-Car-D3.patch b/patches/0237-usb-renesas_usbhs-add-support-for-R-Car-D3.patch
new file mode 100644
index 0000000..6071fdb
--- /dev/null
+++ b/patches/0237-usb-renesas_usbhs-add-support-for-R-Car-D3.patch
@@ -0,0 +1,187 @@
+From 2c5234135015cd090d5a440bf9fca2c7142c2b6c Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Tue, 3 Oct 2017 20:09:14 +0900
+Subject: [PATCH 0237/1795] usb: renesas_usbhs: add support for R-Car D3
+
+This patch adds support for R-Car D3. This SoC needs to release
+the PLL reset by the UGCTRL register. So, since this is not the same
+as other R-Car Gen3 SoCs, this patch adds a new type as
+"USBHS_TYPE_RCAR_GEN3_WITH_PLL".
+
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
+(cherry picked from commit 0f38672c629b79fa2b929d2c391bc063a08279eb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ .../devicetree/bindings/usb/renesas_usbhs.txt | 1 +
+ drivers/usb/renesas_usbhs/common.c | 10 +++-
+ drivers/usb/renesas_usbhs/rcar3.c | 48 +++++++++++++++++++
+ drivers/usb/renesas_usbhs/rcar3.h | 1 +
+ include/linux/usb/renesas_usbhs.h | 5 +-
+ 5 files changed, 62 insertions(+), 3 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/usb/renesas_usbhs.txt b/Documentation/devicetree/bindings/usb/renesas_usbhs.txt
+index 9e18e000339e..e79f6e43061a 100644
+--- a/Documentation/devicetree/bindings/usb/renesas_usbhs.txt
++++ b/Documentation/devicetree/bindings/usb/renesas_usbhs.txt
+@@ -10,6 +10,7 @@ Required properties:
+ - "renesas,usbhs-r8a7794" for r8a7794 (R-Car E2) compatible device
+ - "renesas,usbhs-r8a7795" for r8a7795 (R-Car H3) compatible device
+ - "renesas,usbhs-r8a7796" for r8a7796 (R-Car M3-W) compatible device
++ - "renesas,usbhs-r8a77995" for r8a77995 (R-Car D3) compatible device
+ - "renesas,rcar-gen2-usbhs" for R-Car Gen2 compatible device
+ - "renesas,rcar-gen3-usbhs" for R-Car Gen3 compatible device
+
+diff --git a/drivers/usb/renesas_usbhs/common.c b/drivers/usb/renesas_usbhs/common.c
+index 8392de20cac1..c0dcb1b1a37d 100644
+--- a/drivers/usb/renesas_usbhs/common.c
++++ b/drivers/usb/renesas_usbhs/common.c
+@@ -486,6 +486,10 @@ static const struct of_device_id usbhs_of_match[] = {
+ .compatible = "renesas,usbhs-r8a7796",
+ .data = (void *)USBHS_TYPE_RCAR_GEN3,
+ },
++ {
++ .compatible = "renesas,usbhs-r8a77995",
++ .data = (void *)USBHS_TYPE_RCAR_GEN3_WITH_PLL,
++ },
+ {
+ .compatible = "renesas,rcar-gen2-usbhs",
+ .data = (void *)USBHS_TYPE_RCAR_GEN2,
+@@ -520,7 +524,8 @@ static struct renesas_usbhs_platform_info *usbhs_parse_dt(struct device *dev)
+ dparam->enable_gpio = gpio;
+
+ if (dparam->type == USBHS_TYPE_RCAR_GEN2 ||
+- dparam->type == USBHS_TYPE_RCAR_GEN3) {
++ dparam->type == USBHS_TYPE_RCAR_GEN3 ||
++ dparam->type == USBHS_TYPE_RCAR_GEN3_WITH_PLL) {
+ dparam->has_usb_dmac = 1;
+ dparam->pipe_configs = usbhsc_new_pipe;
+ dparam->pipe_size = ARRAY_SIZE(usbhsc_new_pipe);
+@@ -585,6 +590,9 @@ static int usbhs_probe(struct platform_device *pdev)
+ case USBHS_TYPE_RCAR_GEN3:
+ priv->pfunc = usbhs_rcar3_ops;
+ break;
++ case USBHS_TYPE_RCAR_GEN3_WITH_PLL:
++ priv->pfunc = usbhs_rcar3_with_pll_ops;
++ break;
+ default:
+ if (!info->platform_callback.get_id) {
+ dev_err(&pdev->dev, "no platform callbacks");
+diff --git a/drivers/usb/renesas_usbhs/rcar3.c b/drivers/usb/renesas_usbhs/rcar3.c
+index 0857d0d0abcd..11a13887a71d 100644
+--- a/drivers/usb/renesas_usbhs/rcar3.c
++++ b/drivers/usb/renesas_usbhs/rcar3.c
+@@ -16,24 +16,39 @@
+ #include "rcar3.h"
+
+ #define LPSTS 0x102
++#define UGCTRL 0x180 /* 32-bit register */
+ #define UGCTRL2 0x184 /* 32-bit register */
++#define UGSTS 0x188 /* 32-bit register */
+
+ /* Low Power Status register (LPSTS) */
+ #define LPSTS_SUSPM 0x4000
+
++/* R-Car D3 only: USB General control register (UGCTRL) */
++#define UGCTRL_PLLRESET 0x00000001
++#define UGCTRL_CONNECT 0x00000004
++
+ /*
+ * USB General control register 2 (UGCTRL2)
+ * Remarks: bit[31:11] and bit[9:6] should be 0
+ */
+ #define UGCTRL2_RESERVED_3 0x00000001 /* bit[3:0] should be B'0001 */
++#define UGCTRL2_USB0SEL_HSUSB 0x00000020
+ #define UGCTRL2_USB0SEL_OTG 0x00000030
+ #define UGCTRL2_VBUSSEL 0x00000400
+
++/* R-Car D3 only: USB General status register (UGSTS) */
++#define UGSTS_LOCK 0x00000100
++
+ static void usbhs_write32(struct usbhs_priv *priv, u32 reg, u32 data)
+ {
+ iowrite32(data, priv->base + reg);
+ }
+
++static u32 usbhs_read32(struct usbhs_priv *priv, u32 reg)
++{
++ return ioread32(priv->base + reg);
++}
++
+ static int usbhs_rcar3_power_ctrl(struct platform_device *pdev,
+ void __iomem *base, int enable)
+ {
+@@ -53,6 +68,34 @@ static int usbhs_rcar3_power_ctrl(struct platform_device *pdev,
+ return 0;
+ }
+
++/* R-Car D3 needs to release UGCTRL.PLLRESET */
++static int usbhs_rcar3_power_and_pll_ctrl(struct platform_device *pdev,
++ void __iomem *base, int enable)
++{
++ struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev);
++ u32 val;
++ int timeout = 1000;
++
++ if (enable) {
++ usbhs_write32(priv, UGCTRL, 0); /* release PLLRESET */
++ usbhs_write32(priv, UGCTRL2, UGCTRL2_RESERVED_3 |
++ UGCTRL2_USB0SEL_HSUSB);
++
++ usbhs_bset(priv, LPSTS, LPSTS_SUSPM, LPSTS_SUSPM);
++ do {
++ val = usbhs_read32(priv, UGSTS);
++ udelay(1);
++ } while (!(val & UGSTS_LOCK) && timeout--);
++ usbhs_write32(priv, UGCTRL, UGCTRL_CONNECT);
++ } else {
++ usbhs_write32(priv, UGCTRL, 0);
++ usbhs_bset(priv, LPSTS, LPSTS_SUSPM, 0);
++ usbhs_write32(priv, UGCTRL, UGCTRL_PLLRESET);
++ }
++
++ return 0;
++}
++
+ static int usbhs_rcar3_get_id(struct platform_device *pdev)
+ {
+ return USBHS_GADGET;
+@@ -62,3 +105,8 @@ const struct renesas_usbhs_platform_callback usbhs_rcar3_ops = {
+ .power_ctrl = usbhs_rcar3_power_ctrl,
+ .get_id = usbhs_rcar3_get_id,
+ };
++
++const struct renesas_usbhs_platform_callback usbhs_rcar3_with_pll_ops = {
++ .power_ctrl = usbhs_rcar3_power_and_pll_ctrl,
++ .get_id = usbhs_rcar3_get_id,
++};
+diff --git a/drivers/usb/renesas_usbhs/rcar3.h b/drivers/usb/renesas_usbhs/rcar3.h
+index 5f850b23ff18..7fe98175f94f 100644
+--- a/drivers/usb/renesas_usbhs/rcar3.h
++++ b/drivers/usb/renesas_usbhs/rcar3.h
+@@ -1,3 +1,4 @@
+ #include "common.h"
+
+ extern const struct renesas_usbhs_platform_callback usbhs_rcar3_ops;
++extern const struct renesas_usbhs_platform_callback usbhs_rcar3_with_pll_ops;
+diff --git a/include/linux/usb/renesas_usbhs.h b/include/linux/usb/renesas_usbhs.h
+index 88b002252551..67102f3d59d4 100644
+--- a/include/linux/usb/renesas_usbhs.h
++++ b/include/linux/usb/renesas_usbhs.h
+@@ -184,8 +184,9 @@ struct renesas_usbhs_driver_param {
+ #define USBHS_USB_DMAC_XFER_SIZE 32 /* hardcode the xfer size */
+ };
+
+-#define USBHS_TYPE_RCAR_GEN2 1
+-#define USBHS_TYPE_RCAR_GEN3 2
++#define USBHS_TYPE_RCAR_GEN2 1
++#define USBHS_TYPE_RCAR_GEN3 2
++#define USBHS_TYPE_RCAR_GEN3_WITH_PLL 3
+
+ /*
+ * option:
+--
+2.19.0
+
diff --git a/patches/0238-usb-renesas_usbhs-Use-of_device_get_match_data-helpe.patch b/patches/0238-usb-renesas_usbhs-Use-of_device_get_match_data-helpe.patch
new file mode 100644
index 0000000..f67e68e
--- /dev/null
+++ b/patches/0238-usb-renesas_usbhs-Use-of_device_get_match_data-helpe.patch
@@ -0,0 +1,43 @@
+From 3d9b462a291f5179d72164a0566f33d2b1b49716 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 4 Oct 2017 14:26:48 +0200
+Subject: [PATCH 0238/1795] usb: renesas_usbhs: Use of_device_get_match_data()
+ helper
+
+Use the of_device_get_match_data() helper instead of open coding.
+
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
+(cherry picked from commit b61e47b44882f6e578ef7c14197ea90a2703b5a0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/usb/renesas_usbhs/common.c | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+diff --git a/drivers/usb/renesas_usbhs/common.c b/drivers/usb/renesas_usbhs/common.c
+index c0dcb1b1a37d..e1bc8a84c118 100644
+--- a/drivers/usb/renesas_usbhs/common.c
++++ b/drivers/usb/renesas_usbhs/common.c
+@@ -506,7 +506,6 @@ static struct renesas_usbhs_platform_info *usbhs_parse_dt(struct device *dev)
+ {
+ struct renesas_usbhs_platform_info *info;
+ struct renesas_usbhs_driver_param *dparam;
+- const struct of_device_id *of_id = of_match_device(usbhs_of_match, dev);
+ u32 tmp;
+ int gpio;
+
+@@ -515,7 +514,7 @@ static struct renesas_usbhs_platform_info *usbhs_parse_dt(struct device *dev)
+ return NULL;
+
+ dparam = &info->driver_param;
+- dparam->type = of_id ? (uintptr_t)of_id->data : 0;
++ dparam->type = (uintptr_t)of_device_get_match_data(dev);
+ if (!of_property_read_u32(dev->of_node, "renesas,buswait", &tmp))
+ dparam->buswait_bwait = tmp;
+ gpio = of_get_named_gpio_flags(dev->of_node, "renesas,enable-gpio", 0,
+--
+2.19.0
+
diff --git a/patches/0239-usb-renesas_usbhs-Add-compatible-string-for-r8a7743-.patch b/patches/0239-usb-renesas_usbhs-Add-compatible-string-for-r8a7743-.patch
new file mode 100644
index 0000000..2fefd52
--- /dev/null
+++ b/patches/0239-usb-renesas_usbhs-Add-compatible-string-for-r8a7743-.patch
@@ -0,0 +1,54 @@
+From a70b330da673d8cc50fd1b905d811fc3a2d328ed Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Fri, 6 Oct 2017 17:49:34 +0100
+Subject: [PATCH 0239/1795] usb: renesas_usbhs: Add compatible string for
+ r8a7743/5
+
+This patch adds support for r8a7743/5 SoCs. The Renesas RZ/G1[ME]
+(R8A7743/5) usbhs is identical to the R-Car Gen2 family.
+
+No driver change is needed due to the fallback compatible value
+"renesas,rcar-gen2-usbhs".
+Adding the SoC-specific compatible values here has two purposes:
+ 1. Document which SoCs have this hardware module,
+ 2. Allow checkpatch to validate compatible values.
+
+Acked-by: Rob Herring <robh@kernel.org>
+Acked-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
+Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
+(cherry picked from commit e0d63c4083852e07655dfcda1320504c304218be)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/usb/renesas_usbhs.txt | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/Documentation/devicetree/bindings/usb/renesas_usbhs.txt b/Documentation/devicetree/bindings/usb/renesas_usbhs.txt
+index e79f6e43061a..47394ab788e3 100644
+--- a/Documentation/devicetree/bindings/usb/renesas_usbhs.txt
++++ b/Documentation/devicetree/bindings/usb/renesas_usbhs.txt
+@@ -3,6 +3,8 @@ Renesas Electronics USBHS driver
+ Required properties:
+ - compatible: Must contain one or more of the following:
+
++ - "renesas,usbhs-r8a7743" for r8a7743 (RZ/G1M) compatible device
++ - "renesas,usbhs-r8a7745" for r8a7745 (RZ/G1E) compatible device
+ - "renesas,usbhs-r8a7790" for r8a7790 (R-Car H2) compatible device
+ - "renesas,usbhs-r8a7791" for r8a7791 (R-Car M2-W) compatible device
+ - "renesas,usbhs-r8a7792" for r8a7792 (R-Car V2H) compatible device
+@@ -11,7 +13,7 @@ Required properties:
+ - "renesas,usbhs-r8a7795" for r8a7795 (R-Car H3) compatible device
+ - "renesas,usbhs-r8a7796" for r8a7796 (R-Car M3-W) compatible device
+ - "renesas,usbhs-r8a77995" for r8a77995 (R-Car D3) compatible device
+- - "renesas,rcar-gen2-usbhs" for R-Car Gen2 compatible device
++ - "renesas,rcar-gen2-usbhs" for R-Car Gen2 or RZ/G1 compatible devices
+ - "renesas,rcar-gen3-usbhs" for R-Car Gen3 compatible device
+
+ When compatible with the generic version, nodes must list the
+--
+2.19.0
+
diff --git a/patches/0240-renesas_usbhs-use-renesas_usbhs_get_info.patch b/patches/0240-renesas_usbhs-use-renesas_usbhs_get_info.patch
new file mode 100644
index 0000000..0932e08
--- /dev/null
+++ b/patches/0240-renesas_usbhs-use-renesas_usbhs_get_info.patch
@@ -0,0 +1,43 @@
+From b3df3cadbc6c6abadab3c7236bc7824f91f901b5 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 7 Nov 2017 08:26:07 +0000
+Subject: [PATCH 0240/1795] renesas_usbhs: use renesas_usbhs_get_info()
+
+We already have renesas_usbhs_get_info() macro.
+Let's use it.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit f0f14a7a815de478669bd2906e35eef6da730d83)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/usb/renesas_usbhs/common.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/usb/renesas_usbhs/common.c b/drivers/usb/renesas_usbhs/common.c
+index e1bc8a84c118..26685beffc9a 100644
+--- a/drivers/usb/renesas_usbhs/common.c
++++ b/drivers/usb/renesas_usbhs/common.c
+@@ -535,7 +535,7 @@ static struct renesas_usbhs_platform_info *usbhs_parse_dt(struct device *dev)
+
+ static int usbhs_probe(struct platform_device *pdev)
+ {
+- struct renesas_usbhs_platform_info *info = dev_get_platdata(&pdev->dev);
++ struct renesas_usbhs_platform_info *info = renesas_usbhs_get_info(pdev);
+ struct renesas_usbhs_driver_callback *dfunc;
+ struct usbhs_priv *priv;
+ struct resource *res, *irq_res;
+@@ -713,7 +713,7 @@ static int usbhs_probe(struct platform_device *pdev)
+ static int usbhs_remove(struct platform_device *pdev)
+ {
+ struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev);
+- struct renesas_usbhs_platform_info *info = dev_get_platdata(&pdev->dev);
++ struct renesas_usbhs_platform_info *info = renesas_usbhs_get_info(pdev);
+ struct renesas_usbhs_driver_callback *dfunc = &info->driver_callback;
+
+ dev_dbg(&pdev->dev, "usb remove\n");
+--
+2.19.0
+
diff --git a/patches/0241-USB-renesas_usbhs-Remove-redundant-license-text.patch b/patches/0241-USB-renesas_usbhs-Remove-redundant-license-text.patch
new file mode 100644
index 0000000..6fcfab5
--- /dev/null
+++ b/patches/0241-USB-renesas_usbhs-Remove-redundant-license-text.patch
@@ -0,0 +1,290 @@
+From c260e626de8725235537f3ba06f10d61276dff92 Mon Sep 17 00:00:00 2001
+From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Date: Mon, 6 Nov 2017 15:37:12 +0100
+Subject: [PATCH 0241/1795] USB: renesas_usbhs: Remove redundant license text
+
+Now that the SPDX tag is in all USB files, that identifies the license
+in a specific and legally-defined manner. So the extra GPL text wording
+can be removed as it is no longer needed at all.
+
+This is done on a quest to remove the 700+ different ways that files in
+the kernel describe the GPL license text. And there's unneeded stuff
+like the address (sometimes incorrect) for the FSF which is never
+needed.
+
+No copyright headers or other non-license-description text was removed.
+
+Cc: Rob Herring <robh@kernel.org>
+Cc: Simon Horman <horms+renesas@verge.net.au>
+Cc: Geert Uytterhoeven <geert+renesas@glider.be>
+Cc: Chanwoo Choi <cw00.choi@samsung.com>
+Cc: Johan Hovold <johan@kernel.org>
+Cc: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
+Cc: Bhumika Goyal <bhumirks@gmail.com>
+Acked-by: Felipe Balbi <felipe.balbi@linux.intel.com>
+Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 1250413a81612f49a0ae9f89342108c625779280)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/usb/renesas_usbhs/common.c | 10 ----------
+ drivers/usb/renesas_usbhs/common.h | 10 ----------
+ drivers/usb/renesas_usbhs/fifo.c | 10 ----------
+ drivers/usb/renesas_usbhs/fifo.h | 10 ----------
+ drivers/usb/renesas_usbhs/mod.c | 10 ----------
+ drivers/usb/renesas_usbhs/mod.h | 10 ----------
+ drivers/usb/renesas_usbhs/mod_gadget.c | 10 ----------
+ drivers/usb/renesas_usbhs/mod_host.c | 10 ----------
+ drivers/usb/renesas_usbhs/pipe.c | 10 ----------
+ drivers/usb/renesas_usbhs/pipe.h | 10 ----------
+ drivers/usb/renesas_usbhs/rcar2.c | 6 ------
+ drivers/usb/renesas_usbhs/rcar3.c | 5 -----
+ 12 files changed, 111 deletions(-)
+
+diff --git a/drivers/usb/renesas_usbhs/common.c b/drivers/usb/renesas_usbhs/common.c
+index 26685beffc9a..56079bb6759a 100644
+--- a/drivers/usb/renesas_usbhs/common.c
++++ b/drivers/usb/renesas_usbhs/common.c
+@@ -4,16 +4,6 @@
+ *
+ * Copyright (C) 2011 Renesas Solutions Corp.
+ * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+- *
+ */
+ #include <linux/err.h>
+ #include <linux/gpio.h>
+diff --git a/drivers/usb/renesas_usbhs/common.h b/drivers/usb/renesas_usbhs/common.h
+index 416331c6990a..64797784a6df 100644
+--- a/drivers/usb/renesas_usbhs/common.h
++++ b/drivers/usb/renesas_usbhs/common.h
+@@ -4,16 +4,6 @@
+ *
+ * Copyright (C) 2011 Renesas Solutions Corp.
+ * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+- *
+ */
+ #ifndef RENESAS_USB_DRIVER_H
+ #define RENESAS_USB_DRIVER_H
+diff --git a/drivers/usb/renesas_usbhs/fifo.c b/drivers/usb/renesas_usbhs/fifo.c
+index e3be608993af..b295e204a575 100644
+--- a/drivers/usb/renesas_usbhs/fifo.c
++++ b/drivers/usb/renesas_usbhs/fifo.c
+@@ -4,16 +4,6 @@
+ *
+ * Copyright (C) 2011 Renesas Solutions Corp.
+ * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+- *
+ */
+ #include <linux/delay.h>
+ #include <linux/io.h>
+diff --git a/drivers/usb/renesas_usbhs/fifo.h b/drivers/usb/renesas_usbhs/fifo.h
+index 7a741234c24b..88d1816bcda2 100644
+--- a/drivers/usb/renesas_usbhs/fifo.h
++++ b/drivers/usb/renesas_usbhs/fifo.h
+@@ -4,16 +4,6 @@
+ *
+ * Copyright (C) 2011 Renesas Solutions Corp.
+ * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+- *
+ */
+ #ifndef RENESAS_USB_FIFO_H
+ #define RENESAS_USB_FIFO_H
+diff --git a/drivers/usb/renesas_usbhs/mod.c b/drivers/usb/renesas_usbhs/mod.c
+index c0a0789d8b1e..7475c4f64724 100644
+--- a/drivers/usb/renesas_usbhs/mod.c
++++ b/drivers/usb/renesas_usbhs/mod.c
+@@ -4,16 +4,6 @@
+ *
+ * Copyright (C) 2011 Renesas Solutions Corp.
+ * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+- *
+ */
+ #include <linux/interrupt.h>
+
+diff --git a/drivers/usb/renesas_usbhs/mod.h b/drivers/usb/renesas_usbhs/mod.h
+index 5355a13045d9..a4a61d6b82a1 100644
+--- a/drivers/usb/renesas_usbhs/mod.h
++++ b/drivers/usb/renesas_usbhs/mod.h
+@@ -4,16 +4,6 @@
+ *
+ * Copyright (C) 2011 Renesas Solutions Corp.
+ * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+- *
+ */
+ #ifndef RENESAS_USB_MOD_H
+ #define RENESAS_USB_MOD_H
+diff --git a/drivers/usb/renesas_usbhs/mod_gadget.c b/drivers/usb/renesas_usbhs/mod_gadget.c
+index 019bbc8bf9b2..34ee9ebe12a3 100644
+--- a/drivers/usb/renesas_usbhs/mod_gadget.c
++++ b/drivers/usb/renesas_usbhs/mod_gadget.c
+@@ -4,16 +4,6 @@
+ *
+ * Copyright (C) 2011 Renesas Solutions Corp.
+ * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+- *
+ */
+ #include <linux/delay.h>
+ #include <linux/dma-mapping.h>
+diff --git a/drivers/usb/renesas_usbhs/mod_host.c b/drivers/usb/renesas_usbhs/mod_host.c
+index 1ab0ac83b00c..4e59c649db81 100644
+--- a/drivers/usb/renesas_usbhs/mod_host.c
++++ b/drivers/usb/renesas_usbhs/mod_host.c
+@@ -4,16 +4,6 @@
+ *
+ * Copyright (C) 2011 Renesas Solutions Corp.
+ * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+- *
+ */
+ #include <linux/io.h>
+ #include <linux/list.h>
+diff --git a/drivers/usb/renesas_usbhs/pipe.c b/drivers/usb/renesas_usbhs/pipe.c
+index 3c500aaadf35..093cd8e87335 100644
+--- a/drivers/usb/renesas_usbhs/pipe.c
++++ b/drivers/usb/renesas_usbhs/pipe.c
+@@ -4,16 +4,6 @@
+ *
+ * Copyright (C) 2011 Renesas Solutions Corp.
+ * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+- *
+ */
+ #include <linux/delay.h>
+ #include <linux/slab.h>
+diff --git a/drivers/usb/renesas_usbhs/pipe.h b/drivers/usb/renesas_usbhs/pipe.h
+index ed32cb11fe09..d3d002244891 100644
+--- a/drivers/usb/renesas_usbhs/pipe.h
++++ b/drivers/usb/renesas_usbhs/pipe.h
+@@ -4,16 +4,6 @@
+ *
+ * Copyright (C) 2011 Renesas Solutions Corp.
+ * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+- *
+ */
+ #ifndef RENESAS_USB_PIPE_H
+ #define RENESAS_USB_PIPE_H
+diff --git a/drivers/usb/renesas_usbhs/rcar2.c b/drivers/usb/renesas_usbhs/rcar2.c
+index b03b3cb36b49..85a0e0933917 100644
+--- a/drivers/usb/renesas_usbhs/rcar2.c
++++ b/drivers/usb/renesas_usbhs/rcar2.c
+@@ -3,12 +3,6 @@
+ * Renesas USB driver R-Car Gen. 2 initialization and power control
+ *
+ * Copyright (C) 2014 Ulrich Hecht
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+ */
+
+ #include <linux/gpio.h>
+diff --git a/drivers/usb/renesas_usbhs/rcar3.c b/drivers/usb/renesas_usbhs/rcar3.c
+index 11a13887a71d..c929d296c77b 100644
+--- a/drivers/usb/renesas_usbhs/rcar3.c
++++ b/drivers/usb/renesas_usbhs/rcar3.c
+@@ -3,11 +3,6 @@
+ * Renesas USB driver R-Car Gen. 3 initialization and power control
+ *
+ * Copyright (C) 2016 Renesas Electronics Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- *
+ */
+
+ #include <linux/delay.h>
+--
+2.19.0
+
diff --git a/patches/0242-USB-renesas_usbhs-rcar-.h-add-SPDX-tags.patch b/patches/0242-USB-renesas_usbhs-rcar-.h-add-SPDX-tags.patch
new file mode 100644
index 0000000..bd6a2cc
--- /dev/null
+++ b/patches/0242-USB-renesas_usbhs-rcar-.h-add-SPDX-tags.patch
@@ -0,0 +1,48 @@
+From 164ed12b0d524f87fcec3bfc45426524dbd502b2 Mon Sep 17 00:00:00 2001
+From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Date: Mon, 6 Nov 2017 16:34:10 +0100
+Subject: [PATCH 0242/1795] USB: renesas_usbhs: rcar?.h: add SPDX tags
+
+These files somehow never got an SPDX tag added to them, maybe due to
+the small size. So provide the default identifier of the whole project:
+ SPDX-License-Identifier: GPL-2.0
+
+The SPDX identifier is a legally binding shorthand, which can be used
+instead of the full boiler plate text.
+
+Cc: Rob Herring <robh@kernel.org>
+Cc: Thomas Gleixner <tglx@linutronix.de>
+Cc: Kate Stewart <kstewart@linuxfoundation.org>
+Cc: Philippe Ombredanne <pombredanne@nexb.com>
+Acked-by: Felipe Balbi <felipe.balbi@linux.intel.com>
+Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit fc9904d3c46e92c103414606fc407c7aa24d443b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/usb/renesas_usbhs/rcar2.h | 1 +
+ drivers/usb/renesas_usbhs/rcar3.h | 1 +
+ 2 files changed, 2 insertions(+)
+
+diff --git a/drivers/usb/renesas_usbhs/rcar2.h b/drivers/usb/renesas_usbhs/rcar2.h
+index f07f10d9b3b2..45e3526cedeb 100644
+--- a/drivers/usb/renesas_usbhs/rcar2.h
++++ b/drivers/usb/renesas_usbhs/rcar2.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ #include "common.h"
+
+ extern const struct renesas_usbhs_platform_callback
+diff --git a/drivers/usb/renesas_usbhs/rcar3.h b/drivers/usb/renesas_usbhs/rcar3.h
+index 7fe98175f94f..49e535a31771 100644
+--- a/drivers/usb/renesas_usbhs/rcar3.h
++++ b/drivers/usb/renesas_usbhs/rcar3.h
+@@ -1,3 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0
+ #include "common.h"
+
+ extern const struct renesas_usbhs_platform_callback usbhs_rcar3_ops;
+--
+2.19.0
+
diff --git a/patches/0243-mmc-usdhi6rol0-catch-all-errors-when-getting-regulat.patch b/patches/0243-mmc-usdhi6rol0-catch-all-errors-when-getting-regulat.patch
new file mode 100644
index 0000000..302e94c
--- /dev/null
+++ b/patches/0243-mmc-usdhi6rol0-catch-all-errors-when-getting-regulat.patch
@@ -0,0 +1,39 @@
+From e79c556ce0654bea231f81bac611ba2ae06fa158 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Sat, 14 Oct 2017 21:17:19 +0200
+Subject: [PATCH 0243/1795] mmc: usdhi6rol0: catch all errors when getting
+ regulators
+
+Bail out everytime when mmc_regulator_get_supply() returns an errno, not
+only when probing gets deferred. This is currently a no-op, because this
+function only returns -EPROBE_DEFER or 0 right now. But if it will throw
+another error somewhen, it will be for a reason. (This still doesn't change
+that getting regulators is optional, so 0 can still mean no regulators
+found). So, let us a) be future proof and b) have driver code which is
+easier to understand.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit 2d87ddd7b63e276a2e0a11788fce9e91c4d23a86)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mmc/host/usdhi6rol0.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/mmc/host/usdhi6rol0.c b/drivers/mmc/host/usdhi6rol0.c
+index 64da6a88cfb9..cdfeb15b6f05 100644
+--- a/drivers/mmc/host/usdhi6rol0.c
++++ b/drivers/mmc/host/usdhi6rol0.c
+@@ -1757,7 +1757,7 @@ static int usdhi6_probe(struct platform_device *pdev)
+ return -ENOMEM;
+
+ ret = mmc_regulator_get_supply(mmc);
+- if (ret == -EPROBE_DEFER)
++ if (ret)
+ goto e_free_mmc;
+
+ ret = mmc_of_parse(mmc);
+--
+2.19.0
+
diff --git a/patches/0244-v4l-vsp1-Use-generic-node-name.patch b/patches/0244-v4l-vsp1-Use-generic-node-name.patch
new file mode 100644
index 0000000..0c98ccd
--- /dev/null
+++ b/patches/0244-v4l-vsp1-Use-generic-node-name.patch
@@ -0,0 +1,32 @@
+From 2892128629195637e74b01f114db9cedf859862e Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 30 Aug 2017 11:57:31 +0200
+Subject: [PATCH 0244/1795] v4l: vsp1: Use generic node name
+
+Use the preferred generic node name in the example.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Rob Herring <robh@kernel.org>
+(cherry picked from commit 0e1bfb72b076b07dc844bf33c19d62a3075f540f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/media/renesas,vsp1.txt | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/Documentation/devicetree/bindings/media/renesas,vsp1.txt b/Documentation/devicetree/bindings/media/renesas,vsp1.txt
+index 9b695bcbf219..16427017cb45 100644
+--- a/Documentation/devicetree/bindings/media/renesas,vsp1.txt
++++ b/Documentation/devicetree/bindings/media/renesas,vsp1.txt
+@@ -22,7 +22,7 @@ Optional properties:
+
+ Example: R8A7790 (R-Car H2) VSP1-S node
+
+- vsp1@fe928000 {
++ vsp@fe928000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe928000 0 0x8000>;
+ interrupts = <0 267 IRQ_TYPE_LEVEL_HIGH>;
+--
+2.19.0
+
diff --git a/patches/0245-media-vsp1-add-a-missing-kernel-doc-parameter.patch b/patches/0245-media-vsp1-add-a-missing-kernel-doc-parameter.patch
new file mode 100644
index 0000000..051cab9
--- /dev/null
+++ b/patches/0245-media-vsp1-add-a-missing-kernel-doc-parameter.patch
@@ -0,0 +1,31 @@
+From 6fe502a359e88834c2533d184c004d6869693897 Mon Sep 17 00:00:00 2001
+From: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+Date: Wed, 29 Nov 2017 10:11:04 -0500
+Subject: [PATCH 0245/1795] media: vsp1: add a missing kernel-doc parameter
+
+Fix this warning:
+ drivers/media/platform/vsp1/vsp1_dl.c:87: warning: No description found for parameter 'has_chain'
+
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit 2afe216d3d88b729c40d83abce5b2d4b72d289c5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/media/platform/vsp1/vsp1_dl.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/media/platform/vsp1/vsp1_dl.c b/drivers/media/platform/vsp1/vsp1_dl.c
+index e5d8d99e124c..0b86ed01e85d 100644
+--- a/drivers/media/platform/vsp1/vsp1_dl.c
++++ b/drivers/media/platform/vsp1/vsp1_dl.c
+@@ -70,6 +70,7 @@ struct vsp1_dl_body {
+ * @dma: DMA address for the header
+ * @body0: first display list body
+ * @fragments: list of extra display list bodies
++ * @has_chain: if true, indicates that there's a partition chain
+ * @chain: entry in the display list partition chain
+ */
+ struct vsp1_dl_list {
+--
+2.19.0
+
diff --git a/patches/0246-usb-host-xhci-support-option-to-disable-the-xHCI-USB.patch b/patches/0246-usb-host-xhci-support-option-to-disable-the-xHCI-USB.patch
new file mode 100644
index 0000000..3882dc1
--- /dev/null
+++ b/patches/0246-usb-host-xhci-support-option-to-disable-the-xHCI-USB.patch
@@ -0,0 +1,84 @@
+From 2acd90ace90f3051f7bd6ac7c54ceb38f29cd039 Mon Sep 17 00:00:00 2001
+From: "Thang Q. Nguyen" <tqnguyen@apm.com>
+Date: Thu, 5 Oct 2017 11:21:37 +0300
+Subject: [PATCH 0246/1795] usb: host: xhci support option to disable the xHCI
+ USB2 HW LPM
+
+XHCI specification 1.1 does not require xHCI-compliant controllers
+to always enable hardware USB2 LPM. However, the current xHCI
+driver always enable it when seeing HLC=1.
+This patch supports an option for users to control disabling
+USB2 Hardware LPM via DT/ACPI attribute.
+This option is needed in case user would like to disable this
+feature. For example, their xHCI controller has its USB2 HW LPM
+broken.
+
+Signed-off-by: Tung Nguyen <tunguyen@apm.com>
+Signed-off-by: Thang Q. Nguyen <tqnguyen@apm.com>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 4750bc78efdb126ddc40f1b34dbae7ce319344cb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/usb/usb-xhci.txt | 1 +
+ drivers/usb/host/xhci-plat.c | 3 +++
+ drivers/usb/host/xhci.c | 2 +-
+ drivers/usb/host/xhci.h | 1 +
+ 4 files changed, 6 insertions(+), 1 deletion(-)
+
+diff --git a/Documentation/devicetree/bindings/usb/usb-xhci.txt b/Documentation/devicetree/bindings/usb/usb-xhci.txt
+index 7a69b8b47b97..4143ef222540 100644
+--- a/Documentation/devicetree/bindings/usb/usb-xhci.txt
++++ b/Documentation/devicetree/bindings/usb/usb-xhci.txt
+@@ -27,6 +27,7 @@ Required properties:
+
+ Optional properties:
+ - clocks: reference to a clock
++ - usb2-lpm-disable: indicate if we don't want to enable USB2 HW LPM
+ - usb3-lpm-capable: determines if platform is USB3 LPM capable
+ - quirk-broken-port-ped: set if the controller has broken port disable mechanism
+
+diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c
+index a15f1f295afc..5340e4ad8d13 100644
+--- a/drivers/usb/host/xhci-plat.c
++++ b/drivers/usb/host/xhci-plat.c
+@@ -264,6 +264,9 @@ static int xhci_plat_probe(struct platform_device *pdev)
+ goto disable_clk;
+ }
+
++ if (device_property_read_bool(sysdev, "usb2-lpm-disable"))
++ xhci->quirks |= XHCI_HW_LPM_DISABLE;
++
+ if (device_property_read_bool(sysdev, "usb3-lpm-capable"))
+ xhci->quirks |= XHCI_LPM_SUPPORT;
+
+diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
+index 55bb05893c55..ae7acaa420c6 100644
+--- a/drivers/usb/host/xhci.c
++++ b/drivers/usb/host/xhci.c
+@@ -4115,7 +4115,7 @@ static int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
+ xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
+ enable ? "enable" : "disable", port_num + 1);
+
+- if (enable) {
++ if (enable && !(xhci->quirks & XHCI_HW_LPM_DISABLE)) {
+ /* Host supports BESL timeout instead of HIRD */
+ if (udev->usb2_hw_lpm_besl_capable) {
+ /* if device doesn't have a preferred BESL value use a
+diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
+index 6b4c7ae70ab1..c9fc67a30e4c 100644
+--- a/drivers/usb/host/xhci.h
++++ b/drivers/usb/host/xhci.h
+@@ -1836,6 +1836,7 @@ struct xhci_hcd {
+ #define XHCI_LIMIT_ENDPOINT_INTERVAL_7 (1 << 26)
+ #define XHCI_U2_DISABLE_WAKE (1 << 27)
+ #define XHCI_ASMEDIA_MODIFY_FLOWCONTROL (1 << 28)
++#define XHCI_HW_LPM_DISABLE (1 << 29)
+ #define XHCI_SUSPEND_DELAY (1 << 30)
+
+ unsigned int num_active_eps;
+--
+2.19.0
+
diff --git a/patches/0247-xhci-add-port-speed-ID-to-portsc-tracing.patch b/patches/0247-xhci-add-port-speed-ID-to-portsc-tracing.patch
new file mode 100644
index 0000000..6c8c988
--- /dev/null
+++ b/patches/0247-xhci-add-port-speed-ID-to-portsc-tracing.patch
@@ -0,0 +1,45 @@
+From 6d943fe49482e42c3b76ea16a97a9ecf1042941e Mon Sep 17 00:00:00 2001
+From: Mathias Nyman <mathias.nyman@linux.intel.com>
+Date: Thu, 5 Oct 2017 11:21:38 +0300
+Subject: [PATCH 0247/1795] xhci: add port speed ID to portsc tracing
+
+Shows the port speed protocol speed ID (PSID) in use.
+speed ID may map to custom speeds, but in most cases it uses default
+
+1 = Full-Speed 12 MB/s
+2 = Low-Speed 1.5 Mb/s
+3 = High-speed 480 Mb/s
+4 = SuperSpeed 5 Gb/s
+5 = SuperSpeedPlus 10 Gb/s
+
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 8f11487719401e20ecc58c114d9fc3177535c40a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/usb/host/xhci.h | 5 +++--
+ 1 file changed, 3 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
+index c9fc67a30e4c..b1ef8fe056eb 100644
+--- a/drivers/usb/host/xhci.h
++++ b/drivers/usb/host/xhci.h
+@@ -2449,11 +2449,12 @@ static inline const char *xhci_decode_portsc(u32 portsc)
+ static char str[256];
+ int ret;
+
+- ret = sprintf(str, "%s %s %s Link:%s ",
++ ret = sprintf(str, "%s %s %s Link:%s PortSpeed:%d ",
+ portsc & PORT_POWER ? "Powered" : "Powered-off",
+ portsc & PORT_CONNECT ? "Connected" : "Not-connected",
+ portsc & PORT_PE ? "Enabled" : "Disabled",
+- xhci_portsc_link_state_string(portsc));
++ xhci_portsc_link_state_string(portsc),
++ DEV_PORT_SPEED(portsc));
+
+ if (portsc & PORT_OC)
+ ret += sprintf(str + ret, "OverCurrent ");
+--
+2.19.0
+
diff --git a/patches/0248-usb-xhci-Add-debugfs-interface-for-xHCI-driver.patch b/patches/0248-usb-xhci-Add-debugfs-interface-for-xHCI-driver.patch
new file mode 100644
index 0000000..f535d58
--- /dev/null
+++ b/patches/0248-usb-xhci-Add-debugfs-interface-for-xHCI-driver.patch
@@ -0,0 +1,936 @@
+From c748c216d7c504d47ef948a8e0be40a64cb4a60a Mon Sep 17 00:00:00 2001
+From: Lu Baolu <baolu.lu@linux.intel.com>
+Date: Thu, 5 Oct 2017 11:21:39 +0300
+Subject: [PATCH 0248/1795] usb: xhci: Add debugfs interface for xHCI driver
+
+This adds debugfs consumer for xHCI driver. The debugfs entries
+read all host registers, device/endpoint contexts, command ring,
+event ring and various endpoint rings. With these entries, users
+can check the registers and memory spaces used by a host during
+run time, or save all the information with a simple 'cp -r' for
+post-mortem programs.
+
+The file hierarchy looks like this.
+
+[root of debugfs]
+|__usb
+|____[e,u,o]hci <---------[root for other HCIs]
+|____xhci <---------------[root for xHCI]
+|______0000:00:14.0 <--------------[xHCI host name]
+|________reg-cap <--------[capability registers]
+|________reg-op <-------[operational registers]
+|________reg-runtime <-----------[runtime registers]
+|________reg-ext-#cap_name <----[extended capability regs]
+|________command-ring <-------[root for command ring]
+|__________cycle <------------------[ring cycle]
+|__________dequeue <--------[ring dequeue pointer]
+|__________enqueue <--------[ring enqueue pointer]
+|__________trbs <-------------------[ring trbs]
+|________event-ring <---------[root for event ring]
+|__________cycle <------------------[ring cycle]
+|__________dequeue <--------[ring dequeue pointer]
+|__________enqueue <--------[ring enqueue pointer]
+|__________trbs <-------------------[ring trbs]
+|________devices <------------[root for devices]
+|__________#slot_id <-----------[root for a device]
+|____________name <-----------------[device name]
+|____________slot-context <----------------[slot context]
+|____________ep-context <-----------[endpoint contexts]
+|____________ep#ep_index <--------[root for an endpoint]
+|______________cycle <------------------[ring cycle]
+|______________dequeue <--------[ring dequeue pointer]
+|______________enqueue <--------[ring enqueue pointer]
+|______________trbs <-------------------[ring trbs]
+
+Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 02b6fdc2a153e61b957937772a562fb6357dc861)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/usb/host/Makefile | 4 +
+ drivers/usb/host/xhci-debugfs.c | 526 ++++++++++++++++++++++++++++++++
+ drivers/usb/host/xhci-debugfs.h | 137 +++++++++
+ drivers/usb/host/xhci-mem.c | 5 +-
+ drivers/usb/host/xhci.c | 23 +-
+ drivers/usb/host/xhci.h | 9 +
+ 6 files changed, 700 insertions(+), 4 deletions(-)
+ create mode 100644 drivers/usb/host/xhci-debugfs.c
+ create mode 100644 drivers/usb/host/xhci-debugfs.h
+
+diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
+index 4ab2689c8952..81bfd7c70bd2 100644
+--- a/drivers/usb/host/Makefile
++++ b/drivers/usb/host/Makefile
+@@ -26,6 +26,10 @@ ifneq ($(CONFIG_USB_XHCI_RCAR), )
+ xhci-plat-hcd-y += xhci-rcar.o
+ endif
+
++ifneq ($(CONFIG_DEBUG_FS),)
++ xhci-hcd-y += xhci-debugfs.o
++endif
++
+ obj-$(CONFIG_USB_WHCI_HCD) += whci/
+
+ obj-$(CONFIG_USB_PCI) += pci-quirks.o
+diff --git a/drivers/usb/host/xhci-debugfs.c b/drivers/usb/host/xhci-debugfs.c
+new file mode 100644
+index 000000000000..6772ee90944b
+--- /dev/null
++++ b/drivers/usb/host/xhci-debugfs.c
+@@ -0,0 +1,526 @@
++/*
++ * xhci-debugfs.c - xHCI debugfs interface
++ *
++ * Copyright (C) 2017 Intel Corporation
++ *
++ * Author: Lu Baolu <baolu.lu@linux.intel.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#include <linux/slab.h>
++
++#include "xhci.h"
++#include "xhci-debugfs.h"
++
++static const struct debugfs_reg32 xhci_cap_regs[] = {
++ dump_register(CAPLENGTH),
++ dump_register(HCSPARAMS1),
++ dump_register(HCSPARAMS2),
++ dump_register(HCSPARAMS3),
++ dump_register(HCCPARAMS1),
++ dump_register(DOORBELLOFF),
++ dump_register(RUNTIMEOFF),
++ dump_register(HCCPARAMS2),
++};
++
++static const struct debugfs_reg32 xhci_op_regs[] = {
++ dump_register(USBCMD),
++ dump_register(USBSTS),
++ dump_register(PAGESIZE),
++ dump_register(DNCTRL),
++ dump_register(CRCR),
++ dump_register(DCBAAP_LOW),
++ dump_register(DCBAAP_HIGH),
++ dump_register(CONFIG),
++};
++
++static const struct debugfs_reg32 xhci_runtime_regs[] = {
++ dump_register(MFINDEX),
++ dump_register(IR0_IMAN),
++ dump_register(IR0_IMOD),
++ dump_register(IR0_ERSTSZ),
++ dump_register(IR0_ERSTBA_LOW),
++ dump_register(IR0_ERSTBA_HIGH),
++ dump_register(IR0_ERDP_LOW),
++ dump_register(IR0_ERDP_HIGH),
++};
++
++static const struct debugfs_reg32 xhci_extcap_legsup[] = {
++ dump_register(EXTCAP_USBLEGSUP),
++ dump_register(EXTCAP_USBLEGCTLSTS),
++};
++
++static const struct debugfs_reg32 xhci_extcap_protocol[] = {
++ dump_register(EXTCAP_REVISION),
++ dump_register(EXTCAP_NAME),
++ dump_register(EXTCAP_PORTINFO),
++ dump_register(EXTCAP_PORTTYPE),
++ dump_register(EXTCAP_MANTISSA1),
++ dump_register(EXTCAP_MANTISSA2),
++ dump_register(EXTCAP_MANTISSA3),
++ dump_register(EXTCAP_MANTISSA4),
++ dump_register(EXTCAP_MANTISSA5),
++ dump_register(EXTCAP_MANTISSA6),
++};
++
++static const struct debugfs_reg32 xhci_extcap_dbc[] = {
++ dump_register(EXTCAP_DBC_CAPABILITY),
++ dump_register(EXTCAP_DBC_DOORBELL),
++ dump_register(EXTCAP_DBC_ERSTSIZE),
++ dump_register(EXTCAP_DBC_ERST_LOW),
++ dump_register(EXTCAP_DBC_ERST_HIGH),
++ dump_register(EXTCAP_DBC_ERDP_LOW),
++ dump_register(EXTCAP_DBC_ERDP_HIGH),
++ dump_register(EXTCAP_DBC_CONTROL),
++ dump_register(EXTCAP_DBC_STATUS),
++ dump_register(EXTCAP_DBC_PORTSC),
++ dump_register(EXTCAP_DBC_CONT_LOW),
++ dump_register(EXTCAP_DBC_CONT_HIGH),
++ dump_register(EXTCAP_DBC_DEVINFO1),
++ dump_register(EXTCAP_DBC_DEVINFO2),
++};
++
++static struct dentry *xhci_debugfs_root;
++
++static struct xhci_regset *xhci_debugfs_alloc_regset(struct xhci_hcd *xhci)
++{
++ struct xhci_regset *regset;
++
++ regset = kzalloc(sizeof(*regset), GFP_KERNEL);
++ if (!regset)
++ return NULL;
++
++ /*
++ * The allocation and free of regset are executed in order.
++ * We needn't a lock here.
++ */
++ INIT_LIST_HEAD(®set->list);
++ list_add_tail(®set->list, &xhci->regset_list);
++
++ return regset;
++}
++
++static void xhci_debugfs_free_regset(struct xhci_regset *regset)
++{
++ if (!regset)
++ return;
++
++ list_del(®set->list);
++ kfree(regset);
++}
++
++static void xhci_debugfs_regset(struct xhci_hcd *xhci, u32 base,
++ const struct debugfs_reg32 *regs,
++ size_t nregs, struct dentry *parent,
++ const char *fmt, ...)
++{
++ struct xhci_regset *rgs;
++ va_list args;
++ struct debugfs_regset32 *regset;
++ struct usb_hcd *hcd = xhci_to_hcd(xhci);
++
++ rgs = xhci_debugfs_alloc_regset(xhci);
++ if (!rgs)
++ return;
++
++ va_start(args, fmt);
++ vsnprintf(rgs->name, sizeof(rgs->name), fmt, args);
++ va_end(args);
++
++ regset = &rgs->regset;
++ regset->regs = regs;
++ regset->nregs = nregs;
++ regset->base = hcd->regs + base;
++
++ debugfs_create_regset32((const char *)rgs->name, 0444, parent, regset);
++}
++
++static void xhci_debugfs_extcap_regset(struct xhci_hcd *xhci, int cap_id,
++ const struct debugfs_reg32 *regs,
++ size_t n, const char *cap_name)
++{
++ u32 offset;
++ int index = 0;
++ size_t psic, nregs = n;
++ void __iomem *base = &xhci->cap_regs->hc_capbase;
++
++ offset = xhci_find_next_ext_cap(base, 0, cap_id);
++ while (offset) {
++ if (cap_id == XHCI_EXT_CAPS_PROTOCOL) {
++ psic = XHCI_EXT_PORT_PSIC(readl(base + offset + 8));
++ nregs = min(4 + psic, n);
++ }
++
++ xhci_debugfs_regset(xhci, offset, regs, nregs,
++ xhci->debugfs_root, "%s:%02d",
++ cap_name, index);
++ offset = xhci_find_next_ext_cap(base, offset, cap_id);
++ index++;
++ }
++}
++
++static int xhci_ring_enqueue_show(struct seq_file *s, void *unused)
++{
++ dma_addr_t dma;
++ struct xhci_ring *ring = s->private;
++
++ dma = xhci_trb_virt_to_dma(ring->enq_seg, ring->enqueue);
++ seq_printf(s, "%pad\n", &dma);
++
++ return 0;
++}
++
++static int xhci_ring_dequeue_show(struct seq_file *s, void *unused)
++{
++ dma_addr_t dma;
++ struct xhci_ring *ring = s->private;
++
++ dma = xhci_trb_virt_to_dma(ring->deq_seg, ring->dequeue);
++ seq_printf(s, "%pad\n", &dma);
++
++ return 0;
++}
++
++static int xhci_ring_cycle_show(struct seq_file *s, void *unused)
++{
++ struct xhci_ring *ring = s->private;
++
++ seq_printf(s, "%d\n", ring->cycle_state);
++
++ return 0;
++}
++
++static void xhci_ring_dump_segment(struct seq_file *s,
++ struct xhci_segment *seg)
++{
++ int i;
++ dma_addr_t dma;
++ union xhci_trb *trb;
++
++ for (i = 0; i < TRBS_PER_SEGMENT; i++) {
++ trb = &seg->trbs[i];
++ dma = seg->dma + i * sizeof(*trb);
++ seq_printf(s, "%pad: %s\n", &dma,
++ xhci_decode_trb(trb->generic.field[0],
++ trb->generic.field[1],
++ trb->generic.field[2],
++ trb->generic.field[3]));
++ }
++}
++
++static int xhci_ring_trb_show(struct seq_file *s, void *unused)
++{
++ int i;
++ struct xhci_ring *ring = s->private;
++ struct xhci_segment *seg = ring->first_seg;
++
++ for (i = 0; i < ring->num_segs; i++) {
++ xhci_ring_dump_segment(s, seg);
++ seg = seg->next;
++ }
++
++ return 0;
++}
++
++static struct xhci_file_map ring_files[] = {
++ {"enqueue", xhci_ring_enqueue_show, },
++ {"dequeue", xhci_ring_dequeue_show, },
++ {"cycle", xhci_ring_cycle_show, },
++ {"trbs", xhci_ring_trb_show, },
++};
++
++static int xhci_ring_open(struct inode *inode, struct file *file)
++{
++ int i;
++ struct xhci_file_map *f_map;
++ const char *file_name = file_dentry(file)->d_iname;
++
++ for (i = 0; i < ARRAY_SIZE(ring_files); i++) {
++ f_map = &ring_files[i];
++
++ if (strcmp(f_map->name, file_name) == 0)
++ break;
++ }
++
++ return single_open(file, f_map->show, inode->i_private);
++}
++
++static const struct file_operations xhci_ring_fops = {
++ .open = xhci_ring_open,
++ .read = seq_read,
++ .llseek = seq_lseek,
++ .release = single_release,
++};
++
++static int xhci_slot_context_show(struct seq_file *s, void *unused)
++{
++ struct xhci_hcd *xhci;
++ struct xhci_slot_ctx *slot_ctx;
++ struct xhci_slot_priv *priv = s->private;
++ struct xhci_virt_device *dev = priv->dev;
++
++ xhci = hcd_to_xhci(bus_to_hcd(dev->udev->bus));
++ slot_ctx = xhci_get_slot_ctx(xhci, dev->out_ctx);
++ seq_printf(s, "%pad: %s\n", &dev->out_ctx->dma,
++ xhci_decode_slot_context(slot_ctx->dev_info,
++ slot_ctx->dev_info2,
++ slot_ctx->tt_info,
++ slot_ctx->dev_state));
++
++ return 0;
++}
++
++static int xhci_endpoint_context_show(struct seq_file *s, void *unused)
++{
++ int dci;
++ dma_addr_t dma;
++ struct xhci_hcd *xhci;
++ struct xhci_ep_ctx *ep_ctx;
++ struct xhci_slot_priv *priv = s->private;
++ struct xhci_virt_device *dev = priv->dev;
++
++ xhci = hcd_to_xhci(bus_to_hcd(dev->udev->bus));
++
++ for (dci = 1; dci < 32; dci++) {
++ ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, dci);
++ dma = dev->out_ctx->dma + dci * CTX_SIZE(xhci->hcc_params);
++ seq_printf(s, "%pad: %s\n", &dma,
++ xhci_decode_ep_context(ep_ctx->ep_info,
++ ep_ctx->ep_info2,
++ ep_ctx->deq,
++ ep_ctx->tx_info));
++ }
++
++ return 0;
++}
++
++static int xhci_device_name_show(struct seq_file *s, void *unused)
++{
++ struct xhci_slot_priv *priv = s->private;
++ struct xhci_virt_device *dev = priv->dev;
++
++ seq_printf(s, "%s\n", dev_name(&dev->udev->dev));
++
++ return 0;
++}
++
++static struct xhci_file_map context_files[] = {
++ {"name", xhci_device_name_show, },
++ {"slot-context", xhci_slot_context_show, },
++ {"ep-context", xhci_endpoint_context_show, },
++};
++
++static int xhci_context_open(struct inode *inode, struct file *file)
++{
++ int i;
++ struct xhci_file_map *f_map;
++ const char *file_name = file_dentry(file)->d_iname;
++
++ for (i = 0; i < ARRAY_SIZE(context_files); i++) {
++ f_map = &context_files[i];
++
++ if (strcmp(f_map->name, file_name) == 0)
++ break;
++ }
++
++ return single_open(file, f_map->show, inode->i_private);
++}
++
++static const struct file_operations xhci_context_fops = {
++ .open = xhci_context_open,
++ .read = seq_read,
++ .llseek = seq_lseek,
++ .release = single_release,
++};
++
++static void xhci_debugfs_create_files(struct xhci_hcd *xhci,
++ struct xhci_file_map *files,
++ size_t nentries, void *data,
++ struct dentry *parent,
++ const struct file_operations *fops)
++{
++ int i;
++
++ for (i = 0; i < nentries; i++)
++ debugfs_create_file(files[i].name, 0444, parent, data, fops);
++}
++
++static struct dentry *xhci_debugfs_create_ring_dir(struct xhci_hcd *xhci,
++ struct xhci_ring *ring,
++ const char *name,
++ struct dentry *parent)
++{
++ struct dentry *dir;
++
++ dir = debugfs_create_dir(name, parent);
++ xhci_debugfs_create_files(xhci, ring_files, ARRAY_SIZE(ring_files),
++ ring, dir, &xhci_ring_fops);
++
++ return dir;
++}
++
++static void xhci_debugfs_create_context_files(struct xhci_hcd *xhci,
++ struct dentry *parent,
++ int slot_id)
++{
++ struct xhci_virt_device *dev = xhci->devs[slot_id];
++
++ xhci_debugfs_create_files(xhci, context_files,
++ ARRAY_SIZE(context_files),
++ dev->debugfs_private,
++ parent, &xhci_context_fops);
++}
++
++void xhci_debugfs_create_endpoint(struct xhci_hcd *xhci,
++ struct xhci_virt_device *dev,
++ int ep_index)
++{
++ struct xhci_ep_priv *epriv;
++ struct xhci_slot_priv *spriv = dev->debugfs_private;
++
++ if (spriv->eps[ep_index])
++ return;
++
++ epriv = kzalloc(sizeof(*epriv), GFP_KERNEL);
++ if (!epriv)
++ return;
++
++ snprintf(epriv->name, sizeof(epriv->name), "ep%02d", ep_index);
++ epriv->root = xhci_debugfs_create_ring_dir(xhci,
++ dev->eps[ep_index].new_ring,
++ epriv->name,
++ spriv->root);
++ spriv->eps[ep_index] = epriv;
++}
++
++void xhci_debugfs_remove_endpoint(struct xhci_hcd *xhci,
++ struct xhci_virt_device *dev,
++ int ep_index)
++{
++ struct xhci_ep_priv *epriv;
++ struct xhci_slot_priv *spriv = dev->debugfs_private;
++
++ if (!spriv || !spriv->eps[ep_index])
++ return;
++
++ epriv = spriv->eps[ep_index];
++ debugfs_remove_recursive(epriv->root);
++ spriv->eps[ep_index] = NULL;
++ kfree(epriv);
++}
++
++void xhci_debugfs_create_slot(struct xhci_hcd *xhci, int slot_id)
++{
++ struct xhci_slot_priv *priv;
++ struct xhci_virt_device *dev = xhci->devs[slot_id];
++
++ priv = kzalloc(sizeof(*priv), GFP_KERNEL);
++ if (!priv)
++ return;
++
++ snprintf(priv->name, sizeof(priv->name), "%02d", slot_id);
++ priv->root = debugfs_create_dir(priv->name, xhci->debugfs_slots);
++ priv->dev = dev;
++ dev->debugfs_private = priv;
++
++ xhci_debugfs_create_ring_dir(xhci, dev->eps[0].ring,
++ "ep00", priv->root);
++
++ xhci_debugfs_create_context_files(xhci, priv->root, slot_id);
++}
++
++void xhci_debugfs_remove_slot(struct xhci_hcd *xhci, int slot_id)
++{
++ int i;
++ struct xhci_slot_priv *priv;
++ struct xhci_virt_device *dev = xhci->devs[slot_id];
++
++ if (!dev || !dev->debugfs_private)
++ return;
++
++ priv = dev->debugfs_private;
++
++ debugfs_remove_recursive(priv->root);
++
++ for (i = 0; i < 31; i++)
++ kfree(priv->eps[i]);
++
++ kfree(priv);
++ dev->debugfs_private = NULL;
++}
++
++void xhci_debugfs_init(struct xhci_hcd *xhci)
++{
++ struct device *dev = xhci_to_hcd(xhci)->self.controller;
++
++ xhci->debugfs_root = debugfs_create_dir(dev_name(dev),
++ xhci_debugfs_root);
++
++ INIT_LIST_HEAD(&xhci->regset_list);
++
++ xhci_debugfs_regset(xhci,
++ 0,
++ xhci_cap_regs, ARRAY_SIZE(xhci_cap_regs),
++ xhci->debugfs_root, "reg-cap");
++
++ xhci_debugfs_regset(xhci,
++ HC_LENGTH(readl(&xhci->cap_regs->hc_capbase)),
++ xhci_op_regs, ARRAY_SIZE(xhci_op_regs),
++ xhci->debugfs_root, "reg-op");
++
++ xhci_debugfs_regset(xhci,
++ readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK,
++ xhci_runtime_regs, ARRAY_SIZE(xhci_runtime_regs),
++ xhci->debugfs_root, "reg-runtime");
++
++ xhci_debugfs_extcap_regset(xhci, XHCI_EXT_CAPS_LEGACY,
++ xhci_extcap_legsup,
++ ARRAY_SIZE(xhci_extcap_legsup),
++ "reg-ext-legsup");
++
++ xhci_debugfs_extcap_regset(xhci, XHCI_EXT_CAPS_PROTOCOL,
++ xhci_extcap_protocol,
++ ARRAY_SIZE(xhci_extcap_protocol),
++ "reg-ext-protocol");
++
++ xhci_debugfs_extcap_regset(xhci, XHCI_EXT_CAPS_DEBUG,
++ xhci_extcap_dbc,
++ ARRAY_SIZE(xhci_extcap_dbc),
++ "reg-ext-dbc");
++
++ xhci_debugfs_create_ring_dir(xhci, xhci->cmd_ring,
++ "command-ring",
++ xhci->debugfs_root);
++
++ xhci_debugfs_create_ring_dir(xhci, xhci->event_ring,
++ "event-ring",
++ xhci->debugfs_root);
++
++ xhci->debugfs_slots = debugfs_create_dir("devices", xhci->debugfs_root);
++}
++
++void xhci_debugfs_exit(struct xhci_hcd *xhci)
++{
++ struct xhci_regset *rgs, *tmp;
++
++ debugfs_remove_recursive(xhci->debugfs_root);
++ xhci->debugfs_root = NULL;
++ xhci->debugfs_slots = NULL;
++
++ list_for_each_entry_safe(rgs, tmp, &xhci->regset_list, list)
++ xhci_debugfs_free_regset(rgs);
++}
++
++void __init xhci_debugfs_create_root(void)
++{
++ xhci_debugfs_root = debugfs_create_dir("xhci", usb_debug_root);
++}
++
++void __exit xhci_debugfs_remove_root(void)
++{
++ debugfs_remove_recursive(xhci_debugfs_root);
++ xhci_debugfs_root = NULL;
++}
+diff --git a/drivers/usb/host/xhci-debugfs.h b/drivers/usb/host/xhci-debugfs.h
+new file mode 100644
+index 000000000000..3adc9976f180
+--- /dev/null
++++ b/drivers/usb/host/xhci-debugfs.h
+@@ -0,0 +1,137 @@
++/*
++ * xhci-debugfs.h - xHCI debugfs interface
++ *
++ * Copyright (C) 2017 Intel Corporation
++ *
++ * Author: Lu Baolu <baolu.lu@linux.intel.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#ifndef __LINUX_XHCI_DEBUGFS_H
++#define __LINUX_XHCI_DEBUGFS_H
++
++#include <linux/debugfs.h>
++
++#define DEBUGFS_NAMELEN 32
++
++#define REG_CAPLENGTH 0x00
++#define REG_HCSPARAMS1 0x04
++#define REG_HCSPARAMS2 0x08
++#define REG_HCSPARAMS3 0x0c
++#define REG_HCCPARAMS1 0x10
++#define REG_DOORBELLOFF 0x14
++#define REG_RUNTIMEOFF 0x18
++#define REG_HCCPARAMS2 0x1c
++
++#define REG_USBCMD 0x00
++#define REG_USBSTS 0x04
++#define REG_PAGESIZE 0x08
++#define REG_DNCTRL 0x14
++#define REG_CRCR 0x18
++#define REG_DCBAAP_LOW 0x30
++#define REG_DCBAAP_HIGH 0x34
++#define REG_CONFIG 0x38
++
++#define REG_MFINDEX 0x00
++#define REG_IR0_IMAN 0x20
++#define REG_IR0_IMOD 0x24
++#define REG_IR0_ERSTSZ 0x28
++#define REG_IR0_ERSTBA_LOW 0x30
++#define REG_IR0_ERSTBA_HIGH 0x34
++#define REG_IR0_ERDP_LOW 0x38
++#define REG_IR0_ERDP_HIGH 0x3c
++
++#define REG_EXTCAP_USBLEGSUP 0x00
++#define REG_EXTCAP_USBLEGCTLSTS 0x04
++
++#define REG_EXTCAP_REVISION 0x00
++#define REG_EXTCAP_NAME 0x04
++#define REG_EXTCAP_PORTINFO 0x08
++#define REG_EXTCAP_PORTTYPE 0x0c
++#define REG_EXTCAP_MANTISSA1 0x10
++#define REG_EXTCAP_MANTISSA2 0x14
++#define REG_EXTCAP_MANTISSA3 0x18
++#define REG_EXTCAP_MANTISSA4 0x1c
++#define REG_EXTCAP_MANTISSA5 0x20
++#define REG_EXTCAP_MANTISSA6 0x24
++
++#define REG_EXTCAP_DBC_CAPABILITY 0x00
++#define REG_EXTCAP_DBC_DOORBELL 0x04
++#define REG_EXTCAP_DBC_ERSTSIZE 0x08
++#define REG_EXTCAP_DBC_ERST_LOW 0x10
++#define REG_EXTCAP_DBC_ERST_HIGH 0x14
++#define REG_EXTCAP_DBC_ERDP_LOW 0x18
++#define REG_EXTCAP_DBC_ERDP_HIGH 0x1c
++#define REG_EXTCAP_DBC_CONTROL 0x20
++#define REG_EXTCAP_DBC_STATUS 0x24
++#define REG_EXTCAP_DBC_PORTSC 0x28
++#define REG_EXTCAP_DBC_CONT_LOW 0x30
++#define REG_EXTCAP_DBC_CONT_HIGH 0x34
++#define REG_EXTCAP_DBC_DEVINFO1 0x38
++#define REG_EXTCAP_DBC_DEVINFO2 0x3c
++
++#define dump_register(nm) \
++{ \
++ .name = __stringify(nm), \
++ .offset = REG_ ##nm, \
++}
++
++struct xhci_regset {
++ char name[DEBUGFS_NAMELEN];
++ struct debugfs_regset32 regset;
++ size_t nregs;
++ struct dentry *parent;
++ struct list_head list;
++};
++
++struct xhci_file_map {
++ const char *name;
++ int (*show)(struct seq_file *s, void *unused);
++};
++
++struct xhci_ep_priv {
++ char name[DEBUGFS_NAMELEN];
++ struct dentry *root;
++};
++
++struct xhci_slot_priv {
++ char name[DEBUGFS_NAMELEN];
++ struct dentry *root;
++ struct xhci_ep_priv *eps[31];
++ struct xhci_virt_device *dev;
++};
++
++#ifdef CONFIG_DEBUG_FS
++void xhci_debugfs_init(struct xhci_hcd *xhci);
++void xhci_debugfs_exit(struct xhci_hcd *xhci);
++void __init xhci_debugfs_create_root(void);
++void __exit xhci_debugfs_remove_root(void);
++void xhci_debugfs_create_slot(struct xhci_hcd *xhci, int slot_id);
++void xhci_debugfs_remove_slot(struct xhci_hcd *xhci, int slot_id);
++void xhci_debugfs_create_endpoint(struct xhci_hcd *xhci,
++ struct xhci_virt_device *virt_dev,
++ int ep_index);
++void xhci_debugfs_remove_endpoint(struct xhci_hcd *xhci,
++ struct xhci_virt_device *virt_dev,
++ int ep_index);
++#else
++static inline void xhci_debugfs_init(struct xhci_hcd *xhci) { }
++static inline void xhci_debugfs_exit(struct xhci_hcd *xhci) { }
++static inline void __init xhci_debugfs_create_root(void) { }
++static inline void __exit xhci_debugfs_remove_root(void) { }
++static inline void xhci_debugfs_create_slot(struct xhci_hcd *x, int s) { }
++static inline void xhci_debugfs_remove_slot(struct xhci_hcd *x, int s) { }
++static inline void
++xhci_debugfs_create_endpoint(struct xhci_hcd *xhci,
++ struct xhci_virt_device *virt_dev,
++ int ep_index) { }
++static inline void
++xhci_debugfs_remove_endpoint(struct xhci_hcd *xhci,
++ struct xhci_virt_device *virt_dev,
++ int ep_index) { }
++#endif /* CONFIG_DEBUG_FS */
++
++#endif /* __LINUX_XHCI_DEBUGFS_H */
+diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
+index 17dcc8ae6859..477868b5b307 100644
+--- a/drivers/usb/host/xhci-mem.c
++++ b/drivers/usb/host/xhci-mem.c
+@@ -29,6 +29,7 @@
+
+ #include "xhci.h"
+ #include "xhci-trace.h"
++#include "xhci-debugfs.h"
+
+ /*
+ * Allocates a generic ring segment from the ring pool, sets the dma address,
+@@ -466,8 +467,6 @@ int xhci_ring_expansion(struct xhci_hcd *xhci, struct xhci_ring *ring,
+ return 0;
+ }
+
+-#define CTX_SIZE(_hcc) (HCC_64BYTE_CONTEXT(_hcc) ? 64 : 32)
+-
+ static struct xhci_container_ctx *xhci_alloc_container_ctx(struct xhci_hcd *xhci,
+ int type, gfp_t flags)
+ {
+@@ -971,6 +970,7 @@ void xhci_free_virt_devices_depth_first(struct xhci_hcd *xhci, int slot_id)
+ }
+ out:
+ /* we are now at a leaf device */
++ xhci_debugfs_remove_slot(xhci, slot_id);
+ xhci_free_virt_device(xhci, slot_id);
+ }
+
+@@ -1513,7 +1513,6 @@ int xhci_endpoint_init(struct xhci_hcd *xhci,
+ ep_ctx->tx_info = cpu_to_le32(EP_MAX_ESIT_PAYLOAD_LO(max_esit_payload) |
+ EP_AVG_TRB_LENGTH(avg_trb_len));
+
+- /* FIXME Debug endpoint context */
+ return 0;
+ }
+
+diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
+index ae7acaa420c6..920bfb8162f7 100644
+--- a/drivers/usb/host/xhci.c
++++ b/drivers/usb/host/xhci.c
+@@ -33,6 +33,7 @@
+ #include "xhci.h"
+ #include "xhci-trace.h"
+ #include "xhci-mtk.h"
++#include "xhci-debugfs.h"
+
+ #define DRIVER_AUTHOR "Sarah Sharp"
+ #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
+@@ -633,6 +634,9 @@ int xhci_run(struct usb_hcd *hcd)
+ }
+ xhci_dbg_trace(xhci, trace_xhci_dbg_init,
+ "Finished xhci_run for USB2 roothub");
++
++ xhci_debugfs_init(xhci);
++
+ return 0;
+ }
+ EXPORT_SYMBOL_GPL(xhci_run);
+@@ -661,6 +665,8 @@ static void xhci_stop(struct usb_hcd *hcd)
+ return;
+ }
+
++ xhci_debugfs_exit(xhci);
++
+ spin_lock_irq(&xhci->lock);
+ xhci->xhc_state |= XHCI_STATE_HALTED;
+ xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
+@@ -1643,6 +1649,8 @@ static int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
+ ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
+ new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
+
++ xhci_debugfs_remove_endpoint(xhci, xhci->devs[udev->slot_id], ep_index);
++
+ xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
+
+ if (xhci->quirks & XHCI_MTK_HOST)
+@@ -1766,6 +1774,8 @@ static int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
+ /* Store the usb_device pointer for later use */
+ ep->hcpriv = udev;
+
++ xhci_debugfs_create_endpoint(xhci, virt_dev, ep_index);
++
+ xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
+ (unsigned int) ep->desc.bEndpointAddress,
+ udev->slot_id,
+@@ -2816,6 +2826,7 @@ static void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
+ /* Free any rings allocated for added endpoints */
+ for (i = 0; i < 31; i++) {
+ if (virt_dev->eps[i].new_ring) {
++ xhci_debugfs_remove_endpoint(xhci, virt_dev, i);
+ xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
+ virt_dev->eps[i].new_ring = NULL;
+ }
+@@ -3531,6 +3542,7 @@ static int xhci_discover_or_reset_device(struct usb_hcd *hcd,
+ }
+
+ if (ep->ring) {
++ xhci_debugfs_remove_endpoint(xhci, virt_dev, i);
+ xhci_free_endpoint_ring(xhci, virt_dev, i);
+ last_freed_endpoint = i;
+ }
+@@ -3564,6 +3576,8 @@ static void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
+ struct xhci_slot_ctx *slot_ctx;
+ int i, ret;
+
++ xhci_debugfs_remove_slot(xhci, udev->slot_id);
++
+ #ifndef CONFIG_USB_DEFAULT_PERSIST
+ /*
+ * We called pm_runtime_get_noresume when the device was attached.
+@@ -3727,6 +3741,8 @@ int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
+
+ udev->slot_id = slot_id;
+
++ xhci_debugfs_create_slot(xhci, slot_id);
++
+ #ifndef CONFIG_USB_DEFAULT_PERSIST
+ /*
+ * If resetting upon resume, we can't put the controller into runtime
+@@ -5040,6 +5056,8 @@ static int __init xhci_hcd_init(void)
+ if (usb_disabled())
+ return -ENODEV;
+
++ xhci_debugfs_create_root();
++
+ return 0;
+ }
+
+@@ -5047,7 +5065,10 @@ static int __init xhci_hcd_init(void)
+ * If an init function is provided, an exit function must also be provided
+ * to allow module unload.
+ */
+-static void __exit xhci_hcd_fini(void) { }
++static void __exit xhci_hcd_fini(void)
++{
++ xhci_debugfs_remove_root();
++}
+
+ module_init(xhci_hcd_init);
+ module_exit(xhci_hcd_fini);
+diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
+index b1ef8fe056eb..3ece11154a31 100644
+--- a/drivers/usb/host/xhci.h
++++ b/drivers/usb/host/xhci.h
+@@ -132,6 +132,8 @@ struct xhci_cap_regs {
+ /* Extended Capabilities pointer from PCI base - section 5.3.6 */
+ #define HCC_EXT_CAPS(p) XHCI_HCC_EXT_CAPS(p)
+
++#define CTX_SIZE(_hcc) (HCC_64BYTE_CONTEXT(_hcc) ? 64 : 32)
++
+ /* db_off bitmask - bits 0:1 reserved */
+ #define DBOFF_MASK (~0x3)
+
+@@ -1013,6 +1015,8 @@ struct xhci_virt_device {
+ struct xhci_tt_bw_info *tt_info;
+ /* The current max exit latency for the enabled USB3 link states. */
+ u16 current_mel;
++ /* Used for the debugfs interfaces. */
++ void *debugfs_private;
+ };
+
+ /*
+@@ -1867,6 +1871,10 @@ struct xhci_hcd {
+ /* Compliance Mode Timer Triggered every 2 seconds */
+ #define COMP_MODE_RCVRY_MSECS 2000
+
++ struct dentry *debugfs_root;
++ struct dentry *debugfs_slots;
++ struct list_head regset_list;
++
+ /* platform-specific data -- must come last */
+ unsigned long priv[0] __aligned(sizeof(s64));
+ };
+@@ -2114,6 +2122,7 @@ struct xhci_ep_ctx *xhci_get_ep_ctx(struct xhci_hcd *xhci, struct xhci_container
+ struct xhci_ring *xhci_triad_to_transfer_ring(struct xhci_hcd *xhci,
+ unsigned int slot_id, unsigned int ep_index,
+ unsigned int stream_id);
++
+ static inline struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
+ struct urb *urb)
+ {
+--
+2.19.0
+
diff --git a/patches/0249-usb-xhci-Fix-memory-leak-when-xhci_disable_slot-retu.patch b/patches/0249-usb-xhci-Fix-memory-leak-when-xhci_disable_slot-retu.patch
new file mode 100644
index 0000000..02d55b5
--- /dev/null
+++ b/patches/0249-usb-xhci-Fix-memory-leak-when-xhci_disable_slot-retu.patch
@@ -0,0 +1,62 @@
+From f209a74adc0dd4319e563dfd7e4a6cd3cae8b161 Mon Sep 17 00:00:00 2001
+From: Lu Baolu <baolu.lu@linux.intel.com>
+Date: Thu, 5 Oct 2017 11:21:42 +0300
+Subject: [PATCH 0249/1795] usb: xhci: Fix memory leak when xhci_disable_slot()
+ returns error
+
+If xhci_disable_slot() returns success, a disable slot command
+trb was queued in the command ring. The command completion
+handler will free the virtual device data structure associated
+with the slot. On the other hand, when xhci_disable_slot()
+returns error, the invokers should take the responsibilities to
+free the slot related data structure. Otherwise, memory leakage
+happens.
+
+Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 11ec7588a10d4bc2e1e385ac565d2166d375fba1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+
+ Conflicts:
+ drivers/usb/host/xhci.c
+---
+ drivers/usb/host/xhci.c | 14 ++++++++------
+ 1 file changed, 8 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
+index 920bfb8162f7..6dc536fa2e3b 100644
+--- a/drivers/usb/host/xhci.c
++++ b/drivers/usb/host/xhci.c
+@@ -3606,11 +3606,9 @@ static void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
+ }
+
+ virt_dev->udev = NULL;
+- xhci_disable_slot(xhci, udev->slot_id);
+- /*
+- * Event command completion handler will free any data structures
+- * associated with the slot. XXX Can free sleep?
+- */
++ ret = xhci_disable_slot(xhci, udev->slot_id);
++ if (ret)
++ xhci_free_virt_device(xhci, udev->slot_id);
+ }
+
+ int xhci_disable_slot(struct xhci_hcd *xhci, u32 slot_id)
+@@ -3757,7 +3755,11 @@ int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
+ return 1;
+
+ disable_slot:
+- return xhci_disable_slot(xhci, udev->slot_id);
++ ret = xhci_disable_slot(xhci, udev->slot_id);
++ if (ret)
++ xhci_free_virt_device(xhci, udev->slot_id);
++
++ return 0;
+ }
+
+ /*
+--
+2.19.0
+
diff --git a/patches/0250-usb-xhci-Remove-xhci-mutex-from-xhci_alloc_dev.patch b/patches/0250-usb-xhci-Remove-xhci-mutex-from-xhci_alloc_dev.patch
new file mode 100644
index 0000000..054d572
--- /dev/null
+++ b/patches/0250-usb-xhci-Remove-xhci-mutex-from-xhci_alloc_dev.patch
@@ -0,0 +1,57 @@
+From 0c8a4aadaeef8a7285610ea591b52bdfe4cc7d85 Mon Sep 17 00:00:00 2001
+From: Lu Baolu <baolu.lu@linux.intel.com>
+Date: Thu, 5 Oct 2017 11:21:44 +0300
+Subject: [PATCH 0250/1795] usb: xhci: Remove xhci->mutex from xhci_alloc_dev()
+
+xhci->mutex was added in xhci_alloc_dev() to protect two race sources
+(xhci->slot_id and xhci->addr_dev) by commit a00918d0521d ("usb: host:
+xhci: add mutex for non-thread-safe data").
+
+While xhci->slot_id has been discarded in commit c2d3d49bba08 ("usb:
+xhci: move slot_id from xhci_hcd to xhci_command structure"), and
+xhci->addr_dev has been removed in commit 87e44f2aac8d ("usb: xhci:
+remove the use of xhci->addr_dev"), it's now safe to remove the use of
+xhci->mutex in xhci_alloc_dev().
+
+Link: https://marc.info/?l=linux-usb&m=150306294725821&w=2
+
+Suggested-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 089ed4904e948f93a82ebf62b068ae55aec852ab)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/usb/host/xhci.c | 4 ----
+ 1 file changed, 4 deletions(-)
+
+diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
+index 6dc536fa2e3b..2ac8f8622f8c 100644
+--- a/drivers/usb/host/xhci.c
++++ b/drivers/usb/host/xhci.c
+@@ -3684,13 +3684,10 @@ int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
+ if (!command)
+ return 0;
+
+- /* xhci->slot_id and xhci->addr_dev are not thread-safe */
+- mutex_lock(&xhci->mutex);
+ spin_lock_irqsave(&xhci->lock, flags);
+ ret = xhci_queue_slot_control(xhci, command, TRB_ENABLE_SLOT, 0);
+ if (ret) {
+ spin_unlock_irqrestore(&xhci->lock, flags);
+- mutex_unlock(&xhci->mutex);
+ xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
+ xhci_free_command(xhci, command);
+ return 0;
+@@ -3700,7 +3697,6 @@ int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
+
+ wait_for_completion(command->completion);
+ slot_id = command->slot_id;
+- mutex_unlock(&xhci->mutex);
+
+ if (!slot_id || command->status != COMP_SUCCESS) {
+ xhci_err(xhci, "Error while assigning device slot ID\n");
+--
+2.19.0
+
diff --git a/patches/0251-usb-xhci-Handle-USB-transaction-error-on-address-com.patch b/patches/0251-usb-xhci-Handle-USB-transaction-error-on-address-com.patch
new file mode 100644
index 0000000..ce703ff
--- /dev/null
+++ b/patches/0251-usb-xhci-Handle-USB-transaction-error-on-address-com.patch
@@ -0,0 +1,58 @@
+From 6eb3a1a5206dfa2fc00402d2915ad0a4ed6973ac Mon Sep 17 00:00:00 2001
+From: Lu Baolu <baolu.lu@linux.intel.com>
+Date: Thu, 5 Oct 2017 11:21:45 +0300
+Subject: [PATCH 0251/1795] usb: xhci: Handle USB transaction error on address
+ command
+
+Xhci driver handles USB transaction errors on transfer events,
+but transaction errors are possible on address device command
+completion events as well.
+
+The xHCI specification (section 4.6.5) says: A USB Transaction
+Error Completion Code for an Address Device Command may be due
+to a Stall response from a device. Software should issue a Disable
+Slot Command for the Device Slot then an Enable Slot Command to
+recover from this error.
+
+This patch handles USB transaction errors on address command
+completion events. The related discussion threads can be found
+through below links.
+
+http://marc.info/?l=linux-usb&m=149362010728921&w=2
+http://marc.info/?l=linux-usb&m=149252752825755&w=2
+
+Suggested-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 651aaf36a7d7b36a58980e70133f9437d4f6d312)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/usb/host/xhci.c | 10 ++++++++--
+ 1 file changed, 8 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
+index 2ac8f8622f8c..e13f9bb99baf 100644
+--- a/drivers/usb/host/xhci.c
++++ b/drivers/usb/host/xhci.c
+@@ -3879,8 +3879,14 @@ static int xhci_setup_device(struct usb_hcd *hcd, struct usb_device *udev,
+ break;
+ case COMP_USB_TRANSACTION_ERROR:
+ dev_warn(&udev->dev, "Device not responding to setup %s.\n", act);
+- ret = -EPROTO;
+- break;
++
++ mutex_unlock(&xhci->mutex);
++ ret = xhci_disable_slot(xhci, udev->slot_id);
++ if (!ret)
++ xhci_alloc_dev(hcd, udev);
++ kfree(command->completion);
++ kfree(command);
++ return -EPROTO;
+ case COMP_INCOMPATIBLE_DEVICE_ERROR:
+ dev_warn(&udev->dev,
+ "ERROR: Incompatible device for setup %s command\n", act);
+--
+2.19.0
+
diff --git a/patches/0252-usb-xhci-reduce-device-initiated-resume-time-varianc.patch b/patches/0252-usb-xhci-reduce-device-initiated-resume-time-varianc.patch
new file mode 100644
index 0000000..9b77089
--- /dev/null
+++ b/patches/0252-usb-xhci-reduce-device-initiated-resume-time-varianc.patch
@@ -0,0 +1,90 @@
+From bb3bc9048a1b8947369989c20df077e22adcd0db Mon Sep 17 00:00:00 2001
+From: Anshuman Gupta <anshuman.gupta@intel.com>
+Date: Thu, 5 Oct 2017 11:21:46 +0300
+Subject: [PATCH 0252/1795] usb: xhci: reduce device initiated resume time
+ variance.
+
+This patch will improve the variable auto-resume latency of an usb-port.
+
+The attempt to sync the start of root hub polling with resume time
+signaling finish was ruined by a later request to start immediate
+root hub polling.
+
+When xhci gets a port status change event interrupt due to PORT_PLC
+(port link state transition), linux Host controller driver drives the
+resume signalling on the bus for the amount of time defined by
+USB_REUME_TIMEOUT(40ms) macro.
+
+This 40ms delay for resume signalling is in acceptable limit, but
+it get worse when xhci goes for polling mode in order to detect other
+events on its ports and modify rh_timer timer with a variable time out of
+1ms to (HZ/4)ms.
+
+drivers/usb/core/hcd.c line 799
+mod_timer (&hcd->rh_timer, (jiffies/(HZ/4) + 1) * (HZ/4)).
+
+Due to above variable timeout usb auto-resume latency varies from
+40ms to ~300ms.
+
+Log Snippet:
+~128ms latency
+[ 53.112049] hub 1-0:1.0: state 7 ports 12 chg 0000 evt 0000
+[ 53.229200] hub 1-0:1.0: state 7 ports 12 chg 0000 evt 0004
+[ 53.240177] usb 1-2: usb wakeup-resume
+[ 53.240195] usb 1-2: finish resume
+[ 53.240357] usb usb1-port2: resume, status 0
+-----------------------------------------------------------------
+~300ms latency
+[ 59.946620] hub 1-0:1.0: state 7 ports 12 chg 0000 evt 0000
+[ 59.979341] hub 1-0:1.0: state 7 ports 12 chg 0000 evt 0000
+[ 60.229342] hub 1-0:1.0: state 7 ports 12 chg 0000 evt 0004
+[ 60.251321] usb 1-2: usb wakeup-resume
+[ 60.251335] usb 1-2: finish resume
+[ 60.251539] usb usb1-port2: resume, status 0
+
+This variable resume latency can be optimized, as in case of PORT_PLC
+change event rh_timer has already been modified with USB_RESUME_TIMEOUT
+(40ms) delay,leaving the rest to GetPortStatus and started polling for
+root hub status (invoking usb_hcd_poll_rh_status).
+We can avoid polling as we have already modified rh_timer with
+delay of 40ms.
+
+This patch set the HCD_FLAG_POLL_RH to hcd->flags after modification of
+rh_timer, and avoids polling of root hub status. so rh_timer can fire
+after 40ms and usb device auto-resuem latency will be around 40ms.
+
+[topic and first two senctences of commit message changed -Mathias]
+Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 0914ea66d24c045cdc4f424342057980e86629cf)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/usb/host/xhci-ring.c | 7 ++++++-
+ 1 file changed, 6 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
+index 3a50897ed766..91cab441b82f 100644
+--- a/drivers/usb/host/xhci-ring.c
++++ b/drivers/usb/host/xhci-ring.c
+@@ -1681,9 +1681,14 @@ static void handle_port_status(struct xhci_hcd *xhci,
+ bus_state->resume_done[faked_port_index] = jiffies +
+ msecs_to_jiffies(USB_RESUME_TIMEOUT);
+ set_bit(faked_port_index, &bus_state->resuming_ports);
++ /* Do the rest in GetPortStatus after resume time delay.
++ * Avoid polling roothub status before that so that a
++ * usb device auto-resume latency around ~40ms.
++ */
++ set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
+ mod_timer(&hcd->rh_timer,
+ bus_state->resume_done[faked_port_index]);
+- /* Do the rest in GetPortStatus */
++ bogus_port_status = true;
+ }
+ }
+
+--
+2.19.0
+
diff --git a/patches/0253-xhci-allow-TRACE-to-work-with-EVENT-ring-dequeue.patch b/patches/0253-xhci-allow-TRACE-to-work-with-EVENT-ring-dequeue.patch
new file mode 100644
index 0000000..df7d43c
--- /dev/null
+++ b/patches/0253-xhci-allow-TRACE-to-work-with-EVENT-ring-dequeue.patch
@@ -0,0 +1,56 @@
+From a8c2b0929f10346e095fdc1fb0964a01e3db18fc Mon Sep 17 00:00:00 2001
+From: Adam Wallis <awallis@codeaurora.org>
+Date: Thu, 5 Oct 2017 11:21:47 +0300
+Subject: [PATCH 0253/1795] xhci: allow TRACE to work with EVENT ring dequeue
+
+inc_deq() currently bails earlier for EVENT rings than the common return
+point of the function, due to the fact that EVENT rings do not have
+link TRBs. The unfortunate side effect of this is that the very useful
+trace_xhci_inc_deq() function is not called/usable for EVENT ring
+debug.
+
+This patch provides a refactor by removing the multiple return exit
+points into a single return which additionally allows for all rings to
+use the trace function.
+
+Signed-off-by: Adam Wallis <awallis@codeaurora.org>
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 49d5b05e191d4486c125ff00a01fc5e9e7ba452c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/usb/host/xhci-ring.c | 5 +++--
+ 1 file changed, 3 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
+index 91cab441b82f..d5f44776b360 100644
+--- a/drivers/usb/host/xhci-ring.c
++++ b/drivers/usb/host/xhci-ring.c
+@@ -172,13 +172,13 @@ static void inc_deq(struct xhci_hcd *xhci, struct xhci_ring *ring)
+ if (ring->type == TYPE_EVENT) {
+ if (!last_trb_on_seg(ring->deq_seg, ring->dequeue)) {
+ ring->dequeue++;
+- return;
++ goto out;
+ }
+ if (last_trb_on_ring(ring, ring->deq_seg, ring->dequeue))
+ ring->cycle_state ^= 1;
+ ring->deq_seg = ring->deq_seg->next;
+ ring->dequeue = ring->deq_seg->trbs;
+- return;
++ goto out;
+ }
+
+ /* All other rings have link trbs */
+@@ -191,6 +191,7 @@ static void inc_deq(struct xhci_hcd *xhci, struct xhci_ring *ring)
+ ring->dequeue = ring->deq_seg->trbs;
+ }
+
++out:
+ trace_xhci_inc_deq(ring);
+
+ return;
+--
+2.19.0
+
diff --git a/patches/0254-xhci-trace-slot-context-when-calling-xhci_configure_.patch b/patches/0254-xhci-trace-slot-context-when-calling-xhci_configure_.patch
new file mode 100644
index 0000000..acb79d6
--- /dev/null
+++ b/patches/0254-xhci-trace-slot-context-when-calling-xhci_configure_.patch
@@ -0,0 +1,60 @@
+From 48d08f105349df89d0e30287bb4a7d330f705736 Mon Sep 17 00:00:00 2001
+From: Mathias Nyman <mathias.nyman@linux.intel.com>
+Date: Thu, 5 Oct 2017 11:21:48 +0300
+Subject: [PATCH 0254/1795] xhci: trace slot context when calling
+ xhci_configure_endpoint()
+
+Add trace showing content of input slot context for
+configure endpoint and evaluate context commands
+
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit e3a78ff022c64b518d3efd9ea0f26a784dc0b629)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/usb/host/xhci-trace.h | 5 +++++
+ drivers/usb/host/xhci.c | 4 ++++
+ 2 files changed, 9 insertions(+)
+
+diff --git a/drivers/usb/host/xhci-trace.h b/drivers/usb/host/xhci-trace.h
+index 447edc6343d2..183ed1cf2138 100644
+--- a/drivers/usb/host/xhci-trace.h
++++ b/drivers/usb/host/xhci-trace.h
+@@ -415,6 +415,11 @@ DEFINE_EVENT(xhci_log_slot_ctx, xhci_handle_cmd_set_deq,
+ TP_ARGS(ctx)
+ );
+
++DEFINE_EVENT(xhci_log_slot_ctx, xhci_configure_endpoint,
++ TP_PROTO(struct xhci_slot_ctx *ctx),
++ TP_ARGS(ctx)
++);
++
+ DECLARE_EVENT_CLASS(xhci_log_ring,
+ TP_PROTO(struct xhci_ring *ring),
+ TP_ARGS(ring),
+diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
+index e13f9bb99baf..1af90f1c59e8 100644
+--- a/drivers/usb/host/xhci.c
++++ b/drivers/usb/host/xhci.c
+@@ -2608,6 +2608,7 @@ static int xhci_configure_endpoint(struct xhci_hcd *xhci,
+ unsigned long flags;
+ struct xhci_input_control_ctx *ctrl_ctx;
+ struct xhci_virt_device *virt_dev;
++ struct xhci_slot_ctx *slot_ctx;
+
+ if (!command)
+ return -EINVAL;
+@@ -2646,6 +2647,9 @@ static int xhci_configure_endpoint(struct xhci_hcd *xhci,
+ return -ENOMEM;
+ }
+
++ slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
++ trace_xhci_configure_endpoint(slot_ctx);
++
+ if (!ctx_change)
+ ret = xhci_queue_configure_endpoint(xhci, command,
+ command->in_ctx->dma,
+--
+2.19.0
+
diff --git a/patches/0255-usb-host-xhci-plat-Use-of_device_get_match_data-help.patch b/patches/0255-usb-host-xhci-plat-Use-of_device_get_match_data-help.patch
new file mode 100644
index 0000000..48eb9a1
--- /dev/null
+++ b/patches/0255-usb-host-xhci-plat-Use-of_device_get_match_data-help.patch
@@ -0,0 +1,54 @@
+From 0619363d176d80ae9655a48ac605354787b15c5a Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 5 Oct 2017 11:21:49 +0300
+Subject: [PATCH 0255/1795] usb: host: xhci-plat: Use
+ of_device_get_match_data() helper
+
+Use the of_device_get_match_data() helper instead of open coding.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 2847d242a1e48ca734cee742efa0f70abf545d1e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/usb/host/xhci-plat.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c
+index 5340e4ad8d13..c79d8914f67a 100644
+--- a/drivers/usb/host/xhci-plat.c
++++ b/drivers/usb/host/xhci-plat.c
+@@ -17,6 +17,7 @@
+ #include <linux/module.h>
+ #include <linux/pci.h>
+ #include <linux/of.h>
++#include <linux/of_device.h>
+ #include <linux/platform_device.h>
+ #include <linux/usb/phy.h>
+ #include <linux/slab.h>
+@@ -153,7 +154,7 @@ MODULE_DEVICE_TABLE(of, usb_xhci_of_match);
+
+ static int xhci_plat_probe(struct platform_device *pdev)
+ {
+- const struct of_device_id *match;
++ const struct xhci_plat_priv *priv_match;
+ const struct hc_driver *driver;
+ struct device *sysdev;
+ struct xhci_hcd *xhci;
+@@ -243,9 +244,8 @@ static int xhci_plat_probe(struct platform_device *pdev)
+ }
+
+ xhci = hcd_to_xhci(hcd);
+- match = of_match_node(usb_xhci_of_match, pdev->dev.of_node);
+- if (match) {
+- const struct xhci_plat_priv *priv_match = match->data;
++ priv_match = of_device_get_match_data(&pdev->dev);
++ if (priv_match) {
+ struct xhci_plat_priv *priv = hcd_to_xhci_priv(hcd);
+
+ /* Just copy data for now */
+--
+2.19.0
+
diff --git a/patches/0256-xhci-Convert-timers-to-use-timer_setup.patch b/patches/0256-xhci-Convert-timers-to-use-timer_setup.patch
new file mode 100644
index 0000000..749532c
--- /dev/null
+++ b/patches/0256-xhci-Convert-timers-to-use-timer_setup.patch
@@ -0,0 +1,77 @@
+From 657d0af147d88ecdf0ed98d7758fd5e00457053f Mon Sep 17 00:00:00 2001
+From: Kees Cook <keescook@chromium.org>
+Date: Mon, 16 Oct 2017 16:16:58 -0700
+Subject: [PATCH 0256/1795] xhci: Convert timers to use timer_setup()
+
+In preparation for unconditionally passing the struct timer_list pointer to
+all timer callbacks, switch to using the new timer_setup() and from_timer()
+to pass the timer pointer explicitly.
+
+Cc: Mathias Nyman <mathias.nyman@intel.com>
+Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Cc: linux-usb@vger.kernel.org
+Signed-off-by: Kees Cook <keescook@chromium.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 66a4550308b8391fecd46c7e733cbccb3e01ee96)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/usb/host/xhci-mem.c | 4 ++--
+ drivers/usb/host/xhci-ring.c | 9 +++------
+ drivers/usb/host/xhci.h | 2 +-
+ 3 files changed, 6 insertions(+), 9 deletions(-)
+
+diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
+index 477868b5b307..d10129e664fd 100644
+--- a/drivers/usb/host/xhci-mem.c
++++ b/drivers/usb/host/xhci-mem.c
+@@ -801,8 +801,8 @@ void xhci_free_stream_info(struct xhci_hcd *xhci,
+ static void xhci_init_endpoint_timer(struct xhci_hcd *xhci,
+ struct xhci_virt_ep *ep)
+ {
+- setup_timer(&ep->stop_cmd_timer, xhci_stop_endpoint_command_watchdog,
+- (unsigned long)ep);
++ timer_setup(&ep->stop_cmd_timer, xhci_stop_endpoint_command_watchdog,
++ 0);
+ ep->xhci = xhci;
+ }
+
+diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
+index d5f44776b360..54231beef4f5 100644
+--- a/drivers/usb/host/xhci-ring.c
++++ b/drivers/usb/host/xhci-ring.c
+@@ -948,15 +948,12 @@ void xhci_hc_died(struct xhci_hcd *xhci)
+ * Instead we use a combination of that flag and checking if a new timer is
+ * pending.
+ */
+-void xhci_stop_endpoint_command_watchdog(unsigned long arg)
++void xhci_stop_endpoint_command_watchdog(struct timer_list *t)
+ {
+- struct xhci_hcd *xhci;
+- struct xhci_virt_ep *ep;
++ struct xhci_virt_ep *ep = from_timer(ep, t, stop_cmd_timer);
++ struct xhci_hcd *xhci = ep->xhci;
+ unsigned long flags;
+
+- ep = (struct xhci_virt_ep *) arg;
+- xhci = ep->xhci;
+-
+ spin_lock_irqsave(&xhci->lock, flags);
+
+ /* bail out if cmd completed but raced with stop ep watchdog timer.*/
+diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
+index 3ece11154a31..fd13ae14c28b 100644
+--- a/drivers/usb/host/xhci.h
++++ b/drivers/usb/host/xhci.h
+@@ -2083,7 +2083,7 @@ void xhci_queue_new_dequeue_state(struct xhci_hcd *xhci,
+ struct xhci_dequeue_state *deq_state);
+ void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci, unsigned int ep_index,
+ unsigned int stream_id, struct xhci_td *td);
+-void xhci_stop_endpoint_command_watchdog(unsigned long arg);
++void xhci_stop_endpoint_command_watchdog(struct timer_list *t);
+ void xhci_handle_command_timeout(struct work_struct *work);
+
+ void xhci_ring_ep_doorbell(struct xhci_hcd *xhci, unsigned int slot_id,
+--
+2.19.0
+
diff --git a/patches/0257-usb-host-xhci-mark-expected-switch-fall-through.patch b/patches/0257-usb-host-xhci-mark-expected-switch-fall-through.patch
new file mode 100644
index 0000000..52299d0
--- /dev/null
+++ b/patches/0257-usb-host-xhci-mark-expected-switch-fall-through.patch
@@ -0,0 +1,32 @@
+From 1b4c6eb98b397c9261b6f2096332d416c0216df5 Mon Sep 17 00:00:00 2001
+From: "Gustavo A. R. Silva" <garsilva@embeddedor.com>
+Date: Wed, 25 Oct 2017 13:49:01 -0500
+Subject: [PATCH 0257/1795] usb: host: xhci: mark expected switch fall-through
+
+In preparation to enabling -Wimplicit-fallthrough, mark switch cases
+where we are expecting to fall through.
+
+Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 7d864999814e777fe083c2fd156112ccf9058882)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/usb/host/xhci.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
+index 1af90f1c59e8..19bd1c1df9cc 100644
+--- a/drivers/usb/host/xhci.c
++++ b/drivers/usb/host/xhci.c
+@@ -4338,6 +4338,7 @@ static unsigned long long xhci_calculate_intel_u1_timeout(
+ break;
+ }
+ /* Otherwise the calculation is the same as isoc eps */
++ /* fall through */
+ case USB_ENDPOINT_XFER_ISOC:
+ timeout_ns = xhci_service_interval_to_ns(desc);
+ timeout_ns = DIV_ROUND_UP_ULL(timeout_ns * 105, 100);
+--
+2.19.0
+
diff --git a/patches/0258-usb-host-xhci-mem-mark-expected-switch-fall-through.patch b/patches/0258-usb-host-xhci-mem-mark-expected-switch-fall-through.patch
new file mode 100644
index 0000000..478a470
--- /dev/null
+++ b/patches/0258-usb-host-xhci-mem-mark-expected-switch-fall-through.patch
@@ -0,0 +1,33 @@
+From dab4d700bd90cffdd04e75c7b8df74438907ea4d Mon Sep 17 00:00:00 2001
+From: "Gustavo A. R. Silva" <garsilva@embeddedor.com>
+Date: Wed, 25 Oct 2017 13:49:10 -0500
+Subject: [PATCH 0258/1795] usb: host: xhci-mem: mark expected switch
+ fall-through
+
+In preparation to enabling -Wimplicit-fallthrough, mark switch cases
+where we are expecting to fall through.
+
+Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 1356cedd99aab15a60c4c4ade79e52c4b5200fdf)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/usb/host/xhci-mem.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
+index d10129e664fd..804aef5d4e47 100644
+--- a/drivers/usb/host/xhci-mem.c
++++ b/drivers/usb/host/xhci-mem.c
+@@ -1328,6 +1328,7 @@ static unsigned int xhci_get_endpoint_interval(struct usb_device *udev,
+ * since it uses the same rules as low speed interrupt
+ * endpoints.
+ */
++ /* fall through */
+
+ case USB_SPEED_LOW:
+ if (usb_endpoint_xfer_int(&ep->desc) ||
+--
+2.19.0
+
diff --git a/patches/0259-usb-host-xhci-hub-mark-expected-switch-fall-through.patch b/patches/0259-usb-host-xhci-hub-mark-expected-switch-fall-through.patch
new file mode 100644
index 0000000..bea3de4
--- /dev/null
+++ b/patches/0259-usb-host-xhci-hub-mark-expected-switch-fall-through.patch
@@ -0,0 +1,33 @@
+From ceec8275dc8d6704c0d041f86e80a666593d9dbf Mon Sep 17 00:00:00 2001
+From: "Gustavo A. R. Silva" <garsilva@embeddedor.com>
+Date: Wed, 25 Oct 2017 13:49:38 -0500
+Subject: [PATCH 0259/1795] usb: host: xhci-hub: mark expected switch
+ fall-through
+
+In preparation to enabling -Wimplicit-fallthrough, mark switch cases
+where we are expecting to fall through.
+
+Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit ff504f572cf8667414a44e88c06ea0d421b42566)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/usb/host/xhci-hub.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c
+index fff62fe0a097..8e4345cb89e9 100644
+--- a/drivers/usb/host/xhci-hub.c
++++ b/drivers/usb/host/xhci-hub.c
+@@ -1378,6 +1378,7 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
+ break;
+ case USB_PORT_FEAT_C_SUSPEND:
+ bus_state->port_c_suspend &= ~(1 << wIndex);
++ /* fall through */
+ case USB_PORT_FEAT_C_RESET:
+ case USB_PORT_FEAT_C_BH_PORT_RESET:
+ case USB_PORT_FEAT_C_CONNECTION:
+--
+2.19.0
+
diff --git a/patches/0260-USB-host-xhci-Remove-redundant-license-text.patch b/patches/0260-USB-host-xhci-Remove-redundant-license-text.patch
new file mode 100644
index 0000000..88df1a9
--- /dev/null
+++ b/patches/0260-USB-host-xhci-Remove-redundant-license-text.patch
@@ -0,0 +1,472 @@
+From 79d6077c4e3b925b73104bb9b1ed6169f01fdd1e Mon Sep 17 00:00:00 2001
+From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Date: Mon, 6 Nov 2017 15:37:23 +0100
+Subject: [PATCH 0260/1795] USB: host: xhci: Remove redundant license text
+
+Now that the SPDX tag is in all USB files, that identifies the license
+in a specific and legally-defined manner. So the extra GPL text wording
+can be removed as it is no longer needed at all.
+
+This is done on a quest to remove the 700+ different ways that files in
+the kernel describe the GPL license text. And there's unneeded stuff
+like the address (sometimes incorrect) for the FSF which is never
+needed.
+
+No copyright headers or other non-license-description text was removed.
+
+Cc: Matthias Brugger <matthias.bgg@gmail.com>
+Cc: Thierry Reding <thierry.reding@gmail.com>
+Cc: Jonathan Hunter <jonathanh@nvidia.com>
+Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 9ed64195e35efa8901d20a0cd8ff3668ae68e7d6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/usb/host/xhci-dbg.c | 13 -------------
+ drivers/usb/host/xhci-debugfs.c | 4 ----
+ drivers/usb/host/xhci-debugfs.h | 4 ----
+ drivers/usb/host/xhci-ext-caps.h | 13 -------------
+ drivers/usb/host/xhci-hub.c | 13 -------------
+ drivers/usb/host/xhci-mem.c | 13 -------------
+ drivers/usb/host/xhci-mtk-sch.c | 10 ----------
+ drivers/usb/host/xhci-mtk.c | 10 ----------
+ drivers/usb/host/xhci-mtk.h | 10 ----------
+ drivers/usb/host/xhci-mvebu.c | 4 ----
+ drivers/usb/host/xhci-mvebu.h | 4 ----
+ drivers/usb/host/xhci-pci.c | 13 -------------
+ drivers/usb/host/xhci-plat.c | 4 ----
+ drivers/usb/host/xhci-plat.h | 4 ----
+ drivers/usb/host/xhci-rcar.c | 4 ----
+ drivers/usb/host/xhci-rcar.h | 4 ----
+ drivers/usb/host/xhci-ring.c | 13 -------------
+ drivers/usb/host/xhci-tegra.c | 4 ----
+ drivers/usb/host/xhci-trace.c | 4 ----
+ drivers/usb/host/xhci-trace.h | 4 ----
+ drivers/usb/host/xhci.c | 13 -------------
+ drivers/usb/host/xhci.h | 13 -------------
+ 22 files changed, 178 deletions(-)
+
+diff --git a/drivers/usb/host/xhci-dbg.c b/drivers/usb/host/xhci-dbg.c
+index 83904170be5c..584d7b9a3683 100644
+--- a/drivers/usb/host/xhci-dbg.c
++++ b/drivers/usb/host/xhci-dbg.c
+@@ -6,19 +6,6 @@
+ *
+ * Author: Sarah Sharp
+ * Some code borrowed from the Linux EHCI driver.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- *
+- * This program is distributed in the hope that it will be useful, but
+- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+- * for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software Foundation,
+- * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+ #include "xhci.h"
+diff --git a/drivers/usb/host/xhci-debugfs.c b/drivers/usb/host/xhci-debugfs.c
+index 6772ee90944b..b799ed83cc7a 100644
+--- a/drivers/usb/host/xhci-debugfs.c
++++ b/drivers/usb/host/xhci-debugfs.c
+@@ -4,10 +4,6 @@
+ * Copyright (C) 2017 Intel Corporation
+ *
+ * Author: Lu Baolu <baolu.lu@linux.intel.com>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+ */
+
+ #include <linux/slab.h>
+diff --git a/drivers/usb/host/xhci-debugfs.h b/drivers/usb/host/xhci-debugfs.h
+index 3adc9976f180..09cfd3998125 100644
+--- a/drivers/usb/host/xhci-debugfs.h
++++ b/drivers/usb/host/xhci-debugfs.h
+@@ -4,10 +4,6 @@
+ * Copyright (C) 2017 Intel Corporation
+ *
+ * Author: Lu Baolu <baolu.lu@linux.intel.com>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+ */
+
+ #ifndef __LINUX_XHCI_DEBUGFS_H
+diff --git a/drivers/usb/host/xhci-ext-caps.h b/drivers/usb/host/xhci-ext-caps.h
+index 259963bbe3aa..bf7316e130d3 100644
+--- a/drivers/usb/host/xhci-ext-caps.h
++++ b/drivers/usb/host/xhci-ext-caps.h
+@@ -6,19 +6,6 @@
+ *
+ * Author: Sarah Sharp
+ * Some code borrowed from the Linux EHCI driver.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- *
+- * This program is distributed in the hope that it will be useful, but
+- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+- * for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software Foundation,
+- * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+ /* Up to 16 ms to halt an HC */
+ #define XHCI_MAX_HALT_USEC (16*1000)
+diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c
+index 8e4345cb89e9..0fb3fec94e04 100644
+--- a/drivers/usb/host/xhci-hub.c
++++ b/drivers/usb/host/xhci-hub.c
+@@ -6,19 +6,6 @@
+ *
+ * Author: Sarah Sharp
+ * Some code borrowed from the Linux EHCI driver.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- *
+- * This program is distributed in the hope that it will be useful, but
+- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+- * for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software Foundation,
+- * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+
+diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
+index 804aef5d4e47..c44f09f17f5e 100644
+--- a/drivers/usb/host/xhci-mem.c
++++ b/drivers/usb/host/xhci-mem.c
+@@ -6,19 +6,6 @@
+ *
+ * Author: Sarah Sharp
+ * Some code borrowed from the Linux EHCI driver.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- *
+- * This program is distributed in the hope that it will be useful, but
+- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+- * for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software Foundation,
+- * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+ #include <linux/usb.h>
+diff --git a/drivers/usb/host/xhci-mtk-sch.c b/drivers/usb/host/xhci-mtk-sch.c
+index 42e4701ee944..449c143c0574 100644
+--- a/drivers/usb/host/xhci-mtk-sch.c
++++ b/drivers/usb/host/xhci-mtk-sch.c
+@@ -4,16 +4,6 @@
+ * Author:
+ * Zhigang.Wei <zhigang.wei@mediatek.com>
+ * Chunfeng.Yun <chunfeng.yun@mediatek.com>
+- *
+- * This software is licensed under the terms of the GNU General Public
+- * License version 2, as published by the Free Software Foundation, and
+- * may be copied, distributed, and modified under those terms.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+ */
+
+ #include <linux/kernel.h>
+diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
+index 4e2fb05282a6..95f583f41bfd 100644
+--- a/drivers/usb/host/xhci-mtk.c
++++ b/drivers/usb/host/xhci-mtk.c
+@@ -5,16 +5,6 @@
+ * Copyright (c) 2015 MediaTek Inc.
+ * Author:
+ * Chunfeng Yun <chunfeng.yun@mediatek.com>
+- *
+- * This software is licensed under the terms of the GNU General Public
+- * License version 2, as published by the Free Software Foundation, and
+- * may be copied, distributed, and modified under those terms.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+ */
+
+ #include <linux/clk.h>
+diff --git a/drivers/usb/host/xhci-mtk.h b/drivers/usb/host/xhci-mtk.h
+index 047d1a60341b..1aec83460574 100644
+--- a/drivers/usb/host/xhci-mtk.h
++++ b/drivers/usb/host/xhci-mtk.h
+@@ -4,16 +4,6 @@
+ * Author:
+ * Zhigang.Wei <zhigang.wei@mediatek.com>
+ * Chunfeng.Yun <chunfeng.yun@mediatek.com>
+- *
+- * This software is licensed under the terms of the GNU General Public
+- * License version 2, as published by the Free Software Foundation, and
+- * may be copied, distributed, and modified under those terms.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+ */
+
+ #ifndef _XHCI_MTK_H_
+diff --git a/drivers/usb/host/xhci-mvebu.c b/drivers/usb/host/xhci-mvebu.c
+index fe7a2f84faeb..32e158568788 100644
+--- a/drivers/usb/host/xhci-mvebu.c
++++ b/drivers/usb/host/xhci-mvebu.c
+@@ -2,10 +2,6 @@
+ /*
+ * Copyright (C) 2014 Marvell
+ * Author: Gregory CLEMENT <gregory.clement@free-electrons.com>
+- *
+- * This program is free software; you can redistribute it and/or
+- * modify it under the terms of the GNU General Public License
+- * version 2 as published by the Free Software Foundation.
+ */
+
+ #include <linux/io.h>
+diff --git a/drivers/usb/host/xhci-mvebu.h b/drivers/usb/host/xhci-mvebu.h
+index 619792ae75b8..09791df2cec0 100644
+--- a/drivers/usb/host/xhci-mvebu.h
++++ b/drivers/usb/host/xhci-mvebu.h
+@@ -3,10 +3,6 @@
+ * Copyright (C) 2014 Marvell
+ *
+ * Gregory Clement <gregory.clement@free-electrons.com>
+- *
+- * This file is licensed under the terms of the GNU General Public
+- * License version 2. This program is licensed "as is" without any
+- * warranty of any kind, whether express or implied.
+ */
+
+ #ifndef __LINUX_XHCI_MVEBU_H
+diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
+index dd4b5e2615cf..c3ae5784649a 100644
+--- a/drivers/usb/host/xhci-pci.c
++++ b/drivers/usb/host/xhci-pci.c
+@@ -6,19 +6,6 @@
+ *
+ * Author: Sarah Sharp
+ * Some code borrowed from the Linux EHCI driver.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- *
+- * This program is distributed in the hope that it will be useful, but
+- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+- * for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software Foundation,
+- * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+ #include <linux/pci.h>
+diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c
+index c79d8914f67a..833ca511fd35 100644
+--- a/drivers/usb/host/xhci-plat.c
++++ b/drivers/usb/host/xhci-plat.c
+@@ -6,10 +6,6 @@
+ * Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
+ *
+ * A lot of code borrowed from the Linux xHCI driver.
+- *
+- * This program is free software; you can redistribute it and/or
+- * modify it under the terms of the GNU General Public License
+- * version 2 as published by the Free Software Foundation.
+ */
+
+ #include <linux/clk.h>
+diff --git a/drivers/usb/host/xhci-plat.h b/drivers/usb/host/xhci-plat.h
+index ac8f8eb0bf49..ae29f22ff5bd 100644
+--- a/drivers/usb/host/xhci-plat.h
++++ b/drivers/usb/host/xhci-plat.h
+@@ -3,10 +3,6 @@
+ * xhci-plat.h - xHCI host controller driver platform Bus Glue.
+ *
+ * Copyright (C) 2015 Renesas Electronics Corporation
+- *
+- * This program is free software; you can redistribute it and/or
+- * modify it under the terms of the GNU General Public License
+- * version 2 as published by the Free Software Foundation.
+ */
+
+ #ifndef _XHCI_PLAT_H
+diff --git a/drivers/usb/host/xhci-rcar.c b/drivers/usb/host/xhci-rcar.c
+index 407fa95f7122..f33ffc2bc4ed 100644
+--- a/drivers/usb/host/xhci-rcar.c
++++ b/drivers/usb/host/xhci-rcar.c
+@@ -3,10 +3,6 @@
+ * xHCI host controller driver for R-Car SoCs
+ *
+ * Copyright (C) 2014 Renesas Electronics Corporation
+- *
+- * This program is free software; you can redistribute it and/or
+- * modify it under the terms of the GNU General Public License
+- * version 2 as published by the Free Software Foundation.
+ */
+
+ #include <linux/firmware.h>
+diff --git a/drivers/usb/host/xhci-rcar.h b/drivers/usb/host/xhci-rcar.h
+index 162706528c4c..804b6ab4246f 100644
+--- a/drivers/usb/host/xhci-rcar.h
++++ b/drivers/usb/host/xhci-rcar.h
+@@ -3,10 +3,6 @@
+ * drivers/usb/host/xhci-rcar.h
+ *
+ * Copyright (C) 2014 Renesas Electronics Corporation
+- *
+- * This program is free software; you can redistribute it and/or
+- * modify it under the terms of the GNU General Public License
+- * version 2 as published by the Free Software Foundation.
+ */
+
+ #ifndef _XHCI_RCAR_H
+diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
+index 54231beef4f5..c5cbc685c691 100644
+--- a/drivers/usb/host/xhci-ring.c
++++ b/drivers/usb/host/xhci-ring.c
+@@ -6,19 +6,6 @@
+ *
+ * Author: Sarah Sharp
+ * Some code borrowed from the Linux EHCI driver.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- *
+- * This program is distributed in the hope that it will be useful, but
+- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+- * for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software Foundation,
+- * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+ /*
+diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c
+index 6197fce3dce2..da808645f4b7 100644
+--- a/drivers/usb/host/xhci-tegra.c
++++ b/drivers/usb/host/xhci-tegra.c
+@@ -4,10 +4,6 @@
+ *
+ * Copyright (C) 2014 NVIDIA Corporation
+ * Copyright (C) 2014 Google, Inc.
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms and conditions of the GNU General Public License,
+- * version 2, as published by the Free Software Foundation.
+ */
+
+ #include <linux/clk.h>
+diff --git a/drivers/usb/host/xhci-trace.c b/drivers/usb/host/xhci-trace.c
+index 0be3e83025ae..d0070814d1ea 100644
+--- a/drivers/usb/host/xhci-trace.c
++++ b/drivers/usb/host/xhci-trace.c
+@@ -6,10 +6,6 @@
+ *
+ * Author: Xenia Ragiadakou
+ * Email : burzalodowa@gmail.com
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+ */
+
+ #define CREATE_TRACE_POINTS
+diff --git a/drivers/usb/host/xhci-trace.h b/drivers/usb/host/xhci-trace.h
+index 183ed1cf2138..f6cbf6190c60 100644
+--- a/drivers/usb/host/xhci-trace.h
++++ b/drivers/usb/host/xhci-trace.h
+@@ -6,10 +6,6 @@
+ *
+ * Author: Xenia Ragiadakou
+ * Email : burzalodowa@gmail.com
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+ */
+
+ #undef TRACE_SYSTEM
+diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
+index 19bd1c1df9cc..4bceebb965ca 100644
+--- a/drivers/usb/host/xhci.c
++++ b/drivers/usb/host/xhci.c
+@@ -6,19 +6,6 @@
+ *
+ * Author: Sarah Sharp
+ * Some code borrowed from the Linux EHCI driver.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- *
+- * This program is distributed in the hope that it will be useful, but
+- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+- * for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software Foundation,
+- * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+ #include <linux/pci.h>
+diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
+index fd13ae14c28b..5f1fe671b694 100644
+--- a/drivers/usb/host/xhci.h
++++ b/drivers/usb/host/xhci.h
+@@ -7,19 +7,6 @@
+ *
+ * Author: Sarah Sharp
+ * Some code borrowed from the Linux EHCI driver.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- *
+- * This program is distributed in the hope that it will be useful, but
+- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+- * for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software Foundation,
+- * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+ #ifndef __LINUX_XHCI_HCD_H
+--
+2.19.0
+
diff --git a/patches/0261-xhci-Fix-xhci-debugfs-NULL-pointer-dereference-in-re.patch b/patches/0261-xhci-Fix-xhci-debugfs-NULL-pointer-dereference-in-re.patch
new file mode 100644
index 0000000..885082b
--- /dev/null
+++ b/patches/0261-xhci-Fix-xhci-debugfs-NULL-pointer-dereference-in-re.patch
@@ -0,0 +1,55 @@
+From 244b4f620363b798348f0302d62c8b36db28e2d5 Mon Sep 17 00:00:00 2001
+From: Mathias Nyman <mathias.nyman@linux.intel.com>
+Date: Thu, 21 Dec 2017 15:06:13 +0200
+Subject: [PATCH 0261/1795] xhci: Fix xhci debugfs NULL pointer dereference in
+ resume from hibernate
+
+Free the virt_device and its debugfs_private member together.
+
+When resuming from hibernate the .free_dev callback unconditionally
+freed the debugfs_private member, but could leave virt_device intact.
+
+This triggered a NULL pointer dereference after resume when usbmuxd
+sent a USBDEVFS_SETCONFIGURATION ioctl to a device, trying to add a
+endpoint debugfs entry to a already freed debugfs_private pointer.
+
+Fixes: 02b6fdc2a153 ("usb: xhci: Add debugfs interface for xHCI driver")
+Reported-by: Alexander Kappner <agk@godking.net>
+Tested-by: Alexander Kappner <agk@godking.net>
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 052f71e25a7ecd80a9567b291df8ea333d9a8565)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/usb/host/xhci.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
+index 4bceebb965ca..05d45079a259 100644
+--- a/drivers/usb/host/xhci.c
++++ b/drivers/usb/host/xhci.c
+@@ -3567,8 +3567,6 @@ static void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
+ struct xhci_slot_ctx *slot_ctx;
+ int i, ret;
+
+- xhci_debugfs_remove_slot(xhci, udev->slot_id);
+-
+ #ifndef CONFIG_USB_DEFAULT_PERSIST
+ /*
+ * We called pm_runtime_get_noresume when the device was attached.
+@@ -3598,8 +3596,10 @@ static void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
+
+ virt_dev->udev = NULL;
+ ret = xhci_disable_slot(xhci, udev->slot_id);
+- if (ret)
++ if (ret) {
++ xhci_debugfs_remove_slot(xhci, udev->slot_id);
+ xhci_free_virt_device(xhci, udev->slot_id);
++ }
+ }
+
+ int xhci_disable_slot(struct xhci_hcd *xhci, u32 slot_id)
+--
+2.19.0
+
diff --git a/patches/0262-media-v4l-fwnode-Support-generic-parsing-of-graph-en.patch b/patches/0262-media-v4l-fwnode-Support-generic-parsing-of-graph-en.patch
new file mode 100644
index 0000000..6feeb47
--- /dev/null
+++ b/patches/0262-media-v4l-fwnode-Support-generic-parsing-of-graph-en.patch
@@ -0,0 +1,508 @@
+From 69c822e4c2c5c2a3909c2727fa20d5456533333d Mon Sep 17 00:00:00 2001
+From: Sakari Ailus <sakari.ailus@linux.intel.com>
+Date: Thu, 17 Aug 2017 11:28:21 -0400
+Subject: [PATCH 0262/1795] media: v4l: fwnode: Support generic parsing of
+ graph endpoints in a device
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add two functions for parsing devices graph endpoints:
+v4l2_async_notifier_parse_fwnode_endpoints and
+v4l2_async_notifier_parse_fwnode_endpoints_by_port. The former iterates
+over all endpoints whereas the latter only iterates over the endpoints in
+a given port.
+
+The former is mostly useful for existing drivers that currently implement
+the iteration over all the endpoints themselves whereas the latter is
+especially intended for devices with both sinks and sources: async
+sub-devices for external devices connected to the device's sources will
+have already been set up, or the external sub-devices are part of the
+master device.
+
+Depends-on: ("device property: preserve usecount for node passed to of_fwnode_graph_get_port_parent()")
+
+Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
+Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
+Acked-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit 9ca4653121329595443df4e7a458154e8f745edf)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/media/v4l2-core/v4l2-async.c | 31 ++++
+ drivers/media/v4l2-core/v4l2-fwnode.c | 196 ++++++++++++++++++++++++++
+ include/media/v4l2-async.h | 24 +++-
+ include/media/v4l2-fwnode.h | 118 ++++++++++++++++
+ 4 files changed, 367 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/media/v4l2-core/v4l2-async.c b/drivers/media/v4l2-core/v4l2-async.c
+index d741a8e0fdac..e67aeecd674d 100644
+--- a/drivers/media/v4l2-core/v4l2-async.c
++++ b/drivers/media/v4l2-core/v4l2-async.c
+@@ -22,6 +22,7 @@
+
+ #include <media/v4l2-async.h>
+ #include <media/v4l2-device.h>
++#include <media/v4l2-fwnode.h>
+ #include <media/v4l2-subdev.h>
+
+ static bool match_i2c(struct v4l2_subdev *sd, struct v4l2_async_subdev *asd)
+@@ -273,6 +274,36 @@ void v4l2_async_notifier_unregister(struct v4l2_async_notifier *notifier)
+ }
+ EXPORT_SYMBOL(v4l2_async_notifier_unregister);
+
++void v4l2_async_notifier_cleanup(struct v4l2_async_notifier *notifier)
++{
++ unsigned int i;
++
++ if (!notifier->max_subdevs)
++ return;
++
++ for (i = 0; i < notifier->num_subdevs; i++) {
++ struct v4l2_async_subdev *asd = notifier->subdevs[i];
++
++ switch (asd->match_type) {
++ case V4L2_ASYNC_MATCH_FWNODE:
++ fwnode_handle_put(asd->match.fwnode.fwnode);
++ break;
++ default:
++ WARN_ON_ONCE(true);
++ break;
++ }
++
++ kfree(asd);
++ }
++
++ notifier->max_subdevs = 0;
++ notifier->num_subdevs = 0;
++
++ kvfree(notifier->subdevs);
++ notifier->subdevs = NULL;
++}
++EXPORT_SYMBOL_GPL(v4l2_async_notifier_cleanup);
++
+ int v4l2_async_register_subdev(struct v4l2_subdev *sd)
+ {
+ struct v4l2_async_notifier *notifier;
+diff --git a/drivers/media/v4l2-core/v4l2-fwnode.c b/drivers/media/v4l2-core/v4l2-fwnode.c
+index 40b2fbfe8865..df0695b7bbcc 100644
+--- a/drivers/media/v4l2-core/v4l2-fwnode.c
++++ b/drivers/media/v4l2-core/v4l2-fwnode.c
+@@ -19,6 +19,7 @@
+ */
+ #include <linux/acpi.h>
+ #include <linux/kernel.h>
++#include <linux/mm.h>
+ #include <linux/module.h>
+ #include <linux/of.h>
+ #include <linux/property.h>
+@@ -26,6 +27,7 @@
+ #include <linux/string.h>
+ #include <linux/types.h>
+
++#include <media/v4l2-async.h>
+ #include <media/v4l2-fwnode.h>
+
+ enum v4l2_fwnode_bus_type {
+@@ -388,6 +390,200 @@ void v4l2_fwnode_put_link(struct v4l2_fwnode_link *link)
+ }
+ EXPORT_SYMBOL_GPL(v4l2_fwnode_put_link);
+
++static int v4l2_async_notifier_realloc(struct v4l2_async_notifier *notifier,
++ unsigned int max_subdevs)
++{
++ struct v4l2_async_subdev **subdevs;
++
++ if (max_subdevs <= notifier->max_subdevs)
++ return 0;
++
++ subdevs = kvmalloc_array(
++ max_subdevs, sizeof(*notifier->subdevs),
++ GFP_KERNEL | __GFP_ZERO);
++ if (!subdevs)
++ return -ENOMEM;
++
++ if (notifier->subdevs) {
++ memcpy(subdevs, notifier->subdevs,
++ sizeof(*subdevs) * notifier->num_subdevs);
++
++ kvfree(notifier->subdevs);
++ }
++
++ notifier->subdevs = subdevs;
++ notifier->max_subdevs = max_subdevs;
++
++ return 0;
++}
++
++static int v4l2_async_notifier_fwnode_parse_endpoint(
++ struct device *dev, struct v4l2_async_notifier *notifier,
++ struct fwnode_handle *endpoint, unsigned int asd_struct_size,
++ int (*parse_endpoint)(struct device *dev,
++ struct v4l2_fwnode_endpoint *vep,
++ struct v4l2_async_subdev *asd))
++{
++ struct v4l2_async_subdev *asd;
++ struct v4l2_fwnode_endpoint *vep;
++ int ret = 0;
++
++ asd = kzalloc(asd_struct_size, GFP_KERNEL);
++ if (!asd)
++ return -ENOMEM;
++
++ asd->match_type = V4L2_ASYNC_MATCH_FWNODE;
++ asd->match.fwnode.fwnode =
++ fwnode_graph_get_remote_port_parent(endpoint);
++ if (!asd->match.fwnode.fwnode) {
++ dev_warn(dev, "bad remote port parent\n");
++ ret = -EINVAL;
++ goto out_err;
++ }
++
++ vep = v4l2_fwnode_endpoint_alloc_parse(endpoint);
++ if (IS_ERR(vep)) {
++ ret = PTR_ERR(vep);
++ dev_warn(dev, "unable to parse V4L2 fwnode endpoint (%d)\n",
++ ret);
++ goto out_err;
++ }
++
++ ret = parse_endpoint ? parse_endpoint(dev, vep, asd) : 0;
++ if (ret == -ENOTCONN)
++ dev_dbg(dev, "ignoring port@%u/endpoint@%u\n", vep->base.port,
++ vep->base.id);
++ else if (ret < 0)
++ dev_warn(dev,
++ "driver could not parse port@%u/endpoint@%u (%d)\n",
++ vep->base.port, vep->base.id, ret);
++ v4l2_fwnode_endpoint_free(vep);
++ if (ret < 0)
++ goto out_err;
++
++ notifier->subdevs[notifier->num_subdevs] = asd;
++ notifier->num_subdevs++;
++
++ return 0;
++
++out_err:
++ fwnode_handle_put(asd->match.fwnode.fwnode);
++ kfree(asd);
++
++ return ret == -ENOTCONN ? 0 : ret;
++}
++
++static int __v4l2_async_notifier_parse_fwnode_endpoints(
++ struct device *dev, struct v4l2_async_notifier *notifier,
++ size_t asd_struct_size, unsigned int port, bool has_port,
++ int (*parse_endpoint)(struct device *dev,
++ struct v4l2_fwnode_endpoint *vep,
++ struct v4l2_async_subdev *asd))
++{
++ struct fwnode_handle *fwnode;
++ unsigned int max_subdevs = notifier->max_subdevs;
++ int ret;
++
++ if (WARN_ON(asd_struct_size < sizeof(struct v4l2_async_subdev)))
++ return -EINVAL;
++
++ for (fwnode = NULL; (fwnode = fwnode_graph_get_next_endpoint(
++ dev_fwnode(dev), fwnode)); ) {
++ struct fwnode_handle *dev_fwnode;
++ bool is_available;
++
++ dev_fwnode = fwnode_graph_get_port_parent(fwnode);
++ is_available = fwnode_device_is_available(dev_fwnode);
++ fwnode_handle_put(dev_fwnode);
++ if (!is_available)
++ continue;
++
++ if (has_port) {
++ struct fwnode_endpoint ep;
++
++ ret = fwnode_graph_parse_endpoint(fwnode, &ep);
++ if (ret) {
++ fwnode_handle_put(fwnode);
++ return ret;
++ }
++
++ if (ep.port != port)
++ continue;
++ }
++ max_subdevs++;
++ }
++
++ /* No subdevs to add? Return here. */
++ if (max_subdevs == notifier->max_subdevs)
++ return 0;
++
++ ret = v4l2_async_notifier_realloc(notifier, max_subdevs);
++ if (ret)
++ return ret;
++
++ for (fwnode = NULL; (fwnode = fwnode_graph_get_next_endpoint(
++ dev_fwnode(dev), fwnode)); ) {
++ struct fwnode_handle *dev_fwnode;
++ bool is_available;
++
++ dev_fwnode = fwnode_graph_get_port_parent(fwnode);
++ is_available = fwnode_device_is_available(dev_fwnode);
++ fwnode_handle_put(dev_fwnode);
++
++ if (!fwnode_device_is_available(dev_fwnode))
++ continue;
++
++ if (WARN_ON(notifier->num_subdevs >= notifier->max_subdevs)) {
++ ret = -EINVAL;
++ break;
++ }
++
++ if (has_port) {
++ struct fwnode_endpoint ep;
++
++ ret = fwnode_graph_parse_endpoint(fwnode, &ep);
++ if (ret)
++ break;
++
++ if (ep.port != port)
++ continue;
++ }
++
++ ret = v4l2_async_notifier_fwnode_parse_endpoint(
++ dev, notifier, fwnode, asd_struct_size, parse_endpoint);
++ if (ret < 0)
++ break;
++ }
++
++ fwnode_handle_put(fwnode);
++
++ return ret;
++}
++
++int v4l2_async_notifier_parse_fwnode_endpoints(
++ struct device *dev, struct v4l2_async_notifier *notifier,
++ size_t asd_struct_size,
++ int (*parse_endpoint)(struct device *dev,
++ struct v4l2_fwnode_endpoint *vep,
++ struct v4l2_async_subdev *asd))
++{
++ return __v4l2_async_notifier_parse_fwnode_endpoints(
++ dev, notifier, asd_struct_size, 0, false, parse_endpoint);
++}
++EXPORT_SYMBOL_GPL(v4l2_async_notifier_parse_fwnode_endpoints);
++
++int v4l2_async_notifier_parse_fwnode_endpoints_by_port(
++ struct device *dev, struct v4l2_async_notifier *notifier,
++ size_t asd_struct_size, unsigned int port,
++ int (*parse_endpoint)(struct device *dev,
++ struct v4l2_fwnode_endpoint *vep,
++ struct v4l2_async_subdev *asd))
++{
++ return __v4l2_async_notifier_parse_fwnode_endpoints(
++ dev, notifier, asd_struct_size, port, true, parse_endpoint);
++}
++EXPORT_SYMBOL_GPL(v4l2_async_notifier_parse_fwnode_endpoints_by_port);
++
+ MODULE_LICENSE("GPL");
+ MODULE_AUTHOR("Sakari Ailus <sakari.ailus@linux.intel.com>");
+ MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>");
+diff --git a/include/media/v4l2-async.h b/include/media/v4l2-async.h
+index c69d8c8a66d0..329aeebd1a80 100644
+--- a/include/media/v4l2-async.h
++++ b/include/media/v4l2-async.h
+@@ -18,7 +18,6 @@ struct device;
+ struct device_node;
+ struct v4l2_device;
+ struct v4l2_subdev;
+-struct v4l2_async_notifier;
+
+ /* A random max subdevice number, used to allocate an array on stack */
+ #define V4L2_MAX_SUBDEVS 128U
+@@ -50,6 +49,10 @@ enum v4l2_async_match_type {
+ * @match: union of per-bus type matching data sets
+ * @list: used to link struct v4l2_async_subdev objects, waiting to be
+ * probed, to a notifier->waiting list
++ *
++ * When this struct is used as a member in a driver specific struct,
++ * the driver specific struct shall contain the &struct
++ * v4l2_async_subdev as its first member.
+ */
+ struct v4l2_async_subdev {
+ enum v4l2_async_match_type match_type;
+@@ -78,7 +81,8 @@ struct v4l2_async_subdev {
+ /**
+ * struct v4l2_async_notifier - v4l2_device notifier data
+ *
+- * @num_subdevs: number of subdevices
++ * @num_subdevs: number of subdevices used in the subdevs array
++ * @max_subdevs: number of subdevices allocated in the subdevs array
+ * @subdevs: array of pointers to subdevice descriptors
+ * @v4l2_dev: pointer to struct v4l2_device
+ * @waiting: list of struct v4l2_async_subdev, waiting for their drivers
+@@ -90,6 +94,7 @@ struct v4l2_async_subdev {
+ */
+ struct v4l2_async_notifier {
+ unsigned int num_subdevs;
++ unsigned int max_subdevs;
+ struct v4l2_async_subdev **subdevs;
+ struct v4l2_device *v4l2_dev;
+ struct list_head waiting;
+@@ -120,6 +125,21 @@ int v4l2_async_notifier_register(struct v4l2_device *v4l2_dev,
+ */
+ void v4l2_async_notifier_unregister(struct v4l2_async_notifier *notifier);
+
++/**
++ * v4l2_async_notifier_cleanup - clean up notifier resources
++ * @notifier: the notifier the resources of which are to be cleaned up
++ *
++ * Release memory resources related to a notifier, including the async
++ * sub-devices allocated for the purposes of the notifier but not the notifier
++ * itself. The user is responsible for calling this function to clean up the
++ * notifier after calling @v4l2_async_notifier_parse_fwnode_endpoints.
++ *
++ * There is no harm from calling v4l2_async_notifier_cleanup in other
++ * cases as long as its memory has been zeroed after it has been
++ * allocated.
++ */
++void v4l2_async_notifier_cleanup(struct v4l2_async_notifier *notifier);
++
+ /**
+ * v4l2_async_register_subdev - registers a sub-device to the asynchronous
+ * subdevice framework
+diff --git a/include/media/v4l2-fwnode.h b/include/media/v4l2-fwnode.h
+index 7adec9851d9e..ac605af9b877 100644
+--- a/include/media/v4l2-fwnode.h
++++ b/include/media/v4l2-fwnode.h
+@@ -25,6 +25,8 @@
+ #include <media/v4l2-mediabus.h>
+
+ struct fwnode_handle;
++struct v4l2_async_notifier;
++struct v4l2_async_subdev;
+
+ #define V4L2_FWNODE_CSI2_MAX_DATA_LANES 4
+
+@@ -122,4 +124,120 @@ int v4l2_fwnode_parse_link(struct fwnode_handle *fwnode,
+ struct v4l2_fwnode_link *link);
+ void v4l2_fwnode_put_link(struct v4l2_fwnode_link *link);
+
++/**
++ * v4l2_async_notifier_parse_fwnode_endpoints - Parse V4L2 fwnode endpoints in a
++ * device node
++ * @dev: the device the endpoints of which are to be parsed
++ * @notifier: notifier for @dev
++ * @asd_struct_size: size of the driver's async sub-device struct, including
++ * sizeof(struct v4l2_async_subdev). The &struct
++ * v4l2_async_subdev shall be the first member of
++ * the driver's async sub-device struct, i.e. both
++ * begin at the same memory address.
++ * @parse_endpoint: Driver's callback function called on each V4L2 fwnode
++ * endpoint. Optional.
++ * Return: %0 on success
++ * %-ENOTCONN if the endpoint is to be skipped but this
++ * should not be considered as an error
++ * %-EINVAL if the endpoint configuration is invalid
++ *
++ * Parse the fwnode endpoints of the @dev device and populate the async sub-
++ * devices array of the notifier. The @parse_endpoint callback function is
++ * called for each endpoint with the corresponding async sub-device pointer to
++ * let the caller initialize the driver-specific part of the async sub-device
++ * structure.
++ *
++ * The notifier memory shall be zeroed before this function is called on the
++ * notifier.
++ *
++ * This function may not be called on a registered notifier and may be called on
++ * a notifier only once.
++ *
++ * Do not change the notifier's subdevs array, take references to the subdevs
++ * array itself or change the notifier's num_subdevs field. This is because this
++ * function allocates and reallocates the subdevs array based on parsing
++ * endpoints.
++ *
++ * The &struct v4l2_fwnode_endpoint passed to the callback function
++ * @parse_endpoint is released once the function is finished. If there is a need
++ * to retain that configuration, the user needs to allocate memory for it.
++ *
++ * Any notifier populated using this function must be released with a call to
++ * v4l2_async_notifier_cleanup() after it has been unregistered and the async
++ * sub-devices are no longer in use, even if the function returned an error.
++ *
++ * Return: %0 on success, including when no async sub-devices are found
++ * %-ENOMEM if memory allocation failed
++ * %-EINVAL if graph or endpoint parsing failed
++ * Other error codes as returned by @parse_endpoint
++ */
++int v4l2_async_notifier_parse_fwnode_endpoints(
++ struct device *dev, struct v4l2_async_notifier *notifier,
++ size_t asd_struct_size,
++ int (*parse_endpoint)(struct device *dev,
++ struct v4l2_fwnode_endpoint *vep,
++ struct v4l2_async_subdev *asd));
++
++/**
++ * v4l2_async_notifier_parse_fwnode_endpoints_by_port - Parse V4L2 fwnode
++ * endpoints of a port in a
++ * device node
++ * @dev: the device the endpoints of which are to be parsed
++ * @notifier: notifier for @dev
++ * @asd_struct_size: size of the driver's async sub-device struct, including
++ * sizeof(struct v4l2_async_subdev). The &struct
++ * v4l2_async_subdev shall be the first member of
++ * the driver's async sub-device struct, i.e. both
++ * begin at the same memory address.
++ * @port: port number where endpoints are to be parsed
++ * @parse_endpoint: Driver's callback function called on each V4L2 fwnode
++ * endpoint. Optional.
++ * Return: %0 on success
++ * %-ENOTCONN if the endpoint is to be skipped but this
++ * should not be considered as an error
++ * %-EINVAL if the endpoint configuration is invalid
++ *
++ * This function is just like v4l2_async_notifier_parse_fwnode_endpoints() with
++ * the exception that it only parses endpoints in a given port. This is useful
++ * on devices that have both sinks and sources: the async sub-devices connected
++ * to sources have already been configured by another driver (on capture
++ * devices). In this case the driver must know which ports to parse.
++ *
++ * Parse the fwnode endpoints of the @dev device on a given @port and populate
++ * the async sub-devices array of the notifier. The @parse_endpoint callback
++ * function is called for each endpoint with the corresponding async sub-device
++ * pointer to let the caller initialize the driver-specific part of the async
++ * sub-device structure.
++ *
++ * The notifier memory shall be zeroed before this function is called on the
++ * notifier the first time.
++ *
++ * This function may not be called on a registered notifier and may be called on
++ * a notifier only once per port.
++ *
++ * Do not change the notifier's subdevs array, take references to the subdevs
++ * array itself or change the notifier's num_subdevs field. This is because this
++ * function allocates and reallocates the subdevs array based on parsing
++ * endpoints.
++ *
++ * The &struct v4l2_fwnode_endpoint passed to the callback function
++ * @parse_endpoint is released once the function is finished. If there is a need
++ * to retain that configuration, the user needs to allocate memory for it.
++ *
++ * Any notifier populated using this function must be released with a call to
++ * v4l2_async_notifier_cleanup() after it has been unregistered and the async
++ * sub-devices are no longer in use, even if the function returned an error.
++ *
++ * Return: %0 on success, including when no async sub-devices are found
++ * %-ENOMEM if memory allocation failed
++ * %-EINVAL if graph or endpoint parsing failed
++ * Other error codes as returned by @parse_endpoint
++ */
++int v4l2_async_notifier_parse_fwnode_endpoints_by_port(
++ struct device *dev, struct v4l2_async_notifier *notifier,
++ size_t asd_struct_size, unsigned int port,
++ int (*parse_endpoint)(struct device *dev,
++ struct v4l2_fwnode_endpoint *vep,
++ struct v4l2_async_subdev *asd));
++
+ #endif /* _V4L2_FWNODE_H */
+--
+2.19.0
+
diff --git a/patches/0263-media-rcar-vin-Use-generic-parser-for-parsing-fwnode.patch b/patches/0263-media-rcar-vin-Use-generic-parser-for-parsing-fwnode.patch
new file mode 100644
index 0000000..3560efa
--- /dev/null
+++ b/patches/0263-media-rcar-vin-Use-generic-parser-for-parsing-fwnode.patch
@@ -0,0 +1,372 @@
+From 3122a6041558b46d6fe73d1a71372ea01c03cc92 Mon Sep 17 00:00:00 2001
+From: Sakari Ailus <sakari.ailus@linux.intel.com>
+Date: Fri, 1 Sep 2017 18:41:19 -0400
+Subject: [PATCH 0263/1795] media: rcar-vin: Use generic parser for parsing
+ fwnode endpoints
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Instead of using a custom driver implementation, use
+v4l2_async_notifier_parse_fwnode_endpoints() to parse the fwnode endpoints
+of the device.
+
+Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
+Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
+Acked-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit 85999e8ec0ee7cf1039152b34a3fc3d91e7e27c3)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/media/platform/rcar-vin/rcar-core.c | 107 ++++++--------------
+ drivers/media/platform/rcar-vin/rcar-dma.c | 10 +-
+ drivers/media/platform/rcar-vin/rcar-v4l2.c | 14 +--
+ drivers/media/platform/rcar-vin/rcar-vin.h | 4 +-
+ 4 files changed, 46 insertions(+), 89 deletions(-)
+
+diff --git a/drivers/media/platform/rcar-vin/rcar-core.c b/drivers/media/platform/rcar-vin/rcar-core.c
+index 142de447aaaa..380288658601 100644
+--- a/drivers/media/platform/rcar-vin/rcar-core.c
++++ b/drivers/media/platform/rcar-vin/rcar-core.c
+@@ -21,6 +21,7 @@
+ #include <linux/platform_device.h>
+ #include <linux/pm_runtime.h>
+
++#include <media/v4l2-async.h>
+ #include <media/v4l2-fwnode.h>
+
+ #include "rcar-vin.h"
+@@ -77,14 +78,14 @@ static int rvin_digital_notify_complete(struct v4l2_async_notifier *notifier)
+ int ret;
+
+ /* Verify subdevices mbus format */
+- if (!rvin_mbus_supported(&vin->digital)) {
++ if (!rvin_mbus_supported(vin->digital)) {
+ vin_err(vin, "Unsupported media bus format for %s\n",
+- vin->digital.subdev->name);
++ vin->digital->subdev->name);
+ return -EINVAL;
+ }
+
+ vin_dbg(vin, "Found media bus format for %s: %d\n",
+- vin->digital.subdev->name, vin->digital.code);
++ vin->digital->subdev->name, vin->digital->code);
+
+ ret = v4l2_device_register_subdev_nodes(&vin->v4l2_dev);
+ if (ret < 0) {
+@@ -103,7 +104,7 @@ static void rvin_digital_notify_unbind(struct v4l2_async_notifier *notifier,
+
+ vin_dbg(vin, "unbind digital subdev %s\n", subdev->name);
+ rvin_v4l2_remove(vin);
+- vin->digital.subdev = NULL;
++ vin->digital->subdev = NULL;
+ }
+
+ static int rvin_digital_notify_bound(struct v4l2_async_notifier *notifier,
+@@ -120,117 +121,71 @@ static int rvin_digital_notify_bound(struct v4l2_async_notifier *notifier,
+ ret = rvin_find_pad(subdev, MEDIA_PAD_FL_SOURCE);
+ if (ret < 0)
+ return ret;
+- vin->digital.source_pad = ret;
++ vin->digital->source_pad = ret;
+
+ ret = rvin_find_pad(subdev, MEDIA_PAD_FL_SINK);
+- vin->digital.sink_pad = ret < 0 ? 0 : ret;
++ vin->digital->sink_pad = ret < 0 ? 0 : ret;
+
+- vin->digital.subdev = subdev;
++ vin->digital->subdev = subdev;
+
+ vin_dbg(vin, "bound subdev %s source pad: %u sink pad: %u\n",
+- subdev->name, vin->digital.source_pad,
+- vin->digital.sink_pad);
++ subdev->name, vin->digital->source_pad,
++ vin->digital->sink_pad);
+
+ return 0;
+ }
+
+-static int rvin_digitial_parse_v4l2(struct rvin_dev *vin,
+- struct device_node *ep,
+- struct v4l2_mbus_config *mbus_cfg)
++static int rvin_digital_parse_v4l2(struct device *dev,
++ struct v4l2_fwnode_endpoint *vep,
++ struct v4l2_async_subdev *asd)
+ {
+- struct v4l2_fwnode_endpoint v4l2_ep;
+- int ret;
++ struct rvin_dev *vin = dev_get_drvdata(dev);
++ struct rvin_graph_entity *rvge =
++ container_of(asd, struct rvin_graph_entity, asd);
+
+- ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(ep), &v4l2_ep);
+- if (ret) {
+- vin_err(vin, "Could not parse v4l2 endpoint\n");
+- return -EINVAL;
+- }
++ if (vep->base.port || vep->base.id)
++ return -ENOTCONN;
+
+- mbus_cfg->type = v4l2_ep.bus_type;
++ rvge->mbus_cfg.type = vep->bus_type;
+
+- switch (mbus_cfg->type) {
++ switch (rvge->mbus_cfg.type) {
+ case V4L2_MBUS_PARALLEL:
+ vin_dbg(vin, "Found PARALLEL media bus\n");
+- mbus_cfg->flags = v4l2_ep.bus.parallel.flags;
++ rvge->mbus_cfg.flags = vep->bus.parallel.flags;
+ break;
+ case V4L2_MBUS_BT656:
+ vin_dbg(vin, "Found BT656 media bus\n");
+- mbus_cfg->flags = 0;
++ rvge->mbus_cfg.flags = 0;
+ break;
+ default:
+ vin_err(vin, "Unknown media bus type\n");
+ return -EINVAL;
+ }
+
+- return 0;
+-}
+-
+-static int rvin_digital_graph_parse(struct rvin_dev *vin)
+-{
+- struct device_node *ep, *np;
+- int ret;
+-
+- vin->digital.asd.match.fwnode.fwnode = NULL;
+- vin->digital.subdev = NULL;
+-
+- /*
+- * Port 0 id 0 is local digital input, try to get it.
+- * Not all instances can or will have this, that is OK
+- */
+- ep = of_graph_get_endpoint_by_regs(vin->dev->of_node, 0, 0);
+- if (!ep)
+- return 0;
+-
+- np = of_graph_get_remote_port_parent(ep);
+- if (!np) {
+- vin_err(vin, "No remote parent for digital input\n");
+- of_node_put(ep);
+- return -EINVAL;
+- }
+- of_node_put(np);
+-
+- ret = rvin_digitial_parse_v4l2(vin, ep, &vin->digital.mbus_cfg);
+- of_node_put(ep);
+- if (ret)
+- return ret;
+-
+- vin->digital.asd.match.fwnode.fwnode = of_fwnode_handle(np);
+- vin->digital.asd.match_type = V4L2_ASYNC_MATCH_FWNODE;
++ vin->digital = rvge;
+
+ return 0;
+ }
+
+ static int rvin_digital_graph_init(struct rvin_dev *vin)
+ {
+- struct v4l2_async_subdev **subdevs = NULL;
+ int ret;
+
+- ret = rvin_digital_graph_parse(vin);
++ ret = v4l2_async_notifier_parse_fwnode_endpoints(
++ vin->dev, &vin->notifier,
++ sizeof(struct rvin_graph_entity), rvin_digital_parse_v4l2);
+ if (ret)
+ return ret;
+
+- if (!vin->digital.asd.match.fwnode.fwnode) {
+- vin_dbg(vin, "No digital subdevice found\n");
++ if (!vin->digital)
+ return -ENODEV;
+- }
+-
+- /* Register the subdevices notifier. */
+- subdevs = devm_kzalloc(vin->dev, sizeof(*subdevs), GFP_KERNEL);
+- if (subdevs == NULL)
+- return -ENOMEM;
+-
+- subdevs[0] = &vin->digital.asd;
+
+ vin_dbg(vin, "Found digital subdevice %pOF\n",
+- to_of_node(subdevs[0]->match.fwnode.fwnode));
++ to_of_node(vin->digital->asd.match.fwnode.fwnode));
+
+- vin->notifier.num_subdevs = 1;
+- vin->notifier.subdevs = subdevs;
+ vin->notifier.bound = rvin_digital_notify_bound;
+ vin->notifier.unbind = rvin_digital_notify_unbind;
+ vin->notifier.complete = rvin_digital_notify_complete;
+-
+ ret = v4l2_async_notifier_register(&vin->v4l2_dev, &vin->notifier);
+ if (ret < 0) {
+ vin_err(vin, "Notifier registration failed\n");
+@@ -290,6 +245,8 @@ static int rcar_vin_probe(struct platform_device *pdev)
+ if (ret)
+ return ret;
+
++ platform_set_drvdata(pdev, vin);
++
+ ret = rvin_digital_graph_init(vin);
+ if (ret < 0)
+ goto error;
+@@ -297,11 +254,10 @@ static int rcar_vin_probe(struct platform_device *pdev)
+ pm_suspend_ignore_children(&pdev->dev, true);
+ pm_runtime_enable(&pdev->dev);
+
+- platform_set_drvdata(pdev, vin);
+-
+ return 0;
+ error:
+ rvin_dma_remove(vin);
++ v4l2_async_notifier_cleanup(&vin->notifier);
+
+ return ret;
+ }
+@@ -313,6 +269,7 @@ static int rcar_vin_remove(struct platform_device *pdev)
+ pm_runtime_disable(&pdev->dev);
+
+ v4l2_async_notifier_unregister(&vin->notifier);
++ v4l2_async_notifier_cleanup(&vin->notifier);
+
+ rvin_dma_remove(vin);
+
+diff --git a/drivers/media/platform/rcar-vin/rcar-dma.c b/drivers/media/platform/rcar-vin/rcar-dma.c
+index b136844499f6..23fdff7a7370 100644
+--- a/drivers/media/platform/rcar-vin/rcar-dma.c
++++ b/drivers/media/platform/rcar-vin/rcar-dma.c
+@@ -183,7 +183,7 @@ static int rvin_setup(struct rvin_dev *vin)
+ /*
+ * Input interface
+ */
+- switch (vin->digital.code) {
++ switch (vin->digital->code) {
+ case MEDIA_BUS_FMT_YUYV8_1X16:
+ /* BT.601/BT.1358 16bit YCbCr422 */
+ vnmc |= VNMC_INF_YUV16;
+@@ -191,7 +191,7 @@ static int rvin_setup(struct rvin_dev *vin)
+ break;
+ case MEDIA_BUS_FMT_UYVY8_2X8:
+ /* BT.656 8bit YCbCr422 or BT.601 8bit YCbCr422 */
+- vnmc |= vin->digital.mbus_cfg.type == V4L2_MBUS_BT656 ?
++ vnmc |= vin->digital->mbus_cfg.type == V4L2_MBUS_BT656 ?
+ VNMC_INF_YUV8_BT656 : VNMC_INF_YUV8_BT601;
+ input_is_yuv = true;
+ break;
+@@ -200,7 +200,7 @@ static int rvin_setup(struct rvin_dev *vin)
+ break;
+ case MEDIA_BUS_FMT_UYVY10_2X10:
+ /* BT.656 10bit YCbCr422 or BT.601 10bit YCbCr422 */
+- vnmc |= vin->digital.mbus_cfg.type == V4L2_MBUS_BT656 ?
++ vnmc |= vin->digital->mbus_cfg.type == V4L2_MBUS_BT656 ?
+ VNMC_INF_YUV10_BT656 : VNMC_INF_YUV10_BT601;
+ input_is_yuv = true;
+ break;
+@@ -212,11 +212,11 @@ static int rvin_setup(struct rvin_dev *vin)
+ dmr2 = VNDMR2_FTEV | VNDMR2_VLV(1);
+
+ /* Hsync Signal Polarity Select */
+- if (!(vin->digital.mbus_cfg.flags & V4L2_MBUS_HSYNC_ACTIVE_LOW))
++ if (!(vin->digital->mbus_cfg.flags & V4L2_MBUS_HSYNC_ACTIVE_LOW))
+ dmr2 |= VNDMR2_HPS;
+
+ /* Vsync Signal Polarity Select */
+- if (!(vin->digital.mbus_cfg.flags & V4L2_MBUS_VSYNC_ACTIVE_LOW))
++ if (!(vin->digital->mbus_cfg.flags & V4L2_MBUS_VSYNC_ACTIVE_LOW))
+ dmr2 |= VNDMR2_VPS;
+
+ /*
+diff --git a/drivers/media/platform/rcar-vin/rcar-v4l2.c b/drivers/media/platform/rcar-vin/rcar-v4l2.c
+index dd37ea811680..b479b882da12 100644
+--- a/drivers/media/platform/rcar-vin/rcar-v4l2.c
++++ b/drivers/media/platform/rcar-vin/rcar-v4l2.c
+@@ -111,7 +111,7 @@ static int rvin_reset_format(struct rvin_dev *vin)
+ struct v4l2_mbus_framefmt *mf = &fmt.format;
+ int ret;
+
+- fmt.pad = vin->digital.source_pad;
++ fmt.pad = vin->digital->source_pad;
+
+ ret = v4l2_subdev_call(vin_to_source(vin), pad, get_fmt, NULL, &fmt);
+ if (ret)
+@@ -172,13 +172,13 @@ static int __rvin_try_format_source(struct rvin_dev *vin,
+
+ sd = vin_to_source(vin);
+
+- v4l2_fill_mbus_format(&format.format, pix, vin->digital.code);
++ v4l2_fill_mbus_format(&format.format, pix, vin->digital->code);
+
+ pad_cfg = v4l2_subdev_alloc_pad_config(sd);
+ if (pad_cfg == NULL)
+ return -ENOMEM;
+
+- format.pad = vin->digital.source_pad;
++ format.pad = vin->digital->source_pad;
+
+ field = pix->field;
+
+@@ -555,7 +555,7 @@ static int rvin_enum_dv_timings(struct file *file, void *priv_fh,
+ if (timings->pad)
+ return -EINVAL;
+
+- timings->pad = vin->digital.sink_pad;
++ timings->pad = vin->digital->sink_pad;
+
+ ret = v4l2_subdev_call(sd, pad, enum_dv_timings, timings);
+
+@@ -607,7 +607,7 @@ static int rvin_dv_timings_cap(struct file *file, void *priv_fh,
+ if (cap->pad)
+ return -EINVAL;
+
+- cap->pad = vin->digital.sink_pad;
++ cap->pad = vin->digital->sink_pad;
+
+ ret = v4l2_subdev_call(sd, pad, dv_timings_cap, cap);
+
+@@ -625,7 +625,7 @@ static int rvin_g_edid(struct file *file, void *fh, struct v4l2_edid *edid)
+ if (edid->pad)
+ return -EINVAL;
+
+- edid->pad = vin->digital.sink_pad;
++ edid->pad = vin->digital->sink_pad;
+
+ ret = v4l2_subdev_call(sd, pad, get_edid, edid);
+
+@@ -643,7 +643,7 @@ static int rvin_s_edid(struct file *file, void *fh, struct v4l2_edid *edid)
+ if (edid->pad)
+ return -EINVAL;
+
+- edid->pad = vin->digital.sink_pad;
++ edid->pad = vin->digital->sink_pad;
+
+ ret = v4l2_subdev_call(sd, pad, set_edid, edid);
+
+diff --git a/drivers/media/platform/rcar-vin/rcar-vin.h b/drivers/media/platform/rcar-vin/rcar-vin.h
+index 9bfb5a7c4dc4..5382078143fb 100644
+--- a/drivers/media/platform/rcar-vin/rcar-vin.h
++++ b/drivers/media/platform/rcar-vin/rcar-vin.h
+@@ -126,7 +126,7 @@ struct rvin_dev {
+ struct v4l2_device v4l2_dev;
+ struct v4l2_ctrl_handler ctrl_handler;
+ struct v4l2_async_notifier notifier;
+- struct rvin_graph_entity digital;
++ struct rvin_graph_entity *digital;
+
+ struct mutex lock;
+ struct vb2_queue queue;
+@@ -145,7 +145,7 @@ struct rvin_dev {
+ struct v4l2_rect compose;
+ };
+
+-#define vin_to_source(vin) vin->digital.subdev
++#define vin_to_source(vin) ((vin)->digital->subdev)
+
+ /* Debug */
+ #define vin_dbg(d, fmt, arg...) dev_dbg(d->dev, fmt, ##arg)
+--
+2.19.0
+
diff --git a/patches/0264-of-pci-Add-of_pci_dma_range_parser_init-for-dma-rang.patch b/patches/0264-of-pci-Add-of_pci_dma_range_parser_init-for-dma-rang.patch
new file mode 100644
index 0000000..b856199
--- /dev/null
+++ b/patches/0264-of-pci-Add-of_pci_dma_range_parser_init-for-dma-rang.patch
@@ -0,0 +1,100 @@
+From d55ac622b9edc3f20ab6addaaafc8b86a6cd73b3 Mon Sep 17 00:00:00 2001
+From: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
+Date: Tue, 26 Sep 2017 12:22:54 +0200
+Subject: [PATCH 0264/1795] of/pci: Add of_pci_dma_range_parser_init() for
+ dma-ranges parsing support
+
+Several host bridge drivers duplicate of_pci_range_parser_init() in order
+to parse their dma-ranges property.
+
+Provide of_pci_dma_range_parser_init() for that use case.
+
+Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Reviewed-by: Rob Herring <robh@kernel.org>
+Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit a060c2104ef83e62346b7e893947a940471c0d7c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/of/address.c | 19 ++++++++++++++++---
+ include/linux/of_address.h | 10 +++++++++-
+ 2 files changed, 25 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/of/address.c b/drivers/of/address.c
+index 792722e7d458..fa6cabfc3cb9 100644
+--- a/drivers/of/address.c
++++ b/drivers/of/address.c
+@@ -232,8 +232,8 @@ int of_pci_address_to_resource(struct device_node *dev, int bar,
+ }
+ EXPORT_SYMBOL_GPL(of_pci_address_to_resource);
+
+-int of_pci_range_parser_init(struct of_pci_range_parser *parser,
+- struct device_node *node)
++static int parser_init(struct of_pci_range_parser *parser,
++ struct device_node *node, const char *name)
+ {
+ const int na = 3, ns = 2;
+ int rlen;
+@@ -242,7 +242,7 @@ int of_pci_range_parser_init(struct of_pci_range_parser *parser,
+ parser->pna = of_n_addr_cells(node);
+ parser->np = parser->pna + na + ns;
+
+- parser->range = of_get_property(node, "ranges", &rlen);
++ parser->range = of_get_property(node, name, &rlen);
+ if (parser->range == NULL)
+ return -ENOENT;
+
+@@ -250,8 +250,21 @@ int of_pci_range_parser_init(struct of_pci_range_parser *parser,
+
+ return 0;
+ }
++
++int of_pci_range_parser_init(struct of_pci_range_parser *parser,
++ struct device_node *node)
++{
++ return parser_init(parser, node, "ranges");
++}
+ EXPORT_SYMBOL_GPL(of_pci_range_parser_init);
+
++int of_pci_dma_range_parser_init(struct of_pci_range_parser *parser,
++ struct device_node *node)
++{
++ return parser_init(parser, node, "dma-ranges");
++}
++EXPORT_SYMBOL_GPL(of_pci_dma_range_parser_init);
++
+ struct of_pci_range *of_pci_range_parser_one(struct of_pci_range_parser *parser,
+ struct of_pci_range *range)
+ {
+diff --git a/include/linux/of_address.h b/include/linux/of_address.h
+index b8ac44c9748e..30e40fb6936b 100644
+--- a/include/linux/of_address.h
++++ b/include/linux/of_address.h
+@@ -50,6 +50,8 @@ extern const __be32 *of_get_address(struct device_node *dev, int index,
+
+ extern int of_pci_range_parser_init(struct of_pci_range_parser *parser,
+ struct device_node *node);
++extern int of_pci_dma_range_parser_init(struct of_pci_range_parser *parser,
++ struct device_node *node);
+ extern struct of_pci_range *of_pci_range_parser_one(
+ struct of_pci_range_parser *parser,
+ struct of_pci_range *range);
+@@ -86,7 +88,13 @@ static inline const __be32 *of_get_address(struct device_node *dev, int index,
+ static inline int of_pci_range_parser_init(struct of_pci_range_parser *parser,
+ struct device_node *node)
+ {
+- return -1;
++ return -ENOSYS;
++}
++
++static inline int of_pci_dma_range_parser_init(struct of_pci_range_parser *parser,
++ struct device_node *node)
++{
++ return -ENOSYS;
+ }
+
+ static inline struct of_pci_range *of_pci_range_parser_one(
+--
+2.19.0
+
diff --git a/patches/0265-PCI-Use-of_pci_dma_range_parser_init-to-reduce-dupli.patch b/patches/0265-PCI-Use-of_pci_dma_range_parser_init-to-reduce-dupli.patch
new file mode 100644
index 0000000..d726f5a
--- /dev/null
+++ b/patches/0265-PCI-Use-of_pci_dma_range_parser_init-to-reduce-dupli.patch
@@ -0,0 +1,215 @@
+From 6b78052b0e747d5eb1d769f5e8d91bb32a9a9477 Mon Sep 17 00:00:00 2001
+From: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
+Date: Tue, 26 Sep 2017 12:26:55 +0200
+Subject: [PATCH 0265/1795] PCI: Use of_pci_dma_range_parser_init() to reduce
+ duplication
+
+Use the new of_pci_dma_range_parser_init() to reduce code duplication.
+
+Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Acked-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit 1e61a57cac560844580ab532a4e2f5061ef77039)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pci/host/pci-ftpci100.c | 20 +-------------------
+ drivers/pci/host/pci-rcar-gen2.c | 20 +-------------------
+ drivers/pci/host/pci-xgene.c | 20 +-------------------
+ drivers/pci/host/pcie-iproc.c | 20 +-------------------
+ drivers/pci/host/pcie-rcar.c | 20 +-------------------
+ 5 files changed, 5 insertions(+), 95 deletions(-)
+
+diff --git a/drivers/pci/host/pci-ftpci100.c b/drivers/pci/host/pci-ftpci100.c
+index 4e6b21931514..a3d60860c088 100644
+--- a/drivers/pci/host/pci-ftpci100.c
++++ b/drivers/pci/host/pci-ftpci100.c
+@@ -373,24 +373,6 @@ static int faraday_pci_setup_cascaded_irq(struct faraday_pci *p)
+ return 0;
+ }
+
+-static int pci_dma_range_parser_init(struct of_pci_range_parser *parser,
+- struct device_node *node)
+-{
+- const int na = 3, ns = 2;
+- int rlen;
+-
+- parser->node = node;
+- parser->pna = of_n_addr_cells(node);
+- parser->np = parser->pna + na + ns;
+-
+- parser->range = of_get_property(node, "dma-ranges", &rlen);
+- if (!parser->range)
+- return -ENOENT;
+- parser->end = parser->range + rlen / sizeof(__be32);
+-
+- return 0;
+-}
+-
+ static int faraday_pci_parse_map_dma_ranges(struct faraday_pci *p,
+ struct device_node *np)
+ {
+@@ -405,7 +387,7 @@ static int faraday_pci_parse_map_dma_ranges(struct faraday_pci *p,
+ int i = 0;
+ u32 val;
+
+- if (pci_dma_range_parser_init(&parser, np)) {
++ if (of_pci_dma_range_parser_init(&parser, np)) {
+ dev_err(dev, "missing dma-ranges property\n");
+ return -EINVAL;
+ }
+diff --git a/drivers/pci/host/pci-rcar-gen2.c b/drivers/pci/host/pci-rcar-gen2.c
+index 6f879685fedd..e46de69f0380 100644
+--- a/drivers/pci/host/pci-rcar-gen2.c
++++ b/drivers/pci/host/pci-rcar-gen2.c
+@@ -293,24 +293,6 @@ static struct pci_ops rcar_pci_ops = {
+ .write = pci_generic_config_write,
+ };
+
+-static int pci_dma_range_parser_init(struct of_pci_range_parser *parser,
+- struct device_node *node)
+-{
+- const int na = 3, ns = 2;
+- int rlen;
+-
+- parser->node = node;
+- parser->pna = of_n_addr_cells(node);
+- parser->np = parser->pna + na + ns;
+-
+- parser->range = of_get_property(node, "dma-ranges", &rlen);
+- if (!parser->range)
+- return -ENOENT;
+-
+- parser->end = parser->range + rlen / sizeof(__be32);
+- return 0;
+-}
+-
+ static int rcar_pci_parse_map_dma_ranges(struct rcar_pci_priv *pci,
+ struct device_node *np)
+ {
+@@ -320,7 +302,7 @@ static int rcar_pci_parse_map_dma_ranges(struct rcar_pci_priv *pci,
+ int index = 0;
+
+ /* Failure to parse is ok as we fall back to defaults */
+- if (pci_dma_range_parser_init(&parser, np))
++ if (of_pci_dma_range_parser_init(&parser, np))
+ return 0;
+
+ /* Get the dma-ranges from DT */
+diff --git a/drivers/pci/host/pci-xgene.c b/drivers/pci/host/pci-xgene.c
+index c78fd9c2cf8c..0860f30674a8 100644
+--- a/drivers/pci/host/pci-xgene.c
++++ b/drivers/pci/host/pci-xgene.c
+@@ -542,24 +542,6 @@ static void xgene_pcie_setup_ib_reg(struct xgene_pcie_port *port,
+ xgene_pcie_setup_pims(port, pim_reg, pci_addr, ~(size - 1));
+ }
+
+-static int pci_dma_range_parser_init(struct of_pci_range_parser *parser,
+- struct device_node *node)
+-{
+- const int na = 3, ns = 2;
+- int rlen;
+-
+- parser->node = node;
+- parser->pna = of_n_addr_cells(node);
+- parser->np = parser->pna + na + ns;
+-
+- parser->range = of_get_property(node, "dma-ranges", &rlen);
+- if (!parser->range)
+- return -ENOENT;
+- parser->end = parser->range + rlen / sizeof(__be32);
+-
+- return 0;
+-}
+-
+ static int xgene_pcie_parse_map_dma_ranges(struct xgene_pcie_port *port)
+ {
+ struct device_node *np = port->node;
+@@ -568,7 +550,7 @@ static int xgene_pcie_parse_map_dma_ranges(struct xgene_pcie_port *port)
+ struct device *dev = port->dev;
+ u8 ib_reg_mask = 0;
+
+- if (pci_dma_range_parser_init(&parser, np)) {
++ if (of_pci_dma_range_parser_init(&parser, np)) {
+ dev_err(dev, "missing dma-ranges property\n");
+ return -EINVAL;
+ }
+diff --git a/drivers/pci/host/pcie-iproc.c b/drivers/pci/host/pcie-iproc.c
+index c0ecc9f35667..75836067f538 100644
+--- a/drivers/pci/host/pcie-iproc.c
++++ b/drivers/pci/host/pcie-iproc.c
+@@ -1097,24 +1097,6 @@ static int iproc_pcie_setup_ib(struct iproc_pcie *pcie,
+ return ret;
+ }
+
+-static int pci_dma_range_parser_init(struct of_pci_range_parser *parser,
+- struct device_node *node)
+-{
+- const int na = 3, ns = 2;
+- int rlen;
+-
+- parser->node = node;
+- parser->pna = of_n_addr_cells(node);
+- parser->np = parser->pna + na + ns;
+-
+- parser->range = of_get_property(node, "dma-ranges", &rlen);
+- if (!parser->range)
+- return -ENOENT;
+-
+- parser->end = parser->range + rlen / sizeof(__be32);
+- return 0;
+-}
+-
+ static int iproc_pcie_map_dma_ranges(struct iproc_pcie *pcie)
+ {
+ struct of_pci_range range;
+@@ -1122,7 +1104,7 @@ static int iproc_pcie_map_dma_ranges(struct iproc_pcie *pcie)
+ int ret;
+
+ /* Get the dma-ranges from DT */
+- ret = pci_dma_range_parser_init(&parser, pcie->dev->of_node);
++ ret = of_pci_dma_range_parser_init(&parser, pcie->dev->of_node);
+ if (ret)
+ return ret;
+
+diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
+index 41edce16a07c..bab9f24ae70b 100644
+--- a/drivers/pci/host/pcie-rcar.c
++++ b/drivers/pci/host/pcie-rcar.c
+@@ -1027,24 +1027,6 @@ static int rcar_pcie_inbound_ranges(struct rcar_pcie *pcie,
+ return 0;
+ }
+
+-static int pci_dma_range_parser_init(struct of_pci_range_parser *parser,
+- struct device_node *node)
+-{
+- const int na = 3, ns = 2;
+- int rlen;
+-
+- parser->node = node;
+- parser->pna = of_n_addr_cells(node);
+- parser->np = parser->pna + na + ns;
+-
+- parser->range = of_get_property(node, "dma-ranges", &rlen);
+- if (!parser->range)
+- return -ENOENT;
+-
+- parser->end = parser->range + rlen / sizeof(__be32);
+- return 0;
+-}
+-
+ static int rcar_pcie_parse_map_dma_ranges(struct rcar_pcie *pcie,
+ struct device_node *np)
+ {
+@@ -1053,7 +1035,7 @@ static int rcar_pcie_parse_map_dma_ranges(struct rcar_pcie *pcie,
+ int index = 0;
+ int err;
+
+- if (pci_dma_range_parser_init(&parser, np))
++ if (of_pci_dma_range_parser_init(&parser, np))
+ return -EINVAL;
+
+ /* Get the dma-ranges from DT */
+--
+2.19.0
+
diff --git a/patches/0266-dt-bindings-PCI-rcar-Correct-example-to-match-realit.patch b/patches/0266-dt-bindings-PCI-rcar-Correct-example-to-match-realit.patch
new file mode 100644
index 0000000..e7dff3c
--- /dev/null
+++ b/patches/0266-dt-bindings-PCI-rcar-Correct-example-to-match-realit.patch
@@ -0,0 +1,55 @@
+From 5a05f3348a284fa95ac9c2dc1e4d423ebd9297d8 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 11 Oct 2017 15:50:13 +0200
+Subject: [PATCH 0266/1795] dt-bindings: PCI: rcar: Correct example to match
+ reality
+
+Correct the USB subnodes in the example, as in f7d569c1e6a6 ("ARM: dts:
+r8a779x: Fix PCI bus dtc warnings").
+ 1. Drop the bogus 'device_type = "pci"' properties,
+ 2. Correct the unit addresses.
+
+Update other bits in the example to match real use:
+ 1. Rename the USB subnodes from "pci" to "usb",
+ 2. Update the "phys" property.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Acked-by: Rob Herring <robh@kernel.org>
+(cherry picked from commit f6755643d62e14c55c2f864a7995fd8001ae3f51)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ .../devicetree/bindings/pci/pci-rcar-gen2.txt | 10 ++++------
+ 1 file changed, 4 insertions(+), 6 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt b/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt
+index 3d038638612b..9fe7e12a7bf3 100644
+--- a/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt
++++ b/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt
+@@ -60,17 +60,15 @@ Example SoC configuration:
+ 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>;
+
+- pci@0,1 {
++ usb@1,0 {
+ reg = <0x800 0 0 0 0>;
+- device_type = "pci";
+- phys = <&usbphy 0 0>;
++ phys = <&usb0 0>;
+ phy-names = "usb";
+ };
+
+- pci@0,2 {
++ usb@2,0 {
+ reg = <0x1000 0 0 0 0>;
+- device_type = "pci";
+- phys = <&usbphy 0 0>;
++ phys = <&usb0 0>;
+ phy-names = "usb";
+ };
+ };
+--
+2.19.0
+
diff --git a/patches/0267-dt-bindings-clock-Add-R8A77970-CPG-core-clock-defini.patch b/patches/0267-dt-bindings-clock-Add-R8A77970-CPG-core-clock-defini.patch
new file mode 100644
index 0000000..09d3ca9
--- /dev/null
+++ b/patches/0267-dt-bindings-clock-Add-R8A77970-CPG-core-clock-defini.patch
@@ -0,0 +1,81 @@
+From fae1c8b8d88c761f2a7111b6f68a721d3414e4ee Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sat, 9 Sep 2017 00:34:19 +0300
+Subject: [PATCH 0267/1795] dt-bindings: clock: Add R8A77970 CPG core clock
+ definitions
+
+Add macros usable by the device tree sources to reference the R8A77970
+CPG core clocks by index. The data come from the table 8.2c of R-Car
+Series, 3rd Generation User's Manual: Hardware (Rev. 0.55, Jun. 30, 2017).
+
+Based on the original (and large) patch by Daisuke Matsushita
+<daisuke.matsushita.ns@hitachi.com>.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit ecadea00f588d7047572a878072c766c75725d1f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ include/dt-bindings/clock/r8a77970-cpg-mssr.h | 48 +++++++++++++++++++
+ 1 file changed, 48 insertions(+)
+ create mode 100644 include/dt-bindings/clock/r8a77970-cpg-mssr.h
+
+diff --git a/include/dt-bindings/clock/r8a77970-cpg-mssr.h b/include/dt-bindings/clock/r8a77970-cpg-mssr.h
+new file mode 100644
+index 000000000000..4146395595b1
+--- /dev/null
++++ b/include/dt-bindings/clock/r8a77970-cpg-mssr.h
+@@ -0,0 +1,48 @@
++/*
++ * Copyright (C) 2016 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++#ifndef __DT_BINDINGS_CLOCK_R8A77970_CPG_MSSR_H__
++#define __DT_BINDINGS_CLOCK_R8A77970_CPG_MSSR_H__
++
++#include <dt-bindings/clock/renesas-cpg-mssr.h>
++
++/* r8a77970 CPG Core Clocks */
++#define R8A77970_CLK_Z2 0
++#define R8A77970_CLK_ZR 1
++#define R8A77970_CLK_ZTR 2
++#define R8A77970_CLK_ZTRD2 3
++#define R8A77970_CLK_ZT 4
++#define R8A77970_CLK_ZX 5
++#define R8A77970_CLK_S1D1 6
++#define R8A77970_CLK_S1D2 7
++#define R8A77970_CLK_S1D4 8
++#define R8A77970_CLK_S2D1 9
++#define R8A77970_CLK_S2D2 10
++#define R8A77970_CLK_S2D4 11
++#define R8A77970_CLK_LB 12
++#define R8A77970_CLK_CL 13
++#define R8A77970_CLK_ZB3 14
++#define R8A77970_CLK_ZB3D2 15
++#define R8A77970_CLK_DDR 16
++#define R8A77970_CLK_CR 17
++#define R8A77970_CLK_CRD2 18
++#define R8A77970_CLK_SD0H 19
++#define R8A77970_CLK_SD0 20
++#define R8A77970_CLK_RPC 21
++#define R8A77970_CLK_RPCD2 22
++#define R8A77970_CLK_MSO 23
++#define R8A77970_CLK_CANFD 24
++#define R8A77970_CLK_CSI0 25
++#define R8A77970_CLK_FRAY 26
++#define R8A77970_CLK_CP 27
++#define R8A77970_CLK_CPEX 28
++#define R8A77970_CLK_R 29
++#define R8A77970_CLK_OSC 30
++
++#endif /* __DT_BINDINGS_CLOCK_R8A77970_CPG_MSSR_H__ */
+--
+2.19.0
+
diff --git a/patches/0268-clk-renesas-cpg-mssr-Add-R8A77970-support.patch b/patches/0268-clk-renesas-cpg-mssr-Add-R8A77970-support.patch
new file mode 100644
index 0000000..b69f682
--- /dev/null
+++ b/patches/0268-clk-renesas-cpg-mssr-Add-R8A77970-support.patch
@@ -0,0 +1,323 @@
+From b0872681f0f04ffc998ca964bcf93123fbd8c866 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sat, 9 Sep 2017 00:34:20 +0300
+Subject: [PATCH 0268/1795] clk: renesas: cpg-mssr: Add R8A77970 support
+
+Add R-Car V3M (R8A77970) Clock Pulse Generator / Module Standby and
+Software Reset support, using the CPG/MSSR driver core and the common
+R-Car Gen3 code.
+
+Based on the original (and large) patch by Daisuke Matsushita
+<daisuke.matsushita.ns@hitachi.com>.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 8d46e28fb5081b49c5b24c814ad464fb99359d58)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ .../bindings/clock/renesas,cpg-mssr.txt | 5 +-
+ drivers/clk/renesas/Kconfig | 5 +
+ drivers/clk/renesas/Makefile | 1 +
+ drivers/clk/renesas/r8a77970-cpg-mssr.c | 199 ++++++++++++++++++
+ drivers/clk/renesas/renesas-cpg-mssr.c | 6 +
+ drivers/clk/renesas/renesas-cpg-mssr.h | 1 +
+ 6 files changed, 215 insertions(+), 2 deletions(-)
+ create mode 100644 drivers/clk/renesas/r8a77970-cpg-mssr.c
+
+diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
+index 316e13686568..f1890d0777a6 100644
+--- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
++++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
+@@ -22,6 +22,7 @@ Required Properties:
+ - "renesas,r8a7794-cpg-mssr" for the r8a7794 SoC (R-Car E2)
+ - "renesas,r8a7795-cpg-mssr" for the r8a7795 SoC (R-Car H3)
+ - "renesas,r8a7796-cpg-mssr" for the r8a7796 SoC (R-Car M3-W)
++ - "renesas,r8a77970-cpg-mssr" for the r8a77970 SoC (R-Car V3M)
+ - "renesas,r8a77995-cpg-mssr" for the r8a77995 SoC (R-Car D3)
+
+ - reg: Base address and length of the memory resource used by the CPG/MSSR
+@@ -31,8 +32,8 @@ Required Properties:
+ clock-names
+ - clock-names: List of external parent clock names. Valid names are:
+ - "extal" (r8a7743, r8a7745, r8a7790, r8a7791, r8a7792, r8a7793, r8a7794,
+- r8a7795, r8a7796, r8a77995)
+- - "extalr" (r8a7795, r8a7796)
++ r8a7795, r8a7796, r8a77970, r8a77995)
++ - "extalr" (r8a7795, r8a7796, r8a77970)
+ - "usb_extal" (r8a7743, r8a7745, r8a7790, r8a7791, r8a7793, r8a7794)
+
+ - #clock-cells: Must be 2
+diff --git a/drivers/clk/renesas/Kconfig b/drivers/clk/renesas/Kconfig
+index acbb38151ba1..43b5a89c4b28 100644
+--- a/drivers/clk/renesas/Kconfig
++++ b/drivers/clk/renesas/Kconfig
+@@ -15,6 +15,7 @@ config CLK_RENESAS
+ select CLK_R8A7794 if ARCH_R8A7794
+ select CLK_R8A7795 if ARCH_R8A7795
+ select CLK_R8A7796 if ARCH_R8A7796
++ select CLK_R8A77970 if ARCH_R8A77970
+ select CLK_R8A77995 if ARCH_R8A77995
+ select CLK_SH73A0 if ARCH_SH73A0
+
+@@ -95,6 +96,10 @@ config CLK_R8A7796
+ bool "R-Car M3-W clock support" if COMPILE_TEST
+ select CLK_RCAR_GEN3_CPG
+
++config CLK_R8A77970
++ bool "R-Car V3M clock support" if COMPILE_TEST
++ select CLK_RCAR_GEN3_CPG
++
+ config CLK_R8A77995
+ bool "R-Car D3 clock support" if COMPILE_TEST
+ select CLK_RCAR_GEN3_CPG
+diff --git a/drivers/clk/renesas/Makefile b/drivers/clk/renesas/Makefile
+index cbbb081e2145..34c4e0b37afa 100644
+--- a/drivers/clk/renesas/Makefile
++++ b/drivers/clk/renesas/Makefile
+@@ -14,6 +14,7 @@ obj-$(CONFIG_CLK_R8A7792) += r8a7792-cpg-mssr.o
+ obj-$(CONFIG_CLK_R8A7794) += r8a7794-cpg-mssr.o
+ obj-$(CONFIG_CLK_R8A7795) += r8a7795-cpg-mssr.o
+ obj-$(CONFIG_CLK_R8A7796) += r8a7796-cpg-mssr.o
++obj-$(CONFIG_CLK_R8A77970) += r8a77970-cpg-mssr.o
+ obj-$(CONFIG_CLK_R8A77995) += r8a77995-cpg-mssr.o
+ obj-$(CONFIG_CLK_SH73A0) += clk-sh73a0.o
+
+diff --git a/drivers/clk/renesas/r8a77970-cpg-mssr.c b/drivers/clk/renesas/r8a77970-cpg-mssr.c
+new file mode 100644
+index 000000000000..72f98527473a
+--- /dev/null
++++ b/drivers/clk/renesas/r8a77970-cpg-mssr.c
+@@ -0,0 +1,199 @@
++/*
++ * r8a77970 Clock Pulse Generator / Module Standby and Software Reset
++ *
++ * Copyright (C) 2017 Cogent Embedded Inc.
++ *
++ * Based on r8a7795-cpg-mssr.c
++ *
++ * Copyright (C) 2015 Glider bvba
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; version 2 of the License.
++ */
++
++#include <linux/device.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/soc/renesas/rcar-rst.h>
++
++#include <dt-bindings/clock/r8a77970-cpg-mssr.h>
++
++#include "renesas-cpg-mssr.h"
++#include "rcar-gen3-cpg.h"
++
++enum clk_ids {
++ /* Core Clock Outputs exported to DT */
++ LAST_DT_CORE_CLK = R8A77970_CLK_OSC,
++
++ /* External Input Clocks */
++ CLK_EXTAL,
++ CLK_EXTALR,
++
++ /* Internal Core Clocks */
++ CLK_MAIN,
++ CLK_PLL0,
++ CLK_PLL1,
++ CLK_PLL3,
++ CLK_PLL1_DIV2,
++ CLK_PLL1_DIV4,
++
++ /* Module Clocks */
++ MOD_CLK_BASE
++};
++
++static const struct cpg_core_clk r8a77970_core_clks[] __initconst = {
++ /* External Clock Inputs */
++ DEF_INPUT("extal", CLK_EXTAL),
++ DEF_INPUT("extalr", CLK_EXTALR),
++
++ /* Internal Core Clocks */
++ DEF_BASE(".main", CLK_MAIN, CLK_TYPE_GEN3_MAIN, CLK_EXTAL),
++ DEF_BASE(".pll0", CLK_PLL0, CLK_TYPE_GEN3_PLL0, CLK_MAIN),
++ DEF_BASE(".pll1", CLK_PLL1, CLK_TYPE_GEN3_PLL1, CLK_MAIN),
++ DEF_BASE(".pll3", CLK_PLL3, CLK_TYPE_GEN3_PLL3, CLK_MAIN),
++
++ DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
++ DEF_FIXED(".pll1_div4", CLK_PLL1_DIV4, CLK_PLL1_DIV2, 2, 1),
++
++ /* Core Clock Outputs */
++ DEF_FIXED("ztr", R8A77970_CLK_ZTR, CLK_PLL1_DIV2, 6, 1),
++ DEF_FIXED("ztrd2", R8A77970_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
++ DEF_FIXED("zt", R8A77970_CLK_ZT, CLK_PLL1_DIV2, 4, 1),
++ DEF_FIXED("zx", R8A77970_CLK_ZX, CLK_PLL1_DIV2, 3, 1),
++ DEF_FIXED("s1d1", R8A77970_CLK_S1D1, CLK_PLL1_DIV2, 4, 1),
++ DEF_FIXED("s1d2", R8A77970_CLK_S1D2, CLK_PLL1_DIV2, 8, 1),
++ DEF_FIXED("s1d4", R8A77970_CLK_S1D4, CLK_PLL1_DIV2, 16, 1),
++ DEF_FIXED("s2d1", R8A77970_CLK_S2D1, CLK_PLL1_DIV2, 6, 1),
++ DEF_FIXED("s2d2", R8A77970_CLK_S2D2, CLK_PLL1_DIV2, 12, 1),
++ DEF_FIXED("s2d4", R8A77970_CLK_S2D4, CLK_PLL1_DIV2, 24, 1),
++
++ DEF_FIXED("cl", R8A77970_CLK_CL, CLK_PLL1_DIV2, 48, 1),
++ DEF_FIXED("cp", R8A77970_CLK_CP, CLK_EXTAL, 2, 1),
++
++ DEF_DIV6P1("canfd", R8A77970_CLK_CANFD, CLK_PLL1_DIV4, 0x244),
++ DEF_DIV6P1("mso", R8A77970_CLK_MSO, CLK_PLL1_DIV4, 0x014),
++ DEF_DIV6P1("csi0", R8A77970_CLK_CSI0, CLK_PLL1_DIV4, 0x00c),
++
++ DEF_FIXED("osc", R8A77970_CLK_OSC, CLK_PLL1_DIV2, 12*1024, 1),
++ DEF_FIXED("r", R8A77970_CLK_R, CLK_EXTALR, 1, 1),
++};
++
++static const struct mssr_mod_clk r8a77970_mod_clks[] __initconst = {
++ DEF_MOD("ivcp1e", 127, R8A77970_CLK_S2D1),
++ DEF_MOD("scif4", 203, R8A77970_CLK_S2D4),
++ DEF_MOD("scif3", 204, R8A77970_CLK_S2D4),
++ DEF_MOD("scif1", 206, R8A77970_CLK_S2D4),
++ DEF_MOD("scif0", 207, R8A77970_CLK_S2D4),
++ DEF_MOD("msiof3", 208, R8A77970_CLK_MSO),
++ DEF_MOD("msiof2", 209, R8A77970_CLK_MSO),
++ DEF_MOD("msiof1", 210, R8A77970_CLK_MSO),
++ DEF_MOD("msiof0", 211, R8A77970_CLK_MSO),
++ DEF_MOD("mfis", 213, R8A77970_CLK_S2D2),
++ DEF_MOD("sys-dmac2", 217, R8A77970_CLK_S2D1),
++ DEF_MOD("sys-dmac1", 218, R8A77970_CLK_S2D1),
++ DEF_MOD("rwdt", 402, R8A77970_CLK_R),
++ DEF_MOD("intc-ex", 407, R8A77970_CLK_CP),
++ DEF_MOD("intc-ap", 408, R8A77970_CLK_S2D1),
++ DEF_MOD("hscif3", 517, R8A77970_CLK_S2D1),
++ DEF_MOD("hscif2", 518, R8A77970_CLK_S2D1),
++ DEF_MOD("hscif1", 519, R8A77970_CLK_S2D1),
++ DEF_MOD("hscif0", 520, R8A77970_CLK_S2D1),
++ DEF_MOD("thermal", 522, R8A77970_CLK_CP),
++ DEF_MOD("pwm", 523, R8A77970_CLK_S2D4),
++ DEF_MOD("fcpvd0", 603, R8A77970_CLK_S2D1),
++ DEF_MOD("vspd0", 623, R8A77970_CLK_S2D1),
++ DEF_MOD("csi40", 716, R8A77970_CLK_CSI0),
++ DEF_MOD("du0", 724, R8A77970_CLK_S2D1),
++ DEF_MOD("vin3", 808, R8A77970_CLK_S2D1),
++ DEF_MOD("vin2", 809, R8A77970_CLK_S2D1),
++ DEF_MOD("vin1", 810, R8A77970_CLK_S2D1),
++ DEF_MOD("vin0", 811, R8A77970_CLK_S2D1),
++ DEF_MOD("etheravb", 812, R8A77970_CLK_S2D2),
++ DEF_MOD("gpio5", 907, R8A77970_CLK_CP),
++ DEF_MOD("gpio4", 908, R8A77970_CLK_CP),
++ DEF_MOD("gpio3", 909, R8A77970_CLK_CP),
++ DEF_MOD("gpio2", 910, R8A77970_CLK_CP),
++ DEF_MOD("gpio1", 911, R8A77970_CLK_CP),
++ DEF_MOD("gpio0", 912, R8A77970_CLK_CP),
++ DEF_MOD("can-fd", 914, R8A77970_CLK_S2D2),
++ DEF_MOD("i2c4", 927, R8A77970_CLK_S2D2),
++ DEF_MOD("i2c3", 928, R8A77970_CLK_S2D2),
++ DEF_MOD("i2c2", 929, R8A77970_CLK_S2D2),
++ DEF_MOD("i2c1", 930, R8A77970_CLK_S2D2),
++ DEF_MOD("i2c0", 931, R8A77970_CLK_S2D2),
++};
++
++static const unsigned int r8a77970_crit_mod_clks[] __initconst = {
++ MOD_CLK_ID(408), /* INTC-AP (GIC) */
++};
++
++
++/*
++ * CPG Clock Data
++ */
++
++/*
++ * MD EXTAL PLL0 PLL1 PLL3
++ * 14 13 19 (MHz)
++ *-------------------------------------------------
++ * 0 0 0 16.66 x 1 x192 x192 x96
++ * 0 0 1 16.66 x 1 x192 x192 x80
++ * 0 1 0 20 x 1 x160 x160 x80
++ * 0 1 1 20 x 1 x160 x160 x66
++ * 1 0 0 27 / 2 x236 x236 x118
++ * 1 0 1 27 / 2 x236 x236 x98
++ * 1 1 0 33.33 / 2 x192 x192 x96
++ * 1 1 1 33.33 / 2 x192 x192 x80
++ */
++#define CPG_PLL_CONFIG_INDEX(md) ((((md) & BIT(14)) >> 12) | \
++ (((md) & BIT(13)) >> 12) | \
++ (((md) & BIT(19)) >> 19))
++
++static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[8] __initconst = {
++ /* EXTAL div PLL1 mult/div PLL3 mult/div */
++ { 1, 192, 1, 96, 1, },
++ { 1, 192, 1, 80, 1, },
++ { 1, 160, 1, 80, 1, },
++ { 1, 160, 1, 66, 1, },
++ { 2, 236, 1, 118, 1, },
++ { 2, 236, 1, 98, 1, },
++ { 2, 192, 1, 96, 1, },
++ { 2, 192, 1, 80, 1, },
++};
++
++static int __init r8a77970_cpg_mssr_init(struct device *dev)
++{
++ const struct rcar_gen3_cpg_pll_config *cpg_pll_config;
++ u32 cpg_mode;
++ int error;
++
++ error = rcar_rst_read_mode_pins(&cpg_mode);
++ if (error)
++ return error;
++
++ cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)];
++
++ return rcar_gen3_cpg_init(cpg_pll_config, CLK_EXTALR, cpg_mode);
++}
++
++const struct cpg_mssr_info r8a77970_cpg_mssr_info __initconst = {
++ /* Core Clocks */
++ .core_clks = r8a77970_core_clks,
++ .num_core_clks = ARRAY_SIZE(r8a77970_core_clks),
++ .last_dt_core_clk = LAST_DT_CORE_CLK,
++ .num_total_core_clks = MOD_CLK_BASE,
++
++ /* Module Clocks */
++ .mod_clks = r8a77970_mod_clks,
++ .num_mod_clks = ARRAY_SIZE(r8a77970_mod_clks),
++ .num_hw_mod_clks = 12 * 32,
++
++ /* Critical Module Clocks */
++ .crit_mod_clks = r8a77970_crit_mod_clks,
++ .num_crit_mod_clks = ARRAY_SIZE(r8a77970_crit_mod_clks),
++
++ /* Callbacks */
++ .init = r8a77970_cpg_mssr_init,
++ .cpg_clk_register = rcar_gen3_cpg_clk_register,
++};
+diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c
+index 30c23b882675..4b05c159993f 100644
+--- a/drivers/clk/renesas/renesas-cpg-mssr.c
++++ b/drivers/clk/renesas/renesas-cpg-mssr.c
+@@ -681,6 +681,12 @@ static const struct of_device_id cpg_mssr_match[] = {
+ .data = &r8a7796_cpg_mssr_info,
+ },
+ #endif
++#ifdef CONFIG_CLK_R8A77970
++ {
++ .compatible = "renesas,r8a77970-cpg-mssr",
++ .data = &r8a77970_cpg_mssr_info,
++ },
++#endif
+ #ifdef CONFIG_CLK_R8A77995
+ {
+ .compatible = "renesas,r8a77995-cpg-mssr",
+diff --git a/drivers/clk/renesas/renesas-cpg-mssr.h b/drivers/clk/renesas/renesas-cpg-mssr.h
+index 94b9071d1061..66528ce3eb37 100644
+--- a/drivers/clk/renesas/renesas-cpg-mssr.h
++++ b/drivers/clk/renesas/renesas-cpg-mssr.h
+@@ -138,6 +138,7 @@ extern const struct cpg_mssr_info r8a7792_cpg_mssr_info;
+ extern const struct cpg_mssr_info r8a7794_cpg_mssr_info;
+ extern const struct cpg_mssr_info r8a7795_cpg_mssr_info;
+ extern const struct cpg_mssr_info r8a7796_cpg_mssr_info;
++extern const struct cpg_mssr_info r8a77970_cpg_mssr_info;
+ extern const struct cpg_mssr_info r8a77995_cpg_mssr_info;
+
+
+--
+2.19.0
+
diff --git a/patches/0269-clk-renesas-mstp-Delete-error-messages-for-failed-me.patch b/patches/0269-clk-renesas-mstp-Delete-error-messages-for-failed-me.patch
new file mode 100644
index 0000000..87c6a39
--- /dev/null
+++ b/patches/0269-clk-renesas-mstp-Delete-error-messages-for-failed-me.patch
@@ -0,0 +1,48 @@
+From b0abe3ce5ff251955511fc6ad116553ea82269c7 Mon Sep 17 00:00:00 2001
+From: Markus Elfring <elfring@users.sourceforge.net>
+Date: Mon, 25 Sep 2017 10:10:51 +0200
+Subject: [PATCH 0269/1795] clk: renesas: mstp: Delete error messages for
+ failed memory allocations
+
+The script "checkpatch.pl" pointed information out like the following.
+
+WARNING: Possible unnecessary 'out of memory' message
+
+Thus fix affected source code places.
+
+Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 168bcbcb1c72a4753fc64ef384b46e330bfccd08)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/clk/renesas/clk-mstp.c | 5 +----
+ 1 file changed, 1 insertion(+), 4 deletions(-)
+
+diff --git a/drivers/clk/renesas/clk-mstp.c b/drivers/clk/renesas/clk-mstp.c
+index 500a9e4e03c4..c944cc421e30 100644
+--- a/drivers/clk/renesas/clk-mstp.c
++++ b/drivers/clk/renesas/clk-mstp.c
+@@ -156,10 +156,8 @@ static struct clk * __init cpg_mstp_clock_register(const char *name,
+ struct clk *clk;
+
+ clock = kzalloc(sizeof(*clock), GFP_KERNEL);
+- if (!clock) {
+- pr_err("%s: failed to allocate MSTP clock.\n", __func__);
++ if (!clock)
+ return ERR_PTR(-ENOMEM);
+- }
+
+ init.name = name;
+ init.ops = &cpg_mstp_clock_ops;
+@@ -196,7 +194,6 @@ static void __init cpg_mstp_clocks_init(struct device_node *np)
+ if (group == NULL || clks == NULL) {
+ kfree(group);
+ kfree(clks);
+- pr_err("%s: failed to allocate group\n", __func__);
+ return;
+ }
+
+--
+2.19.0
+
diff --git a/patches/0270-clk-renesas-rcar-gen2-Delete-error-message-for-faile.patch b/patches/0270-clk-renesas-rcar-gen2-Delete-error-message-for-faile.patch
new file mode 100644
index 0000000..5c96841
--- /dev/null
+++ b/patches/0270-clk-renesas-rcar-gen2-Delete-error-message-for-faile.patch
@@ -0,0 +1,36 @@
+From b9a3a26bc2f5047917b2741cc51c5f407725059d Mon Sep 17 00:00:00 2001
+From: Markus Elfring <elfring@users.sourceforge.net>
+Date: Mon, 25 Sep 2017 10:10:51 +0200
+Subject: [PATCH 0270/1795] clk: renesas: rcar-gen2: Delete error message for
+ failed memory allocation
+
+The script "checkpatch.pl" pointed information out like the following.
+
+WARNING: Possible unnecessary 'out of memory' message
+
+Thus fix affected source code places.
+
+Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit b4021bbe10017d994e5a96ebfd2677bbaf2b37e0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/clk/renesas/clk-rcar-gen2.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/drivers/clk/renesas/clk-rcar-gen2.c b/drivers/clk/renesas/clk-rcar-gen2.c
+index 0b2e56d0d94b..d14cbe1ca29a 100644
+--- a/drivers/clk/renesas/clk-rcar-gen2.c
++++ b/drivers/clk/renesas/clk-rcar-gen2.c
+@@ -423,7 +423,6 @@ static void __init rcar_gen2_cpg_clocks_init(struct device_node *np)
+ /* We're leaking memory on purpose, there's no point in cleaning
+ * up as the system won't boot anyway.
+ */
+- pr_err("%s: failed to allocate cpg\n", __func__);
+ return;
+ }
+
+--
+2.19.0
+
diff --git a/patches/0271-clk-renesas-r8a7795-Correct-parent-clock-of-INTC-AP.patch b/patches/0271-clk-renesas-r8a7795-Correct-parent-clock-of-INTC-AP.patch
new file mode 100644
index 0000000..ebeac9a
--- /dev/null
+++ b/patches/0271-clk-renesas-r8a7795-Correct-parent-clock-of-INTC-AP.patch
@@ -0,0 +1,44 @@
+From 9cfc39f6f58659edd94a78b36d2342397c0c5fcf Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Tue, 10 Oct 2017 13:04:28 +0200
+Subject: [PATCH 0271/1795] clk: renesas: r8a7795: Correct parent clock of
+ INTC-AP
+
+According to the R-Car Gen3 Hardware Manual Errata for Rev 0.55 of
+September 8, 2017, the parent clock of the INTC-AP module clock on R-Car
+H3 ES2.0 is S0D3.
+
+This change has no functional impact.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 21bffe57f85c24fbb8d54aea4e46d2eac77242f6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/clk/renesas/r8a7795-cpg-mssr.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c
+index 762b2f8824f1..b1d9f48eae9e 100644
+--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
++++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
+@@ -149,7 +149,7 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
+ DEF_MOD("usb-dmac1", 331, R8A7795_CLK_S3D1),
+ DEF_MOD("rwdt", 402, R8A7795_CLK_R),
+ DEF_MOD("intc-ex", 407, R8A7795_CLK_CP),
+- DEF_MOD("intc-ap", 408, R8A7795_CLK_S3D1),
++ DEF_MOD("intc-ap", 408, R8A7795_CLK_S0D3),
+ DEF_MOD("audmac1", 501, R8A7795_CLK_S0D3),
+ DEF_MOD("audmac0", 502, R8A7795_CLK_S0D3),
+ DEF_MOD("drif7", 508, R8A7795_CLK_S3D2),
+@@ -348,6 +348,7 @@ static const struct mssr_mod_reparent r8a7795es1_mod_reparent[] __initconst = {
+ { MOD_CLK_ID(217), R8A7795_CLK_S3D1 }, /* SYS-DMAC2 */
+ { MOD_CLK_ID(218), R8A7795_CLK_S3D1 }, /* SYS-DMAC1 */
+ { MOD_CLK_ID(219), R8A7795_CLK_S3D1 }, /* SYS-DMAC0 */
++ { MOD_CLK_ID(408), R8A7795_CLK_S3D1 }, /* INTC-AP */
+ { MOD_CLK_ID(501), R8A7795_CLK_S3D1 }, /* AUDMAC1 */
+ { MOD_CLK_ID(502), R8A7795_CLK_S3D1 }, /* AUDMAC0 */
+ { MOD_CLK_ID(523), R8A7795_CLK_S3D4 }, /* PWM */
+--
+2.19.0
+
diff --git a/patches/0272-clk-renesas-r8a7796-Correct-parent-clock-of-INTC-AP.patch b/patches/0272-clk-renesas-r8a7796-Correct-parent-clock-of-INTC-AP.patch
new file mode 100644
index 0000000..82020b2
--- /dev/null
+++ b/patches/0272-clk-renesas-r8a7796-Correct-parent-clock-of-INTC-AP.patch
@@ -0,0 +1,36 @@
+From c6a279f99b38a474a441023908e4b7d6f78106a2 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Tue, 10 Oct 2017 13:07:45 +0200
+Subject: [PATCH 0272/1795] clk: renesas: r8a7796: Correct parent clock of
+ INTC-AP
+
+According to the R-Car Gen3 Hardware Manual Errata for Rev 0.55 of
+September 8, 2017, the parent clock of the INTC-AP module clock on R-Car
+M3-W is S0D3.
+
+This change has no functional impact.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 6e7ddf89d67c2b0cdd7a392bece9411789dda49b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/clk/renesas/r8a7796-cpg-mssr.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
+index e5e7fb212288..b3767472088a 100644
+--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
++++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
+@@ -143,7 +143,7 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
+ DEF_MOD("usb-dmac1", 331, R8A7796_CLK_S3D1),
+ DEF_MOD("rwdt", 402, R8A7796_CLK_R),
+ DEF_MOD("intc-ex", 407, R8A7796_CLK_CP),
+- DEF_MOD("intc-ap", 408, R8A7796_CLK_S3D1),
++ DEF_MOD("intc-ap", 408, R8A7796_CLK_S0D3),
+ DEF_MOD("audmac1", 501, R8A7796_CLK_S0D3),
+ DEF_MOD("audmac0", 502, R8A7796_CLK_S0D3),
+ DEF_MOD("drif7", 508, R8A7796_CLK_S3D2),
+--
+2.19.0
+
diff --git a/patches/0273-clk-renesas-r8a77995-Correct-parent-clock-of-INTC-AP.patch b/patches/0273-clk-renesas-r8a77995-Correct-parent-clock-of-INTC-AP.patch
new file mode 100644
index 0000000..123be80
--- /dev/null
+++ b/patches/0273-clk-renesas-r8a77995-Correct-parent-clock-of-INTC-AP.patch
@@ -0,0 +1,36 @@
+From 475dce5c147717255ae2bcbd4f4133157846d9ad Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Tue, 10 Oct 2017 13:08:11 +0200
+Subject: [PATCH 0273/1795] clk: renesas: r8a77995: Correct parent clock of
+ INTC-AP
+
+According to the R-Car Gen3 Hardware Manual Errata for Rev 0.55 of
+September 8, 2017, the parent clock of the INTC-AP module clock on R-Car
+D3 is S1D2.
+
+This change has no functional impact.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 0022e4a2ef8f20257b21b8fa27c0cb683485270b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/clk/renesas/r8a77995-cpg-mssr.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/clk/renesas/r8a77995-cpg-mssr.c b/drivers/clk/renesas/r8a77995-cpg-mssr.c
+index e594cf8ee63b..ea4cafbe6e85 100644
+--- a/drivers/clk/renesas/r8a77995-cpg-mssr.c
++++ b/drivers/clk/renesas/r8a77995-cpg-mssr.c
+@@ -127,7 +127,7 @@ static const struct mssr_mod_clk r8a77995_mod_clks[] __initconst = {
+ DEF_MOD("usb-dmac1", 331, R8A77995_CLK_S3D1),
+ DEF_MOD("rwdt", 402, R8A77995_CLK_R),
+ DEF_MOD("intc-ex", 407, R8A77995_CLK_CP),
+- DEF_MOD("intc-ap", 408, R8A77995_CLK_S3D1),
++ DEF_MOD("intc-ap", 408, R8A77995_CLK_S1D2),
+ DEF_MOD("audmac0", 502, R8A77995_CLK_S3D1),
+ DEF_MOD("hscif3", 517, R8A77995_CLK_S3D1C),
+ DEF_MOD("hscif0", 520, R8A77995_CLK_S3D1C),
+--
+2.19.0
+
diff --git a/patches/0274-dt-bindings-clk-r7s72100-Add-missing-I-and-G-clocks.patch b/patches/0274-dt-bindings-clk-r7s72100-Add-missing-I-and-G-clocks.patch
new file mode 100644
index 0000000..1c47ba1
--- /dev/null
+++ b/patches/0274-dt-bindings-clk-r7s72100-Add-missing-I-and-G-clocks.patch
@@ -0,0 +1,38 @@
+From 04db571fcda05d741275fd0b725888b9b55483fb Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 12 Oct 2017 11:35:04 +0200
+Subject: [PATCH 0274/1795] dt-bindings: clk: r7s72100: Add missing I and G
+ clocks
+
+Add the missing definitions for the I (CPU) and G (Image Processing)
+clocks, so these clocks can be referred to from device nodes in DT.
+
+Note that these clocks are already fully supported otherwise (DT
+bindings, Linux driver, r7s72100.dtsi), they were just omitted from the
+header file.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 44842cc8a89aa7742bc47737aa75da5910aa5f33)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ include/dt-bindings/clock/r7s72100-clock.h | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/include/dt-bindings/clock/r7s72100-clock.h b/include/dt-bindings/clock/r7s72100-clock.h
+index 7dd8bc0c3cd0..0dcb3e87d44c 100644
+--- a/include/dt-bindings/clock/r7s72100-clock.h
++++ b/include/dt-bindings/clock/r7s72100-clock.h
+@@ -11,6 +11,8 @@
+ #define __DT_BINDINGS_CLOCK_R7S72100_H__
+
+ #define R7S72100_CLK_PLL 0
++#define R7S72100_CLK_I 1
++#define R7S72100_CLK_G 2
+
+ /* MSTP2 */
+ #define R7S72100_CLK_CORESIGHT 0
+--
+2.19.0
+
diff --git a/patches/0275-clk-renesas-rz-clk-rz-is-meant-for-RZ-A1.patch b/patches/0275-clk-renesas-rz-clk-rz-is-meant-for-RZ-A1.patch
new file mode 100644
index 0000000..9ad943c
--- /dev/null
+++ b/patches/0275-clk-renesas-rz-clk-rz-is-meant-for-RZ-A1.patch
@@ -0,0 +1,47 @@
+From 03d64d8af06c8c14f445b81607cdb48bbc3cf577 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 12 Oct 2017 10:54:22 +0200
+Subject: [PATCH 0275/1795] clk: renesas: rz: clk-rz is meant for RZ/A1
+
+The RZ family of Renesas SoCs has several different subfamilies (RZ/A,
+RZ/G, RZ/N, and RZ/T). Clarify that the renesas,rz-cpg-clocks DT
+bindings and clk-rz driver apply to RZ/A1 only.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Rob Herring <robh@kernel.org>
+(cherry picked from commit d454cecc637b90996ab15b2e61a6cc51b7e1463c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ .../devicetree/bindings/clock/renesas,rz-cpg-clocks.txt | 4 ++--
+ drivers/clk/renesas/clk-rz.c | 2 +-
+ 2 files changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt
+index bb5d942075fb..8ff3e2774ed8 100644
+--- a/Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt
++++ b/Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt
+@@ -1,6 +1,6 @@
+-* Renesas RZ Clock Pulse Generator (CPG)
++* Renesas RZ/A1 Clock Pulse Generator (CPG)
+
+-The CPG generates core clocks for the RZ SoCs. It includes the PLL, variable
++The CPG generates core clocks for the RZ/A1 SoCs. It includes the PLL, variable
+ CPU and GPU clocks, and several fixed ratio dividers.
+ The CPG also provides a Clock Domain for SoC devices, in combination with the
+ CPG Module Stop (MSTP) Clocks.
+diff --git a/drivers/clk/renesas/clk-rz.c b/drivers/clk/renesas/clk-rz.c
+index 5adb934326d1..127c58135c8f 100644
+--- a/drivers/clk/renesas/clk-rz.c
++++ b/drivers/clk/renesas/clk-rz.c
+@@ -1,5 +1,5 @@
+ /*
+- * rz Core CPG Clocks
++ * RZ/A1 Core CPG Clocks
+ *
+ * Copyright (C) 2013 Ideas On Board SPRL
+ * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
+--
+2.19.0
+
diff --git a/patches/0276-clk-renesas-cpg-mssr-Add-du1-clock-to-R8A7745.patch b/patches/0276-clk-renesas-cpg-mssr-Add-du1-clock-to-R8A7745.patch
new file mode 100644
index 0000000..394e41d
--- /dev/null
+++ b/patches/0276-clk-renesas-cpg-mssr-Add-du1-clock-to-R8A7745.patch
@@ -0,0 +1,30 @@
+From 21b3f97340469262eee16a38dca60d5c26360f66 Mon Sep 17 00:00:00 2001
+From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Date: Fri, 13 Oct 2017 16:22:21 +0100
+Subject: [PATCH 0276/1795] clk: renesas: cpg-mssr: Add du1 clock to R8A7745
+
+Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Reviewed-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 9dc0ddee8d6dcc201b7f9ebc1c0834b0fa306096)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/clk/renesas/r8a7745-cpg-mssr.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/clk/renesas/r8a7745-cpg-mssr.c b/drivers/clk/renesas/r8a7745-cpg-mssr.c
+index 9e2360a8e14b..2859504cc866 100644
+--- a/drivers/clk/renesas/r8a7745-cpg-mssr.c
++++ b/drivers/clk/renesas/r8a7745-cpg-mssr.c
+@@ -129,6 +129,7 @@ static const struct mssr_mod_clk r8a7745_mod_clks[] __initconst = {
+ DEF_MOD("scif2", 719, R8A7745_CLK_P),
+ DEF_MOD("scif1", 720, R8A7745_CLK_P),
+ DEF_MOD("scif0", 721, R8A7745_CLK_P),
++ DEF_MOD("du1", 723, R8A7745_CLK_ZX),
+ DEF_MOD("du0", 724, R8A7745_CLK_ZX),
+ DEF_MOD("ipmmu-sgx", 800, R8A7745_CLK_ZX),
+ DEF_MOD("vin1", 810, R8A7745_CLK_ZG),
+--
+2.19.0
+
diff --git a/patches/0277-clk-renesas-cpg-mssr-Restore-module-clocks-during-re.patch b/patches/0277-clk-renesas-cpg-mssr-Restore-module-clocks-during-re.patch
new file mode 100644
index 0000000..fb70018
--- /dev/null
+++ b/patches/0277-clk-renesas-cpg-mssr-Restore-module-clocks-during-re.patch
@@ -0,0 +1,186 @@
+From 04609a5a9b37f365963103b69cd42ffbac9f9545 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 7 Jun 2017 13:20:06 +0200
+Subject: [PATCH 0277/1795] clk: renesas: cpg-mssr: Restore module clocks
+ during resume
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+During PSCI system suspend, R-Car Gen3 SoCs are powered down, and their
+clock register state is lost. Note that as the boot loader skips most
+initialization after system resume, clock register state differs from
+the state encountered during normal system boot, too.
+
+Hence after s2ram, some operations may fail because module clocks are
+disabled, while drivers expect them to be still enabled. E.g. EtherAVB
+fails when Wake-on-LAN has been enabled using "ethtool -s eth0 wol g":
+
+ ravb e6800000.ethernet eth0: failed to switch device to config mode
+ ravb e6800000.ethernet eth0: device will be stopped after h/w processes are done.
+ ravb e6800000.ethernet eth0: failed to switch device to config
+ PM: Device e6800000.ethernet failed to resume: error -110
+
+In addition, some module clocks that were disabled by
+clk_disable_unused() may have been re-enabled, wasting power.
+
+To fix this, restore all bits of the SMSTPCR registers that represent
+clocks under control of Linux.
+
+Notes:
+ - While this fixes EtherAVB operation after resume from s2ram,
+ EtherAVB cannot be used as an actual wake-up source from s2ram, only
+ from s2idle, due to PSCI limitations,
+ - To avoid overhead on platforms not needing it, the suspend/resume
+ code has a build time dependency on sleep and PSCI support, and a
+ runtime dependency on PSCI.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+(cherry picked from commit 560869100b99a3daea329efce738a3b7ae357be8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/clk/renesas/renesas-cpg-mssr.c | 84 ++++++++++++++++++++++++++
+ 1 file changed, 84 insertions(+)
+
+diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c
+index 4b05c159993f..3af0b5328fb0 100644
+--- a/drivers/clk/renesas/renesas-cpg-mssr.c
++++ b/drivers/clk/renesas/renesas-cpg-mssr.c
+@@ -26,6 +26,7 @@
+ #include <linux/platform_device.h>
+ #include <linux/pm_clock.h>
+ #include <linux/pm_domain.h>
++#include <linux/psci.h>
+ #include <linux/reset-controller.h>
+ #include <linux/slab.h>
+
+@@ -106,6 +107,8 @@ static const u16 srcr[] = {
+ * @num_core_clks: Number of Core Clocks in clks[]
+ * @num_mod_clks: Number of Module Clocks in clks[]
+ * @last_dt_core_clk: ID of the last Core Clock exported to DT
++ * @smstpcr_saved[].mask: Mask of SMSTPCR[] bits under our control
++ * @smstpcr_saved[].val: Saved values of SMSTPCR[]
+ */
+ struct cpg_mssr_priv {
+ #ifdef CONFIG_RESET_CONTROLLER
+@@ -119,6 +122,11 @@ struct cpg_mssr_priv {
+ unsigned int num_core_clks;
+ unsigned int num_mod_clks;
+ unsigned int last_dt_core_clk;
++
++ struct {
++ u32 mask;
++ u32 val;
++ } smstpcr_saved[ARRAY_SIZE(smstpcr)];
+ };
+
+
+@@ -383,6 +391,7 @@ static void __init cpg_mssr_register_mod_clk(const struct mssr_mod_clk *mod,
+
+ dev_dbg(dev, "Module clock %pC at %lu Hz\n", clk, clk_get_rate(clk));
+ priv->clks[id] = clk;
++ priv->smstpcr_saved[clock->index / 32].mask |= BIT(clock->index % 32);
+ return;
+
+ fail:
+@@ -701,6 +710,79 @@ static void cpg_mssr_del_clk_provider(void *data)
+ of_clk_del_provider(data);
+ }
+
++#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_ARM_PSCI_FW)
++static int cpg_mssr_suspend_noirq(struct device *dev)
++{
++ struct cpg_mssr_priv *priv = dev_get_drvdata(dev);
++ unsigned int reg;
++
++ /* This is the best we can do to check for the presence of PSCI */
++ if (!psci_ops.cpu_suspend)
++ return 0;
++
++ /* Save module registers with bits under our control */
++ for (reg = 0; reg < ARRAY_SIZE(priv->smstpcr_saved); reg++) {
++ if (priv->smstpcr_saved[reg].mask)
++ priv->smstpcr_saved[reg].val =
++ readl(priv->base + SMSTPCR(reg));
++ }
++
++ return 0;
++}
++
++static int cpg_mssr_resume_noirq(struct device *dev)
++{
++ struct cpg_mssr_priv *priv = dev_get_drvdata(dev);
++ unsigned int reg, i;
++ u32 mask, oldval, newval;
++
++ /* This is the best we can do to check for the presence of PSCI */
++ if (!psci_ops.cpu_suspend)
++ return 0;
++
++ /* Restore module clocks */
++ for (reg = 0; reg < ARRAY_SIZE(priv->smstpcr_saved); reg++) {
++ mask = priv->smstpcr_saved[reg].mask;
++ if (!mask)
++ continue;
++
++ oldval = readl(priv->base + SMSTPCR(reg));
++ newval = oldval & ~mask;
++ newval |= priv->smstpcr_saved[reg].val & mask;
++ if (newval == oldval)
++ continue;
++
++ writel(newval, priv->base + SMSTPCR(reg));
++
++ /* Wait until enabled clocks are really enabled */
++ mask &= ~priv->smstpcr_saved[reg].val;
++ if (!mask)
++ continue;
++
++ for (i = 1000; i > 0; --i) {
++ oldval = readl(priv->base + MSTPSR(reg));
++ if (!(oldval & mask))
++ break;
++ cpu_relax();
++ }
++
++ if (!i)
++ dev_warn(dev, "Failed to enable SMSTP %p[0x%x]\n",
++ priv->base + SMSTPCR(reg), oldval & mask);
++ }
++
++ return 0;
++}
++
++static const struct dev_pm_ops cpg_mssr_pm = {
++ SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(cpg_mssr_suspend_noirq,
++ cpg_mssr_resume_noirq)
++};
++#define DEV_PM_OPS &cpg_mssr_pm
++#else
++#define DEV_PM_OPS NULL
++#endif /* CONFIG_PM_SLEEP && CONFIG_ARM_PSCI_FW */
++
+ static int __init cpg_mssr_probe(struct platform_device *pdev)
+ {
+ struct device *dev = &pdev->dev;
+@@ -736,6 +818,7 @@ static int __init cpg_mssr_probe(struct platform_device *pdev)
+ if (!clks)
+ return -ENOMEM;
+
++ dev_set_drvdata(dev, priv);
+ priv->clks = clks;
+ priv->num_core_clks = info->num_total_core_clks;
+ priv->num_mod_clks = info->num_hw_mod_clks;
+@@ -776,6 +859,7 @@ static struct platform_driver cpg_mssr_driver = {
+ .driver = {
+ .name = "renesas-cpg-mssr",
+ .of_match_table = cpg_mssr_match,
++ .pm = DEV_PM_OPS,
+ },
+ };
+
+--
+2.19.0
+
diff --git a/patches/0278-clk-renesas-cpg-mssr-Add-support-to-restore-core-clo.patch b/patches/0278-clk-renesas-cpg-mssr-Add-support-to-restore-core-clo.patch
new file mode 100644
index 0000000..af22fab
--- /dev/null
+++ b/patches/0278-clk-renesas-cpg-mssr-Add-support-to-restore-core-clo.patch
@@ -0,0 +1,169 @@
+From bee7831ae25e2d51fde4a930ac04f43fa730f7c0 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 21 Jun 2017 22:24:15 +0200
+Subject: [PATCH 0278/1795] clk: renesas: cpg-mssr: Add support to restore core
+ clocks during resume
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+On R-Car Gen3 systems, PSCI system suspend powers down the SoC, possibly
+losing clock configuration. Hence add a notifier chain that can be used
+by core clocks to save/restore clock state during system suspend/resume.
+
+The implementation of the actual clock state save/restore operations is
+clock-specific, and to be registered with the notifier chain in the SoC
+or family-specific cpg_mssr_info.cpg_clk_register() callback.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+(cherry picked from commit 1f4023cdd1bdbe6cb01d0b2cbd1f46207189e3cf)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/clk/renesas/rcar-gen2-cpg.c | 7 +++----
+ drivers/clk/renesas/rcar-gen2-cpg.h | 6 +++---
+ drivers/clk/renesas/rcar-gen3-cpg.c | 3 ++-
+ drivers/clk/renesas/rcar-gen3-cpg.h | 3 ++-
+ drivers/clk/renesas/renesas-cpg-mssr.c | 12 +++++++++++-
+ drivers/clk/renesas/renesas-cpg-mssr.h | 3 ++-
+ 6 files changed, 23 insertions(+), 11 deletions(-)
+
+diff --git a/drivers/clk/renesas/rcar-gen2-cpg.c b/drivers/clk/renesas/rcar-gen2-cpg.c
+index 123b1e622179..feb14579a71b 100644
+--- a/drivers/clk/renesas/rcar-gen2-cpg.c
++++ b/drivers/clk/renesas/rcar-gen2-cpg.c
+@@ -262,10 +262,9 @@ static unsigned int cpg_pll0_div __initdata;
+ static u32 cpg_mode __initdata;
+
+ struct clk * __init rcar_gen2_cpg_clk_register(struct device *dev,
+- const struct cpg_core_clk *core,
+- const struct cpg_mssr_info *info,
+- struct clk **clks,
+- void __iomem *base)
++ const struct cpg_core_clk *core, const struct cpg_mssr_info *info,
++ struct clk **clks, void __iomem *base,
++ struct raw_notifier_head *notifiers)
+ {
+ const struct clk_div_table *table = NULL;
+ const struct clk *parent;
+diff --git a/drivers/clk/renesas/rcar-gen2-cpg.h b/drivers/clk/renesas/rcar-gen2-cpg.h
+index 9eba07ff8b11..020a3baad015 100644
+--- a/drivers/clk/renesas/rcar-gen2-cpg.h
++++ b/drivers/clk/renesas/rcar-gen2-cpg.h
+@@ -34,9 +34,9 @@ struct rcar_gen2_cpg_pll_config {
+ };
+
+ struct clk *rcar_gen2_cpg_clk_register(struct device *dev,
+- const struct cpg_core_clk *core,
+- const struct cpg_mssr_info *info,
+- struct clk **clks, void __iomem *base);
++ const struct cpg_core_clk *core, const struct cpg_mssr_info *info,
++ struct clk **clks, void __iomem *base,
++ struct raw_notifier_head *notifiers);
+ int rcar_gen2_cpg_init(const struct rcar_gen2_cpg_pll_config *config,
+ unsigned int pll0_div, u32 mode);
+
+diff --git a/drivers/clk/renesas/rcar-gen3-cpg.c b/drivers/clk/renesas/rcar-gen3-cpg.c
+index 951105816547..139985257003 100644
+--- a/drivers/clk/renesas/rcar-gen3-cpg.c
++++ b/drivers/clk/renesas/rcar-gen3-cpg.c
+@@ -265,7 +265,8 @@ static const struct soc_device_attribute cpg_quirks_match[] __initconst = {
+
+ struct clk * __init rcar_gen3_cpg_clk_register(struct device *dev,
+ const struct cpg_core_clk *core, const struct cpg_mssr_info *info,
+- struct clk **clks, void __iomem *base)
++ struct clk **clks, void __iomem *base,
++ struct raw_notifier_head *notifiers)
+ {
+ const struct clk *parent;
+ unsigned int mult = 1;
+diff --git a/drivers/clk/renesas/rcar-gen3-cpg.h b/drivers/clk/renesas/rcar-gen3-cpg.h
+index d756ef8b78eb..2e4284399f53 100644
+--- a/drivers/clk/renesas/rcar-gen3-cpg.h
++++ b/drivers/clk/renesas/rcar-gen3-cpg.h
+@@ -44,7 +44,8 @@ struct rcar_gen3_cpg_pll_config {
+
+ struct clk *rcar_gen3_cpg_clk_register(struct device *dev,
+ const struct cpg_core_clk *core, const struct cpg_mssr_info *info,
+- struct clk **clks, void __iomem *base);
++ struct clk **clks, void __iomem *base,
++ struct raw_notifier_head *notifiers);
+ int rcar_gen3_cpg_init(const struct rcar_gen3_cpg_pll_config *config,
+ unsigned int clk_extalr, u32 mode);
+
+diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c
+index 3af0b5328fb0..080ddfc695d6 100644
+--- a/drivers/clk/renesas/renesas-cpg-mssr.c
++++ b/drivers/clk/renesas/renesas-cpg-mssr.c
+@@ -107,6 +107,7 @@ static const u16 srcr[] = {
+ * @num_core_clks: Number of Core Clocks in clks[]
+ * @num_mod_clks: Number of Module Clocks in clks[]
+ * @last_dt_core_clk: ID of the last Core Clock exported to DT
++ * @notifiers: Notifier chain to save/restore clock state for system resume
+ * @smstpcr_saved[].mask: Mask of SMSTPCR[] bits under our control
+ * @smstpcr_saved[].val: Saved values of SMSTPCR[]
+ */
+@@ -123,6 +124,7 @@ struct cpg_mssr_priv {
+ unsigned int num_mod_clks;
+ unsigned int last_dt_core_clk;
+
++ struct raw_notifier_head notifiers;
+ struct {
+ u32 mask;
+ u32 val;
+@@ -313,7 +315,8 @@ static void __init cpg_mssr_register_core_clk(const struct cpg_core_clk *core,
+ default:
+ if (info->cpg_clk_register)
+ clk = info->cpg_clk_register(dev, core, info,
+- priv->clks, priv->base);
++ priv->clks, priv->base,
++ &priv->notifiers);
+ else
+ dev_err(dev, "%s has unsupported core clock type %u\n",
+ core->name, core->type);
+@@ -727,6 +730,9 @@ static int cpg_mssr_suspend_noirq(struct device *dev)
+ readl(priv->base + SMSTPCR(reg));
+ }
+
++ /* Save core clocks */
++ raw_notifier_call_chain(&priv->notifiers, PM_EVENT_SUSPEND, NULL);
++
+ return 0;
+ }
+
+@@ -740,6 +746,9 @@ static int cpg_mssr_resume_noirq(struct device *dev)
+ if (!psci_ops.cpu_suspend)
+ return 0;
+
++ /* Restore core clocks */
++ raw_notifier_call_chain(&priv->notifiers, PM_EVENT_RESUME, NULL);
++
+ /* Restore module clocks */
+ for (reg = 0; reg < ARRAY_SIZE(priv->smstpcr_saved); reg++) {
+ mask = priv->smstpcr_saved[reg].mask;
+@@ -823,6 +832,7 @@ static int __init cpg_mssr_probe(struct platform_device *pdev)
+ priv->num_core_clks = info->num_total_core_clks;
+ priv->num_mod_clks = info->num_hw_mod_clks;
+ priv->last_dt_core_clk = info->last_dt_core_clk;
++ RAW_INIT_NOTIFIER_HEAD(&priv->notifiers);
+
+ for (i = 0; i < nclks; i++)
+ clks[i] = ERR_PTR(-ENOENT);
+diff --git a/drivers/clk/renesas/renesas-cpg-mssr.h b/drivers/clk/renesas/renesas-cpg-mssr.h
+index 66528ce3eb37..0745b0930308 100644
+--- a/drivers/clk/renesas/renesas-cpg-mssr.h
++++ b/drivers/clk/renesas/renesas-cpg-mssr.h
+@@ -127,7 +127,8 @@ struct cpg_mssr_info {
+ struct clk *(*cpg_clk_register)(struct device *dev,
+ const struct cpg_core_clk *core,
+ const struct cpg_mssr_info *info,
+- struct clk **clks, void __iomem *base);
++ struct clk **clks, void __iomem *base,
++ struct raw_notifier_head *notifiers);
+ };
+
+ extern const struct cpg_mssr_info r8a7743_cpg_mssr_info;
+--
+2.19.0
+
diff --git a/patches/0279-clk-renesas-div6-Restore-clock-state-during-resume.patch b/patches/0279-clk-renesas-div6-Restore-clock-state-during-resume.patch
new file mode 100644
index 0000000..d236fd0
--- /dev/null
+++ b/patches/0279-clk-renesas-div6-Restore-clock-state-during-resume.patch
@@ -0,0 +1,158 @@
+From 40bb75f4cf2b7017af8c0783ca720713c8934d34 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 21 Jun 2017 22:34:33 +0200
+Subject: [PATCH 0279/1795] clk: renesas: div6: Restore clock state during
+ resume
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+On R-Car Gen3 systems, PSCI system suspend powers down the SoC, losing
+clock configuration. Register an (optional) notifier to restore the
+DIV6 clock state during system resume.
+
+As DIV6 clocks can be picky w.r.t. modifying multiple register fields at
+once, restore is not implemented by blindly restoring the register
+value, but by using the existing cpg_div6_clock_{en,dis}able() helpers.
+
+Note that this does not yet support DIV6 clocks with multiple parents,
+which do not exist on R-Car Gen3 SoCs.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+(cherry picked from commit 9f8c71e5134982cdf8ee35acb204715a2a47ba2e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/clk/renesas/clk-div6.c | 38 ++++++++++++++++++++++++--
+ drivers/clk/renesas/clk-div6.h | 3 +-
+ drivers/clk/renesas/renesas-cpg-mssr.c | 3 +-
+ 3 files changed, 40 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/clk/renesas/clk-div6.c b/drivers/clk/renesas/clk-div6.c
+index 3e0040c0ac87..151336d2ba59 100644
+--- a/drivers/clk/renesas/clk-div6.c
++++ b/drivers/clk/renesas/clk-div6.c
+@@ -14,8 +14,10 @@
+ #include <linux/init.h>
+ #include <linux/io.h>
+ #include <linux/kernel.h>
++#include <linux/notifier.h>
+ #include <linux/of.h>
+ #include <linux/of_address.h>
++#include <linux/pm.h>
+ #include <linux/slab.h>
+
+ #include "clk-div6.h"
+@@ -32,6 +34,7 @@
+ * @src_shift: Shift to access the register bits to select the parent clock
+ * @src_width: Number of register bits to select the parent clock (may be 0)
+ * @parents: Array to map from valid parent clocks indices to hardware indices
++ * @nb: Notifier block to save/restore clock state for system resume
+ */
+ struct div6_clock {
+ struct clk_hw hw;
+@@ -40,6 +43,7 @@ struct div6_clock {
+ u32 src_shift;
+ u32 src_width;
+ u8 *parents;
++ struct notifier_block nb;
+ };
+
+ #define to_div6_clock(_hw) container_of(_hw, struct div6_clock, hw)
+@@ -176,6 +180,29 @@ static const struct clk_ops cpg_div6_clock_ops = {
+ .set_rate = cpg_div6_clock_set_rate,
+ };
+
++static int cpg_div6_clock_notifier_call(struct notifier_block *nb,
++ unsigned long action, void *data)
++{
++ struct div6_clock *clock = container_of(nb, struct div6_clock, nb);
++
++ switch (action) {
++ case PM_EVENT_RESUME:
++ /*
++ * TODO: This does not yet support DIV6 clocks with multiple
++ * parents, as the parent selection bits are not restored.
++ * Fortunately so far such DIV6 clocks are found only on
++ * R/SH-Mobile SoCs, while the resume functionality is only
++ * needed on R-Car Gen3.
++ */
++ if (__clk_get_enable_count(clock->hw.clk))
++ cpg_div6_clock_enable(&clock->hw);
++ else
++ cpg_div6_clock_disable(&clock->hw);
++ return NOTIFY_OK;
++ }
++
++ return NOTIFY_DONE;
++}
+
+ /**
+ * cpg_div6_register - Register a DIV6 clock
+@@ -183,11 +210,13 @@ static const struct clk_ops cpg_div6_clock_ops = {
+ * @num_parents: Number of parent clocks of the DIV6 clock (1, 4, or 8)
+ * @parent_names: Array containing the names of the parent clocks
+ * @reg: Mapped register used to control the DIV6 clock
++ * @notifiers: Optional notifier chain to save/restore state for system resume
+ */
+ struct clk * __init cpg_div6_register(const char *name,
+ unsigned int num_parents,
+ const char **parent_names,
+- void __iomem *reg)
++ void __iomem *reg,
++ struct raw_notifier_head *notifiers)
+ {
+ unsigned int valid_parents;
+ struct clk_init_data init;
+@@ -258,6 +287,11 @@ struct clk * __init cpg_div6_register(const char *name,
+ if (IS_ERR(clk))
+ goto free_parents;
+
++ if (notifiers) {
++ clock->nb.notifier_call = cpg_div6_clock_notifier_call;
++ raw_notifier_chain_register(notifiers, &clock->nb);
++ }
++
+ return clk;
+
+ free_parents:
+@@ -301,7 +335,7 @@ static void __init cpg_div6_clock_init(struct device_node *np)
+ for (i = 0; i < num_parents; i++)
+ parent_names[i] = of_clk_get_parent_name(np, i);
+
+- clk = cpg_div6_register(clk_name, num_parents, parent_names, reg);
++ clk = cpg_div6_register(clk_name, num_parents, parent_names, reg, NULL);
+ if (IS_ERR(clk)) {
+ pr_err("%s: failed to register %s DIV6 clock (%ld)\n",
+ __func__, np->name, PTR_ERR(clk));
+diff --git a/drivers/clk/renesas/clk-div6.h b/drivers/clk/renesas/clk-div6.h
+index 065dfb49adf6..3af640a0b08d 100644
+--- a/drivers/clk/renesas/clk-div6.h
++++ b/drivers/clk/renesas/clk-div6.h
+@@ -3,6 +3,7 @@
+ #define __RENESAS_CLK_DIV6_H__
+
+ struct clk *cpg_div6_register(const char *name, unsigned int num_parents,
+- const char **parent_names, void __iomem *reg);
++ const char **parent_names, void __iomem *reg,
++ struct raw_notifier_head *notifiers);
+
+ #endif
+diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c
+index 080ddfc695d6..998a2f4b5db5 100644
+--- a/drivers/clk/renesas/renesas-cpg-mssr.c
++++ b/drivers/clk/renesas/renesas-cpg-mssr.c
+@@ -304,7 +304,8 @@ static void __init cpg_mssr_register_core_clk(const struct cpg_core_clk *core,
+
+ if (core->type == CLK_TYPE_DIV6P1) {
+ clk = cpg_div6_register(core->name, 1, &parent_name,
+- priv->base + core->offset);
++ priv->base + core->offset,
++ &priv->notifiers);
+ } else {
+ clk = clk_register_fixed_factor(NULL, core->name,
+ parent_name, 0,
+--
+2.19.0
+
diff --git a/patches/0280-clk-renesas-rcar-gen3-Restore-SDHI-clocks-during-res.patch b/patches/0280-clk-renesas-rcar-gen3-Restore-SDHI-clocks-during-res.patch
new file mode 100644
index 0000000..2fe3060
--- /dev/null
+++ b/patches/0280-clk-renesas-rcar-gen3-Restore-SDHI-clocks-during-res.patch
@@ -0,0 +1,184 @@
+From ca28660adc03f2c0fd9f6f202338a1b61f4b73b6 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 21 Jun 2017 22:51:21 +0200
+Subject: [PATCH 0280/1795] clk: renesas: rcar-gen3: Restore SDHI clocks during
+ resume
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+On R-Car Gen3 systems, PSCI system suspend powers down the SoC, losing
+clock configuration. Register a notifier to save/restore SDHI clock
+registers during system suspend/resume.
+
+This is implemented using the cpg_simple_notifier abstraction, which can
+be reused for others clocks that just need to save/restore a single
+register.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+(cherry picked from commit 9f55b17ff6387ab9c4caa9280e2e194bb03ad532)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/clk/renesas/rcar-gen3-cpg.c | 63 +++++++++++++++++++++++------
+ 1 file changed, 50 insertions(+), 13 deletions(-)
+
+diff --git a/drivers/clk/renesas/rcar-gen3-cpg.c b/drivers/clk/renesas/rcar-gen3-cpg.c
+index 139985257003..267b5629e3bd 100644
+--- a/drivers/clk/renesas/rcar-gen3-cpg.c
++++ b/drivers/clk/renesas/rcar-gen3-cpg.c
+@@ -19,6 +19,7 @@
+ #include <linux/err.h>
+ #include <linux/init.h>
+ #include <linux/io.h>
++#include <linux/pm.h>
+ #include <linux/slab.h>
+ #include <linux/sys_soc.h>
+
+@@ -29,6 +30,36 @@
+ #define CPG_PLL2CR 0x002c
+ #define CPG_PLL4CR 0x01f4
+
++struct cpg_simple_notifier {
++ struct notifier_block nb;
++ void __iomem *reg;
++ u32 saved;
++};
++
++static int cpg_simple_notifier_call(struct notifier_block *nb,
++ unsigned long action, void *data)
++{
++ struct cpg_simple_notifier *csn =
++ container_of(nb, struct cpg_simple_notifier, nb);
++
++ switch (action) {
++ case PM_EVENT_SUSPEND:
++ csn->saved = readl(csn->reg);
++ return NOTIFY_OK;
++
++ case PM_EVENT_RESUME:
++ writel(csn->saved, csn->reg);
++ return NOTIFY_OK;
++ }
++ return NOTIFY_DONE;
++}
++
++static void cpg_simple_notifier_register(struct raw_notifier_head *notifiers,
++ struct cpg_simple_notifier *csn)
++{
++ csn->nb.notifier_call = cpg_simple_notifier_call;
++ raw_notifier_chain_register(notifiers, &csn->nb);
++}
+
+ /*
+ * SDn Clock
+@@ -55,8 +86,8 @@ struct sd_div_table {
+
+ struct sd_clock {
+ struct clk_hw hw;
+- void __iomem *reg;
+ const struct sd_div_table *div_table;
++ struct cpg_simple_notifier csn;
+ unsigned int div_num;
+ unsigned int div_min;
+ unsigned int div_max;
+@@ -97,12 +128,12 @@ static const struct sd_div_table cpg_sd_div_table[] = {
+ static int cpg_sd_clock_enable(struct clk_hw *hw)
+ {
+ struct sd_clock *clock = to_sd_clock(hw);
+- u32 val = readl(clock->reg);
++ u32 val = readl(clock->csn.reg);
+
+ val &= ~(CPG_SD_STP_MASK);
+ val |= clock->div_table[clock->cur_div_idx].val & CPG_SD_STP_MASK;
+
+- writel(val, clock->reg);
++ writel(val, clock->csn.reg);
+
+ return 0;
+ }
+@@ -111,14 +142,14 @@ static void cpg_sd_clock_disable(struct clk_hw *hw)
+ {
+ struct sd_clock *clock = to_sd_clock(hw);
+
+- writel(readl(clock->reg) | CPG_SD_STP_MASK, clock->reg);
++ writel(readl(clock->csn.reg) | CPG_SD_STP_MASK, clock->csn.reg);
+ }
+
+ static int cpg_sd_clock_is_enabled(struct clk_hw *hw)
+ {
+ struct sd_clock *clock = to_sd_clock(hw);
+
+- return !(readl(clock->reg) & CPG_SD_STP_MASK);
++ return !(readl(clock->csn.reg) & CPG_SD_STP_MASK);
+ }
+
+ static unsigned long cpg_sd_clock_recalc_rate(struct clk_hw *hw,
+@@ -170,10 +201,10 @@ static int cpg_sd_clock_set_rate(struct clk_hw *hw, unsigned long rate,
+
+ clock->cur_div_idx = i;
+
+- val = readl(clock->reg);
++ val = readl(clock->csn.reg);
+ val &= ~(CPG_SD_STP_MASK | CPG_SD_FC_MASK);
+ val |= clock->div_table[i].val & (CPG_SD_STP_MASK | CPG_SD_FC_MASK);
+- writel(val, clock->reg);
++ writel(val, clock->csn.reg);
+
+ return 0;
+ }
+@@ -188,8 +219,8 @@ static const struct clk_ops cpg_sd_clock_ops = {
+ };
+
+ static struct clk * __init cpg_sd_clk_register(const struct cpg_core_clk *core,
+- void __iomem *base,
+- const char *parent_name)
++ void __iomem *base, const char *parent_name,
++ struct raw_notifier_head *notifiers)
+ {
+ struct clk_init_data init;
+ struct sd_clock *clock;
+@@ -207,12 +238,12 @@ static struct clk * __init cpg_sd_clk_register(const struct cpg_core_clk *core,
+ init.parent_names = &parent_name;
+ init.num_parents = 1;
+
+- clock->reg = base + core->offset;
++ clock->csn.reg = base + core->offset;
+ clock->hw.init = &init;
+ clock->div_table = cpg_sd_div_table;
+ clock->div_num = ARRAY_SIZE(cpg_sd_div_table);
+
+- sd_fc = readl(clock->reg) & CPG_SD_FC_MASK;
++ sd_fc = readl(clock->csn.reg) & CPG_SD_FC_MASK;
+ for (i = 0; i < clock->div_num; i++)
+ if (sd_fc == (clock->div_table[i].val & CPG_SD_FC_MASK))
+ break;
+@@ -233,8 +264,13 @@ static struct clk * __init cpg_sd_clk_register(const struct cpg_core_clk *core,
+
+ clk = clk_register(NULL, &clock->hw);
+ if (IS_ERR(clk))
+- kfree(clock);
++ goto free_clock;
++
++ cpg_simple_notifier_register(notifiers, &clock->csn);
++ return clk;
+
++free_clock:
++ kfree(clock);
+ return clk;
+ }
+
+@@ -332,7 +368,8 @@ struct clk * __init rcar_gen3_cpg_clk_register(struct device *dev,
+ break;
+
+ case CLK_TYPE_GEN3_SD:
+- return cpg_sd_clk_register(core, base, __clk_get_name(parent));
++ return cpg_sd_clk_register(core, base, __clk_get_name(parent),
++ notifiers);
+
+ case CLK_TYPE_GEN3_R:
+ if (cpg_quirks & RCKCR_CKSEL) {
+--
+2.19.0
+
diff --git a/patches/0281-clk-renesas-rcar-gen3-Restore-R-clock-during-resume.patch b/patches/0281-clk-renesas-rcar-gen3-Restore-R-clock-during-resume.patch
new file mode 100644
index 0000000..eb95fdd
--- /dev/null
+++ b/patches/0281-clk-renesas-rcar-gen3-Restore-R-clock-during-resume.patch
@@ -0,0 +1,59 @@
+From 9ac4df59f7a13f5e0b994f120703d4040b986a75 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 28 Jun 2017 21:15:49 +0200
+Subject: [PATCH 0281/1795] clk: renesas: rcar-gen3: Restore R clock during
+ resume
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+On R-Car Gen3 systems, PSCI system suspend powers down the SoC, losing
+clock configuration. Register a notifier to save/restore the RCKCR
+register during system suspend/resume.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+(cherry picked from commit 3f7a4d084159c52513d1ff77f3b3b880bcf517d9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/clk/renesas/rcar-gen3-cpg.c | 13 +++++++++++--
+ 1 file changed, 11 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/clk/renesas/rcar-gen3-cpg.c b/drivers/clk/renesas/rcar-gen3-cpg.c
+index 267b5629e3bd..0904886f5501 100644
+--- a/drivers/clk/renesas/rcar-gen3-cpg.c
++++ b/drivers/clk/renesas/rcar-gen3-cpg.c
+@@ -373,18 +373,27 @@ struct clk * __init rcar_gen3_cpg_clk_register(struct device *dev,
+
+ case CLK_TYPE_GEN3_R:
+ if (cpg_quirks & RCKCR_CKSEL) {
++ struct cpg_simple_notifier *csn;
++
++ csn = kzalloc(sizeof(*csn), GFP_KERNEL);
++ if (!csn)
++ return ERR_PTR(-ENOMEM);
++
++ csn->reg = base + CPG_RCKCR;
++
+ /*
+ * RINT is default.
+ * Only if EXTALR is populated, we switch to it.
+ */
+- value = readl(base + CPG_RCKCR) & 0x3f;
++ value = readl(csn->reg) & 0x3f;
+
+ if (clk_get_rate(clks[cpg_clk_extalr])) {
+ parent = clks[cpg_clk_extalr];
+ value |= BIT(15);
+ }
+
+- writel(value, base + CPG_RCKCR);
++ writel(value, csn->reg);
++ cpg_simple_notifier_register(notifiers, csn);
+ break;
+ }
+
+--
+2.19.0
+
diff --git a/patches/0282-dt-bindings-power-add-R8A77970-SYSC-power-domain-def.patch b/patches/0282-dt-bindings-power-add-R8A77970-SYSC-power-domain-def.patch
new file mode 100644
index 0000000..005ef96
--- /dev/null
+++ b/patches/0282-dt-bindings-power-add-R8A77970-SYSC-power-domain-def.patch
@@ -0,0 +1,65 @@
+From 47f2a0db6c2a3e874d5a19ba5a5f8e0f8026394c Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Tue, 12 Sep 2017 23:37:19 +0300
+Subject: [PATCH 0282/1795] dt-bindings: power: add R8A77970 SYSC power domain
+ definitions
+
+Add macros usable by the device tree sources to reference R8A77970 SYSC
+power domains by index.
+
+Based on the original (and large) patch by Daisuke Matsushita
+<daisuke.matsushita.ns@hitachi.com>.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 833bdb47c826a1a64daac194c98887d1d68f2ce8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ include/dt-bindings/power/r8a77970-sysc.h | 32 +++++++++++++++++++++++
+ 1 file changed, 32 insertions(+)
+ create mode 100644 include/dt-bindings/power/r8a77970-sysc.h
+
+diff --git a/include/dt-bindings/power/r8a77970-sysc.h b/include/dt-bindings/power/r8a77970-sysc.h
+new file mode 100644
+index 000000000000..bf54779d1625
+--- /dev/null
++++ b/include/dt-bindings/power/r8a77970-sysc.h
+@@ -0,0 +1,32 @@
++/*
++ * Copyright (C) 2017 Cogent Embedded Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __DT_BINDINGS_POWER_R8A77970_SYSC_H__
++#define __DT_BINDINGS_POWER_R8A77970_SYSC_H__
++
++/*
++ * These power domain indices match the numbers of the interrupt bits
++ * representing the power areas in the various Interrupt Registers
++ * (e.g. SYSCISR, Interrupt Status Register)
++ */
++
++#define R8A77970_PD_CA53_CPU0 5
++#define R8A77970_PD_CA53_CPU1 6
++#define R8A77970_PD_CR7 13
++#define R8A77970_PD_CA53_SCU 21
++#define R8A77970_PD_A2IR0 23
++#define R8A77970_PD_A3IR 24
++#define R8A77970_PD_A2IR1 27
++#define R8A77970_PD_A2IR2 28
++#define R8A77970_PD_A2IR3 29
++#define R8A77970_PD_A2SC0 30
++#define R8A77970_PD_A2SC1 31
++
++/* Always-on power area */
++#define R8A77970_PD_ALWAYS_ON 32
++
++#endif /* __DT_BINDINGS_POWER_R8A77970_SYSC_H__ */
+--
+2.19.0
+
diff --git a/patches/0283-soc-renesas-rcar-sysc-add-R8A77970-support.patch b/patches/0283-soc-renesas-rcar-sysc-add-R8A77970-support.patch
new file mode 100644
index 0000000..6416926
--- /dev/null
+++ b/patches/0283-soc-renesas-rcar-sysc-add-R8A77970-support.patch
@@ -0,0 +1,149 @@
+From f8ec6a0a42bce4d4d067225f38c11a00b82398c3 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Tue, 12 Sep 2017 23:37:20 +0300
+Subject: [PATCH 0283/1795] soc: renesas: rcar-sysc: add R8A77970 support
+
+Add support for R-Car V3M (R8A77970) SoC power areas to the R-Car SYSC
+driver.
+
+Based on the original (and large) patch by Daisuke Matsushita
+<daisuke.matsushita.ns@hitachi.com>.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit bab9b2a74fe9da96e895e0919f625679a0a8c964)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ .../bindings/power/renesas,rcar-sysc.txt | 1 +
+ drivers/soc/renesas/Kconfig | 5 +++
+ drivers/soc/renesas/Makefile | 1 +
+ drivers/soc/renesas/r8a77970-sysc.c | 39 +++++++++++++++++++
+ drivers/soc/renesas/rcar-sysc.c | 3 ++
+ drivers/soc/renesas/rcar-sysc.h | 1 +
+ 6 files changed, 50 insertions(+)
+ create mode 100644 drivers/soc/renesas/r8a77970-sysc.c
+
+diff --git a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
+index 98cc8c09d02d..8690f10426a3 100644
+--- a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
++++ b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
+@@ -17,6 +17,7 @@ Required properties:
+ - "renesas,r8a7794-sysc" (R-Car E2)
+ - "renesas,r8a7795-sysc" (R-Car H3)
+ - "renesas,r8a7796-sysc" (R-Car M3-W)
++ - "renesas,r8a77970-sysc" (R-Car V3M)
+ - "renesas,r8a77995-sysc" (R-Car D3)
+ - reg: Address start and address range for the device.
+ - #power-domain-cells: Must be 1.
+diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig
+index f0d562a7c4d3..09550b1da56d 100644
+--- a/drivers/soc/renesas/Kconfig
++++ b/drivers/soc/renesas/Kconfig
+@@ -14,6 +14,7 @@ config SOC_RENESAS
+ select SYSC_R8A7794 if ARCH_R8A7794
+ select SYSC_R8A7795 if ARCH_R8A7795
+ select SYSC_R8A7796 if ARCH_R8A7796
++ select SYSC_R8A77970 if ARCH_R8A77970
+ select SYSC_R8A77995 if ARCH_R8A77995
+
+ if SOC_RENESAS
+@@ -55,6 +56,10 @@ config SYSC_R8A7796
+ bool "R-Car M3-W System Controller support" if COMPILE_TEST
+ select SYSC_RCAR
+
++config SYSC_R8A77970
++ bool "R-Car V3M System Controller support" if COMPILE_TEST
++ select SYSC_RCAR
++
+ config SYSC_R8A77995
+ bool "R-Car D3 System Controller support" if COMPILE_TEST
+ select SYSC_RCAR
+diff --git a/drivers/soc/renesas/Makefile b/drivers/soc/renesas/Makefile
+index 763c03d80436..845d62a08ce1 100644
+--- a/drivers/soc/renesas/Makefile
++++ b/drivers/soc/renesas/Makefile
+@@ -12,6 +12,7 @@ obj-$(CONFIG_SYSC_R8A7792) += r8a7792-sysc.o
+ obj-$(CONFIG_SYSC_R8A7794) += r8a7794-sysc.o
+ obj-$(CONFIG_SYSC_R8A7795) += r8a7795-sysc.o
+ obj-$(CONFIG_SYSC_R8A7796) += r8a7796-sysc.o
++obj-$(CONFIG_SYSC_R8A77970) += r8a77970-sysc.o
+ obj-$(CONFIG_SYSC_R8A77995) += r8a77995-sysc.o
+
+ # Family
+diff --git a/drivers/soc/renesas/r8a77970-sysc.c b/drivers/soc/renesas/r8a77970-sysc.c
+new file mode 100644
+index 000000000000..8c614164718e
+--- /dev/null
++++ b/drivers/soc/renesas/r8a77970-sysc.c
+@@ -0,0 +1,39 @@
++/*
++ * Renesas R-Car V3M System Controller
++ *
++ * Copyright (C) 2017 Cogent Embedded Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#include <linux/bug.h>
++#include <linux/kernel.h>
++
++#include <dt-bindings/power/r8a77970-sysc.h>
++
++#include "rcar-sysc.h"
++
++static const struct rcar_sysc_area r8a77970_areas[] __initconst = {
++ { "always-on", 0, 0, R8A77970_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
++ { "ca53-scu", 0x140, 0, R8A77970_PD_CA53_SCU, R8A77970_PD_ALWAYS_ON,
++ PD_SCU },
++ { "ca53-cpu0", 0x200, 0, R8A77970_PD_CA53_CPU0, R8A77970_PD_CA53_SCU,
++ PD_CPU_NOCR },
++ { "ca53-cpu1", 0x200, 1, R8A77970_PD_CA53_CPU1, R8A77970_PD_CA53_SCU,
++ PD_CPU_NOCR },
++ { "cr7", 0x240, 0, R8A77970_PD_CR7, R8A77970_PD_ALWAYS_ON },
++ { "a3ir", 0x180, 0, R8A77970_PD_A3IR, R8A77970_PD_ALWAYS_ON },
++ { "a2ir0", 0x400, 0, R8A77970_PD_A2IR0, R8A77970_PD_ALWAYS_ON },
++ { "a2ir1", 0x400, 1, R8A77970_PD_A2IR1, R8A77970_PD_A2IR0 },
++ { "a2ir2", 0x400, 2, R8A77970_PD_A2IR2, R8A77970_PD_A2IR0 },
++ { "a2ir3", 0x400, 3, R8A77970_PD_A2IR3, R8A77970_PD_A2IR0 },
++ { "a2sc0", 0x400, 4, R8A77970_PD_A2SC0, R8A77970_PD_ALWAYS_ON },
++ { "a2sc1", 0x400, 5, R8A77970_PD_A2SC1, R8A77970_PD_A2SC0 },
++};
++
++const struct rcar_sysc_info r8a77970_sysc_info __initconst = {
++ .areas = r8a77970_areas,
++ .num_areas = ARRAY_SIZE(r8a77970_areas),
++};
+diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c
+index c8406e81640f..55a47e509e49 100644
+--- a/drivers/soc/renesas/rcar-sysc.c
++++ b/drivers/soc/renesas/rcar-sysc.c
+@@ -284,6 +284,9 @@ static const struct of_device_id rcar_sysc_matches[] = {
+ #ifdef CONFIG_SYSC_R8A7796
+ { .compatible = "renesas,r8a7796-sysc", .data = &r8a7796_sysc_info },
+ #endif
++#ifdef CONFIG_SYSC_R8A77970
++ { .compatible = "renesas,r8a77970-sysc", .data = &r8a77970_sysc_info },
++#endif
+ #ifdef CONFIG_SYSC_R8A77995
+ { .compatible = "renesas,r8a77995-sysc", .data = &r8a77995_sysc_info },
+ #endif
+diff --git a/drivers/soc/renesas/rcar-sysc.h b/drivers/soc/renesas/rcar-sysc.h
+index 2f524922c4d2..9d9daf9eb91b 100644
+--- a/drivers/soc/renesas/rcar-sysc.h
++++ b/drivers/soc/renesas/rcar-sysc.h
+@@ -58,6 +58,7 @@ extern const struct rcar_sysc_info r8a7792_sysc_info;
+ extern const struct rcar_sysc_info r8a7794_sysc_info;
+ extern const struct rcar_sysc_info r8a7795_sysc_info;
+ extern const struct rcar_sysc_info r8a7796_sysc_info;
++extern const struct rcar_sysc_info r8a77970_sysc_info;
+ extern const struct rcar_sysc_info r8a77995_sysc_info;
+
+
+--
+2.19.0
+
diff --git a/patches/0284-arm64-renesas-Add-Renesas-R8A77970-Kconfig-support.patch b/patches/0284-arm64-renesas-Add-Renesas-R8A77970-Kconfig-support.patch
new file mode 100644
index 0000000..d0c2864
--- /dev/null
+++ b/patches/0284-arm64-renesas-Add-Renesas-R8A77970-Kconfig-support.patch
@@ -0,0 +1,37 @@
+From c78a1c56f0f58fa7962972ee9c8f958c8077fb90 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 25 Aug 2017 14:56:50 +0200
+Subject: [PATCH 0284/1795] arm64: renesas: Add Renesas R8A77970 Kconfig
+ support
+
+Add a configuration option for the R-Car V3M SoC.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit a6d21c0940490a343c6894bd78601be9e0e36f45)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm64/Kconfig.platforms | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
+index 456d21542250..b4da79327fe0 100644
+--- a/arch/arm64/Kconfig.platforms
++++ b/arch/arm64/Kconfig.platforms
+@@ -185,6 +185,12 @@ config ARCH_R8A7796
+ help
+ This enables support for the Renesas R-Car M3-W SoC.
+
++config ARCH_R8A77970
++ bool "Renesas R-Car V3M SoC Platform"
++ depends on ARCH_RENESAS
++ help
++ This enables support for the Renesas R-Car V3M SoC.
++
+ config ARCH_R8A77995
+ bool "Renesas R-Car D3 SoC Platform"
+ depends on ARCH_RENESAS
+--
+2.19.0
+
diff --git a/patches/0285-media-v4l-async-Remove-re-probing-support.patch b/patches/0285-media-v4l-async-Remove-re-probing-support.patch
new file mode 100644
index 0000000..19fb4c2
--- /dev/null
+++ b/patches/0285-media-v4l-async-Remove-re-probing-support.patch
@@ -0,0 +1,124 @@
+From 45d68b403db35ae5889cf74783cecbb507847630 Mon Sep 17 00:00:00 2001
+From: Sakari Ailus <sakari.ailus@linux.intel.com>
+Date: Tue, 5 Sep 2017 08:11:59 -0400
+Subject: [PATCH 0285/1795] media: v4l: async: Remove re-probing support
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Remove V4L2 async re-probing support. The re-probing support has been
+there to support cases where the sub-devices require resources provided by
+the main driver's hardware to function, such as clocks.
+
+Reprobing has allowed unbinding and again binding the main driver without
+explicitly unbinding the sub-device drivers. This is certainly not a
+common need, and the responsibility will be the user's going forward.
+
+An alternative could have been to introduce notifier specific locks.
+Considering the complexity of the re-probing and that it isn't really a
+solution to a problem but a workaround, remove re-probing instead.
+
+If there is a need to support the clock provider unregister/register cycle
+while keeping the clock references in the consumers in the future, this
+should be implemented in the clock framework instead, not in V4L2.
+
+Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
+Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
+Acked-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit de8dd7b2afc3108a0dddd70f0fd897ab89e141ed)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/media/v4l2-core/v4l2-async.c | 54 +---------------------------
+ 1 file changed, 1 insertion(+), 53 deletions(-)
+
+diff --git a/drivers/media/v4l2-core/v4l2-async.c b/drivers/media/v4l2-core/v4l2-async.c
+index e67aeecd674d..ca77728077db 100644
+--- a/drivers/media/v4l2-core/v4l2-async.c
++++ b/drivers/media/v4l2-core/v4l2-async.c
+@@ -199,78 +199,26 @@ EXPORT_SYMBOL(v4l2_async_notifier_register);
+ void v4l2_async_notifier_unregister(struct v4l2_async_notifier *notifier)
+ {
+ struct v4l2_subdev *sd, *tmp;
+- unsigned int notif_n_subdev = notifier->num_subdevs;
+- unsigned int n_subdev = min(notif_n_subdev, V4L2_MAX_SUBDEVS);
+- struct device **dev;
+- int i = 0;
+
+ if (!notifier->v4l2_dev)
+ return;
+
+- dev = kvmalloc_array(n_subdev, sizeof(*dev), GFP_KERNEL);
+- if (!dev) {
+- dev_err(notifier->v4l2_dev->dev,
+- "Failed to allocate device cache!\n");
+- }
+-
+ mutex_lock(&list_lock);
+
+ list_del(¬ifier->list);
+
+ list_for_each_entry_safe(sd, tmp, ¬ifier->done, async_list) {
+- struct device *d;
+-
+- d = get_device(sd->dev);
+-
+ v4l2_async_cleanup(sd);
+
+- /* If we handled USB devices, we'd have to lock the parent too */
+- device_release_driver(d);
+-
+ if (notifier->unbind)
+ notifier->unbind(notifier, sd, sd->asd);
+
+- /*
+- * Store device at the device cache, in order to call
+- * put_device() on the final step
+- */
+- if (dev)
+- dev[i++] = d;
+- else
+- put_device(d);
++ list_move(&sd->async_list, &subdev_list);
+ }
+
+ mutex_unlock(&list_lock);
+
+- /*
+- * Call device_attach() to reprobe devices
+- *
+- * NOTE: If dev allocation fails, i is 0, and the whole loop won't be
+- * executed.
+- */
+- while (i--) {
+- struct device *d = dev[i];
+-
+- if (d && device_attach(d) < 0) {
+- const char *name = "(none)";
+- int lock = device_trylock(d);
+-
+- if (lock && d->driver)
+- name = d->driver->name;
+- dev_err(d, "Failed to re-probe to %s\n", name);
+- if (lock)
+- device_unlock(d);
+- }
+- put_device(d);
+- }
+- kvfree(dev);
+-
+ notifier->v4l2_dev = NULL;
+-
+- /*
+- * Don't care about the waiting list, it is initialised and populated
+- * upon notifier registration.
+- */
+ }
+ EXPORT_SYMBOL(v4l2_async_notifier_unregister);
+
+--
+2.19.0
+
diff --git a/patches/0286-media-v4l-async-Don-t-set-sd-dev-NULL-in-v4l2_async_.patch b/patches/0286-media-v4l-async-Don-t-set-sd-dev-NULL-in-v4l2_async_.patch
new file mode 100644
index 0000000..b054d3c
--- /dev/null
+++ b/patches/0286-media-v4l-async-Don-t-set-sd-dev-NULL-in-v4l2_async_.patch
@@ -0,0 +1,40 @@
+From 7bec44f514a003810212fdf6e101ee50ee42a8db Mon Sep 17 00:00:00 2001
+From: Sakari Ailus <sakari.ailus@linux.intel.com>
+Date: Tue, 3 Oct 2017 07:10:41 -0400
+Subject: [PATCH 0286/1795] media: v4l: async: Don't set sd->dev NULL in
+ v4l2_async_cleanup
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+v4l2_async_cleanup() is called when the async sub-device is unbound from
+the media device. As the pointer is set by the driver registering the
+async sub-device, leave the pointer as set by the driver.
+
+Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
+Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
+Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
+Acked-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit 99b7a995a4a02522292ea6313bd626a33fb0e037)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/media/v4l2-core/v4l2-async.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/drivers/media/v4l2-core/v4l2-async.c b/drivers/media/v4l2-core/v4l2-async.c
+index ca77728077db..590fbc9e63a9 100644
+--- a/drivers/media/v4l2-core/v4l2-async.c
++++ b/drivers/media/v4l2-core/v4l2-async.c
+@@ -135,7 +135,6 @@ static void v4l2_async_cleanup(struct v4l2_subdev *sd)
+ /* Subdevice driver will reprobe and put the subdev back onto the list */
+ list_del_init(&sd->async_list);
+ sd->asd = NULL;
+- sd->dev = NULL;
+ }
+
+ int v4l2_async_notifier_register(struct v4l2_device *v4l2_dev,
+--
+2.19.0
+
diff --git a/patches/0287-media-v4l-async-fix-unbind-error-in-v4l2_async_notif.patch b/patches/0287-media-v4l-async-fix-unbind-error-in-v4l2_async_notif.patch
new file mode 100644
index 0000000..7f9c7cc
--- /dev/null
+++ b/patches/0287-media-v4l-async-fix-unbind-error-in-v4l2_async_notif.patch
@@ -0,0 +1,61 @@
+From 56b4b2d2a05140a3f3d68ec0573cb29e2177a364 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
+ <niklas.soderlund+renesas@ragnatech.se>
+Date: Mon, 2 Oct 2017 16:16:52 -0400
+Subject: [PATCH 0287/1795] media: v4l: async: fix unbind error in
+ v4l2_async_notifier_unregister()
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The call to v4l2_async_cleanup() will set sd->asd to NULL so passing it to
+notifier->unbind() has no effect and leaves the notifier confused. Call
+the unbind() callback prior to cleaning up the subdevice to avoid this.
+
+Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
+Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
+Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit 633d185b7239a4b342bab4cc15a414f7d74635ad)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/media/v4l2-core/v4l2-async.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/media/v4l2-core/v4l2-async.c b/drivers/media/v4l2-core/v4l2-async.c
+index 590fbc9e63a9..325ec4062b4f 100644
+--- a/drivers/media/v4l2-core/v4l2-async.c
++++ b/drivers/media/v4l2-core/v4l2-async.c
+@@ -207,11 +207,11 @@ void v4l2_async_notifier_unregister(struct v4l2_async_notifier *notifier)
+ list_del(¬ifier->list);
+
+ list_for_each_entry_safe(sd, tmp, ¬ifier->done, async_list) {
+- v4l2_async_cleanup(sd);
+-
+ if (notifier->unbind)
+ notifier->unbind(notifier, sd, sd->asd);
+
++ v4l2_async_cleanup(sd);
++
+ list_move(&sd->async_list, &subdev_list);
+ }
+
+@@ -299,11 +299,11 @@ void v4l2_async_unregister_subdev(struct v4l2_subdev *sd)
+
+ list_add(&sd->asd->list, ¬ifier->waiting);
+
+- v4l2_async_cleanup(sd);
+-
+ if (notifier->unbind)
+ notifier->unbind(notifier, sd, sd->asd);
+
++ v4l2_async_cleanup(sd);
++
+ mutex_unlock(&list_lock);
+ }
+ EXPORT_SYMBOL(v4l2_async_unregister_subdev);
+--
+2.19.0
+
diff --git a/patches/0288-media-v4l-async-Fix-notifier-complete-callback-error.patch b/patches/0288-media-v4l-async-Fix-notifier-complete-callback-error.patch
new file mode 100644
index 0000000..821eac6
--- /dev/null
+++ b/patches/0288-media-v4l-async-Fix-notifier-complete-callback-error.patch
@@ -0,0 +1,179 @@
+From f0d3311fc01ce963aed5c4e6ca4136b05bbd8860 Mon Sep 17 00:00:00 2001
+From: Sakari Ailus <sakari.ailus@linux.intel.com>
+Date: Mon, 2 Oct 2017 06:24:54 -0400
+Subject: [PATCH 0288/1795] media: v4l: async: Fix notifier complete callback
+ error handling
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The notifier complete callback may return an error. This error code was
+simply returned to the caller but never handled properly.
+
+Move calling the complete callback function to the caller from
+v4l2_async_test_notify and undo the work that was done either in async
+sub-device or async notifier registration.
+
+Reported-by: Russell King <rmk+kernel@armlinux.org.uk>
+Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
+Acked-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit fb45f436b8186cafc95939087ce1dc565be26c3d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/media/v4l2-core/v4l2-async.c | 78 +++++++++++++++++++++-------
+ 1 file changed, 60 insertions(+), 18 deletions(-)
+
+diff --git a/drivers/media/v4l2-core/v4l2-async.c b/drivers/media/v4l2-core/v4l2-async.c
+index 325ec4062b4f..e36d6274a692 100644
+--- a/drivers/media/v4l2-core/v4l2-async.c
++++ b/drivers/media/v4l2-core/v4l2-async.c
+@@ -123,9 +123,6 @@ static int v4l2_async_test_notify(struct v4l2_async_notifier *notifier,
+ /* Move from the global subdevice list to notifier's done */
+ list_move(&sd->async_list, ¬ifier->done);
+
+- if (list_empty(¬ifier->waiting) && notifier->complete)
+- return notifier->complete(notifier);
+-
+ return 0;
+ }
+
+@@ -137,11 +134,27 @@ static void v4l2_async_cleanup(struct v4l2_subdev *sd)
+ sd->asd = NULL;
+ }
+
++static void v4l2_async_notifier_unbind_all_subdevs(
++ struct v4l2_async_notifier *notifier)
++{
++ struct v4l2_subdev *sd, *tmp;
++
++ list_for_each_entry_safe(sd, tmp, ¬ifier->done, async_list) {
++ if (notifier->unbind)
++ notifier->unbind(notifier, sd, sd->asd);
++
++ v4l2_async_cleanup(sd);
++
++ list_move(&sd->async_list, &subdev_list);
++ }
++}
++
+ int v4l2_async_notifier_register(struct v4l2_device *v4l2_dev,
+ struct v4l2_async_notifier *notifier)
+ {
+ struct v4l2_subdev *sd, *tmp;
+ struct v4l2_async_subdev *asd;
++ int ret;
+ int i;
+
+ if (!v4l2_dev || !notifier->num_subdevs ||
+@@ -186,19 +199,30 @@ int v4l2_async_notifier_register(struct v4l2_device *v4l2_dev,
+ }
+ }
+
++ if (list_empty(¬ifier->waiting) && notifier->complete) {
++ ret = notifier->complete(notifier);
++ if (ret)
++ goto err_complete;
++ }
++
+ /* Keep also completed notifiers on the list */
+ list_add(¬ifier->list, ¬ifier_list);
+
+ mutex_unlock(&list_lock);
+
+ return 0;
++
++err_complete:
++ v4l2_async_notifier_unbind_all_subdevs(notifier);
++
++ mutex_unlock(&list_lock);
++
++ return ret;
+ }
+ EXPORT_SYMBOL(v4l2_async_notifier_register);
+
+ void v4l2_async_notifier_unregister(struct v4l2_async_notifier *notifier)
+ {
+- struct v4l2_subdev *sd, *tmp;
+-
+ if (!notifier->v4l2_dev)
+ return;
+
+@@ -206,14 +230,7 @@ void v4l2_async_notifier_unregister(struct v4l2_async_notifier *notifier)
+
+ list_del(¬ifier->list);
+
+- list_for_each_entry_safe(sd, tmp, ¬ifier->done, async_list) {
+- if (notifier->unbind)
+- notifier->unbind(notifier, sd, sd->asd);
+-
+- v4l2_async_cleanup(sd);
+-
+- list_move(&sd->async_list, &subdev_list);
+- }
++ v4l2_async_notifier_unbind_all_subdevs(notifier);
+
+ mutex_unlock(&list_lock);
+
+@@ -254,6 +271,7 @@ EXPORT_SYMBOL_GPL(v4l2_async_notifier_cleanup);
+ int v4l2_async_register_subdev(struct v4l2_subdev *sd)
+ {
+ struct v4l2_async_notifier *notifier;
++ int ret;
+
+ /*
+ * No reference taken. The reference is held by the device
+@@ -269,19 +287,43 @@ int v4l2_async_register_subdev(struct v4l2_subdev *sd)
+
+ list_for_each_entry(notifier, ¬ifier_list, list) {
+ struct v4l2_async_subdev *asd = v4l2_async_belongs(notifier, sd);
+- if (asd) {
+- int ret = v4l2_async_test_notify(notifier, sd, asd);
+- mutex_unlock(&list_lock);
+- return ret;
+- }
++ int ret;
++
++ if (!asd)
++ continue;
++
++ ret = v4l2_async_test_notify(notifier, sd, asd);
++ if (ret)
++ goto err_unlock;
++
++ if (!list_empty(¬ifier->waiting) || !notifier->complete)
++ goto out_unlock;
++
++ ret = notifier->complete(notifier);
++ if (ret)
++ goto err_cleanup;
++
++ goto out_unlock;
+ }
+
+ /* None matched, wait for hot-plugging */
+ list_add(&sd->async_list, &subdev_list);
+
++out_unlock:
+ mutex_unlock(&list_lock);
+
+ return 0;
++
++err_cleanup:
++ if (notifier->unbind)
++ notifier->unbind(notifier, sd, sd->asd);
++
++ v4l2_async_cleanup(sd);
++
++err_unlock:
++ mutex_unlock(&list_lock);
++
++ return ret;
+ }
+ EXPORT_SYMBOL(v4l2_async_register_subdev);
+
+--
+2.19.0
+
diff --git a/patches/0289-media-v4l-async-Correctly-serialise-async-sub-device.patch b/patches/0289-media-v4l-async-Correctly-serialise-async-sub-device.patch
new file mode 100644
index 0000000..015d027
--- /dev/null
+++ b/patches/0289-media-v4l-async-Correctly-serialise-async-sub-device.patch
@@ -0,0 +1,63 @@
+From 5b1369c3e7b25db8d31afb042ab8b30810a20dfa Mon Sep 17 00:00:00 2001
+From: Sakari Ailus <sakari.ailus@linux.intel.com>
+Date: Tue, 3 Oct 2017 02:26:32 -0400
+Subject: [PATCH 0289/1795] media: v4l: async: Correctly serialise async
+ sub-device unregistration
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The check whether an async sub-device is bound to a notifier was performed
+without list_lock held, making it possible for another process to
+unbind the async sub-device before the sub-device unregistration function
+proceeds to take the lock.
+
+Fix this by first acquiring the lock and then proceeding with the check.
+
+Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
+Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
+Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
+Acked-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit 7fc4fdb9e1bd821c0bd39543d233ac5246aef2de)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/media/v4l2-core/v4l2-async.c | 18 +++++++-----------
+ 1 file changed, 7 insertions(+), 11 deletions(-)
+
+diff --git a/drivers/media/v4l2-core/v4l2-async.c b/drivers/media/v4l2-core/v4l2-async.c
+index e36d6274a692..cd0a716a3a45 100644
+--- a/drivers/media/v4l2-core/v4l2-async.c
++++ b/drivers/media/v4l2-core/v4l2-async.c
+@@ -329,20 +329,16 @@ EXPORT_SYMBOL(v4l2_async_register_subdev);
+
+ void v4l2_async_unregister_subdev(struct v4l2_subdev *sd)
+ {
+- struct v4l2_async_notifier *notifier = sd->notifier;
+-
+- if (!sd->asd) {
+- if (!list_empty(&sd->async_list))
+- v4l2_async_cleanup(sd);
+- return;
+- }
+-
+ mutex_lock(&list_lock);
+
+- list_add(&sd->asd->list, ¬ifier->waiting);
++ if (sd->asd) {
++ struct v4l2_async_notifier *notifier = sd->notifier;
+
+- if (notifier->unbind)
+- notifier->unbind(notifier, sd, sd->asd);
++ list_add(&sd->asd->list, ¬ifier->waiting);
++
++ if (notifier->unbind)
++ notifier->unbind(notifier, sd, sd->asd);
++ }
+
+ v4l2_async_cleanup(sd);
+
+--
+2.19.0
+
diff --git a/patches/0290-media-v4l-async-Use-more-intuitive-names-for-interna.patch b/patches/0290-media-v4l-async-Use-more-intuitive-names-for-interna.patch
new file mode 100644
index 0000000..e50623c
--- /dev/null
+++ b/patches/0290-media-v4l-async-Use-more-intuitive-names-for-interna.patch
@@ -0,0 +1,92 @@
+From 9d6b90cedd232febcabb6ec121f5869192ec4183 Mon Sep 17 00:00:00 2001
+From: Sakari Ailus <sakari.ailus@linux.intel.com>
+Date: Mon, 4 Sep 2017 12:44:39 -0400
+Subject: [PATCH 0290/1795] media: v4l: async: Use more intuitive names for
+ internal functions
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Rename internal functions to make the names of the functions better
+describe what they do.
+
+ Old name New name
+ v4l2_async_test_notify v4l2_async_match_notify
+ v4l2_async_belongs v4l2_async_find_match
+
+Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
+Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
+Acked-by: Pavel Machek <pavel@ucw.cz>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
+Acked-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit c8114d90707d04922a8f23345a88eb6baa19424f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/media/v4l2-core/v4l2-async.c | 19 ++++++++++---------
+ 1 file changed, 10 insertions(+), 9 deletions(-)
+
+diff --git a/drivers/media/v4l2-core/v4l2-async.c b/drivers/media/v4l2-core/v4l2-async.c
+index cd0a716a3a45..46aebfc75e43 100644
+--- a/drivers/media/v4l2-core/v4l2-async.c
++++ b/drivers/media/v4l2-core/v4l2-async.c
+@@ -61,8 +61,8 @@ static LIST_HEAD(subdev_list);
+ static LIST_HEAD(notifier_list);
+ static DEFINE_MUTEX(list_lock);
+
+-static struct v4l2_async_subdev *v4l2_async_belongs(struct v4l2_async_notifier *notifier,
+- struct v4l2_subdev *sd)
++static struct v4l2_async_subdev *v4l2_async_find_match(
++ struct v4l2_async_notifier *notifier, struct v4l2_subdev *sd)
+ {
+ bool (*match)(struct v4l2_subdev *, struct v4l2_async_subdev *);
+ struct v4l2_async_subdev *asd;
+@@ -96,9 +96,9 @@ static struct v4l2_async_subdev *v4l2_async_belongs(struct v4l2_async_notifier *
+ return NULL;
+ }
+
+-static int v4l2_async_test_notify(struct v4l2_async_notifier *notifier,
+- struct v4l2_subdev *sd,
+- struct v4l2_async_subdev *asd)
++static int v4l2_async_match_notify(struct v4l2_async_notifier *notifier,
++ struct v4l2_subdev *sd,
++ struct v4l2_async_subdev *asd)
+ {
+ int ret;
+
+@@ -188,11 +188,11 @@ int v4l2_async_notifier_register(struct v4l2_device *v4l2_dev,
+ list_for_each_entry_safe(sd, tmp, &subdev_list, async_list) {
+ int ret;
+
+- asd = v4l2_async_belongs(notifier, sd);
++ asd = v4l2_async_find_match(notifier, sd);
+ if (!asd)
+ continue;
+
+- ret = v4l2_async_test_notify(notifier, sd, asd);
++ ret = v4l2_async_match_notify(notifier, sd, asd);
+ if (ret < 0) {
+ mutex_unlock(&list_lock);
+ return ret;
+@@ -286,13 +286,14 @@ int v4l2_async_register_subdev(struct v4l2_subdev *sd)
+ INIT_LIST_HEAD(&sd->async_list);
+
+ list_for_each_entry(notifier, ¬ifier_list, list) {
+- struct v4l2_async_subdev *asd = v4l2_async_belongs(notifier, sd);
++ struct v4l2_async_subdev *asd = v4l2_async_find_match(notifier,
++ sd);
+ int ret;
+
+ if (!asd)
+ continue;
+
+- ret = v4l2_async_test_notify(notifier, sd, asd);
++ ret = v4l2_async_match_notify(notifier, sd, asd);
+ if (ret)
+ goto err_unlock;
+
+--
+2.19.0
+
diff --git a/patches/0291-media-v4l-async-Move-async-subdev-notifier-operation.patch b/patches/0291-media-v4l-async-Move-async-subdev-notifier-operation.patch
new file mode 100644
index 0000000..68ee87d
--- /dev/null
+++ b/patches/0291-media-v4l-async-Move-async-subdev-notifier-operation.patch
@@ -0,0 +1,637 @@
+From 157fa333ce17664fadc4a0dfa2435ac90b2efb5e Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Date: Wed, 30 Aug 2017 13:18:04 -0400
+Subject: [PATCH 0291/1795] media: v4l: async: Move async subdev notifier
+ operations to a separate structure
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The async subdev notifier .bound(), .unbind() and .complete() operations
+are function pointers stored directly in the v4l2_async_subdev
+structure. As the structure isn't immutable, this creates a potential
+security risk as the function pointers are mutable.
+
+To fix this, move the function pointers to a new
+v4l2_async_subdev_operations structure that can be made const in
+drivers.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
+Acked-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit b6ee3f0dcf43dc3e8dbbe9be9c4e728c8d52f1ba)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/media/platform/am437x/am437x-vpfe.c | 8 +++--
+ drivers/media/platform/atmel/atmel-isc.c | 10 +++++--
+ drivers/media/platform/atmel/atmel-isi.c | 10 +++++--
+ drivers/media/platform/davinci/vpif_capture.c | 8 +++--
+ drivers/media/platform/davinci/vpif_display.c | 8 +++--
+ drivers/media/platform/exynos4-is/media-dev.c | 8 +++--
+ drivers/media/platform/omap3isp/isp.c | 6 +++-
+ drivers/media/platform/pxa_camera.c | 8 +++--
+ .../media/platform/qcom/camss-8x16/camss.c | 8 +++--
+ drivers/media/platform/rcar-vin/rcar-core.c | 10 +++++--
+ drivers/media/platform/rcar_drif.c | 10 +++++--
+ .../media/platform/soc_camera/soc_camera.c | 14 +++++----
+ drivers/media/platform/stm32/stm32-dcmi.c | 10 +++++--
+ drivers/media/platform/ti-vpe/cal.c | 8 +++--
+ drivers/media/platform/xilinx/xilinx-vipp.c | 8 +++--
+ drivers/media/v4l2-core/v4l2-async.c | 30 +++++++++----------
+ drivers/staging/media/imx/imx-media-dev.c | 8 +++--
+ include/media/v4l2-async.h | 29 +++++++++++-------
+ 18 files changed, 135 insertions(+), 66 deletions(-)
+
+diff --git a/drivers/media/platform/am437x/am437x-vpfe.c b/drivers/media/platform/am437x/am437x-vpfe.c
+index dfcc484cab89..0997c640191d 100644
+--- a/drivers/media/platform/am437x/am437x-vpfe.c
++++ b/drivers/media/platform/am437x/am437x-vpfe.c
+@@ -2417,6 +2417,11 @@ static int vpfe_async_complete(struct v4l2_async_notifier *notifier)
+ return vpfe_probe_complete(vpfe);
+ }
+
++static const struct v4l2_async_notifier_operations vpfe_async_ops = {
++ .bound = vpfe_async_bound,
++ .complete = vpfe_async_complete,
++};
++
+ static struct vpfe_config *
+ vpfe_get_pdata(struct platform_device *pdev)
+ {
+@@ -2590,8 +2595,7 @@ static int vpfe_probe(struct platform_device *pdev)
+
+ vpfe->notifier.subdevs = vpfe->cfg->asd;
+ vpfe->notifier.num_subdevs = ARRAY_SIZE(vpfe->cfg->asd);
+- vpfe->notifier.bound = vpfe_async_bound;
+- vpfe->notifier.complete = vpfe_async_complete;
++ vpfe->notifier.ops = &vpfe_async_ops;
+ ret = v4l2_async_notifier_register(&vpfe->v4l2_dev,
+ &vpfe->notifier);
+ if (ret) {
+diff --git a/drivers/media/platform/atmel/atmel-isc.c b/drivers/media/platform/atmel/atmel-isc.c
+index d7103c5f92c3..48544c4137cb 100644
+--- a/drivers/media/platform/atmel/atmel-isc.c
++++ b/drivers/media/platform/atmel/atmel-isc.c
+@@ -1639,6 +1639,12 @@ static int isc_async_complete(struct v4l2_async_notifier *notifier)
+ return 0;
+ }
+
++static const struct v4l2_async_notifier_operations isc_async_ops = {
++ .bound = isc_async_bound,
++ .unbind = isc_async_unbind,
++ .complete = isc_async_complete,
++};
++
+ static void isc_subdev_cleanup(struct isc_device *isc)
+ {
+ struct isc_subdev_entity *subdev_entity;
+@@ -1851,9 +1857,7 @@ static int atmel_isc_probe(struct platform_device *pdev)
+ list_for_each_entry(subdev_entity, &isc->subdev_entities, list) {
+ subdev_entity->notifier.subdevs = &subdev_entity->asd;
+ subdev_entity->notifier.num_subdevs = 1;
+- subdev_entity->notifier.bound = isc_async_bound;
+- subdev_entity->notifier.unbind = isc_async_unbind;
+- subdev_entity->notifier.complete = isc_async_complete;
++ subdev_entity->notifier.ops = &isc_async_ops;
+
+ ret = v4l2_async_notifier_register(&isc->v4l2_dev,
+ &subdev_entity->notifier);
+diff --git a/drivers/media/platform/atmel/atmel-isi.c b/drivers/media/platform/atmel/atmel-isi.c
+index 891fa2505efa..eadbf9def358 100644
+--- a/drivers/media/platform/atmel/atmel-isi.c
++++ b/drivers/media/platform/atmel/atmel-isi.c
+@@ -1105,6 +1105,12 @@ static int isi_graph_notify_bound(struct v4l2_async_notifier *notifier,
+ return 0;
+ }
+
++static const struct v4l2_async_notifier_operations isi_graph_notify_ops = {
++ .bound = isi_graph_notify_bound,
++ .unbind = isi_graph_notify_unbind,
++ .complete = isi_graph_notify_complete,
++};
++
+ static int isi_graph_parse(struct atmel_isi *isi, struct device_node *node)
+ {
+ struct device_node *ep = NULL;
+@@ -1152,9 +1158,7 @@ static int isi_graph_init(struct atmel_isi *isi)
+
+ isi->notifier.subdevs = subdevs;
+ isi->notifier.num_subdevs = 1;
+- isi->notifier.bound = isi_graph_notify_bound;
+- isi->notifier.unbind = isi_graph_notify_unbind;
+- isi->notifier.complete = isi_graph_notify_complete;
++ isi->notifier.ops = &isi_graph_notify_ops;
+
+ ret = v4l2_async_notifier_register(&isi->v4l2_dev, &isi->notifier);
+ if (ret < 0) {
+diff --git a/drivers/media/platform/davinci/vpif_capture.c b/drivers/media/platform/davinci/vpif_capture.c
+index dc8fc2120b63..4d60176caf6d 100644
+--- a/drivers/media/platform/davinci/vpif_capture.c
++++ b/drivers/media/platform/davinci/vpif_capture.c
+@@ -1500,6 +1500,11 @@ static int vpif_async_complete(struct v4l2_async_notifier *notifier)
+ return vpif_probe_complete();
+ }
+
++static const struct v4l2_async_notifier_operations vpif_async_ops = {
++ .bound = vpif_async_bound,
++ .complete = vpif_async_complete,
++};
++
+ static struct vpif_capture_config *
+ vpif_capture_get_pdata(struct platform_device *pdev)
+ {
+@@ -1693,8 +1698,7 @@ static __init int vpif_probe(struct platform_device *pdev)
+ } else {
+ vpif_obj.notifier.subdevs = vpif_obj.config->asd;
+ vpif_obj.notifier.num_subdevs = vpif_obj.config->asd_sizes[0];
+- vpif_obj.notifier.bound = vpif_async_bound;
+- vpif_obj.notifier.complete = vpif_async_complete;
++ vpif_obj.notifier.ops = &vpif_async_ops;
+ err = v4l2_async_notifier_register(&vpif_obj.v4l2_dev,
+ &vpif_obj.notifier);
+ if (err) {
+diff --git a/drivers/media/platform/davinci/vpif_display.c b/drivers/media/platform/davinci/vpif_display.c
+index 56fe4e5b396e..ff2f75a328c9 100644
+--- a/drivers/media/platform/davinci/vpif_display.c
++++ b/drivers/media/platform/davinci/vpif_display.c
+@@ -1232,6 +1232,11 @@ static int vpif_async_complete(struct v4l2_async_notifier *notifier)
+ return vpif_probe_complete();
+ }
+
++static const struct v4l2_async_notifier_operations vpif_async_ops = {
++ .bound = vpif_async_bound,
++ .complete = vpif_async_complete,
++};
++
+ /*
+ * vpif_probe: This function creates device entries by register itself to the
+ * V4L2 driver and initializes fields of each channel objects
+@@ -1313,8 +1318,7 @@ static __init int vpif_probe(struct platform_device *pdev)
+ } else {
+ vpif_obj.notifier.subdevs = vpif_obj.config->asd;
+ vpif_obj.notifier.num_subdevs = vpif_obj.config->asd_sizes[0];
+- vpif_obj.notifier.bound = vpif_async_bound;
+- vpif_obj.notifier.complete = vpif_async_complete;
++ vpif_obj.notifier.ops = &vpif_async_ops;
+ err = v4l2_async_notifier_register(&vpif_obj.v4l2_dev,
+ &vpif_obj.notifier);
+ if (err) {
+diff --git a/drivers/media/platform/exynos4-is/media-dev.c b/drivers/media/platform/exynos4-is/media-dev.c
+index d4656d5175d7..c15596b56dc9 100644
+--- a/drivers/media/platform/exynos4-is/media-dev.c
++++ b/drivers/media/platform/exynos4-is/media-dev.c
+@@ -1405,6 +1405,11 @@ static int subdev_notifier_complete(struct v4l2_async_notifier *notifier)
+ return media_device_register(&fmd->media_dev);
+ }
+
++static const struct v4l2_async_notifier_operations subdev_notifier_ops = {
++ .bound = subdev_notifier_bound,
++ .complete = subdev_notifier_complete,
++};
++
+ static int fimc_md_probe(struct platform_device *pdev)
+ {
+ struct device *dev = &pdev->dev;
+@@ -1479,8 +1484,7 @@ static int fimc_md_probe(struct platform_device *pdev)
+ if (fmd->num_sensors > 0) {
+ fmd->subdev_notifier.subdevs = fmd->async_subdevs;
+ fmd->subdev_notifier.num_subdevs = fmd->num_sensors;
+- fmd->subdev_notifier.bound = subdev_notifier_bound;
+- fmd->subdev_notifier.complete = subdev_notifier_complete;
++ fmd->subdev_notifier.ops = &subdev_notifier_ops;
+ fmd->num_sensors = 0;
+
+ ret = v4l2_async_notifier_register(&fmd->v4l2_dev,
+diff --git a/drivers/media/platform/omap3isp/isp.c b/drivers/media/platform/omap3isp/isp.c
+index 9f023bc6e1b7..8c76aa08b056 100644
+--- a/drivers/media/platform/omap3isp/isp.c
++++ b/drivers/media/platform/omap3isp/isp.c
+@@ -2218,6 +2218,10 @@ static int isp_subdev_notifier_complete(struct v4l2_async_notifier *async)
+ return media_device_register(&isp->media_dev);
+ }
+
++static const struct v4l2_async_notifier_operations isp_subdev_notifier_ops = {
++ .complete = isp_subdev_notifier_complete,
++};
++
+ /*
+ * isp_probe - Probe ISP platform device
+ * @pdev: Pointer to ISP platform device
+@@ -2386,7 +2390,7 @@ static int isp_probe(struct platform_device *pdev)
+ if (ret < 0)
+ goto error_register_entities;
+
+- isp->notifier.complete = isp_subdev_notifier_complete;
++ isp->notifier.ops = &isp_subdev_notifier_ops;
+
+ ret = v4l2_async_notifier_register(&isp->v4l2_dev, &isp->notifier);
+ if (ret)
+diff --git a/drivers/media/platform/pxa_camera.c b/drivers/media/platform/pxa_camera.c
+index edca993c2b1f..9d3f0cb1d95a 100644
+--- a/drivers/media/platform/pxa_camera.c
++++ b/drivers/media/platform/pxa_camera.c
+@@ -2221,6 +2221,11 @@ static void pxa_camera_sensor_unbind(struct v4l2_async_notifier *notifier,
+ mutex_unlock(&pcdev->mlock);
+ }
+
++static const struct v4l2_async_notifier_operations pxa_camera_sensor_ops = {
++ .bound = pxa_camera_sensor_bound,
++ .unbind = pxa_camera_sensor_unbind,
++};
++
+ /*
+ * Driver probe, remove, suspend and resume operations
+ */
+@@ -2489,8 +2494,7 @@ static int pxa_camera_probe(struct platform_device *pdev)
+ pcdev->asds[0] = &pcdev->asd;
+ pcdev->notifier.subdevs = pcdev->asds;
+ pcdev->notifier.num_subdevs = 1;
+- pcdev->notifier.bound = pxa_camera_sensor_bound;
+- pcdev->notifier.unbind = pxa_camera_sensor_unbind;
++ pcdev->notifier.ops = &pxa_camera_sensor_ops;
+
+ if (!of_have_populated_dt())
+ pcdev->asd.match_type = V4L2_ASYNC_MATCH_I2C;
+diff --git a/drivers/media/platform/qcom/camss-8x16/camss.c b/drivers/media/platform/qcom/camss-8x16/camss.c
+index a3760b5dd1d1..390a42c17b66 100644
+--- a/drivers/media/platform/qcom/camss-8x16/camss.c
++++ b/drivers/media/platform/qcom/camss-8x16/camss.c
+@@ -601,6 +601,11 @@ static int camss_subdev_notifier_complete(struct v4l2_async_notifier *async)
+ return media_device_register(&camss->media_dev);
+ }
+
++static const struct v4l2_async_notifier_operations camss_subdev_notifier_ops = {
++ .bound = camss_subdev_notifier_bound,
++ .complete = camss_subdev_notifier_complete,
++};
++
+ static const struct media_device_ops camss_media_ops = {
+ .link_notify = v4l2_pipeline_link_notify,
+ };
+@@ -655,8 +660,7 @@ static int camss_probe(struct platform_device *pdev)
+ goto err_register_entities;
+
+ if (camss->notifier.num_subdevs) {
+- camss->notifier.bound = camss_subdev_notifier_bound;
+- camss->notifier.complete = camss_subdev_notifier_complete;
++ camss->notifier.ops = &camss_subdev_notifier_ops;
+
+ ret = v4l2_async_notifier_register(&camss->v4l2_dev,
+ &camss->notifier);
+diff --git a/drivers/media/platform/rcar-vin/rcar-core.c b/drivers/media/platform/rcar-vin/rcar-core.c
+index 380288658601..108d776f3265 100644
+--- a/drivers/media/platform/rcar-vin/rcar-core.c
++++ b/drivers/media/platform/rcar-vin/rcar-core.c
+@@ -134,6 +134,12 @@ static int rvin_digital_notify_bound(struct v4l2_async_notifier *notifier,
+
+ return 0;
+ }
++static const struct v4l2_async_notifier_operations rvin_digital_notify_ops = {
++ .bound = rvin_digital_notify_bound,
++ .unbind = rvin_digital_notify_unbind,
++ .complete = rvin_digital_notify_complete,
++};
++
+
+ static int rvin_digital_parse_v4l2(struct device *dev,
+ struct v4l2_fwnode_endpoint *vep,
+@@ -183,9 +189,7 @@ static int rvin_digital_graph_init(struct rvin_dev *vin)
+ vin_dbg(vin, "Found digital subdevice %pOF\n",
+ to_of_node(vin->digital->asd.match.fwnode.fwnode));
+
+- vin->notifier.bound = rvin_digital_notify_bound;
+- vin->notifier.unbind = rvin_digital_notify_unbind;
+- vin->notifier.complete = rvin_digital_notify_complete;
++ vin->notifier.ops = &rvin_digital_notify_ops;
+ ret = v4l2_async_notifier_register(&vin->v4l2_dev, &vin->notifier);
+ if (ret < 0) {
+ vin_err(vin, "Notifier registration failed\n");
+diff --git a/drivers/media/platform/rcar_drif.c b/drivers/media/platform/rcar_drif.c
+index 522364ff0d5d..0b2214d6d621 100644
+--- a/drivers/media/platform/rcar_drif.c
++++ b/drivers/media/platform/rcar_drif.c
+@@ -1185,6 +1185,12 @@ static int rcar_drif_notify_complete(struct v4l2_async_notifier *notifier)
+ return ret;
+ }
+
++static const struct v4l2_async_notifier_operations rcar_drif_notify_ops = {
++ .bound = rcar_drif_notify_bound,
++ .unbind = rcar_drif_notify_unbind,
++ .complete = rcar_drif_notify_complete,
++};
++
+ /* Read endpoint properties */
+ static void rcar_drif_get_ep_properties(struct rcar_drif_sdr *sdr,
+ struct fwnode_handle *fwnode)
+@@ -1347,9 +1353,7 @@ static int rcar_drif_sdr_probe(struct rcar_drif_sdr *sdr)
+ if (ret)
+ goto error;
+
+- sdr->notifier.bound = rcar_drif_notify_bound;
+- sdr->notifier.unbind = rcar_drif_notify_unbind;
+- sdr->notifier.complete = rcar_drif_notify_complete;
++ sdr->notifier.ops = &rcar_drif_notify_ops;
+
+ /* Register notifier */
+ ret = v4l2_async_notifier_register(&sdr->v4l2_dev, &sdr->notifier);
+diff --git a/drivers/media/platform/soc_camera/soc_camera.c b/drivers/media/platform/soc_camera/soc_camera.c
+index 1f3c450c7a69..916ff68b73d4 100644
+--- a/drivers/media/platform/soc_camera/soc_camera.c
++++ b/drivers/media/platform/soc_camera/soc_camera.c
+@@ -1391,6 +1391,12 @@ static int soc_camera_async_complete(struct v4l2_async_notifier *notifier)
+ return 0;
+ }
+
++static const struct v4l2_async_notifier_operations soc_camera_async_ops = {
++ .bound = soc_camera_async_bound,
++ .unbind = soc_camera_async_unbind,
++ .complete = soc_camera_async_complete,
++};
++
+ static int scan_async_group(struct soc_camera_host *ici,
+ struct v4l2_async_subdev **asd, unsigned int size)
+ {
+@@ -1437,9 +1443,7 @@ static int scan_async_group(struct soc_camera_host *ici,
+
+ sasc->notifier.subdevs = asd;
+ sasc->notifier.num_subdevs = size;
+- sasc->notifier.bound = soc_camera_async_bound;
+- sasc->notifier.unbind = soc_camera_async_unbind;
+- sasc->notifier.complete = soc_camera_async_complete;
++ sasc->notifier.ops = &soc_camera_async_ops;
+
+ icd->sasc = sasc;
+ icd->parent = ici->v4l2_dev.dev;
+@@ -1537,9 +1541,7 @@ static int soc_of_bind(struct soc_camera_host *ici,
+
+ sasc->notifier.subdevs = &info->subdev;
+ sasc->notifier.num_subdevs = 1;
+- sasc->notifier.bound = soc_camera_async_bound;
+- sasc->notifier.unbind = soc_camera_async_unbind;
+- sasc->notifier.complete = soc_camera_async_complete;
++ sasc->notifier.ops = &soc_camera_async_ops;
+
+ icd->sasc = sasc;
+ icd->parent = ici->v4l2_dev.dev;
+diff --git a/drivers/media/platform/stm32/stm32-dcmi.c b/drivers/media/platform/stm32/stm32-dcmi.c
+index 35ba6f211b79..ac4c450a6c7d 100644
+--- a/drivers/media/platform/stm32/stm32-dcmi.c
++++ b/drivers/media/platform/stm32/stm32-dcmi.c
+@@ -1495,6 +1495,12 @@ static int dcmi_graph_notify_bound(struct v4l2_async_notifier *notifier,
+ return 0;
+ }
+
++static const struct v4l2_async_notifier_operations dcmi_graph_notify_ops = {
++ .bound = dcmi_graph_notify_bound,
++ .unbind = dcmi_graph_notify_unbind,
++ .complete = dcmi_graph_notify_complete,
++};
++
+ static int dcmi_graph_parse(struct stm32_dcmi *dcmi, struct device_node *node)
+ {
+ struct device_node *ep = NULL;
+@@ -1542,9 +1548,7 @@ static int dcmi_graph_init(struct stm32_dcmi *dcmi)
+
+ dcmi->notifier.subdevs = subdevs;
+ dcmi->notifier.num_subdevs = 1;
+- dcmi->notifier.bound = dcmi_graph_notify_bound;
+- dcmi->notifier.unbind = dcmi_graph_notify_unbind;
+- dcmi->notifier.complete = dcmi_graph_notify_complete;
++ dcmi->notifier.ops = &dcmi_graph_notify_ops;
+
+ ret = v4l2_async_notifier_register(&dcmi->v4l2_dev, &dcmi->notifier);
+ if (ret < 0) {
+diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c
+index 42e383a48ffe..8b586c864524 100644
+--- a/drivers/media/platform/ti-vpe/cal.c
++++ b/drivers/media/platform/ti-vpe/cal.c
+@@ -1522,6 +1522,11 @@ static int cal_async_complete(struct v4l2_async_notifier *notifier)
+ return 0;
+ }
+
++static const struct v4l2_async_notifier_operations cal_async_ops = {
++ .bound = cal_async_bound,
++ .complete = cal_async_complete,
++};
++
+ static int cal_complete_ctx(struct cal_ctx *ctx)
+ {
+ struct video_device *vfd;
+@@ -1736,8 +1741,7 @@ static int of_cal_create_instance(struct cal_ctx *ctx, int inst)
+ ctx->asd_list[0] = asd;
+ ctx->notifier.subdevs = ctx->asd_list;
+ ctx->notifier.num_subdevs = 1;
+- ctx->notifier.bound = cal_async_bound;
+- ctx->notifier.complete = cal_async_complete;
++ ctx->notifier.ops = &cal_async_ops;
+ ret = v4l2_async_notifier_register(&ctx->v4l2_dev,
+ &ctx->notifier);
+ if (ret) {
+diff --git a/drivers/media/platform/xilinx/xilinx-vipp.c b/drivers/media/platform/xilinx/xilinx-vipp.c
+index ebfdf334d99c..d881cf09876d 100644
+--- a/drivers/media/platform/xilinx/xilinx-vipp.c
++++ b/drivers/media/platform/xilinx/xilinx-vipp.c
+@@ -351,6 +351,11 @@ static int xvip_graph_notify_bound(struct v4l2_async_notifier *notifier,
+ return -EINVAL;
+ }
+
++static const struct v4l2_async_notifier_operations xvip_graph_notify_ops = {
++ .bound = xvip_graph_notify_bound,
++ .complete = xvip_graph_notify_complete,
++};
++
+ static int xvip_graph_parse_one(struct xvip_composite_device *xdev,
+ struct device_node *node)
+ {
+@@ -548,8 +553,7 @@ static int xvip_graph_init(struct xvip_composite_device *xdev)
+
+ xdev->notifier.subdevs = subdevs;
+ xdev->notifier.num_subdevs = num_subdevs;
+- xdev->notifier.bound = xvip_graph_notify_bound;
+- xdev->notifier.complete = xvip_graph_notify_complete;
++ xdev->notifier.ops = &xvip_graph_notify_ops;
+
+ ret = v4l2_async_notifier_register(&xdev->v4l2_dev, &xdev->notifier);
+ if (ret < 0) {
+diff --git a/drivers/media/v4l2-core/v4l2-async.c b/drivers/media/v4l2-core/v4l2-async.c
+index 46aebfc75e43..9d6fc5f25619 100644
+--- a/drivers/media/v4l2-core/v4l2-async.c
++++ b/drivers/media/v4l2-core/v4l2-async.c
+@@ -102,16 +102,16 @@ static int v4l2_async_match_notify(struct v4l2_async_notifier *notifier,
+ {
+ int ret;
+
+- if (notifier->bound) {
+- ret = notifier->bound(notifier, sd, asd);
++ if (notifier->ops->bound) {
++ ret = notifier->ops->bound(notifier, sd, asd);
+ if (ret < 0)
+ return ret;
+ }
+
+ ret = v4l2_device_register_subdev(notifier->v4l2_dev, sd);
+ if (ret < 0) {
+- if (notifier->unbind)
+- notifier->unbind(notifier, sd, asd);
++ if (notifier->ops->unbind)
++ notifier->ops->unbind(notifier, sd, asd);
+ return ret;
+ }
+
+@@ -140,9 +140,8 @@ static void v4l2_async_notifier_unbind_all_subdevs(
+ struct v4l2_subdev *sd, *tmp;
+
+ list_for_each_entry_safe(sd, tmp, ¬ifier->done, async_list) {
+- if (notifier->unbind)
+- notifier->unbind(notifier, sd, sd->asd);
+-
++ if (notifier->ops->unbind)
++ notifier->ops->unbind(notifier, sd, sd->asd);
+ v4l2_async_cleanup(sd);
+
+ list_move(&sd->async_list, &subdev_list);
+@@ -199,8 +198,8 @@ int v4l2_async_notifier_register(struct v4l2_device *v4l2_dev,
+ }
+ }
+
+- if (list_empty(¬ifier->waiting) && notifier->complete) {
+- ret = notifier->complete(notifier);
++ if (list_empty(¬ifier->waiting) && notifier->ops->complete) {
++ ret = notifier->ops->complete(notifier);
+ if (ret)
+ goto err_complete;
+ }
+@@ -297,10 +296,10 @@ int v4l2_async_register_subdev(struct v4l2_subdev *sd)
+ if (ret)
+ goto err_unlock;
+
+- if (!list_empty(¬ifier->waiting) || !notifier->complete)
++ if (!list_empty(¬ifier->waiting) || !notifier->ops->complete)
+ goto out_unlock;
+
+- ret = notifier->complete(notifier);
++ ret = notifier->ops->complete(notifier);
+ if (ret)
+ goto err_cleanup;
+
+@@ -316,9 +315,8 @@ int v4l2_async_register_subdev(struct v4l2_subdev *sd)
+ return 0;
+
+ err_cleanup:
+- if (notifier->unbind)
+- notifier->unbind(notifier, sd, sd->asd);
+-
++ if (notifier->ops->unbind)
++ notifier->ops->unbind(notifier, sd, sd->asd);
+ v4l2_async_cleanup(sd);
+
+ err_unlock:
+@@ -337,8 +335,8 @@ void v4l2_async_unregister_subdev(struct v4l2_subdev *sd)
+
+ list_add(&sd->asd->list, ¬ifier->waiting);
+
+- if (notifier->unbind)
+- notifier->unbind(notifier, sd, sd->asd);
++ if (notifier->ops->unbind)
++ notifier->ops->unbind(notifier, sd, sd->asd);
+ }
+
+ v4l2_async_cleanup(sd);
+diff --git a/drivers/staging/media/imx/imx-media-dev.c b/drivers/staging/media/imx/imx-media-dev.c
+index b55e5ebba8b4..47c4c954fed5 100644
+--- a/drivers/staging/media/imx/imx-media-dev.c
++++ b/drivers/staging/media/imx/imx-media-dev.c
+@@ -440,6 +440,11 @@ static int imx_media_probe_complete(struct v4l2_async_notifier *notifier)
+ return media_device_register(&imxmd->md);
+ }
+
++static const struct v4l2_async_notifier_operations imx_media_subdev_ops = {
++ .bound = imx_media_subdev_bound,
++ .complete = imx_media_probe_complete,
++};
++
+ /*
+ * adds controls to a video device from an entity subdevice.
+ * Continues upstream from the entity's sink pads.
+@@ -608,8 +613,7 @@ static int imx_media_probe(struct platform_device *pdev)
+
+ /* prepare the async subdev notifier and register it */
+ imxmd->subdev_notifier.subdevs = imxmd->async_ptrs;
+- imxmd->subdev_notifier.bound = imx_media_subdev_bound;
+- imxmd->subdev_notifier.complete = imx_media_probe_complete;
++ imxmd->subdev_notifier.ops = &imx_media_subdev_ops;
+ ret = v4l2_async_notifier_register(&imxmd->v4l2_dev,
+ &imxmd->subdev_notifier);
+ if (ret) {
+diff --git a/include/media/v4l2-async.h b/include/media/v4l2-async.h
+index 329aeebd1a80..68606afb5ef9 100644
+--- a/include/media/v4l2-async.h
++++ b/include/media/v4l2-async.h
+@@ -18,6 +18,7 @@ struct device;
+ struct device_node;
+ struct v4l2_device;
+ struct v4l2_subdev;
++struct v4l2_async_notifier;
+
+ /* A random max subdevice number, used to allocate an array on stack */
+ #define V4L2_MAX_SUBDEVS 128U
+@@ -78,9 +79,26 @@ struct v4l2_async_subdev {
+ struct list_head list;
+ };
+
++/**
++ * struct v4l2_async_notifier_operations - Asynchronous V4L2 notifier operations
++ * @bound: a subdevice driver has successfully probed one of the subdevices
++ * @complete: all subdevices have been probed successfully
++ * @unbind: a subdevice is leaving
++ */
++struct v4l2_async_notifier_operations {
++ int (*bound)(struct v4l2_async_notifier *notifier,
++ struct v4l2_subdev *subdev,
++ struct v4l2_async_subdev *asd);
++ int (*complete)(struct v4l2_async_notifier *notifier);
++ void (*unbind)(struct v4l2_async_notifier *notifier,
++ struct v4l2_subdev *subdev,
++ struct v4l2_async_subdev *asd);
++};
++
+ /**
+ * struct v4l2_async_notifier - v4l2_device notifier data
+ *
++ * @ops: notifier operations
+ * @num_subdevs: number of subdevices used in the subdevs array
+ * @max_subdevs: number of subdevices allocated in the subdevs array
+ * @subdevs: array of pointers to subdevice descriptors
+@@ -88,11 +106,9 @@ struct v4l2_async_subdev {
+ * @waiting: list of struct v4l2_async_subdev, waiting for their drivers
+ * @done: list of struct v4l2_subdev, already probed
+ * @list: member in a global list of notifiers
+- * @bound: a subdevice driver has successfully probed one of subdevices
+- * @complete: all subdevices have been probed successfully
+- * @unbind: a subdevice is leaving
+ */
+ struct v4l2_async_notifier {
++ const struct v4l2_async_notifier_operations *ops;
+ unsigned int num_subdevs;
+ unsigned int max_subdevs;
+ struct v4l2_async_subdev **subdevs;
+@@ -100,13 +116,6 @@ struct v4l2_async_notifier {
+ struct list_head waiting;
+ struct list_head done;
+ struct list_head list;
+- int (*bound)(struct v4l2_async_notifier *notifier,
+- struct v4l2_subdev *subdev,
+- struct v4l2_async_subdev *asd);
+- int (*complete)(struct v4l2_async_notifier *notifier);
+- void (*unbind)(struct v4l2_async_notifier *notifier,
+- struct v4l2_subdev *subdev,
+- struct v4l2_async_subdev *asd);
+ };
+
+ /**
+--
+2.19.0
+
diff --git a/patches/0292-media-v4l-async-Introduce-helpers-for-calling-async-.patch b/patches/0292-media-v4l-async-Introduce-helpers-for-calling-async-.patch
new file mode 100644
index 0000000..547578f
--- /dev/null
+++ b/patches/0292-media-v4l-async-Introduce-helpers-for-calling-async-.patch
@@ -0,0 +1,143 @@
+From d9756f22830290044e522ddeff4d5ad9f92b7d50 Mon Sep 17 00:00:00 2001
+From: Sakari Ailus <sakari.ailus@linux.intel.com>
+Date: Fri, 1 Sep 2017 08:27:32 -0400
+Subject: [PATCH 0292/1795] media: v4l: async: Introduce helpers for calling
+ async ops callbacks
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add three helper functions to call async operations callbacks. Besides
+simplifying callbacks, this allows async notifiers to have no ops set,
+i.e. it can be left NULL.
+
+Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
+Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
+Acked-by: Pavel Machek <pavel@ucw.cz>
+Acked-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit ddddc18b219ada692704c5467d16fff8c79cf287)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/media/v4l2-core/v4l2-async.c | 56 +++++++++++++++++++---------
+ 1 file changed, 39 insertions(+), 17 deletions(-)
+
+diff --git a/drivers/media/v4l2-core/v4l2-async.c b/drivers/media/v4l2-core/v4l2-async.c
+index 9d6fc5f25619..e170682dae78 100644
+--- a/drivers/media/v4l2-core/v4l2-async.c
++++ b/drivers/media/v4l2-core/v4l2-async.c
+@@ -25,6 +25,34 @@
+ #include <media/v4l2-fwnode.h>
+ #include <media/v4l2-subdev.h>
+
++static int v4l2_async_notifier_call_bound(struct v4l2_async_notifier *n,
++ struct v4l2_subdev *subdev,
++ struct v4l2_async_subdev *asd)
++{
++ if (!n->ops || !n->ops->bound)
++ return 0;
++
++ return n->ops->bound(n, subdev, asd);
++}
++
++static void v4l2_async_notifier_call_unbind(struct v4l2_async_notifier *n,
++ struct v4l2_subdev *subdev,
++ struct v4l2_async_subdev *asd)
++{
++ if (!n->ops || !n->ops->unbind)
++ return;
++
++ n->ops->unbind(n, subdev, asd);
++}
++
++static int v4l2_async_notifier_call_complete(struct v4l2_async_notifier *n)
++{
++ if (!n->ops || !n->ops->complete)
++ return 0;
++
++ return n->ops->complete(n);
++}
++
+ static bool match_i2c(struct v4l2_subdev *sd, struct v4l2_async_subdev *asd)
+ {
+ #if IS_ENABLED(CONFIG_I2C)
+@@ -102,16 +130,13 @@ static int v4l2_async_match_notify(struct v4l2_async_notifier *notifier,
+ {
+ int ret;
+
+- if (notifier->ops->bound) {
+- ret = notifier->ops->bound(notifier, sd, asd);
+- if (ret < 0)
+- return ret;
+- }
++ ret = v4l2_async_notifier_call_bound(notifier, sd, asd);
++ if (ret < 0)
++ return ret;
+
+ ret = v4l2_device_register_subdev(notifier->v4l2_dev, sd);
+ if (ret < 0) {
+- if (notifier->ops->unbind)
+- notifier->ops->unbind(notifier, sd, asd);
++ v4l2_async_notifier_call_unbind(notifier, sd, asd);
+ return ret;
+ }
+
+@@ -140,8 +165,7 @@ static void v4l2_async_notifier_unbind_all_subdevs(
+ struct v4l2_subdev *sd, *tmp;
+
+ list_for_each_entry_safe(sd, tmp, ¬ifier->done, async_list) {
+- if (notifier->ops->unbind)
+- notifier->ops->unbind(notifier, sd, sd->asd);
++ v4l2_async_notifier_call_unbind(notifier, sd, sd->asd);
+ v4l2_async_cleanup(sd);
+
+ list_move(&sd->async_list, &subdev_list);
+@@ -198,8 +222,8 @@ int v4l2_async_notifier_register(struct v4l2_device *v4l2_dev,
+ }
+ }
+
+- if (list_empty(¬ifier->waiting) && notifier->ops->complete) {
+- ret = notifier->ops->complete(notifier);
++ if (list_empty(¬ifier->waiting)) {
++ ret = v4l2_async_notifier_call_complete(notifier);
+ if (ret)
+ goto err_complete;
+ }
+@@ -296,10 +320,10 @@ int v4l2_async_register_subdev(struct v4l2_subdev *sd)
+ if (ret)
+ goto err_unlock;
+
+- if (!list_empty(¬ifier->waiting) || !notifier->ops->complete)
++ if (!list_empty(¬ifier->waiting))
+ goto out_unlock;
+
+- ret = notifier->ops->complete(notifier);
++ ret = v4l2_async_notifier_call_complete(notifier);
+ if (ret)
+ goto err_cleanup;
+
+@@ -315,8 +339,7 @@ int v4l2_async_register_subdev(struct v4l2_subdev *sd)
+ return 0;
+
+ err_cleanup:
+- if (notifier->ops->unbind)
+- notifier->ops->unbind(notifier, sd, sd->asd);
++ v4l2_async_notifier_call_unbind(notifier, sd, sd->asd);
+ v4l2_async_cleanup(sd);
+
+ err_unlock:
+@@ -335,8 +358,7 @@ void v4l2_async_unregister_subdev(struct v4l2_subdev *sd)
+
+ list_add(&sd->asd->list, ¬ifier->waiting);
+
+- if (notifier->ops->unbind)
+- notifier->ops->unbind(notifier, sd, sd->asd);
++ v4l2_async_notifier_call_unbind(notifier, sd, sd->asd);
+ }
+
+ v4l2_async_cleanup(sd);
+--
+2.19.0
+
diff --git a/patches/0293-media-v4l-async-Register-sub-devices-before-calling-.patch b/patches/0293-media-v4l-async-Register-sub-devices-before-calling-.patch
new file mode 100644
index 0000000..b3dfd55
--- /dev/null
+++ b/patches/0293-media-v4l-async-Register-sub-devices-before-calling-.patch
@@ -0,0 +1,51 @@
+From 2cc4c9fbfa694282fdc7ad1d3f3b80ebdf0fc9b8 Mon Sep 17 00:00:00 2001
+From: Sakari Ailus <sakari.ailus@linux.intel.com>
+Date: Mon, 17 Jul 2017 10:04:20 -0400
+Subject: [PATCH 0293/1795] media: v4l: async: Register sub-devices before
+ calling bound callback
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Register the sub-device before calling the notifier's bound callback.
+Doing this the other way around is problematic as the struct v4l2_device
+has not assigned for the sub-device yet and may be required by the bound
+callback.
+
+Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
+Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
+Acked-by: Pavel Machek <pavel@ucw.cz>
+Acked-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit 24def9b586349ec1ecea7989fc219e688d1d1e74)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/media/v4l2-core/v4l2-async.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/media/v4l2-core/v4l2-async.c b/drivers/media/v4l2-core/v4l2-async.c
+index e170682dae78..46db85685894 100644
+--- a/drivers/media/v4l2-core/v4l2-async.c
++++ b/drivers/media/v4l2-core/v4l2-async.c
+@@ -130,13 +130,13 @@ static int v4l2_async_match_notify(struct v4l2_async_notifier *notifier,
+ {
+ int ret;
+
+- ret = v4l2_async_notifier_call_bound(notifier, sd, asd);
++ ret = v4l2_device_register_subdev(notifier->v4l2_dev, sd);
+ if (ret < 0)
+ return ret;
+
+- ret = v4l2_device_register_subdev(notifier->v4l2_dev, sd);
++ ret = v4l2_async_notifier_call_bound(notifier, sd, asd);
+ if (ret < 0) {
+- v4l2_async_notifier_call_unbind(notifier, sd, asd);
++ v4l2_device_unregister_subdev(sd);
+ return ret;
+ }
+
+--
+2.19.0
+
diff --git a/patches/0294-media-v4l-async-Allow-async-notifier-register-call-s.patch b/patches/0294-media-v4l-async-Allow-async-notifier-register-call-s.patch
new file mode 100644
index 0000000..6ac71c2
--- /dev/null
+++ b/patches/0294-media-v4l-async-Allow-async-notifier-register-call-s.patch
@@ -0,0 +1,66 @@
+From ed4ee829e5416cb26456b7ff6730da2a9a4bb8b2 Mon Sep 17 00:00:00 2001
+From: Sakari Ailus <sakari.ailus@linux.intel.com>
+Date: Wed, 6 Sep 2017 10:48:33 -0400
+Subject: [PATCH 0294/1795] media: v4l: async: Allow async notifier register
+ call succeed with no subdevs
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The information on how many async sub-devices would be bindable to a
+notifier is typically dependent on information from platform firmware and
+it's not driver's business to be aware of that.
+
+Many V4L2 main drivers are perfectly usable (and useful) without async
+sub-devices and so if there aren't any around, just proceed call the
+notifier's complete callback immediately without registering the notifier
+itself.
+
+If a driver needs to check whether there are async sub-devices available,
+it can be done by inspecting the notifier's num_subdevs field which tells
+the number of async sub-devices.
+
+Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
+Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
+Acked-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit 479bc5a8c662e9d9de47e95ee26ebaf15f36a771)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/media/v4l2-core/v4l2-async.c | 12 ++++++++++--
+ 1 file changed, 10 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/media/v4l2-core/v4l2-async.c b/drivers/media/v4l2-core/v4l2-async.c
+index 46db85685894..1b536d68cedf 100644
+--- a/drivers/media/v4l2-core/v4l2-async.c
++++ b/drivers/media/v4l2-core/v4l2-async.c
+@@ -180,14 +180,22 @@ int v4l2_async_notifier_register(struct v4l2_device *v4l2_dev,
+ int ret;
+ int i;
+
+- if (!v4l2_dev || !notifier->num_subdevs ||
+- notifier->num_subdevs > V4L2_MAX_SUBDEVS)
++ if (!v4l2_dev || notifier->num_subdevs > V4L2_MAX_SUBDEVS)
+ return -EINVAL;
+
+ notifier->v4l2_dev = v4l2_dev;
+ INIT_LIST_HEAD(¬ifier->waiting);
+ INIT_LIST_HEAD(¬ifier->done);
+
++ if (!notifier->num_subdevs) {
++ int ret;
++
++ ret = v4l2_async_notifier_call_complete(notifier);
++ notifier->v4l2_dev = NULL;
++
++ return ret;
++ }
++
+ for (i = 0; i < notifier->num_subdevs; i++) {
+ asd = notifier->subdevs[i];
+
+--
+2.19.0
+
diff --git a/patches/0295-media-v4l-async-Prepare-for-async-sub-device-notifie.patch b/patches/0295-media-v4l-async-Prepare-for-async-sub-device-notifie.patch
new file mode 100644
index 0000000..36de84b
--- /dev/null
+++ b/patches/0295-media-v4l-async-Prepare-for-async-sub-device-notifie.patch
@@ -0,0 +1,156 @@
+From b3f644d737be449ef694f03816217b72787a08e2 Mon Sep 17 00:00:00 2001
+From: Sakari Ailus <sakari.ailus@linux.intel.com>
+Date: Sun, 24 Sep 2017 20:48:08 -0400
+Subject: [PATCH 0295/1795] media: v4l: async: Prepare for async sub-device
+ notifiers
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Refactor the V4L2 async framework a little in preparation for async
+sub-device notifiers. This avoids making some structural changes in the
+patch actually implementing sub-device notifiers, making that patch easier
+to review.
+
+Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
+Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
+Acked-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit a3620cb48d303f07160694c00d9c1c8f0ea96690)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/media/v4l2-core/v4l2-async.c | 69 ++++++++++++++++++++--------
+ 1 file changed, 50 insertions(+), 19 deletions(-)
+
+diff --git a/drivers/media/v4l2-core/v4l2-async.c b/drivers/media/v4l2-core/v4l2-async.c
+index 1b536d68cedf..6265717769d2 100644
+--- a/drivers/media/v4l2-core/v4l2-async.c
++++ b/drivers/media/v4l2-core/v4l2-async.c
+@@ -125,12 +125,13 @@ static struct v4l2_async_subdev *v4l2_async_find_match(
+ }
+
+ static int v4l2_async_match_notify(struct v4l2_async_notifier *notifier,
++ struct v4l2_device *v4l2_dev,
+ struct v4l2_subdev *sd,
+ struct v4l2_async_subdev *asd)
+ {
+ int ret;
+
+- ret = v4l2_device_register_subdev(notifier->v4l2_dev, sd);
++ ret = v4l2_device_register_subdev(v4l2_dev, sd);
+ if (ret < 0)
+ return ret;
+
+@@ -151,6 +152,29 @@ static int v4l2_async_match_notify(struct v4l2_async_notifier *notifier,
+ return 0;
+ }
+
++/* Test all async sub-devices in a notifier for a match. */
++static int v4l2_async_notifier_try_all_subdevs(
++ struct v4l2_async_notifier *notifier)
++{
++ struct v4l2_device *v4l2_dev = notifier->v4l2_dev;
++ struct v4l2_subdev *sd, *tmp;
++
++ list_for_each_entry_safe(sd, tmp, &subdev_list, async_list) {
++ struct v4l2_async_subdev *asd;
++ int ret;
++
++ asd = v4l2_async_find_match(notifier, sd);
++ if (!asd)
++ continue;
++
++ ret = v4l2_async_match_notify(notifier, v4l2_dev, sd, asd);
++ if (ret < 0)
++ return ret;
++ }
++
++ return 0;
++}
++
+ static void v4l2_async_cleanup(struct v4l2_subdev *sd)
+ {
+ v4l2_device_unregister_subdev(sd);
+@@ -172,18 +196,15 @@ static void v4l2_async_notifier_unbind_all_subdevs(
+ }
+ }
+
+-int v4l2_async_notifier_register(struct v4l2_device *v4l2_dev,
+- struct v4l2_async_notifier *notifier)
++static int __v4l2_async_notifier_register(struct v4l2_async_notifier *notifier)
+ {
+- struct v4l2_subdev *sd, *tmp;
+ struct v4l2_async_subdev *asd;
+ int ret;
+ int i;
+
+- if (!v4l2_dev || notifier->num_subdevs > V4L2_MAX_SUBDEVS)
++ if (notifier->num_subdevs > V4L2_MAX_SUBDEVS)
+ return -EINVAL;
+
+- notifier->v4l2_dev = v4l2_dev;
+ INIT_LIST_HEAD(¬ifier->waiting);
+ INIT_LIST_HEAD(¬ifier->done);
+
+@@ -216,18 +237,10 @@ int v4l2_async_notifier_register(struct v4l2_device *v4l2_dev,
+
+ mutex_lock(&list_lock);
+
+- list_for_each_entry_safe(sd, tmp, &subdev_list, async_list) {
+- int ret;
+-
+- asd = v4l2_async_find_match(notifier, sd);
+- if (!asd)
+- continue;
+-
+- ret = v4l2_async_match_notify(notifier, sd, asd);
+- if (ret < 0) {
+- mutex_unlock(&list_lock);
+- return ret;
+- }
++ ret = v4l2_async_notifier_try_all_subdevs(notifier);
++ if (ret) {
++ mutex_unlock(&list_lock);
++ return ret;
+ }
+
+ if (list_empty(¬ifier->waiting)) {
+@@ -250,6 +263,23 @@ int v4l2_async_notifier_register(struct v4l2_device *v4l2_dev,
+
+ return ret;
+ }
++
++int v4l2_async_notifier_register(struct v4l2_device *v4l2_dev,
++ struct v4l2_async_notifier *notifier)
++{
++ int ret;
++
++ if (WARN_ON(!v4l2_dev))
++ return -EINVAL;
++
++ notifier->v4l2_dev = v4l2_dev;
++
++ ret = __v4l2_async_notifier_register(notifier);
++ if (ret)
++ notifier->v4l2_dev = NULL;
++
++ return ret;
++}
+ EXPORT_SYMBOL(v4l2_async_notifier_register);
+
+ void v4l2_async_notifier_unregister(struct v4l2_async_notifier *notifier)
+@@ -324,7 +354,8 @@ int v4l2_async_register_subdev(struct v4l2_subdev *sd)
+ if (!asd)
+ continue;
+
+- ret = v4l2_async_match_notify(notifier, sd, asd);
++ ret = v4l2_async_match_notify(notifier, notifier->v4l2_dev, sd,
++ asd);
+ if (ret)
+ goto err_unlock;
+
+--
+2.19.0
+
diff --git a/patches/0296-media-v4l-async-Allow-binding-notifiers-to-sub-devic.patch b/patches/0296-media-v4l-async-Allow-binding-notifiers-to-sub-devic.patch
new file mode 100644
index 0000000..3a7806c
--- /dev/null
+++ b/patches/0296-media-v4l-async-Allow-binding-notifiers-to-sub-devic.patch
@@ -0,0 +1,439 @@
+From 25d47861b6734a88db8b319306abc3c44b776b5b Mon Sep 17 00:00:00 2001
+From: Sakari Ailus <sakari.ailus@linux.intel.com>
+Date: Sun, 24 Sep 2017 20:54:31 -0400
+Subject: [PATCH 0296/1795] media: v4l: async: Allow binding notifiers to
+ sub-devices
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Registering a notifier has required the knowledge of struct v4l2_device
+for the reason that sub-devices generally are registered to the
+v4l2_device (as well as the media device, also available through
+v4l2_device).
+
+This information is not available for sub-device drivers at probe time.
+
+What this patch does is that it allows registering notifiers without
+having v4l2_device around. Instead the sub-device pointer is stored in the
+notifier. Once the sub-device of the driver that registered the notifier
+is registered, the notifier will gain the knowledge of the v4l2_device,
+and the binding of async sub-devices from the sub-device driver's notifier
+may proceed.
+
+The complete callback of the root notifier will be called only when the
+v4l2_device is available and no notifier has pending sub-devices to bind.
+No complete callbacks are supported for sub-device notifiers.
+
+Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
+Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
+Acked-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit 2cab00bb076b9f0e8442e3d72425843d2b441143)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/media/v4l2-core/v4l2-async.c | 212 ++++++++++++++++++++++-----
+ include/media/v4l2-async.h | 19 ++-
+ 2 files changed, 189 insertions(+), 42 deletions(-)
+
+diff --git a/drivers/media/v4l2-core/v4l2-async.c b/drivers/media/v4l2-core/v4l2-async.c
+index 6265717769d2..ed539c4fd5dc 100644
+--- a/drivers/media/v4l2-core/v4l2-async.c
++++ b/drivers/media/v4l2-core/v4l2-async.c
+@@ -124,11 +124,87 @@ static struct v4l2_async_subdev *v4l2_async_find_match(
+ return NULL;
+ }
+
++/* Find the sub-device notifier registered by a sub-device driver. */
++static struct v4l2_async_notifier *v4l2_async_find_subdev_notifier(
++ struct v4l2_subdev *sd)
++{
++ struct v4l2_async_notifier *n;
++
++ list_for_each_entry(n, ¬ifier_list, list)
++ if (n->sd == sd)
++ return n;
++
++ return NULL;
++}
++
++/* Get v4l2_device related to the notifier if one can be found. */
++static struct v4l2_device *v4l2_async_notifier_find_v4l2_dev(
++ struct v4l2_async_notifier *notifier)
++{
++ while (notifier->parent)
++ notifier = notifier->parent;
++
++ return notifier->v4l2_dev;
++}
++
++/*
++ * Return true if all child sub-device notifiers are complete, false otherwise.
++ */
++static bool v4l2_async_notifier_can_complete(
++ struct v4l2_async_notifier *notifier)
++{
++ struct v4l2_subdev *sd;
++
++ if (!list_empty(¬ifier->waiting))
++ return false;
++
++ list_for_each_entry(sd, ¬ifier->done, async_list) {
++ struct v4l2_async_notifier *subdev_notifier =
++ v4l2_async_find_subdev_notifier(sd);
++
++ if (subdev_notifier &&
++ !v4l2_async_notifier_can_complete(subdev_notifier))
++ return false;
++ }
++
++ return true;
++}
++
++/*
++ * Complete the master notifier if possible. This is done when all async
++ * sub-devices have been bound; v4l2_device is also available then.
++ */
++static int v4l2_async_notifier_try_complete(
++ struct v4l2_async_notifier *notifier)
++{
++ /* Quick check whether there are still more sub-devices here. */
++ if (!list_empty(¬ifier->waiting))
++ return 0;
++
++ /* Check the entire notifier tree; find the root notifier first. */
++ while (notifier->parent)
++ notifier = notifier->parent;
++
++ /* This is root if it has v4l2_dev. */
++ if (!notifier->v4l2_dev)
++ return 0;
++
++ /* Is everything ready? */
++ if (!v4l2_async_notifier_can_complete(notifier))
++ return 0;
++
++ return v4l2_async_notifier_call_complete(notifier);
++}
++
++static int v4l2_async_notifier_try_all_subdevs(
++ struct v4l2_async_notifier *notifier);
++
+ static int v4l2_async_match_notify(struct v4l2_async_notifier *notifier,
+ struct v4l2_device *v4l2_dev,
+ struct v4l2_subdev *sd,
+ struct v4l2_async_subdev *asd)
+ {
++ struct v4l2_async_notifier *subdev_notifier;
+ int ret;
+
+ ret = v4l2_device_register_subdev(v4l2_dev, sd);
+@@ -149,17 +225,36 @@ static int v4l2_async_match_notify(struct v4l2_async_notifier *notifier,
+ /* Move from the global subdevice list to notifier's done */
+ list_move(&sd->async_list, ¬ifier->done);
+
+- return 0;
++ /*
++ * See if the sub-device has a notifier. If not, return here.
++ */
++ subdev_notifier = v4l2_async_find_subdev_notifier(sd);
++ if (!subdev_notifier || subdev_notifier->parent)
++ return 0;
++
++ /*
++ * Proceed with checking for the sub-device notifier's async
++ * sub-devices, and return the result. The error will be handled by the
++ * caller.
++ */
++ subdev_notifier->parent = notifier;
++
++ return v4l2_async_notifier_try_all_subdevs(subdev_notifier);
+ }
+
+ /* Test all async sub-devices in a notifier for a match. */
+ static int v4l2_async_notifier_try_all_subdevs(
+ struct v4l2_async_notifier *notifier)
+ {
+- struct v4l2_device *v4l2_dev = notifier->v4l2_dev;
+- struct v4l2_subdev *sd, *tmp;
++ struct v4l2_device *v4l2_dev =
++ v4l2_async_notifier_find_v4l2_dev(notifier);
++ struct v4l2_subdev *sd;
++
++ if (!v4l2_dev)
++ return 0;
+
+- list_for_each_entry_safe(sd, tmp, &subdev_list, async_list) {
++again:
++ list_for_each_entry(sd, &subdev_list, async_list) {
+ struct v4l2_async_subdev *asd;
+ int ret;
+
+@@ -170,6 +265,14 @@ static int v4l2_async_notifier_try_all_subdevs(
+ ret = v4l2_async_match_notify(notifier, v4l2_dev, sd, asd);
+ if (ret < 0)
+ return ret;
++
++ /*
++ * v4l2_async_match_notify() may lead to registering a
++ * new notifier and thus changing the async subdevs
++ * list. In order to proceed safely from here, restart
++ * parsing the list from the beginning.
++ */
++ goto again;
+ }
+
+ return 0;
+@@ -183,17 +286,26 @@ static void v4l2_async_cleanup(struct v4l2_subdev *sd)
+ sd->asd = NULL;
+ }
+
++/* Unbind all sub-devices in the notifier tree. */
+ static void v4l2_async_notifier_unbind_all_subdevs(
+ struct v4l2_async_notifier *notifier)
+ {
+ struct v4l2_subdev *sd, *tmp;
+
+ list_for_each_entry_safe(sd, tmp, ¬ifier->done, async_list) {
++ struct v4l2_async_notifier *subdev_notifier =
++ v4l2_async_find_subdev_notifier(sd);
++
++ if (subdev_notifier)
++ v4l2_async_notifier_unbind_all_subdevs(subdev_notifier);
++
+ v4l2_async_notifier_call_unbind(notifier, sd, sd->asd);
+ v4l2_async_cleanup(sd);
+
+ list_move(&sd->async_list, &subdev_list);
+ }
++
++ notifier->parent = NULL;
+ }
+
+ static int __v4l2_async_notifier_register(struct v4l2_async_notifier *notifier)
+@@ -208,15 +320,6 @@ static int __v4l2_async_notifier_register(struct v4l2_async_notifier *notifier)
+ INIT_LIST_HEAD(¬ifier->waiting);
+ INIT_LIST_HEAD(¬ifier->done);
+
+- if (!notifier->num_subdevs) {
+- int ret;
+-
+- ret = v4l2_async_notifier_call_complete(notifier);
+- notifier->v4l2_dev = NULL;
+-
+- return ret;
+- }
+-
+ for (i = 0; i < notifier->num_subdevs; i++) {
+ asd = notifier->subdevs[i];
+
+@@ -238,16 +341,12 @@ static int __v4l2_async_notifier_register(struct v4l2_async_notifier *notifier)
+ mutex_lock(&list_lock);
+
+ ret = v4l2_async_notifier_try_all_subdevs(notifier);
+- if (ret) {
+- mutex_unlock(&list_lock);
+- return ret;
+- }
++ if (ret)
++ goto err_unbind;
+
+- if (list_empty(¬ifier->waiting)) {
+- ret = v4l2_async_notifier_call_complete(notifier);
+- if (ret)
+- goto err_complete;
+- }
++ ret = v4l2_async_notifier_try_complete(notifier);
++ if (ret)
++ goto err_unbind;
+
+ /* Keep also completed notifiers on the list */
+ list_add(¬ifier->list, ¬ifier_list);
+@@ -256,7 +355,10 @@ static int __v4l2_async_notifier_register(struct v4l2_async_notifier *notifier)
+
+ return 0;
+
+-err_complete:
++err_unbind:
++ /*
++ * On failure, unbind all sub-devices registered through this notifier.
++ */
+ v4l2_async_notifier_unbind_all_subdevs(notifier);
+
+ mutex_unlock(&list_lock);
+@@ -269,7 +371,7 @@ int v4l2_async_notifier_register(struct v4l2_device *v4l2_dev,
+ {
+ int ret;
+
+- if (WARN_ON(!v4l2_dev))
++ if (WARN_ON(!v4l2_dev || notifier->sd))
+ return -EINVAL;
+
+ notifier->v4l2_dev = v4l2_dev;
+@@ -282,20 +384,39 @@ int v4l2_async_notifier_register(struct v4l2_device *v4l2_dev,
+ }
+ EXPORT_SYMBOL(v4l2_async_notifier_register);
+
++int v4l2_async_subdev_notifier_register(struct v4l2_subdev *sd,
++ struct v4l2_async_notifier *notifier)
++{
++ int ret;
++
++ if (WARN_ON(!sd || notifier->v4l2_dev))
++ return -EINVAL;
++
++ notifier->sd = sd;
++
++ ret = __v4l2_async_notifier_register(notifier);
++ if (ret)
++ notifier->sd = NULL;
++
++ return ret;
++}
++EXPORT_SYMBOL(v4l2_async_subdev_notifier_register);
++
+ void v4l2_async_notifier_unregister(struct v4l2_async_notifier *notifier)
+ {
+- if (!notifier->v4l2_dev)
++ if (!notifier->v4l2_dev && !notifier->sd)
+ return;
+
+ mutex_lock(&list_lock);
+
+- list_del(¬ifier->list);
+-
+ v4l2_async_notifier_unbind_all_subdevs(notifier);
+
+- mutex_unlock(&list_lock);
+-
++ notifier->sd = NULL;
+ notifier->v4l2_dev = NULL;
++
++ list_del(¬ifier->list);
++
++ mutex_unlock(&list_lock);
+ }
+ EXPORT_SYMBOL(v4l2_async_notifier_unregister);
+
+@@ -331,6 +452,7 @@ EXPORT_SYMBOL_GPL(v4l2_async_notifier_cleanup);
+
+ int v4l2_async_register_subdev(struct v4l2_subdev *sd)
+ {
++ struct v4l2_async_notifier *subdev_notifier;
+ struct v4l2_async_notifier *notifier;
+ int ret;
+
+@@ -347,24 +469,26 @@ int v4l2_async_register_subdev(struct v4l2_subdev *sd)
+ INIT_LIST_HEAD(&sd->async_list);
+
+ list_for_each_entry(notifier, ¬ifier_list, list) {
+- struct v4l2_async_subdev *asd = v4l2_async_find_match(notifier,
+- sd);
++ struct v4l2_device *v4l2_dev =
++ v4l2_async_notifier_find_v4l2_dev(notifier);
++ struct v4l2_async_subdev *asd;
+ int ret;
+
++ if (!v4l2_dev)
++ continue;
++
++ asd = v4l2_async_find_match(notifier, sd);
+ if (!asd)
+ continue;
+
+ ret = v4l2_async_match_notify(notifier, notifier->v4l2_dev, sd,
+ asd);
+ if (ret)
+- goto err_unlock;
+-
+- if (!list_empty(¬ifier->waiting))
+- goto out_unlock;
++ goto err_unbind;
+
+- ret = v4l2_async_notifier_call_complete(notifier);
++ ret = v4l2_async_notifier_try_complete(notifier);
+ if (ret)
+- goto err_cleanup;
++ goto err_unbind;
+
+ goto out_unlock;
+ }
+@@ -377,11 +501,19 @@ int v4l2_async_register_subdev(struct v4l2_subdev *sd)
+
+ return 0;
+
+-err_cleanup:
+- v4l2_async_notifier_call_unbind(notifier, sd, sd->asd);
++err_unbind:
++ /*
++ * Complete failed. Unbind the sub-devices bound through registering
++ * this async sub-device.
++ */
++ subdev_notifier = v4l2_async_find_subdev_notifier(sd);
++ if (subdev_notifier)
++ v4l2_async_notifier_unbind_all_subdevs(subdev_notifier);
++
++ if (sd->asd)
++ v4l2_async_notifier_call_unbind(notifier, sd, sd->asd);
+ v4l2_async_cleanup(sd);
+
+-err_unlock:
+ mutex_unlock(&list_lock);
+
+ return ret;
+diff --git a/include/media/v4l2-async.h b/include/media/v4l2-async.h
+index 68606afb5ef9..17c4ac7c73e8 100644
+--- a/include/media/v4l2-async.h
++++ b/include/media/v4l2-async.h
+@@ -82,7 +82,8 @@ struct v4l2_async_subdev {
+ /**
+ * struct v4l2_async_notifier_operations - Asynchronous V4L2 notifier operations
+ * @bound: a subdevice driver has successfully probed one of the subdevices
+- * @complete: all subdevices have been probed successfully
++ * @complete: All subdevices have been probed successfully. The complete
++ * callback is only executed for the root notifier.
+ * @unbind: a subdevice is leaving
+ */
+ struct v4l2_async_notifier_operations {
+@@ -102,7 +103,9 @@ struct v4l2_async_notifier_operations {
+ * @num_subdevs: number of subdevices used in the subdevs array
+ * @max_subdevs: number of subdevices allocated in the subdevs array
+ * @subdevs: array of pointers to subdevice descriptors
+- * @v4l2_dev: pointer to struct v4l2_device
++ * @v4l2_dev: v4l2_device of the root notifier, NULL otherwise
++ * @sd: sub-device that registered the notifier, NULL otherwise
++ * @parent: parent notifier
+ * @waiting: list of struct v4l2_async_subdev, waiting for their drivers
+ * @done: list of struct v4l2_subdev, already probed
+ * @list: member in a global list of notifiers
+@@ -113,6 +116,8 @@ struct v4l2_async_notifier {
+ unsigned int max_subdevs;
+ struct v4l2_async_subdev **subdevs;
+ struct v4l2_device *v4l2_dev;
++ struct v4l2_subdev *sd;
++ struct v4l2_async_notifier *parent;
+ struct list_head waiting;
+ struct list_head done;
+ struct list_head list;
+@@ -127,6 +132,16 @@ struct v4l2_async_notifier {
+ int v4l2_async_notifier_register(struct v4l2_device *v4l2_dev,
+ struct v4l2_async_notifier *notifier);
+
++/**
++ * v4l2_async_subdev_notifier_register - registers a subdevice asynchronous
++ * notifier for a sub-device
++ *
++ * @sd: pointer to &struct v4l2_subdev
++ * @notifier: pointer to &struct v4l2_async_notifier
++ */
++int v4l2_async_subdev_notifier_register(struct v4l2_subdev *sd,
++ struct v4l2_async_notifier *notifier);
++
+ /**
+ * v4l2_async_notifier_unregister - unregisters a subdevice asynchronous notifier
+ *
+--
+2.19.0
+
diff --git a/patches/0297-PM-Domains-Allow-genpd-users-to-specify-default-acti.patch b/patches/0297-PM-Domains-Allow-genpd-users-to-specify-default-acti.patch
new file mode 100644
index 0000000..c195ebb
--- /dev/null
+++ b/patches/0297-PM-Domains-Allow-genpd-users-to-specify-default-acti.patch
@@ -0,0 +1,72 @@
+From 66bc21cc6151a59df5b3b60592f34750ab4322b0 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Tue, 7 Nov 2017 13:48:11 +0100
+Subject: [PATCH 0297/1795] PM / Domains: Allow genpd users to specify default
+ active wakeup behavior
+
+It is quite common for PM Domains to require slave devices to be kept
+active during system suspend if they are to be used as wakeup sources.
+To enable this, currently each PM Domain or driver has to provide its
+own gpd_dev_ops.active_wakeup() callback.
+
+Introduce a new flag GENPD_FLAG_ACTIVE_WAKEUP to consolidate this.
+If specified, all slave devices configured as wakeup sources will be
+kept active during system suspend.
+
+PM Domains that need more fine-grained controls, based on the slave
+device, can still provide their own callbacks, as before.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
+Reviewed-by: Kevin Hilman <khilman@baylibre.com>
+Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+(cherry picked from commit 95a20ef6f7e54c6a982715a7d0da2fd81790db28)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/base/power/domain.c | 3 +++
+ include/linux/pm_domain.h | 7 ++++---
+ 2 files changed, 7 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
+index c276ba1c0a19..5d63c34e0420 100644
+--- a/drivers/base/power/domain.c
++++ b/drivers/base/power/domain.c
+@@ -124,6 +124,7 @@ static const struct genpd_lock_ops genpd_spin_ops = {
+ #define genpd_status_on(genpd) (genpd->status == GPD_STATE_ACTIVE)
+ #define genpd_is_irq_safe(genpd) (genpd->flags & GENPD_FLAG_IRQ_SAFE)
+ #define genpd_is_always_on(genpd) (genpd->flags & GENPD_FLAG_ALWAYS_ON)
++#define genpd_is_active_wakeup(genpd) (genpd->flags & GENPD_FLAG_ACTIVE_WAKEUP)
+
+ static inline bool irq_safe_dev_in_no_sleep_domain(struct device *dev,
+ const struct generic_pm_domain *genpd)
+@@ -774,6 +775,8 @@ static bool pm_genpd_present(const struct generic_pm_domain *genpd)
+ static bool genpd_dev_active_wakeup(const struct generic_pm_domain *genpd,
+ struct device *dev)
+ {
++ if (genpd_is_active_wakeup(genpd))
++ return true;
+ return GENPD_DEV_CALLBACK(genpd, bool, active_wakeup, dev);
+ }
+
+diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h
+index 84f423d5633e..a6688efb29ee 100644
+--- a/include/linux/pm_domain.h
++++ b/include/linux/pm_domain.h
+@@ -18,9 +18,10 @@
+ #include <linux/spinlock.h>
+
+ /* Defines used for the flags field in the struct generic_pm_domain */
+-#define GENPD_FLAG_PM_CLK (1U << 0) /* PM domain uses PM clk */
+-#define GENPD_FLAG_IRQ_SAFE (1U << 1) /* PM domain operates in atomic */
+-#define GENPD_FLAG_ALWAYS_ON (1U << 2) /* PM domain is always powered on */
++#define GENPD_FLAG_PM_CLK (1U << 0) /* PM domain uses PM clk */
++#define GENPD_FLAG_IRQ_SAFE (1U << 1) /* PM domain operates in atomic */
++#define GENPD_FLAG_ALWAYS_ON (1U << 2) /* PM domain is always powered on */
++#define GENPD_FLAG_ACTIVE_WAKEUP (1U << 3) /* Keep devices active if wakeup */
+
+ enum gpd_status {
+ GPD_STATE_ACTIVE = 0, /* PM domain is active */
+--
+2.19.0
+
diff --git a/patches/0298-dt-bindings-apmu-Document-r8a7745-support.patch b/patches/0298-dt-bindings-apmu-Document-r8a7745-support.patch
new file mode 100644
index 0000000..8c8f21f
--- /dev/null
+++ b/patches/0298-dt-bindings-apmu-Document-r8a7745-support.patch
@@ -0,0 +1,32 @@
+From 3f1118a9e691c6bdf8eb7ed21396261d8bbf35d2 Mon Sep 17 00:00:00 2001
+From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Date: Tue, 22 Aug 2017 14:52:19 +0100
+Subject: [PATCH 0298/1795] dt-bindings: apmu: Document r8a7745 support
+
+Document APMU and SMP enable method for RZ/G1E (also known as
+r8a7745) SoC.
+
+Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 055fb568157c3a6754228138b3ca51247cb4f466)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/power/renesas,apmu.txt | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/Documentation/devicetree/bindings/power/renesas,apmu.txt b/Documentation/devicetree/bindings/power/renesas,apmu.txt
+index af21502e939c..f747f95eee58 100644
+--- a/Documentation/devicetree/bindings/power/renesas,apmu.txt
++++ b/Documentation/devicetree/bindings/power/renesas,apmu.txt
+@@ -8,6 +8,7 @@ Required properties:
+ - compatible: Should be "renesas,<soctype>-apmu", "renesas,apmu" as fallback.
+ Examples with soctypes are:
+ - "renesas,r8a7743-apmu" (RZ/G1M)
++ - "renesas,r8a7745-apmu" (RZ/G1E)
+ - "renesas,r8a7790-apmu" (R-Car H2)
+ - "renesas,r8a7791-apmu" (R-Car M2-W)
+ - "renesas,r8a7792-apmu" (R-Car V2H)
+--
+2.19.0
+
diff --git a/patches/0299-ARM-dts-r8a7790-Convert-to-new-CPG-MSSR-bindings.patch b/patches/0299-ARM-dts-r8a7790-Convert-to-new-CPG-MSSR-bindings.patch
new file mode 100644
index 0000000..dc85a24
--- /dev/null
+++ b/patches/0299-ARM-dts-r8a7790-Convert-to-new-CPG-MSSR-bindings.patch
@@ -0,0 +1,1126 @@
+From 1c60909eb8eaadd3ff9a0684a0364f807f1b6aa0 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 18 Aug 2017 11:11:34 +0200
+Subject: [PATCH 0299/1795] ARM: dts: r8a7790: Convert to new CPG/MSSR bindings
+
+Convert the R-Car H2 SoC from the old "Renesas R-Car Gen2 Clock Pulse
+Generator (CPG)", "Renesas CPG DIV6 Clock", and "Renesas CPG Module Stop
+(MSTP) Clocks" DT bindings to the new unified "Renesas Clock Pulse
+Generator / Module Standby and Software Reset" DT bindings.
+
+This simplifies the DTS files, and allows to add support for reset
+control later.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 5802c420636559ffd37095d2886f6964d9b55b11)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7790-lager.dts | 7 +-
+ arch/arm/boot/dts/r8a7790.dtsi | 557 +++++-----------------------
+ 2 files changed, 99 insertions(+), 465 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
+index ba100a6f67ca..e3d27783b6b5 100644
+--- a/arch/arm/boot/dts/r8a7790-lager.dts
++++ b/arch/arm/boot/dts/r8a7790-lager.dts
+@@ -316,11 +316,8 @@
+ pinctrl-names = "default";
+ status = "okay";
+
+- clocks = <&mstp7_clks R8A7790_CLK_DU0>,
+- <&mstp7_clks R8A7790_CLK_DU1>,
+- <&mstp7_clks R8A7790_CLK_DU2>,
+- <&mstp7_clks R8A7790_CLK_LVDS0>,
+- <&mstp7_clks R8A7790_CLK_LVDS1>,
++ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 722>,
++ <&cpg CPG_MOD 726>, <&cpg CPG_MOD 725>,
+ <&x13_clk>, <&x2_clk>;
+ clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1",
+ "dclkin.0", "dclkin.1";
+diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
+index 16358bf8d1db..5a31dfc0c316 100644
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -10,7 +10,7 @@
+ * kind, whether express or implied.
+ */
+
+-#include <dt-bindings/clock/r8a7790-clock.h>
++#include <dt-bindings/clock/r8a7790-cpg-mssr.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/power/r8a7790-sysc.h>
+@@ -52,7 +52,7 @@
+ reg = <0>;
+ clock-frequency = <1300000000>;
+ voltage-tolerance = <1>; /* 1% */
+- clocks = <&cpg_clocks R8A7790_CLK_Z>;
++ clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
+ clock-latency = <300000>; /* 300 us */
+ power-domains = <&sysc R8A7790_PD_CA15_CPU0>;
+ next-level-cache = <&L2_CA15>;
+@@ -185,7 +185,7 @@
+ <0 0xf1004000 0 0x2000>,
+ <0 0xf1006000 0 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+- clocks = <&mstp4_clks R8A7790_CLK_INTC_SYS>;
++ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ };
+@@ -199,7 +199,7 @@
+ gpio-ranges = <&pfc 0 0 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7790_CLK_GPIO0>;
++ clocks = <&cpg CPG_MOD 912>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ };
+
+@@ -212,7 +212,7 @@
+ gpio-ranges = <&pfc 0 32 30>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7790_CLK_GPIO1>;
++ clocks = <&cpg CPG_MOD 911>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ };
+
+@@ -225,7 +225,7 @@
+ gpio-ranges = <&pfc 0 64 30>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7790_CLK_GPIO2>;
++ clocks = <&cpg CPG_MOD 910>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ };
+
+@@ -238,7 +238,7 @@
+ gpio-ranges = <&pfc 0 96 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7790_CLK_GPIO3>;
++ clocks = <&cpg CPG_MOD 909>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ };
+
+@@ -251,7 +251,7 @@
+ gpio-ranges = <&pfc 0 128 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7790_CLK_GPIO4>;
++ clocks = <&cpg CPG_MOD 908>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ };
+
+@@ -264,7 +264,7 @@
+ gpio-ranges = <&pfc 0 160 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7790_CLK_GPIO5>;
++ clocks = <&cpg CPG_MOD 907>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ };
+
+@@ -274,7 +274,7 @@
+ "renesas,rcar-thermal";
+ reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp5_clks R8A7790_CLK_THERMAL>;
++ clocks = <&cpg CPG_MOD 522>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ #thermal-sensor-cells = <0>;
+ };
+@@ -292,7 +292,7 @@
+ reg = <0 0xffca0000 0 0x1004>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp1_clks R8A7790_CLK_CMT0>;
++ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+
+@@ -312,7 +312,7 @@
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7790_CLK_CMT1>;
++ clocks = <&cpg CPG_MOD 329>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+
+@@ -330,7 +330,7 @@
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp4_clks R8A7790_CLK_IRQC>;
++ clocks = <&cpg CPG_MOD 407>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ };
+
+@@ -358,7 +358,7 @@
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+- clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC0>;
++ clocks = <&cpg CPG_MOD 219>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ #dma-cells = <1>;
+@@ -389,7 +389,7 @@
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+- clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC1>;
++ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ #dma-cells = <1>;
+@@ -418,7 +418,7 @@
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+- clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC0>;
++ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ #dma-cells = <1>;
+@@ -447,7 +447,7 @@
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+- clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC1>;
++ clocks = <&cpg CPG_MOD 501>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ #dma-cells = <1>;
+@@ -460,7 +460,7 @@
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+- clocks = <&mstp3_clks R8A7790_CLK_USBDMAC0>;
++ clocks = <&cpg CPG_MOD 330>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+@@ -472,7 +472,7 @@
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+- clocks = <&mstp3_clks R8A7790_CLK_USBDMAC1>;
++ clocks = <&cpg CPG_MOD 331>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+@@ -484,7 +484,7 @@
+ compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6508000 0 0x40>;
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7790_CLK_I2C0>;
++ clocks = <&cpg CPG_MOD 931>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+@@ -496,7 +496,7 @@
+ compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6518000 0 0x40>;
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7790_CLK_I2C1>;
++ clocks = <&cpg CPG_MOD 930>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+@@ -508,7 +508,7 @@
+ compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6530000 0 0x40>;
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7790_CLK_I2C2>;
++ clocks = <&cpg CPG_MOD 929>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+@@ -520,7 +520,7 @@
+ compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6540000 0 0x40>;
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7790_CLK_I2C3>;
++ clocks = <&cpg CPG_MOD 928>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+@@ -533,7 +533,7 @@
+ "renesas,rmobile-iic";
+ reg = <0 0xe6500000 0 0x425>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
++ clocks = <&cpg CPG_MOD 318>;
+ dmas = <&dmac0 0x61>, <&dmac0 0x62>,
+ <&dmac1 0x61>, <&dmac1 0x62>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -548,7 +548,7 @@
+ "renesas,rmobile-iic";
+ reg = <0 0xe6510000 0 0x425>;
+ interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7790_CLK_IIC1>;
++ clocks = <&cpg CPG_MOD 323>;
+ dmas = <&dmac0 0x65>, <&dmac0 0x66>,
+ <&dmac1 0x65>, <&dmac1 0x66>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -563,7 +563,7 @@
+ "renesas,rmobile-iic";
+ reg = <0 0xe6520000 0 0x425>;
+ interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7790_CLK_IIC2>;
++ clocks = <&cpg CPG_MOD 300>;
+ dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
+ <&dmac1 0x69>, <&dmac1 0x6a>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -578,7 +578,7 @@
+ "renesas,rmobile-iic";
+ reg = <0 0xe60b0000 0 0x425>;
+ interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>;
++ clocks = <&cpg CPG_MOD 926>;
+ dmas = <&dmac0 0x77>, <&dmac0 0x78>,
+ <&dmac1 0x77>, <&dmac1 0x78>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -590,7 +590,7 @@
+ compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
+ reg = <0 0xee200000 0 0x80>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7790_CLK_MMCIF0>;
++ clocks = <&cpg CPG_MOD 315>;
+ dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
+ <&dmac1 0xd1>, <&dmac1 0xd2>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -604,7 +604,7 @@
+ compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
+ reg = <0 0xee220000 0 0x80>;
+ interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>;
++ clocks = <&cpg CPG_MOD 305>;
+ dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
+ <&dmac1 0xe1>, <&dmac1 0xe2>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -623,7 +623,7 @@
+ compatible = "renesas,sdhi-r8a7790";
+ reg = <0 0xee100000 0 0x328>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7790_CLK_SDHI0>;
++ clocks = <&cpg CPG_MOD 314>;
+ dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+ <&dmac1 0xcd>, <&dmac1 0xce>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -636,7 +636,7 @@
+ compatible = "renesas,sdhi-r8a7790";
+ reg = <0 0xee120000 0 0x328>;
+ interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7790_CLK_SDHI1>;
++ clocks = <&cpg CPG_MOD 313>;
+ dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
+ <&dmac1 0xc9>, <&dmac1 0xca>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -649,7 +649,7 @@
+ compatible = "renesas,sdhi-r8a7790";
+ reg = <0 0xee140000 0 0x100>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7790_CLK_SDHI2>;
++ clocks = <&cpg CPG_MOD 312>;
+ dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
+ <&dmac1 0xc1>, <&dmac1 0xc2>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -662,7 +662,7 @@
+ compatible = "renesas,sdhi-r8a7790";
+ reg = <0 0xee160000 0 0x100>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7790_CLK_SDHI3>;
++ clocks = <&cpg CPG_MOD 311>;
+ dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
+ <&dmac1 0xd3>, <&dmac1 0xd4>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -676,7 +676,7 @@
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c40000 0 64>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>;
++ clocks = <&cpg CPG_MOD 204>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x21>, <&dmac0 0x22>,
+ <&dmac1 0x21>, <&dmac1 0x22>;
+@@ -690,7 +690,7 @@
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c50000 0 64>;
+ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7790_CLK_SCIFA1>;
++ clocks = <&cpg CPG_MOD 203>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x25>, <&dmac0 0x26>,
+ <&dmac1 0x25>, <&dmac1 0x26>;
+@@ -704,7 +704,7 @@
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c60000 0 64>;
+ interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7790_CLK_SCIFA2>;
++ clocks = <&cpg CPG_MOD 202>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x27>, <&dmac0 0x28>,
+ <&dmac1 0x27>, <&dmac1 0x28>;
+@@ -718,7 +718,7 @@
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c20000 0 0x100>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7790_CLK_SCIFB0>;
++ clocks = <&cpg CPG_MOD 206>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
+ <&dmac1 0x3d>, <&dmac1 0x3e>;
+@@ -732,7 +732,7 @@
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c30000 0 0x100>;
+ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7790_CLK_SCIFB1>;
++ clocks = <&cpg CPG_MOD 207>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
+ <&dmac1 0x19>, <&dmac1 0x1a>;
+@@ -746,7 +746,7 @@
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6ce0000 0 0x100>;
+ interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7790_CLK_SCIFB2>;
++ clocks = <&cpg CPG_MOD 216>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
+ <&dmac1 0x1d>, <&dmac1 0x1e>;
+@@ -760,7 +760,7 @@
+ "renesas,scif";
+ reg = <0 0xe6e60000 0 64>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7790_CLK_SCIF0>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
+@@ -775,7 +775,7 @@
+ "renesas,scif";
+ reg = <0 0xe6e68000 0 64>;
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7790_CLK_SCIF1>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
+@@ -790,7 +790,7 @@
+ "renesas,scif";
+ reg = <0 0xe6e56000 0 64>;
+ interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7790_CLK_SCIF2>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 310>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
+@@ -805,7 +805,7 @@
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c0000 0 96>;
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7790_CLK_HSCIF0>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
+@@ -820,7 +820,7 @@
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c8000 0 96>;
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7790_CLK_HSCIF1>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
+@@ -852,7 +852,7 @@
+ compatible = "renesas,ether-r8a7790";
+ reg = <0 0xee700000 0 0x400>;
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7790_CLK_ETHER>;
++ clocks = <&cpg CPG_MOD 813>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ phy-mode = "rmii";
+ #address-cells = <1>;
+@@ -865,7 +865,7 @@
+ "renesas,etheravb-rcar-gen2";
+ reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
+ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7790_CLK_ETHERAVB>;
++ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -876,7 +876,7 @@
+ compatible = "renesas,sata-r8a7790", "renesas,rcar-gen2-sata";
+ reg = <0 0xee300000 0 0x2000>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7790_CLK_SATA0>;
++ clocks = <&cpg CPG_MOD 815>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+@@ -885,7 +885,7 @@
+ compatible = "renesas,sata-r8a7790", "renesas,rcar-gen2-sata";
+ reg = <0 0xee500000 0 0x2000>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7790_CLK_SATA1>;
++ clocks = <&cpg CPG_MOD 814>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+@@ -894,7 +894,7 @@
+ compatible = "renesas,usbhs-r8a7790", "renesas,rcar-gen2-usbhs";
+ reg = <0 0xe6590000 0 0x100>;
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7790_CLK_HSUSB>;
++ clocks = <&cpg CPG_MOD 704>;
+ dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
+ <&usb_dmac1 0>, <&usb_dmac1 1>;
+ dma-names = "ch0", "ch1", "ch2", "ch3";
+@@ -911,7 +911,7 @@
+ reg = <0 0xe6590100 0 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+- clocks = <&mstp7_clks R8A7790_CLK_HSUSB>;
++ clocks = <&cpg CPG_MOD 704>;
+ clock-names = "usbhs";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ status = "disabled";
+@@ -930,7 +930,7 @@
+ compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef0000 0 0x1000>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7790_CLK_VIN0>;
++ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+@@ -939,7 +939,7 @@
+ compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef1000 0 0x1000>;
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7790_CLK_VIN1>;
++ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+@@ -948,7 +948,7 @@
+ compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef2000 0 0x1000>;
+ interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7790_CLK_VIN2>;
++ clocks = <&cpg CPG_MOD 809>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+@@ -957,7 +957,7 @@
+ compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef3000 0 0x1000>;
+ interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7790_CLK_VIN3>;
++ clocks = <&cpg CPG_MOD 808>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+@@ -966,7 +966,7 @@
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe920000 0 0x8000>;
+ interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp1_clks R8A7790_CLK_VSP1_R>;
++ clocks = <&cpg CPG_MOD 130>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ };
+
+@@ -974,7 +974,7 @@
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe928000 0 0x8000>;
+ interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp1_clks R8A7790_CLK_VSP1_S>;
++ clocks = <&cpg CPG_MOD 131>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ };
+
+@@ -982,7 +982,7 @@
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe930000 0 0x8000>;
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU0>;
++ clocks = <&cpg CPG_MOD 128>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ };
+
+@@ -990,7 +990,7 @@
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe938000 0 0x8000>;
+ interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU1>;
++ clocks = <&cpg CPG_MOD 127>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ };
+
+@@ -1003,11 +1003,9 @@
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7790_CLK_DU0>,
+- <&mstp7_clks R8A7790_CLK_DU1>,
+- <&mstp7_clks R8A7790_CLK_DU2>,
+- <&mstp7_clks R8A7790_CLK_LVDS0>,
+- <&mstp7_clks R8A7790_CLK_LVDS1>;
++ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
++ <&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>,
++ <&cpg CPG_MOD 725>;
+ clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1";
+ status = "disabled";
+
+@@ -1037,8 +1035,8 @@
+ compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can";
+ reg = <0 0xe6e80000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7790_CLK_RCAN0>,
+- <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>;
++ clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7790_CLK_RCAN>,
++ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ status = "disabled";
+@@ -1048,8 +1046,8 @@
+ compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can";
+ reg = <0 0xe6e88000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7790_CLK_RCAN1>,
+- <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>;
++ clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7790_CLK_RCAN>,
++ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ status = "disabled";
+@@ -1059,7 +1057,7 @@
+ compatible = "renesas,jpu-r8a7790", "renesas,rcar-gen2-jpu";
+ reg = <0 0xfe980000 0 0x10300>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp1_clks R8A7790_CLK_JPU>;
++ clocks = <&cpg CPG_MOD 106>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ };
+
+@@ -1126,376 +1124,14 @@
+ clock-frequency = <0>;
+ };
+
+- /* Special CPG clocks */
+- cpg_clocks: cpg_clocks@e6150000 {
+- compatible = "renesas,r8a7790-cpg-clocks",
+- "renesas,rcar-gen2-cpg-clocks";
++ cpg: clock-controller@e6150000 {
++ compatible = "renesas,r8a7790-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+- clocks = <&extal_clk &usb_extal_clk>;
+- #clock-cells = <1>;
+- clock-output-names = "main", "pll0", "pll1", "pll3",
+- "lb", "qspi", "sdh", "sd0", "sd1",
+- "z", "rcan", "adsp";
++ clocks = <&extal_clk>, <&usb_extal_clk>;
++ clock-names = "extal", "usb_extal";
++ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ };
+-
+- /* Variable factor clocks */
+- sd2_clk: sd2@e6150078 {
+- compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
+- reg = <0 0xe6150078 0 4>;
+- clocks = <&pll1_div2_clk>;
+- #clock-cells = <0>;
+- };
+- sd3_clk: sd3@e615026c {
+- compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
+- reg = <0 0xe615026c 0 4>;
+- clocks = <&pll1_div2_clk>;
+- #clock-cells = <0>;
+- };
+- mmc0_clk: mmc0@e6150240 {
+- compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
+- reg = <0 0xe6150240 0 4>;
+- clocks = <&pll1_div2_clk>;
+- #clock-cells = <0>;
+- };
+- mmc1_clk: mmc1@e6150244 {
+- compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
+- reg = <0 0xe6150244 0 4>;
+- clocks = <&pll1_div2_clk>;
+- #clock-cells = <0>;
+- };
+- ssp_clk: ssp@e6150248 {
+- compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
+- reg = <0 0xe6150248 0 4>;
+- clocks = <&pll1_div2_clk>;
+- #clock-cells = <0>;
+- };
+- ssprs_clk: ssprs@e615024c {
+- compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
+- reg = <0 0xe615024c 0 4>;
+- clocks = <&pll1_div2_clk>;
+- #clock-cells = <0>;
+- };
+-
+- /* Fixed factor clocks */
+- pll1_div2_clk: pll1_div2 {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <2>;
+- clock-mult = <1>;
+- };
+- z2_clk: z2 {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <2>;
+- clock-mult = <1>;
+- };
+- zg_clk: zg {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <3>;
+- clock-mult = <1>;
+- };
+- zx_clk: zx {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <3>;
+- clock-mult = <1>;
+- };
+- zs_clk: zs {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <6>;
+- clock-mult = <1>;
+- };
+- hp_clk: hp {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <12>;
+- clock-mult = <1>;
+- };
+- i_clk: i {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <2>;
+- clock-mult = <1>;
+- };
+- b_clk: b {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <12>;
+- clock-mult = <1>;
+- };
+- p_clk: p {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <24>;
+- clock-mult = <1>;
+- };
+- cl_clk: cl {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <48>;
+- clock-mult = <1>;
+- };
+- m2_clk: m2 {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <8>;
+- clock-mult = <1>;
+- };
+- imp_clk: imp {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <4>;
+- clock-mult = <1>;
+- };
+- rclk_clk: rclk {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <(48 * 1024)>;
+- clock-mult = <1>;
+- };
+- oscclk_clk: oscclk {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <(12 * 1024)>;
+- clock-mult = <1>;
+- };
+- zb3_clk: zb3 {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
+- #clock-cells = <0>;
+- clock-div = <4>;
+- clock-mult = <1>;
+- };
+- zb3d2_clk: zb3d2 {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
+- #clock-cells = <0>;
+- clock-div = <8>;
+- clock-mult = <1>;
+- };
+- ddr_clk: ddr {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
+- #clock-cells = <0>;
+- clock-div = <8>;
+- clock-mult = <1>;
+- };
+- mp_clk: mp {
+- compatible = "fixed-factor-clock";
+- clocks = <&pll1_div2_clk>;
+- #clock-cells = <0>;
+- clock-div = <15>;
+- clock-mult = <1>;
+- };
+- cp_clk: cp {
+- compatible = "fixed-factor-clock";
+- clocks = <&extal_clk>;
+- #clock-cells = <0>;
+- clock-div = <2>;
+- clock-mult = <1>;
+- };
+-
+- /* Gate clocks */
+- mstp0_clks: mstp0_clks@e6150130 {
+- compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>;
+- clocks = <&mp_clk>;
+- #clock-cells = <1>;
+- clock-indices = <R8A7790_CLK_MSIOF0>;
+- clock-output-names = "msiof0";
+- };
+- mstp1_clks: mstp1_clks@e6150134 {
+- compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
+- clocks = <&zs_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&m2_clk>,
+- <&zs_clk>, <&p_clk>, <&zg_clk>, <&zs_clk>, <&zs_clk>,
+- <&zs_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
+- <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7790_CLK_VCP1 R8A7790_CLK_VCP0 R8A7790_CLK_VPC1
+- R8A7790_CLK_VPC0 R8A7790_CLK_JPU R8A7790_CLK_SSP1
+- R8A7790_CLK_TMU1 R8A7790_CLK_3DG R8A7790_CLK_2DDMAC
+- R8A7790_CLK_FDP1_2 R8A7790_CLK_FDP1_1 R8A7790_CLK_FDP1_0
+- R8A7790_CLK_TMU3 R8A7790_CLK_TMU2 R8A7790_CLK_CMT0
+- R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1 R8A7790_CLK_VSP1_DU0
+- R8A7790_CLK_VSP1_R R8A7790_CLK_VSP1_S
+- >;
+- clock-output-names =
+- "vcp1", "vcp0", "vpc1", "vpc0", "jpu", "ssp1",
+- "tmu1", "3dg", "2ddmac", "fdp1-2", "fdp1-1",
+- "fdp1-0", "tmu3", "tmu2", "cmt0", "tmu0",
+- "vsp1-du1", "vsp1-du0", "vsp1-rt", "vsp1-sy";
+- };
+- mstp2_clks: mstp2_clks@e6150138 {
+- compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
+- clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
+- <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&zs_clk>,
+- <&zs_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7790_CLK_SCIFA2 R8A7790_CLK_SCIFA1 R8A7790_CLK_SCIFA0
+- R8A7790_CLK_MSIOF2 R8A7790_CLK_SCIFB0 R8A7790_CLK_SCIFB1
+- R8A7790_CLK_MSIOF1 R8A7790_CLK_MSIOF3 R8A7790_CLK_SCIFB2
+- R8A7790_CLK_SYS_DMAC1 R8A7790_CLK_SYS_DMAC0
+- >;
+- clock-output-names =
+- "scifa2", "scifa1", "scifa0", "msiof2", "scifb0",
+- "scifb1", "msiof1", "msiof3", "scifb2",
+- "sys-dmac1", "sys-dmac0";
+- };
+- mstp3_clks: mstp3_clks@e615013c {
+- compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
+- clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&p_clk>, <&sd3_clk>,
+- <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>,
+- <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>,
+- <&hp_clk>, <&hp_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SCIF2 R8A7790_CLK_SDHI3
+- R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0
+- R8A7790_CLK_IIC0 R8A7790_CLK_PCIEC R8A7790_CLK_IIC1 R8A7790_CLK_SSUSB R8A7790_CLK_CMT1
+- R8A7790_CLK_USBDMAC0 R8A7790_CLK_USBDMAC1
+- >;
+- clock-output-names =
+- "iic2", "tpu0", "mmcif1", "scif2", "sdhi3",
+- "sdhi2", "sdhi1", "sdhi0", "mmcif0",
+- "iic0", "pciec", "iic1", "ssusb", "cmt1",
+- "usbdmac0", "usbdmac1";
+- };
+- mstp4_clks: mstp4_clks@e6150140 {
+- compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
+- clocks = <&cp_clk>, <&zs_clk>;
+- #clock-cells = <1>;
+- clock-indices = <R8A7790_CLK_IRQC R8A7790_CLK_INTC_SYS>;
+- clock-output-names = "irqc", "intc-sys";
+- };
+- mstp5_clks: mstp5_clks@e6150144 {
+- compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
+- clocks = <&hp_clk>, <&hp_clk>, <&cpg_clocks R8A7790_CLK_ADSP>,
+- <&extal_clk>, <&p_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7790_CLK_AUDIO_DMAC0 R8A7790_CLK_AUDIO_DMAC1
+- R8A7790_CLK_ADSP_MOD R8A7790_CLK_THERMAL
+- R8A7790_CLK_PWM
+- >;
+- clock-output-names = "audmac0", "audmac1", "adsp_mod",
+- "thermal", "pwm";
+- };
+- mstp7_clks: mstp7_clks@e615014c {
+- compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
+- clocks = <&mp_clk>, <&hp_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>,
+- <&p_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>,
+- <&zx_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7790_CLK_EHCI R8A7790_CLK_HSUSB R8A7790_CLK_HSCIF1
+- R8A7790_CLK_HSCIF0 R8A7790_CLK_SCIF1 R8A7790_CLK_SCIF0
+- R8A7790_CLK_DU2 R8A7790_CLK_DU1 R8A7790_CLK_DU0
+- R8A7790_CLK_LVDS1 R8A7790_CLK_LVDS0
+- >;
+- clock-output-names =
+- "ehci", "hsusb", "hscif1", "hscif0", "scif1",
+- "scif0", "du2", "du1", "du0", "lvds1", "lvds0";
+- };
+- mstp8_clks: mstp8_clks@e6150990 {
+- compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
+- clocks = <&hp_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>,
+- <&zg_clk>, <&hp_clk>, <&p_clk>, <&zs_clk>,
+- <&zs_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7790_CLK_MLB R8A7790_CLK_VIN3 R8A7790_CLK_VIN2
+- R8A7790_CLK_VIN1 R8A7790_CLK_VIN0
+- R8A7790_CLK_ETHERAVB R8A7790_CLK_ETHER
+- R8A7790_CLK_SATA1 R8A7790_CLK_SATA0
+- >;
+- clock-output-names =
+- "mlb", "vin3", "vin2", "vin1", "vin0",
+- "etheravb", "ether", "sata1", "sata0";
+- };
+- mstp9_clks: mstp9_clks@e6150994 {
+- compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
+- clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>,
+- <&cp_clk>, <&cp_clk>, <&cp_clk>,
+- <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, <&cp_clk>,
+- <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7790_CLK_GPIO5 R8A7790_CLK_GPIO4 R8A7790_CLK_GPIO3
+- R8A7790_CLK_GPIO2 R8A7790_CLK_GPIO1 R8A7790_CLK_GPIO0
+- R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD R8A7790_CLK_IICDVFS
+- R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1 R8A7790_CLK_I2C0
+- >;
+- clock-output-names =
+- "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0",
+- "rcan1", "rcan0", "qspi_mod", "iic3",
+- "i2c3", "i2c2", "i2c1", "i2c0";
+- };
+- mstp10_clks: mstp10_clks@e6150998 {
+- compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>;
+- clocks = <&p_clk>,
+- <&mstp10_clks R8A7790_CLK_SSI_ALL>, <&mstp10_clks R8A7790_CLK_SSI_ALL>,
+- <&mstp10_clks R8A7790_CLK_SSI_ALL>, <&mstp10_clks R8A7790_CLK_SSI_ALL>,
+- <&mstp10_clks R8A7790_CLK_SSI_ALL>, <&mstp10_clks R8A7790_CLK_SSI_ALL>,
+- <&mstp10_clks R8A7790_CLK_SSI_ALL>, <&mstp10_clks R8A7790_CLK_SSI_ALL>,
+- <&mstp10_clks R8A7790_CLK_SSI_ALL>, <&mstp10_clks R8A7790_CLK_SSI_ALL>,
+- <&p_clk>,
+- <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
+- <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
+- <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
+- <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
+- <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
+- <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
+- <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>;
+-
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7790_CLK_SSI_ALL
+- R8A7790_CLK_SSI9 R8A7790_CLK_SSI8 R8A7790_CLK_SSI7 R8A7790_CLK_SSI6 R8A7790_CLK_SSI5
+- R8A7790_CLK_SSI4 R8A7790_CLK_SSI3 R8A7790_CLK_SSI2 R8A7790_CLK_SSI1 R8A7790_CLK_SSI0
+- R8A7790_CLK_SCU_ALL
+- R8A7790_CLK_SCU_DVC1 R8A7790_CLK_SCU_DVC0
+- R8A7790_CLK_SCU_CTU1_MIX1 R8A7790_CLK_SCU_CTU0_MIX0
+- R8A7790_CLK_SCU_SRC9 R8A7790_CLK_SCU_SRC8 R8A7790_CLK_SCU_SRC7 R8A7790_CLK_SCU_SRC6 R8A7790_CLK_SCU_SRC5
+- R8A7790_CLK_SCU_SRC4 R8A7790_CLK_SCU_SRC3 R8A7790_CLK_SCU_SRC2 R8A7790_CLK_SCU_SRC1 R8A7790_CLK_SCU_SRC0
+- >;
+- clock-output-names =
+- "ssi-all",
+- "ssi9", "ssi8", "ssi7", "ssi6", "ssi5",
+- "ssi4", "ssi3", "ssi2", "ssi1", "ssi0",
+- "scu-all",
+- "scu-dvc1", "scu-dvc0",
+- "scu-ctu1-mix1", "scu-ctu0-mix0",
+- "scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5",
+- "scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0";
+- };
+ };
+
+ prr: chipid@ff000044 {
+@@ -1518,7 +1154,7 @@
+ compatible = "renesas,qspi-r8a7790", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7790_CLK_QSPI_MOD>;
++ clocks = <&cpg CPG_MOD 917>;
+ dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -1534,7 +1170,7 @@
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e20000 0 0x0064>;
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
++ clocks = <&cpg CPG_MOD 0>;
+ dmas = <&dmac0 0x51>, <&dmac0 0x52>,
+ <&dmac1 0x51>, <&dmac1 0x52>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -1549,7 +1185,7 @@
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e10000 0 0x0064>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
++ clocks = <&cpg CPG_MOD 208>;
+ dmas = <&dmac0 0x55>, <&dmac0 0x56>,
+ <&dmac1 0x55>, <&dmac1 0x56>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -1564,7 +1200,7 @@
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e00000 0 0x0064>;
+ interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
++ clocks = <&cpg CPG_MOD 205>;
+ dmas = <&dmac0 0x41>, <&dmac0 0x42>,
+ <&dmac1 0x41>, <&dmac1 0x42>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -1579,7 +1215,7 @@
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6c90000 0 0x0064>;
+ interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;
++ clocks = <&cpg CPG_MOD 215>;
+ dmas = <&dmac0 0x45>, <&dmac0 0x46>,
+ <&dmac1 0x45>, <&dmac1 0x46>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -1593,7 +1229,7 @@
+ compatible = "renesas,xhci-r8a7790", "renesas,rcar-gen2-xhci";
+ reg = <0 0xee000000 0 0xc00>;
+ interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7790_CLK_SSUSB>;
++ clocks = <&cpg CPG_MOD 328>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ phys = <&usb2 1>;
+ phy-names = "usb";
+@@ -1606,7 +1242,7 @@
+ reg = <0 0xee090000 0 0xc00>,
+ <0 0xee080000 0 0x1100>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
++ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ status = "disabled";
+
+@@ -1639,7 +1275,7 @@
+ reg = <0 0xee0b0000 0 0xc00>,
+ <0 0xee0a0000 0 0x1100>;
+ interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
++ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ status = "disabled";
+
+@@ -1657,7 +1293,7 @@
+ pci2: pci@ee0d0000 {
+ compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
+ device_type = "pci";
+- clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
++ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ reg = <0 0xee0d0000 0 0xc00>,
+ <0 0xee0c0000 0 0x1100>;
+@@ -1707,7 +1343,7 @@
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7790_CLK_PCIEC>, <&pcie_bus_clk>;
++ clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
+ clock-names = "pcie", "pcie_bus";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ status = "disabled";
+@@ -1728,21 +1364,22 @@
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
+ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+
+- clocks = <&mstp10_clks R8A7790_CLK_SSI_ALL>,
+- <&mstp10_clks R8A7790_CLK_SSI9>, <&mstp10_clks R8A7790_CLK_SSI8>,
+- <&mstp10_clks R8A7790_CLK_SSI7>, <&mstp10_clks R8A7790_CLK_SSI6>,
+- <&mstp10_clks R8A7790_CLK_SSI5>, <&mstp10_clks R8A7790_CLK_SSI4>,
+- <&mstp10_clks R8A7790_CLK_SSI3>, <&mstp10_clks R8A7790_CLK_SSI2>,
+- <&mstp10_clks R8A7790_CLK_SSI1>, <&mstp10_clks R8A7790_CLK_SSI0>,
+- <&mstp10_clks R8A7790_CLK_SCU_SRC9>, <&mstp10_clks R8A7790_CLK_SCU_SRC8>,
+- <&mstp10_clks R8A7790_CLK_SCU_SRC7>, <&mstp10_clks R8A7790_CLK_SCU_SRC6>,
+- <&mstp10_clks R8A7790_CLK_SCU_SRC5>, <&mstp10_clks R8A7790_CLK_SCU_SRC4>,
+- <&mstp10_clks R8A7790_CLK_SCU_SRC3>, <&mstp10_clks R8A7790_CLK_SCU_SRC2>,
+- <&mstp10_clks R8A7790_CLK_SCU_SRC1>, <&mstp10_clks R8A7790_CLK_SCU_SRC0>,
+- <&mstp10_clks R8A7790_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7790_CLK_SCU_CTU1_MIX1>,
+- <&mstp10_clks R8A7790_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7790_CLK_SCU_CTU1_MIX1>,
+- <&mstp10_clks R8A7790_CLK_SCU_DVC0>, <&mstp10_clks R8A7790_CLK_SCU_DVC1>,
+- <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>;
++ clocks = <&cpg CPG_MOD 1005>,
++ <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
++ <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
++ <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
++ <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
++ <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
++ <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
++ <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
++ <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
++ <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
++ <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
++ <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
++ <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
++ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
++ <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
++ <&cpg CPG_CORE R8A7790_CLK_M2>;
+ clock-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
+ "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
+--
+2.19.0
+
diff --git a/patches/0300-ARM-dts-r8a7792-Convert-to-new-CPG-MSSR-bindings.patch b/patches/0300-ARM-dts-r8a7792-Convert-to-new-CPG-MSSR-bindings.patch
new file mode 100644
index 0000000..24299cd
--- /dev/null
+++ b/patches/0300-ARM-dts-r8a7792-Convert-to-new-CPG-MSSR-bindings.patch
@@ -0,0 +1,735 @@
+From 39a958a38410e62533019207ab3dee62733a290f Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 18 Aug 2017 11:11:36 +0200
+Subject: [PATCH 0300/1795] ARM: dts: r8a7792: Convert to new CPG/MSSR bindings
+
+Convert the R-Car V2H SoC from the old "Renesas R-Car Gen2 Clock Pulse
+Generator (CPG)" and "Renesas CPG Module Stop (MSTP) Clocks" DT bindings
+to the new unified "Renesas Clock Pulse Generator / Module Standby and
+Software Reset" DT bindings.
+
+This simplifies the DTS files, and allows to add support for reset
+control later.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 762dbc444ca240580f7eda5b9152d147cca608b3)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7792-blanche.dts | 3 +-
+ arch/arm/boot/dts/r8a7792-wheat.dts | 3 +-
+ arch/arm/boot/dts/r8a7792.dtsi | 333 +++++---------------------
+ 3 files changed, 63 insertions(+), 276 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7792-blanche.dts b/arch/arm/boot/dts/r8a7792-blanche.dts
+index f3ea43b7b724..9b67dca6c9ef 100644
+--- a/arch/arm/boot/dts/r8a7792-blanche.dts
++++ b/arch/arm/boot/dts/r8a7792-blanche.dts
+@@ -310,8 +310,7 @@
+ pinctrl-0 = <&du0_pins &du1_pins>;
+ pinctrl-names = "default";
+
+- clocks = <&mstp7_clks R8A7792_CLK_DU0>, <&mstp7_clks R8A7792_CLK_DU1>,
+- <&x1_clk>, <&x2_clk>;
++ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&x1_clk>, <&x2_clk>;
+ clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
+ status = "okay";
+
+diff --git a/arch/arm/boot/dts/r8a7792-wheat.dts b/arch/arm/boot/dts/r8a7792-wheat.dts
+index c24f26fdab1f..b9471b67b728 100644
+--- a/arch/arm/boot/dts/r8a7792-wheat.dts
++++ b/arch/arm/boot/dts/r8a7792-wheat.dts
+@@ -305,8 +305,7 @@
+ pinctrl-0 = <&du0_pins &du1_pins>;
+ pinctrl-names = "default";
+
+- clocks = <&mstp7_clks R8A7792_CLK_DU0>, <&mstp7_clks R8A7792_CLK_DU1>,
+- <&osc2_clk>;
++ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&osc2_clk>;
+ clock-names = "du.0", "du.1", "dclkin.0";
+ status = "okay";
+
+diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
+index 2623f39bed2b..a209787d899a 100644
+--- a/arch/arm/boot/dts/r8a7792.dtsi
++++ b/arch/arm/boot/dts/r8a7792.dtsi
+@@ -8,7 +8,7 @@
+ * kind, whether express or implied.
+ */
+
+-#include <dt-bindings/clock/r8a7792-clock.h>
++#include <dt-bindings/clock/r8a7792-cpg-mssr.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/power/r8a7792-sysc.h>
+@@ -46,7 +46,7 @@
+ compatible = "arm,cortex-a15";
+ reg = <0>;
+ clock-frequency = <1000000000>;
+- clocks = <&z_clk>;
++ clocks = <&cpg CPG_CORE R8A7792_CLK_Z>;
+ power-domains = <&sysc R8A7792_PD_CA15_CPU0>;
+ next-level-cache = <&L2_CA15>;
+ };
+@@ -92,7 +92,7 @@
+ <0 0xf1006000 0 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
+ IRQ_TYPE_LEVEL_HIGH)>;
+- clocks = <&mstp4_clks R8A7792_CLK_INTC_SYS>;
++ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+@@ -106,7 +106,7 @@
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp4_clks R8A7792_CLK_IRQC>;
++ clocks = <&cpg CPG_MOD 407>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+@@ -153,7 +153,7 @@
+ gpio-ranges = <&pfc 0 0 29>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7792_CLK_GPIO0>;
++ clocks = <&cpg CPG_MOD 912>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+@@ -167,7 +167,7 @@
+ gpio-ranges = <&pfc 0 32 23>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7792_CLK_GPIO1>;
++ clocks = <&cpg CPG_MOD 911>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+@@ -181,7 +181,7 @@
+ gpio-ranges = <&pfc 0 64 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7792_CLK_GPIO2>;
++ clocks = <&cpg CPG_MOD 910>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+@@ -195,7 +195,7 @@
+ gpio-ranges = <&pfc 0 96 28>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7792_CLK_GPIO3>;
++ clocks = <&cpg CPG_MOD 909>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+@@ -209,7 +209,7 @@
+ gpio-ranges = <&pfc 0 128 17>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7792_CLK_GPIO4>;
++ clocks = <&cpg CPG_MOD 908>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+@@ -223,7 +223,7 @@
+ gpio-ranges = <&pfc 0 160 17>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7792_CLK_GPIO5>;
++ clocks = <&cpg CPG_MOD 907>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+@@ -237,7 +237,7 @@
+ gpio-ranges = <&pfc 0 192 17>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7792_CLK_GPIO6>;
++ clocks = <&cpg CPG_MOD 905>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+@@ -251,7 +251,7 @@
+ gpio-ranges = <&pfc 0 224 17>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7792_CLK_GPIO7>;
++ clocks = <&cpg CPG_MOD 904>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+@@ -265,7 +265,7 @@
+ gpio-ranges = <&pfc 0 256 17>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7792_CLK_GPIO8>;
++ clocks = <&cpg CPG_MOD 921>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+@@ -279,7 +279,7 @@
+ gpio-ranges = <&pfc 0 288 17>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7792_CLK_GPIO9>;
++ clocks = <&cpg CPG_MOD 919>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+@@ -293,7 +293,7 @@
+ gpio-ranges = <&pfc 0 320 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7792_CLK_GPIO10>;
++ clocks = <&cpg CPG_MOD 914>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+@@ -307,7 +307,7 @@
+ gpio-ranges = <&pfc 0 352 30>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7792_CLK_GPIO11>;
++ clocks = <&cpg CPG_MOD 913>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+@@ -336,7 +336,7 @@
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+- clocks = <&mstp2_clks R8A7792_CLK_SYS_DMAC0>;
++ clocks = <&cpg CPG_MOD 219>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ #dma-cells = <1>;
+@@ -368,7 +368,7 @@
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+- clocks = <&mstp2_clks R8A7792_CLK_SYS_DMAC1>;
++ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ #dma-cells = <1>;
+@@ -380,8 +380,8 @@
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6e60000 0 64>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7792_CLK_SCIF0>, <&zs_clk>,
+- <&scif_clk>;
++ clocks = <&cpg CPG_MOD 721>,
++ <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
+ <&dmac1 0x29>, <&dmac1 0x2a>;
+@@ -395,8 +395,8 @@
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6e68000 0 64>;
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7792_CLK_SCIF1>, <&zs_clk>,
+- <&scif_clk>;
++ clocks = <&cpg CPG_MOD 720>,
++ <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
+ <&dmac1 0x2d>, <&dmac1 0x2e>;
+@@ -410,8 +410,8 @@
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6e58000 0 64>;
+ interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7792_CLK_SCIF2>, <&zs_clk>,
+- <&scif_clk>;
++ clocks = <&cpg CPG_MOD 719>,
++ <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
+ <&dmac1 0x2b>, <&dmac1 0x2c>;
+@@ -425,8 +425,8 @@
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ea8000 0 64>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7792_CLK_SCIF3>, <&zs_clk>,
+- <&scif_clk>;
++ clocks = <&cpg CPG_MOD 718>,
++ <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
+ <&dmac1 0x2f>, <&dmac1 0x30>;
+@@ -440,8 +440,8 @@
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c0000 0 96>;
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7792_CLK_HSCIF0>, <&zs_clk>,
+- <&scif_clk>;
++ clocks = <&cpg CPG_MOD 717>,
++ <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
+ <&dmac1 0x39>, <&dmac1 0x3a>;
+@@ -455,8 +455,8 @@
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c8000 0 96>;
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7792_CLK_HSCIF1>, <&zs_clk>,
+- <&scif_clk>;
++ clocks = <&cpg CPG_MOD 716>,
++ <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
+ <&dmac1 0x4d>, <&dmac1 0x4e>;
+@@ -490,7 +490,7 @@
+ dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+ <&dmac1 0xcd>, <&dmac1 0xce>;
+ dma-names = "tx", "rx", "tx", "rx";
+- clocks = <&mstp3_clks R8A7792_CLK_SDHI0>;
++ clocks = <&cpg CPG_MOD 314>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+@@ -500,7 +500,7 @@
+ "renesas,rcar-gen2-jpu";
+ reg = <0 0xfe980000 0 0x10300>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp1_clks R8A7792_CLK_JPU>;
++ clocks = <&cpg CPG_MOD 106>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+@@ -509,7 +509,7 @@
+ "renesas,etheravb-rcar-gen2";
+ reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
+ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7792_CLK_ETHERAVB>;
++ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -522,7 +522,7 @@
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6508000 0 0x40>;
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7792_CLK_I2C0>;
++ clocks = <&cpg CPG_MOD 931>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ i2c-scl-internal-delay-ns = <6>;
+ #address-cells = <1>;
+@@ -535,7 +535,7 @@
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6518000 0 0x40>;
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7792_CLK_I2C1>;
++ clocks = <&cpg CPG_MOD 930>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ i2c-scl-internal-delay-ns = <6>;
+ #address-cells = <1>;
+@@ -548,7 +548,7 @@
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6530000 0 0x40>;
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7792_CLK_I2C2>;
++ clocks = <&cpg CPG_MOD 929>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ i2c-scl-internal-delay-ns = <6>;
+ #address-cells = <1>;
+@@ -561,7 +561,7 @@
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6540000 0 0x40>;
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7792_CLK_I2C3>;
++ clocks = <&cpg CPG_MOD 928>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ i2c-scl-internal-delay-ns = <6>;
+ #address-cells = <1>;
+@@ -574,7 +574,7 @@
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6520000 0 0x40>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7792_CLK_I2C4>;
++ clocks = <&cpg CPG_MOD 927>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ i2c-scl-internal-delay-ns = <6>;
+ #address-cells = <1>;
+@@ -587,7 +587,7 @@
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6528000 0 0x40>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7792_CLK_I2C5>;
++ clocks = <&cpg CPG_MOD 925>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ i2c-scl-internal-delay-ns = <110>;
+ #address-cells = <1>;
+@@ -599,7 +599,7 @@
+ compatible = "renesas,qspi-r8a7792", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7792_CLK_QSPI_MOD>;
++ clocks = <&cpg CPG_MOD 917>;
+ dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -615,7 +615,7 @@
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e20000 0 0x0064>;
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp0_clks R8A7792_CLK_MSIOF0>;
++ clocks = <&cpg CPG_MOD 000>;
+ dmas = <&dmac0 0x51>, <&dmac0 0x52>,
+ <&dmac1 0x51>, <&dmac1 0x52>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -630,7 +630,7 @@
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e10000 0 0x0064>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7792_CLK_MSIOF1>;
++ clocks = <&cpg CPG_MOD 208>;
+ dmas = <&dmac0 0x55>, <&dmac0 0x56>,
+ <&dmac1 0x55>, <&dmac1 0x56>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -646,8 +646,8 @@
+ reg-names = "du";
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7792_CLK_DU0>,
+- <&mstp7_clks R8A7792_CLK_DU1>;
++ clocks = <&cpg CPG_MOD 724>,
++ <&cpg CPG_MOD 723>;
+ clock-names = "du.0", "du.1";
+ status = "disabled";
+
+@@ -673,8 +673,8 @@
+ "renesas,rcar-gen2-can";
+ reg = <0 0xe6e80000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7792_CLK_CAN0>,
+- <&rcan_clk>, <&can_clk>;
++ clocks = <&cpg CPG_MOD 916>,
++ <&cpg CPG_CORE R8A7792_CLK_RCAN>, <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ status = "disabled";
+@@ -685,8 +685,8 @@
+ "renesas,rcar-gen2-can";
+ reg = <0 0xe6e88000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7792_CLK_CAN1>,
+- <&rcan_clk>, <&can_clk>;
++ clocks = <&cpg CPG_MOD 915>,
++ <&cpg CPG_CORE R8A7792_CLK_RCAN>, <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ status = "disabled";
+@@ -697,7 +697,7 @@
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef0000 0 0x1000>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7792_CLK_VIN0>;
++ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+@@ -707,7 +707,7 @@
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef1000 0 0x1000>;
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7792_CLK_VIN1>;
++ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+@@ -717,7 +717,7 @@
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef2000 0 0x1000>;
+ interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7792_CLK_VIN2>;
++ clocks = <&cpg CPG_MOD 809>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+@@ -727,7 +727,7 @@
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef3000 0 0x1000>;
+ interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7792_CLK_VIN3>;
++ clocks = <&cpg CPG_MOD 808>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+@@ -737,7 +737,7 @@
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef4000 0 0x1000>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7792_CLK_VIN4>;
++ clocks = <&cpg CPG_MOD 805>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+@@ -747,7 +747,7 @@
+ "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef5000 0 0x1000>;
+ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7792_CLK_VIN5>;
++ clocks = <&cpg CPG_MOD 804>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+@@ -756,7 +756,7 @@
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe928000 0 0x8000>;
+ interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp1_clks R8A7792_CLK_VSP1_SY>;
++ clocks = <&cpg CPG_MOD 131>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+@@ -764,7 +764,7 @@
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe930000 0 0x8000>;
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp1_clks R8A7792_CLK_VSP1DU0>;
++ clocks = <&cpg CPG_MOD 128>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+@@ -772,229 +772,18 @@
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe938000 0 0x8000>;
+ interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp1_clks R8A7792_CLK_VSP1DU1>;
++ clocks = <&cpg CPG_MOD 127>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+- /* Special CPG clocks */
+- cpg_clocks: cpg_clocks@e6150000 {
+- compatible = "renesas,r8a7792-cpg-clocks",
+- "renesas,rcar-gen2-cpg-clocks";
++ cpg: clock-controller@e6150000 {
++ compatible = "renesas,r8a7792-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+ clocks = <&extal_clk>;
+- #clock-cells = <1>;
+- clock-output-names = "main", "pll0", "pll1", "pll3",
+- "lb", "qspi";
++ clock-names = "extal";
++ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ };
+-
+- /* Fixed factor clocks */
+- pll1_div2_clk: pll1_div2 {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <2>;
+- clock-mult = <1>;
+- };
+- z_clk: z {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7792_CLK_PLL0>;
+- #clock-cells = <0>;
+- clock-div = <1>;
+- clock-mult = <1>;
+- };
+- zx_clk: zx {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <3>;
+- clock-mult = <1>;
+- };
+- zs_clk: zs {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <6>;
+- clock-mult = <1>;
+- };
+- hp_clk: hp {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <12>;
+- clock-mult = <1>;
+- };
+- p_clk: p {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <24>;
+- clock-mult = <1>;
+- };
+- cp_clk: cp {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <48>;
+- clock-mult = <1>;
+- };
+- mp_clk: mp {
+- compatible = "fixed-factor-clock";
+- clocks = <&pll1_div2_clk>;
+- #clock-cells = <0>;
+- clock-div = <15>;
+- clock-mult = <1>;
+- };
+- m2_clk: m2 {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <8>;
+- clock-mult = <1>;
+- };
+- sd_clk: sd {
+- compatible = "fixed-factor-clock";
+- clocks = <&pll1_div2_clk>;
+- #clock-cells = <0>;
+- clock-div = <8>;
+- clock-mult = <1>;
+- };
+- rcan_clk: rcan {
+- compatible = "fixed-factor-clock";
+- clocks = <&pll1_div2_clk>;
+- #clock-cells = <0>;
+- clock-div = <49>;
+- clock-mult = <1>;
+- };
+- zg_clk: zg {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <5>;
+- clock-mult = <1>;
+- };
+-
+- /* Gate clocks */
+- mstp0_clks: mstp0_clks@e6150130 {
+- compatible = "renesas,r8a7792-mstp-clocks",
+- "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>;
+- clocks = <&mp_clk>;
+- #clock-cells = <1>;
+- clock-indices = <R8A7792_CLK_MSIOF0>;
+- clock-output-names = "msiof0";
+- };
+- mstp1_clks: mstp1_clks@e6150134 {
+- compatible = "renesas,r8a7792-mstp-clocks",
+- "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
+- clocks = <&m2_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7792_CLK_JPU
+- R8A7792_CLK_VSP1DU1 R8A7792_CLK_VSP1DU0
+- R8A7792_CLK_VSP1_SY
+- >;
+- clock-output-names = "jpu", "vsp1du1", "vsp1du0",
+- "vsp1-sy";
+- };
+- mstp2_clks: mstp2_clks@e6150138 {
+- compatible = "renesas,r8a7792-mstp-clocks",
+- "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
+- clocks = <&mp_clk>, <&zs_clk>, <&zs_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7792_CLK_MSIOF1
+- R8A7792_CLK_SYS_DMAC1 R8A7792_CLK_SYS_DMAC0
+- >;
+- clock-output-names = "msiof1", "sys-dmac1", "sys-dmac0";
+- };
+- mstp3_clks: mstp3_clks@e615013c {
+- compatible = "renesas,r8a7792-mstp-clocks",
+- "renesas,cpg-mstp-clocks";
+- reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
+- clocks = <&sd_clk>;
+- #clock-cells = <1>;
+- renesas,clock-indices = <R8A7792_CLK_SDHI0>;
+- clock-output-names = "sdhi0";
+- };
+- mstp4_clks: mstp4_clks@e6150140 {
+- compatible = "renesas,r8a7792-mstp-clocks",
+- "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
+- clocks = <&cp_clk>, <&zs_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7792_CLK_IRQC R8A7792_CLK_INTC_SYS
+- >;
+- clock-output-names = "irqc", "intc-sys";
+- };
+- mstp7_clks: mstp7_clks@e615014c {
+- compatible = "renesas,r8a7792-mstp-clocks",
+- "renesas,cpg-mstp-clocks";
+- reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
+- clocks = <&zs_clk>, <&zs_clk>, <&p_clk>, <&p_clk>,
+- <&p_clk>, <&p_clk>, <&zx_clk>, <&zx_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7792_CLK_HSCIF1 R8A7792_CLK_HSCIF0
+- R8A7792_CLK_SCIF3 R8A7792_CLK_SCIF2
+- R8A7792_CLK_SCIF1 R8A7792_CLK_SCIF0
+- R8A7792_CLK_DU1 R8A7792_CLK_DU0
+- >;
+- clock-output-names = "hscif1", "hscif0", "scif3",
+- "scif2", "scif1", "scif0",
+- "du1", "du0";
+- };
+- mstp8_clks: mstp8_clks@e6150990 {
+- compatible = "renesas,r8a7792-mstp-clocks",
+- "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
+- clocks = <&zg_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>,
+- <&zg_clk>, <&zg_clk>, <&hp_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7792_CLK_VIN5 R8A7792_CLK_VIN4
+- R8A7792_CLK_VIN3 R8A7792_CLK_VIN2
+- R8A7792_CLK_VIN1 R8A7792_CLK_VIN0
+- R8A7792_CLK_ETHERAVB
+- >;
+- clock-output-names = "vin5", "vin4", "vin3", "vin2",
+- "vin1", "vin0", "etheravb";
+- };
+- mstp9_clks: mstp9_clks@e6150994 {
+- compatible = "renesas,r8a7792-mstp-clocks",
+- "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
+- clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
+- <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
+- <&cp_clk>, <&cp_clk>, <&p_clk>, <&p_clk>,
+- <&cpg_clocks R8A7792_CLK_QSPI>,
+- <&cp_clk>, <&cp_clk>, <&hp_clk>, <&hp_clk>,
+- <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7792_CLK_GPIO7 R8A7792_CLK_GPIO6
+- R8A7792_CLK_GPIO5 R8A7792_CLK_GPIO4
+- R8A7792_CLK_GPIO3 R8A7792_CLK_GPIO2
+- R8A7792_CLK_GPIO1 R8A7792_CLK_GPIO0
+- R8A7792_CLK_GPIO11 R8A7792_CLK_GPIO10
+- R8A7792_CLK_CAN1 R8A7792_CLK_CAN0
+- R8A7792_CLK_QSPI_MOD
+- R8A7792_CLK_GPIO9 R8A7792_CLK_GPIO8
+- R8A7792_CLK_I2C5 R8A7792_CLK_I2C4
+- R8A7792_CLK_I2C3 R8A7792_CLK_I2C2
+- R8A7792_CLK_I2C1 R8A7792_CLK_I2C0
+- >;
+- clock-output-names =
+- "gpio7", "gpio6", "gpio5", "gpio4",
+- "gpio3", "gpio2", "gpio1", "gpio0",
+- "gpio11", "gpio10", "can1", "can0",
+- "qspi_mod", "gpio9", "gpio8",
+- "i2c5", "i2c4", "i2c3", "i2c2",
+- "i2c1", "i2c0";
+- };
+ };
+
+ /* External root clock */
+--
+2.19.0
+
diff --git a/patches/0301-ARM-dts-r8a7793-Convert-to-new-CPG-MSSR-bindings.patch b/patches/0301-ARM-dts-r8a7793-Convert-to-new-CPG-MSSR-bindings.patch
new file mode 100644
index 0000000..6773fd7
--- /dev/null
+++ b/patches/0301-ARM-dts-r8a7793-Convert-to-new-CPG-MSSR-bindings.patch
@@ -0,0 +1,927 @@
+From e979202e66bcf05fe306ac86726b0faa08823419 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 18 Aug 2017 11:11:37 +0200
+Subject: [PATCH 0301/1795] ARM: dts: r8a7793: Convert to new CPG/MSSR bindings
+
+Convert the R-Car M2-N SoC from the old "Renesas R-Car Gen2 Clock Pulse
+Generator (CPG)", "Renesas CPG DIV6 Clock", and "Renesas CPG Module Stop
+(MSTP) Clocks" DT bindings to the new unified "Renesas Clock Pulse
+Generator / Module Standby and Software Reset" DT bindings.
+
+This simplifies the DTS files, and allows to add support for reset
+control later.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d77fe953768850557a1851d2c933b76b2083e4d5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7793-gose.dts | 4 +-
+ arch/arm/boot/dts/r8a7793.dtsi | 459 +++++------------------------
+ 2 files changed, 82 insertions(+), 381 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts
+index 76e3aca2029e..51b3ffac8efa 100644
+--- a/arch/arm/boot/dts/r8a7793-gose.dts
++++ b/arch/arm/boot/dts/r8a7793-gose.dts
+@@ -303,9 +303,7 @@
+ pinctrl-names = "default";
+ status = "okay";
+
+- clocks = <&mstp7_clks R8A7793_CLK_DU0>,
+- <&mstp7_clks R8A7793_CLK_DU1>,
+- <&mstp7_clks R8A7793_CLK_LVDS0>,
++ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 726>,
+ <&x13_clk>, <&x2_clk>;
+ clock-names = "du.0", "du.1", "lvds.0",
+ "dclkin.0", "dclkin.1";
+diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
+index 497716b6fbe2..ef8009c01e66 100644
+--- a/arch/arm/boot/dts/r8a7793.dtsi
++++ b/arch/arm/boot/dts/r8a7793.dtsi
+@@ -8,7 +8,7 @@
+ * kind, whether express or implied.
+ */
+
+-#include <dt-bindings/clock/r8a7793-clock.h>
++#include <dt-bindings/clock/r8a7793-cpg-mssr.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/power/r8a7793-sysc.h>
+@@ -43,7 +43,7 @@
+ reg = <0>;
+ clock-frequency = <1500000000>;
+ voltage-tolerance = <1>; /* 1% */
+- clocks = <&cpg_clocks R8A7793_CLK_Z>;
++ clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;
+ clock-latency = <300000>; /* 300 us */
+ power-domains = <&sysc R8A7793_PD_CA15_CPU0>;
+
+@@ -108,7 +108,7 @@
+ <0 0xf1004000 0 0x2000>,
+ <0 0xf1006000 0 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+- clocks = <&mstp4_clks R8A7793_CLK_INTC_SYS>;
++ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ };
+@@ -122,7 +122,7 @@
+ gpio-ranges = <&pfc 0 0 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7793_CLK_GPIO0>;
++ clocks = <&cpg CPG_MOD 912>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ };
+
+@@ -135,7 +135,7 @@
+ gpio-ranges = <&pfc 0 32 26>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7793_CLK_GPIO1>;
++ clocks = <&cpg CPG_MOD 911>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ };
+
+@@ -148,7 +148,7 @@
+ gpio-ranges = <&pfc 0 64 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7793_CLK_GPIO2>;
++ clocks = <&cpg CPG_MOD 910>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ };
+
+@@ -161,7 +161,7 @@
+ gpio-ranges = <&pfc 0 96 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7793_CLK_GPIO3>;
++ clocks = <&cpg CPG_MOD 909>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ };
+
+@@ -174,7 +174,7 @@
+ gpio-ranges = <&pfc 0 128 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7793_CLK_GPIO4>;
++ clocks = <&cpg CPG_MOD 908>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ };
+
+@@ -187,7 +187,7 @@
+ gpio-ranges = <&pfc 0 160 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7793_CLK_GPIO5>;
++ clocks = <&cpg CPG_MOD 907>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ };
+
+@@ -200,7 +200,7 @@
+ gpio-ranges = <&pfc 0 192 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7793_CLK_GPIO6>;
++ clocks = <&cpg CPG_MOD 905>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ };
+
+@@ -213,7 +213,7 @@
+ gpio-ranges = <&pfc 0 224 26>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7793_CLK_GPIO7>;
++ clocks = <&cpg CPG_MOD 904>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ };
+
+@@ -223,7 +223,7 @@
+ "renesas,rcar-thermal";
+ reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp5_clks R8A7793_CLK_THERMAL>;
++ clocks = <&cpg CPG_MOD 522>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ #thermal-sensor-cells = <0>;
+ };
+@@ -241,7 +241,7 @@
+ reg = <0 0xffca0000 0 0x1004>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp1_clks R8A7793_CLK_CMT0>;
++ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+
+@@ -261,7 +261,7 @@
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7793_CLK_CMT1>;
++ clocks = <&cpg CPG_MOD 329>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+
+@@ -285,7 +285,7 @@
+ <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp4_clks R8A7793_CLK_IRQC>;
++ clocks = <&cpg CPG_MOD 407>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ };
+
+@@ -313,7 +313,7 @@
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+- clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC0>;
++ clocks = <&cpg CPG_MOD 219>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ #dma-cells = <1>;
+@@ -344,7 +344,7 @@
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+- clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC1>;
++ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ #dma-cells = <1>;
+@@ -373,7 +373,7 @@
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+- clocks = <&mstp5_clks R8A7793_CLK_AUDIO_DMAC0>;
++ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ #dma-cells = <1>;
+@@ -402,7 +402,7 @@
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+- clocks = <&mstp5_clks R8A7793_CLK_AUDIO_DMAC1>;
++ clocks = <&cpg CPG_MOD 501>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ #dma-cells = <1>;
+@@ -416,7 +416,7 @@
+ compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6508000 0 0x40>;
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7793_CLK_I2C0>;
++ clocks = <&cpg CPG_MOD 931>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+@@ -428,7 +428,7 @@
+ compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6518000 0 0x40>;
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7793_CLK_I2C1>;
++ clocks = <&cpg CPG_MOD 930>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+@@ -440,7 +440,7 @@
+ compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6530000 0 0x40>;
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7793_CLK_I2C2>;
++ clocks = <&cpg CPG_MOD 929>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+@@ -452,7 +452,7 @@
+ compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6540000 0 0x40>;
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7793_CLK_I2C3>;
++ clocks = <&cpg CPG_MOD 928>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+@@ -464,7 +464,7 @@
+ compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6520000 0 0x40>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7793_CLK_I2C4>;
++ clocks = <&cpg CPG_MOD 927>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+@@ -477,7 +477,7 @@
+ compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6528000 0 0x40>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7793_CLK_I2C5>;
++ clocks = <&cpg CPG_MOD 925>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+@@ -491,7 +491,7 @@
+ "renesas,rmobile-iic";
+ reg = <0 0xe60b0000 0 0x425>;
+ interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7793_CLK_IICDVFS>;
++ clocks = <&cpg CPG_MOD 926>;
+ dmas = <&dmac0 0x77>, <&dmac0 0x78>,
+ <&dmac1 0x77>, <&dmac1 0x78>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -506,7 +506,7 @@
+ "renesas,rmobile-iic";
+ reg = <0 0xe6500000 0 0x425>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7793_CLK_IIC0>;
++ clocks = <&cpg CPG_MOD 318>;
+ dmas = <&dmac0 0x61>, <&dmac0 0x62>,
+ <&dmac1 0x61>, <&dmac1 0x62>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -521,7 +521,7 @@
+ "renesas,rmobile-iic";
+ reg = <0 0xe6510000 0 0x425>;
+ interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7793_CLK_IIC1>;
++ clocks = <&cpg CPG_MOD 323>;
+ dmas = <&dmac0 0x65>, <&dmac0 0x66>,
+ <&dmac1 0x65>, <&dmac1 0x66>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -538,7 +538,7 @@
+ compatible = "renesas,sdhi-r8a7793";
+ reg = <0 0xee100000 0 0x328>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7793_CLK_SDHI0>;
++ clocks = <&cpg CPG_MOD 314>;
+ dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+ <&dmac1 0xcd>, <&dmac1 0xce>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -551,7 +551,7 @@
+ compatible = "renesas,sdhi-r8a7793";
+ reg = <0 0xee140000 0 0x100>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7793_CLK_SDHI1>;
++ clocks = <&cpg CPG_MOD 312>;
+ dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
+ <&dmac1 0xc1>, <&dmac1 0xc2>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -564,7 +564,7 @@
+ compatible = "renesas,sdhi-r8a7793";
+ reg = <0 0xee160000 0 0x100>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7793_CLK_SDHI2>;
++ clocks = <&cpg CPG_MOD 311>;
+ dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
+ <&dmac1 0xd3>, <&dmac1 0xd4>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -577,7 +577,7 @@
+ compatible = "renesas,mmcif-r8a7793", "renesas,sh-mmcif";
+ reg = <0 0xee200000 0 0x80>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7793_CLK_MMCIF0>;
++ clocks = <&cpg CPG_MOD 315>;
+ dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
+ <&dmac1 0xd1>, <&dmac1 0xd2>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -592,7 +592,7 @@
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c40000 0 64>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7793_CLK_SCIFA0>;
++ clocks = <&cpg CPG_MOD 204>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x21>, <&dmac0 0x22>,
+ <&dmac1 0x21>, <&dmac1 0x22>;
+@@ -606,7 +606,7 @@
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c50000 0 64>;
+ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7793_CLK_SCIFA1>;
++ clocks = <&cpg CPG_MOD 203>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x25>, <&dmac0 0x26>,
+ <&dmac1 0x25>, <&dmac1 0x26>;
+@@ -620,7 +620,7 @@
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c60000 0 64>;
+ interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7793_CLK_SCIFA2>;
++ clocks = <&cpg CPG_MOD 202>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x27>, <&dmac0 0x28>,
+ <&dmac1 0x27>, <&dmac1 0x28>;
+@@ -634,7 +634,7 @@
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c70000 0 64>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp11_clks R8A7793_CLK_SCIFA3>;
++ clocks = <&cpg CPG_MOD 1106>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
+ <&dmac1 0x1b>, <&dmac1 0x1c>;
+@@ -648,7 +648,7 @@
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c78000 0 64>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp11_clks R8A7793_CLK_SCIFA4>;
++ clocks = <&cpg CPG_MOD 1107>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
+ <&dmac1 0x1f>, <&dmac1 0x20>;
+@@ -662,7 +662,7 @@
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c80000 0 64>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp11_clks R8A7793_CLK_SCIFA5>;
++ clocks = <&cpg CPG_MOD 1108>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x23>, <&dmac0 0x24>,
+ <&dmac1 0x23>, <&dmac1 0x24>;
+@@ -676,7 +676,7 @@
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c20000 0 0x100>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7793_CLK_SCIFB0>;
++ clocks = <&cpg CPG_MOD 206>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
+ <&dmac1 0x3d>, <&dmac1 0x3e>;
+@@ -690,7 +690,7 @@
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c30000 0 0x100>;
+ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7793_CLK_SCIFB1>;
++ clocks = <&cpg CPG_MOD 207>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
+ <&dmac1 0x19>, <&dmac1 0x1a>;
+@@ -704,7 +704,7 @@
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6ce0000 0 0x100>;
+ interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7793_CLK_SCIFB2>;
++ clocks = <&cpg CPG_MOD 216>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
+ <&dmac1 0x1d>, <&dmac1 0x1e>;
+@@ -718,7 +718,7 @@
+ "renesas,scif";
+ reg = <0 0xe6e60000 0 64>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7793_CLK_SCIF0>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
+@@ -733,7 +733,7 @@
+ "renesas,scif";
+ reg = <0 0xe6e68000 0 64>;
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7793_CLK_SCIF1>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
+@@ -748,7 +748,7 @@
+ "renesas,scif";
+ reg = <0 0xe6e58000 0 64>;
+ interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7793_CLK_SCIF2>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
+@@ -763,7 +763,7 @@
+ "renesas,scif";
+ reg = <0 0xe6ea8000 0 64>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7793_CLK_SCIF3>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
+@@ -778,7 +778,7 @@
+ "renesas,scif";
+ reg = <0 0xe6ee0000 0 64>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7793_CLK_SCIF4>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
+@@ -793,7 +793,7 @@
+ "renesas,scif";
+ reg = <0 0xe6ee8000 0 64>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7793_CLK_SCIF5>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
+@@ -808,7 +808,7 @@
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c0000 0 96>;
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7793_CLK_HSCIF0>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
+@@ -823,7 +823,7 @@
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c8000 0 96>;
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7793_CLK_HSCIF1>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
+@@ -838,7 +838,7 @@
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62d0000 0 96>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7793_CLK_HSCIF2>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
+@@ -870,7 +870,7 @@
+ compatible = "renesas,ether-r8a7793";
+ reg = <0 0xee700000 0 0x400>;
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7793_CLK_ETHER>;
++ clocks = <&cpg CPG_MOD 813>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ phy-mode = "rmii";
+ #address-cells = <1>;
+@@ -882,7 +882,7 @@
+ compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef0000 0 0x1000>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7793_CLK_VIN0>;
++ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+@@ -891,7 +891,7 @@
+ compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef1000 0 0x1000>;
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7793_CLK_VIN1>;
++ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+@@ -900,7 +900,7 @@
+ compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef2000 0 0x1000>;
+ interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7793_CLK_VIN2>;
++ clocks = <&cpg CPG_MOD 809>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+@@ -909,7 +909,7 @@
+ compatible = "renesas,qspi-r8a7793", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7793_CLK_QSPI_MOD>;
++ clocks = <&cpg CPG_MOD 917>;
+ dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -927,9 +927,9 @@
+ reg-names = "du", "lvds.0";
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7793_CLK_DU0>,
+- <&mstp7_clks R8A7793_CLK_DU1>,
+- <&mstp7_clks R8A7793_CLK_LVDS0>;
++ clocks = <&cpg CPG_MOD 724>,
++ <&cpg CPG_MOD 723>,
++ <&cpg CPG_MOD 726>;
+ clock-names = "du.0", "du.1", "lvds.0";
+ status = "disabled";
+
+@@ -954,8 +954,8 @@
+ compatible = "renesas,can-r8a7793", "renesas,rcar-gen2-can";
+ reg = <0 0xe6e80000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7793_CLK_RCAN0>,
+- <&cpg_clocks R8A7793_CLK_RCAN>, <&can_clk>;
++ clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
++ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ status = "disabled";
+@@ -965,8 +965,8 @@
+ compatible = "renesas,can-r8a7793", "renesas,rcar-gen2-can";
+ reg = <0 0xe6e88000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7793_CLK_RCAN1>,
+- <&cpg_clocks R8A7793_CLK_RCAN>, <&can_clk>;
++ clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
++ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ status = "disabled";
+@@ -1029,312 +1029,14 @@
+ };
+
+ /* Special CPG clocks */
+- cpg_clocks: cpg_clocks@e6150000 {
+- compatible = "renesas,r8a7793-cpg-clocks",
+- "renesas,rcar-gen2-cpg-clocks";
++ cpg: clock-controller@e6150000 {
++ compatible = "renesas,r8a7793-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+- clocks = <&extal_clk &usb_extal_clk>;
+- #clock-cells = <1>;
+- clock-output-names = "main", "pll0", "pll1", "pll3",
+- "lb", "qspi", "sdh", "sd0", "z",
+- "rcan", "adsp";
++ clocks = <&extal_clk>, <&usb_extal_clk>;
++ clock-names = "extal", "usb_extal";
++ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ };
+-
+- /* Variable factor clocks */
+- sd2_clk: sd2@e6150078 {
+- compatible = "renesas,r8a7793-div6-clock",
+- "renesas,cpg-div6-clock";
+- reg = <0 0xe6150078 0 4>;
+- clocks = <&pll1_div2_clk>;
+- #clock-cells = <0>;
+- };
+- sd3_clk: sd3@e615026c {
+- compatible = "renesas,r8a7793-div6-clock",
+- "renesas,cpg-div6-clock";
+- reg = <0 0xe615026c 0 4>;
+- clocks = <&pll1_div2_clk>;
+- #clock-cells = <0>;
+- };
+- mmc0_clk: mmc0@e6150240 {
+- compatible = "renesas,r8a7793-div6-clock",
+- "renesas,cpg-div6-clock";
+- reg = <0 0xe6150240 0 4>;
+- clocks = <&pll1_div2_clk>;
+- #clock-cells = <0>;
+- };
+-
+- /* Fixed factor clocks */
+- pll1_div2_clk: pll1_div2 {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <2>;
+- clock-mult = <1>;
+- };
+- zg_clk: zg {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <5>;
+- clock-mult = <1>;
+- };
+- zx_clk: zx {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <3>;
+- clock-mult = <1>;
+- };
+- zs_clk: zs {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <6>;
+- clock-mult = <1>;
+- };
+- hp_clk: hp {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <12>;
+- clock-mult = <1>;
+- };
+- p_clk: p {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <24>;
+- clock-mult = <1>;
+- };
+- m2_clk: m2 {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <8>;
+- clock-mult = <1>;
+- };
+- rclk_clk: rclk {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <(48 * 1024)>;
+- clock-mult = <1>;
+- };
+- mp_clk: mp {
+- compatible = "fixed-factor-clock";
+- clocks = <&pll1_div2_clk>;
+- #clock-cells = <0>;
+- clock-div = <15>;
+- clock-mult = <1>;
+- };
+- cp_clk: cp {
+- compatible = "fixed-factor-clock";
+- clocks = <&extal_clk>;
+- #clock-cells = <0>;
+- clock-div = <2>;
+- clock-mult = <1>;
+- };
+-
+- /* Gate clocks */
+- mstp1_clks: mstp1_clks@e6150134 {
+- compatible = "renesas,r8a7793-mstp-clocks",
+- "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
+- clocks = <&zs_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>,
+- <&zg_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>,
+- <&p_clk>, <&p_clk>, <&rclk_clk>, <&cp_clk>,
+- <&zs_clk>, <&zs_clk>, <&zs_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7793_CLK_VCP0 R8A7793_CLK_VPC0
+- R8A7793_CLK_SSP1 R8A7793_CLK_TMU1
+- R8A7793_CLK_3DG R8A7793_CLK_2DDMAC
+- R8A7793_CLK_FDP1_1 R8A7793_CLK_FDP1_0
+- R8A7793_CLK_TMU3 R8A7793_CLK_TMU2
+- R8A7793_CLK_CMT0 R8A7793_CLK_TMU0
+- R8A7793_CLK_VSP1_DU1 R8A7793_CLK_VSP1_DU0
+- R8A7793_CLK_VSP1_S
+- >;
+- clock-output-names =
+- "vcp0", "vpc0", "ssp_dev", "tmu1",
+- "pvrsrvkm", "tddmac", "fdp1", "fdp0",
+- "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
+- "vsp1-du0", "vsps";
+- };
+- mstp2_clks: mstp2_clks@e6150138 {
+- compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
+- clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
+- <&mp_clk>, <&mp_clk>, <&zs_clk>, <&zs_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7793_CLK_SCIFA2 R8A7793_CLK_SCIFA1 R8A7793_CLK_SCIFA0
+- R8A7793_CLK_SCIFB0 R8A7793_CLK_SCIFB1 R8A7793_CLK_SCIFB2
+- R8A7793_CLK_SYS_DMAC1 R8A7793_CLK_SYS_DMAC0
+- >;
+- clock-output-names =
+- "scifa2", "scifa1", "scifa0", "scifb0",
+- "scifb1", "scifb2", "sys-dmac1", "sys-dmac0";
+- };
+- mstp3_clks: mstp3_clks@e615013c {
+- compatible = "renesas,r8a7793-mstp-clocks",
+- "renesas,cpg-mstp-clocks";
+- reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
+- clocks = <&cp_clk>, <&sd3_clk>, <&sd2_clk>,
+- <&cpg_clocks R8A7793_CLK_SD0>, <&mmc0_clk>,
+- <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>,
+- <&rclk_clk>, <&hp_clk>, <&hp_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7793_CLK_TPU0 R8A7793_CLK_SDHI2
+- R8A7793_CLK_SDHI1 R8A7793_CLK_SDHI0
+- R8A7793_CLK_MMCIF0 R8A7793_CLK_IIC0
+- R8A7793_CLK_PCIEC R8A7793_CLK_IIC1
+- R8A7793_CLK_SSUSB R8A7793_CLK_CMT1
+- R8A7793_CLK_USBDMAC0 R8A7793_CLK_USBDMAC1
+- >;
+- clock-output-names =
+- "tpu0", "sdhi2", "sdhi1", "sdhi0", "mmcif0",
+- "i2c7", "pciec", "i2c8", "ssusb", "cmt1",
+- "usbdmac0", "usbdmac1";
+- };
+- mstp4_clks: mstp4_clks@e6150140 {
+- compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
+- clocks = <&cp_clk>, <&zs_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7793_CLK_IRQC R8A7793_CLK_INTC_SYS
+- >;
+- clock-output-names = "irqc", "intc-sys";
+- };
+- mstp5_clks: mstp5_clks@e6150144 {
+- compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
+- clocks = <&hp_clk>, <&hp_clk>, <&extal_clk>;
+- #clock-cells = <1>;
+- clock-indices = <R8A7793_CLK_AUDIO_DMAC0 R8A7793_CLK_AUDIO_DMAC1
+- R8A7793_CLK_THERMAL>;
+- clock-output-names = "audmac0", "audmac1", "thermal";
+- };
+- mstp7_clks: mstp7_clks@e615014c {
+- compatible = "renesas,r8a7793-mstp-clocks",
+- "renesas,cpg-mstp-clocks";
+- reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
+- clocks = <&mp_clk>, <&hp_clk>, <&zs_clk>, <&p_clk>,
+- <&p_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>,
+- <&p_clk>, <&p_clk>, <&p_clk>, <&zx_clk>,
+- <&zx_clk>, <&zx_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7793_CLK_EHCI R8A7793_CLK_HSUSB
+- R8A7793_CLK_HSCIF2 R8A7793_CLK_SCIF5
+- R8A7793_CLK_SCIF4 R8A7793_CLK_HSCIF1
+- R8A7793_CLK_HSCIF0 R8A7793_CLK_SCIF3
+- R8A7793_CLK_SCIF2 R8A7793_CLK_SCIF1
+- R8A7793_CLK_SCIF0 R8A7793_CLK_DU1
+- R8A7793_CLK_DU0 R8A7793_CLK_LVDS0
+- >;
+- clock-output-names =
+- "ehci", "hsusb", "hscif2", "scif5", "scif4",
+- "hscif1", "hscif0", "scif3", "scif2",
+- "scif1", "scif0", "du1", "du0", "lvds0";
+- };
+- mstp8_clks: mstp8_clks@e6150990 {
+- compatible = "renesas,r8a7793-mstp-clocks",
+- "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
+- clocks = <&zx_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>,
+- <&p_clk>, <&zs_clk>, <&zs_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7793_CLK_IPMMU_SGX R8A7793_CLK_VIN2
+- R8A7793_CLK_VIN1 R8A7793_CLK_VIN0
+- R8A7793_CLK_ETHER R8A7793_CLK_SATA1
+- R8A7793_CLK_SATA0
+- >;
+- clock-output-names =
+- "ipmmu_sgx", "vin2", "vin1", "vin0", "ether",
+- "sata1", "sata0";
+- };
+- mstp9_clks: mstp9_clks@e6150994 {
+- compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
+- clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
+- <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
+- <&p_clk>, <&p_clk>,
+- <&cpg_clocks R8A7793_CLK_QSPI>, <&hp_clk>,
+- <&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>,
+- <&hp_clk>, <&hp_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7793_CLK_GPIO7 R8A7793_CLK_GPIO6
+- R8A7793_CLK_GPIO5 R8A7793_CLK_GPIO4
+- R8A7793_CLK_GPIO3 R8A7793_CLK_GPIO2
+- R8A7793_CLK_GPIO1 R8A7793_CLK_GPIO0
+- R8A7793_CLK_QSPI_MOD R8A7793_CLK_RCAN1
+- R8A7793_CLK_RCAN0 R8A7793_CLK_I2C5
+- R8A7793_CLK_IICDVFS R8A7793_CLK_I2C4
+- R8A7793_CLK_I2C3 R8A7793_CLK_I2C2
+- R8A7793_CLK_I2C1 R8A7793_CLK_I2C0
+- >;
+- clock-output-names =
+- "gpio7", "gpio6", "gpio5", "gpio4",
+- "gpio3", "gpio2", "gpio1", "gpio0",
+- "rcan1", "rcan0", "qspi_mod", "i2c5",
+- "i2c6", "i2c4", "i2c3", "i2c2", "i2c1",
+- "i2c0";
+- };
+- mstp10_clks: mstp10_clks@e6150998 {
+- compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>;
+- clocks = <&p_clk>,
+- <&mstp10_clks R8A7793_CLK_SSI_ALL>, <&mstp10_clks R8A7793_CLK_SSI_ALL>,
+- <&mstp10_clks R8A7793_CLK_SSI_ALL>, <&mstp10_clks R8A7793_CLK_SSI_ALL>,
+- <&mstp10_clks R8A7793_CLK_SSI_ALL>, <&mstp10_clks R8A7793_CLK_SSI_ALL>,
+- <&mstp10_clks R8A7793_CLK_SSI_ALL>, <&mstp10_clks R8A7793_CLK_SSI_ALL>,
+- <&mstp10_clks R8A7793_CLK_SSI_ALL>, <&mstp10_clks R8A7793_CLK_SSI_ALL>,
+- <&p_clk>,
+- <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>,
+- <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>,
+- <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>,
+- <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>,
+- <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>,
+- <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>,
+- <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>;
+-
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7793_CLK_SSI_ALL
+- R8A7793_CLK_SSI9 R8A7793_CLK_SSI8 R8A7793_CLK_SSI7 R8A7793_CLK_SSI6 R8A7793_CLK_SSI5
+- R8A7793_CLK_SSI4 R8A7793_CLK_SSI3 R8A7793_CLK_SSI2 R8A7793_CLK_SSI1 R8A7793_CLK_SSI0
+- R8A7793_CLK_SCU_ALL
+- R8A7793_CLK_SCU_DVC1 R8A7793_CLK_SCU_DVC0
+- R8A7793_CLK_SCU_CTU1_MIX1 R8A7793_CLK_SCU_CTU0_MIX0
+- R8A7793_CLK_SCU_SRC9 R8A7793_CLK_SCU_SRC8 R8A7793_CLK_SCU_SRC7 R8A7793_CLK_SCU_SRC6 R8A7793_CLK_SCU_SRC5
+- R8A7793_CLK_SCU_SRC4 R8A7793_CLK_SCU_SRC3 R8A7793_CLK_SCU_SRC2 R8A7793_CLK_SCU_SRC1 R8A7793_CLK_SCU_SRC0
+- >;
+- clock-output-names =
+- "ssi-all",
+- "ssi9", "ssi8", "ssi7", "ssi6", "ssi5",
+- "ssi4", "ssi3", "ssi2", "ssi1", "ssi0",
+- "scu-all",
+- "scu-dvc1", "scu-dvc0",
+- "scu-ctu1-mix1", "scu-ctu0-mix0",
+- "scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5",
+- "scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0";
+- };
+- mstp11_clks: mstp11_clks@e615099c {
+- compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>;
+- clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7793_CLK_SCIFA3 R8A7793_CLK_SCIFA4 R8A7793_CLK_SCIFA5
+- >;
+- clock-output-names = "scifa3", "scifa4", "scifa5";
+- };
+ };
+
+ rst: reset-controller@e6160000 {
+@@ -1428,19 +1130,20 @@
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
+ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+
+- clocks = <&mstp10_clks R8A7793_CLK_SSI_ALL>,
+- <&mstp10_clks R8A7793_CLK_SSI9>, <&mstp10_clks R8A7793_CLK_SSI8>,
+- <&mstp10_clks R8A7793_CLK_SSI7>, <&mstp10_clks R8A7793_CLK_SSI6>,
+- <&mstp10_clks R8A7793_CLK_SSI5>, <&mstp10_clks R8A7793_CLK_SSI4>,
+- <&mstp10_clks R8A7793_CLK_SSI3>, <&mstp10_clks R8A7793_CLK_SSI2>,
+- <&mstp10_clks R8A7793_CLK_SSI1>, <&mstp10_clks R8A7793_CLK_SSI0>,
+- <&mstp10_clks R8A7793_CLK_SCU_SRC9>, <&mstp10_clks R8A7793_CLK_SCU_SRC8>,
+- <&mstp10_clks R8A7793_CLK_SCU_SRC7>, <&mstp10_clks R8A7793_CLK_SCU_SRC6>,
+- <&mstp10_clks R8A7793_CLK_SCU_SRC5>, <&mstp10_clks R8A7793_CLK_SCU_SRC4>,
+- <&mstp10_clks R8A7793_CLK_SCU_SRC3>, <&mstp10_clks R8A7793_CLK_SCU_SRC2>,
+- <&mstp10_clks R8A7793_CLK_SCU_SRC1>, <&mstp10_clks R8A7793_CLK_SCU_SRC0>,
+- <&mstp10_clks R8A7793_CLK_SCU_DVC0>, <&mstp10_clks R8A7793_CLK_SCU_DVC1>,
+- <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>;
++ clocks = <&cpg CPG_MOD 1005>,
++ <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
++ <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
++ <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
++ <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
++ <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
++ <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
++ <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
++ <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
++ <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
++ <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
++ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
++ <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
++ <&cpg CPG_CORE R8A7793_CLK_M2>;
+ clock-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
+ "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
+--
+2.19.0
+
diff --git a/patches/0302-ARM-dts-r8a7794-Convert-to-new-CPG-MSSR-bindings.patch b/patches/0302-ARM-dts-r8a7794-Convert-to-new-CPG-MSSR-bindings.patch
new file mode 100644
index 0000000..faf6a41
--- /dev/null
+++ b/patches/0302-ARM-dts-r8a7794-Convert-to-new-CPG-MSSR-bindings.patch
@@ -0,0 +1,1025 @@
+From 4425847ea908956226189e89938679e8fe7f82f2 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 18 Aug 2017 11:11:38 +0200
+Subject: [PATCH 0302/1795] ARM: dts: r8a7794: Convert to new CPG/MSSR bindings
+
+Convert the R-Car E2 SoC from the old "Renesas R-Car Gen2 Clock Pulse
+Generator (CPG)", "Renesas CPG DIV6 Clock", and "Renesas CPG Module Stop
+(MSTP) Clocks" DT bindings to the new unified "Renesas Clock Pulse
+Generator / Module Standby and Software Reset" DT bindings.
+
+This simplifies the DTS files, and allows to add support for reset
+control later.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 58d6c357b1f7851d632bb70de3a9ada219f201c2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7794-alt.dts | 3 +-
+ arch/arm/boot/dts/r8a7794-silk.dts | 3 +-
+ arch/arm/boot/dts/r8a7794.dtsi | 528 +++++------------------------
+ 3 files changed, 82 insertions(+), 452 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts
+index f1eea13cdf44..e45f92b5eb11 100644
+--- a/arch/arm/boot/dts/r8a7794-alt.dts
++++ b/arch/arm/boot/dts/r8a7794-alt.dts
+@@ -167,8 +167,7 @@
+ pinctrl-names = "default";
+ status = "okay";
+
+- clocks = <&mstp7_clks R8A7794_CLK_DU0>,
+- <&mstp7_clks R8A7794_CLK_DU1>,
++ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
+ <&x13_clk>, <&x2_clk>;
+ clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
+
+diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts
+index 4cb5278d104d..edfad0e5ac53 100644
+--- a/arch/arm/boot/dts/r8a7794-silk.dts
++++ b/arch/arm/boot/dts/r8a7794-silk.dts
+@@ -423,8 +423,7 @@
+ pinctrl-names = "default";
+ status = "okay";
+
+- clocks = <&mstp7_clks R8A7794_CLK_DU0>,
+- <&mstp7_clks R8A7794_CLK_DU1>,
++ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
+ <&x2_clk>, <&x3_clk>;
+ clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
+
+diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
+index 26535414203a..ebd44d9982be 100644
+--- a/arch/arm/boot/dts/r8a7794.dtsi
++++ b/arch/arm/boot/dts/r8a7794.dtsi
+@@ -9,7 +9,7 @@
+ * kind, whether express or implied.
+ */
+
+-#include <dt-bindings/clock/r8a7794-clock.h>
++#include <dt-bindings/clock/r8a7794-cpg-mssr.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/power/r8a7794-sysc.h>
+@@ -43,7 +43,7 @@
+ compatible = "arm,cortex-a7";
+ reg = <0>;
+ clock-frequency = <1000000000>;
+- clocks = <&z2_clk>;
++ clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>;
+ power-domains = <&sysc R8A7794_PD_CA7_CPU0>;
+ next-level-cache = <&L2_CA7>;
+ };
+@@ -75,7 +75,7 @@
+ <0 0xf1004000 0 0x2000>,
+ <0 0xf1006000 0 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+- clocks = <&mstp4_clks R8A7794_CLK_INTC_SYS>;
++ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ };
+@@ -89,7 +89,7 @@
+ gpio-ranges = <&pfc 0 0 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7794_CLK_GPIO0>;
++ clocks = <&cpg CPG_MOD 912>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ };
+
+@@ -102,7 +102,7 @@
+ gpio-ranges = <&pfc 0 32 26>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7794_CLK_GPIO1>;
++ clocks = <&cpg CPG_MOD 911>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ };
+
+@@ -115,7 +115,7 @@
+ gpio-ranges = <&pfc 0 64 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7794_CLK_GPIO2>;
++ clocks = <&cpg CPG_MOD 910>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ };
+
+@@ -128,7 +128,7 @@
+ gpio-ranges = <&pfc 0 96 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7794_CLK_GPIO3>;
++ clocks = <&cpg CPG_MOD 909>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ };
+
+@@ -141,7 +141,7 @@
+ gpio-ranges = <&pfc 0 128 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7794_CLK_GPIO4>;
++ clocks = <&cpg CPG_MOD 908>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ };
+
+@@ -154,7 +154,7 @@
+ gpio-ranges = <&pfc 0 160 28>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7794_CLK_GPIO5>;
++ clocks = <&cpg CPG_MOD 907>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ };
+
+@@ -167,7 +167,7 @@
+ gpio-ranges = <&pfc 0 192 26>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7794_CLK_GPIO6>;
++ clocks = <&cpg CPG_MOD 905>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ };
+
+@@ -176,7 +176,7 @@
+ reg = <0 0xffca0000 0 0x1004>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp1_clks R8A7794_CLK_CMT0>;
++ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+
+@@ -196,7 +196,7 @@
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7794_CLK_CMT1>;
++ clocks = <&cpg CPG_MOD 329>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+
+@@ -228,7 +228,7 @@
+ <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp4_clks R8A7794_CLK_IRQC>;
++ clocks = <&cpg CPG_MOD 407>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ };
+
+@@ -261,7 +261,7 @@
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+- clocks = <&mstp2_clks R8A7794_CLK_SYS_DMAC0>;
++ clocks = <&cpg CPG_MOD 219>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ #dma-cells = <1>;
+@@ -292,7 +292,7 @@
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+- clocks = <&mstp2_clks R8A7794_CLK_SYS_DMAC1>;
++ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ #dma-cells = <1>;
+@@ -320,7 +320,7 @@
+ "ch0", "ch1", "ch2", "ch3", "ch4", "ch5",
+ "ch6", "ch7", "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+- clocks = <&mstp5_clks R8A7794_CLK_AUDIO_DMAC0>;
++ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ #dma-cells = <1>;
+@@ -332,7 +332,7 @@
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c40000 0 64>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7794_CLK_SCIFA0>;
++ clocks = <&cpg CPG_MOD 204>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x21>, <&dmac0 0x22>,
+ <&dmac1 0x21>, <&dmac1 0x22>;
+@@ -346,7 +346,7 @@
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c50000 0 64>;
+ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7794_CLK_SCIFA1>;
++ clocks = <&cpg CPG_MOD 203>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x25>, <&dmac0 0x26>,
+ <&dmac1 0x25>, <&dmac1 0x26>;
+@@ -360,7 +360,7 @@
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c60000 0 64>;
+ interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7794_CLK_SCIFA2>;
++ clocks = <&cpg CPG_MOD 202>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x27>, <&dmac0 0x28>,
+ <&dmac1 0x27>, <&dmac1 0x28>;
+@@ -374,7 +374,7 @@
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c70000 0 64>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp11_clks R8A7794_CLK_SCIFA3>;
++ clocks = <&cpg CPG_MOD 1106>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
+ <&dmac1 0x1b>, <&dmac1 0x1c>;
+@@ -388,7 +388,7 @@
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c78000 0 64>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp11_clks R8A7794_CLK_SCIFA4>;
++ clocks = <&cpg CPG_MOD 1107>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
+ <&dmac1 0x1f>, <&dmac1 0x20>;
+@@ -402,7 +402,7 @@
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c80000 0 64>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp11_clks R8A7794_CLK_SCIFA5>;
++ clocks = <&cpg CPG_MOD 1108>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x23>, <&dmac0 0x24>,
+ <&dmac1 0x23>, <&dmac1 0x24>;
+@@ -416,7 +416,7 @@
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c20000 0 0x100>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7794_CLK_SCIFB0>;
++ clocks = <&cpg CPG_MOD 206>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
+ <&dmac1 0x3d>, <&dmac1 0x3e>;
+@@ -430,7 +430,7 @@
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c30000 0 0x100>;
+ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7794_CLK_SCIFB1>;
++ clocks = <&cpg CPG_MOD 207>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
+ <&dmac1 0x19>, <&dmac1 0x1a>;
+@@ -444,7 +444,7 @@
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6ce0000 0 0x100>;
+ interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7794_CLK_SCIFB2>;
++ clocks = <&cpg CPG_MOD 216>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
+ <&dmac1 0x1d>, <&dmac1 0x1e>;
+@@ -458,7 +458,7 @@
+ "renesas,scif";
+ reg = <0 0xe6e60000 0 64>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7794_CLK_SCIF0>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
+@@ -473,7 +473,7 @@
+ "renesas,scif";
+ reg = <0 0xe6e68000 0 64>;
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7794_CLK_SCIF1>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
+@@ -488,7 +488,7 @@
+ "renesas,scif";
+ reg = <0 0xe6e58000 0 64>;
+ interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7794_CLK_SCIF2>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
+@@ -503,7 +503,7 @@
+ "renesas,scif";
+ reg = <0 0xe6ea8000 0 64>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7794_CLK_SCIF3>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
+@@ -518,7 +518,7 @@
+ "renesas,scif";
+ reg = <0 0xe6ee0000 0 64>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7794_CLK_SCIF4>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
+@@ -533,7 +533,7 @@
+ "renesas,scif";
+ reg = <0 0xe6ee8000 0 64>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7794_CLK_SCIF5>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
+@@ -548,7 +548,7 @@
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c0000 0 96>;
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7794_CLK_HSCIF0>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
+@@ -563,7 +563,7 @@
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c8000 0 96>;
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7794_CLK_HSCIF1>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
+@@ -578,7 +578,7 @@
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62d0000 0 96>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7794_CLK_HSCIF2>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
+@@ -610,7 +610,7 @@
+ compatible = "renesas,ether-r8a7794";
+ reg = <0 0xee700000 0 0x400>;
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7794_CLK_ETHER>;
++ clocks = <&cpg CPG_MOD 813>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ phy-mode = "rmii";
+ #address-cells = <1>;
+@@ -623,7 +623,7 @@
+ "renesas,etheravb-rcar-gen2";
+ reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
+ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7794_CLK_ETHERAVB>;
++ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -635,7 +635,7 @@
+ compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6508000 0 0x40>;
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7794_CLK_I2C0>;
++ clocks = <&cpg CPG_MOD 931>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -647,7 +647,7 @@
+ compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6518000 0 0x40>;
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7794_CLK_I2C1>;
++ clocks = <&cpg CPG_MOD 930>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -659,7 +659,7 @@
+ compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6530000 0 0x40>;
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7794_CLK_I2C2>;
++ clocks = <&cpg CPG_MOD 929>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -671,7 +671,7 @@
+ compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6540000 0 0x40>;
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7794_CLK_I2C3>;
++ clocks = <&cpg CPG_MOD 928>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -683,7 +683,7 @@
+ compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6520000 0 0x40>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7794_CLK_I2C4>;
++ clocks = <&cpg CPG_MOD 927>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -695,7 +695,7 @@
+ compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6528000 0 0x40>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7794_CLK_I2C5>;
++ clocks = <&cpg CPG_MOD 925>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -708,7 +708,7 @@
+ "renesas,rmobile-iic";
+ reg = <0 0xe6500000 0 0x425>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7794_CLK_IIC0>;
++ clocks = <&cpg CPG_MOD 318>;
+ dmas = <&dmac0 0x61>, <&dmac0 0x62>,
+ <&dmac1 0x61>, <&dmac1 0x62>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -723,7 +723,7 @@
+ "renesas,rmobile-iic";
+ reg = <0 0xe6510000 0 0x425>;
+ interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7794_CLK_IIC1>;
++ clocks = <&cpg CPG_MOD 323>;
+ dmas = <&dmac0 0x65>, <&dmac0 0x66>,
+ <&dmac1 0x65>, <&dmac1 0x66>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -737,7 +737,7 @@
+ compatible = "renesas,mmcif-r8a7794", "renesas,sh-mmcif";
+ reg = <0 0xee200000 0 0x80>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7794_CLK_MMCIF0>;
++ clocks = <&cpg CPG_MOD 315>;
+ dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
+ <&dmac1 0xd1>, <&dmac1 0xd2>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -750,7 +750,7 @@
+ compatible = "renesas,sdhi-r8a7794";
+ reg = <0 0xee100000 0 0x328>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7794_CLK_SDHI0>;
++ clocks = <&cpg CPG_MOD 314>;
+ dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+ <&dmac1 0xcd>, <&dmac1 0xce>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -763,7 +763,7 @@
+ compatible = "renesas,sdhi-r8a7794";
+ reg = <0 0xee140000 0 0x100>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7794_CLK_SDHI1>;
++ clocks = <&cpg CPG_MOD 312>;
+ dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
+ <&dmac1 0xc1>, <&dmac1 0xc2>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -776,7 +776,7 @@
+ compatible = "renesas,sdhi-r8a7794";
+ reg = <0 0xee160000 0 0x100>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7794_CLK_SDHI2>;
++ clocks = <&cpg CPG_MOD 311>;
+ dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
+ <&dmac1 0xd3>, <&dmac1 0xd4>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -789,7 +789,7 @@
+ compatible = "renesas,qspi-r8a7794", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7794_CLK_QSPI_MOD>;
++ clocks = <&cpg CPG_MOD 917>;
+ dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -804,7 +804,7 @@
+ compatible = "renesas,vin-r8a7794", "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef0000 0 0x1000>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7794_CLK_VIN0>;
++ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+@@ -813,7 +813,7 @@
+ compatible = "renesas,vin-r8a7794", "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef1000 0 0x1000>;
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7794_CLK_VIN1>;
++ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+@@ -824,7 +824,7 @@
+ reg = <0 0xee090000 0 0xc00>,
+ <0 0xee080000 0 0x1100>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7794_CLK_EHCI>;
++ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ status = "disabled";
+
+@@ -857,7 +857,7 @@
+ reg = <0 0xee0d0000 0 0xc00>,
+ <0 0xee0c0000 0 0x1100>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7794_CLK_EHCI>;
++ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ status = "disabled";
+
+@@ -888,7 +888,7 @@
+ compatible = "renesas,usbhs-r8a7794", "renesas,rcar-gen2-usbhs";
+ reg = <0 0xe6590000 0 0x100>;
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7794_CLK_HSUSB>;
++ clocks = <&cpg CPG_MOD 704>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ renesas,buswait = <4>;
+ phys = <&usb0 1>;
+@@ -902,7 +902,7 @@
+ reg = <0 0xe6590100 0 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+- clocks = <&mstp7_clks R8A7794_CLK_HSUSB>;
++ clocks = <&cpg CPG_MOD 704>;
+ clock-names = "usbhs";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ status = "disabled";
+@@ -921,7 +921,7 @@
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe928000 0 0x8000>;
+ interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp1_clks R8A7794_CLK_VSP1_S>;
++ clocks = <&cpg CPG_MOD 131>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ };
+
+@@ -929,7 +929,7 @@
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe930000 0 0x8000>;
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp1_clks R8A7794_CLK_VSP1_DU0>;
++ clocks = <&cpg CPG_MOD 128>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ };
+
+@@ -939,8 +939,7 @@
+ reg-names = "du";
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7794_CLK_DU0>,
+- <&mstp7_clks R8A7794_CLK_DU1>;
++ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
+ clock-names = "du.0", "du.1";
+ status = "disabled";
+
+@@ -965,8 +964,8 @@
+ compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";
+ reg = <0 0xe6e80000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7794_CLK_RCAN0>,
+- <&cpg_clocks R8A7794_CLK_RCAN>, <&can_clk>;
++ clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
++ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ status = "disabled";
+@@ -976,8 +975,8 @@
+ compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";
+ reg = <0 0xe6e88000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7794_CLK_RCAN1>,
+- <&cpg_clocks R8A7794_CLK_RCAN>, <&can_clk>;
++ clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
++ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ status = "disabled";
+@@ -1040,370 +1039,14 @@
+ clock-frequency = <0>;
+ };
+
+- /* Special CPG clocks */
+- cpg_clocks: cpg_clocks@e6150000 {
+- compatible = "renesas,r8a7794-cpg-clocks",
+- "renesas,rcar-gen2-cpg-clocks";
++ cpg: clock-controller@e6150000 {
++ compatible = "renesas,r8a7794-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+- clocks = <&extal_clk &usb_extal_clk>;
+- #clock-cells = <1>;
+- clock-output-names = "main", "pll0", "pll1", "pll3",
+- "lb", "qspi", "sdh", "sd0", "rcan";
++ clocks = <&extal_clk>, <&usb_extal_clk>;
++ clock-names = "extal", "usb_extal";
++ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ };
+- /* Variable factor clocks */
+- sd2_clk: sd2@e6150078 {
+- compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock";
+- reg = <0 0xe6150078 0 4>;
+- clocks = <&pll1_div2_clk>;
+- #clock-cells = <0>;
+- };
+- sd3_clk: sd3@e615026c {
+- compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock";
+- reg = <0 0xe615026c 0 4>;
+- clocks = <&pll1_div2_clk>;
+- #clock-cells = <0>;
+- };
+- mmc0_clk: mmc0@e6150240 {
+- compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock";
+- reg = <0 0xe6150240 0 4>;
+- clocks = <&pll1_div2_clk>;
+- #clock-cells = <0>;
+- };
+-
+- /* Fixed factor clocks */
+- pll1_div2_clk: pll1_div2 {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <2>;
+- clock-mult = <1>;
+- };
+- z2_clk: z2 {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7794_CLK_PLL0>;
+- #clock-cells = <0>;
+- clock-div = <1>;
+- clock-mult = <1>;
+- };
+- zg_clk: zg {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <6>;
+- clock-mult = <1>;
+- };
+- zx_clk: zx {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <3>;
+- clock-mult = <1>;
+- };
+- zs_clk: zs {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <6>;
+- clock-mult = <1>;
+- };
+- hp_clk: hp {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <12>;
+- clock-mult = <1>;
+- };
+- i_clk: i {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <2>;
+- clock-mult = <1>;
+- };
+- b_clk: b {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <12>;
+- clock-mult = <1>;
+- };
+- p_clk: p {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <24>;
+- clock-mult = <1>;
+- };
+- cl_clk: cl {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <48>;
+- clock-mult = <1>;
+- };
+- m2_clk: m2 {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <8>;
+- clock-mult = <1>;
+- };
+- rclk_clk: rclk {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <(48 * 1024)>;
+- clock-mult = <1>;
+- };
+- oscclk_clk: oscclk {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <(12 * 1024)>;
+- clock-mult = <1>;
+- };
+- zb3_clk: zb3 {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7794_CLK_PLL3>;
+- #clock-cells = <0>;
+- clock-div = <4>;
+- clock-mult = <1>;
+- };
+- zb3d2_clk: zb3d2 {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7794_CLK_PLL3>;
+- #clock-cells = <0>;
+- clock-div = <8>;
+- clock-mult = <1>;
+- };
+- ddr_clk: ddr {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7794_CLK_PLL3>;
+- #clock-cells = <0>;
+- clock-div = <8>;
+- clock-mult = <1>;
+- };
+- mp_clk: mp {
+- compatible = "fixed-factor-clock";
+- clocks = <&pll1_div2_clk>;
+- #clock-cells = <0>;
+- clock-div = <15>;
+- clock-mult = <1>;
+- };
+- cp_clk: cp {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <48>;
+- clock-mult = <1>;
+- };
+-
+- acp_clk: acp {
+- compatible = "fixed-factor-clock";
+- clocks = <&extal_clk>;
+- #clock-cells = <0>;
+- clock-div = <2>;
+- clock-mult = <1>;
+- };
+-
+- /* Gate clocks */
+- mstp0_clks: mstp0_clks@e6150130 {
+- compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>;
+- clocks = <&mp_clk>;
+- #clock-cells = <1>;
+- clock-indices = <R8A7794_CLK_MSIOF0>;
+- clock-output-names = "msiof0";
+- };
+- mstp1_clks: mstp1_clks@e6150134 {
+- compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
+- clocks = <&zs_clk>, <&zs_clk>, <&p_clk>, <&zg_clk>, <&zs_clk>,
+- <&zs_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, <&cp_clk>,
+- <&zs_clk>, <&zs_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7794_CLK_VCP0 R8A7794_CLK_VPC0 R8A7794_CLK_TMU1
+- R8A7794_CLK_3DG R8A7794_CLK_2DDMAC R8A7794_CLK_FDP1_0
+- R8A7794_CLK_TMU3 R8A7794_CLK_TMU2 R8A7794_CLK_CMT0
+- R8A7794_CLK_TMU0 R8A7794_CLK_VSP1_DU0 R8A7794_CLK_VSP1_S
+- >;
+- clock-output-names =
+- "vcp0", "vpc0", "tmu1", "3dg", "2ddmac", "fdp1-0",
+- "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du0", "vsps";
+- };
+- mstp2_clks: mstp2_clks@e6150138 {
+- compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
+- clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
+- <&mp_clk>, <&mp_clk>, <&mp_clk>,
+- <&zs_clk>, <&zs_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7794_CLK_SCIFA2 R8A7794_CLK_SCIFA1 R8A7794_CLK_SCIFA0
+- R8A7794_CLK_MSIOF2 R8A7794_CLK_SCIFB0 R8A7794_CLK_SCIFB1
+- R8A7794_CLK_MSIOF1 R8A7794_CLK_SCIFB2
+- R8A7794_CLK_SYS_DMAC1 R8A7794_CLK_SYS_DMAC0
+- >;
+- clock-output-names =
+- "scifa2", "scifa1", "scifa0", "msiof2", "scifb0",
+- "scifb1", "msiof1", "scifb2",
+- "sys-dmac1", "sys-dmac0";
+- };
+- mstp3_clks: mstp3_clks@e615013c {
+- compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
+- clocks = <&sd3_clk>, <&sd2_clk>, <&cpg_clocks R8A7794_CLK_SD0>,
+- <&mmc0_clk>, <&hp_clk>, <&hp_clk>, <&rclk_clk>,
+- <&hp_clk>, <&hp_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7794_CLK_SDHI2 R8A7794_CLK_SDHI1 R8A7794_CLK_SDHI0
+- R8A7794_CLK_MMCIF0 R8A7794_CLK_IIC0
+- R8A7794_CLK_IIC1 R8A7794_CLK_CMT1
+- R8A7794_CLK_USBDMAC0 R8A7794_CLK_USBDMAC1
+- >;
+- clock-output-names =
+- "sdhi2", "sdhi1", "sdhi0",
+- "mmcif0", "i2c6", "i2c7",
+- "cmt1", "usbdmac0", "usbdmac1";
+- };
+- mstp4_clks: mstp4_clks@e6150140 {
+- compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
+- clocks = <&cp_clk>, <&zs_clk>;
+- #clock-cells = <1>;
+- clock-indices = <R8A7794_CLK_IRQC R8A7794_CLK_INTC_SYS>;
+- clock-output-names = "irqc", "intc-sys";
+- };
+- mstp5_clks: mstp5_clks@e6150144 {
+- compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
+- clocks = <&hp_clk>, <&p_clk>;
+- #clock-cells = <1>;
+- clock-indices = <R8A7794_CLK_AUDIO_DMAC0
+- R8A7794_CLK_PWM>;
+- clock-output-names = "audmac0", "pwm";
+- };
+- mstp7_clks: mstp7_clks@e615014c {
+- compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
+- clocks = <&mp_clk>, <&hp_clk>,
+- <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
+- <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
+- <&zx_clk>, <&zx_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7794_CLK_EHCI R8A7794_CLK_HSUSB
+- R8A7794_CLK_HSCIF2 R8A7794_CLK_SCIF5
+- R8A7794_CLK_SCIF4 R8A7794_CLK_HSCIF1 R8A7794_CLK_HSCIF0
+- R8A7794_CLK_SCIF3 R8A7794_CLK_SCIF2 R8A7794_CLK_SCIF1
+- R8A7794_CLK_SCIF0
+- R8A7794_CLK_DU1 R8A7794_CLK_DU0
+- >;
+- clock-output-names =
+- "ehci", "hsusb",
+- "hscif2", "scif5", "scif4", "hscif1", "hscif0",
+- "scif3", "scif2", "scif1", "scif0",
+- "du1", "du0";
+- };
+- mstp8_clks: mstp8_clks@e6150990 {
+- compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
+- clocks = <&zg_clk>, <&zg_clk>, <&hp_clk>, <&p_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7794_CLK_VIN1 R8A7794_CLK_VIN0
+- R8A7794_CLK_ETHERAVB R8A7794_CLK_ETHER
+- >;
+- clock-output-names =
+- "vin1", "vin0", "etheravb", "ether";
+- };
+- mstp9_clks: mstp9_clks@e6150994 {
+- compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
+- clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
+- <&cp_clk>, <&cp_clk>, <&cp_clk>, <&p_clk>,
+- <&p_clk>, <&cpg_clocks R8A7794_CLK_QSPI>,
+- <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>,
+- <&hp_clk>, <&hp_clk>;
+- #clock-cells = <1>;
+- clock-indices = <R8A7794_CLK_GPIO6 R8A7794_CLK_GPIO5
+- R8A7794_CLK_GPIO4 R8A7794_CLK_GPIO3
+- R8A7794_CLK_GPIO2 R8A7794_CLK_GPIO1
+- R8A7794_CLK_GPIO0 R8A7794_CLK_RCAN1
+- R8A7794_CLK_RCAN0 R8A7794_CLK_QSPI_MOD
+- R8A7794_CLK_I2C5 R8A7794_CLK_I2C4
+- R8A7794_CLK_I2C3 R8A7794_CLK_I2C2
+- R8A7794_CLK_I2C1 R8A7794_CLK_I2C0>;
+- clock-output-names =
+- "gpio6", "gpio5", "gpio4", "gpio3", "gpio2",
+- "gpio1", "gpio0", "rcan1", "rcan0", "qspi_mod",
+- "i2c5", "i2c4", "i2c3", "i2c2", "i2c1", "i2c0";
+- };
+- mstp10_clks: mstp10_clks@e6150998 {
+- compatible = "renesas,r8a7794-mstp-clocks",
+- "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>;
+- clocks = <&p_clk>,
+- <&mstp10_clks R8A7794_CLK_SSI_ALL>,
+- <&mstp10_clks R8A7794_CLK_SSI_ALL>,
+- <&mstp10_clks R8A7794_CLK_SSI_ALL>,
+- <&mstp10_clks R8A7794_CLK_SSI_ALL>,
+- <&mstp10_clks R8A7794_CLK_SSI_ALL>,
+- <&mstp10_clks R8A7794_CLK_SSI_ALL>,
+- <&mstp10_clks R8A7794_CLK_SSI_ALL>,
+- <&mstp10_clks R8A7794_CLK_SSI_ALL>,
+- <&mstp10_clks R8A7794_CLK_SSI_ALL>,
+- <&mstp10_clks R8A7794_CLK_SSI_ALL>,
+- <&p_clk>,
+- <&mstp10_clks R8A7794_CLK_SCU_ALL>,
+- <&mstp10_clks R8A7794_CLK_SCU_ALL>,
+- <&mstp10_clks R8A7794_CLK_SCU_ALL>,
+- <&mstp10_clks R8A7794_CLK_SCU_ALL>,
+- <&mstp10_clks R8A7794_CLK_SCU_ALL>,
+- <&mstp10_clks R8A7794_CLK_SCU_ALL>,
+- <&mstp10_clks R8A7794_CLK_SCU_ALL>,
+- <&mstp10_clks R8A7794_CLK_SCU_ALL>,
+- <&mstp10_clks R8A7794_CLK_SCU_ALL>,
+- <&mstp10_clks R8A7794_CLK_SCU_ALL>;
+- #clock-cells = <1>;
+- clock-indices = <R8A7794_CLK_SSI_ALL
+- R8A7794_CLK_SSI9 R8A7794_CLK_SSI8
+- R8A7794_CLK_SSI7 R8A7794_CLK_SSI6
+- R8A7794_CLK_SSI5 R8A7794_CLK_SSI4
+- R8A7794_CLK_SSI3 R8A7794_CLK_SSI2
+- R8A7794_CLK_SSI1 R8A7794_CLK_SSI0
+- R8A7794_CLK_SCU_ALL
+- R8A7794_CLK_SCU_DVC1
+- R8A7794_CLK_SCU_DVC0
+- R8A7794_CLK_SCU_CTU1_MIX1
+- R8A7794_CLK_SCU_CTU0_MIX0
+- R8A7794_CLK_SCU_SRC6
+- R8A7794_CLK_SCU_SRC5
+- R8A7794_CLK_SCU_SRC4
+- R8A7794_CLK_SCU_SRC3
+- R8A7794_CLK_SCU_SRC2
+- R8A7794_CLK_SCU_SRC1>;
+- clock-output-names = "ssi-all", "ssi9", "ssi8", "ssi7",
+- "ssi6", "ssi5", "ssi4", "ssi3",
+- "ssi2", "ssi1", "ssi0",
+- "scu-all", "scu-dvc1", "scu-dvc0",
+- "scu-ctu1-mix1", "scu-ctu0-mix0",
+- "scu-src6", "scu-src5", "scu-src4",
+- "scu-src3", "scu-src2", "scu-src1";
+- };
+- mstp11_clks: mstp11_clks@e615099c {
+- compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>;
+- clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7794_CLK_SCIFA3 R8A7794_CLK_SCIFA4 R8A7794_CLK_SCIFA5
+- >;
+- clock-output-names = "scifa3", "scifa4", "scifa5";
+- };
+ };
+
+ rst: reset-controller@e6160000 {
+@@ -1490,31 +1133,20 @@
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
+ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+
+- clocks = <&mstp10_clks R8A7794_CLK_SSI_ALL>,
+- <&mstp10_clks R8A7794_CLK_SSI9>,
+- <&mstp10_clks R8A7794_CLK_SSI8>,
+- <&mstp10_clks R8A7794_CLK_SSI7>,
+- <&mstp10_clks R8A7794_CLK_SSI6>,
+- <&mstp10_clks R8A7794_CLK_SSI5>,
+- <&mstp10_clks R8A7794_CLK_SSI4>,
+- <&mstp10_clks R8A7794_CLK_SSI3>,
+- <&mstp10_clks R8A7794_CLK_SSI2>,
+- <&mstp10_clks R8A7794_CLK_SSI1>,
+- <&mstp10_clks R8A7794_CLK_SSI0>,
+- <&mstp10_clks R8A7794_CLK_SCU_SRC6>,
+- <&mstp10_clks R8A7794_CLK_SCU_SRC5>,
+- <&mstp10_clks R8A7794_CLK_SCU_SRC4>,
+- <&mstp10_clks R8A7794_CLK_SCU_SRC3>,
+- <&mstp10_clks R8A7794_CLK_SCU_SRC2>,
+- <&mstp10_clks R8A7794_CLK_SCU_SRC1>,
+- <&mstp10_clks R8A7794_CLK_SCU_CTU0_MIX0>,
+- <&mstp10_clks R8A7794_CLK_SCU_CTU1_MIX1>,
+- <&mstp10_clks R8A7794_CLK_SCU_CTU0_MIX0>,
+- <&mstp10_clks R8A7794_CLK_SCU_CTU1_MIX1>,
+- <&mstp10_clks R8A7794_CLK_SCU_DVC0>,
+- <&mstp10_clks R8A7794_CLK_SCU_DVC1>,
++ clocks = <&cpg CPG_MOD 1005>,
++ <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
++ <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
++ <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
++ <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
++ <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
++ <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
++ <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
++ <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
++ <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
++ <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
++ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+ <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
+- <&m2_clk>;
++ <&cpg CPG_CORE R8A7794_CLK_M2>;
+ clock-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
+ "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
+--
+2.19.0
+
diff --git a/patches/0303-ARM-dts-r8a7790-Stop-grouping-clocks-under-a-clocks-.patch b/patches/0303-ARM-dts-r8a7790-Stop-grouping-clocks-under-a-clocks-.patch
new file mode 100644
index 0000000..f1929a6
--- /dev/null
+++ b/patches/0303-ARM-dts-r8a7790-Stop-grouping-clocks-under-a-clocks-.patch
@@ -0,0 +1,169 @@
+From 1e6046d7c0b7f4390d98674a9d591a5966207104 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 18 Aug 2017 11:16:54 +0200
+Subject: [PATCH 0303/1795] ARM: dts: r8a7790: Stop grouping clocks under a
+ "clocks" subnode
+
+The current practice is to not group clocks under a "clocks" subnode,
+but just put them together with the other on-SoC devices.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 80e1a5f318850f2bbb5fa4a49fbfa9a8f3afd5f5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7790.dtsi | 137 ++++++++++++++++-----------------
+ 1 file changed, 66 insertions(+), 71 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
+index 5a31dfc0c316..70040c6c4cea 100644
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -1061,77 +1061,72 @@
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ };
+
+- clocks {
+- #address-cells = <2>;
+- #size-cells = <2>;
+- ranges;
+-
+- /* External root clock */
+- extal_clk: extal {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- /* This value must be overriden by the board. */
+- clock-frequency = <0>;
+- };
+-
+- /* External PCIe clock - can be overridden by the board */
+- pcie_bus_clk: pcie_bus {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- clock-frequency = <0>;
+- };
+-
+- /*
+- * The external audio clocks are configured as 0 Hz fixed frequency clocks by
+- * default. Boards that provide audio clocks should override them.
+- */
+- audio_clk_a: audio_clk_a {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- clock-frequency = <0>;
+- };
+- audio_clk_b: audio_clk_b {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- clock-frequency = <0>;
+- };
+- audio_clk_c: audio_clk_c {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- clock-frequency = <0>;
+- };
+-
+- /* External SCIF clock */
+- scif_clk: scif {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- /* This value must be overridden by the board. */
+- clock-frequency = <0>;
+- };
+-
+- /* External USB clock - can be overridden by the board */
+- usb_extal_clk: usb_extal {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- clock-frequency = <48000000>;
+- };
+-
+- /* External CAN clock */
+- can_clk: can {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- /* This value must be overridden by the board. */
+- clock-frequency = <0>;
+- };
+-
+- cpg: clock-controller@e6150000 {
+- compatible = "renesas,r8a7790-cpg-mssr";
+- reg = <0 0xe6150000 0 0x1000>;
+- clocks = <&extal_clk>, <&usb_extal_clk>;
+- clock-names = "extal", "usb_extal";
+- #clock-cells = <2>;
+- #power-domain-cells = <0>;
+- };
++ /* External root clock */
++ extal_clk: extal {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ /* This value must be overridden by the board. */
++ clock-frequency = <0>;
++ };
++
++ /* External PCIe clock - can be overridden by the board */
++ pcie_bus_clk: pcie_bus {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <0>;
++ };
++
++ /*
++ * The external audio clocks are configured as 0 Hz fixed frequency
++ * clocks by default.
++ * Boards that provide audio clocks should override them.
++ */
++ audio_clk_a: audio_clk_a {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <0>;
++ };
++ audio_clk_b: audio_clk_b {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <0>;
++ };
++ audio_clk_c: audio_clk_c {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <0>;
++ };
++
++ /* External SCIF clock */
++ scif_clk: scif {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ /* This value must be overridden by the board. */
++ clock-frequency = <0>;
++ };
++
++ /* External USB clock - can be overridden by the board */
++ usb_extal_clk: usb_extal {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <48000000>;
++ };
++
++ /* External CAN clock */
++ can_clk: can {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ /* This value must be overridden by the board. */
++ clock-frequency = <0>;
++ };
++
++ cpg: clock-controller@e6150000 {
++ compatible = "renesas,r8a7790-cpg-mssr";
++ reg = <0 0xe6150000 0 0x1000>;
++ clocks = <&extal_clk>, <&usb_extal_clk>;
++ clock-names = "extal", "usb_extal";
++ #clock-cells = <2>;
++ #power-domain-cells = <0>;
+ };
+
+ prr: chipid@ff000044 {
+--
+2.19.0
+
diff --git a/patches/0304-ARM-dts-r8a7793-Stop-grouping-clocks-under-a-clocks-.patch b/patches/0304-ARM-dts-r8a7793-Stop-grouping-clocks-under-a-clocks-.patch
new file mode 100644
index 0000000..a0b01a3
--- /dev/null
+++ b/patches/0304-ARM-dts-r8a7793-Stop-grouping-clocks-under-a-clocks-.patch
@@ -0,0 +1,157 @@
+From 33ad27d7d8b0b7937d1a9d36e0c6c5862771aadf Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 18 Aug 2017 11:16:56 +0200
+Subject: [PATCH 0304/1795] ARM: dts: r8a7793: Stop grouping clocks under a
+ "clocks" subnode
+
+The current practice is to not group clocks under a "clocks" subnode,
+but just put them together with the other on-SoC devices.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c67e243ccf06aec0fece59b8a1f3eb719e07b0e3)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7793.dtsi | 125 ++++++++++++++++-----------------
+ 1 file changed, 60 insertions(+), 65 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
+index ef8009c01e66..d48b97c853cd 100644
+--- a/arch/arm/boot/dts/r8a7793.dtsi
++++ b/arch/arm/boot/dts/r8a7793.dtsi
+@@ -972,71 +972,66 @@
+ status = "disabled";
+ };
+
+- clocks {
+- #address-cells = <2>;
+- #size-cells = <2>;
+- ranges;
+-
+- /* External root clock */
+- extal_clk: extal {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- /* This value must be overridden by the board. */
+- clock-frequency = <0>;
+- };
+-
+- /*
+- * The external audio clocks are configured as 0 Hz fixed frequency clocks by
+- * default. Boards that provide audio clocks should override them.
+- */
+- audio_clk_a: audio_clk_a {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- clock-frequency = <0>;
+- };
+- audio_clk_b: audio_clk_b {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- clock-frequency = <0>;
+- };
+- audio_clk_c: audio_clk_c {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- clock-frequency = <0>;
+- };
+-
+- /* External USB clock - can be overridden by the board */
+- usb_extal_clk: usb_extal {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- clock-frequency = <48000000>;
+- };
+-
+- /* External CAN clock */
+- can_clk: can {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- /* This value must be overridden by the board. */
+- clock-frequency = <0>;
+- };
+-
+- /* External SCIF clock */
+- scif_clk: scif {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- /* This value must be overridden by the board. */
+- clock-frequency = <0>;
+- };
+-
+- /* Special CPG clocks */
+- cpg: clock-controller@e6150000 {
+- compatible = "renesas,r8a7793-cpg-mssr";
+- reg = <0 0xe6150000 0 0x1000>;
+- clocks = <&extal_clk>, <&usb_extal_clk>;
+- clock-names = "extal", "usb_extal";
+- #clock-cells = <2>;
+- #power-domain-cells = <0>;
+- };
++ /* External root clock */
++ extal_clk: extal {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ /* This value must be overridden by the board. */
++ clock-frequency = <0>;
++ };
++
++ /*
++ * The external audio clocks are configured as 0 Hz fixed frequency
++ * clocks by default.
++ * Boards that provide audio clocks should override them.
++ */
++ audio_clk_a: audio_clk_a {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <0>;
++ };
++ audio_clk_b: audio_clk_b {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <0>;
++ };
++ audio_clk_c: audio_clk_c {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <0>;
++ };
++
++ /* External USB clock - can be overridden by the board */
++ usb_extal_clk: usb_extal {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <48000000>;
++ };
++
++ /* External CAN clock */
++ can_clk: can {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ /* This value must be overridden by the board. */
++ clock-frequency = <0>;
++ };
++
++ /* External SCIF clock */
++ scif_clk: scif {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ /* This value must be overridden by the board. */
++ clock-frequency = <0>;
++ };
++
++ /* Special CPG clocks */
++ cpg: clock-controller@e6150000 {
++ compatible = "renesas,r8a7793-cpg-mssr";
++ reg = <0 0xe6150000 0 0x1000>;
++ clocks = <&extal_clk>, <&usb_extal_clk>;
++ clock-names = "extal", "usb_extal";
++ #clock-cells = <2>;
++ #power-domain-cells = <0>;
+ };
+
+ rst: reset-controller@e6160000 {
+--
+2.19.0
+
diff --git a/patches/0305-ARM-dts-r8a7794-Stop-grouping-clocks-under-a-clocks-.patch b/patches/0305-ARM-dts-r8a7794-Stop-grouping-clocks-under-a-clocks-.patch
new file mode 100644
index 0000000..d5589c3
--- /dev/null
+++ b/patches/0305-ARM-dts-r8a7794-Stop-grouping-clocks-under-a-clocks-.patch
@@ -0,0 +1,156 @@
+From 8c44d94c9599cb1c2ddefc5224b168eb4b07686a Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 18 Aug 2017 11:16:57 +0200
+Subject: [PATCH 0305/1795] ARM: dts: r8a7794: Stop grouping clocks under a
+ "clocks" subnode
+
+The current practice is to not group clocks under a "clocks" subnode,
+but just put them together with the other on-SoC devices.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 9fb1c8ff4ca36a13fdeb7e4161687eaf4685dc7a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7794.dtsi | 124 ++++++++++++++++-----------------
+ 1 file changed, 59 insertions(+), 65 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
+index ebd44d9982be..a4c35d29f77c 100644
+--- a/arch/arm/boot/dts/r8a7794.dtsi
++++ b/arch/arm/boot/dts/r8a7794.dtsi
+@@ -982,71 +982,65 @@
+ status = "disabled";
+ };
+
+- clocks {
+- #address-cells = <2>;
+- #size-cells = <2>;
+- ranges;
+-
+- /* External root clock */
+- extal_clk: extal {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- /* This value must be overriden by the board. */
+- clock-frequency = <0>;
+- };
+-
+- /* External USB clock - can be overridden by the board */
+- usb_extal_clk: usb_extal {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- clock-frequency = <48000000>;
+- };
+-
+- /* External CAN clock */
+- can_clk: can {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- /* This value must be overridden by the board. */
+- clock-frequency = <0>;
+- };
+-
+- /* External SCIF clock */
+- scif_clk: scif {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- /* This value must be overridden by the board. */
+- clock-frequency = <0>;
+- };
+-
+- /*
+- * The external audio clocks are configured as 0 Hz fixed
+- * frequency clocks by default. Boards that provide audio
+- * clocks should override them.
+- */
+- audio_clka: audio_clka {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- clock-frequency = <0>;
+- };
+- audio_clkb: audio_clkb {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- clock-frequency = <0>;
+- };
+- audio_clkc: audio_clkc {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- clock-frequency = <0>;
+- };
+-
+- cpg: clock-controller@e6150000 {
+- compatible = "renesas,r8a7794-cpg-mssr";
+- reg = <0 0xe6150000 0 0x1000>;
+- clocks = <&extal_clk>, <&usb_extal_clk>;
+- clock-names = "extal", "usb_extal";
+- #clock-cells = <2>;
+- #power-domain-cells = <0>;
+- };
++ /* External root clock */
++ extal_clk: extal {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ /* This value must be overridden by the board. */
++ clock-frequency = <0>;
++ };
++
++ /* External USB clock - can be overridden by the board */
++ usb_extal_clk: usb_extal {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <48000000>;
++ };
++
++ /* External CAN clock */
++ can_clk: can {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ /* This value must be overridden by the board. */
++ clock-frequency = <0>;
++ };
++
++ /* External SCIF clock */
++ scif_clk: scif {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ /* This value must be overridden by the board. */
++ clock-frequency = <0>;
++ };
++
++ /*
++ * The external audio clocks are configured as 0 Hz fixed
++ * frequency clocks by default. Boards that provide audio
++ * clocks should override them.
++ */
++ audio_clka: audio_clka {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <0>;
++ };
++ audio_clkb: audio_clkb {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <0>;
++ };
++ audio_clkc: audio_clkc {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <0>;
++ };
++
++ cpg: clock-controller@e6150000 {
++ compatible = "renesas,r8a7794-cpg-mssr";
++ reg = <0 0xe6150000 0 0x1000>;
++ clocks = <&extal_clk>, <&usb_extal_clk>;
++ clock-names = "extal", "usb_extal";
++ #clock-cells = <2>;
++ #power-domain-cells = <0>;
+ };
+
+ rst: reset-controller@e6160000 {
+--
+2.19.0
+
diff --git a/patches/0306-ARM-dts-r8a7743-Add-SDHI-controllers.patch b/patches/0306-ARM-dts-r8a7743-Add-SDHI-controllers.patch
new file mode 100644
index 0000000..8409edb
--- /dev/null
+++ b/patches/0306-ARM-dts-r8a7743-Add-SDHI-controllers.patch
@@ -0,0 +1,72 @@
+From 3bd4a3000be77a1f40473b278ba04aa67c72e819 Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Mon, 14 Aug 2017 12:49:47 +0100
+Subject: [PATCH 0306/1795] ARM: dts: r8a7743: Add SDHI controllers
+
+Add the SDHI controllers to the r8a7743 device tree.
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 63ce8a617b5129f7cb20ed0d6d822a31ecca4696)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7743.dtsi | 42 ++++++++++++++++++++++++++++++++++
+ 1 file changed, 42 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
+index 14222c72f0e0..6dd9b0b3d818 100644
+--- a/arch/arm/boot/dts/r8a7743.dtsi
++++ b/arch/arm/boot/dts/r8a7743.dtsi
+@@ -779,6 +779,48 @@
+ max-frequency = <97500000>;
+ status = "disabled";
+ };
++
++ sdhi0: sd@ee100000 {
++ compatible = "renesas,sdhi-r8a7743";
++ reg = <0 0xee100000 0 0x328>;
++ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 314>;
++ dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
++ <&dmac1 0xcd>, <&dmac1 0xce>;
++ dma-names = "tx", "rx", "tx", "rx";
++ max-frequency = <195000000>;
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ resets = <&cpg 314>;
++ status = "disabled";
++ };
++
++ sdhi1: sd@ee140000 {
++ compatible = "renesas,sdhi-r8a7743";
++ reg = <0 0xee140000 0 0x100>;
++ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 312>;
++ dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
++ <&dmac1 0xc1>, <&dmac1 0xc2>;
++ dma-names = "tx", "rx", "tx", "rx";
++ max-frequency = <97500000>;
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ resets = <&cpg 312>;
++ status = "disabled";
++ };
++
++ sdhi2: sd@ee160000 {
++ compatible = "renesas,sdhi-r8a7743";
++ reg = <0 0xee160000 0 0x100>;
++ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 311>;
++ dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
++ <&dmac1 0xd3>, <&dmac1 0xd4>;
++ dma-names = "tx", "rx", "tx", "rx";
++ max-frequency = <97500000>;
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ resets = <&cpg 311>;
++ status = "disabled";
++ };
+ };
+
+ /* External root clock */
+--
+2.19.0
+
diff --git a/patches/0307-ARM-dts-iwg20m-Enable-SDHI0-controller.patch b/patches/0307-ARM-dts-iwg20m-Enable-SDHI0-controller.patch
new file mode 100644
index 0000000..a5a6579
--- /dev/null
+++ b/patches/0307-ARM-dts-iwg20m-Enable-SDHI0-controller.patch
@@ -0,0 +1,59 @@
+From c14967645b8e04d829852b843e520c93d6d50325 Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Mon, 14 Aug 2017 12:49:48 +0100
+Subject: [PATCH 0307/1795] ARM: dts: iwg20m: Enable SDHI0 controller
+
+Enable the SDHI0 controller on iWave RZG1M Qseven SOM.
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e75e71e7bcee2e04be8bbca6fb67af1a45fa128b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7743-iwg20m.dtsi | 17 +++++++++++++++++
+ 1 file changed, 17 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7743-iwg20m.dtsi b/arch/arm/boot/dts/r8a7743-iwg20m.dtsi
+index ff7993818637..4119737cb883 100644
+--- a/arch/arm/boot/dts/r8a7743-iwg20m.dtsi
++++ b/arch/arm/boot/dts/r8a7743-iwg20m.dtsi
+@@ -9,6 +9,7 @@
+ */
+
+ #include "r8a7743.dtsi"
++#include <dt-bindings/gpio/gpio.h>
+
+ / {
+ compatible = "iwave,g20m", "renesas,r8a7743";
+@@ -42,6 +43,12 @@
+ groups = "mmc_data8_b", "mmc_ctrl";
+ function = "mmc";
+ };
++
++ sdhi0_pins: sd0 {
++ groups = "sdhi0_data4", "sdhi0_ctrl";
++ function = "sdhi0";
++ power-source = <3300>;
++ };
+ };
+
+ &mmcif0 {
+@@ -53,3 +60,13 @@
+ non-removable;
+ status = "okay";
+ };
++
++&sdhi0 {
++ pinctrl-0 = <&sdhi0_pins>;
++ pinctrl-names = "default";
++
++ vmmc-supply = <®_3p3v>;
++ vqmmc-supply = <®_3p3v>;
++ cd-gpios = <&gpio7 11 GPIO_ACTIVE_LOW>;
++ status = "okay";
++};
+--
+2.19.0
+
diff --git a/patches/0308-ARM-Add-definition-for-monitor-mode.patch b/patches/0308-ARM-Add-definition-for-monitor-mode.patch
new file mode 100644
index 0000000..f39d94b
--- /dev/null
+++ b/patches/0308-ARM-Add-definition-for-monitor-mode.patch
@@ -0,0 +1,36 @@
+From 71ff1cae2dbd2d97a919ff99d5ab03d5cd784e4e Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 1 Sep 2017 10:37:44 +0200
+Subject: [PATCH 0308/1795] ARM: Add definition for monitor mode
+
+<asm/ptrace.h> provides *_MODE definitions for the various processor
+modes, but monitor mode was missing.
+
+Add MON_MODE to avoid code using the hardcoded value.
+
+Suggested-by: Marc Zyngier <marc.zyngier@arm.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Tested-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c5d43be52e0c7380f985585ef72dac1a6a89b59d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/include/uapi/asm/ptrace.h | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/include/uapi/asm/ptrace.h b/arch/arm/include/uapi/asm/ptrace.h
+index b67cda536c25..a9aa6acbf1bf 100644
+--- a/arch/arm/include/uapi/asm/ptrace.h
++++ b/arch/arm/include/uapi/asm/ptrace.h
+@@ -54,6 +54,7 @@
+ #endif
+ #define FIQ_MODE 0x00000011
+ #define IRQ_MODE 0x00000012
++#define MON_MODE 0x00000016
+ #define ABT_MODE 0x00000017
+ #define HYP_MODE 0x0000001a
+ #define UND_MODE 0x0000001b
+--
+2.19.0
+
diff --git a/patches/0309-ARM-shmobile-rcar-gen2-Make-sure-CNTVOFF-is-initiali.patch b/patches/0309-ARM-shmobile-rcar-gen2-Make-sure-CNTVOFF-is-initiali.patch
new file mode 100644
index 0000000..8dfa2e5
--- /dev/null
+++ b/patches/0309-ARM-shmobile-rcar-gen2-Make-sure-CNTVOFF-is-initiali.patch
@@ -0,0 +1,176 @@
+From 4f747caaec0cf4659c925252288b55d9b995b1e9 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 1 Sep 2017 10:37:45 +0200
+Subject: [PATCH 0309/1795] ARM: shmobile: rcar-gen2: Make sure CNTVOFF is
+ initialized on CA7/15
+
+On Cortex-A7, the arch timer CNTVOFF register is uninitialized.
+Ideally it should be initialized by the boot loader, but it isn't.
+
+For the boot CPU, CNTVOFF is initialized by Linux since commit
+9ce3fa6816c2fb59 ("ARM: shmobile: rcar-gen2: Add CA7 arch_timer
+initialization for r8a7794").
+For secondary CPU cores, no such initialization is done.
+
+Hence when enabling SMP on r8a7794, the kernel log is spammed with:
+
+ WARNING: Underflow in clocksource 'arch_sys_counter' observed, time update ignored.
+ Please report this, consider using a different clocksource, if possible.
+ Your kernel is probably still fine.
+
+As Marc Zyngier pointed out that Cortex-A15 and Cortex-A7 are similar with
+respect to CNTVOFF, we have been very lucky this just worked on R-Car
+Gen2 SoCs with Cortex-A15 cores.
+
+To fix this:
+ - Move the existing inline asm code to initialize CNTVOFF to an
+ assembler source file (adding comments and replacing hardcoded
+ constants by definitions in the process), so it can be reused,
+ - Perform the initialization of CNTVOFF on the boot CPU (Cortex-A15 or
+ Cortex-A7) on all R-Car Gen2 and RZ/G1 parts,
+ - Wrap the standard secondary_startup() routine inside a routine which
+ initializes CNTVOFF.
+
+Based on patches by Hisashi Nakamura in the BSP.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Tested-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 3fd45a136ff61bb54deab70fb2d534a85e40481f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/mach-shmobile/Makefile | 1 +
+ arch/arm/mach-shmobile/common.h | 2 ++
+ arch/arm/mach-shmobile/headsmp-apmu.S | 37 ++++++++++++++++++++++++
+ arch/arm/mach-shmobile/platsmp-apmu.c | 2 +-
+ arch/arm/mach-shmobile/setup-rcar-gen2.c | 20 ++-----------
+ 5 files changed, 43 insertions(+), 19 deletions(-)
+ create mode 100644 arch/arm/mach-shmobile/headsmp-apmu.S
+
+diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
+index e16b81ec4b07..1939f521579c 100644
+--- a/arch/arm/mach-shmobile/Makefile
++++ b/arch/arm/mach-shmobile/Makefile
+@@ -23,6 +23,7 @@ cpu-y := platsmp.o headsmp.o
+ # Shared SoC family objects
+ obj-$(CONFIG_ARCH_RCAR_GEN2) += setup-rcar-gen2.o platsmp-apmu.o $(cpu-y)
+ CFLAGS_setup-rcar-gen2.o += -march=armv7-a
++obj-$(CONFIG_ARCH_RCAR_GEN2) += headsmp-apmu.o
+ obj-$(CONFIG_ARCH_R8A7790) += regulator-quirk-rcar-gen2.o
+ obj-$(CONFIG_ARCH_R8A7791) += regulator-quirk-rcar-gen2.o
+ obj-$(CONFIG_ARCH_R8A7793) += regulator-quirk-rcar-gen2.o
+diff --git a/arch/arm/mach-shmobile/common.h b/arch/arm/mach-shmobile/common.h
+index f8fcd799d677..a8fa4f7e1f60 100644
+--- a/arch/arm/mach-shmobile/common.h
++++ b/arch/arm/mach-shmobile/common.h
+@@ -2,6 +2,7 @@
+ #ifndef __ARCH_MACH_COMMON_H
+ #define __ARCH_MACH_COMMON_H
+
++extern void shmobile_init_cntvoff(void);
+ extern void shmobile_init_delay(void);
+ extern void shmobile_boot_vector(void);
+ extern unsigned long shmobile_boot_fn;
+@@ -12,6 +13,7 @@ extern void shmobile_smp_hook(unsigned int cpu, unsigned long fn,
+ unsigned long arg);
+ extern bool shmobile_smp_cpu_can_disable(unsigned int cpu);
+ extern bool shmobile_smp_init_fallback_ops(void);
++extern void shmobile_boot_apmu(void);
+ extern void shmobile_boot_scu(void);
+ extern void shmobile_smp_scu_prepare_cpus(phys_addr_t scu_base_phys,
+ unsigned int max_cpus);
+diff --git a/arch/arm/mach-shmobile/headsmp-apmu.S b/arch/arm/mach-shmobile/headsmp-apmu.S
+new file mode 100644
+index 000000000000..db4743d2bf91
+--- /dev/null
++++ b/arch/arm/mach-shmobile/headsmp-apmu.S
+@@ -0,0 +1,37 @@
++/*
++ * SMP support for APMU based systems with Cortex A7/A15
++ *
++ * Copyright (C) 2014 Renesas Electronics Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#include <linux/linkage.h>
++#include <asm/assembler.h>
++
++ENTRY(shmobile_init_cntvoff)
++ /*
++ * CNTVOFF has to be initialized either from non-secure Hypervisor
++ * mode or secure Monitor mode with SCR.NS==1. If TrustZone is enabled
++ * then it should be handled by the secure code
++ */
++ cps #MON_MODE
++ mrc p15, 0, r1, c1, c1, 0 /* Get Secure Config */
++ orr r0, r1, #1
++ mcr p15, 0, r0, c1, c1, 0 /* Set Non Secure bit */
++ instr_sync
++ mov r0, #0
++ mcrr p15, 4, r0, r0, c14 /* CNTVOFF = 0 */
++ instr_sync
++ mcr p15, 0, r1, c1, c1, 0 /* Set Secure bit */
++ instr_sync
++ cps #SVC_MODE
++ ret lr
++ENDPROC(shmobile_init_cntvoff)
++
++ENTRY(shmobile_boot_apmu)
++ bl shmobile_init_cntvoff
++ b secondary_startup
++ENDPROC(shmobile_boot_apmu)
+diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c
+index 3ca2c13346f0..4422b615a6ee 100644
+--- a/arch/arm/mach-shmobile/platsmp-apmu.c
++++ b/arch/arm/mach-shmobile/platsmp-apmu.c
+@@ -204,7 +204,7 @@ void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus,
+ int shmobile_smp_apmu_boot_secondary(unsigned int cpu, struct task_struct *idle)
+ {
+ /* For this particular CPU register boot vector */
+- shmobile_smp_hook(cpu, __pa_symbol(secondary_startup), 0);
++ shmobile_smp_hook(cpu, __pa_symbol(shmobile_boot_apmu), 0);
+
+ return apmu_wrap(cpu, apmu_power_on);
+ }
+diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c
+index 7ab1690fab82..5561dbed7a33 100644
+--- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
++++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
+@@ -70,28 +70,12 @@ void __init rcar_gen2_timer_init(void)
+ void __iomem *base;
+ u32 freq;
+
++ shmobile_init_cntvoff();
++
+ if (of_machine_is_compatible("renesas,r8a7745") ||
+ of_machine_is_compatible("renesas,r8a7792") ||
+ of_machine_is_compatible("renesas,r8a7794")) {
+ freq = 260000000 / 8; /* ZS / 8 */
+- /* CNTVOFF has to be initialized either from non-secure
+- * Hypervisor mode or secure Monitor mode with SCR.NS==1.
+- * If TrustZone is enabled then it should be handled by the
+- * secure code.
+- */
+- asm volatile(
+- " cps 0x16\n"
+- " mrc p15, 0, r1, c1, c1, 0\n"
+- " orr r0, r1, #1\n"
+- " mcr p15, 0, r0, c1, c1, 0\n"
+- " isb\n"
+- " mov r0, #0\n"
+- " mcrr p15, 4, r0, r0, c14\n"
+- " isb\n"
+- " mcr p15, 0, r1, c1, c1, 0\n"
+- " isb\n"
+- " cps 0x13\n"
+- : : : "r0", "r1");
+ } else {
+ /* At Linux boot time the r8a7790 arch timer comes up
+ * with the counter disabled. Moreover, it may also report
+--
+2.19.0
+
diff --git a/patches/0310-ARM-dts-iwg20d-q7-Add-SDHI1-support.patch b/patches/0310-ARM-dts-iwg20d-q7-Add-SDHI1-support.patch
new file mode 100644
index 0000000..9197998
--- /dev/null
+++ b/patches/0310-ARM-dts-iwg20d-q7-Add-SDHI1-support.patch
@@ -0,0 +1,91 @@
+From f479f8119f907eb1330b3ac96aeb84807c37ff84 Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Mon, 14 Aug 2017 12:49:49 +0100
+Subject: [PATCH 0310/1795] ARM: dts: iwg20d-q7: Add SDHI1 support
+
+Define the iWave RainboW-G20D-Qseven board dependent part of the
+SDHI1 device node.
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 029efb3a03c5039902a6f1cfe266ed664cb97f20)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7743-iwg20d-q7.dts | 48 +++++++++++++++++++++++++
+ 1 file changed, 48 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts b/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
+index 081af0192851..4ff27d23ecf0 100644
+--- a/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
++++ b/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
+@@ -19,6 +19,29 @@
+ serial0 = &scif0;
+ ethernet0 = &avb;
+ };
++
++ vcc_sdhi1: regulator-vcc-sdhi1 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "SDHI1 Vcc";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&gpio1 16 GPIO_ACTIVE_LOW>;
++ };
++
++ vccq_sdhi1: regulator-vccq-sdhi1 {
++ compatible = "regulator-gpio";
++
++ regulator-name = "SDHI1 VccQ";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
++ gpios-states = <1>;
++ states = <3300000 1
++ 1800000 0>;
++ };
+ };
+
+ &pfc {
+@@ -31,6 +54,18 @@
+ groups = "avb_mdio", "avb_gmii";
+ function = "avb";
+ };
++
++ sdhi1_pins: sd1 {
++ groups = "sdhi1_data4", "sdhi1_ctrl";
++ function = "sdhi1";
++ power-source = <3300>;
++ };
++
++ sdhi1_pins_uhs: sd1_uhs {
++ groups = "sdhi1_data4", "sdhi1_ctrl";
++ function = "sdhi1";
++ power-source = <1800>;
++ };
+ };
+
+ &scif0 {
+@@ -54,3 +89,16 @@
+ micrel,led-mode = <1>;
+ };
+ };
++
++&sdhi1 {
++ pinctrl-0 = <&sdhi1_pins>;
++ pinctrl-1 = <&sdhi1_pins_uhs>;
++ pinctrl-names = "default", "state_uhs";
++
++ vmmc-supply = <&vcc_sdhi1>;
++ vqmmc-supply = <&vccq_sdhi1>;
++ cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
++ wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
++ sd-uhs-sdr50;
++ status = "okay";
++};
+--
+2.19.0
+
diff --git a/patches/0311-ARM-dts-r8a7745-Add-GPIO-support.patch b/patches/0311-ARM-dts-r8a7745-Add-GPIO-support.patch
new file mode 100644
index 0000000..42d0502
--- /dev/null
+++ b/patches/0311-ARM-dts-r8a7745-Add-GPIO-support.patch
@@ -0,0 +1,135 @@
+From 576ce10d5a13723cd99456066585e26805e118d7 Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Fri, 18 Aug 2017 15:56:01 +0100
+Subject: [PATCH 0311/1795] ARM: dts: r8a7745: Add GPIO support
+
+Describe GPIO blocks in the R8A7745 device tree.
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 3163c03ec37aef502474122b857452fb948c7596)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7745.dtsi | 105 +++++++++++++++++++++++++++++++++
+ 1 file changed, 105 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
+index aff90dfb8b32..18ca7ae8dd3f 100644
+--- a/arch/arm/boot/dts/r8a7745.dtsi
++++ b/arch/arm/boot/dts/r8a7745.dtsi
+@@ -65,6 +65,111 @@
+ resets = <&cpg 408>;
+ };
+
++ gpio0: gpio@e6050000 {
++ compatible = "renesas,gpio-r8a7745",
++ "renesas,rcar-gen2-gpio";
++ reg = <0 0xe6050000 0 0x50>;
++ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 0 32>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ clocks = <&cpg CPG_MOD 912>;
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ resets = <&cpg 912>;
++ };
++
++ gpio1: gpio@e6051000 {
++ compatible = "renesas,gpio-r8a7745",
++ "renesas,rcar-gen2-gpio";
++ reg = <0 0xe6051000 0 0x50>;
++ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 32 26>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ clocks = <&cpg CPG_MOD 911>;
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ resets = <&cpg 911>;
++ };
++
++ gpio2: gpio@e6052000 {
++ compatible = "renesas,gpio-r8a7745",
++ "renesas,rcar-gen2-gpio";
++ reg = <0 0xe6052000 0 0x50>;
++ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 64 32>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ clocks = <&cpg CPG_MOD 910>;
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ resets = <&cpg 910>;
++ };
++
++ gpio3: gpio@e6053000 {
++ compatible = "renesas,gpio-r8a7745",
++ "renesas,rcar-gen2-gpio";
++ reg = <0 0xe6053000 0 0x50>;
++ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 96 32>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ clocks = <&cpg CPG_MOD 909>;
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ resets = <&cpg 909>;
++ };
++
++ gpio4: gpio@e6054000 {
++ compatible = "renesas,gpio-r8a7745",
++ "renesas,rcar-gen2-gpio";
++ reg = <0 0xe6054000 0 0x50>;
++ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 128 32>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ clocks = <&cpg CPG_MOD 908>;
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ resets = <&cpg 908>;
++ };
++
++ gpio5: gpio@e6055000 {
++ compatible = "renesas,gpio-r8a7745",
++ "renesas,rcar-gen2-gpio";
++ reg = <0 0xe6055000 0 0x50>;
++ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 160 28>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ clocks = <&cpg CPG_MOD 907>;
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ resets = <&cpg 907>;
++ };
++
++ gpio6: gpio@e6055400 {
++ compatible = "renesas,gpio-r8a7745",
++ "renesas,rcar-gen2-gpio";
++ reg = <0 0xe6055400 0 0x50>;
++ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 192 26>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ clocks = <&cpg CPG_MOD 905>;
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ resets = <&cpg 905>;
++ };
++
+ irqc: interrupt-controller@e61c0000 {
+ compatible = "renesas,irqc-r8a7745", "renesas,irqc";
+ #interrupt-cells = <2>;
+--
+2.19.0
+
diff --git a/patches/0312-ARM-dts-iwg22m-Add-iWave-RZG1E-SODIMM-SOM.patch b/patches/0312-ARM-dts-iwg22m-Add-iWave-RZG1E-SODIMM-SOM.patch
new file mode 100644
index 0000000..0dc81af
--- /dev/null
+++ b/patches/0312-ARM-dts-iwg22m-Add-iWave-RZG1E-SODIMM-SOM.patch
@@ -0,0 +1,51 @@
+From c24a340b9b80b70771f31a9c383789df541a23c9 Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Tue, 15 Aug 2017 11:54:19 +0100
+Subject: [PATCH 0312/1795] ARM: dts: iwg22m: Add iWave RZG1E SODIMM SOM
+
+Add support for iWave RZG1E SODIMM System On Module.
+http://www.iwavesystems.com/rz-g1e-sodimm-module.html
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c9a41f515d1e5955c44cb04926f5f5f4be4a0cd0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7745-iwg22m.dtsi | 24 ++++++++++++++++++++++++
+ 1 file changed, 24 insertions(+)
+ create mode 100644 arch/arm/boot/dts/r8a7745-iwg22m.dtsi
+
+diff --git a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
+new file mode 100644
+index 000000000000..9dbd854aacf8
+--- /dev/null
++++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
+@@ -0,0 +1,24 @@
++/*
++ * Device Tree Source for the iWave-RZG1E-G22M SODIMM SOM
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include "r8a7745.dtsi"
++
++/ {
++ compatible = "iwave,g22m", "renesas,r8a7745";
++
++ memory@40000000 {
++ device_type = "memory";
++ reg = <0 0x40000000 0 0x20000000>;
++ };
++};
++
++&extal_clk {
++ clock-frequency = <20000000>;
++};
+--
+2.19.0
+
diff --git a/patches/0313-ARM-dts-iwg22d-sodimm-Add-support-for-iWave-G22D-SOD.patch b/patches/0313-ARM-dts-iwg22d-sodimm-Add-support-for-iWave-G22D-SOD.patch
new file mode 100644
index 0000000..d21ae70
--- /dev/null
+++ b/patches/0313-ARM-dts-iwg22d-sodimm-Add-support-for-iWave-G22D-SOD.patch
@@ -0,0 +1,69 @@
+From d2f84c54f891ecf34b39b16f18fb99ad0d71967b Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Tue, 15 Aug 2017 11:54:20 +0100
+Subject: [PATCH 0313/1795] ARM: dts: iwg22d-sodimm: Add support for iWave
+ G22D-SODIMM board
+
+Add support for iWave RainboW-G22D-SODIMM board based on RZ/G1E.
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit a59eb272a4eae10eb4f7a3e7b15aa47d57b32699)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/Makefile | 1 +
+ arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 29 +++++++++++++++++++++
+ 2 files changed, 30 insertions(+)
+ create mode 100644 arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index 300f441698fb..2fca3799bef6 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -726,6 +726,7 @@ dtb-$(CONFIG_ARCH_RENESAS) += \
+ r8a7740-armadillo800eva.dtb \
+ r8a7743-iwg20d-q7.dtb \
+ r8a7743-sk-rzg1m.dtb \
++ r8a7745-iwg22d-sodimm.dtb \
+ r8a7745-sk-rzg1e.dtb \
+ r8a7778-bockw.dtb \
+ r8a7779-marzen.dtb \
+diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+new file mode 100644
+index 000000000000..cbc19feb1565
+--- /dev/null
++++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+@@ -0,0 +1,29 @@
++/*
++ * Device Tree Source for the iWave-RZG1E SODIMM carrier board
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++/dts-v1/;
++#include "r8a7745-iwg22m.dtsi"
++
++/ {
++ model = "iWave Systems RainboW-G22D-SODIMM board based on RZ/G1E";
++ compatible = "iwave,g22d", "iwave,g22m", "renesas,r8a7745";
++
++ aliases {
++ serial0 = &scif4;
++ };
++
++ chosen {
++ stdout-path = "serial0:115200n8";
++ };
++};
++
++&scif4 {
++ status = "okay";
++};
+--
+2.19.0
+
diff --git a/patches/0314-ARM-dts-r8a7745-Add-I2C-DT-support.patch b/patches/0314-ARM-dts-r8a7745-Add-I2C-DT-support.patch
new file mode 100644
index 0000000..f19a11a
--- /dev/null
+++ b/patches/0314-ARM-dts-r8a7745-Add-I2C-DT-support.patch
@@ -0,0 +1,130 @@
+From 6378b07982ccf1cbc2c8de7362f6fb09d1837e16 Mon Sep 17 00:00:00 2001
+From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Date: Tue, 22 Aug 2017 16:27:02 +0100
+Subject: [PATCH 0314/1795] ARM: dts: r8a7745: Add I2C DT support
+
+Add I2C[0-5] devices to the r8a7745 device tree.
+
+Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 282fbf4066e58b4c60683ab5cba30c5c998c7250)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7745.dtsi | 93 ++++++++++++++++++++++++++++++++++
+ 1 file changed, 93 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
+index 18ca7ae8dd3f..2fa989f631a9 100644
+--- a/arch/arm/boot/dts/r8a7745.dtsi
++++ b/arch/arm/boot/dts/r8a7745.dtsi
+@@ -18,6 +18,15 @@
+ #address-cells = <2>;
+ #size-cells = <2>;
+
++ aliases {
++ i2c0 = &i2c0;
++ i2c1 = &i2c1;
++ i2c2 = &i2c2;
++ i2c3 = &i2c3;
++ i2c4 = &i2c4;
++ i2c5 = &i2c5;
++ };
++
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -613,6 +622,90 @@
+ #size-cells = <0>;
+ status = "disabled";
+ };
++
++ i2c0: i2c@e6508000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,i2c-r8a7745",
++ "renesas,rcar-gen2-i2c";
++ reg = <0 0xe6508000 0 0x40>;
++ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 931>;
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ resets = <&cpg 931>;
++ i2c-scl-internal-delay-ns = <6>;
++ status = "disabled";
++ };
++
++ i2c1: i2c@e6518000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,i2c-r8a7745",
++ "renesas,rcar-gen2-i2c";
++ reg = <0 0xe6518000 0 0x40>;
++ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 930>;
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ resets = <&cpg 930>;
++ i2c-scl-internal-delay-ns = <6>;
++ status = "disabled";
++ };
++
++ i2c2: i2c@e6530000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,i2c-r8a7745",
++ "renesas,rcar-gen2-i2c";
++ reg = <0 0xe6530000 0 0x40>;
++ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 929>;
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ resets = <&cpg 929>;
++ i2c-scl-internal-delay-ns = <6>;
++ status = "disabled";
++ };
++
++ i2c3: i2c@e6540000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,i2c-r8a7745",
++ "renesas,rcar-gen2-i2c";
++ reg = <0 0xe6540000 0 0x40>;
++ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 928>;
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ resets = <&cpg 928>;
++ i2c-scl-internal-delay-ns = <6>;
++ status = "disabled";
++ };
++
++ i2c4: i2c@e6520000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,i2c-r8a7745",
++ "renesas,rcar-gen2-i2c";
++ reg = <0 0xe6520000 0 0x40>;
++ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 927>;
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ resets = <&cpg 927>;
++ i2c-scl-internal-delay-ns = <6>;
++ status = "disabled";
++ };
++
++ i2c5: i2c@e6528000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,i2c-r8a7745",
++ "renesas,rcar-gen2-i2c";
++ reg = <0 0xe6528000 0 0x40>;
++ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 925>;
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ resets = <&cpg 925>;
++ i2c-scl-internal-delay-ns = <6>;
++ status = "disabled";
++ };
+ };
+
+ /* External root clock */
+--
+2.19.0
+
diff --git a/patches/0315-ARM-dts-r8a7745-Add-MMC-interface-support.patch b/patches/0315-ARM-dts-r8a7745-Add-MMC-interface-support.patch
new file mode 100644
index 0000000..5500897
--- /dev/null
+++ b/patches/0315-ARM-dts-r8a7745-Add-MMC-interface-support.patch
@@ -0,0 +1,46 @@
+From 47981b7b3054ad0f1e3689368412c0980c34629d Mon Sep 17 00:00:00 2001
+From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Date: Thu, 17 Aug 2017 18:31:42 +0100
+Subject: [PATCH 0315/1795] ARM: dts: r8a7745: Add MMC interface support
+
+Add MMC interface support for r8a7745 SoC.
+
+Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 933b16efb7be16e98a6bcd04ed59c5e91371afef)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7745.dtsi | 16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
+index 2fa989f631a9..7fd2967b1f42 100644
+--- a/arch/arm/boot/dts/r8a7745.dtsi
++++ b/arch/arm/boot/dts/r8a7745.dtsi
+@@ -706,6 +706,22 @@
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
++
++ mmcif0: mmc@ee200000 {
++ compatible = "renesas,mmcif-r8a7745",
++ "renesas,sh-mmcif";
++ reg = <0 0xee200000 0 0x80>;
++ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 315>;
++ dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
++ <&dmac1 0xd1>, <&dmac1 0xd2>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ resets = <&cpg 315>;
++ reg-io-width = <4>;
++ max-frequency = <97500000>;
++ status = "disabled";
++ };
+ };
+
+ /* External root clock */
+--
+2.19.0
+
diff --git a/patches/0316-ARM-dts-iwg22m-Add-eMMC-support.patch b/patches/0316-ARM-dts-iwg22m-Add-eMMC-support.patch
new file mode 100644
index 0000000..3a7af69
--- /dev/null
+++ b/patches/0316-ARM-dts-iwg22m-Add-eMMC-support.patch
@@ -0,0 +1,58 @@
+From 5ace30c5e4e493be141e14ea7ce06689568a9731 Mon Sep 17 00:00:00 2001
+From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Date: Thu, 17 Aug 2017 18:31:43 +0100
+Subject: [PATCH 0316/1795] ARM: dts: iwg22m: Add eMMC support
+
+Add eMMC support for iW-RainboW-G22M-SM.
+
+Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 3350ed907182049b806992f228021e7997183dda)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7745-iwg22m.dtsi | 26 ++++++++++++++++++++++++++
+ 1 file changed, 26 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
+index 9dbd854aacf8..afb1148baa2f 100644
+--- a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
++++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
+@@ -17,8 +17,34 @@
+ device_type = "memory";
+ reg = <0 0x40000000 0 0x20000000>;
+ };
++
++ reg_3p3v: 3p3v {
++ compatible = "regulator-fixed";
++ regulator-name = "3P3V";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
+ };
+
+ &extal_clk {
+ clock-frequency = <20000000>;
+ };
++
++&pfc {
++ mmcif0_pins: mmc {
++ groups = "mmc_data8", "mmc_ctrl";
++ function = "mmc";
++ };
++};
++
++&mmcif0 {
++ pinctrl-0 = <&mmcif0_pins>;
++ pinctrl-names = "default";
++
++ vmmc-supply = <®_3p3v>;
++ bus-width = <8>;
++ non-removable;
++ status = "okay";
++};
+--
+2.19.0
+
diff --git a/patches/0317-ARM-dts-iwg22m-Add-RTC-support.patch b/patches/0317-ARM-dts-iwg22m-Add-RTC-support.patch
new file mode 100644
index 0000000..64133f5
--- /dev/null
+++ b/patches/0317-ARM-dts-iwg22m-Add-RTC-support.patch
@@ -0,0 +1,52 @@
+From 4e37e633d67abb5e400255802f7caa72da39ed4c Mon Sep 17 00:00:00 2001
+From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Date: Tue, 22 Aug 2017 19:22:46 +0100
+Subject: [PATCH 0317/1795] ARM: dts: iwg22m: Add RTC support
+
+Add support for the bq32000 RTC to the iwg22m device tree.
+
+Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit a7b8f48d2fa14330a1886f7fd640187c8b4470c5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7745-iwg22m.dtsi | 18 ++++++++++++++++++
+ 1 file changed, 18 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
+index afb1148baa2f..e306e7c5b644 100644
+--- a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
++++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
+@@ -37,6 +37,11 @@
+ groups = "mmc_data8", "mmc_ctrl";
+ function = "mmc";
+ };
++
++ i2c3_pins: i2c3 {
++ groups = "i2c3_b";
++ function = "i2c3";
++ };
+ };
+
+ &mmcif0 {
+@@ -48,3 +53,16 @@
+ non-removable;
+ status = "okay";
+ };
++
++&i2c3 {
++ pinctrl-0 = <&i2c3_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++ clock-frequency = <400000>;
++
++ rtc@68 {
++ compatible = "ti,bq32000";
++ reg = <0x68>;
++ };
++};
+--
+2.19.0
+
diff --git a/patches/0318-ARM-dts-r8a7791-Convert-to-new-CPG-MSSR-bindings.patch b/patches/0318-ARM-dts-r8a7791-Convert-to-new-CPG-MSSR-bindings.patch
new file mode 100644
index 0000000..bea66ed
--- /dev/null
+++ b/patches/0318-ARM-dts-r8a7791-Convert-to-new-CPG-MSSR-bindings.patch
@@ -0,0 +1,1174 @@
+From 553c0b129c47bd15e679113af208e03a799f27d1 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 23 Aug 2017 13:59:25 +0200
+Subject: [PATCH 0318/1795] ARM: dts: r8a7791: Convert to new CPG/MSSR bindings
+
+Convert the R-Car M2-W SoC from the old "Renesas R-Car Gen2 Clock Pulse
+Generator (CPG)", "Renesas CPG DIV6 Clock", and "Renesas CPG Module Stop
+(MSTP) Clocks" DT bindings to the new unified "Renesas Clock Pulse
+Generator / Module Standby and Software Reset" DT bindings.
+
+This simplifies the DTS files, and allows to add support for reset
+control later.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 362b334b17943d84d2878d2733f0ce695d45a2b6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7791-koelsch.dts | 4 +-
+ arch/arm/boot/dts/r8a7791-porter.dts | 4 +-
+ arch/arm/boot/dts/r8a7791.dtsi | 557 +++++---------------------
+ 3 files changed, 104 insertions(+), 461 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
+index 25c3a10d669c..4126de417922 100644
+--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
++++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
+@@ -336,9 +336,7 @@
+ pinctrl-names = "default";
+ status = "okay";
+
+- clocks = <&mstp7_clks R8A7791_CLK_DU0>,
+- <&mstp7_clks R8A7791_CLK_DU1>,
+- <&mstp7_clks R8A7791_CLK_LVDS0>,
++ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 726>,
+ <&x13_clk>, <&x2_clk>;
+ clock-names = "du.0", "du.1", "lvds.0",
+ "dclkin.0", "dclkin.1";
+diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts
+index b6ebe79261c6..9a02d03b23c2 100644
+--- a/arch/arm/boot/dts/r8a7791-porter.dts
++++ b/arch/arm/boot/dts/r8a7791-porter.dts
+@@ -419,9 +419,7 @@
+ pinctrl-names = "default";
+ status = "okay";
+
+- clocks = <&mstp7_clks R8A7791_CLK_DU0>,
+- <&mstp7_clks R8A7791_CLK_DU1>,
+- <&mstp7_clks R8A7791_CLK_LVDS0>,
++ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 726>,
+ <&x3_clk>, <&x16_clk>;
+ clock-names = "du.0", "du.1", "lvds.0",
+ "dclkin.0", "dclkin.1";
+diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
+index f1d1a9772153..5fca397b722b 100644
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -10,7 +10,7 @@
+ * kind, whether express or implied.
+ */
+
+-#include <dt-bindings/clock/r8a7791-clock.h>
++#include <dt-bindings/clock/r8a7791-cpg-mssr.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/power/r8a7791-sysc.h>
+@@ -51,7 +51,7 @@
+ reg = <0>;
+ clock-frequency = <1500000000>;
+ voltage-tolerance = <1>; /* 1% */
+- clocks = <&cpg_clocks R8A7791_CLK_Z>;
++ clocks = <&cpg CPG_CORE R8A7791_CLK_Z>;
+ clock-latency = <300000>; /* 300 us */
+ power-domains = <&sysc R8A7791_PD_CA15_CPU0>;
+ next-level-cache = <&L2_CA15>;
+@@ -117,7 +117,7 @@
+ <0 0xf1004000 0 0x2000>,
+ <0 0xf1006000 0 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+- clocks = <&mstp4_clks R8A7791_CLK_INTC_SYS>;
++ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ };
+@@ -131,7 +131,7 @@
+ gpio-ranges = <&pfc 0 0 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7791_CLK_GPIO0>;
++ clocks = <&cpg CPG_MOD 912>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ };
+
+@@ -144,7 +144,7 @@
+ gpio-ranges = <&pfc 0 32 26>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7791_CLK_GPIO1>;
++ clocks = <&cpg CPG_MOD 911>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ };
+
+@@ -157,7 +157,7 @@
+ gpio-ranges = <&pfc 0 64 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7791_CLK_GPIO2>;
++ clocks = <&cpg CPG_MOD 910>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ };
+
+@@ -170,7 +170,7 @@
+ gpio-ranges = <&pfc 0 96 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7791_CLK_GPIO3>;
++ clocks = <&cpg CPG_MOD 909>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ };
+
+@@ -183,7 +183,7 @@
+ gpio-ranges = <&pfc 0 128 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7791_CLK_GPIO4>;
++ clocks = <&cpg CPG_MOD 908>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ };
+
+@@ -196,7 +196,7 @@
+ gpio-ranges = <&pfc 0 160 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7791_CLK_GPIO5>;
++ clocks = <&cpg CPG_MOD 907>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ };
+
+@@ -209,7 +209,7 @@
+ gpio-ranges = <&pfc 0 192 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7791_CLK_GPIO6>;
++ clocks = <&cpg CPG_MOD 905>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ };
+
+@@ -222,7 +222,7 @@
+ gpio-ranges = <&pfc 0 224 26>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+- clocks = <&mstp9_clks R8A7791_CLK_GPIO7>;
++ clocks = <&cpg CPG_MOD 904>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ };
+
+@@ -232,7 +232,7 @@
+ "renesas,rcar-thermal";
+ reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp5_clks R8A7791_CLK_THERMAL>;
++ clocks = <&cpg CPG_MOD 522>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ #thermal-sensor-cells = <0>;
+ };
+@@ -250,7 +250,7 @@
+ reg = <0 0xffca0000 0 0x1004>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp1_clks R8A7791_CLK_CMT0>;
++ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+
+@@ -270,7 +270,7 @@
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7791_CLK_CMT1>;
++ clocks = <&cpg CPG_MOD 329>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+
+@@ -294,7 +294,7 @@
+ <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp4_clks R8A7791_CLK_IRQC>;
++ clocks = <&cpg CPG_MOD 407>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ };
+
+@@ -322,7 +322,7 @@
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+- clocks = <&mstp2_clks R8A7791_CLK_SYS_DMAC0>;
++ clocks = <&cpg CPG_MOD 219>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ #dma-cells = <1>;
+@@ -353,7 +353,7 @@
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14";
+- clocks = <&mstp2_clks R8A7791_CLK_SYS_DMAC1>;
++ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ #dma-cells = <1>;
+@@ -382,7 +382,7 @@
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+- clocks = <&mstp5_clks R8A7791_CLK_AUDIO_DMAC0>;
++ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ #dma-cells = <1>;
+@@ -411,7 +411,7 @@
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+- clocks = <&mstp5_clks R8A7791_CLK_AUDIO_DMAC1>;
++ clocks = <&cpg CPG_MOD 501>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ #dma-cells = <1>;
+@@ -424,7 +424,7 @@
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+- clocks = <&mstp3_clks R8A7791_CLK_USBDMAC0>;
++ clocks = <&cpg CPG_MOD 330>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+@@ -436,7 +436,7 @@
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+- clocks = <&mstp3_clks R8A7791_CLK_USBDMAC1>;
++ clocks = <&cpg CPG_MOD 331>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+@@ -449,7 +449,7 @@
+ compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6508000 0 0x40>;
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7791_CLK_I2C0>;
++ clocks = <&cpg CPG_MOD 931>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+@@ -461,7 +461,7 @@
+ compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6518000 0 0x40>;
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7791_CLK_I2C1>;
++ clocks = <&cpg CPG_MOD 930>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+@@ -473,7 +473,7 @@
+ compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6530000 0 0x40>;
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7791_CLK_I2C2>;
++ clocks = <&cpg CPG_MOD 929>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+@@ -485,7 +485,7 @@
+ compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6540000 0 0x40>;
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7791_CLK_I2C3>;
++ clocks = <&cpg CPG_MOD 928>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+@@ -497,7 +497,7 @@
+ compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6520000 0 0x40>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7791_CLK_I2C4>;
++ clocks = <&cpg CPG_MOD 927>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+@@ -510,7 +510,7 @@
+ compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6528000 0 0x40>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7791_CLK_I2C5>;
++ clocks = <&cpg CPG_MOD 925>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+@@ -524,7 +524,7 @@
+ "renesas,rmobile-iic";
+ reg = <0 0xe60b0000 0 0x425>;
+ interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7791_CLK_IICDVFS>;
++ clocks = <&cpg CPG_MOD 926>;
+ dmas = <&dmac0 0x77>, <&dmac0 0x78>,
+ <&dmac1 0x77>, <&dmac1 0x78>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -539,7 +539,7 @@
+ "renesas,rmobile-iic";
+ reg = <0 0xe6500000 0 0x425>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7791_CLK_IIC0>;
++ clocks = <&cpg CPG_MOD 318>;
+ dmas = <&dmac0 0x61>, <&dmac0 0x62>,
+ <&dmac1 0x61>, <&dmac1 0x62>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -554,7 +554,7 @@
+ "renesas,rmobile-iic";
+ reg = <0 0xe6510000 0 0x425>;
+ interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7791_CLK_IIC1>;
++ clocks = <&cpg CPG_MOD 323>;
+ dmas = <&dmac0 0x65>, <&dmac0 0x66>,
+ <&dmac1 0x65>, <&dmac1 0x66>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -571,7 +571,7 @@
+ compatible = "renesas,mmcif-r8a7791", "renesas,sh-mmcif";
+ reg = <0 0xee200000 0 0x80>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7791_CLK_MMCIF0>;
++ clocks = <&cpg CPG_MOD 315>;
+ dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
+ <&dmac1 0xd1>, <&dmac1 0xd2>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -585,7 +585,7 @@
+ compatible = "renesas,sdhi-r8a7791";
+ reg = <0 0xee100000 0 0x328>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7791_CLK_SDHI0>;
++ clocks = <&cpg CPG_MOD 314>;
+ dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+ <&dmac1 0xcd>, <&dmac1 0xce>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -598,7 +598,7 @@
+ compatible = "renesas,sdhi-r8a7791";
+ reg = <0 0xee140000 0 0x100>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7791_CLK_SDHI1>;
++ clocks = <&cpg CPG_MOD 312>;
+ dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
+ <&dmac1 0xc1>, <&dmac1 0xc2>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -611,7 +611,7 @@
+ compatible = "renesas,sdhi-r8a7791";
+ reg = <0 0xee160000 0 0x100>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7791_CLK_SDHI2>;
++ clocks = <&cpg CPG_MOD 311>;
+ dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
+ <&dmac1 0xd3>, <&dmac1 0xd4>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -625,7 +625,7 @@
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c40000 0 64>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7791_CLK_SCIFA0>;
++ clocks = <&cpg CPG_MOD 204>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x21>, <&dmac0 0x22>,
+ <&dmac1 0x21>, <&dmac1 0x22>;
+@@ -639,7 +639,7 @@
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c50000 0 64>;
+ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7791_CLK_SCIFA1>;
++ clocks = <&cpg CPG_MOD 203>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x25>, <&dmac0 0x26>,
+ <&dmac1 0x25>, <&dmac1 0x26>;
+@@ -653,7 +653,7 @@
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c60000 0 64>;
+ interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7791_CLK_SCIFA2>;
++ clocks = <&cpg CPG_MOD 202>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x27>, <&dmac0 0x28>,
+ <&dmac1 0x27>, <&dmac1 0x28>;
+@@ -667,7 +667,7 @@
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c70000 0 64>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp11_clks R8A7791_CLK_SCIFA3>;
++ clocks = <&cpg CPG_MOD 1106>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
+ <&dmac1 0x1b>, <&dmac1 0x1c>;
+@@ -681,7 +681,7 @@
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c78000 0 64>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp11_clks R8A7791_CLK_SCIFA4>;
++ clocks = <&cpg CPG_MOD 1107>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
+ <&dmac1 0x1f>, <&dmac1 0x20>;
+@@ -695,7 +695,7 @@
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+ reg = <0 0xe6c80000 0 64>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp11_clks R8A7791_CLK_SCIFA5>;
++ clocks = <&cpg CPG_MOD 1108>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x23>, <&dmac0 0x24>,
+ <&dmac1 0x23>, <&dmac1 0x24>;
+@@ -709,7 +709,7 @@
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c20000 0 0x100>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7791_CLK_SCIFB0>;
++ clocks = <&cpg CPG_MOD 206>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
+ <&dmac1 0x3d>, <&dmac1 0x3e>;
+@@ -723,7 +723,7 @@
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6c30000 0 0x100>;
+ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7791_CLK_SCIFB1>;
++ clocks = <&cpg CPG_MOD 207>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
+ <&dmac1 0x19>, <&dmac1 0x1a>;
+@@ -737,7 +737,7 @@
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+ reg = <0 0xe6ce0000 0 0x100>;
+ interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7791_CLK_SCIFB2>;
++ clocks = <&cpg CPG_MOD 216>;
+ clock-names = "fck";
+ dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
+ <&dmac1 0x1d>, <&dmac1 0x1e>;
+@@ -751,7 +751,7 @@
+ "renesas,scif";
+ reg = <0 0xe6e60000 0 64>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7791_CLK_SCIF0>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
+@@ -766,7 +766,7 @@
+ "renesas,scif";
+ reg = <0 0xe6e68000 0 64>;
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7791_CLK_SCIF1>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
+@@ -779,7 +779,7 @@
+ adc: adc@e6e54000 {
+ compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc";
+ reg = <0 0xe6e54000 0 64>;
+- clocks = <&mstp9_clks R8A7791_CLK_GYROADC>;
++ clocks = <&cpg CPG_MOD 901>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ status = "disabled";
+@@ -790,7 +790,7 @@
+ "renesas,scif";
+ reg = <0 0xe6e58000 0 64>;
+ interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7791_CLK_SCIF2>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
+@@ -805,7 +805,7 @@
+ "renesas,scif";
+ reg = <0 0xe6ea8000 0 64>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7791_CLK_SCIF3>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
+@@ -820,7 +820,7 @@
+ "renesas,scif";
+ reg = <0 0xe6ee0000 0 64>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7791_CLK_SCIF4>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
+@@ -835,7 +835,7 @@
+ "renesas,scif";
+ reg = <0 0xe6ee8000 0 64>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7791_CLK_SCIF5>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
+@@ -850,7 +850,7 @@
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c0000 0 96>;
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7791_CLK_HSCIF0>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
+@@ -865,7 +865,7 @@
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62c8000 0 96>;
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7791_CLK_HSCIF1>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
+@@ -880,7 +880,7 @@
+ "renesas,rcar-gen2-hscif", "renesas,hscif";
+ reg = <0 0xe62d0000 0 96>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7791_CLK_HSCIF2>, <&zs_clk>,
++ clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
+@@ -912,7 +912,7 @@
+ compatible = "renesas,ether-r8a7791";
+ reg = <0 0xee700000 0 0x400>;
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7791_CLK_ETHER>;
++ clocks = <&cpg CPG_MOD 813>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ phy-mode = "rmii";
+ #address-cells = <1>;
+@@ -925,7 +925,7 @@
+ "renesas,etheravb-rcar-gen2";
+ reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
+ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7791_CLK_ETHERAVB>;
++ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -936,7 +936,7 @@
+ compatible = "renesas,sata-r8a7791", "renesas,rcar-gen2-sata";
+ reg = <0 0xee300000 0 0x2000>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7791_CLK_SATA0>;
++ clocks = <&cpg CPG_MOD 815>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+@@ -945,7 +945,7 @@
+ compatible = "renesas,sata-r8a7791", "renesas,rcar-gen2-sata";
+ reg = <0 0xee500000 0 0x2000>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7791_CLK_SATA1>;
++ clocks = <&cpg CPG_MOD 814>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+@@ -954,7 +954,7 @@
+ compatible = "renesas,usbhs-r8a7791", "renesas,rcar-gen2-usbhs";
+ reg = <0 0xe6590000 0 0x100>;
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7791_CLK_HSUSB>;
++ clocks = <&cpg CPG_MOD 704>;
+ dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
+ <&usb_dmac1 0>, <&usb_dmac1 1>;
+ dma-names = "ch0", "ch1", "ch2", "ch3";
+@@ -971,7 +971,7 @@
+ reg = <0 0xe6590100 0 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+- clocks = <&mstp7_clks R8A7791_CLK_HSUSB>;
++ clocks = <&cpg CPG_MOD 704>;
+ clock-names = "usbhs";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ status = "disabled";
+@@ -990,7 +990,7 @@
+ compatible = "renesas,vin-r8a7791", "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef0000 0 0x1000>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7791_CLK_VIN0>;
++ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+@@ -999,7 +999,7 @@
+ compatible = "renesas,vin-r8a7791", "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef1000 0 0x1000>;
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7791_CLK_VIN1>;
++ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+@@ -1008,7 +1008,7 @@
+ compatible = "renesas,vin-r8a7791", "renesas,rcar-gen2-vin";
+ reg = <0 0xe6ef2000 0 0x1000>;
+ interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp8_clks R8A7791_CLK_VIN2>;
++ clocks = <&cpg CPG_MOD 809>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+@@ -1017,7 +1017,7 @@
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe928000 0 0x8000>;
+ interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp1_clks R8A7791_CLK_VSP1_S>;
++ clocks = <&cpg CPG_MOD 131>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ };
+
+@@ -1025,7 +1025,7 @@
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe930000 0 0x8000>;
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp1_clks R8A7791_CLK_VSP1_DU0>;
++ clocks = <&cpg CPG_MOD 128>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ };
+
+@@ -1033,7 +1033,7 @@
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe938000 0 0x8000>;
+ interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp1_clks R8A7791_CLK_VSP1_DU1>;
++ clocks = <&cpg CPG_MOD 127>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ };
+
+@@ -1044,9 +1044,9 @@
+ reg-names = "du", "lvds.0";
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7791_CLK_DU0>,
+- <&mstp7_clks R8A7791_CLK_DU1>,
+- <&mstp7_clks R8A7791_CLK_LVDS0>;
++ clocks = <&cpg CPG_MOD 724>,
++ <&cpg CPG_MOD 723>,
++ <&cpg CPG_MOD 726>;
+ clock-names = "du.0", "du.1", "lvds.0";
+ status = "disabled";
+
+@@ -1071,8 +1071,8 @@
+ compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can";
+ reg = <0 0xe6e80000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7791_CLK_RCAN0>,
+- <&cpg_clocks R8A7791_CLK_RCAN>, <&can_clk>;
++ clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7791_CLK_RCAN>,
++ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ status = "disabled";
+@@ -1082,8 +1082,8 @@
+ compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can";
+ reg = <0 0xe6e88000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7791_CLK_RCAN1>,
+- <&cpg_clocks R8A7791_CLK_RCAN>, <&can_clk>;
++ clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7791_CLK_RCAN>,
++ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ status = "disabled";
+@@ -1093,7 +1093,7 @@
+ compatible = "renesas,jpu-r8a7791", "renesas,rcar-gen2-jpu";
+ reg = <0 0xfe980000 0 0x10300>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp1_clks R8A7791_CLK_JPU>;
++ clocks = <&cpg CPG_MOD 106>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ };
+
+@@ -1160,368 +1160,14 @@
+ clock-frequency = <0>;
+ };
+
+- /* Special CPG clocks */
+- cpg_clocks: cpg_clocks@e6150000 {
+- compatible = "renesas,r8a7791-cpg-clocks",
+- "renesas,rcar-gen2-cpg-clocks";
++ cpg: clock-controller@e6150000 {
++ compatible = "renesas,r8a7791-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+- clocks = <&extal_clk &usb_extal_clk>;
+- #clock-cells = <1>;
+- clock-output-names = "main", "pll0", "pll1", "pll3",
+- "lb", "qspi", "sdh", "sd0", "z",
+- "rcan", "adsp";
++ clocks = <&extal_clk>, <&usb_extal_clk>;
++ clock-names = "extal", "usb_extal";
++ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ };
+-
+- /* Variable factor clocks */
+- sd2_clk: sd2@e6150078 {
+- compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
+- reg = <0 0xe6150078 0 4>;
+- clocks = <&pll1_div2_clk>;
+- #clock-cells = <0>;
+- };
+- sd3_clk: sd3@e615026c {
+- compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
+- reg = <0 0xe615026c 0 4>;
+- clocks = <&pll1_div2_clk>;
+- #clock-cells = <0>;
+- };
+- mmc0_clk: mmc0@e6150240 {
+- compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
+- reg = <0 0xe6150240 0 4>;
+- clocks = <&pll1_div2_clk>;
+- #clock-cells = <0>;
+- };
+- ssp_clk: ssp@e6150248 {
+- compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
+- reg = <0 0xe6150248 0 4>;
+- clocks = <&pll1_div2_clk>;
+- #clock-cells = <0>;
+- };
+- ssprs_clk: ssprs@e615024c {
+- compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
+- reg = <0 0xe615024c 0 4>;
+- clocks = <&pll1_div2_clk>;
+- #clock-cells = <0>;
+- };
+-
+- /* Fixed factor clocks */
+- pll1_div2_clk: pll1_div2 {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <2>;
+- clock-mult = <1>;
+- };
+- zg_clk: zg {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <3>;
+- clock-mult = <1>;
+- };
+- zx_clk: zx {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <3>;
+- clock-mult = <1>;
+- };
+- zs_clk: zs {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <6>;
+- clock-mult = <1>;
+- };
+- hp_clk: hp {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <12>;
+- clock-mult = <1>;
+- };
+- i_clk: i {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <2>;
+- clock-mult = <1>;
+- };
+- b_clk: b {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <12>;
+- clock-mult = <1>;
+- };
+- p_clk: p {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <24>;
+- clock-mult = <1>;
+- };
+- cl_clk: cl {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <48>;
+- clock-mult = <1>;
+- };
+- m2_clk: m2 {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <8>;
+- clock-mult = <1>;
+- };
+- rclk_clk: rclk {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <(48 * 1024)>;
+- clock-mult = <1>;
+- };
+- oscclk_clk: oscclk {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
+- #clock-cells = <0>;
+- clock-div = <(12 * 1024)>;
+- clock-mult = <1>;
+- };
+- zb3_clk: zb3 {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7791_CLK_PLL3>;
+- #clock-cells = <0>;
+- clock-div = <4>;
+- clock-mult = <1>;
+- };
+- zb3d2_clk: zb3d2 {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7791_CLK_PLL3>;
+- #clock-cells = <0>;
+- clock-div = <8>;
+- clock-mult = <1>;
+- };
+- ddr_clk: ddr {
+- compatible = "fixed-factor-clock";
+- clocks = <&cpg_clocks R8A7791_CLK_PLL3>;
+- #clock-cells = <0>;
+- clock-div = <8>;
+- clock-mult = <1>;
+- };
+- mp_clk: mp {
+- compatible = "fixed-factor-clock";
+- clocks = <&pll1_div2_clk>;
+- #clock-cells = <0>;
+- clock-div = <15>;
+- clock-mult = <1>;
+- };
+- cp_clk: cp {
+- compatible = "fixed-factor-clock";
+- clocks = <&extal_clk>;
+- #clock-cells = <0>;
+- clock-div = <2>;
+- clock-mult = <1>;
+- };
+-
+- /* Gate clocks */
+- mstp0_clks: mstp0_clks@e6150130 {
+- compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>;
+- clocks = <&mp_clk>;
+- #clock-cells = <1>;
+- clock-indices = <R8A7791_CLK_MSIOF0>;
+- clock-output-names = "msiof0";
+- };
+- mstp1_clks: mstp1_clks@e6150134 {
+- compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
+- clocks = <&zs_clk>, <&zs_clk>, <&m2_clk>, <&zs_clk>, <&p_clk>,
+- <&zg_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>,
+- <&p_clk>, <&rclk_clk>, <&cp_clk>, <&zs_clk>, <&zs_clk>,
+- <&zs_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7791_CLK_VCP0 R8A7791_CLK_VPC0 R8A7791_CLK_JPU
+- R8A7791_CLK_SSP1 R8A7791_CLK_TMU1 R8A7791_CLK_3DG
+- R8A7791_CLK_2DDMAC R8A7791_CLK_FDP1_1 R8A7791_CLK_FDP1_0
+- R8A7791_CLK_TMU3 R8A7791_CLK_TMU2 R8A7791_CLK_CMT0
+- R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1 R8A7791_CLK_VSP1_DU0
+- R8A7791_CLK_VSP1_S
+- >;
+- clock-output-names =
+- "vcp0", "vpc0", "jpu", "ssp1", "tmu1", "3dg",
+- "2ddmac", "fdp1-1", "fdp1-0", "tmu3", "tmu2", "cmt0",
+- "tmu0", "vsp1-du1", "vsp1-du0", "vsp1-sy";
+- };
+- mstp2_clks: mstp2_clks@e6150138 {
+- compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
+- clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
+- <&mp_clk>, <&mp_clk>, <&mp_clk>,
+- <&zs_clk>, <&zs_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7791_CLK_SCIFA2 R8A7791_CLK_SCIFA1 R8A7791_CLK_SCIFA0
+- R8A7791_CLK_MSIOF2 R8A7791_CLK_SCIFB0 R8A7791_CLK_SCIFB1
+- R8A7791_CLK_MSIOF1 R8A7791_CLK_SCIFB2
+- R8A7791_CLK_SYS_DMAC1 R8A7791_CLK_SYS_DMAC0
+- >;
+- clock-output-names =
+- "scifa2", "scifa1", "scifa0", "msiof2", "scifb0",
+- "scifb1", "msiof1", "scifb2",
+- "sys-dmac1", "sys-dmac0";
+- };
+- mstp3_clks: mstp3_clks@e615013c {
+- compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
+- clocks = <&cp_clk>, <&sd3_clk>, <&sd2_clk>, <&cpg_clocks R8A7791_CLK_SD0>,
+- <&mmc0_clk>, <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>,
+- <&hp_clk>, <&hp_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1 R8A7791_CLK_SDHI0
+- R8A7791_CLK_MMCIF0 R8A7791_CLK_IIC0 R8A7791_CLK_PCIEC R8A7791_CLK_IIC1
+- R8A7791_CLK_SSUSB R8A7791_CLK_CMT1
+- R8A7791_CLK_USBDMAC0 R8A7791_CLK_USBDMAC1
+- >;
+- clock-output-names =
+- "tpu0", "sdhi2", "sdhi1", "sdhi0",
+- "mmcif0", "i2c7", "pciec", "i2c8", "ssusb", "cmt1",
+- "usbdmac0", "usbdmac1";
+- };
+- mstp4_clks: mstp4_clks@e6150140 {
+- compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
+- clocks = <&cp_clk>, <&zs_clk>;
+- #clock-cells = <1>;
+- clock-indices = <R8A7791_CLK_IRQC R8A7791_CLK_INTC_SYS>;
+- clock-output-names = "irqc", "intc-sys";
+- };
+- mstp5_clks: mstp5_clks@e6150144 {
+- compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
+- clocks = <&hp_clk>, <&hp_clk>, <&cpg_clocks R8A7791_CLK_ADSP>,
+- <&extal_clk>, <&p_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7791_CLK_AUDIO_DMAC0 R8A7791_CLK_AUDIO_DMAC1
+- R8A7791_CLK_ADSP_MOD R8A7791_CLK_THERMAL
+- R8A7791_CLK_PWM
+- >;
+- clock-output-names = "audmac0", "audmac1", "adsp_mod",
+- "thermal", "pwm";
+- };
+- mstp7_clks: mstp7_clks@e615014c {
+- compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
+- clocks = <&mp_clk>, <&hp_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
+- <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
+- <&zx_clk>, <&zx_clk>, <&zx_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7791_CLK_EHCI R8A7791_CLK_HSUSB R8A7791_CLK_HSCIF2 R8A7791_CLK_SCIF5
+- R8A7791_CLK_SCIF4 R8A7791_CLK_HSCIF1 R8A7791_CLK_HSCIF0
+- R8A7791_CLK_SCIF3 R8A7791_CLK_SCIF2 R8A7791_CLK_SCIF1
+- R8A7791_CLK_SCIF0 R8A7791_CLK_DU1 R8A7791_CLK_DU0
+- R8A7791_CLK_LVDS0
+- >;
+- clock-output-names =
+- "ehci", "hsusb", "hscif2", "scif5", "scif4", "hscif1", "hscif0",
+- "scif3", "scif2", "scif1", "scif0", "du1", "du0", "lvds0";
+- };
+- mstp8_clks: mstp8_clks@e6150990 {
+- compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
+- clocks = <&zx_clk>, <&hp_clk>, <&zg_clk>, <&zg_clk>,
+- <&zg_clk>, <&hp_clk>, <&p_clk>, <&zs_clk>,
+- <&zs_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7791_CLK_IPMMU_SGX R8A7791_CLK_MLB
+- R8A7791_CLK_VIN2 R8A7791_CLK_VIN1 R8A7791_CLK_VIN0
+- R8A7791_CLK_ETHERAVB R8A7791_CLK_ETHER
+- R8A7791_CLK_SATA1 R8A7791_CLK_SATA0
+- >;
+- clock-output-names =
+- "ipmmu_sgx", "mlb", "vin2", "vin1", "vin0",
+- "etheravb", "ether", "sata1", "sata0";
+- };
+- mstp9_clks: mstp9_clks@e6150994 {
+- compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
+- clocks = <&p_clk>,
+- <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
+- <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
+- <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, <&hp_clk>,
+- <&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>,
+- <&hp_clk>, <&hp_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7791_CLK_GYROADC
+- R8A7791_CLK_GPIO7 R8A7791_CLK_GPIO6 R8A7791_CLK_GPIO5 R8A7791_CLK_GPIO4
+- R8A7791_CLK_GPIO3 R8A7791_CLK_GPIO2 R8A7791_CLK_GPIO1 R8A7791_CLK_GPIO0
+- R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD R8A7791_CLK_I2C5
+- R8A7791_CLK_IICDVFS R8A7791_CLK_I2C4 R8A7791_CLK_I2C3 R8A7791_CLK_I2C2
+- R8A7791_CLK_I2C1 R8A7791_CLK_I2C0
+- >;
+- clock-output-names =
+- "gyroadc",
+- "gpio7", "gpio6", "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0",
+- "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c6", "i2c4", "i2c3", "i2c2",
+- "i2c1", "i2c0";
+- };
+- mstp10_clks: mstp10_clks@e6150998 {
+- compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>;
+- clocks = <&p_clk>,
+- <&mstp10_clks R8A7791_CLK_SSI_ALL>, <&mstp10_clks R8A7791_CLK_SSI_ALL>,
+- <&mstp10_clks R8A7791_CLK_SSI_ALL>, <&mstp10_clks R8A7791_CLK_SSI_ALL>,
+- <&mstp10_clks R8A7791_CLK_SSI_ALL>, <&mstp10_clks R8A7791_CLK_SSI_ALL>,
+- <&mstp10_clks R8A7791_CLK_SSI_ALL>, <&mstp10_clks R8A7791_CLK_SSI_ALL>,
+- <&mstp10_clks R8A7791_CLK_SSI_ALL>, <&mstp10_clks R8A7791_CLK_SSI_ALL>,
+- <&p_clk>,
+- <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
+- <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
+- <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
+- <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
+- <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
+- <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
+- <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>;
+-
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7791_CLK_SSI_ALL
+- R8A7791_CLK_SSI9 R8A7791_CLK_SSI8 R8A7791_CLK_SSI7 R8A7791_CLK_SSI6 R8A7791_CLK_SSI5
+- R8A7791_CLK_SSI4 R8A7791_CLK_SSI3 R8A7791_CLK_SSI2 R8A7791_CLK_SSI1 R8A7791_CLK_SSI0
+- R8A7791_CLK_SCU_ALL
+- R8A7791_CLK_SCU_DVC1 R8A7791_CLK_SCU_DVC0
+- R8A7791_CLK_SCU_CTU1_MIX1 R8A7791_CLK_SCU_CTU0_MIX0
+- R8A7791_CLK_SCU_SRC9 R8A7791_CLK_SCU_SRC8 R8A7791_CLK_SCU_SRC7 R8A7791_CLK_SCU_SRC6 R8A7791_CLK_SCU_SRC5
+- R8A7791_CLK_SCU_SRC4 R8A7791_CLK_SCU_SRC3 R8A7791_CLK_SCU_SRC2 R8A7791_CLK_SCU_SRC1 R8A7791_CLK_SCU_SRC0
+- >;
+- clock-output-names =
+- "ssi-all",
+- "ssi9", "ssi8", "ssi7", "ssi6", "ssi5",
+- "ssi4", "ssi3", "ssi2", "ssi1", "ssi0",
+- "scu-all",
+- "scu-dvc1", "scu-dvc0",
+- "scu-ctu1-mix1", "scu-ctu0-mix0",
+- "scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5",
+- "scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0";
+- };
+- mstp11_clks: mstp11_clks@e615099c {
+- compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
+- reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>;
+- clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>;
+- #clock-cells = <1>;
+- clock-indices = <
+- R8A7791_CLK_SCIFA3 R8A7791_CLK_SCIFA4 R8A7791_CLK_SCIFA5
+- >;
+- clock-output-names = "scifa3", "scifa4", "scifa5";
+- };
+ };
+
+ rst: reset-controller@e6160000 {
+@@ -1544,7 +1190,7 @@
+ compatible = "renesas,qspi-r8a7791", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp9_clks R8A7791_CLK_QSPI_MOD>;
++ clocks = <&cpg CPG_MOD 917>;
+ dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -1560,7 +1206,7 @@
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e20000 0 0x0064>;
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
++ clocks = <&cpg CPG_MOD 000>;
+ dmas = <&dmac0 0x51>, <&dmac0 0x52>,
+ <&dmac1 0x51>, <&dmac1 0x52>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -1575,7 +1221,7 @@
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e10000 0 0x0064>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>;
++ clocks = <&cpg CPG_MOD 208>;
+ dmas = <&dmac0 0x55>, <&dmac0 0x56>,
+ <&dmac1 0x55>, <&dmac1 0x56>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -1590,7 +1236,7 @@
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e00000 0 0x0064>;
+ interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>;
++ clocks = <&cpg CPG_MOD 205>;
+ dmas = <&dmac0 0x41>, <&dmac0 0x42>,
+ <&dmac1 0x41>, <&dmac1 0x42>;
+ dma-names = "tx", "rx", "tx", "rx";
+@@ -1604,7 +1250,7 @@
+ compatible = "renesas,xhci-r8a7791", "renesas,rcar-gen2-xhci";
+ reg = <0 0xee000000 0 0xc00>;
+ interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7791_CLK_SSUSB>;
++ clocks = <&cpg CPG_MOD 328>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ phys = <&usb2 1>;
+ phy-names = "usb";
+@@ -1617,7 +1263,7 @@
+ reg = <0 0xee090000 0 0xc00>,
+ <0 0xee080000 0 0x1100>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7791_CLK_EHCI>;
++ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ status = "disabled";
+
+@@ -1650,7 +1296,7 @@
+ reg = <0 0xee0d0000 0 0xc00>,
+ <0 0xee0c0000 0 0x1100>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp7_clks R8A7791_CLK_EHCI>;
++ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ status = "disabled";
+
+@@ -1697,7 +1343,7 @@
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&mstp3_clks R8A7791_CLK_PCIEC>, <&pcie_bus_clk>;
++ clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
+ clock-names = "pcie", "pcie_bus";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ status = "disabled";
+@@ -1778,21 +1424,22 @@
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
+ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+
+- clocks = <&mstp10_clks R8A7791_CLK_SSI_ALL>,
+- <&mstp10_clks R8A7791_CLK_SSI9>, <&mstp10_clks R8A7791_CLK_SSI8>,
+- <&mstp10_clks R8A7791_CLK_SSI7>, <&mstp10_clks R8A7791_CLK_SSI6>,
+- <&mstp10_clks R8A7791_CLK_SSI5>, <&mstp10_clks R8A7791_CLK_SSI4>,
+- <&mstp10_clks R8A7791_CLK_SSI3>, <&mstp10_clks R8A7791_CLK_SSI2>,
+- <&mstp10_clks R8A7791_CLK_SSI1>, <&mstp10_clks R8A7791_CLK_SSI0>,
+- <&mstp10_clks R8A7791_CLK_SCU_SRC9>, <&mstp10_clks R8A7791_CLK_SCU_SRC8>,
+- <&mstp10_clks R8A7791_CLK_SCU_SRC7>, <&mstp10_clks R8A7791_CLK_SCU_SRC6>,
+- <&mstp10_clks R8A7791_CLK_SCU_SRC5>, <&mstp10_clks R8A7791_CLK_SCU_SRC4>,
+- <&mstp10_clks R8A7791_CLK_SCU_SRC3>, <&mstp10_clks R8A7791_CLK_SCU_SRC2>,
+- <&mstp10_clks R8A7791_CLK_SCU_SRC1>, <&mstp10_clks R8A7791_CLK_SCU_SRC0>,
+- <&mstp10_clks R8A7791_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7791_CLK_SCU_CTU1_MIX1>,
+- <&mstp10_clks R8A7791_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7791_CLK_SCU_CTU1_MIX1>,
+- <&mstp10_clks R8A7791_CLK_SCU_DVC0>, <&mstp10_clks R8A7791_CLK_SCU_DVC1>,
+- <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>;
++ clocks = <&cpg CPG_MOD 1005>,
++ <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
++ <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
++ <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
++ <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
++ <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
++ <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
++ <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
++ <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
++ <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
++ <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
++ <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
++ <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
++ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
++ <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
++ <&cpg CPG_CORE R8A7791_CLK_M2>;
+ clock-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
+ "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
+--
+2.19.0
+
diff --git a/patches/0319-ARM-dts-r8a7791-Stop-grouping-clocks-under-a-clocks-.patch b/patches/0319-ARM-dts-r8a7791-Stop-grouping-clocks-under-a-clocks-.patch
new file mode 100644
index 0000000..a59f6c8
--- /dev/null
+++ b/patches/0319-ARM-dts-r8a7791-Stop-grouping-clocks-under-a-clocks-.patch
@@ -0,0 +1,169 @@
+From 139ab80b673b34a956a4488712951c2465e23451 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 23 Aug 2017 13:59:26 +0200
+Subject: [PATCH 0319/1795] ARM: dts: r8a7791: Stop grouping clocks under a
+ "clocks" subnode
+
+The current practice is to not group clocks under a "clocks" subnode,
+but just put them together with the other on-SoC devices.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 580aa7cb473880213a55afdb5c34ae844fda07fb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7791.dtsi | 137 ++++++++++++++++-----------------
+ 1 file changed, 66 insertions(+), 71 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
+index 5fca397b722b..e984b106dd1a 100644
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -1097,77 +1097,72 @@
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ };
+
+- clocks {
+- #address-cells = <2>;
+- #size-cells = <2>;
+- ranges;
+-
+- /* External root clock */
+- extal_clk: extal {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- /* This value must be overriden by the board. */
+- clock-frequency = <0>;
+- };
+-
+- /*
+- * The external audio clocks are configured as 0 Hz fixed frequency clocks by
+- * default. Boards that provide audio clocks should override them.
+- */
+- audio_clk_a: audio_clk_a {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- clock-frequency = <0>;
+- };
+- audio_clk_b: audio_clk_b {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- clock-frequency = <0>;
+- };
+- audio_clk_c: audio_clk_c {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- clock-frequency = <0>;
+- };
+-
+- /* External PCIe clock - can be overridden by the board */
+- pcie_bus_clk: pcie_bus {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- clock-frequency = <0>;
+- };
+-
+- /* External SCIF clock */
+- scif_clk: scif {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- /* This value must be overridden by the board. */
+- clock-frequency = <0>;
+- };
+-
+- /* External USB clock - can be overridden by the board */
+- usb_extal_clk: usb_extal {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- clock-frequency = <48000000>;
+- };
+-
+- /* External CAN clock */
+- can_clk: can {
+- compatible = "fixed-clock";
+- #clock-cells = <0>;
+- /* This value must be overridden by the board. */
+- clock-frequency = <0>;
+- };
+-
+- cpg: clock-controller@e6150000 {
+- compatible = "renesas,r8a7791-cpg-mssr";
+- reg = <0 0xe6150000 0 0x1000>;
+- clocks = <&extal_clk>, <&usb_extal_clk>;
+- clock-names = "extal", "usb_extal";
+- #clock-cells = <2>;
+- #power-domain-cells = <0>;
+- };
++ /* External root clock */
++ extal_clk: extal {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ /* This value must be overridden by the board. */
++ clock-frequency = <0>;
++ };
++
++ /*
++ * The external audio clocks are configured as 0 Hz fixed frequency
++ * clocks by default.
++ * Boards that provide audio clocks should override them.
++ */
++ audio_clk_a: audio_clk_a {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <0>;
++ };
++ audio_clk_b: audio_clk_b {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <0>;
++ };
++ audio_clk_c: audio_clk_c {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <0>;
++ };
++
++ /* External PCIe clock - can be overridden by the board */
++ pcie_bus_clk: pcie_bus {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <0>;
++ };
++
++ /* External SCIF clock */
++ scif_clk: scif {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ /* This value must be overridden by the board. */
++ clock-frequency = <0>;
++ };
++
++ /* External USB clock - can be overridden by the board */
++ usb_extal_clk: usb_extal {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <48000000>;
++ };
++
++ /* External CAN clock */
++ can_clk: can {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ /* This value must be overridden by the board. */
++ clock-frequency = <0>;
++ };
++
++ cpg: clock-controller@e6150000 {
++ compatible = "renesas,r8a7791-cpg-mssr";
++ reg = <0 0xe6150000 0 0x1000>;
++ clocks = <&extal_clk>, <&usb_extal_clk>;
++ clock-names = "extal", "usb_extal";
++ #clock-cells = <2>;
++ #power-domain-cells = <0>;
+ };
+
+ rst: reset-controller@e6160000 {
+--
+2.19.0
+
diff --git a/patches/0320-ARM-dts-gr-peach-Remove-empty-line.patch b/patches/0320-ARM-dts-gr-peach-Remove-empty-line.patch
new file mode 100644
index 0000000..6c78b40
--- /dev/null
+++ b/patches/0320-ARM-dts-gr-peach-Remove-empty-line.patch
@@ -0,0 +1,32 @@
+From 4149d7af7e971e6b7c17bdcab274dff08fef8387 Mon Sep 17 00:00:00 2001
+From: Jacopo Mondi <jacopo+renesas@jmondi.org>
+Date: Thu, 24 Aug 2017 10:48:40 +0200
+Subject: [PATCH 0320/1795] ARM: dts: gr-peach: Remove empty line
+
+Remove an empty line in gr-peach device tree source file.
+
+Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
+Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit f7c68cdfebf6ad6b3c4d6b6c8966414219d035e3)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r7s72100-gr-peach.dts | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/r7s72100-gr-peach.dts b/arch/arm/boot/dts/r7s72100-gr-peach.dts
+index a1b2aef984f6..1c40a1afbd8e 100644
+--- a/arch/arm/boot/dts/r7s72100-gr-peach.dts
++++ b/arch/arm/boot/dts/r7s72100-gr-peach.dts
+@@ -28,7 +28,6 @@
+ memory@20000000 {
+ device_type = "memory";
+ reg = <0x20000000 0x00a00000>;
+-
+ };
+
+ lbsc {
+--
+2.19.0
+
diff --git a/patches/0321-ARM-dts-gr-peach-Add-SCIF2-pin-group.patch b/patches/0321-ARM-dts-gr-peach-Add-SCIF2-pin-group.patch
new file mode 100644
index 0000000..c171e0e
--- /dev/null
+++ b/patches/0321-ARM-dts-gr-peach-Add-SCIF2-pin-group.patch
@@ -0,0 +1,55 @@
+From dc4cc15dd69043c6531ea3c405dd336161d72b60 Mon Sep 17 00:00:00 2001
+From: Jacopo Mondi <jacopo+renesas@jmondi.org>
+Date: Thu, 24 Aug 2017 10:48:41 +0200
+Subject: [PATCH 0321/1795] ARM: dts: gr-peach: Add SCIF2 pin group
+
+Add pin configuration subnode for SCIF2 serial debug interface.
+
+Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 2f8be2d1dadb2b73a1c1ce244c88c509791f5cf2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r7s72100-gr-peach.dts | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r7s72100-gr-peach.dts b/arch/arm/boot/dts/r7s72100-gr-peach.dts
+index 1c40a1afbd8e..bcfa6445bbaa 100644
+--- a/arch/arm/boot/dts/r7s72100-gr-peach.dts
++++ b/arch/arm/boot/dts/r7s72100-gr-peach.dts
+@@ -11,6 +11,7 @@
+
+ /dts-v1/;
+ #include "r7s72100.dtsi"
++#include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
+
+ / {
+ model = "GR-Peach";
+@@ -52,6 +53,13 @@
+ };
+ };
+
++&pinctrl {
++ scif2_pins: serial2 {
++ /* P6_2 as RxD2; P6_3 as TxD2 */
++ pinmux = <RZA1_PINMUX(6, 2, 7)>, <RZA1_PINMUX(6, 3, 7)>;
++ };
++};
++
+ &extal_clk {
+ clock-frequency = <13333000>;
+ };
+@@ -61,5 +69,8 @@
+ };
+
+ &scif2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&scif2_pins>;
++
+ status = "okay";
+ };
+--
+2.19.0
+
diff --git a/patches/0322-ARM-dts-gr-peach-Add-user-led-device-nodes.patch b/patches/0322-ARM-dts-gr-peach-Add-user-led-device-nodes.patch
new file mode 100644
index 0000000..8cfccb4
--- /dev/null
+++ b/patches/0322-ARM-dts-gr-peach-Add-user-led-device-nodes.patch
@@ -0,0 +1,48 @@
+From a5c53a2a23dab16bab4e6618c346bb4635d671f1 Mon Sep 17 00:00:00 2001
+From: Jacopo Mondi <jacopo+renesas@jmondi.org>
+Date: Thu, 24 Aug 2017 10:48:43 +0200
+Subject: [PATCH 0322/1795] ARM: dts: gr-peach: Add user led device nodes
+
+Add device nodes for user leds on gr-peach board.
+
+Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit cfce5ac1aaf08fc0920d6572779360f80e8f3489)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r7s72100-gr-peach.dts | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r7s72100-gr-peach.dts b/arch/arm/boot/dts/r7s72100-gr-peach.dts
+index bcfa6445bbaa..13d745bb56a5 100644
+--- a/arch/arm/boot/dts/r7s72100-gr-peach.dts
++++ b/arch/arm/boot/dts/r7s72100-gr-peach.dts
+@@ -11,6 +11,7 @@
+
+ /dts-v1/;
+ #include "r7s72100.dtsi"
++#include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
+
+ / {
+@@ -51,6 +52,15 @@
+ reg = <0x00600000 0x00200000>;
+ };
+ };
++
++leds {
++ status = "okay";
++ compatible = "gpio-leds";
++
++ led1 {
++ gpios = <&port6 12 GPIO_ACTIVE_HIGH>;
++ };
++ };
+ };
+
+ &pinctrl {
+--
+2.19.0
+
diff --git a/patches/0323-ARM-dts-r8a7745-Add-Ethernet-AVB-support.patch b/patches/0323-ARM-dts-r8a7745-Add-Ethernet-AVB-support.patch
new file mode 100644
index 0000000..f1e7d9c
--- /dev/null
+++ b/patches/0323-ARM-dts-r8a7745-Add-Ethernet-AVB-support.patch
@@ -0,0 +1,43 @@
+From ccfeafb1a22c1b8151bfb2170bb5cc30b89a7879 Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Fri, 25 Aug 2017 09:31:53 +0100
+Subject: [PATCH 0323/1795] ARM: dts: r8a7745: Add Ethernet AVB support
+
+Add Ethernet AVB support for r8a7745 SoC.
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 372b01369fed699c417789ad94344847e09b7a43)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7745.dtsi | 13 +++++++++++++
+ 1 file changed, 13 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
+index 7fd2967b1f42..6e82991b7997 100644
+--- a/arch/arm/boot/dts/r8a7745.dtsi
++++ b/arch/arm/boot/dts/r8a7745.dtsi
+@@ -623,6 +623,19 @@
+ status = "disabled";
+ };
+
++ avb: ethernet@e6800000 {
++ compatible = "renesas,etheravb-r8a7745",
++ "renesas,etheravb-rcar-gen2";
++ reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
++ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 812>;
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ resets = <&cpg 812>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "disabled";
++ };
++
+ i2c0: i2c@e6508000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+--
+2.19.0
+
diff --git a/patches/0324-ARM-dts-iwg20d-q7-Add-chosen-node.patch b/patches/0324-ARM-dts-iwg20d-q7-Add-chosen-node.patch
new file mode 100644
index 0000000..12146e9
--- /dev/null
+++ b/patches/0324-ARM-dts-iwg20d-q7-Add-chosen-node.patch
@@ -0,0 +1,33 @@
+From 59455def98217aab1abe4a5b354b2b0b1c764aa8 Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Tue, 29 Aug 2017 10:56:22 +0100
+Subject: [PATCH 0324/1795] ARM: dts: iwg20d-q7: Add chosen node
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit f9c1e87e77ca1ef1c4de2d419b0dcb42e4a47043)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7743-iwg20d-q7.dts | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts b/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
+index 4ff27d23ecf0..e30c58625e65 100644
+--- a/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
++++ b/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
+@@ -20,6 +20,11 @@
+ ethernet0 = &avb;
+ };
+
++ chosen {
++ bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
++ stdout-path = "serial0:115200n8";
++ };
++
+ vcc_sdhi1: regulator-vcc-sdhi1 {
+ compatible = "regulator-fixed";
+
+--
+2.19.0
+
diff --git a/patches/0325-ARM-dts-iwg20d-q7-Add-RTC-support.patch b/patches/0325-ARM-dts-iwg20d-q7-Add-RTC-support.patch
new file mode 100644
index 0000000..5553a30
--- /dev/null
+++ b/patches/0325-ARM-dts-iwg20d-q7-Add-RTC-support.patch
@@ -0,0 +1,54 @@
+From 3b824ad388e614c4ee6852c7cd92a827304dbb50 Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Tue, 29 Aug 2017 10:56:23 +0100
+Subject: [PATCH 0325/1795] ARM: dts: iwg20d-q7: Add RTC support
+
+Define the iWave RainboW-G20D-Qseven board dependent part of the
+RTC device node.
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e0e63658c2f291e0672fdf96df1f9f2963a6a9f6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7743-iwg20d-q7.dts | 18 ++++++++++++++++++
+ 1 file changed, 18 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts b/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
+index e30c58625e65..2b58b53aa171 100644
+--- a/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
++++ b/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
+@@ -50,6 +50,11 @@
+ };
+
+ &pfc {
++ i2c2_pins: i2c2 {
++ groups = "i2c2";
++ function = "i2c2";
++ };
++
+ scif0_pins: scif0 {
+ groups = "scif0_data_d";
+ function = "scif0";
+@@ -107,3 +112,16 @@
+ sd-uhs-sdr50;
+ status = "okay";
+ };
++
++&i2c2 {
++ pinctrl-0 = <&i2c2_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++ clock-frequency = <400000>;
++
++ rtc@68 {
++ compatible = "ti,bq32000";
++ reg = <0x68>;
++ };
++};
+--
+2.19.0
+
diff --git a/patches/0326-ARM-dts-iwg22d-sodimm-Add-pinctl-support-for-scif4.patch b/patches/0326-ARM-dts-iwg22d-sodimm-Add-pinctl-support-for-scif4.patch
new file mode 100644
index 0000000..2fd4cc1
--- /dev/null
+++ b/patches/0326-ARM-dts-iwg22d-sodimm-Add-pinctl-support-for-scif4.patch
@@ -0,0 +1,41 @@
+From 0ac8320ef2b5606dca1af2593a07585f7ad71dbf Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Thu, 17 Aug 2017 16:09:09 +0100
+Subject: [PATCH 0326/1795] ARM: dts: iwg22d-sodimm: Add pinctl support for
+ scif4
+
+Adding pinctrl support for scif4 interface.
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 67dbb081815e013e1e7911305b43b44537a78ed2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+index cbc19feb1565..442a5cbb0838 100644
+--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
++++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+@@ -24,6 +24,16 @@
+ };
+ };
+
++&pfc {
++ scif4_pins: scif4 {
++ groups = "scif4_data_b";
++ function = "scif4";
++ };
++};
++
+ &scif4 {
++ pinctrl-0 = <&scif4_pins>;
++ pinctrl-names = "default";
++
+ status = "okay";
+ };
+--
+2.19.0
+
diff --git a/patches/0327-ARM-dts-iwg22d-sodimm-Add-Ethernet-AVB-support.patch b/patches/0327-ARM-dts-iwg22d-sodimm-Add-Ethernet-AVB-support.patch
new file mode 100644
index 0000000..05298a5
--- /dev/null
+++ b/patches/0327-ARM-dts-iwg22d-sodimm-Add-Ethernet-AVB-support.patch
@@ -0,0 +1,76 @@
+From 22c15495dd18dddaa0f62204f9e86b8978608b90 Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Wed, 30 Aug 2017 16:17:14 +0100
+Subject: [PATCH 0327/1795] ARM: dts: iwg22d-sodimm: Add Ethernet AVB support
+
+Define the iWave RainboW-G22D board dependent part of the Ethernet
+AVB device node.
+
+On some older versions of the platform (before R4.0) the phy address
+may be 1 or 3. The address is fixed to 3 for R4.0 onwards (which
+will be the first mainstream release), hence using 3 in the dts.
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d6ee805325b1d082fa33be3024163e5f7931ed54)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 26 +++++++++++++++++++++
+ 1 file changed, 26 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+index 442a5cbb0838..aac84c67a31d 100644
+--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
++++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+@@ -17,9 +17,11 @@
+
+ aliases {
+ serial0 = &scif4;
++ ethernet0 = &avb;
+ };
+
+ chosen {
++ bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
+ stdout-path = "serial0:115200n8";
+ };
+ };
+@@ -29,6 +31,11 @@
+ groups = "scif4_data_b";
+ function = "scif4";
+ };
++
++ avb_pins: avb {
++ groups = "avb_mdio", "avb_gmii";
++ function = "avb";
++ };
+ };
+
+ &scif4 {
+@@ -37,3 +44,22 @@
+
+ status = "okay";
+ };
++
++&avb {
++ pinctrl-0 = <&avb_pins>;
++ pinctrl-names = "default";
++
++ phy-handle = <&phy3>;
++ phy-mode = "gmii";
++ renesas,no-ether-link;
++ status = "okay";
++
++ phy3: ethernet-phy@3 {
++ /*
++ * On some older versions of the platform (before R4.0) the phy address
++ * may be 1 or 3. The address is fixed to 3 for R4.0 onwards.
++ */
++ reg = <3>;
++ micrel,led-mode = <1>;
++ };
++};
+--
+2.19.0
+
diff --git a/patches/0328-ARM-dts-r8a7743-Add-internal-PCI-bridge-nodes.patch b/patches/0328-ARM-dts-r8a7743-Add-internal-PCI-bridge-nodes.patch
new file mode 100644
index 0000000..4c40fa1
--- /dev/null
+++ b/patches/0328-ARM-dts-r8a7743-Add-internal-PCI-bridge-nodes.patch
@@ -0,0 +1,76 @@
+From e9dc72e3f9d279568911b7cb5aff4a9a34ccac51 Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Wed, 30 Aug 2017 14:41:09 +0100
+Subject: [PATCH 0328/1795] ARM: dts: r8a7743: Add internal PCI bridge nodes
+
+Add device nodes for the r8a7743 internal PCI bridge devices.
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 46d9cf5202fd8cd266748779c1a941aaeff0dcad)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7743.dtsi | 46 ++++++++++++++++++++++++++++++++++
+ 1 file changed, 46 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
+index 6dd9b0b3d818..3f1faad7c24f 100644
+--- a/arch/arm/boot/dts/r8a7743.dtsi
++++ b/arch/arm/boot/dts/r8a7743.dtsi
+@@ -821,6 +821,52 @@
+ resets = <&cpg 311>;
+ status = "disabled";
+ };
++
++ pci0: pci@ee090000 {
++ compatible = "renesas,pci-r8a7743",
++ "renesas,pci-rcar-gen2";
++ device_type = "pci";
++ reg = <0 0xee090000 0 0xc00>,
++ <0 0xee080000 0 0x1100>;
++ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 703>;
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ resets = <&cpg 703>;
++ status = "disabled";
++
++ bus-range = <0 0>;
++ #address-cells = <3>;
++ #size-cells = <2>;
++ #interrupt-cells = <1>;
++ ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
++ interrupt-map-mask = <0xff00 0 0 0x7>;
++ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
++ 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
++ 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
++ };
++
++ pci1: pci@ee0d0000 {
++ compatible = "renesas,pci-r8a7743",
++ "renesas,pci-rcar-gen2";
++ device_type = "pci";
++ reg = <0 0xee0d0000 0 0xc00>,
++ <0 0xee0c0000 0 0x1100>;
++ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 703>;
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ resets = <&cpg 703>;
++ status = "disabled";
++
++ bus-range = <1 1>;
++ #address-cells = <3>;
++ #size-cells = <2>;
++ #interrupt-cells = <1>;
++ ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
++ interrupt-map-mask = <0xff00 0 0 0x7>;
++ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
++ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
++ 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
++ };
+ };
+
+ /* External root clock */
+--
+2.19.0
+
diff --git a/patches/0329-ARM-dts-r8a7743-Add-USB-PHY-DT-support.patch b/patches/0329-ARM-dts-r8a7743-Add-USB-PHY-DT-support.patch
new file mode 100644
index 0000000..b4cdd40
--- /dev/null
+++ b/patches/0329-ARM-dts-r8a7743-Add-USB-PHY-DT-support.patch
@@ -0,0 +1,52 @@
+From 85f4fbdcfcd70b8b5d9090e12c07aa0d09e1e848 Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Wed, 30 Aug 2017 14:41:10 +0100
+Subject: [PATCH 0329/1795] ARM: dts: r8a7743: Add USB PHY DT support
+
+Define the r8a7743 generic part of the USB PHY device node.
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 9412c391af67fc8aa4e2d8975ba6143cd5289296)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7743.dtsi | 22 ++++++++++++++++++++++
+ 1 file changed, 22 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
+index 3f1faad7c24f..a81d70e713ea 100644
+--- a/arch/arm/boot/dts/r8a7743.dtsi
++++ b/arch/arm/boot/dts/r8a7743.dtsi
+@@ -822,6 +822,28 @@
+ status = "disabled";
+ };
+
++ usbphy: usb-phy@e6590100 {
++ compatible = "renesas,usb-phy-r8a7743",
++ "renesas,rcar-gen2-usb-phy";
++ reg = <0 0xe6590100 0 0x100>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++ clocks = <&cpg CPG_MOD 704>;
++ clock-names = "usbhs";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ resets = <&cpg 704>;
++ status = "disabled";
++
++ usb0: usb-channel@0 {
++ reg = <0>;
++ #phy-cells = <1>;
++ };
++ usb2: usb-channel@2 {
++ reg = <2>;
++ #phy-cells = <1>;
++ };
++ };
++
+ pci0: pci@ee090000 {
+ compatible = "renesas,pci-r8a7743",
+ "renesas,pci-rcar-gen2";
+--
+2.19.0
+
diff --git a/patches/0330-ARM-dts-r8a7743-Link-PCI-USB-devices-to-USB-PHY.patch b/patches/0330-ARM-dts-r8a7743-Link-PCI-USB-devices-to-USB-PHY.patch
new file mode 100644
index 0000000..6dbea13
--- /dev/null
+++ b/patches/0330-ARM-dts-r8a7743-Link-PCI-USB-devices-to-USB-PHY.patch
@@ -0,0 +1,62 @@
+From 8b68cd39a7aef64e7bc58dad5a207f2e1f226a87 Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Wed, 30 Aug 2017 14:41:11 +0100
+Subject: [PATCH 0330/1795] ARM: dts: r8a7743: Link PCI USB devices to USB PHY
+
+Describe the PCI USB devices that are behind the PCI bridges, adding
+necessary links to the USB PHY device.
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 96963454655c10663f1bc2eea57ac734cab171a7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7743.dtsi | 24 ++++++++++++++++++++++++
+ 1 file changed, 24 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
+index a81d70e713ea..665a5152951f 100644
+--- a/arch/arm/boot/dts/r8a7743.dtsi
++++ b/arch/arm/boot/dts/r8a7743.dtsi
+@@ -865,6 +865,18 @@
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
++
++ usb@1,0 {
++ reg = <0x800 0 0 0 0>;
++ phys = <&usb0 0>;
++ phy-names = "usb";
++ };
++
++ usb@2,0 {
++ reg = <0x1000 0 0 0 0>;
++ phys = <&usb0 0>;
++ phy-names = "usb";
++ };
+ };
+
+ pci1: pci@ee0d0000 {
+@@ -888,6 +900,18 @@
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
++
++ usb@1,0 {
++ reg = <0x10800 0 0 0 0>;
++ phys = <&usb2 0>;
++ phy-names = "usb";
++ };
++
++ usb@2,0 {
++ reg = <0x11000 0 0 0 0>;
++ phys = <&usb2 0>;
++ phy-names = "usb";
++ };
+ };
+ };
+
+--
+2.19.0
+
diff --git a/patches/0331-ARM-dts-iwg20d-q7-Enable-internal-PCI.patch b/patches/0331-ARM-dts-iwg20d-q7-Enable-internal-PCI.patch
new file mode 100644
index 0000000..66d5706
--- /dev/null
+++ b/patches/0331-ARM-dts-iwg20d-q7-Enable-internal-PCI.patch
@@ -0,0 +1,57 @@
+From d5ad76c95319d1951c1dca5ff88e0bcf7a1e62c3 Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Wed, 30 Aug 2017 14:41:12 +0100
+Subject: [PATCH 0331/1795] ARM: dts: iwg20d-q7: Enable internal PCI
+
+Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers
+attached to them.
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 35a8eeeac89c56435277fa76f8d557bf00530320)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7743-iwg20d-q7.dts | 22 ++++++++++++++++++++++
+ 1 file changed, 22 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts b/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
+index 2b58b53aa171..63166f9bdb65 100644
+--- a/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
++++ b/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
+@@ -76,6 +76,16 @@
+ function = "sdhi1";
+ power-source = <1800>;
+ };
++
++ usb0_pins: usb0 {
++ groups = "usb0";
++ function = "usb0";
++ };
++
++ usb1_pins: usb1 {
++ groups = "usb1";
++ function = "usb1";
++ };
+ };
+
+ &scif0 {
+@@ -125,3 +135,15 @@
+ reg = <0x68>;
+ };
+ };
++
++&pci0 {
++ status = "okay";
++ pinctrl-0 = <&usb0_pins>;
++ pinctrl-names = "default";
++};
++
++&pci1 {
++ status = "okay";
++ pinctrl-0 = <&usb1_pins>;
++ pinctrl-names = "default";
++};
+--
+2.19.0
+
diff --git a/patches/0332-ARM-dts-iwg20d-q7-Enable-USB-PHY.patch b/patches/0332-ARM-dts-iwg20d-q7-Enable-USB-PHY.patch
new file mode 100644
index 0000000..13d1347
--- /dev/null
+++ b/patches/0332-ARM-dts-iwg20d-q7-Enable-USB-PHY.patch
@@ -0,0 +1,29 @@
+From 922080e3220cd9c10aefc53ec5d78cc3a35e3770 Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Wed, 30 Aug 2017 14:41:13 +0100
+Subject: [PATCH 0332/1795] ARM: dts: iwg20d-q7: Enable USB PHY
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 51be0086e6d2ebb3f0ddbeedab8d7c4232c1c5f6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7743-iwg20d-q7.dts | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts b/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
+index 63166f9bdb65..0136864bc595 100644
+--- a/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
++++ b/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
+@@ -147,3 +147,7 @@
+ pinctrl-0 = <&usb1_pins>;
+ pinctrl-names = "default";
+ };
++
++&usbphy {
++ status = "okay";
++};
+--
+2.19.0
+
diff --git a/patches/0333-ARM-dts-alt-use-correct-logic-for-SD-WP-pins.patch b/patches/0333-ARM-dts-alt-use-correct-logic-for-SD-WP-pins.patch
new file mode 100644
index 0000000..b589626
--- /dev/null
+++ b/patches/0333-ARM-dts-alt-use-correct-logic-for-SD-WP-pins.patch
@@ -0,0 +1,42 @@
+From 40eeebc982025a35bdcbe92969a2199c7b260259 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Tue, 5 Sep 2017 19:26:31 +0200
+Subject: [PATCH 0333/1795] ARM: dts: alt: use correct logic for SD WP pins
+
+The WP pins are ACTIVE_HIGH, fix it in the DTS.
+
+Fixes: 2b41091b896b ("ARM: dts: alt: add SDHI0 and 1 support")
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit a2f74d0e655eac78dbbd4ade88ee08b1f8ec7ec1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7794-alt.dts | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts
+index e45f92b5eb11..bd98790d964e 100644
+--- a/arch/arm/boot/dts/r8a7794-alt.dts
++++ b/arch/arm/boot/dts/r8a7794-alt.dts
+@@ -304,7 +304,7 @@
+ vmmc-supply = <&vcc_sdhi0>;
+ vqmmc-supply = <&vccq_sdhi0>;
+ cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
+- wp-gpios = <&gpio6 7 GPIO_ACTIVE_LOW>;
++ wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ status = "okay";
+@@ -318,7 +318,7 @@
+ vmmc-supply = <&vcc_sdhi1>;
+ vqmmc-supply = <&vccq_sdhi1>;
+ cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
+- wp-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>;
++ wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
+ sd-uhs-sdr50;
+ status = "okay";
+ };
+--
+2.19.0
+
diff --git a/patches/0334-ARM-dts-r8a7743-Add-IIC-cores-to-dtsi.patch b/patches/0334-ARM-dts-r8a7743-Add-IIC-cores-to-dtsi.patch
new file mode 100644
index 0000000..52982ab
--- /dev/null
+++ b/patches/0334-ARM-dts-r8a7743-Add-IIC-cores-to-dtsi.patch
@@ -0,0 +1,91 @@
+From cfba28871dbb8060b20eacde7c0aee4383ca08da Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Wed, 6 Sep 2017 14:52:06 +0100
+Subject: [PATCH 0334/1795] ARM: dts: r8a7743: Add IIC cores to dtsi
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit f523405f2a22cc0c30701ea0cb3671dc0abbcda1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7743.dtsi | 55 ++++++++++++++++++++++++++++++++++
+ 1 file changed, 55 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
+index 665a5152951f..266c5eca9f74 100644
+--- a/arch/arm/boot/dts/r8a7743.dtsi
++++ b/arch/arm/boot/dts/r8a7743.dtsi
+@@ -25,6 +25,9 @@
+ i2c3 = &i2c3;
+ i2c4 = &i2c4;
+ i2c5 = &i2c5;
++ i2c6 = &iic0;
++ i2c7 = &iic1;
++ i2c8 = &iic3;
+ };
+
+ cpus {
+@@ -436,6 +439,58 @@
+ status = "disabled";
+ };
+
++ iic0: i2c@e6500000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,iic-r8a7743",
++ "renesas,rcar-gen2-iic",
++ "renesas,rmobile-iic";
++ reg = <0 0xe6500000 0 0x425>;
++ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 318>;
++ dmas = <&dmac0 0x61>, <&dmac0 0x62>,
++ <&dmac1 0x61>, <&dmac1 0x62>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ resets = <&cpg 318>;
++ status = "disabled";
++ };
++
++ iic1: i2c@e6510000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,iic-r8a7743",
++ "renesas,rcar-gen2-iic",
++ "renesas,rmobile-iic";
++ reg = <0 0xe6510000 0 0x425>;
++ interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 323>;
++ dmas = <&dmac0 0x65>, <&dmac0 0x66>,
++ <&dmac1 0x65>, <&dmac1 0x66>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ resets = <&cpg 323>;
++ status = "disabled";
++ };
++
++ iic3: i2c@e60b0000 {
++ /* doesn't need pinmux */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,iic-r8a7743",
++ "renesas,rcar-gen2-iic",
++ "renesas,rmobile-iic";
++ reg = <0 0xe60b0000 0 0x425>;
++ interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 926>;
++ dmas = <&dmac0 0x77>, <&dmac0 0x78>,
++ <&dmac1 0x77>, <&dmac1 0x78>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ resets = <&cpg 926>;
++ status = "disabled";
++ };
++
+ scifa0: serial@e6c40000 {
+ compatible = "renesas,scifa-r8a7743",
+ "renesas,rcar-gen2-scifa", "renesas,scifa";
+--
+2.19.0
+
diff --git a/patches/0335-ARM-dts-r8a7790-Add-reset-control-properties.patch b/patches/0335-ARM-dts-r8a7790-Add-reset-control-properties.patch
new file mode 100644
index 0000000..950ef62
--- /dev/null
+++ b/patches/0335-ARM-dts-r8a7790-Add-reset-control-properties.patch
@@ -0,0 +1,599 @@
+From 5e3cd4bd7cb68f2326c1537811b14131fd705b11 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 11 Sep 2017 15:09:55 +0200
+Subject: [PATCH 0335/1795] ARM: dts: r8a7790: Add reset control properties
+
+Add properties to describe the reset topology for on-SoC devices:
+ - Add the "#reset-cells" property to the CPG/MSSR device node,
+ - Add resets and reset-names properties to the various device nodes.
+
+This allows to reset SoC devices using the Reset Controller API.
+
+Note that resets usually match the corresponding module clocks.
+Exceptions are:
+ - The audio module has resets for the Serial Sound Interfaces only,
+ - The display module has only a single reset for all DU channels, but
+ adding reset properties for the display is postponed.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 34fbd2b12761d11166414ca766637c7e6bbb39d7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7790.dtsi | 76 ++++++++++++++++++++++++++++++++++
+ 1 file changed, 76 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
+index 70040c6c4cea..081cf5cdb13b 100644
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -188,6 +188,7 @@
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 408>;
+ };
+
+ gpio0: gpio@e6050000 {
+@@ -201,6 +202,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 912>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 912>;
+ };
+
+ gpio1: gpio@e6051000 {
+@@ -214,6 +216,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 911>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 911>;
+ };
+
+ gpio2: gpio@e6052000 {
+@@ -227,6 +230,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 910>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 910>;
+ };
+
+ gpio3: gpio@e6053000 {
+@@ -240,6 +244,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 909>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 909>;
+ };
+
+ gpio4: gpio@e6054000 {
+@@ -253,6 +258,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 908>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 908>;
+ };
+
+ gpio5: gpio@e6055000 {
+@@ -266,6 +272,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 907>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 907>;
+ };
+
+ thermal: thermal@e61f0000 {
+@@ -276,6 +283,7 @@
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 522>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 522>;
+ #thermal-sensor-cells = <0>;
+ };
+
+@@ -295,6 +303,7 @@
+ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 124>;
+
+ renesas,channels-mask = <0x60>;
+
+@@ -315,6 +324,7 @@
+ clocks = <&cpg CPG_MOD 329>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 329>;
+
+ renesas,channels-mask = <0xff>;
+
+@@ -332,6 +342,7 @@
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 407>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 407>;
+ };
+
+ dmac0: dma-controller@e6700000 {
+@@ -361,6 +372,7 @@
+ clocks = <&cpg CPG_MOD 219>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 219>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
+@@ -392,6 +404,7 @@
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 218>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
+@@ -421,6 +434,7 @@
+ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 502>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
+@@ -450,6 +464,7 @@
+ clocks = <&cpg CPG_MOD 501>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 501>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
+@@ -462,6 +477,7 @@
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 330>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 330>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+ };
+@@ -474,6 +490,7 @@
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 331>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 331>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+ };
+@@ -486,6 +503,7 @@
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 931>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 931>;
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+ };
+@@ -498,6 +516,7 @@
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 930>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 930>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
+@@ -510,6 +529,7 @@
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 929>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 929>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
+@@ -522,6 +542,7 @@
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 928>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 928>;
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+ };
+@@ -538,6 +559,7 @@
+ <&dmac1 0x61>, <&dmac1 0x62>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 318>;
+ status = "disabled";
+ };
+
+@@ -553,6 +575,7 @@
+ <&dmac1 0x65>, <&dmac1 0x66>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 323>;
+ status = "disabled";
+ };
+
+@@ -568,6 +591,7 @@
+ <&dmac1 0x69>, <&dmac1 0x6a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 300>;
+ status = "disabled";
+ };
+
+@@ -583,6 +607,7 @@
+ <&dmac1 0x77>, <&dmac1 0x78>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 926>;
+ status = "disabled";
+ };
+
+@@ -595,6 +620,7 @@
+ <&dmac1 0xd1>, <&dmac1 0xd2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 315>;
+ reg-io-width = <4>;
+ status = "disabled";
+ max-frequency = <97500000>;
+@@ -609,6 +635,7 @@
+ <&dmac1 0xe1>, <&dmac1 0xe2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 305>;
+ reg-io-width = <4>;
+ status = "disabled";
+ max-frequency = <97500000>;
+@@ -629,6 +656,7 @@
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <195000000>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 314>;
+ status = "disabled";
+ };
+
+@@ -642,6 +670,7 @@
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <195000000>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 313>;
+ status = "disabled";
+ };
+
+@@ -655,6 +684,7 @@
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 312>;
+ status = "disabled";
+ };
+
+@@ -668,6 +698,7 @@
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 311>;
+ status = "disabled";
+ };
+
+@@ -682,6 +713,7 @@
+ <&dmac1 0x21>, <&dmac1 0x22>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 204>;
+ status = "disabled";
+ };
+
+@@ -696,6 +728,7 @@
+ <&dmac1 0x25>, <&dmac1 0x26>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 203>;
+ status = "disabled";
+ };
+
+@@ -710,6 +743,7 @@
+ <&dmac1 0x27>, <&dmac1 0x28>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 202>;
+ status = "disabled";
+ };
+
+@@ -724,6 +758,7 @@
+ <&dmac1 0x3d>, <&dmac1 0x3e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 206>;
+ status = "disabled";
+ };
+
+@@ -738,6 +773,7 @@
+ <&dmac1 0x19>, <&dmac1 0x1a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 207>;
+ status = "disabled";
+ };
+
+@@ -752,6 +788,7 @@
+ <&dmac1 0x1d>, <&dmac1 0x1e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 216>;
+ status = "disabled";
+ };
+
+@@ -767,6 +804,7 @@
+ <&dmac1 0x29>, <&dmac1 0x2a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 721>;
+ status = "disabled";
+ };
+
+@@ -782,6 +820,7 @@
+ <&dmac1 0x2d>, <&dmac1 0x2e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 720>;
+ status = "disabled";
+ };
+
+@@ -797,6 +836,7 @@
+ <&dmac1 0x2b>, <&dmac1 0x2c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 310>;
+ status = "disabled";
+ };
+
+@@ -812,6 +852,7 @@
+ <&dmac1 0x39>, <&dmac1 0x3a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 717>;
+ status = "disabled";
+ };
+
+@@ -827,6 +868,7 @@
+ <&dmac1 0x4d>, <&dmac1 0x4e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 716>;
+ status = "disabled";
+ };
+
+@@ -854,6 +896,7 @@
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 813>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 813>;
+ phy-mode = "rmii";
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -867,6 +910,7 @@
+ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 812>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+@@ -878,6 +922,7 @@
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 815>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 815>;
+ status = "disabled";
+ };
+
+@@ -887,6 +932,7 @@
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 814>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 814>;
+ status = "disabled";
+ };
+
+@@ -899,6 +945,7 @@
+ <&usb_dmac1 0>, <&usb_dmac1 1>;
+ dma-names = "ch0", "ch1", "ch2", "ch3";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 704>;
+ renesas,buswait = <4>;
+ phys = <&usb0 1>;
+ phy-names = "usb";
+@@ -914,6 +961,7 @@
+ clocks = <&cpg CPG_MOD 704>;
+ clock-names = "usbhs";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 704>;
+ status = "disabled";
+
+ usb0: usb-channel@0 {
+@@ -932,6 +980,7 @@
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 811>;
+ status = "disabled";
+ };
+
+@@ -941,6 +990,7 @@
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 810>;
+ status = "disabled";
+ };
+
+@@ -950,6 +1000,7 @@
+ interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 809>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 809>;
+ status = "disabled";
+ };
+
+@@ -959,6 +1010,7 @@
+ interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 808>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 808>;
+ status = "disabled";
+ };
+
+@@ -968,6 +1020,7 @@
+ interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 130>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 130>;
+ };
+
+ vsp1@fe928000 {
+@@ -976,6 +1029,7 @@
+ interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 131>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 131>;
+ };
+
+ vsp1@fe930000 {
+@@ -984,6 +1038,7 @@
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 128>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 128>;
+ };
+
+ vsp1@fe938000 {
+@@ -992,6 +1047,7 @@
+ interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 127>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 127>;
+ };
+
+ du: display@feb00000 {
+@@ -1039,6 +1095,7 @@
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 916>;
+ status = "disabled";
+ };
+
+@@ -1050,6 +1107,7 @@
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 915>;
+ status = "disabled";
+ };
+
+@@ -1059,6 +1117,7 @@
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 106>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 106>;
+ };
+
+ /* External root clock */
+@@ -1154,6 +1213,7 @@
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 917>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -1170,6 +1230,7 @@
+ <&dmac1 0x51>, <&dmac1 0x52>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+@@ -1185,6 +1246,7 @@
+ <&dmac1 0x55>, <&dmac1 0x56>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 208>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+@@ -1200,6 +1262,7 @@
+ <&dmac1 0x41>, <&dmac1 0x42>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 205>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+@@ -1215,6 +1278,7 @@
+ <&dmac1 0x45>, <&dmac1 0x46>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 215>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+@@ -1226,6 +1290,7 @@
+ interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 328>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 328>;
+ phys = <&usb2 1>;
+ phy-names = "usb";
+ status = "disabled";
+@@ -1239,6 +1304,7 @@
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 703>;
+ status = "disabled";
+
+ bus-range = <0 0>;
+@@ -1272,6 +1338,7 @@
+ interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 703>;
+ status = "disabled";
+
+ bus-range = <1 1>;
+@@ -1290,6 +1357,7 @@
+ device_type = "pci";
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 703>;
+ reg = <0 0xee0d0000 0 0xc00>,
+ <0 0xee0c0000 0 0x1100>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+@@ -1341,6 +1409,7 @@
+ clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
+ clock-names = "pcie", "pcie_bus";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 319>;
+ status = "disabled";
+ };
+
+@@ -1385,6 +1454,13 @@
+ "dvc.0", "dvc.1",
+ "clk_a", "clk_b", "clk_c", "clk_i";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
++ resets = <&cpg 1005>,
++ <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
++ <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
++ <&cpg 1014>, <&cpg 1015>;
++ reset-names = "ssi-all",
++ "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
++ "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
+
+ status = "disabled";
+
+--
+2.19.0
+
diff --git a/patches/0336-ARM-dts-r8a7791-Add-reset-control-properties.patch b/patches/0336-ARM-dts-r8a7791-Add-reset-control-properties.patch
new file mode 100644
index 0000000..af213ad
--- /dev/null
+++ b/patches/0336-ARM-dts-r8a7791-Add-reset-control-properties.patch
@@ -0,0 +1,647 @@
+From 84c3c44910e17217284753e74ab8621686a7c947 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 11 Sep 2017 15:09:56 +0200
+Subject: [PATCH 0336/1795] ARM: dts: r8a7791: Add reset control properties
+
+Add properties to describe the reset topology for on-SoC devices:
+ - Add the "#reset-cells" property to the CPG/MSSR device node,
+ - Add resets and reset-names properties to the various device nodes.
+
+This allows to reset SoC devices using the Reset Controller API.
+
+Note that resets usually match the corresponding module clocks.
+Exceptions are:
+ - The audio module has resets for the Serial Sound Interfaces only,
+ - The display module has only a single reset for all DU channels, but
+ adding reset properties for the display is postponed.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit be5ae56e5f2d1f4eff1c2eca3d8e7d801085a6e2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7791.dtsi | 82 ++++++++++++++++++++++++++++++++++
+ 1 file changed, 82 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
+index e984b106dd1a..5a8a15847076 100644
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -120,6 +120,7 @@
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 408>;
+ };
+
+ gpio0: gpio@e6050000 {
+@@ -133,6 +134,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 912>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 912>;
+ };
+
+ gpio1: gpio@e6051000 {
+@@ -146,6 +148,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 911>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 911>;
+ };
+
+ gpio2: gpio@e6052000 {
+@@ -159,6 +162,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 910>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 910>;
+ };
+
+ gpio3: gpio@e6053000 {
+@@ -172,6 +176,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 909>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 909>;
+ };
+
+ gpio4: gpio@e6054000 {
+@@ -185,6 +190,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 908>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 908>;
+ };
+
+ gpio5: gpio@e6055000 {
+@@ -198,6 +204,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 907>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 907>;
+ };
+
+ gpio6: gpio@e6055400 {
+@@ -211,6 +218,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 905>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 905>;
+ };
+
+ gpio7: gpio@e6055800 {
+@@ -224,6 +232,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 904>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 904>;
+ };
+
+ thermal: thermal@e61f0000 {
+@@ -234,6 +243,7 @@
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 522>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 522>;
+ #thermal-sensor-cells = <0>;
+ };
+
+@@ -253,6 +263,7 @@
+ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 124>;
+
+ renesas,channels-mask = <0x60>;
+
+@@ -273,6 +284,7 @@
+ clocks = <&cpg CPG_MOD 329>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 329>;
+
+ renesas,channels-mask = <0xff>;
+
+@@ -296,6 +308,7 @@
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 407>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 407>;
+ };
+
+ dmac0: dma-controller@e6700000 {
+@@ -325,6 +338,7 @@
+ clocks = <&cpg CPG_MOD 219>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 219>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
+@@ -356,6 +370,7 @@
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 218>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
+@@ -385,6 +400,7 @@
+ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 502>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
+@@ -414,6 +430,7 @@
+ clocks = <&cpg CPG_MOD 501>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 501>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
+@@ -426,6 +443,7 @@
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 330>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 330>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+ };
+@@ -438,6 +456,7 @@
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 331>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 331>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+ };
+@@ -451,6 +470,7 @@
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 931>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 931>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
+@@ -463,6 +483,7 @@
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 930>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 930>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
+@@ -475,6 +496,7 @@
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 929>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 929>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
+@@ -487,6 +509,7 @@
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 928>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 928>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
+@@ -499,6 +522,7 @@
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 927>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 927>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
+@@ -512,6 +536,7 @@
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 925>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 925>;
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+ };
+@@ -529,6 +554,7 @@
+ <&dmac1 0x77>, <&dmac1 0x78>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 926>;
+ status = "disabled";
+ };
+
+@@ -544,6 +570,7 @@
+ <&dmac1 0x61>, <&dmac1 0x62>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 318>;
+ status = "disabled";
+ };
+
+@@ -559,6 +586,7 @@
+ <&dmac1 0x65>, <&dmac1 0x66>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 323>;
+ status = "disabled";
+ };
+
+@@ -576,6 +604,7 @@
+ <&dmac1 0xd1>, <&dmac1 0xd2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 315>;
+ reg-io-width = <4>;
+ status = "disabled";
+ max-frequency = <97500000>;
+@@ -591,6 +620,7 @@
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <195000000>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 314>;
+ status = "disabled";
+ };
+
+@@ -604,6 +634,7 @@
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 312>;
+ status = "disabled";
+ };
+
+@@ -617,6 +648,7 @@
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 311>;
+ status = "disabled";
+ };
+
+@@ -631,6 +663,7 @@
+ <&dmac1 0x21>, <&dmac1 0x22>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 204>;
+ status = "disabled";
+ };
+
+@@ -645,6 +678,7 @@
+ <&dmac1 0x25>, <&dmac1 0x26>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 203>;
+ status = "disabled";
+ };
+
+@@ -659,6 +693,7 @@
+ <&dmac1 0x27>, <&dmac1 0x28>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 202>;
+ status = "disabled";
+ };
+
+@@ -673,6 +708,7 @@
+ <&dmac1 0x1b>, <&dmac1 0x1c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 1106>;
+ status = "disabled";
+ };
+
+@@ -687,6 +723,7 @@
+ <&dmac1 0x1f>, <&dmac1 0x20>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 1107>;
+ status = "disabled";
+ };
+
+@@ -701,6 +738,7 @@
+ <&dmac1 0x23>, <&dmac1 0x24>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 1108>;
+ status = "disabled";
+ };
+
+@@ -715,6 +753,7 @@
+ <&dmac1 0x3d>, <&dmac1 0x3e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 206>;
+ status = "disabled";
+ };
+
+@@ -729,6 +768,7 @@
+ <&dmac1 0x19>, <&dmac1 0x1a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 207>;
+ status = "disabled";
+ };
+
+@@ -743,6 +783,7 @@
+ <&dmac1 0x1d>, <&dmac1 0x1e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 216>;
+ status = "disabled";
+ };
+
+@@ -758,6 +799,7 @@
+ <&dmac1 0x29>, <&dmac1 0x2a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 721>;
+ status = "disabled";
+ };
+
+@@ -773,6 +815,7 @@
+ <&dmac1 0x2d>, <&dmac1 0x2e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 720>;
+ status = "disabled";
+ };
+
+@@ -782,6 +825,7 @@
+ clocks = <&cpg CPG_MOD 901>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 901>;
+ status = "disabled";
+ };
+
+@@ -797,6 +841,7 @@
+ <&dmac1 0x2b>, <&dmac1 0x2c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 719>;
+ status = "disabled";
+ };
+
+@@ -812,6 +857,7 @@
+ <&dmac1 0x2f>, <&dmac1 0x30>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 718>;
+ status = "disabled";
+ };
+
+@@ -827,6 +873,7 @@
+ <&dmac1 0xfb>, <&dmac1 0xfc>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 715>;
+ status = "disabled";
+ };
+
+@@ -842,6 +889,7 @@
+ <&dmac1 0xfd>, <&dmac1 0xfe>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 714>;
+ status = "disabled";
+ };
+
+@@ -857,6 +905,7 @@
+ <&dmac1 0x39>, <&dmac1 0x3a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 717>;
+ status = "disabled";
+ };
+
+@@ -872,6 +921,7 @@
+ <&dmac1 0x4d>, <&dmac1 0x4e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 716>;
+ status = "disabled";
+ };
+
+@@ -887,6 +937,7 @@
+ <&dmac1 0x3b>, <&dmac1 0x3c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 713>;
+ status = "disabled";
+ };
+
+@@ -914,6 +965,7 @@
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 813>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 813>;
+ phy-mode = "rmii";
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -927,6 +979,7 @@
+ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 812>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+@@ -938,6 +991,7 @@
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 815>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 815>;
+ status = "disabled";
+ };
+
+@@ -947,6 +1001,7 @@
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 814>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 814>;
+ status = "disabled";
+ };
+
+@@ -959,6 +1014,7 @@
+ <&usb_dmac1 0>, <&usb_dmac1 1>;
+ dma-names = "ch0", "ch1", "ch2", "ch3";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 704>;
+ renesas,buswait = <4>;
+ phys = <&usb0 1>;
+ phy-names = "usb";
+@@ -974,6 +1030,7 @@
+ clocks = <&cpg CPG_MOD 704>;
+ clock-names = "usbhs";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 704>;
+ status = "disabled";
+
+ usb0: usb-channel@0 {
+@@ -992,6 +1049,7 @@
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 811>;
+ status = "disabled";
+ };
+
+@@ -1001,6 +1059,7 @@
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 810>;
+ status = "disabled";
+ };
+
+@@ -1010,6 +1069,7 @@
+ interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 809>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 809>;
+ status = "disabled";
+ };
+
+@@ -1019,6 +1079,7 @@
+ interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 131>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 131>;
+ };
+
+ vsp1@fe930000 {
+@@ -1027,6 +1088,7 @@
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 128>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 128>;
+ };
+
+ vsp1@fe938000 {
+@@ -1035,6 +1097,7 @@
+ interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 127>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 127>;
+ };
+
+ du: display@feb00000 {
+@@ -1075,6 +1138,7 @@
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 916>;
+ status = "disabled";
+ };
+
+@@ -1086,6 +1150,7 @@
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 915>;
+ status = "disabled";
+ };
+
+@@ -1095,6 +1160,7 @@
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 106>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 106>;
+ };
+
+ /* External root clock */
+@@ -1163,6 +1229,7 @@
+ clock-names = "extal", "usb_extal";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
++ #reset-cells = <1>;
+ };
+
+ rst: reset-controller@e6160000 {
+@@ -1190,6 +1257,7 @@
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 917>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -1206,6 +1274,7 @@
+ <&dmac1 0x51>, <&dmac1 0x52>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+@@ -1221,6 +1290,7 @@
+ <&dmac1 0x55>, <&dmac1 0x56>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 208>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+@@ -1236,6 +1306,7 @@
+ <&dmac1 0x41>, <&dmac1 0x42>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 205>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+@@ -1247,6 +1318,7 @@
+ interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 328>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 328>;
+ phys = <&usb2 1>;
+ phy-names = "usb";
+ status = "disabled";
+@@ -1260,6 +1332,7 @@
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 703>;
+ status = "disabled";
+
+ bus-range = <0 0>;
+@@ -1293,6 +1366,7 @@
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 703>;
+ status = "disabled";
+
+ bus-range = <1 1>;
+@@ -1341,6 +1415,7 @@
+ clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
+ clock-names = "pcie", "pcie_bus";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 319>;
+ status = "disabled";
+ };
+
+@@ -1445,6 +1520,13 @@
+ "dvc.0", "dvc.1",
+ "clk_a", "clk_b", "clk_c", "clk_i";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
++ resets = <&cpg 1005>,
++ <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
++ <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
++ <&cpg 1014>, <&cpg 1015>;
++ reset-names = "ssi-all",
++ "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
++ "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
+
+ status = "disabled";
+
+--
+2.19.0
+
diff --git a/patches/0337-ARM-dts-r8a7792-Add-reset-control-properties.patch b/patches/0337-ARM-dts-r8a7792-Add-reset-control-properties.patch
new file mode 100644
index 0000000..1442755
--- /dev/null
+++ b/patches/0337-ARM-dts-r8a7792-Add-reset-control-properties.patch
@@ -0,0 +1,394 @@
+From e62f4f75f422e7f3f05cb52b0894e6ab3a051aa9 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 11 Sep 2017 15:09:57 +0200
+Subject: [PATCH 0337/1795] ARM: dts: r8a7792: Add reset control properties
+
+Add properties to describe the reset topology for on-SoC devices:
+ - Add the "#reset-cells" property to the CPG/MSSR device node,
+ - Add resets and reset-names properties to the various device nodes.
+
+This allows to reset SoC devices using the Reset Controller API.
+
+Note that resets usually match the corresponding module clocks.
+Exceptions are:
+ - The audio module has resets for the Serial Sound Interfaces only,
+ but audio is not yet enabled in r8a7792.dtsi,
+ - The display module has only a single reset for all DU channels, but
+ adding reset properties for the display is postponed.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 6e11a322f1d7505d3a1db4ae26c6c0e46082f4ae)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7792.dtsi | 45 ++++++++++++++++++++++++++++++++++
+ 1 file changed, 45 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
+index a209787d899a..c332f77ebb6b 100644
+--- a/arch/arm/boot/dts/r8a7792.dtsi
++++ b/arch/arm/boot/dts/r8a7792.dtsi
+@@ -95,6 +95,7 @@
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 408>;
+ };
+
+ irqc: interrupt-controller@e61c0000 {
+@@ -108,6 +109,7 @@
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 407>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 407>;
+ };
+
+ timer {
+@@ -155,6 +157,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 912>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 912>;
+ };
+
+ gpio1: gpio@e6051000 {
+@@ -169,6 +172,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 911>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 911>;
+ };
+
+ gpio2: gpio@e6052000 {
+@@ -183,6 +187,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 910>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 910>;
+ };
+
+ gpio3: gpio@e6053000 {
+@@ -197,6 +202,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 909>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 909>;
+ };
+
+ gpio4: gpio@e6054000 {
+@@ -211,6 +217,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 908>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 908>;
+ };
+
+ gpio5: gpio@e6055000 {
+@@ -225,6 +232,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 907>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 907>;
+ };
+
+ gpio6: gpio@e6055100 {
+@@ -239,6 +247,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 905>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 905>;
+ };
+
+ gpio7: gpio@e6055200 {
+@@ -253,6 +262,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 904>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 904>;
+ };
+
+ gpio8: gpio@e6055300 {
+@@ -267,6 +277,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 921>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 921>;
+ };
+
+ gpio9: gpio@e6055400 {
+@@ -281,6 +292,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 919>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 919>;
+ };
+
+ gpio10: gpio@e6055500 {
+@@ -295,6 +307,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 914>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 914>;
+ };
+
+ gpio11: gpio@e6055600 {
+@@ -309,6 +322,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 913>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 913>;
+ };
+
+ dmac0: dma-controller@e6700000 {
+@@ -339,6 +353,7 @@
+ clocks = <&cpg CPG_MOD 219>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 219>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
+@@ -371,6 +386,7 @@
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 218>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
+@@ -387,6 +403,7 @@
+ <&dmac1 0x29>, <&dmac1 0x2a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 721>;
+ status = "disabled";
+ };
+
+@@ -402,6 +419,7 @@
+ <&dmac1 0x2d>, <&dmac1 0x2e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 720>;
+ status = "disabled";
+ };
+
+@@ -417,6 +435,7 @@
+ <&dmac1 0x2b>, <&dmac1 0x2c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 719>;
+ status = "disabled";
+ };
+
+@@ -432,6 +451,7 @@
+ <&dmac1 0x2f>, <&dmac1 0x30>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 718>;
+ status = "disabled";
+ };
+
+@@ -447,6 +467,7 @@
+ <&dmac1 0x39>, <&dmac1 0x3a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 717>;
+ status = "disabled";
+ };
+
+@@ -462,6 +483,7 @@
+ <&dmac1 0x4d>, <&dmac1 0x4e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 716>;
+ status = "disabled";
+ };
+
+@@ -492,6 +514,7 @@
+ dma-names = "tx", "rx", "tx", "rx";
+ clocks = <&cpg CPG_MOD 314>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 314>;
+ status = "disabled";
+ };
+
+@@ -502,6 +525,7 @@
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 106>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 106>;
+ };
+
+ avb: ethernet@e6800000 {
+@@ -511,6 +535,7 @@
+ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 812>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+@@ -524,6 +549,7 @@
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 931>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 931>;
+ i2c-scl-internal-delay-ns = <6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -537,6 +563,7 @@
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 930>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 930>;
+ i2c-scl-internal-delay-ns = <6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -550,6 +577,7 @@
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 929>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 929>;
+ i2c-scl-internal-delay-ns = <6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -563,6 +591,7 @@
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 928>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 928>;
+ i2c-scl-internal-delay-ns = <6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -576,6 +605,7 @@
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 927>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 927>;
+ i2c-scl-internal-delay-ns = <6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -589,6 +619,7 @@
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 925>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 925>;
+ i2c-scl-internal-delay-ns = <110>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -604,6 +635,7 @@
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 917>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -620,6 +652,7 @@
+ <&dmac1 0x51>, <&dmac1 0x52>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+@@ -635,6 +668,7 @@
+ <&dmac1 0x55>, <&dmac1 0x56>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 208>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+@@ -677,6 +711,7 @@
+ <&cpg CPG_CORE R8A7792_CLK_RCAN>, <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 916>;
+ status = "disabled";
+ };
+
+@@ -689,6 +724,7 @@
+ <&cpg CPG_CORE R8A7792_CLK_RCAN>, <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 915>;
+ status = "disabled";
+ };
+
+@@ -699,6 +735,7 @@
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 811>;
+ status = "disabled";
+ };
+
+@@ -709,6 +746,7 @@
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 810>;
+ status = "disabled";
+ };
+
+@@ -719,6 +757,7 @@
+ interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 809>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 809>;
+ status = "disabled";
+ };
+
+@@ -729,6 +768,7 @@
+ interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 808>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 808>;
+ status = "disabled";
+ };
+
+@@ -739,6 +779,7 @@
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 805>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 805>;
+ status = "disabled";
+ };
+
+@@ -749,6 +790,7 @@
+ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 804>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 804>;
+ status = "disabled";
+ };
+
+@@ -758,6 +800,7 @@
+ interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 131>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 131>;
+ };
+
+ vsp1@fe930000 {
+@@ -766,6 +809,7 @@
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 128>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 128>;
+ };
+
+ vsp1@fe938000 {
+@@ -774,6 +818,7 @@
+ interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 127>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ resets = <&cpg 127>;
+ };
+
+ cpg: clock-controller@e6150000 {
+--
+2.19.0
+
diff --git a/patches/0338-ARM-dts-r8a7793-Add-reset-control-properties.patch b/patches/0338-ARM-dts-r8a7793-Add-reset-control-properties.patch
new file mode 100644
index 0000000..6c3e5b8
--- /dev/null
+++ b/patches/0338-ARM-dts-r8a7793-Add-reset-control-properties.patch
@@ -0,0 +1,487 @@
+From d6753ef94cf17003c47bff19a7a867632d4ad40d Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 11 Sep 2017 15:09:58 +0200
+Subject: [PATCH 0338/1795] ARM: dts: r8a7793: Add reset control properties
+
+Add properties to describe the reset topology for on-SoC devices:
+ - Add the "#reset-cells" property to the CPG/MSSR device node,
+ - Add resets and reset-names properties to the various device nodes.
+
+This allows to reset SoC devices using the Reset Controller API.
+
+Note that resets usually match the corresponding module clocks.
+Exceptions are:
+ - The audio module has resets for the Serial Sound Interfaces only,
+ - The display module has only a single reset for all DU channels, but
+ adding reset properties for the display is postponed.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 84fb19e1d201ba862cf25995cdb7c061c9d938ea)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7793.dtsi | 62 ++++++++++++++++++++++++++++++++++
+ 1 file changed, 62 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
+index d48b97c853cd..aa19b93494bf 100644
+--- a/arch/arm/boot/dts/r8a7793.dtsi
++++ b/arch/arm/boot/dts/r8a7793.dtsi
+@@ -111,6 +111,7 @@
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 408>;
+ };
+
+ gpio0: gpio@e6050000 {
+@@ -124,6 +125,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 912>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 912>;
+ };
+
+ gpio1: gpio@e6051000 {
+@@ -137,6 +139,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 911>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 911>;
+ };
+
+ gpio2: gpio@e6052000 {
+@@ -150,6 +153,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 910>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 910>;
+ };
+
+ gpio3: gpio@e6053000 {
+@@ -163,6 +167,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 909>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 909>;
+ };
+
+ gpio4: gpio@e6054000 {
+@@ -176,6 +181,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 908>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 908>;
+ };
+
+ gpio5: gpio@e6055000 {
+@@ -189,6 +195,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 907>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 907>;
+ };
+
+ gpio6: gpio@e6055400 {
+@@ -202,6 +209,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 905>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 905>;
+ };
+
+ gpio7: gpio@e6055800 {
+@@ -215,6 +223,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 904>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 904>;
+ };
+
+ thermal: thermal@e61f0000 {
+@@ -225,6 +234,7 @@
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 522>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 522>;
+ #thermal-sensor-cells = <0>;
+ };
+
+@@ -244,6 +254,7 @@
+ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 124>;
+
+ renesas,channels-mask = <0x60>;
+
+@@ -264,6 +275,7 @@
+ clocks = <&cpg CPG_MOD 329>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 329>;
+
+ renesas,channels-mask = <0xff>;
+
+@@ -287,6 +299,7 @@
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 407>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 407>;
+ };
+
+ dmac0: dma-controller@e6700000 {
+@@ -316,6 +329,7 @@
+ clocks = <&cpg CPG_MOD 219>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 219>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
+@@ -347,6 +361,7 @@
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 218>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
+@@ -376,6 +391,7 @@
+ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 502>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
+@@ -405,6 +421,7 @@
+ clocks = <&cpg CPG_MOD 501>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 501>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
+@@ -418,6 +435,7 @@
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 931>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 931>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
+@@ -430,6 +448,7 @@
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 930>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 930>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
+@@ -442,6 +461,7 @@
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 929>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 929>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
+@@ -454,6 +474,7 @@
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 928>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 928>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
+@@ -466,6 +487,7 @@
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 927>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 927>;
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
+@@ -479,6 +501,7 @@
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 925>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 925>;
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+ };
+@@ -496,6 +519,7 @@
+ <&dmac1 0x77>, <&dmac1 0x78>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 926>;
+ status = "disabled";
+ };
+
+@@ -511,6 +535,7 @@
+ <&dmac1 0x61>, <&dmac1 0x62>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 318>;
+ status = "disabled";
+ };
+
+@@ -526,6 +551,7 @@
+ <&dmac1 0x65>, <&dmac1 0x66>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 323>;
+ status = "disabled";
+ };
+
+@@ -544,6 +570,7 @@
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <195000000>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 314>;
+ status = "disabled";
+ };
+
+@@ -557,6 +584,7 @@
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 312>;
+ status = "disabled";
+ };
+
+@@ -570,6 +598,7 @@
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 311>;
+ status = "disabled";
+ };
+
+@@ -582,6 +611,7 @@
+ <&dmac1 0xd1>, <&dmac1 0xd2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 315>;
+ reg-io-width = <4>;
+ status = "disabled";
+ max-frequency = <97500000>;
+@@ -598,6 +628,7 @@
+ <&dmac1 0x21>, <&dmac1 0x22>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 204>;
+ status = "disabled";
+ };
+
+@@ -612,6 +643,7 @@
+ <&dmac1 0x25>, <&dmac1 0x26>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 203>;
+ status = "disabled";
+ };
+
+@@ -626,6 +658,7 @@
+ <&dmac1 0x27>, <&dmac1 0x28>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 202>;
+ status = "disabled";
+ };
+
+@@ -640,6 +673,7 @@
+ <&dmac1 0x1b>, <&dmac1 0x1c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 1106>;
+ status = "disabled";
+ };
+
+@@ -654,6 +688,7 @@
+ <&dmac1 0x1f>, <&dmac1 0x20>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 1107>;
+ status = "disabled";
+ };
+
+@@ -668,6 +703,7 @@
+ <&dmac1 0x23>, <&dmac1 0x24>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 1108>;
+ status = "disabled";
+ };
+
+@@ -682,6 +718,7 @@
+ <&dmac1 0x3d>, <&dmac1 0x3e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 206>;
+ status = "disabled";
+ };
+
+@@ -696,6 +733,7 @@
+ <&dmac1 0x19>, <&dmac1 0x1a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 207>;
+ status = "disabled";
+ };
+
+@@ -710,6 +748,7 @@
+ <&dmac1 0x1d>, <&dmac1 0x1e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 216>;
+ status = "disabled";
+ };
+
+@@ -725,6 +764,7 @@
+ <&dmac1 0x29>, <&dmac1 0x2a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 721>;
+ status = "disabled";
+ };
+
+@@ -740,6 +780,7 @@
+ <&dmac1 0x2d>, <&dmac1 0x2e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 720>;
+ status = "disabled";
+ };
+
+@@ -755,6 +796,7 @@
+ <&dmac1 0x2b>, <&dmac1 0x2c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 719>;
+ status = "disabled";
+ };
+
+@@ -770,6 +812,7 @@
+ <&dmac1 0x2f>, <&dmac1 0x30>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 718>;
+ status = "disabled";
+ };
+
+@@ -785,6 +828,7 @@
+ <&dmac1 0xfb>, <&dmac1 0xfc>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 715>;
+ status = "disabled";
+ };
+
+@@ -800,6 +844,7 @@
+ <&dmac1 0xfd>, <&dmac1 0xfe>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 714>;
+ status = "disabled";
+ };
+
+@@ -815,6 +860,7 @@
+ <&dmac1 0x39>, <&dmac1 0x3a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 717>;
+ status = "disabled";
+ };
+
+@@ -830,6 +876,7 @@
+ <&dmac1 0x4d>, <&dmac1 0x4e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 716>;
+ status = "disabled";
+ };
+
+@@ -845,6 +892,7 @@
+ <&dmac1 0x3b>, <&dmac1 0x3c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 713>;
+ status = "disabled";
+ };
+
+@@ -872,6 +920,7 @@
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 813>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 813>;
+ phy-mode = "rmii";
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -884,6 +933,7 @@
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 811>;
+ status = "disabled";
+ };
+
+@@ -893,6 +943,7 @@
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 810>;
+ status = "disabled";
+ };
+
+@@ -902,6 +953,7 @@
+ interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 809>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 809>;
+ status = "disabled";
+ };
+
+@@ -914,6 +966,7 @@
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 917>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -958,6 +1011,7 @@
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 916>;
+ status = "disabled";
+ };
+
+@@ -969,6 +1023,7 @@
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 915>;
+ status = "disabled";
+ };
+
+@@ -1147,6 +1202,13 @@
+ "dvc.0", "dvc.1",
+ "clk_a", "clk_b", "clk_c", "clk_i";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ resets = <&cpg 1005>,
++ <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
++ <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
++ <&cpg 1014>, <&cpg 1015>;
++ reset-names = "ssi-all",
++ "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
++ "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
+
+ status = "disabled";
+
+--
+2.19.0
+
diff --git a/patches/0339-ARM-dts-r8a7794-Add-reset-control-properties.patch b/patches/0339-ARM-dts-r8a7794-Add-reset-control-properties.patch
new file mode 100644
index 0000000..e1491a3
--- /dev/null
+++ b/patches/0339-ARM-dts-r8a7794-Add-reset-control-properties.patch
@@ -0,0 +1,503 @@
+From 2ae20c8f260aff5923d844be0e0bd70b030b34f2 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 11 Sep 2017 15:09:59 +0200
+Subject: [PATCH 0339/1795] ARM: dts: r8a7794: Add reset control properties
+
+Add properties to describe the reset topology for on-SoC devices:
+ - Add the "#reset-cells" property to the CPG/MSSR device node,
+ - Add resets and reset-names properties to the various device nodes.
+
+This allows to reset SoC devices using the Reset Controller API.
+
+Note that resets usually match the corresponding module clocks.
+Exceptions are:
+ - The audio module has resets for the Serial Sound Interfaces only,
+ - The display module has only a single reset for all DU channels, but
+ adding reset properties for the display is postponed.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 615beb759ca494a4b1a202f571af41549064dc2f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7794.dtsi | 64 ++++++++++++++++++++++++++++++++++
+ 1 file changed, 64 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
+index a4c35d29f77c..035c33715b65 100644
+--- a/arch/arm/boot/dts/r8a7794.dtsi
++++ b/arch/arm/boot/dts/r8a7794.dtsi
+@@ -78,6 +78,7 @@
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 408>;
+ };
+
+ gpio0: gpio@e6050000 {
+@@ -91,6 +92,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 912>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 912>;
+ };
+
+ gpio1: gpio@e6051000 {
+@@ -104,6 +106,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 911>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 911>;
+ };
+
+ gpio2: gpio@e6052000 {
+@@ -117,6 +120,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 910>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 910>;
+ };
+
+ gpio3: gpio@e6053000 {
+@@ -130,6 +134,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 909>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 909>;
+ };
+
+ gpio4: gpio@e6054000 {
+@@ -143,6 +148,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 908>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 908>;
+ };
+
+ gpio5: gpio@e6055000 {
+@@ -156,6 +162,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 907>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 907>;
+ };
+
+ gpio6: gpio@e6055400 {
+@@ -169,6 +176,7 @@
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 905>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 905>;
+ };
+
+ cmt0: timer@ffca0000 {
+@@ -179,6 +187,7 @@
+ clocks = <&cpg CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 124>;
+
+ renesas,channels-mask = <0x60>;
+
+@@ -199,6 +208,7 @@
+ clocks = <&cpg CPG_MOD 329>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 329>;
+
+ renesas,channels-mask = <0xff>;
+
+@@ -230,6 +240,7 @@
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 407>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 407>;
+ };
+
+ pfc: pin-controller@e6060000 {
+@@ -264,6 +275,7 @@
+ clocks = <&cpg CPG_MOD 219>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 219>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
+@@ -295,6 +307,7 @@
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 218>;
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
+@@ -323,6 +336,7 @@
+ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 502>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
+@@ -338,6 +352,7 @@
+ <&dmac1 0x21>, <&dmac1 0x22>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 204>;
+ status = "disabled";
+ };
+
+@@ -352,6 +367,7 @@
+ <&dmac1 0x25>, <&dmac1 0x26>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 203>;
+ status = "disabled";
+ };
+
+@@ -366,6 +382,7 @@
+ <&dmac1 0x27>, <&dmac1 0x28>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 202>;
+ status = "disabled";
+ };
+
+@@ -380,6 +397,7 @@
+ <&dmac1 0x1b>, <&dmac1 0x1c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 1106>;
+ status = "disabled";
+ };
+
+@@ -394,6 +412,7 @@
+ <&dmac1 0x1f>, <&dmac1 0x20>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 1107>;
+ status = "disabled";
+ };
+
+@@ -408,6 +427,7 @@
+ <&dmac1 0x23>, <&dmac1 0x24>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 1108>;
+ status = "disabled";
+ };
+
+@@ -422,6 +442,7 @@
+ <&dmac1 0x3d>, <&dmac1 0x3e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 206>;
+ status = "disabled";
+ };
+
+@@ -436,6 +457,7 @@
+ <&dmac1 0x19>, <&dmac1 0x1a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 207>;
+ status = "disabled";
+ };
+
+@@ -450,6 +472,7 @@
+ <&dmac1 0x1d>, <&dmac1 0x1e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 216>;
+ status = "disabled";
+ };
+
+@@ -465,6 +488,7 @@
+ <&dmac1 0x29>, <&dmac1 0x2a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 721>;
+ status = "disabled";
+ };
+
+@@ -480,6 +504,7 @@
+ <&dmac1 0x2d>, <&dmac1 0x2e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 720>;
+ status = "disabled";
+ };
+
+@@ -495,6 +520,7 @@
+ <&dmac1 0x2b>, <&dmac1 0x2c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 719>;
+ status = "disabled";
+ };
+
+@@ -510,6 +536,7 @@
+ <&dmac1 0x2f>, <&dmac1 0x30>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 718>;
+ status = "disabled";
+ };
+
+@@ -525,6 +552,7 @@
+ <&dmac1 0xfb>, <&dmac1 0xfc>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 715>;
+ status = "disabled";
+ };
+
+@@ -540,6 +568,7 @@
+ <&dmac1 0xfd>, <&dmac1 0xfe>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 714>;
+ status = "disabled";
+ };
+
+@@ -555,6 +584,7 @@
+ <&dmac1 0x39>, <&dmac1 0x3a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 717>;
+ status = "disabled";
+ };
+
+@@ -570,6 +600,7 @@
+ <&dmac1 0x4d>, <&dmac1 0x4e>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 716>;
+ status = "disabled";
+ };
+
+@@ -585,6 +616,7 @@
+ <&dmac1 0x3b>, <&dmac1 0x3c>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 713>;
+ status = "disabled";
+ };
+
+@@ -612,6 +644,7 @@
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 813>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 813>;
+ phy-mode = "rmii";
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -625,6 +658,7 @@
+ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 812>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+@@ -637,6 +671,7 @@
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 931>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 931>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
+@@ -649,6 +684,7 @@
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 930>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 930>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
+@@ -661,6 +697,7 @@
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 929>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 929>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
+@@ -673,6 +710,7 @@
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 928>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 928>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
+@@ -685,6 +723,7 @@
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 927>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 927>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
+@@ -697,6 +736,7 @@
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 925>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 925>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-scl-internal-delay-ns = <6>;
+@@ -713,6 +753,7 @@
+ <&dmac1 0x61>, <&dmac1 0x62>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 318>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+@@ -728,6 +769,7 @@
+ <&dmac1 0x65>, <&dmac1 0x66>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 323>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+@@ -742,6 +784,7 @@
+ <&dmac1 0xd1>, <&dmac1 0xd2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 315>;
+ reg-io-width = <4>;
+ status = "disabled";
+ };
+@@ -756,6 +799,7 @@
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <195000000>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 314>;
+ status = "disabled";
+ };
+
+@@ -769,6 +813,7 @@
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 312>;
+ status = "disabled";
+ };
+
+@@ -782,6 +827,7 @@
+ dma-names = "tx", "rx", "tx", "rx";
+ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 311>;
+ status = "disabled";
+ };
+
+@@ -794,6 +840,7 @@
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 917>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -806,6 +853,7 @@
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 811>;
+ status = "disabled";
+ };
+
+@@ -815,6 +863,7 @@
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 810>;
+ status = "disabled";
+ };
+
+@@ -826,6 +875,7 @@
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 703>;
+ status = "disabled";
+
+ bus-range = <0 0>;
+@@ -859,6 +909,7 @@
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 703>;
+ status = "disabled";
+
+ bus-range = <1 1>;
+@@ -890,6 +941,7 @@
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 704>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 704>;
+ renesas,buswait = <4>;
+ phys = <&usb0 1>;
+ phy-names = "usb";
+@@ -905,6 +957,7 @@
+ clocks = <&cpg CPG_MOD 704>;
+ clock-names = "usbhs";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 704>;
+ status = "disabled";
+
+ usb0: usb-channel@0 {
+@@ -923,6 +976,7 @@
+ interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 131>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 131>;
+ };
+
+ vsp1@fe930000 {
+@@ -931,6 +985,7 @@
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 128>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 128>;
+ };
+
+ du: display@feb00000 {
+@@ -968,6 +1023,7 @@
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 916>;
+ status = "disabled";
+ };
+
+@@ -979,6 +1035,7 @@
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 915>;
+ status = "disabled";
+ };
+
+@@ -1151,6 +1208,13 @@
+ "dvc.0", "dvc.1",
+ "clk_a", "clk_b", "clk_c", "clk_i";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
++ resets = <&cpg 1005>,
++ <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
++ <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
++ <&cpg 1014>, <&cpg 1015>;
++ reset-names = "ssi-all",
++ "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
++ "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
+
+ status = "disabled";
+
+--
+2.19.0
+
diff --git a/patches/0340-ARM-dts-r8a7745-Add-SDHI-controllers.patch b/patches/0340-ARM-dts-r8a7745-Add-SDHI-controllers.patch
new file mode 100644
index 0000000..bc20b1d
--- /dev/null
+++ b/patches/0340-ARM-dts-r8a7745-Add-SDHI-controllers.patch
@@ -0,0 +1,73 @@
+From 62e948ac92001e98bbb8154e4fa9ce212daf3f3f Mon Sep 17 00:00:00 2001
+From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Date: Wed, 13 Sep 2017 18:05:35 +0100
+Subject: [PATCH 0340/1795] ARM: dts: r8a7745: Add SDHI controllers
+
+Add the SDHI controllers to the r8a7745 device tree.
+
+Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 7079131ef9b934df48602b22e30282d25a6a4827)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7745.dtsi | 42 ++++++++++++++++++++++++++++++++++
+ 1 file changed, 42 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
+index 6e82991b7997..adf30890cb07 100644
+--- a/arch/arm/boot/dts/r8a7745.dtsi
++++ b/arch/arm/boot/dts/r8a7745.dtsi
+@@ -735,6 +735,48 @@
+ max-frequency = <97500000>;
+ status = "disabled";
+ };
++
++ sdhi0: sd@ee100000 {
++ compatible = "renesas,sdhi-r8a7745";
++ reg = <0 0xee100000 0 0x328>;
++ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 314>;
++ dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
++ <&dmac1 0xcd>, <&dmac1 0xce>;
++ dma-names = "tx", "rx", "tx", "rx";
++ max-frequency = <195000000>;
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ resets = <&cpg 314>;
++ status = "disabled";
++ };
++
++ sdhi1: sd@ee140000 {
++ compatible = "renesas,sdhi-r8a7745";
++ reg = <0 0xee140000 0 0x100>;
++ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 312>;
++ dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
++ <&dmac1 0xc1>, <&dmac1 0xc2>;
++ dma-names = "tx", "rx", "tx", "rx";
++ max-frequency = <97500000>;
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ resets = <&cpg 312>;
++ status = "disabled";
++ };
++
++ sdhi2: sd@ee160000 {
++ compatible = "renesas,sdhi-r8a7745";
++ reg = <0 0xee160000 0 0x100>;
++ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 311>;
++ dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
++ <&dmac1 0xd3>, <&dmac1 0xd4>;
++ dma-names = "tx", "rx", "tx", "rx";
++ max-frequency = <97500000>;
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ resets = <&cpg 311>;
++ status = "disabled";
++ };
+ };
+
+ /* External root clock */
+--
+2.19.0
+
diff --git a/patches/0341-ARM-dts-iwg22m-Enable-SDHI1-controller.patch b/patches/0341-ARM-dts-iwg22m-Enable-SDHI1-controller.patch
new file mode 100644
index 0000000..d00d56c
--- /dev/null
+++ b/patches/0341-ARM-dts-iwg22m-Enable-SDHI1-controller.patch
@@ -0,0 +1,63 @@
+From 18f77d5f34bed83b8fa3622428b6c439e2bc6b71 Mon Sep 17 00:00:00 2001
+From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Date: Wed, 13 Sep 2017 18:05:36 +0100
+Subject: [PATCH 0341/1795] ARM: dts: iwg22m: Enable SDHI1 controller
+
+Enable the SDHI1 controller on iWave RZ/G1E SoM.
+
+Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 599114ee21057040c058043fdc1367878350d5e4)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7745-iwg22m.dtsi | 17 +++++++++++++++++
+ 1 file changed, 17 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
+index e306e7c5b644..f7f9ceff35a6 100644
+--- a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
++++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
+@@ -9,6 +9,7 @@
+ */
+
+ #include "r8a7745.dtsi"
++#include <dt-bindings/gpio/gpio.h>
+
+ / {
+ compatible = "iwave,g22m", "renesas,r8a7745";
+@@ -38,6 +39,12 @@
+ function = "mmc";
+ };
+
++ sdhi1_pins: sd1 {
++ groups = "sdhi1_data4", "sdhi1_ctrl";
++ function = "sdhi1";
++ power-source = <3300>;
++ };
++
+ i2c3_pins: i2c3 {
+ groups = "i2c3_b";
+ function = "i2c3";
+@@ -54,6 +61,16 @@
+ status = "okay";
+ };
+
++&sdhi1 {
++ pinctrl-0 = <&sdhi1_pins>;
++ pinctrl-names = "default";
++
++ vmmc-supply = <®_3p3v>;
++ vqmmc-supply = <®_3p3v>;
++ cd-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
++ status = "okay";
++};
++
+ &i2c3 {
+ pinctrl-0 = <&i2c3_pins>;
+ pinctrl-names = "default";
+--
+2.19.0
+
diff --git a/patches/0342-ARM-dts-r8a7743-Add-QSPI-support.patch b/patches/0342-ARM-dts-r8a7743-Add-QSPI-support.patch
new file mode 100644
index 0000000..5c6f85e
--- /dev/null
+++ b/patches/0342-ARM-dts-r8a7743-Add-QSPI-support.patch
@@ -0,0 +1,56 @@
+From b1748ab5423d0c637aef61b5a64729435eb131df Mon Sep 17 00:00:00 2001
+From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Date: Wed, 13 Sep 2017 18:05:38 +0100
+Subject: [PATCH 0342/1795] ARM: dts: r8a7743: Add QSPI support
+
+Add the DT node for the QSPI interface to the SoC dtsi.
+
+Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 450c03718e971880ae067dc5f94a86f961acd6c3)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7743.dtsi | 17 +++++++++++++++++
+ 1 file changed, 17 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
+index 266c5eca9f74..454f98060d6f 100644
+--- a/arch/arm/boot/dts/r8a7743.dtsi
++++ b/arch/arm/boot/dts/r8a7743.dtsi
+@@ -28,6 +28,7 @@
+ i2c6 = &iic0;
+ i2c7 = &iic1;
+ i2c8 = &iic3;
++ spi0 = &qspi;
+ };
+
+ cpus {
+@@ -835,6 +836,22 @@
+ status = "disabled";
+ };
+
++ qspi: spi@e6b10000 {
++ compatible = "renesas,qspi-r8a7743", "renesas,qspi";
++ reg = <0 0xe6b10000 0 0x2c>;
++ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 917>;
++ dmas = <&dmac0 0x17>, <&dmac0 0x18>,
++ <&dmac1 0x17>, <&dmac1 0x18>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ num-cs = <1>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++ resets = <&cpg 917>;
++ status = "disabled";
++ };
++
+ sdhi0: sd@ee100000 {
+ compatible = "renesas,sdhi-r8a7743";
+ reg = <0 0xee100000 0 0x328>;
+--
+2.19.0
+
diff --git a/patches/0343-ARM-dts-iwg20m-Add-SPI-NOR-support.patch b/patches/0343-ARM-dts-iwg20m-Add-SPI-NOR-support.patch
new file mode 100644
index 0000000..ec1a600
--- /dev/null
+++ b/patches/0343-ARM-dts-iwg20m-Add-SPI-NOR-support.patch
@@ -0,0 +1,66 @@
+From 54b96d62b5347afc9a76c0f3bfa1652c84d7cbe2 Mon Sep 17 00:00:00 2001
+From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Date: Wed, 13 Sep 2017 18:05:39 +0100
+Subject: [PATCH 0343/1795] ARM: dts: iwg20m: Add SPI NOR support
+
+Add support for the SPI NOR device used to boot up the system
+to the System on Module DT.
+
+Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 781e923a5fe4751d3aaa740ca3de0f9d179c34ef)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7743-iwg20m.dtsi | 26 ++++++++++++++++++++++++++
+ 1 file changed, 26 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7743-iwg20m.dtsi b/arch/arm/boot/dts/r8a7743-iwg20m.dtsi
+index 4119737cb883..75a8ca571846 100644
+--- a/arch/arm/boot/dts/r8a7743-iwg20m.dtsi
++++ b/arch/arm/boot/dts/r8a7743-iwg20m.dtsi
+@@ -44,6 +44,11 @@
+ function = "mmc";
+ };
+
++ qspi_pins: qspi {
++ groups = "qspi_ctrl", "qspi_data2";
++ function = "qspi";
++ };
++
+ sdhi0_pins: sd0 {
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
+@@ -61,6 +66,27 @@
+ status = "okay";
+ };
+
++&qspi {
++ pinctrl-0 = <&qspi_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++
++ /* WARNING - This device contains the bootloader. Handle with care. */
++ flash: flash@0 {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ compatible = "sst,sst25vf016b", "jedec,spi-nor";
++ reg = <0>;
++ spi-max-frequency = <50000000>;
++ spi-tx-bus-width = <1>;
++ spi-rx-bus-width = <1>;
++ m25p,fast-read;
++ spi-cpol;
++ spi-cpha;
++ };
++};
++
+ &sdhi0 {
+ pinctrl-0 = <&sdhi0_pins>;
+ pinctrl-names = "default";
+--
+2.19.0
+
diff --git a/patches/0344-ARM-dts-r8a7745-Add-QSPI-support.patch b/patches/0344-ARM-dts-r8a7745-Add-QSPI-support.patch
new file mode 100644
index 0000000..46d9e7a
--- /dev/null
+++ b/patches/0344-ARM-dts-r8a7745-Add-QSPI-support.patch
@@ -0,0 +1,56 @@
+From aff1f39acaf43c4d7b58995b86eadde0c14b6a31 Mon Sep 17 00:00:00 2001
+From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Date: Wed, 13 Sep 2017 18:05:40 +0100
+Subject: [PATCH 0344/1795] ARM: dts: r8a7745: Add QSPI support
+
+Add the DT node for the QSPI interface to the SoC dtsi.
+
+Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 2391d0269a85c3a7942cb7e2bbac5751a7191e10)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7745.dtsi | 17 +++++++++++++++++
+ 1 file changed, 17 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
+index adf30890cb07..5cc4009c4265 100644
+--- a/arch/arm/boot/dts/r8a7745.dtsi
++++ b/arch/arm/boot/dts/r8a7745.dtsi
+@@ -25,6 +25,7 @@
+ i2c3 = &i2c3;
+ i2c4 = &i2c4;
+ i2c5 = &i2c5;
++ spi0 = &qspi;
+ };
+
+ cpus {
+@@ -736,6 +737,22 @@
+ status = "disabled";
+ };
+
++ qspi: spi@e6b10000 {
++ compatible = "renesas,qspi-r8a7745", "renesas,qspi";
++ reg = <0 0xe6b10000 0 0x2c>;
++ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 917>;
++ dmas = <&dmac0 0x17>, <&dmac0 0x18>,
++ <&dmac1 0x17>, <&dmac1 0x18>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ num-cs = <1>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++ resets = <&cpg 917>;
++ status = "disabled";
++ };
++
+ sdhi0: sd@ee100000 {
+ compatible = "renesas,sdhi-r8a7745";
+ reg = <0 0xee100000 0 0x328>;
+--
+2.19.0
+
diff --git a/patches/0345-ARM-dts-iwg22m-Add-SPI-NOR-support.patch b/patches/0345-ARM-dts-iwg22m-Add-SPI-NOR-support.patch
new file mode 100644
index 0000000..38330f7
--- /dev/null
+++ b/patches/0345-ARM-dts-iwg22m-Add-SPI-NOR-support.patch
@@ -0,0 +1,66 @@
+From a3c122f22f9b1255d4e3dbc98949909bc278ad88 Mon Sep 17 00:00:00 2001
+From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Date: Wed, 13 Sep 2017 18:05:41 +0100
+Subject: [PATCH 0345/1795] ARM: dts: iwg22m: Add SPI NOR support
+
+Add support for the SPI NOR device used to boot up the system
+to the System on Module DT.
+
+Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit cf1cc6f1da41ceb60f6389b6b46f4f6dc06a2b63)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7745-iwg22m.dtsi | 26 ++++++++++++++++++++++++++
+ 1 file changed, 26 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
+index f7f9ceff35a6..ed9a8cf3fe36 100644
+--- a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
++++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
+@@ -39,6 +39,11 @@
+ function = "mmc";
+ };
+
++ qspi_pins: qspi {
++ groups = "qspi_ctrl", "qspi_data2";
++ function = "qspi";
++ };
++
+ sdhi1_pins: sd1 {
+ groups = "sdhi1_data4", "sdhi1_ctrl";
+ function = "sdhi1";
+@@ -61,6 +66,27 @@
+ status = "okay";
+ };
+
++&qspi {
++ pinctrl-0 = <&qspi_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++
++ /* WARNING - This device contains the bootloader. Handle with care. */
++ flash: flash@0 {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ compatible = "sst,sst25vf016b", "jedec,spi-nor";
++ reg = <0>;
++ spi-max-frequency = <50000000>;
++ spi-tx-bus-width = <1>;
++ spi-rx-bus-width = <1>;
++ m25p,fast-read;
++ spi-cpol;
++ spi-cpha;
++ };
++};
++
+ &sdhi1 {
+ pinctrl-0 = <&sdhi1_pins>;
+ pinctrl-names = "default";
+--
+2.19.0
+
diff --git a/patches/0346-ARM-dts-iwg22d-Enable-SDHI0-controller.patch b/patches/0346-ARM-dts-iwg22d-Enable-SDHI0-controller.patch
new file mode 100644
index 0000000..a889019
--- /dev/null
+++ b/patches/0346-ARM-dts-iwg22d-Enable-SDHI0-controller.patch
@@ -0,0 +1,72 @@
+From f96a74f32a325e943ef4eda618536a4bb18495e9 Mon Sep 17 00:00:00 2001
+From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Date: Fri, 22 Sep 2017 14:01:02 +0100
+Subject: [PATCH 0346/1795] ARM: dts: iwg22d: Enable SDHI0 controller
+
+Enable the SDHI0 controller on iWave RZ/G1E carrier board.
+
+Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit ec301d261d5a5a71f2ba1baf7a852b220fe69f3c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 29 +++++++++++++++++++++
+ 1 file changed, 29 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+index aac84c67a31d..8772c561e3a8 100644
+--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
++++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+@@ -24,6 +24,19 @@
+ bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
+ stdout-path = "serial0:115200n8";
+ };
++
++ vccq_sdhi0: regulator-vccq-sdhi0 {
++ compatible = "regulator-gpio";
++
++ regulator-name = "SDHI0 VccQ";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
++ gpios-states = <1>;
++ states = <3300000 1
++ 1800000 0>;
++ };
+ };
+
+ &pfc {
+@@ -36,6 +49,12 @@
+ groups = "avb_mdio", "avb_gmii";
+ function = "avb";
+ };
++
++ sdhi0_pins: sd0 {
++ groups = "sdhi0_data4", "sdhi0_ctrl";
++ function = "sdhi0";
++ power-source = <3300>;
++ };
+ };
+
+ &scif4 {
+@@ -63,3 +82,13 @@
+ micrel,led-mode = <1>;
+ };
+ };
++
++&sdhi0 {
++ pinctrl-0 = <&sdhi0_pins>;
++ pinctrl-names = "default";
++
++ vmmc-supply = <®_3p3v>;
++ vqmmc-supply = <&vccq_sdhi0>;
++ cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
++ status = "okay";
++};
+--
+2.19.0
+
diff --git a/patches/0347-ARM-dts-r8a7745-Add-MSIOF-012-support.patch b/patches/0347-ARM-dts-r8a7745-Add-MSIOF-012-support.patch
new file mode 100644
index 0000000..2bb0c59
--- /dev/null
+++ b/patches/0347-ARM-dts-r8a7745-Add-MSIOF-012-support.patch
@@ -0,0 +1,91 @@
+From 129f4bb964a8dadfb65f6d08d5d7d6f7eb1054fe Mon Sep 17 00:00:00 2001
+From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Date: Wed, 27 Sep 2017 10:57:05 +0100
+Subject: [PATCH 0347/1795] ARM: dts: r8a7745: Add MSIOF[012] support
+
+Add the DT nodes needed by MSIOF[012] interfaces to the SoC dtsi.
+Also, define aliases for spi[123].
+
+Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e527649c320062f53d8437d1a49b3ed4fccf7750)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7745.dtsi | 51 ++++++++++++++++++++++++++++++++++
+ 1 file changed, 51 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
+index 5cc4009c4265..6ba3b8b04edb 100644
+--- a/arch/arm/boot/dts/r8a7745.dtsi
++++ b/arch/arm/boot/dts/r8a7745.dtsi
+@@ -26,6 +26,9 @@
+ i2c4 = &i2c4;
+ i2c5 = &i2c5;
+ spi0 = &qspi;
++ spi1 = &msiof0;
++ spi2 = &msiof1;
++ spi3 = &msiof2;
+ };
+
+ cpus {
+@@ -753,6 +756,54 @@
+ status = "disabled";
+ };
+
++ msiof0: spi@e6e20000 {
++ compatible = "renesas,msiof-r8a7745",
++ "renesas,rcar-gen2-msiof";
++ reg = <0 0xe6e20000 0 0x0064>;
++ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 000>;
++ dmas = <&dmac0 0x51>, <&dmac0 0x52>,
++ <&dmac1 0x51>, <&dmac1 0x52>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++ resets = <&cpg 000>;
++ status = "disabled";
++ };
++
++ msiof1: spi@e6e10000 {
++ compatible = "renesas,msiof-r8a7745",
++ "renesas,rcar-gen2-msiof";
++ reg = <0 0xe6e10000 0 0x0064>;
++ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 208>;
++ dmas = <&dmac0 0x55>, <&dmac0 0x56>,
++ <&dmac1 0x55>, <&dmac1 0x56>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++ resets = <&cpg 208>;
++ status = "disabled";
++ };
++
++ msiof2: spi@e6e00000 {
++ compatible = "renesas,msiof-r8a7745",
++ "renesas,rcar-gen2-msiof";
++ reg = <0 0xe6e00000 0 0x0064>;
++ interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 205>;
++ dmas = <&dmac0 0x41>, <&dmac0 0x42>,
++ <&dmac1 0x41>, <&dmac1 0x42>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++ resets = <&cpg 205>;
++ status = "disabled";
++ };
++
+ sdhi0: sd@ee100000 {
+ compatible = "renesas,sdhi-r8a7745";
+ reg = <0 0xee100000 0 0x328>;
+--
+2.19.0
+
diff --git a/patches/0348-ARM-dts-r8a7743-Add-MSIOF-012-support.patch b/patches/0348-ARM-dts-r8a7743-Add-MSIOF-012-support.patch
new file mode 100644
index 0000000..1516c7a
--- /dev/null
+++ b/patches/0348-ARM-dts-r8a7743-Add-MSIOF-012-support.patch
@@ -0,0 +1,91 @@
+From 39ef217c9d3c09d6ec57e1a498a25529ebff823e Mon Sep 17 00:00:00 2001
+From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Date: Wed, 27 Sep 2017 10:57:04 +0100
+Subject: [PATCH 0348/1795] ARM: dts: r8a7743: Add MSIOF[012] support
+
+Add the DT nodes needed by MSIOF[012] interfaces to the SoC dtsi.
+Also, define aliases for spi[123].
+
+Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 7031a219f649d12acda8a70a4b6b816ee123c8e2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7743.dtsi | 51 ++++++++++++++++++++++++++++++++++
+ 1 file changed, 51 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
+index 454f98060d6f..d541fd9ffafb 100644
+--- a/arch/arm/boot/dts/r8a7743.dtsi
++++ b/arch/arm/boot/dts/r8a7743.dtsi
+@@ -29,6 +29,9 @@
+ i2c7 = &iic1;
+ i2c8 = &iic3;
+ spi0 = &qspi;
++ spi1 = &msiof0;
++ spi2 = &msiof1;
++ spi3 = &msiof2;
+ };
+
+ cpus {
+@@ -852,6 +855,54 @@
+ status = "disabled";
+ };
+
++ msiof0: spi@e6e20000 {
++ compatible = "renesas,msiof-r8a7743",
++ "renesas,rcar-gen2-msiof";
++ reg = <0 0xe6e20000 0 0x0064>;
++ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 000>;
++ dmas = <&dmac0 0x51>, <&dmac0 0x52>,
++ <&dmac1 0x51>, <&dmac1 0x52>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++ resets = <&cpg 000>;
++ status = "disabled";
++ };
++
++ msiof1: spi@e6e10000 {
++ compatible = "renesas,msiof-r8a7743",
++ "renesas,rcar-gen2-msiof";
++ reg = <0 0xe6e10000 0 0x0064>;
++ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 208>;
++ dmas = <&dmac0 0x55>, <&dmac0 0x56>,
++ <&dmac1 0x55>, <&dmac1 0x56>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++ resets = <&cpg 208>;
++ status = "disabled";
++ };
++
++ msiof2: spi@e6e00000 {
++ compatible = "renesas,msiof-r8a7743",
++ "renesas,rcar-gen2-msiof";
++ reg = <0 0xe6e00000 0 0x0064>;
++ interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 205>;
++ dmas = <&dmac0 0x41>, <&dmac0 0x42>,
++ <&dmac1 0x41>, <&dmac1 0x42>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++ resets = <&cpg 205>;
++ status = "disabled";
++ };
++
+ sdhi0: sd@ee100000 {
+ compatible = "renesas,sdhi-r8a7743";
+ reg = <0 0xee100000 0 0x328>;
+--
+2.19.0
+
diff --git a/patches/0349-ARM-dts-gr-peach-Fix-leds-node-name-indent.patch b/patches/0349-ARM-dts-gr-peach-Fix-leds-node-name-indent.patch
new file mode 100644
index 0000000..4a02284
--- /dev/null
+++ b/patches/0349-ARM-dts-gr-peach-Fix-leds-node-name-indent.patch
@@ -0,0 +1,32 @@
+From 197c7a96da0defc856f838edc5cb4db140911609 Mon Sep 17 00:00:00 2001
+From: Jacopo Mondi <jacopo+renesas@jmondi.org>
+Date: Thu, 5 Oct 2017 10:58:18 +0200
+Subject: [PATCH 0349/1795] ARM: dts: gr-peach: Fix 'leds' node name indent
+
+Fix 'leds' node name indent as it was wrongly aligned.
+
+Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 4f049e09d833dd9b8c2b0cf7a609d9fc5f9d6348)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r7s72100-gr-peach.dts | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/r7s72100-gr-peach.dts b/arch/arm/boot/dts/r7s72100-gr-peach.dts
+index 13d745bb56a5..a1c5e8823d2b 100644
+--- a/arch/arm/boot/dts/r7s72100-gr-peach.dts
++++ b/arch/arm/boot/dts/r7s72100-gr-peach.dts
+@@ -53,7 +53,7 @@
+ };
+ };
+
+-leds {
++ leds {
+ status = "okay";
+ compatible = "gpio-leds";
+
+--
+2.19.0
+
diff --git a/patches/0350-ARM-dts-gr-peach-Enable-MTU2-timer-pulse-unit.patch b/patches/0350-ARM-dts-gr-peach-Enable-MTU2-timer-pulse-unit.patch
new file mode 100644
index 0000000..31305c3
--- /dev/null
+++ b/patches/0350-ARM-dts-gr-peach-Enable-MTU2-timer-pulse-unit.patch
@@ -0,0 +1,38 @@
+From 8021ff1808756504b68aab234ba864e6a43218bd Mon Sep 17 00:00:00 2001
+From: Jacopo Mondi <jacopo+renesas@jmondi.org>
+Date: Thu, 5 Oct 2017 10:58:19 +0200
+Subject: [PATCH 0350/1795] ARM: dts: gr-peach: Enable MTU2 timer pulse unit
+
+MTU2 multi-function/multi-channel timer/counter is not enabled for
+GR-Peach board. The timer is used as clock event source to schedule
+wake-ups, and without this enabled all sleeps not performed through busy
+waiting hang the board.
+
+Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
+Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 62cea6d2c6758d6a9513ecf3c70498623d5bf1d2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r7s72100-gr-peach.dts | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r7s72100-gr-peach.dts b/arch/arm/boot/dts/r7s72100-gr-peach.dts
+index a1c5e8823d2b..9661d43f5236 100644
+--- a/arch/arm/boot/dts/r7s72100-gr-peach.dts
++++ b/arch/arm/boot/dts/r7s72100-gr-peach.dts
+@@ -78,6 +78,10 @@
+ clock-frequency = <48000000>;
+ };
+
++&mtu2 {
++ status = "okay";
++};
++
+ &scif2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&scif2_pins>;
+--
+2.19.0
+
diff --git a/patches/0351-ARM-dts-r8a7790-Use-generic-node-name-for-VSP1-nodes.patch b/patches/0351-ARM-dts-r8a7790-Use-generic-node-name-for-VSP1-nodes.patch
new file mode 100644
index 0000000..dbffab4
--- /dev/null
+++ b/patches/0351-ARM-dts-r8a7790-Use-generic-node-name-for-VSP1-nodes.patch
@@ -0,0 +1,60 @@
+From 5fe460c89a0e94f10c8f2c9c2a63459c80008082 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 4 Oct 2017 14:36:46 +0200
+Subject: [PATCH 0351/1795] ARM: dts: r8a7790: Use generic node name for VSP1
+ nodes
+
+Use the preferred generic node name instead of the specific name.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 9f77b4801944b6c74b871f9252e09177e273212c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7790.dtsi | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
+index 081cf5cdb13b..17a48199b7a9 100644
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -1014,7 +1014,7 @@
+ status = "disabled";
+ };
+
+- vsp1@fe920000 {
++ vsp@fe920000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe920000 0 0x8000>;
+ interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
+@@ -1023,7 +1023,7 @@
+ resets = <&cpg 130>;
+ };
+
+- vsp1@fe928000 {
++ vsp@fe928000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe928000 0 0x8000>;
+ interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+@@ -1032,7 +1032,7 @@
+ resets = <&cpg 131>;
+ };
+
+- vsp1@fe930000 {
++ vsp@fe930000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe930000 0 0x8000>;
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+@@ -1041,7 +1041,7 @@
+ resets = <&cpg 128>;
+ };
+
+- vsp1@fe938000 {
++ vsp@fe938000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe938000 0 0x8000>;
+ interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
+--
+2.19.0
+
diff --git a/patches/0352-ARM-dts-r8a7791-Use-generic-node-name-for-VSP1-nodes.patch b/patches/0352-ARM-dts-r8a7791-Use-generic-node-name-for-VSP1-nodes.patch
new file mode 100644
index 0000000..4be00dc
--- /dev/null
+++ b/patches/0352-ARM-dts-r8a7791-Use-generic-node-name-for-VSP1-nodes.patch
@@ -0,0 +1,51 @@
+From df30c9a8d7830eeb517dd6a036f0d66dee9de3da Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 4 Oct 2017 14:36:47 +0200
+Subject: [PATCH 0352/1795] ARM: dts: r8a7791: Use generic node name for VSP1
+ nodes
+
+Use the preferred generic node name instead of the specific name.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 18e5500c1510c844d5c3071f06089b638326bc52)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7791.dtsi | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
+index 5a8a15847076..97bed8253bc3 100644
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -1073,7 +1073,7 @@
+ status = "disabled";
+ };
+
+- vsp1@fe928000 {
++ vsp@fe928000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe928000 0 0x8000>;
+ interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+@@ -1082,7 +1082,7 @@
+ resets = <&cpg 131>;
+ };
+
+- vsp1@fe930000 {
++ vsp@fe930000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe930000 0 0x8000>;
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+@@ -1091,7 +1091,7 @@
+ resets = <&cpg 128>;
+ };
+
+- vsp1@fe938000 {
++ vsp@fe938000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe938000 0 0x8000>;
+ interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
+--
+2.19.0
+
diff --git a/patches/0353-ARM-dts-r8a7792-Use-generic-node-name-for-VSP1-nodes.patch b/patches/0353-ARM-dts-r8a7792-Use-generic-node-name-for-VSP1-nodes.patch
new file mode 100644
index 0000000..a3e84f8
--- /dev/null
+++ b/patches/0353-ARM-dts-r8a7792-Use-generic-node-name-for-VSP1-nodes.patch
@@ -0,0 +1,51 @@
+From f0c581605ab095ba6b5e08cd8958b78242ee7b01 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 4 Oct 2017 14:36:48 +0200
+Subject: [PATCH 0353/1795] ARM: dts: r8a7792: Use generic node name for VSP1
+ nodes
+
+Use the preferred generic node name instead of the specific name.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 2ea2e06cdac491cf254ce6221371a6993e7a46fb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7792.dtsi | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
+index c332f77ebb6b..549eafe8ff12 100644
+--- a/arch/arm/boot/dts/r8a7792.dtsi
++++ b/arch/arm/boot/dts/r8a7792.dtsi
+@@ -794,7 +794,7 @@
+ status = "disabled";
+ };
+
+- vsp1@fe928000 {
++ vsp@fe928000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe928000 0 0x8000>;
+ interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+@@ -803,7 +803,7 @@
+ resets = <&cpg 131>;
+ };
+
+- vsp1@fe930000 {
++ vsp@fe930000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe930000 0 0x8000>;
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+@@ -812,7 +812,7 @@
+ resets = <&cpg 128>;
+ };
+
+- vsp1@fe938000 {
++ vsp@fe938000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe938000 0 0x8000>;
+ interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
+--
+2.19.0
+
diff --git a/patches/0354-ARM-dts-r8a7794-Use-generic-node-name-for-VSP1-nodes.patch b/patches/0354-ARM-dts-r8a7794-Use-generic-node-name-for-VSP1-nodes.patch
new file mode 100644
index 0000000..2f543d6
--- /dev/null
+++ b/patches/0354-ARM-dts-r8a7794-Use-generic-node-name-for-VSP1-nodes.patch
@@ -0,0 +1,42 @@
+From 2bc2d1aba4fbf74f4d0b5d0c11952c0c84838395 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 4 Oct 2017 14:36:49 +0200
+Subject: [PATCH 0354/1795] ARM: dts: r8a7794: Use generic node name for VSP1
+ nodes
+
+Use the preferred generic node name instead of the specific name.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 8b40ea19233cc53f9d5d33a44d6fc833a765bab2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7794.dtsi | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
+index 035c33715b65..19cff0dd90cf 100644
+--- a/arch/arm/boot/dts/r8a7794.dtsi
++++ b/arch/arm/boot/dts/r8a7794.dtsi
+@@ -970,7 +970,7 @@
+ };
+ };
+
+- vsp1@fe928000 {
++ vsp@fe928000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe928000 0 0x8000>;
+ interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+@@ -979,7 +979,7 @@
+ resets = <&cpg 131>;
+ };
+
+- vsp1@fe930000 {
++ vsp@fe930000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe930000 0 0x8000>;
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+--
+2.19.0
+
diff --git a/patches/0355-ARM-dts-iwg20d-q7-Rework-DT-architecture.patch b/patches/0355-ARM-dts-iwg20d-q7-Rework-DT-architecture.patch
new file mode 100644
index 0000000..608c17b
--- /dev/null
+++ b/patches/0355-ARM-dts-iwg20d-q7-Rework-DT-architecture.patch
@@ -0,0 +1,354 @@
+From 16762b33fc60038d19a2bd2bc712ecb003b0e609 Mon Sep 17 00:00:00 2001
+From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Date: Fri, 6 Oct 2017 18:59:52 +0100
+Subject: [PATCH 0355/1795] ARM: dts: iwg20d-q7: Rework DT architecture
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Since the same carrier board may host RZ/G1M and RZ/G1N based
+Systems on Module, the DT architecture for iwg20d-q7 needs
+better decoupling. This patch provides:
+* iwg20d-q7-common.dtsi - its purpose is to define the carrier
+ board definitions, and its content is basically the same
+ as the previous version of r8a7743-iwg20d-q7.dts, only it
+ has no reference to the SoM .dtsi, and that's why the
+ filename doesn't mention the SoC name any more.
+* r8a7743-iwg20d-q7.dts - its new purpose is to put together
+ the SoM .dtsi (r8a7743-iwg20m.dtsi) and the carrier board
+ .dtsi defined by this very patch, along with "model" and
+ "compatible" properties.
+The final DT architecture to describe the board is now:
+r8a7743-iwg20d-q7.dts # Carrier Board + SoM
+├── r8a7743-iwg20m.dtsi # SoM
+│ └── r8a7743.dtsi # SoC
+└── iwg20d-q7-common.dtsi # Carrier Board
+and maximizes the reuse of the definitions for the carrier board
+and for the SoM.
+
+Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 4f0b2563c4c0c67fc5b5e2369d5f62f91abc42e7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/iwg20d-q7-common.dtsi | 147 ++++++++++++++++++++++++
+ arch/arm/boot/dts/r8a7743-iwg20d-q7.dts | 139 +---------------------
+ 2 files changed, 149 insertions(+), 137 deletions(-)
+ create mode 100644 arch/arm/boot/dts/iwg20d-q7-common.dtsi
+
+diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+new file mode 100644
+index 000000000000..1c072c0a4888
+--- /dev/null
++++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+@@ -0,0 +1,147 @@
++/*
++ * Device Tree Source for the iWave-RZ/G1M/G1N Qseven carrier board
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++/ {
++ aliases {
++ serial0 = &scif0;
++ ethernet0 = &avb;
++ };
++
++ chosen {
++ bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
++ stdout-path = "serial0:115200n8";
++ };
++
++ vcc_sdhi1: regulator-vcc-sdhi1 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "SDHI1 Vcc";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&gpio1 16 GPIO_ACTIVE_LOW>;
++ };
++
++ vccq_sdhi1: regulator-vccq-sdhi1 {
++ compatible = "regulator-gpio";
++
++ regulator-name = "SDHI1 VccQ";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
++ gpios-states = <1>;
++ states = <3300000 1
++ 1800000 0>;
++ };
++};
++
++&avb {
++ pinctrl-0 = <&avb_pins>;
++ pinctrl-names = "default";
++
++ phy-handle = <&phy3>;
++ phy-mode = "gmii";
++ renesas,no-ether-link;
++ status = "okay";
++
++ phy3: ethernet-phy@3 {
++ reg = <3>;
++ micrel,led-mode = <1>;
++ };
++};
++
++&i2c2 {
++ pinctrl-0 = <&i2c2_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++ clock-frequency = <400000>;
++
++ rtc@68 {
++ compatible = "ti,bq32000";
++ reg = <0x68>;
++ };
++};
++
++&pci0 {
++ status = "okay";
++ pinctrl-0 = <&usb0_pins>;
++ pinctrl-names = "default";
++};
++
++&pci1 {
++ status = "okay";
++ pinctrl-0 = <&usb1_pins>;
++ pinctrl-names = "default";
++};
++
++&pfc {
++ avb_pins: avb {
++ groups = "avb_mdio", "avb_gmii";
++ function = "avb";
++ };
++
++ i2c2_pins: i2c2 {
++ groups = "i2c2";
++ function = "i2c2";
++ };
++
++ scif0_pins: scif0 {
++ groups = "scif0_data_d";
++ function = "scif0";
++ };
++
++ sdhi1_pins: sd1 {
++ groups = "sdhi1_data4", "sdhi1_ctrl";
++ function = "sdhi1";
++ power-source = <3300>;
++ };
++
++ sdhi1_pins_uhs: sd1_uhs {
++ groups = "sdhi1_data4", "sdhi1_ctrl";
++ function = "sdhi1";
++ power-source = <1800>;
++ };
++
++ usb0_pins: usb0 {
++ groups = "usb0";
++ function = "usb0";
++ };
++
++ usb1_pins: usb1 {
++ groups = "usb1";
++ function = "usb1";
++ };
++};
++
++&scif0 {
++ pinctrl-0 = <&scif0_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
++
++&sdhi1 {
++ pinctrl-0 = <&sdhi1_pins>;
++ pinctrl-1 = <&sdhi1_pins_uhs>;
++ pinctrl-names = "default", "state_uhs";
++
++ vmmc-supply = <&vcc_sdhi1>;
++ vqmmc-supply = <&vccq_sdhi1>;
++ cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
++ wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
++ sd-uhs-sdr50;
++ status = "okay";
++};
++
++&usbphy {
++ status = "okay";
++};
+diff --git a/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts b/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
+index 0136864bc595..6aa6b7467704 100644
+--- a/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
++++ b/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
+@@ -1,5 +1,5 @@
+ /*
+- * Device Tree Source for the iWave-RZG1M Qseven carrier board
++ * Device Tree Source for the iWave-RZ/G1M Qseven board
+ *
+ * Copyright (C) 2017 Renesas Electronics Corp.
+ *
+@@ -10,144 +10,9 @@
+
+ /dts-v1/;
+ #include "r8a7743-iwg20m.dtsi"
++#include "iwg20d-q7-common.dtsi"
+
+ / {
+ model = "iWave Systems RainboW-G20D-Qseven board based on RZ/G1M";
+ compatible = "iwave,g20d", "iwave,g20m", "renesas,r8a7743";
+-
+- aliases {
+- serial0 = &scif0;
+- ethernet0 = &avb;
+- };
+-
+- chosen {
+- bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
+- stdout-path = "serial0:115200n8";
+- };
+-
+- vcc_sdhi1: regulator-vcc-sdhi1 {
+- compatible = "regulator-fixed";
+-
+- regulator-name = "SDHI1 Vcc";
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+-
+- gpio = <&gpio1 16 GPIO_ACTIVE_LOW>;
+- };
+-
+- vccq_sdhi1: regulator-vccq-sdhi1 {
+- compatible = "regulator-gpio";
+-
+- regulator-name = "SDHI1 VccQ";
+- regulator-min-microvolt = <1800000>;
+- regulator-max-microvolt = <3300000>;
+-
+- gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
+- gpios-states = <1>;
+- states = <3300000 1
+- 1800000 0>;
+- };
+-};
+-
+-&pfc {
+- i2c2_pins: i2c2 {
+- groups = "i2c2";
+- function = "i2c2";
+- };
+-
+- scif0_pins: scif0 {
+- groups = "scif0_data_d";
+- function = "scif0";
+- };
+-
+- avb_pins: avb {
+- groups = "avb_mdio", "avb_gmii";
+- function = "avb";
+- };
+-
+- sdhi1_pins: sd1 {
+- groups = "sdhi1_data4", "sdhi1_ctrl";
+- function = "sdhi1";
+- power-source = <3300>;
+- };
+-
+- sdhi1_pins_uhs: sd1_uhs {
+- groups = "sdhi1_data4", "sdhi1_ctrl";
+- function = "sdhi1";
+- power-source = <1800>;
+- };
+-
+- usb0_pins: usb0 {
+- groups = "usb0";
+- function = "usb0";
+- };
+-
+- usb1_pins: usb1 {
+- groups = "usb1";
+- function = "usb1";
+- };
+-};
+-
+-&scif0 {
+- pinctrl-0 = <&scif0_pins>;
+- pinctrl-names = "default";
+-
+- status = "okay";
+-};
+-
+-&avb {
+- pinctrl-0 = <&avb_pins>;
+- pinctrl-names = "default";
+-
+- phy-handle = <&phy3>;
+- phy-mode = "gmii";
+- renesas,no-ether-link;
+- status = "okay";
+-
+- phy3: ethernet-phy@3 {
+- reg = <3>;
+- micrel,led-mode = <1>;
+- };
+-};
+-
+-&sdhi1 {
+- pinctrl-0 = <&sdhi1_pins>;
+- pinctrl-1 = <&sdhi1_pins_uhs>;
+- pinctrl-names = "default", "state_uhs";
+-
+- vmmc-supply = <&vcc_sdhi1>;
+- vqmmc-supply = <&vccq_sdhi1>;
+- cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
+- wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
+- sd-uhs-sdr50;
+- status = "okay";
+-};
+-
+-&i2c2 {
+- pinctrl-0 = <&i2c2_pins>;
+- pinctrl-names = "default";
+-
+- status = "okay";
+- clock-frequency = <400000>;
+-
+- rtc@68 {
+- compatible = "ti,bq32000";
+- reg = <0x68>;
+- };
+-};
+-
+-&pci0 {
+- status = "okay";
+- pinctrl-0 = <&usb0_pins>;
+- pinctrl-names = "default";
+-};
+-
+-&pci1 {
+- status = "okay";
+- pinctrl-0 = <&usb1_pins>;
+- pinctrl-names = "default";
+-};
+-
+-&usbphy {
+- status = "okay";
+ };
+--
+2.19.0
+
diff --git a/patches/0356-ARM-dts-iwg20d-q7-dbcm-ca-Add-device-trees-for-camer.patch b/patches/0356-ARM-dts-iwg20d-q7-dbcm-ca-Add-device-trees-for-camer.patch
new file mode 100644
index 0000000..c37b030
--- /dev/null
+++ b/patches/0356-ARM-dts-iwg20d-q7-dbcm-ca-Add-device-trees-for-camer.patch
@@ -0,0 +1,115 @@
+From a8cc1d99bb84c57292f92a6c12369b618f0ef635 Mon Sep 17 00:00:00 2001
+From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Date: Fri, 6 Oct 2017 18:59:53 +0100
+Subject: [PATCH 0356/1795] ARM: dts: iwg20d-q7-dbcm-ca: Add device trees for
+ camera DB
+
+This patch adds a .dtsi that describes the camera daughter board
+and a .dts to describe the HW made of iWave's RZ/G1M SoM, iWave's
+RZ/G1M/G1N Qseven carrier board, and the camera daughter board.
+The camera daughter board .dtsi adds support for ttySC[14].
+
+Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 2ee18841ff649e973d62afc6096b892396a676ef)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/Makefile | 1 +
+ arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi | 43 +++++++++++++++++++
+ .../boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dts | 19 ++++++++
+ 3 files changed, 63 insertions(+)
+ create mode 100644 arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi
+ create mode 100644 arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dts
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index 2fca3799bef6..b6c97b70e85f 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -725,6 +725,7 @@ dtb-$(CONFIG_ARCH_RENESAS) += \
+ r8a73a4-ape6evm.dtb \
+ r8a7740-armadillo800eva.dtb \
+ r8a7743-iwg20d-q7.dtb \
++ r8a7743-iwg20d-q7-dbcm-ca.dtb \
+ r8a7743-sk-rzg1m.dtb \
+ r8a7745-iwg22d-sodimm.dtb \
+ r8a7745-sk-rzg1e.dtb \
+diff --git a/arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi b/arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi
+new file mode 100644
+index 000000000000..31fab5f183a9
+--- /dev/null
++++ b/arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi
+@@ -0,0 +1,43 @@
++/*
++ * Device Tree Source for the iWave-RZ-G1M/N Daughter Board Camera Module
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++/ {
++ aliases {
++ serial1 = &scif1;
++ serial4 = &hscif1;
++ };
++};
++
++&hscif1 {
++ pinctrl-0 = <&hscif1_pins>;
++ pinctrl-names = "default";
++
++ uart-has-rtscts;
++ status = "okay";
++};
++
++&pfc {
++ hscif1_pins: hscif1 {
++ groups = "hscif1_data_c", "hscif1_ctrl_c";
++ function = "hscif1";
++ };
++
++ scif1_pins: scif1 {
++ groups = "scif1_data_d";
++ function = "scif1";
++ };
++};
++
++&scif1 {
++ pinctrl-0 = <&scif1_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
+diff --git a/arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dts b/arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dts
+new file mode 100644
+index 000000000000..d90eb8464222
+--- /dev/null
++++ b/arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dts
+@@ -0,0 +1,19 @@
++/*
++ * Device Tree Source for the iWave-RZ/G1M Qseven board + camera daughter board
++ *
++ * Copyright (C) 2017 Renesas Electronics Corp.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++/dts-v1/;
++#include "r8a7743-iwg20m.dtsi"
++#include "iwg20d-q7-common.dtsi"
++#include "iwg20d-q7-dbcm-ca.dtsi"
++
++/ {
++ model = "iW-RainboW-G20D-Q7 RZ/G1M based plus camera daughter board";
++ compatible = "iwave,g20d", "iwave,g20m", "renesas,r8a7743";
++};
+--
+2.19.0
+
diff --git a/patches/0357-ARM-shmobile-rcar-gen2-fix-non-SMP-build.patch b/patches/0357-ARM-shmobile-rcar-gen2-fix-non-SMP-build.patch
new file mode 100644
index 0000000..07d0be3
--- /dev/null
+++ b/patches/0357-ARM-shmobile-rcar-gen2-fix-non-SMP-build.patch
@@ -0,0 +1,43 @@
+From 0fd0162006ab86bf8ea25ae63abdb03c3e932b13 Mon Sep 17 00:00:00 2001
+From: Arnd Bergmann <arnd@arndb.de>
+Date: Thu, 5 Oct 2017 14:09:04 +0200
+Subject: [PATCH 0357/1795] ARM: shmobile: rcar-gen2: fix non-SMP build
+
+A bugfix for the SMP case broke the build for the UP case:
+
+arch/arm/mach-shmobile/headsmp-apmu.o: In function `shmobile_boot_apmu':
+(.text+0x34): undefined reference to `secondary_startup'
+
+The assembler file mixes code that is used for SMP with code
+that we also need on a single-CPU build, so I'm leaving it
+always enabled in the Makefile, but enclose the SMP code
+in an #ifdef.
+
+Fixes: fd45a136ff6 ("ARM: shmobile: rcar-gen2: Make sure CNTVOFF is initialized on CA7/15")
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 703ef76b8fd5169d5cff30de5b958d6728b9a147)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/mach-shmobile/headsmp-apmu.S | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/headsmp-apmu.S b/arch/arm/mach-shmobile/headsmp-apmu.S
+index db4743d2bf91..5672b5849401 100644
+--- a/arch/arm/mach-shmobile/headsmp-apmu.S
++++ b/arch/arm/mach-shmobile/headsmp-apmu.S
+@@ -31,7 +31,9 @@ ENTRY(shmobile_init_cntvoff)
+ ret lr
+ ENDPROC(shmobile_init_cntvoff)
+
++#ifdef CONFIG_SMP
+ ENTRY(shmobile_boot_apmu)
+ bl shmobile_init_cntvoff
+ b secondary_startup
+ ENDPROC(shmobile_boot_apmu)
++#endif
+--
+2.19.0
+
diff --git a/patches/0358-ARM-dts-r8a7790-add-cpu-capacity-dmips-mhz-informati.patch b/patches/0358-ARM-dts-r8a7790-add-cpu-capacity-dmips-mhz-informati.patch
new file mode 100644
index 0000000..d9da7c7
--- /dev/null
+++ b/patches/0358-ARM-dts-r8a7790-add-cpu-capacity-dmips-mhz-informati.patch
@@ -0,0 +1,110 @@
+From 411620ade654d757bc374b32abc778a68b1b62d7 Mon Sep 17 00:00:00 2001
+From: Dietmar Eggemann <dietmar.eggemann@arm.com>
+Date: Wed, 30 Aug 2017 15:41:20 +0100
+Subject: [PATCH 0358/1795] ARM: dts: r8a7790: add cpu capacity-dmips-mhz
+ information
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The following 'capacity-dmips-mhz' dt property values are used:
+
+Cortex-A15: 1024, Cortex-A7: 539
+
+They have been derived form the cpu_efficiency values:
+
+Cortex-A15: 3891, Cortex-A7: 2048
+
+by scaling them so that the Cortex-A15s (big cores) use 1024.
+
+The cpu_efficiency values were originally derived from the "Big.LITTLE
+Processing with ARM Cortex™-A15 & Cortex-A7" white paper
+(http://www.cl.cam.ac.uk/~rdm34/big.LITTLE.pdf). Table 1 lists 1.9x
+(3891/2048) as the Cortex-A15 vs Cortex-A7 performance ratio for the
+Dhrystone benchmark.
+
+The following platform is affected once cpu-invariant accounting
+support is re-connected to the task scheduler:
+
+r8a7790-lager
+
+Signed-off-by: Dietmar Eggemann <dietmar.eggemann@arm.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 5bdc81259bb0efd5bd71820ef15757b70beae751)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7790.dtsi | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
+index 17a48199b7a9..92b7f3bd8b69 100644
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -56,6 +56,7 @@
+ clock-latency = <300000>; /* 300 us */
+ power-domains = <&sysc R8A7790_PD_CA15_CPU0>;
+ next-level-cache = <&L2_CA15>;
++ capacity-dmips-mhz = <1024>;
+
+ /* kHz - uV - OPPs unknown yet */
+ operating-points = <1400000 1000000>,
+@@ -73,6 +74,7 @@
+ clock-frequency = <1300000000>;
+ power-domains = <&sysc R8A7790_PD_CA15_CPU1>;
+ next-level-cache = <&L2_CA15>;
++ capacity-dmips-mhz = <1024>;
+ };
+
+ cpu2: cpu@2 {
+@@ -82,6 +84,7 @@
+ clock-frequency = <1300000000>;
+ power-domains = <&sysc R8A7790_PD_CA15_CPU2>;
+ next-level-cache = <&L2_CA15>;
++ capacity-dmips-mhz = <1024>;
+ };
+
+ cpu3: cpu@3 {
+@@ -91,6 +94,7 @@
+ clock-frequency = <1300000000>;
+ power-domains = <&sysc R8A7790_PD_CA15_CPU3>;
+ next-level-cache = <&L2_CA15>;
++ capacity-dmips-mhz = <1024>;
+ };
+
+ cpu4: cpu@100 {
+@@ -100,6 +104,7 @@
+ clock-frequency = <780000000>;
+ power-domains = <&sysc R8A7790_PD_CA7_CPU0>;
+ next-level-cache = <&L2_CA7>;
++ capacity-dmips-mhz = <539>;
+ };
+
+ cpu5: cpu@101 {
+@@ -109,6 +114,7 @@
+ clock-frequency = <780000000>;
+ power-domains = <&sysc R8A7790_PD_CA7_CPU1>;
+ next-level-cache = <&L2_CA7>;
++ capacity-dmips-mhz = <539>;
+ };
+
+ cpu6: cpu@102 {
+@@ -118,6 +124,7 @@
+ clock-frequency = <780000000>;
+ power-domains = <&sysc R8A7790_PD_CA7_CPU2>;
+ next-level-cache = <&L2_CA7>;
++ capacity-dmips-mhz = <539>;
+ };
+
+ cpu7: cpu@103 {
+@@ -127,6 +134,7 @@
+ clock-frequency = <780000000>;
+ power-domains = <&sysc R8A7790_PD_CA7_CPU3>;
+ next-level-cache = <&L2_CA7>;
++ capacity-dmips-mhz = <539>;
+ };
+
+ L2_CA15: cache-controller-0 {
+--
+2.19.0
+
diff --git a/patches/0359-ARM-dts-r8a7745-Add-internal-PCI-bridge-nodes.patch b/patches/0359-ARM-dts-r8a7745-Add-internal-PCI-bridge-nodes.patch
new file mode 100644
index 0000000..aa568d0
--- /dev/null
+++ b/patches/0359-ARM-dts-r8a7745-Add-internal-PCI-bridge-nodes.patch
@@ -0,0 +1,78 @@
+From 9354b4e81df0df6e48729786dfbf27ceed3043f2 Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Mon, 9 Oct 2017 14:58:57 +0100
+Subject: [PATCH 0359/1795] ARM: dts: r8a7745: Add internal PCI bridge nodes
+
+Add device nodes for the r8a7745 internal PCI bridge devices.
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit ab290a32925e6f7db9e71546098077b3e72cc617)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7745.dtsi | 46 ++++++++++++++++++++++++++++++++++
+ 1 file changed, 46 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
+index 6ba3b8b04edb..b4e9536a84d6 100644
+--- a/arch/arm/boot/dts/r8a7745.dtsi
++++ b/arch/arm/boot/dts/r8a7745.dtsi
+@@ -845,6 +845,52 @@
+ resets = <&cpg 311>;
+ status = "disabled";
+ };
++
++ pci0: pci@ee090000 {
++ compatible = "renesas,pci-r8a7745",
++ "renesas,pci-rcar-gen2";
++ device_type = "pci";
++ reg = <0 0xee090000 0 0xc00>,
++ <0 0xee080000 0 0x1100>;
++ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 703>;
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ resets = <&cpg 703>;
++ status = "disabled";
++
++ bus-range = <0 0>;
++ #address-cells = <3>;
++ #size-cells = <2>;
++ #interrupt-cells = <1>;
++ ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
++ interrupt-map-mask = <0xff00 0 0 0x7>;
++ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
++ 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
++ 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
++ };
++
++ pci1: pci@ee0d0000 {
++ compatible = "renesas,pci-r8a7745",
++ "renesas,pci-rcar-gen2";
++ device_type = "pci";
++ reg = <0 0xee0d0000 0 0xc00>,
++ <0 0xee0c0000 0 0x1100>;
++ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 703>;
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ resets = <&cpg 703>;
++ status = "disabled";
++
++ bus-range = <1 1>;
++ #address-cells = <3>;
++ #size-cells = <2>;
++ #interrupt-cells = <1>;
++ ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
++ interrupt-map-mask = <0xff00 0 0 0x7>;
++ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
++ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
++ 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
++ };
+ };
+
+ /* External root clock */
+--
+2.19.0
+
diff --git a/patches/0360-ARM-dts-r8a7745-Add-USB-PHY-DT-support.patch b/patches/0360-ARM-dts-r8a7745-Add-USB-PHY-DT-support.patch
new file mode 100644
index 0000000..c12e125
--- /dev/null
+++ b/patches/0360-ARM-dts-r8a7745-Add-USB-PHY-DT-support.patch
@@ -0,0 +1,54 @@
+From 12e38865e6bbce1fa5869a7fb42b222a8c143997 Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Mon, 9 Oct 2017 14:58:58 +0100
+Subject: [PATCH 0360/1795] ARM: dts: r8a7745: Add USB PHY DT support
+
+Define the r8a7745 generic part of the USB PHY device node.
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 237173a4bbf4c0710dbb7c35a4e2763671d293df)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7745.dtsi | 22 ++++++++++++++++++++++
+ 1 file changed, 22 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
+index b4e9536a84d6..17cfa53f3c76 100644
+--- a/arch/arm/boot/dts/r8a7745.dtsi
++++ b/arch/arm/boot/dts/r8a7745.dtsi
+@@ -891,6 +891,28 @@
+ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ };
++
++ usbphy: usb-phy@e6590100 {
++ compatible = "renesas,usb-phy-r8a7745",
++ "renesas,rcar-gen2-usb-phy";
++ reg = <0 0xe6590100 0 0x100>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++ clocks = <&cpg CPG_MOD 704>;
++ clock-names = "usbhs";
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ resets = <&cpg 704>;
++ status = "disabled";
++
++ usb0: usb-channel@0 {
++ reg = <0>;
++ #phy-cells = <1>;
++ };
++ usb2: usb-channel@2 {
++ reg = <2>;
++ #phy-cells = <1>;
++ };
++ };
+ };
+
+ /* External root clock */
+--
+2.19.0
+
diff --git a/patches/0361-ARM-dts-r8a7745-Link-PCI-USB-devices-to-USB-PHY.patch b/patches/0361-ARM-dts-r8a7745-Link-PCI-USB-devices-to-USB-PHY.patch
new file mode 100644
index 0000000..9f2bc5b
--- /dev/null
+++ b/patches/0361-ARM-dts-r8a7745-Link-PCI-USB-devices-to-USB-PHY.patch
@@ -0,0 +1,64 @@
+From 070402edc4ea80d4ab9b25fe31c9aa1f4926ec2a Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Mon, 9 Oct 2017 14:58:59 +0100
+Subject: [PATCH 0361/1795] ARM: dts: r8a7745: Link PCI USB devices to USB PHY
+
+Describe the PCI USB devices that are behind the PCI bridges, adding
+necessary links to the USB PHY device.
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c3e35873e37b77581be942b7284e705e997014fc)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7745.dtsi | 24 ++++++++++++++++++++++++
+ 1 file changed, 24 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
+index 17cfa53f3c76..3a50f703601c 100644
+--- a/arch/arm/boot/dts/r8a7745.dtsi
++++ b/arch/arm/boot/dts/r8a7745.dtsi
+@@ -867,6 +867,18 @@
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
++
++ usb@1,0 {
++ reg = <0x800 0 0 0 0>;
++ phys = <&usb0 0>;
++ phy-names = "usb";
++ };
++
++ usb@2,0 {
++ reg = <0x1000 0 0 0 0>;
++ phys = <&usb0 0>;
++ phy-names = "usb";
++ };
+ };
+
+ pci1: pci@ee0d0000 {
+@@ -890,6 +902,18 @@
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
++
++ usb@1,0 {
++ reg = <0x10800 0 0 0 0>;
++ phys = <&usb2 0>;
++ phy-names = "usb";
++ };
++
++ usb@2,0 {
++ reg = <0x11000 0 0 0 0>;
++ phys = <&usb2 0>;
++ phy-names = "usb";
++ };
+ };
+
+ usbphy: usb-phy@e6590100 {
+--
+2.19.0
+
diff --git a/patches/0362-ARM-dts-iwg22d-sodimm-Enable-internal-PCI.patch b/patches/0362-ARM-dts-iwg22d-sodimm-Enable-internal-PCI.patch
new file mode 100644
index 0000000..7ef3b85
--- /dev/null
+++ b/patches/0362-ARM-dts-iwg22d-sodimm-Enable-internal-PCI.patch
@@ -0,0 +1,48 @@
+From bb213fd07ad2ee702b1e8bb0faa602a4b6b0e481 Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Mon, 9 Oct 2017 14:59:00 +0100
+Subject: [PATCH 0362/1795] ARM: dts: iwg22d-sodimm: Enable internal PCI
+
+Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers
+attached to them.
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit bc058f6f03e47610c994a97ecf3bf8a3ea44efee)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+index 8772c561e3a8..e378e5ecfcac 100644
+--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
++++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+@@ -55,6 +55,11 @@
+ function = "sdhi0";
+ power-source = <3300>;
+ };
++
++ usb1_pins: usb1 {
++ groups = "usb1";
++ function = "usb1";
++ };
+ };
+
+ &scif4 {
+@@ -92,3 +97,9 @@
+ cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
+ status = "okay";
+ };
++
++&pci1 {
++ status = "okay";
++ pinctrl-0 = <&usb1_pins>;
++ pinctrl-names = "default";
++};
+--
+2.19.0
+
diff --git a/patches/0363-ARM-dts-iwg22d-sodimm-Enable-USB-PHY.patch b/patches/0363-ARM-dts-iwg22d-sodimm-Enable-USB-PHY.patch
new file mode 100644
index 0000000..3db61e0
--- /dev/null
+++ b/patches/0363-ARM-dts-iwg22d-sodimm-Enable-USB-PHY.patch
@@ -0,0 +1,31 @@
+From 1e3fa967de72779d6549221efd1c643dd8ce8329 Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Mon, 9 Oct 2017 14:59:01 +0100
+Subject: [PATCH 0363/1795] ARM: dts: iwg22d-sodimm: Enable USB PHY
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit aea3c9d9726148331d874c2b91aeb663430099d7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+index e378e5ecfcac..52153ec3638c 100644
+--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
++++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+@@ -103,3 +103,7 @@
+ pinctrl-0 = <&usb1_pins>;
+ pinctrl-names = "default";
+ };
++
++&usbphy {
++ status = "okay";
++};
+--
+2.19.0
+
diff --git a/patches/0364-ARM-dts-r8a7743-Add-HS-USB-device-node.patch b/patches/0364-ARM-dts-r8a7743-Add-HS-USB-device-node.patch
new file mode 100644
index 0000000..d7af4cf
--- /dev/null
+++ b/patches/0364-ARM-dts-r8a7743-Add-HS-USB-device-node.patch
@@ -0,0 +1,47 @@
+From 947d458159c41ad526d67da3b3fb1f789ca20d73 Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Mon, 9 Oct 2017 14:21:18 +0100
+Subject: [PATCH 0364/1795] ARM: dts: r8a7743: Add HS-USB device node
+
+Define the R8A7743 generic part of the HS-USB device node. It is up to the
+board file to enable the device.
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 4b4a3b1c33b7a389d90624683d8f1a8d1dc2affa)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7743.dtsi | 14 ++++++++++++++
+ 1 file changed, 14 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
+index d541fd9ffafb..080eff9bb3c3 100644
+--- a/arch/arm/boot/dts/r8a7743.dtsi
++++ b/arch/arm/boot/dts/r8a7743.dtsi
+@@ -945,6 +945,20 @@
+ status = "disabled";
+ };
+
++ hsusb: usb@e6590000 {
++ compatible = "renesas,usbhs-r8a7743",
++ "renesas,rcar-gen2-usbhs";
++ reg = <0 0xe6590000 0 0x100>;
++ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 704>;
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ resets = <&cpg 704>;
++ renesas,buswait = <4>;
++ phys = <&usb0 1>;
++ phy-names = "usb";
++ status = "disabled";
++ };
++
+ usbphy: usb-phy@e6590100 {
+ compatible = "renesas,usb-phy-r8a7743",
+ "renesas,rcar-gen2-usb-phy";
+--
+2.19.0
+
diff --git a/patches/0365-ARM-dts-iwg20d-q7-Enable-HS-USB.patch b/patches/0365-ARM-dts-iwg20d-q7-Enable-HS-USB.patch
new file mode 100644
index 0000000..04ac218
--- /dev/null
+++ b/patches/0365-ARM-dts-iwg20d-q7-Enable-HS-USB.patch
@@ -0,0 +1,49 @@
+From 95234bd9270f928699852899f0fb70cf0c6ac134 Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Wed, 11 Oct 2017 10:04:33 +0100
+Subject: [PATCH 0365/1795] ARM: dts: iwg20d-q7: Enable HS-USB
+
+Enable HS-USB device for the iWave G20D-Q7 carrier board based on
+RZ/G1M.
+Also disable the host mode support on usb otg port by default to avoid
+pin conflicts.
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 405b580227ff1ae8fde82a666a2a5c0391a7e64a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/iwg20d-q7-common.dtsi | 7 ++++++-
+ 1 file changed, 6 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+index 1c072c0a4888..efd8af9242d1 100644
+--- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
++++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+@@ -58,6 +58,12 @@
+ };
+ };
+
++&hsusb {
++ status = "okay";
++ pinctrl-0 = <&usb0_pins>;
++ pinctrl-names = "default";
++};
++
+ &i2c2 {
+ pinctrl-0 = <&i2c2_pins>;
+ pinctrl-names = "default";
+@@ -72,7 +78,6 @@
+ };
+
+ &pci0 {
+- status = "okay";
+ pinctrl-0 = <&usb0_pins>;
+ pinctrl-names = "default";
+ };
+--
+2.19.0
+
diff --git a/patches/0366-ARM-dts-r8a7743-Add-USB-DMAC-device-nodes.patch b/patches/0366-ARM-dts-r8a7743-Add-USB-DMAC-device-nodes.patch
new file mode 100644
index 0000000..a085613
--- /dev/null
+++ b/patches/0366-ARM-dts-r8a7743-Add-USB-DMAC-device-nodes.patch
@@ -0,0 +1,58 @@
+From c48fda1c61636880c65acc88c30b360b47100bc8 Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Mon, 9 Oct 2017 14:21:20 +0100
+Subject: [PATCH 0366/1795] ARM: dts: r8a7743: Add USB-DMAC device nodes
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 310861003a0d59cb410538bcdf73a218157a111d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7743.dtsi | 28 ++++++++++++++++++++++++++++
+ 1 file changed, 28 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
+index 080eff9bb3c3..de89295ce63a 100644
+--- a/arch/arm/boot/dts/r8a7743.dtsi
++++ b/arch/arm/boot/dts/r8a7743.dtsi
+@@ -355,6 +355,34 @@
+ dma-channels = <15>;
+ };
+
++ usb_dmac0: dma-controller@e65a0000 {
++ compatible = "renesas,r8a7743-usb-dmac",
++ "renesas,usb-dmac";
++ reg = <0 0xe65a0000 0 0x100>;
++ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "ch0", "ch1";
++ clocks = <&cpg CPG_MOD 330>;
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ resets = <&cpg 330>;
++ #dma-cells = <1>;
++ dma-channels = <2>;
++ };
++
++ usb_dmac1: dma-controller@e65b0000 {
++ compatible = "renesas,r8a7743-usb-dmac",
++ "renesas,usb-dmac";
++ reg = <0 0xe65b0000 0 0x100>;
++ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "ch0", "ch1";
++ clocks = <&cpg CPG_MOD 331>;
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ resets = <&cpg 331>;
++ #dma-cells = <1>;
++ dma-channels = <2>;
++ };
++
+ /* The memory map in the User's Manual maps the cores to bus
+ * numbers
+ */
+--
+2.19.0
+
diff --git a/patches/0367-ARM-dts-r8a7743-Enable-DMA-for-HSUSB.patch b/patches/0367-ARM-dts-r8a7743-Enable-DMA-for-HSUSB.patch
new file mode 100644
index 0000000..9a7be8d
--- /dev/null
+++ b/patches/0367-ARM-dts-r8a7743-Enable-DMA-for-HSUSB.patch
@@ -0,0 +1,35 @@
+From 759882d9670e03790c7bf95b673c56b7f276ecfb Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Mon, 9 Oct 2017 14:21:21 +0100
+Subject: [PATCH 0367/1795] ARM: dts: r8a7743: Enable DMA for HSUSB
+
+This patch adds DMA properties to the HSUSB node.
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e0a10e7b070624965f20205c59fb2a0c0b465782)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7743.dtsi | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
+index de89295ce63a..699c04003eac 100644
+--- a/arch/arm/boot/dts/r8a7743.dtsi
++++ b/arch/arm/boot/dts/r8a7743.dtsi
+@@ -979,6 +979,9 @@
+ reg = <0 0xe6590000 0 0x100>;
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 704>;
++ dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
++ <&usb_dmac1 0>, <&usb_dmac1 1>;
++ dma-names = "ch0", "ch1", "ch2", "ch3";
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ resets = <&cpg 704>;
+ renesas,buswait = <4>;
+--
+2.19.0
+
diff --git a/patches/0368-ARM-dts-gr-peach-Add-ETHER-pin-group.patch b/patches/0368-ARM-dts-gr-peach-Add-ETHER-pin-group.patch
new file mode 100644
index 0000000..d0bfd17
--- /dev/null
+++ b/patches/0368-ARM-dts-gr-peach-Add-ETHER-pin-group.patch
@@ -0,0 +1,74 @@
+From 30bc7176644a8c333af54344268411e3a4aa318c Mon Sep 17 00:00:00 2001
+From: Jacopo Mondi <jacopo+renesas@jmondi.org>
+Date: Mon, 9 Oct 2017 10:48:34 +0200
+Subject: [PATCH 0368/1795] ARM: dts: gr-peach: Add ETHER pin group
+
+Add pin configuration subnode for ETHER pin group.
+
+Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 349adfbf27269bad4fa6915e77c97a06487266a5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r7s72100-gr-peach.dts | 39 +++++++++++++++++++++++++
+ 1 file changed, 39 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r7s72100-gr-peach.dts b/arch/arm/boot/dts/r7s72100-gr-peach.dts
+index 9661d43f5236..eca14e3801ec 100644
+--- a/arch/arm/boot/dts/r7s72100-gr-peach.dts
++++ b/arch/arm/boot/dts/r7s72100-gr-peach.dts
+@@ -68,6 +68,28 @@
+ /* P6_2 as RxD2; P6_3 as TxD2 */
+ pinmux = <RZA1_PINMUX(6, 2, 7)>, <RZA1_PINMUX(6, 3, 7)>;
+ };
++
++ ether_pins: ether {
++ /* Ethernet on Ports 1,3,5,10 */
++ pinmux = <RZA1_PINMUX(1, 14, 4)>, /* P1_14 = ET_COL */
++ <RZA1_PINMUX(3, 0, 2)>, /* P3_0 = ET_TXCLK */
++ <RZA1_PINMUX(3, 3, 2)>, /* P3_3 = ET_MDIO */
++ <RZA1_PINMUX(3, 4, 2)>, /* P3_4 = ET_RXCLK */
++ <RZA1_PINMUX(3, 5, 2)>, /* P3_5 = ET_RXER */
++ <RZA1_PINMUX(3, 6, 2)>, /* P3_6 = ET_RXDV */
++ <RZA1_PINMUX(5, 9, 2)>, /* P5_9 = ET_MDC */
++ <RZA1_PINMUX(10, 1, 4)>, /* P10_1 = ET_TXER */
++ <RZA1_PINMUX(10, 2, 4)>, /* P10_2 = ET_TXEN */
++ <RZA1_PINMUX(10, 3, 4)>, /* P10_3 = ET_CRS */
++ <RZA1_PINMUX(10, 4, 4)>, /* P10_4 = ET_TXD0 */
++ <RZA1_PINMUX(10, 5, 4)>, /* P10_5 = ET_TXD1 */
++ <RZA1_PINMUX(10, 6, 4)>, /* P10_6 = ET_TXD2 */
++ <RZA1_PINMUX(10, 7, 4)>, /* P10_7 = ET_TXD3 */
++ <RZA1_PINMUX(10, 8, 4)>, /* P10_8 = ET_RXD0 */
++ <RZA1_PINMUX(10, 9, 4)>, /* P10_9 = ET_RXD1 */
++ <RZA1_PINMUX(10, 10, 4)>,/* P10_10 = ET_RXD2 */
++ <RZA1_PINMUX(10, 11, 4)>;/* P10_11 = ET_RXD3 */
++ };
+ };
+
+ &extal_clk {
+@@ -88,3 +110,20 @@
+
+ status = "okay";
+ };
++
++ðer {
++ pinctrl-names = "default";
++ pinctrl-0 = <ðer_pins>;
++
++ status = "okay";
++
++ renesas,no-ether-link;
++ phy-handle = <&phy0>;
++
++ phy0: ethernet-phy@0 {
++ reg = <0>;
++
++ reset-gpios = <&port4 2 GPIO_ACTIVE_LOW>;
++ reset-delay-us = <5>;
++ };
++};
+--
+2.19.0
+
diff --git a/patches/0369-ARM-dts-gr-peach-Enable-ostm0-and-ostm1-timers.patch b/patches/0369-ARM-dts-gr-peach-Enable-ostm0-and-ostm1-timers.patch
new file mode 100644
index 0000000..104bb9f
--- /dev/null
+++ b/patches/0369-ARM-dts-gr-peach-Enable-ostm0-and-ostm1-timers.patch
@@ -0,0 +1,49 @@
+From 220560cedb30236cef3392b5c91a34c0dc5d7dfc Mon Sep 17 00:00:00 2001
+From: Jacopo Mondi <jacopo+renesas@jmondi.org>
+Date: Mon, 9 Oct 2017 10:48:35 +0200
+Subject: [PATCH 0369/1795] ARM: dts: gr-peach: Enable ostm0 and ostm1 timers
+
+Enable ostm0 and ostm1 timers to be used as clock source and clockevent
+source. The timers provides greater accuracy than the already enabled
+mtu2 one.
+
+With these enabled:
+
+clocksource: ostm: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 57352151442 ns
+sched_clock: 32 bits at 33MHz, resolution 30ns, wraps every 64440619504ns
+ostm: used for clocksource
+ostm: used for clock events
+
+Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
+Suggested-by: Chris Brandt <chris.brandt@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 1126e108a3ad8ae92a0532259e3da4b14072355f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r7s72100-gr-peach.dts | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r7s72100-gr-peach.dts b/arch/arm/boot/dts/r7s72100-gr-peach.dts
+index eca14e3801ec..779f724b4531 100644
+--- a/arch/arm/boot/dts/r7s72100-gr-peach.dts
++++ b/arch/arm/boot/dts/r7s72100-gr-peach.dts
+@@ -104,6 +104,14 @@
+ status = "okay";
+ };
+
++&ostm0 {
++ status = "okay";
++};
++
++&ostm1 {
++ status = "okay";
++};
++
+ &scif2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&scif2_pins>;
+--
+2.19.0
+
diff --git a/patches/0370-ARM-dts-r8a7778-Use-R-Car-GPIO-Gen1-fallback-compat-.patch b/patches/0370-ARM-dts-r8a7778-Use-R-Car-GPIO-Gen1-fallback-compat-.patch
new file mode 100644
index 0000000..2e02542
--- /dev/null
+++ b/patches/0370-ARM-dts-r8a7778-Use-R-Car-GPIO-Gen1-fallback-compat-.patch
@@ -0,0 +1,85 @@
+From 265433338c117cfe3b48d1ab9639316b82e1759e Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Fri, 13 Oct 2017 14:33:02 +0200
+Subject: [PATCH 0370/1795] ARM: dts: r8a7778: Use R-Car GPIO Gen1 fallback
+ compat string
+
+Use newly added R-Car GPIO Gen1 fallback compat string
+in place of now deprecated non-generation specific
+R-Car GPIO fallback compat string in DT of r8a7778 SoC.
+
+As the driver does not match on "renesas,gpio-r8a7778" there
+are some run-time considerations for this patch:
+
+* When a resulting DTB is used with kernels newer than v4.14 this should
+ not have any run-time effect as renesas,rcar-gen1-gpio is matched by the
+ driver since commit dbd1dad2ab8f ("gpio: rcar: add gen[123] fallback
+ compatibility strings")
+
+* However, when used with older kernels GPIO will be disabled as
+ no compat string match will be made by the driver.
+
+The regression documented above for the new DTB with old kernel case
+is acceptable in my opinion.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 9b43ba66f145127025cf82a35f47f228ea936935)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7778.dtsi | 10 +++++-----
+ 1 file changed, 5 insertions(+), 5 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
+index 8f3156c0e575..a31817b2dda7 100644
+--- a/arch/arm/boot/dts/r8a7778.dtsi
++++ b/arch/arm/boot/dts/r8a7778.dtsi
+@@ -88,7 +88,7 @@
+ };
+
+ gpio0: gpio@ffc40000 {
+- compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7778", "renesas,rcar-gen1-gpio";
+ reg = <0xffc40000 0x2c>;
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -99,7 +99,7 @@
+ };
+
+ gpio1: gpio@ffc41000 {
+- compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7778", "renesas,rcar-gen1-gpio";
+ reg = <0xffc41000 0x2c>;
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -110,7 +110,7 @@
+ };
+
+ gpio2: gpio@ffc42000 {
+- compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7778", "renesas,rcar-gen1-gpio";
+ reg = <0xffc42000 0x2c>;
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -121,7 +121,7 @@
+ };
+
+ gpio3: gpio@ffc43000 {
+- compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7778", "renesas,rcar-gen1-gpio";
+ reg = <0xffc43000 0x2c>;
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -132,7 +132,7 @@
+ };
+
+ gpio4: gpio@ffc44000 {
+- compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7778", "renesas,rcar-gen1-gpio";
+ reg = <0xffc44000 0x2c>;
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+--
+2.19.0
+
diff --git a/patches/0371-ARM-dts-r8a7779-Use-R-Car-GPIO-Gen1-fallback-compat-.patch b/patches/0371-ARM-dts-r8a7779-Use-R-Car-GPIO-Gen1-fallback-compat-.patch
new file mode 100644
index 0000000..e95f236
--- /dev/null
+++ b/patches/0371-ARM-dts-r8a7779-Use-R-Car-GPIO-Gen1-fallback-compat-.patch
@@ -0,0 +1,103 @@
+From d48e4046d1f3d07f05062fb82c279d0eb4c83681 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Fri, 13 Oct 2017 14:33:03 +0200
+Subject: [PATCH 0371/1795] ARM: dts: r8a7779: Use R-Car GPIO Gen1 fallback
+ compat string
+
+Use newly added R-Car GPIO Gen1 fallback compat string
+in place of now deprecated non-generation specific
+R-Car GPIO fallback compat string in DT of r8a7779 SoC.
+
+As the driver does not match on "renesas,gpio-r8a7779" there
+are some run-time considerations for this patch:
+
+* When a resulting DTB is used with kernels newer than v4.14 this should
+ not have any run-time effect as renesas,rcar-gen1-gpio is matched by the
+ driver since commit dbd1dad2ab8f ("gpio: rcar: add gen[123] fallback
+ compatibility strings")
+
+* However, when used with older kernels GPIO will be disabled as
+ no compat string match will be made by the driver.
+
+The regression documented above for the new DTB with old kernel case
+is acceptable in my opinion.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 88cb141b84ca665110ef36db76294453b83486df)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7779.dtsi | 14 +++++++-------
+ 1 file changed, 7 insertions(+), 7 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
+index 8ee0b2ca5d39..ccef2cfab6e0 100644
+--- a/arch/arm/boot/dts/r8a7779.dtsi
++++ b/arch/arm/boot/dts/r8a7779.dtsi
+@@ -76,7 +76,7 @@
+ };
+
+ gpio0: gpio@ffc40000 {
+- compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
+ reg = <0xffc40000 0x2c>;
+ interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -87,7 +87,7 @@
+ };
+
+ gpio1: gpio@ffc41000 {
+- compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
+ reg = <0xffc41000 0x2c>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -98,7 +98,7 @@
+ };
+
+ gpio2: gpio@ffc42000 {
+- compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
+ reg = <0xffc42000 0x2c>;
+ interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -109,7 +109,7 @@
+ };
+
+ gpio3: gpio@ffc43000 {
+- compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
+ reg = <0xffc43000 0x2c>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -120,7 +120,7 @@
+ };
+
+ gpio4: gpio@ffc44000 {
+- compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
+ reg = <0xffc44000 0x2c>;
+ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -131,7 +131,7 @@
+ };
+
+ gpio5: gpio@ffc45000 {
+- compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
+ reg = <0xffc45000 0x2c>;
+ interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -142,7 +142,7 @@
+ };
+
+ gpio6: gpio@ffc46000 {
+- compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
+ reg = <0xffc46000 0x2c>;
+ interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+--
+2.19.0
+
diff --git a/patches/0372-ARM-dts-r8a7743-Use-R-Car-GPIO-Gen2-fallback-compat-.patch b/patches/0372-ARM-dts-r8a7743-Use-R-Car-GPIO-Gen2-fallback-compat-.patch
new file mode 100644
index 0000000..994438f
--- /dev/null
+++ b/patches/0372-ARM-dts-r8a7743-Use-R-Car-GPIO-Gen2-fallback-compat-.patch
@@ -0,0 +1,101 @@
+From fddd8b8f28b27ff7d05543e93ae27aa51c9dc37d Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Fri, 13 Oct 2017 14:33:04 +0200
+Subject: [PATCH 0372/1795] ARM: dts: r8a7743: Use R-Car GPIO Gen2 fallback
+ compat string
+
+Use newly added R-Car GPIO Gen2 fallback compat string
+in place of now deprecated non-generation specific
+R-Car GPIO fallback compat string in the DT of the r8a7743 SoC.
+
+This should have no run-time effect as the driver matches against
+the per-SoC compat string before considering the fallback compat string.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 936e7d7472547294fa305f60546afad232896fdc)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7743.dtsi | 16 ++++++++--------
+ 1 file changed, 8 insertions(+), 8 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
+index 699c04003eac..f29f15d4d659 100644
+--- a/arch/arm/boot/dts/r8a7743.dtsi
++++ b/arch/arm/boot/dts/r8a7743.dtsi
+@@ -108,7 +108,7 @@
+
+ gpio0: gpio@e6050000 {
+ compatible = "renesas,gpio-r8a7743",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6050000 0 0x50>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -123,7 +123,7 @@
+
+ gpio1: gpio@e6051000 {
+ compatible = "renesas,gpio-r8a7743",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6051000 0 0x50>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -138,7 +138,7 @@
+
+ gpio2: gpio@e6052000 {
+ compatible = "renesas,gpio-r8a7743",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6052000 0 0x50>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -153,7 +153,7 @@
+
+ gpio3: gpio@e6053000 {
+ compatible = "renesas,gpio-r8a7743",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6053000 0 0x50>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -168,7 +168,7 @@
+
+ gpio4: gpio@e6054000 {
+ compatible = "renesas,gpio-r8a7743",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6054000 0 0x50>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -183,7 +183,7 @@
+
+ gpio5: gpio@e6055000 {
+ compatible = "renesas,gpio-r8a7743",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055000 0 0x50>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -198,7 +198,7 @@
+
+ gpio6: gpio@e6055400 {
+ compatible = "renesas,gpio-r8a7743",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055400 0 0x50>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -213,7 +213,7 @@
+
+ gpio7: gpio@e6055800 {
+ compatible = "renesas,gpio-r8a7743",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055800 0 0x50>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+--
+2.19.0
+
diff --git a/patches/0373-ARM-dts-r8a7790-Use-R-Car-GPIO-Gen2-fallback-compat-.patch b/patches/0373-ARM-dts-r8a7790-Use-R-Car-GPIO-Gen2-fallback-compat-.patch
new file mode 100644
index 0000000..9529246
--- /dev/null
+++ b/patches/0373-ARM-dts-r8a7790-Use-R-Car-GPIO-Gen2-fallback-compat-.patch
@@ -0,0 +1,83 @@
+From 7e83b4c2ad382fde41d8dbec7507c2f4360ec6a2 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Fri, 13 Oct 2017 14:33:05 +0200
+Subject: [PATCH 0373/1795] ARM: dts: r8a7790: Use R-Car GPIO Gen2 fallback
+ compat string
+
+Use newly added R-Car GPIO Gen2 fallback compat string
+in place of now deprecated non-generation specific
+R-Car GPIO fallback compat string in the DT of the r8a7790 SoC.
+
+This should have no run-time effect as the driver matches against
+the per-SoC compat string before considering the fallback compat string.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 26742a192c82cc28723c80dbecc5976db0508461)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7790.dtsi | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
+index 92b7f3bd8b69..f247beb3863f 100644
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -200,7 +200,7 @@
+ };
+
+ gpio0: gpio@e6050000 {
+- compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6050000 0 0x50>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -214,7 +214,7 @@
+ };
+
+ gpio1: gpio@e6051000 {
+- compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6051000 0 0x50>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -228,7 +228,7 @@
+ };
+
+ gpio2: gpio@e6052000 {
+- compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6052000 0 0x50>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -242,7 +242,7 @@
+ };
+
+ gpio3: gpio@e6053000 {
+- compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6053000 0 0x50>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -256,7 +256,7 @@
+ };
+
+ gpio4: gpio@e6054000 {
+- compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6054000 0 0x50>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -270,7 +270,7 @@
+ };
+
+ gpio5: gpio@e6055000 {
+- compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055000 0 0x50>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+--
+2.19.0
+
diff --git a/patches/0374-ARM-dts-r8a7791-Use-R-Car-GPIO-Gen2-fallback-compat-.patch b/patches/0374-ARM-dts-r8a7791-Use-R-Car-GPIO-Gen2-fallback-compat-.patch
new file mode 100644
index 0000000..946a19e
--- /dev/null
+++ b/patches/0374-ARM-dts-r8a7791-Use-R-Car-GPIO-Gen2-fallback-compat-.patch
@@ -0,0 +1,101 @@
+From a0fed110964f7f05148f04c0af71efb0c54fc1de Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Fri, 13 Oct 2017 14:33:06 +0200
+Subject: [PATCH 0374/1795] ARM: dts: r8a7791: Use R-Car GPIO Gen2 fallback
+ compat string
+
+Use newly added R-Car GPIO Gen2 fallback compat string
+in place of now deprecated non-generation specific
+R-Car GPIO fallback compat string in the DT of the r8a7791 SoC.
+
+This should have no run-time effect as the driver matches against
+the per-SoC compat string before considering the fallback compat string.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 7140383d59fc590b9f52e4133e8454603c76bb78)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7791.dtsi | 16 ++++++++--------
+ 1 file changed, 8 insertions(+), 8 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
+index 97bed8253bc3..3c7b919efa48 100644
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -124,7 +124,7 @@
+ };
+
+ gpio0: gpio@e6050000 {
+- compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6050000 0 0x50>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -138,7 +138,7 @@
+ };
+
+ gpio1: gpio@e6051000 {
+- compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6051000 0 0x50>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -152,7 +152,7 @@
+ };
+
+ gpio2: gpio@e6052000 {
+- compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6052000 0 0x50>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -166,7 +166,7 @@
+ };
+
+ gpio3: gpio@e6053000 {
+- compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6053000 0 0x50>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -180,7 +180,7 @@
+ };
+
+ gpio4: gpio@e6054000 {
+- compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6054000 0 0x50>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -194,7 +194,7 @@
+ };
+
+ gpio5: gpio@e6055000 {
+- compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055000 0 0x50>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -208,7 +208,7 @@
+ };
+
+ gpio6: gpio@e6055400 {
+- compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055400 0 0x50>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -222,7 +222,7 @@
+ };
+
+ gpio7: gpio@e6055800 {
+- compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055800 0 0x50>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+--
+2.19.0
+
diff --git a/patches/0375-ARM-dts-r8a7792-Use-R-Car-GPIO-Gen2-fallback-compat-.patch b/patches/0375-ARM-dts-r8a7792-Use-R-Car-GPIO-Gen2-fallback-compat-.patch
new file mode 100644
index 0000000..0c8a613
--- /dev/null
+++ b/patches/0375-ARM-dts-r8a7792-Use-R-Car-GPIO-Gen2-fallback-compat-.patch
@@ -0,0 +1,137 @@
+From 9df8c510114f951a67872bed0e8c46b2d4da465f Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Fri, 13 Oct 2017 14:33:07 +0200
+Subject: [PATCH 0375/1795] ARM: dts: r8a7792: Use R-Car GPIO Gen2 fallback
+ compat string
+
+Use newly added R-Car GPIO Gen2 fallback compat string
+in place of now deprecated non-generation specific
+R-Car GPIO fallback compat string in the DT of the r8a7792 SoC.
+
+This should have no run-time effect as the driver matches against
+the per-SoC compat string before considering the fallback compat string.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 7f4a16c4143a99ca4520c565abb07a4fffbae0ff)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7792.dtsi | 24 ++++++++++++------------
+ 1 file changed, 12 insertions(+), 12 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
+index 549eafe8ff12..56570d1ce5f6 100644
+--- a/arch/arm/boot/dts/r8a7792.dtsi
++++ b/arch/arm/boot/dts/r8a7792.dtsi
+@@ -147,7 +147,7 @@
+
+ gpio0: gpio@e6050000 {
+ compatible = "renesas,gpio-r8a7792",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6050000 0 0x50>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -162,7 +162,7 @@
+
+ gpio1: gpio@e6051000 {
+ compatible = "renesas,gpio-r8a7792",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6051000 0 0x50>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -177,7 +177,7 @@
+
+ gpio2: gpio@e6052000 {
+ compatible = "renesas,gpio-r8a7792",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6052000 0 0x50>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -192,7 +192,7 @@
+
+ gpio3: gpio@e6053000 {
+ compatible = "renesas,gpio-r8a7792",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6053000 0 0x50>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -207,7 +207,7 @@
+
+ gpio4: gpio@e6054000 {
+ compatible = "renesas,gpio-r8a7792",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6054000 0 0x50>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -222,7 +222,7 @@
+
+ gpio5: gpio@e6055000 {
+ compatible = "renesas,gpio-r8a7792",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055000 0 0x50>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -237,7 +237,7 @@
+
+ gpio6: gpio@e6055100 {
+ compatible = "renesas,gpio-r8a7792",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055100 0 0x50>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -252,7 +252,7 @@
+
+ gpio7: gpio@e6055200 {
+ compatible = "renesas,gpio-r8a7792",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055200 0 0x50>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -267,7 +267,7 @@
+
+ gpio8: gpio@e6055300 {
+ compatible = "renesas,gpio-r8a7792",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055300 0 0x50>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -282,7 +282,7 @@
+
+ gpio9: gpio@e6055400 {
+ compatible = "renesas,gpio-r8a7792",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055400 0 0x50>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -297,7 +297,7 @@
+
+ gpio10: gpio@e6055500 {
+ compatible = "renesas,gpio-r8a7792",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055500 0 0x50>;
+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -312,7 +312,7 @@
+
+ gpio11: gpio@e6055600 {
+ compatible = "renesas,gpio-r8a7792",
+- "renesas,gpio-rcar";
++ "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055600 0 0x50>;
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+--
+2.19.0
+
diff --git a/patches/0376-ARM-dts-r8a7793-Use-R-Car-GPIO-Gen2-fallback-compat-.patch b/patches/0376-ARM-dts-r8a7793-Use-R-Car-GPIO-Gen2-fallback-compat-.patch
new file mode 100644
index 0000000..cfa6688
--- /dev/null
+++ b/patches/0376-ARM-dts-r8a7793-Use-R-Car-GPIO-Gen2-fallback-compat-.patch
@@ -0,0 +1,101 @@
+From fab2272b7cde0df3c5a40d58b6441067d08609a9 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Fri, 13 Oct 2017 14:33:08 +0200
+Subject: [PATCH 0376/1795] ARM: dts: r8a7793: Use R-Car GPIO Gen2 fallback
+ compat string
+
+Use newly added R-Car GPIO Gen2 fallback compat string
+in place of now deprecated non-generation specific
+R-Car GPIO fallback compat string in the DT of the r8a7793 SoC.
+
+This should have no run-time effect as the driver matches against
+the per-SoC compat string before considering the fallback compat string.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit c37417dca041d76a66a78012f93e9a3c879706c4)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7793.dtsi | 16 ++++++++--------
+ 1 file changed, 8 insertions(+), 8 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
+index aa19b93494bf..76418c375a10 100644
+--- a/arch/arm/boot/dts/r8a7793.dtsi
++++ b/arch/arm/boot/dts/r8a7793.dtsi
+@@ -115,7 +115,7 @@
+ };
+
+ gpio0: gpio@e6050000 {
+- compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6050000 0 0x50>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -129,7 +129,7 @@
+ };
+
+ gpio1: gpio@e6051000 {
+- compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6051000 0 0x50>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -143,7 +143,7 @@
+ };
+
+ gpio2: gpio@e6052000 {
+- compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6052000 0 0x50>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -157,7 +157,7 @@
+ };
+
+ gpio3: gpio@e6053000 {
+- compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6053000 0 0x50>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -171,7 +171,7 @@
+ };
+
+ gpio4: gpio@e6054000 {
+- compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6054000 0 0x50>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -185,7 +185,7 @@
+ };
+
+ gpio5: gpio@e6055000 {
+- compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055000 0 0x50>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -199,7 +199,7 @@
+ };
+
+ gpio6: gpio@e6055400 {
+- compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055400 0 0x50>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -213,7 +213,7 @@
+ };
+
+ gpio7: gpio@e6055800 {
+- compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055800 0 0x50>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+--
+2.19.0
+
diff --git a/patches/0377-ARM-dts-r8a7794-Use-R-Car-GPIO-Gen2-fallback-compat-.patch b/patches/0377-ARM-dts-r8a7794-Use-R-Car-GPIO-Gen2-fallback-compat-.patch
new file mode 100644
index 0000000..2cde4e4
--- /dev/null
+++ b/patches/0377-ARM-dts-r8a7794-Use-R-Car-GPIO-Gen2-fallback-compat-.patch
@@ -0,0 +1,92 @@
+From 69f4f9a7fb4c8167e026ef0f20ae2794a5fd9a0d Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Fri, 13 Oct 2017 14:33:09 +0200
+Subject: [PATCH 0377/1795] ARM: dts: r8a7794: Use R-Car GPIO Gen2 fallback
+ compat string
+
+Use newly added R-Car GPIO Gen2 fallback compat string
+in place of now deprecated non-generation specific
+R-Car GPIO fallback compat string in the DT of the r8a7794 SoC.
+
+This should have no run-time effect as the driver matches against
+the per-SoC compat string before considering the fallback compat string.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 7ee06c8a0b3a1fad3d9660da00e895aaf784fdee)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7794.dtsi | 14 +++++++-------
+ 1 file changed, 7 insertions(+), 7 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
+index 19cff0dd90cf..7720a6ca8702 100644
+--- a/arch/arm/boot/dts/r8a7794.dtsi
++++ b/arch/arm/boot/dts/r8a7794.dtsi
+@@ -82,7 +82,7 @@
+ };
+
+ gpio0: gpio@e6050000 {
+- compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6050000 0 0x50>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -96,7 +96,7 @@
+ };
+
+ gpio1: gpio@e6051000 {
+- compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6051000 0 0x50>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -110,7 +110,7 @@
+ };
+
+ gpio2: gpio@e6052000 {
+- compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6052000 0 0x50>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -124,7 +124,7 @@
+ };
+
+ gpio3: gpio@e6053000 {
+- compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6053000 0 0x50>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -138,7 +138,7 @@
+ };
+
+ gpio4: gpio@e6054000 {
+- compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6054000 0 0x50>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -152,7 +152,7 @@
+ };
+
+ gpio5: gpio@e6055000 {
+- compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055000 0 0x50>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -166,7 +166,7 @@
+ };
+
+ gpio6: gpio@e6055400 {
+- compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
++ compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
+ reg = <0 0xe6055400 0 0x50>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+--
+2.19.0
+
diff --git a/patches/0378-ARM-dts-r8a73a4-Add-clock-for-CA15-CPU0-core.patch b/patches/0378-ARM-dts-r8a73a4-Add-clock-for-CA15-CPU0-core.patch
new file mode 100644
index 0000000..6e00d0a
--- /dev/null
+++ b/patches/0378-ARM-dts-r8a73a4-Add-clock-for-CA15-CPU0-core.patch
@@ -0,0 +1,33 @@
+From c3bcbf251d600d2aa5c561a8ba939b454baa5d3e Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 12 Oct 2017 11:35:06 +0200
+Subject: [PATCH 0378/1795] ARM: dts: r8a73a4: Add clock for CA15 CPU0 core
+
+Improve hardware description by adding a clocks property to the device
+node corresponding to the primary CA15 CPU core, which is for now the
+only one described.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit a7869a5bc82682ac31452e178b4b3e9f8b48e7df)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a73a4.dtsi | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
+index 310222634570..dd4d09712a2a 100644
+--- a/arch/arm/boot/dts/r8a73a4.dtsi
++++ b/arch/arm/boot/dts/r8a73a4.dtsi
+@@ -27,6 +27,7 @@
+ device_type = "cpu";
+ compatible = "arm,cortex-a15";
+ reg = <0>;
++ clocks = <&cpg_clocks R8A73A4_CLK_Z>;
+ clock-frequency = <1500000000>;
+ power-domains = <&pd_a2sl>;
+ next-level-cache = <&L2_CA15>;
+--
+2.19.0
+
diff --git a/patches/0379-ARM-dts-r8a7743-Add-missing-clock-for-secondary-CA15.patch b/patches/0379-ARM-dts-r8a7743-Add-missing-clock-for-secondary-CA15.patch
new file mode 100644
index 0000000..52a3ae5
--- /dev/null
+++ b/patches/0379-ARM-dts-r8a7743-Add-missing-clock-for-secondary-CA15.patch
@@ -0,0 +1,35 @@
+From 5cd5a2d51ab0b63cf42907e2240e537575793874 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 12 Oct 2017 11:35:07 +0200
+Subject: [PATCH 0379/1795] ARM: dts: r8a7743: Add missing clock for secondary
+ CA15 CPU core
+
+Currently only the primary CPU in the CA15 cluster has a clocks
+property, while the secondary CPU core is driven by the same clock.
+Add the missing clocks property to fix this.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit a60ddf507dda0ede43b72d348283d8725a5a83c7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7743.dtsi | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
+index f29f15d4d659..4db4f61be25a 100644
+--- a/arch/arm/boot/dts/r8a7743.dtsi
++++ b/arch/arm/boot/dts/r8a7743.dtsi
+@@ -63,6 +63,7 @@
+ compatible = "arm,cortex-a15";
+ reg = <1>;
+ clock-frequency = <1500000000>;
++ clocks = <&cpg CPG_CORE R8A7743_CLK_Z>;
+ power-domains = <&sysc R8A7743_PD_CA15_CPU1>;
+ next-level-cache = <&L2_CA15>;
+ };
+--
+2.19.0
+
diff --git a/patches/0380-ARM-dts-r8a7778-Add-clock-for-CA9-CPU-core.patch b/patches/0380-ARM-dts-r8a7778-Add-clock-for-CA9-CPU-core.patch
new file mode 100644
index 0000000..f6f502b
--- /dev/null
+++ b/patches/0380-ARM-dts-r8a7778-Add-clock-for-CA9-CPU-core.patch
@@ -0,0 +1,32 @@
+From 959a804bf0129e6aa6f36446563555f93ad82040 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 12 Oct 2017 11:35:08 +0200
+Subject: [PATCH 0380/1795] ARM: dts: r8a7778: Add clock for CA9 CPU core
+
+Improve hardware description by adding a clock property to the device
+node corresponding to the CA9 CPU core.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d3e865a35a4f8cee0d0b86d7cd6d05908f01a874)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7778.dtsi | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
+index a31817b2dda7..a39472aab867 100644
+--- a/arch/arm/boot/dts/r8a7778.dtsi
++++ b/arch/arm/boot/dts/r8a7778.dtsi
+@@ -33,6 +33,7 @@
+ compatible = "arm,cortex-a9";
+ reg = <0>;
+ clock-frequency = <800000000>;
++ clocks = <&z_clk>;
+ };
+ };
+
+--
+2.19.0
+
diff --git a/patches/0381-ARM-dts-r8a7779-Add-clocks-for-CA9-CPU-cores.patch b/patches/0381-ARM-dts-r8a7779-Add-clocks-for-CA9-CPU-cores.patch
new file mode 100644
index 0000000..fa15ef3
--- /dev/null
+++ b/patches/0381-ARM-dts-r8a7779-Add-clocks-for-CA9-CPU-cores.patch
@@ -0,0 +1,55 @@
+From 3833771167d6331d84b32c43c0cc78a80514d7c5 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 12 Oct 2017 11:35:09 +0200
+Subject: [PATCH 0381/1795] ARM: dts: r8a7779: Add clocks for CA9 CPU cores
+
+Improve hardware description by adding clocks properties to the device
+nodes corresponding to the CA9 CPU cores.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit fa9f95a3d1bf827e7b83310e5e5c83f36382e25f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7779.dtsi | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
+index ccef2cfab6e0..e8eb94748b27 100644
+--- a/arch/arm/boot/dts/r8a7779.dtsi
++++ b/arch/arm/boot/dts/r8a7779.dtsi
+@@ -29,12 +29,14 @@
+ compatible = "arm,cortex-a9";
+ reg = <0>;
+ clock-frequency = <1000000000>;
++ clocks = <&cpg_clocks R8A7779_CLK_Z>;
+ };
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <1>;
+ clock-frequency = <1000000000>;
++ clocks = <&cpg_clocks R8A7779_CLK_Z>;
+ power-domains = <&sysc R8A7779_PD_ARM1>;
+ };
+ cpu@2 {
+@@ -42,6 +44,7 @@
+ compatible = "arm,cortex-a9";
+ reg = <2>;
+ clock-frequency = <1000000000>;
++ clocks = <&cpg_clocks R8A7779_CLK_Z>;
+ power-domains = <&sysc R8A7779_PD_ARM2>;
+ };
+ cpu@3 {
+@@ -49,6 +52,7 @@
+ compatible = "arm,cortex-a9";
+ reg = <3>;
+ clock-frequency = <1000000000>;
++ clocks = <&cpg_clocks R8A7779_CLK_Z>;
+ power-domains = <&sysc R8A7779_PD_ARM3>;
+ };
+ };
+--
+2.19.0
+
diff --git a/patches/0382-ARM-dts-r8a7790-Add-missing-clocks-for-secondary-CA1.patch b/patches/0382-ARM-dts-r8a7790-Add-missing-clocks-for-secondary-CA1.patch
new file mode 100644
index 0000000..060afd3
--- /dev/null
+++ b/patches/0382-ARM-dts-r8a7790-Add-missing-clocks-for-secondary-CA1.patch
@@ -0,0 +1,51 @@
+From 72ee2e263237758876cb92c39c7d5ff162f85176 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 12 Oct 2017 11:35:10 +0200
+Subject: [PATCH 0382/1795] ARM: dts: r8a7790: Add missing clocks for secondary
+ CA15 CPU cores
+
+Currently only the primary CPU in the CA15 cluster has a clocks
+property, while the secondary CPU cores are driven by the same clock.
+Add the missing clocks properties to fix this.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Tested-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit aa4c2fdf495f000fa9ae57c073c0c4575c21983e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7790.dtsi | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
+index f247beb3863f..e85eb42f97e8 100644
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -72,6 +72,7 @@
+ compatible = "arm,cortex-a15";
+ reg = <1>;
+ clock-frequency = <1300000000>;
++ clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
+ power-domains = <&sysc R8A7790_PD_CA15_CPU1>;
+ next-level-cache = <&L2_CA15>;
+ capacity-dmips-mhz = <1024>;
+@@ -82,6 +83,7 @@
+ compatible = "arm,cortex-a15";
+ reg = <2>;
+ clock-frequency = <1300000000>;
++ clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
+ power-domains = <&sysc R8A7790_PD_CA15_CPU2>;
+ next-level-cache = <&L2_CA15>;
+ capacity-dmips-mhz = <1024>;
+@@ -92,6 +94,7 @@
+ compatible = "arm,cortex-a15";
+ reg = <3>;
+ clock-frequency = <1300000000>;
++ clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
+ power-domains = <&sysc R8A7790_PD_CA15_CPU3>;
+ next-level-cache = <&L2_CA15>;
+ capacity-dmips-mhz = <1024>;
+--
+2.19.0
+
diff --git a/patches/0383-ARM-dts-r8a7790-Add-clocks-for-CA7-CPU-cores.patch b/patches/0383-ARM-dts-r8a7790-Add-clocks-for-CA7-CPU-cores.patch
new file mode 100644
index 0000000..326fe21
--- /dev/null
+++ b/patches/0383-ARM-dts-r8a7790-Add-clocks-for-CA7-CPU-cores.patch
@@ -0,0 +1,58 @@
+From 7ef8ec38176b6ac2b13053b9fdc62339baca234b Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 12 Oct 2017 11:35:11 +0200
+Subject: [PATCH 0383/1795] ARM: dts: r8a7790: Add clocks for CA7 CPU cores
+
+Currently only the CPU cores in the CA15 cluster have clocks properties.
+Add the missing clocks properties for the CPU cores in the CA7 cluster
+to fix this.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Tested-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit aea0089ae8058a9bf4c9766f3208809fc28c99f0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7790.dtsi | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
+index e85eb42f97e8..2f017fee4009 100644
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -105,6 +105,7 @@
+ compatible = "arm,cortex-a7";
+ reg = <0x100>;
+ clock-frequency = <780000000>;
++ clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
+ power-domains = <&sysc R8A7790_PD_CA7_CPU0>;
+ next-level-cache = <&L2_CA7>;
+ capacity-dmips-mhz = <539>;
+@@ -115,6 +116,7 @@
+ compatible = "arm,cortex-a7";
+ reg = <0x101>;
+ clock-frequency = <780000000>;
++ clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
+ power-domains = <&sysc R8A7790_PD_CA7_CPU1>;
+ next-level-cache = <&L2_CA7>;
+ capacity-dmips-mhz = <539>;
+@@ -125,6 +127,7 @@
+ compatible = "arm,cortex-a7";
+ reg = <0x102>;
+ clock-frequency = <780000000>;
++ clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
+ power-domains = <&sysc R8A7790_PD_CA7_CPU2>;
+ next-level-cache = <&L2_CA7>;
+ capacity-dmips-mhz = <539>;
+@@ -135,6 +138,7 @@
+ compatible = "arm,cortex-a7";
+ reg = <0x103>;
+ clock-frequency = <780000000>;
++ clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
+ power-domains = <&sysc R8A7790_PD_CA7_CPU3>;
+ next-level-cache = <&L2_CA7>;
+ capacity-dmips-mhz = <539>;
+--
+2.19.0
+
diff --git a/patches/0384-ARM-dts-r8a7791-Add-missing-clock-for-secondary-CA15.patch b/patches/0384-ARM-dts-r8a7791-Add-missing-clock-for-secondary-CA15.patch
new file mode 100644
index 0000000..60ec42e
--- /dev/null
+++ b/patches/0384-ARM-dts-r8a7791-Add-missing-clock-for-secondary-CA15.patch
@@ -0,0 +1,34 @@
+From e3bcee14abab1ed64763806f05be4c5d4a38d396 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 12 Oct 2017 11:35:12 +0200
+Subject: [PATCH 0384/1795] ARM: dts: r8a7791: Add missing clock for secondary
+ CA15 CPU core
+
+Currently only the primary CPU in the CA15 cluster has a clocks
+property, while the secondary CPU core is driven by the same clock.
+Add the missing clocks property to fix this.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 60b672fe7e28358c1cffdab4724b203f6cf2901b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7791.dtsi | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
+index 3c7b919efa48..67831d0405f3 100644
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -70,6 +70,7 @@
+ compatible = "arm,cortex-a15";
+ reg = <1>;
+ clock-frequency = <1500000000>;
++ clocks = <&cpg CPG_CORE R8A7791_CLK_Z>;
+ power-domains = <&sysc R8A7791_PD_CA15_CPU1>;
+ next-level-cache = <&L2_CA15>;
+ };
+--
+2.19.0
+
diff --git a/patches/0385-ARM-dts-r8a7792-Add-missing-clock-for-secondary-CA15.patch b/patches/0385-ARM-dts-r8a7792-Add-missing-clock-for-secondary-CA15.patch
new file mode 100644
index 0000000..3b69b48
--- /dev/null
+++ b/patches/0385-ARM-dts-r8a7792-Add-missing-clock-for-secondary-CA15.patch
@@ -0,0 +1,34 @@
+From 0724ed943b0fb5e49864b39a3435e6ea6bc7a7cf Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 12 Oct 2017 11:35:13 +0200
+Subject: [PATCH 0385/1795] ARM: dts: r8a7792: Add missing clock for secondary
+ CA15 CPU core
+
+Currently only the primary CPU in the CA15 cluster has a clocks
+property, while the secondary CPU core is driven by the same clock.
+Add the missing clocks property to fix this.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 8684a24caa3d59d9ba03f1e6f9653b49ac78ec04)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7792.dtsi | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
+index 56570d1ce5f6..131f65b0426e 100644
+--- a/arch/arm/boot/dts/r8a7792.dtsi
++++ b/arch/arm/boot/dts/r8a7792.dtsi
+@@ -56,6 +56,7 @@
+ compatible = "arm,cortex-a15";
+ reg = <1>;
+ clock-frequency = <1000000000>;
++ clocks = <&cpg CPG_CORE R8A7792_CLK_Z>;
+ power-domains = <&sysc R8A7792_PD_CA15_CPU1>;
+ next-level-cache = <&L2_CA15>;
+ };
+--
+2.19.0
+
diff --git a/patches/0386-ARM-dts-r8a7793-Add-missing-clock-for-secondary-CA15.patch b/patches/0386-ARM-dts-r8a7793-Add-missing-clock-for-secondary-CA15.patch
new file mode 100644
index 0000000..1964eef
--- /dev/null
+++ b/patches/0386-ARM-dts-r8a7793-Add-missing-clock-for-secondary-CA15.patch
@@ -0,0 +1,34 @@
+From 34eca55947a67ffae3e8e0a5a58d819dc1e8ad8b Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 12 Oct 2017 11:35:14 +0200
+Subject: [PATCH 0386/1795] ARM: dts: r8a7793: Add missing clock for secondary
+ CA15 CPU core
+
+Currently only the primary CPU in the CA15 cluster has a clocks
+property, while the secondary CPU core is driven by the same clock.
+Add the missing clocks property to fix this.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit f359fd3bba71176a122939fe3db9c7f20000d3f0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7793.dtsi | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
+index 76418c375a10..58eae569b4e0 100644
+--- a/arch/arm/boot/dts/r8a7793.dtsi
++++ b/arch/arm/boot/dts/r8a7793.dtsi
+@@ -62,6 +62,7 @@
+ compatible = "arm,cortex-a15";
+ reg = <1>;
+ clock-frequency = <1500000000>;
++ clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;
+ power-domains = <&sysc R8A7793_PD_CA15_CPU1>;
+ };
+
+--
+2.19.0
+
diff --git a/patches/0387-ARM-dts-r8a7794-Add-missing-clock-for-secondary-CA7-.patch b/patches/0387-ARM-dts-r8a7794-Add-missing-clock-for-secondary-CA7-.patch
new file mode 100644
index 0000000..d01cf22
--- /dev/null
+++ b/patches/0387-ARM-dts-r8a7794-Add-missing-clock-for-secondary-CA7-.patch
@@ -0,0 +1,34 @@
+From 6a57903ef929d211486385240e3dbd8169541d37 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 12 Oct 2017 11:35:15 +0200
+Subject: [PATCH 0387/1795] ARM: dts: r8a7794: Add missing clock for secondary
+ CA7 CPU core
+
+Currently only the primary CPU in the CA7 cluster has a clocks property,
+while the secondary CPU core is driven by the same clock.
+Add the missing clocks property to fix this.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 5614e69269232da1f378e5be92714b96cdb090ef)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7794.dtsi | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
+index 7720a6ca8702..905e50c9b524 100644
+--- a/arch/arm/boot/dts/r8a7794.dtsi
++++ b/arch/arm/boot/dts/r8a7794.dtsi
+@@ -53,6 +53,7 @@
+ compatible = "arm,cortex-a7";
+ reg = <1>;
+ clock-frequency = <1000000000>;
++ clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>;
+ power-domains = <&sysc R8A7794_PD_CA7_CPU1>;
+ next-level-cache = <&L2_CA7>;
+ };
+--
+2.19.0
+
diff --git a/patches/0388-ARM-dts-sh73a0-Add-clocks-for-CA9-CPU-cores.patch b/patches/0388-ARM-dts-sh73a0-Add-clocks-for-CA9-CPU-cores.patch
new file mode 100644
index 0000000..ba15a4a
--- /dev/null
+++ b/patches/0388-ARM-dts-sh73a0-Add-clocks-for-CA9-CPU-cores.patch
@@ -0,0 +1,40 @@
+From b8c2322b1e1bc578b6d4ef3926c23ced487ddaf5 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 12 Oct 2017 11:35:16 +0200
+Subject: [PATCH 0388/1795] ARM: dts: sh73a0: Add clocks for CA9 CPU cores
+
+Improve hardware description by adding clocks properties to the device
+nodes corresponding to the CA9 CPU cores.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e5042d0b97be6a831f9f204f3574d73b3f947fa5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/sh73a0.dtsi | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
+index 5fc24d4c2d5d..52e63075fdb4 100644
+--- a/arch/arm/boot/dts/sh73a0.dtsi
++++ b/arch/arm/boot/dts/sh73a0.dtsi
+@@ -27,6 +27,7 @@
+ compatible = "arm,cortex-a9";
+ reg = <0>;
+ clock-frequency = <1196000000>;
++ clocks = <&cpg_clocks SH73A0_CLK_Z>;
+ power-domains = <&pd_a2sl>;
+ next-level-cache = <&L2>;
+ };
+@@ -35,6 +36,7 @@
+ compatible = "arm,cortex-a9";
+ reg = <1>;
+ clock-frequency = <1196000000>;
++ clocks = <&cpg_clocks SH73A0_CLK_Z>;
+ power-domains = <&pd_a2sl>;
+ next-level-cache = <&L2>;
+ };
+--
+2.19.0
+
diff --git a/patches/0389-ARM-dts-r7s72100-Add-clock-for-CA9-CPU-core.patch b/patches/0389-ARM-dts-r7s72100-Add-clock-for-CA9-CPU-core.patch
new file mode 100644
index 0000000..5a590ba
--- /dev/null
+++ b/patches/0389-ARM-dts-r7s72100-Add-clock-for-CA9-CPU-core.patch
@@ -0,0 +1,32 @@
+From 76f08dc4d7b846f57e585be8591a7b8aebb3c4a7 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 12 Oct 2017 11:35:05 +0200
+Subject: [PATCH 0389/1795] ARM: dts: r7s72100: Add clock for CA9 CPU core
+
+Improve hardware description by adding a clock property to the device
+node corresponding to the CA9 CPU core.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit f20d89ac0fefad2465e6ce6d64e9ff82e33889dd)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r7s72100.dtsi | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
+index 4ed12a4d9d51..ab9645a42eca 100644
+--- a/arch/arm/boot/dts/r7s72100.dtsi
++++ b/arch/arm/boot/dts/r7s72100.dtsi
+@@ -203,6 +203,7 @@
+ compatible = "arm,cortex-a9";
+ reg = <0>;
+ clock-frequency = <400000000>;
++ clocks = <&cpg_clocks R7S72100_CLK_I>;
+ next-level-cache = <&L2>;
+ };
+ };
+--
+2.19.0
+
diff --git a/patches/0390-ARM-dts-r8a7743-Add-xhci-support-to-SoC-dtsi.patch b/patches/0390-ARM-dts-r8a7743-Add-xhci-support-to-SoC-dtsi.patch
new file mode 100644
index 0000000..c0ae641
--- /dev/null
+++ b/patches/0390-ARM-dts-r8a7743-Add-xhci-support-to-SoC-dtsi.patch
@@ -0,0 +1,51 @@
+From 60fe245dd40e51d86fece5c0f2d307e64f1044f7 Mon Sep 17 00:00:00 2001
+From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Date: Mon, 16 Oct 2017 11:12:49 +0100
+Subject: [PATCH 0390/1795] ARM: dts: r8a7743: Add xhci support to SoC dtsi
+
+Add node for xhci. Boards DT files will enable it if needed.
+
+Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit b6d3b649441936621c87b79bff8dd436e2397e3c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7743.dtsi | 20 ++++++++++++++++++++
+ 1 file changed, 20 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
+index 4db4f61be25a..7bbba4a36f31 100644
+--- a/arch/arm/boot/dts/r8a7743.dtsi
++++ b/arch/arm/boot/dts/r8a7743.dtsi
+@@ -932,6 +932,26 @@
+ status = "disabled";
+ };
+
++ /*
++ * pci1 and xhci share the same phy, therefore only one of them
++ * can be active at any one time. If both of them are enabled,
++ * a race condition will determine who'll control the phy.
++ * A firmware file is needed by the xhci driver in order for
++ * USB 3.0 to work properly.
++ */
++ xhci: usb@ee000000 {
++ compatible = "renesas,xhci-r8a7743",
++ "renesas,rcar-gen2-xhci";
++ reg = <0 0xee000000 0 0xc00>;
++ interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 328>;
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ resets = <&cpg 328>;
++ phys = <&usb2 1>;
++ phy-names = "usb";
++ status = "disabled";
++ };
++
+ sdhi0: sd@ee100000 {
+ compatible = "renesas,sdhi-r8a7743";
+ reg = <0 0xee100000 0 0x328>;
+--
+2.19.0
+
diff --git a/patches/0391-ARM-shmobile-pm-rmobile-Use-GENPD_FLAG_ACTIVE_WAKEUP.patch b/patches/0391-ARM-shmobile-pm-rmobile-Use-GENPD_FLAG_ACTIVE_WAKEUP.patch
new file mode 100644
index 0000000..47382f8
--- /dev/null
+++ b/patches/0391-ARM-shmobile-pm-rmobile-Use-GENPD_FLAG_ACTIVE_WAKEUP.patch
@@ -0,0 +1,47 @@
+From 65f83a72556e167909fe7e962b369d93b466ef61 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Tue, 7 Nov 2017 13:48:12 +0100
+Subject: [PATCH 0391/1795] ARM: shmobile: pm-rmobile: Use
+ GENPD_FLAG_ACTIVE_WAKEUP
+
+Set the newly introduced GENPD_FLAG_ACTIVE_WAKEUP, which allows to
+remove the driver's own "always true" callback.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
+Acked-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+(cherry picked from commit eb0ddf9dd22be098301ab8a09e9be5a13ae8c804)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/mach-shmobile/pm-rmobile.c | 8 +-------
+ 1 file changed, 1 insertion(+), 7 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/pm-rmobile.c b/arch/arm/mach-shmobile/pm-rmobile.c
+index 3a4ed4c33a68..e348bcfe389d 100644
+--- a/arch/arm/mach-shmobile/pm-rmobile.c
++++ b/arch/arm/mach-shmobile/pm-rmobile.c
+@@ -120,18 +120,12 @@ static int rmobile_pd_power_up(struct generic_pm_domain *genpd)
+ return __rmobile_pd_power_up(to_rmobile_pd(genpd), true);
+ }
+
+-static bool rmobile_pd_active_wakeup(struct device *dev)
+-{
+- return true;
+-}
+-
+ static void rmobile_init_pm_domain(struct rmobile_pm_domain *rmobile_pd)
+ {
+ struct generic_pm_domain *genpd = &rmobile_pd->genpd;
+ struct dev_power_governor *gov = rmobile_pd->gov;
+
+- genpd->flags |= GENPD_FLAG_PM_CLK;
+- genpd->dev_ops.active_wakeup = rmobile_pd_active_wakeup;
++ genpd->flags |= GENPD_FLAG_PM_CLK | GENPD_FLAG_ACTIVE_WAKEUP;
+ genpd->power_off = rmobile_pd_power_down;
+ genpd->power_on = rmobile_pd_power_up;
+ genpd->attach_dev = cpg_mstp_attach_dev;
+--
+2.19.0
+
diff --git a/patches/0392-ARM-dts-r8a779x-Add-reset-cells-in-cpg-mssr.patch b/patches/0392-ARM-dts-r8a779x-Add-reset-cells-in-cpg-mssr.patch
new file mode 100644
index 0000000..0f13a0e
--- /dev/null
+++ b/patches/0392-ARM-dts-r8a779x-Add-reset-cells-in-cpg-mssr.patch
@@ -0,0 +1,88 @@
+From ad495deef5a3262d7e1f50edd2e74787fdeb326f Mon Sep 17 00:00:00 2001
+From: Arnd Bergmann <arnd@arndb.de>
+Date: Thu, 16 Nov 2017 14:35:57 +0100
+Subject: [PATCH 0392/1795] ARM: dts: r8a779x: Add '#reset-cells' in cpg-mssr
+
+With the latest dtc, we get many warnings about the missing
+'#reset-cells' property in these controllers, e.g.:
+
+arch/arm/boot/dts/r8a7790-lager.dtb: Warning (resets_property): Missing property '#reset-cells' in node /clock-controller@e6150000 or bad phandle (referred from /can@e6e80000:resets[0])
+arch/arm/boot/dts/r8a7792-blanche.dtb: Warning (resets_property): Missing property '#reset-cells' in node /soc/clock-controller@e6150000 or bad phandle (referred from /soc/dma-controller@e6700000:resets[0])
+arch/arm/boot/dts/r8a7792-wheat.dtb: Warning (resets_property): Missing property '#reset-cells' in node /soc/clock-controller@e6150000 or bad phandle (referred from /soc/ethernet@e6800000:resets[0])
+arch/arm/boot/dts/r8a7793-gose.dtb: Warning (resets_property): Missing property '#reset-cells' in node /clock-controller@e6150000 or bad phandle (referred from /gpio@e6050000:resets[0])
+arch/arm/boot/dts/r8a7794-alt.dtb: Warning (resets_property): Missing property '#reset-cells' in node /clock-controller@e6150000 or bad phandle (referred from /i2c@e6500000:resets[0])
+arch/arm/boot/dts/r8a7794-silk.dtb: Warning (resets_property): Missing property '#reset-cells' in node /clock-controller@e6150000 or bad phandle (referred from /interrupt-controller@e61c0000:resets[0])
+
+This adds it for the three r8a779x chips that were lacking it. The
+binding mandates this as <1>, so this is the value I use.
+
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+[geert: Add fix for r8a7793.dtsi]
+Fixes: 34fbd2b12761d111 ("ARM: dts: r8a7790: Add reset control properties")
+Fixes: 6e11a322f1d7505d ("ARM: dts: r8a7792: Add reset control properties")
+Fixes: 84fb19e1d201ba86 ("ARM: dts: r8a7793: Add reset control properties")
+Fixes: 615beb759ca494a4 ("ARM: dts: r8a7794: Add reset control properties")
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 098f53050154498876ef3febde706ff5c8b25cf4)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/boot/dts/r8a7790.dtsi | 1 +
+ arch/arm/boot/dts/r8a7792.dtsi | 1 +
+ arch/arm/boot/dts/r8a7793.dtsi | 1 +
+ arch/arm/boot/dts/r8a7794.dtsi | 1 +
+ 4 files changed, 4 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
+index 2f017fee4009..62baabd757b6 100644
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -1201,6 +1201,7 @@
+ clock-names = "extal", "usb_extal";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
++ #reset-cells = <1>;
+ };
+
+ prr: chipid@ff000044 {
+diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
+index 131f65b0426e..3d080e07374c 100644
+--- a/arch/arm/boot/dts/r8a7792.dtsi
++++ b/arch/arm/boot/dts/r8a7792.dtsi
+@@ -829,6 +829,7 @@
+ clock-names = "extal";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
++ #reset-cells = <1>;
+ };
+ };
+
+diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
+index 58eae569b4e0..0cd1035de1a4 100644
+--- a/arch/arm/boot/dts/r8a7793.dtsi
++++ b/arch/arm/boot/dts/r8a7793.dtsi
+@@ -1088,6 +1088,7 @@
+ clock-names = "extal", "usb_extal";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
++ #reset-cells = <1>;
+ };
+
+ rst: reset-controller@e6160000 {
+diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
+index 905e50c9b524..5643976c1356 100644
+--- a/arch/arm/boot/dts/r8a7794.dtsi
++++ b/arch/arm/boot/dts/r8a7794.dtsi
+@@ -1099,6 +1099,7 @@
+ clock-names = "extal", "usb_extal";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
++ #reset-cells = <1>;
+ };
+
+ rst: reset-controller@e6160000 {
+--
+2.19.0
+
diff --git a/patches/0393-i2c-gpio-Convert-to-use-descriptors.patch b/patches/0393-i2c-gpio-Convert-to-use-descriptors.patch
new file mode 100644
index 0000000..f14ed6d
--- /dev/null
+++ b/patches/0393-i2c-gpio-Convert-to-use-descriptors.patch
@@ -0,0 +1,1548 @@
+From cb5c2d12d354f389b27d466c2e3df1b61385651d Mon Sep 17 00:00:00 2001
+From: Linus Walleij <linus.walleij@linaro.org>
+Date: Sun, 10 Sep 2017 01:30:46 +0200
+Subject: [PATCH 0393/1795] i2c: gpio: Convert to use descriptors
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This converts the GPIO-based I2C-driver to using GPIO
+descriptors instead of the old global numberspace-based
+GPIO interface. We:
+
+- Convert the driver to unconditionally grab two GPIOs
+ from the device by index 0 (SDA) and 1 (SCL) which
+ will work fine with device tree and descriptor tables.
+ The existing device trees will continue to work just
+ like before, but without any roundtrip through the
+ global numberspace.
+
+- Brutally convert all boardfiles still passing global
+ GPIOs by registering descriptor tables associated with
+ the devices instead so this driver does not need to keep
+ supporting passing any GPIO numbers as platform data.
+
+There is no stepwise approach as elegant as this, I
+strongly prefer this big hammer over any antsteps for this
+conversion. This way the old GPIO numbers go away and
+NEVER COME BACK.
+
+Special conversion for the different boards utilizing
+I2C-GPIO:
+
+- EP93xx (arch/arm/mach-ep93xx): pretty straight forward as
+ all boards were using the same two GPIO lines, just define
+ these two in a lookup table for "i2c-gpio" and register
+ these along with the device. None of them define any
+ other platform data so just pass NULL as platform data.
+ This platform selects GPIOLIB so all should be smooth.
+ The pins appear on a gpiochip for bank "G" as pins 1 (SDA)
+ and 0 (SCL).
+
+- IXP4 (arch/arm/mach-ixp4): descriptor tables have to
+ be registered for each board separately. They all use
+ "IXP4XX_GPIO_CHIP" so it is pretty straight forward.
+ Most board define no other platform data than SCL/SDA
+ so they can drop the #include of <linux/i2c-gpio.h> and
+ assign NULL to platform data.
+
+ The "goramo_mlr" (Goramo Multilink Router) board is a bit
+ worrisome: it implements its own I2C bit-banging in the
+ board file, and optionally registers an I2C serial port,
+ but claims the same GPIO lines for itself in the board file.
+ This is not going to work: there will be competition for the
+ GPIO lines, so delete the optional extra I2C bus instead, no
+ I2C devices are registered on it anyway, there are just hints
+ that it may contain an EEPROM that may be accessed from
+ userspace. This needs to be fixed up properly by the serial
+ clock using I2C emulation so drop a note in the code.
+
+- KS8695 board acs5k (arch/arm/mach-ks8695/board-acs5.c)
+ has some platform data in addition to the pins so it needs to
+ be kept around sans GPIO lines. Its GPIO chip is named
+ "KS8695" and the arch selects GPIOLIB.
+
+- PXA boards (arch/arm/mach-pxa/*) use some of the platform
+ data so it needs to be preserved here. The viper board even
+ registers two GPIO I2Cs. The gpiochip is named "gpio-pxa" and
+ the arch selects GPIOLIB.
+
+- SA1100 Simpad (arch/arm/mach-sa1100/simpad.c) defines a GPIO
+ I2C bus, and the arch selects GPIOLIB.
+
+- Blackfin boards (arch/blackfin/bf533 etc) for these I assume
+ their I2C GPIOs refer to the local gpiochip defined in
+ arch/blackfin/kernel/bfin_gpio.c names "BFIN-GPIO".
+ The arch selects GPIOLIB. The boards get spiked with
+ IF_ENABLED(I2C_GPIO) but that is a side effect of it
+ being like that already (I would just have Kconfig select
+ I2C_GPIO and get rid of them all.) I also delete any
+ platform data set to 0 as it will get that value anyway
+ from static declartions of platform data.
+
+- The MIPS selects GPIOLIB and the Alchemy machine is using
+ two local GPIO chips, one of them has a GPIO I2C. We need
+ to adjust the local offset from the global number space here.
+ The ATH79 has a proper GPIO driver in drivers/gpio/gpio-ath79.c
+ and AFAICT the chip is named "ath79-gpio" and the PB44
+ PCF857x expander spawns from this on GPIO 1 and 0. The latter
+ board only use the platform data to specify pins so it can be
+ cut altogether after this.
+
+- The MFD Silicon Motion SM501 is a special case. It dynamically
+ spawns an I2C bus off the MFD using sm501_create_subdev().
+ We use an approach to dynamically create a machine descriptor
+ table and attach this to the "SM501-LOW" or "SM501-HIGH"
+ gpiochip. We use chip-local offsets to grab the right lines.
+ We can get rid of two local static inline helpers as part
+ of this refactoring.
+
+Cc: Steven Miao <realmz6@gmail.com>
+Cc: Ralf Baechle <ralf@linux-mips.org>
+Cc: Guenter Roeck <linux@roeck-us.net>
+Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Cc: Magnus Damm <magnus.damm@gmail.com>
+Cc: Ben Dooks <ben.dooks@codethink.co.uk>
+Cc: Heiko Schocher <hs@denx.de>
+Acked-by: Wu, Aaron <Aaron.Wu@analog.com>
+Acked-by: Olof Johansson <olof@lixom.net>
+Acked-by: Lee Jones <lee.jones@linaro.org>
+Acked-by: Ralf Baechle <ralf@linux-mips.org>
+Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit b2e63555592f81331c8da3afaa607d8cf83e8138)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/mach-ep93xx/core.c | 39 +++---
+ arch/arm/mach-ep93xx/edb93xx.c | 15 +--
+ arch/arm/mach-ep93xx/include/mach/platform.h | 4 +-
+ arch/arm/mach-ep93xx/simone.c | 12 +-
+ arch/arm/mach-ep93xx/snappercl15.c | 12 +-
+ arch/arm/mach-ep93xx/vision_ep9307.c | 7 +-
+ arch/arm/mach-ixp4xx/avila-setup.c | 17 ++-
+ arch/arm/mach-ixp4xx/dsmg600-setup.c | 16 ++-
+ arch/arm/mach-ixp4xx/fsg-setup.c | 16 ++-
+ arch/arm/mach-ixp4xx/goramo_mlr.c | 24 +---
+ arch/arm/mach-ixp4xx/ixdp425-setup.c | 16 ++-
+ arch/arm/mach-ixp4xx/nas100d-setup.c | 16 ++-
+ arch/arm/mach-ixp4xx/nslu2-setup.c | 16 ++-
+ arch/arm/mach-ks8695/board-acs5k.c | 13 +-
+ arch/arm/mach-pxa/palmz72.c | 12 +-
+ arch/arm/mach-pxa/viper.c | 27 +++-
+ arch/arm/mach-sa1100/simpad.c | 12 +-
+ arch/blackfin/mach-bf533/boards/blackstamp.c | 19 ++-
+ arch/blackfin/mach-bf533/boards/ezkit.c | 18 ++-
+ arch/blackfin/mach-bf533/boards/stamp.c | 18 ++-
+ arch/blackfin/mach-bf561/boards/ezkit.c | 18 ++-
+ arch/mips/alchemy/board-gpr.c | 19 ++-
+ arch/mips/ath79/mach-pb44.c | 16 ++-
+ drivers/i2c/busses/i2c-gpio.c | 134 +++++++++----------
+ drivers/mfd/sm501.c | 49 ++++---
+ include/linux/i2c-gpio.h | 4 -
+ 26 files changed, 327 insertions(+), 242 deletions(-)
+
+diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
+index f53c61813998..7e99fe829ad1 100644
+--- a/arch/arm/mach-ep93xx/core.c
++++ b/arch/arm/mach-ep93xx/core.c
+@@ -31,7 +31,7 @@
+ #include <linux/amba/serial.h>
+ #include <linux/mtd/physmap.h>
+ #include <linux/i2c.h>
+-#include <linux/i2c-gpio.h>
++#include <linux/gpio/machine.h>
+ #include <linux/spi/spi.h>
+ #include <linux/export.h>
+ #include <linux/irqchip/arm-vic.h>
+@@ -320,42 +320,45 @@ void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
+ /*************************************************************************
+ * EP93xx i2c peripheral handling
+ *************************************************************************/
+-static struct i2c_gpio_platform_data ep93xx_i2c_data;
++
++/* All EP93xx devices use the same two GPIO pins for I2C bit-banging */
++static struct gpiod_lookup_table ep93xx_i2c_gpiod_table = {
++ .dev_id = "i2c-gpio",
++ .table = {
++ /* Use local offsets on gpiochip/port "G" */
++ GPIO_LOOKUP_IDX("G", 1, NULL, 0, GPIO_ACTIVE_HIGH),
++ GPIO_LOOKUP_IDX("G", 0, NULL, 1, GPIO_ACTIVE_HIGH),
++ },
++};
+
+ static struct platform_device ep93xx_i2c_device = {
+ .name = "i2c-gpio",
+ .id = 0,
+ .dev = {
+- .platform_data = &ep93xx_i2c_data,
++ .platform_data = NULL,
+ },
+ };
+
+ /**
+ * ep93xx_register_i2c - Register the i2c platform device.
+- * @data: platform specific i2c-gpio configuration (__initdata)
+ * @devices: platform specific i2c bus device information (__initdata)
+ * @num: the number of devices on the i2c bus
+ */
+-void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
+- struct i2c_board_info *devices, int num)
++void __init ep93xx_register_i2c(struct i2c_board_info *devices, int num)
+ {
+ /*
+- * Set the EEPROM interface pin drive type control.
+- * Defines the driver type for the EECLK and EEDAT pins as either
+- * open drain, which will require an external pull-up, or a normal
+- * CMOS driver.
++ * FIXME: this just sets the two pins as non-opendrain, as no
++ * platforms tries to do that anyway. Flag the applicable lines
++ * as open drain in the GPIO_LOOKUP above and the driver or
++ * gpiolib will handle open drain/open drain emulation as need
++ * be. Right now i2c-gpio emulates open drain which is not
++ * optimal.
+ */
+- if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT)
+- pr_warning("sda != EEDAT, open drain has no effect\n");
+- if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK)
+- pr_warning("scl != EECLK, open drain has no effect\n");
+-
+- __raw_writel((data->sda_is_open_drain << 1) |
+- (data->scl_is_open_drain << 0),
++ __raw_writel((0 << 1) | (0 << 0),
+ EP93XX_GPIO_EEDRIVE);
+
+- ep93xx_i2c_data = *data;
+ i2c_register_board_info(0, devices, num);
++ gpiod_add_lookup_table(&ep93xx_i2c_gpiod_table);
+ platform_device_register(&ep93xx_i2c_device);
+ }
+
+diff --git a/arch/arm/mach-ep93xx/edb93xx.c b/arch/arm/mach-ep93xx/edb93xx.c
+index 7a7f280b07d7..8e89ec8b6f0f 100644
+--- a/arch/arm/mach-ep93xx/edb93xx.c
++++ b/arch/arm/mach-ep93xx/edb93xx.c
+@@ -28,7 +28,6 @@
+ #include <linux/init.h>
+ #include <linux/platform_device.h>
+ #include <linux/i2c.h>
+-#include <linux/i2c-gpio.h>
+ #include <linux/spi/spi.h>
+
+ #include <sound/cs4271.h>
+@@ -61,14 +60,6 @@ static struct ep93xx_eth_data __initdata edb93xx_eth_data = {
+ /*************************************************************************
+ * EDB93xx i2c peripheral handling
+ *************************************************************************/
+-static struct i2c_gpio_platform_data __initdata edb93xx_i2c_gpio_data = {
+- .sda_pin = EP93XX_GPIO_LINE_EEDAT,
+- .sda_is_open_drain = 0,
+- .scl_pin = EP93XX_GPIO_LINE_EECLK,
+- .scl_is_open_drain = 0,
+- .udelay = 0, /* default to 100 kHz */
+- .timeout = 0, /* default to 100 ms */
+-};
+
+ static struct i2c_board_info __initdata edb93xxa_i2c_board_info[] = {
+ {
+@@ -86,13 +77,11 @@ static void __init edb93xx_register_i2c(void)
+ {
+ if (machine_is_edb9302a() || machine_is_edb9307a() ||
+ machine_is_edb9315a()) {
+- ep93xx_register_i2c(&edb93xx_i2c_gpio_data,
+- edb93xxa_i2c_board_info,
++ ep93xx_register_i2c(edb93xxa_i2c_board_info,
+ ARRAY_SIZE(edb93xxa_i2c_board_info));
+ } else if (machine_is_edb9302() || machine_is_edb9307()
+ || machine_is_edb9312() || machine_is_edb9315()) {
+- ep93xx_register_i2c(&edb93xx_i2c_gpio_data,
+- edb93xx_i2c_board_info,
++ ep93xx_register_i2c(edb93xx_i2c_board_info,
+ ARRAY_SIZE(edb93xx_i2c_board_info));
+ }
+ }
+diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h
+index 3bbe1591013e..6c41c794bed5 100644
+--- a/arch/arm/mach-ep93xx/include/mach/platform.h
++++ b/arch/arm/mach-ep93xx/include/mach/platform.h
+@@ -8,7 +8,6 @@
+ #include <linux/reboot.h>
+
+ struct device;
+-struct i2c_gpio_platform_data;
+ struct i2c_board_info;
+ struct spi_board_info;
+ struct platform_device;
+@@ -37,8 +36,7 @@ void ep93xx_register_flash(unsigned int width,
+ resource_size_t start, resource_size_t size);
+
+ void ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr);
+-void ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
+- struct i2c_board_info *devices, int num);
++void ep93xx_register_i2c(struct i2c_board_info *devices, int num);
+ void ep93xx_register_spi(struct ep93xx_spi_info *info,
+ struct spi_board_info *devices, int num);
+ void ep93xx_register_fb(struct ep93xxfb_mach_info *data);
+diff --git a/arch/arm/mach-ep93xx/simone.c b/arch/arm/mach-ep93xx/simone.c
+index c7a40f245892..e61f3dee24c2 100644
+--- a/arch/arm/mach-ep93xx/simone.c
++++ b/arch/arm/mach-ep93xx/simone.c
+@@ -19,7 +19,6 @@
+ #include <linux/init.h>
+ #include <linux/platform_device.h>
+ #include <linux/i2c.h>
+-#include <linux/i2c-gpio.h>
+ #include <linux/mmc/host.h>
+ #include <linux/spi/spi.h>
+ #include <linux/spi/mmc_spi.h>
+@@ -129,15 +128,6 @@ static struct ep93xx_spi_info simone_spi_info __initdata = {
+ .use_dma = 1,
+ };
+
+-static struct i2c_gpio_platform_data __initdata simone_i2c_gpio_data = {
+- .sda_pin = EP93XX_GPIO_LINE_EEDAT,
+- .sda_is_open_drain = 0,
+- .scl_pin = EP93XX_GPIO_LINE_EECLK,
+- .scl_is_open_drain = 0,
+- .udelay = 0,
+- .timeout = 0,
+-};
+-
+ static struct i2c_board_info __initdata simone_i2c_board_info[] = {
+ {
+ I2C_BOARD_INFO("ds1337", 0x68),
+@@ -161,7 +151,7 @@ static void __init simone_init_machine(void)
+ ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_8M);
+ ep93xx_register_eth(&simone_eth_data, 1);
+ ep93xx_register_fb(&simone_fb_info);
+- ep93xx_register_i2c(&simone_i2c_gpio_data, simone_i2c_board_info,
++ ep93xx_register_i2c(simone_i2c_board_info,
+ ARRAY_SIZE(simone_i2c_board_info));
+ ep93xx_register_spi(&simone_spi_info, simone_spi_devices,
+ ARRAY_SIZE(simone_spi_devices));
+diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c
+index 8b29398f4dc7..45940c1d7787 100644
+--- a/arch/arm/mach-ep93xx/snappercl15.c
++++ b/arch/arm/mach-ep93xx/snappercl15.c
+@@ -21,7 +21,6 @@
+ #include <linux/init.h>
+ #include <linux/io.h>
+ #include <linux/i2c.h>
+-#include <linux/i2c-gpio.h>
+ #include <linux/fb.h>
+
+ #include <linux/mtd/partitions.h>
+@@ -127,15 +126,6 @@ static struct ep93xx_eth_data __initdata snappercl15_eth_data = {
+ .phy_id = 1,
+ };
+
+-static struct i2c_gpio_platform_data __initdata snappercl15_i2c_gpio_data = {
+- .sda_pin = EP93XX_GPIO_LINE_EEDAT,
+- .sda_is_open_drain = 0,
+- .scl_pin = EP93XX_GPIO_LINE_EECLK,
+- .scl_is_open_drain = 0,
+- .udelay = 0,
+- .timeout = 0,
+-};
+-
+ static struct i2c_board_info __initdata snappercl15_i2c_data[] = {
+ {
+ /* Audio codec */
+@@ -161,7 +151,7 @@ static void __init snappercl15_init_machine(void)
+ {
+ ep93xx_init_devices();
+ ep93xx_register_eth(&snappercl15_eth_data, 1);
+- ep93xx_register_i2c(&snappercl15_i2c_gpio_data, snappercl15_i2c_data,
++ ep93xx_register_i2c(snappercl15_i2c_data,
+ ARRAY_SIZE(snappercl15_i2c_data));
+ ep93xx_register_fb(&snappercl15_fb_info);
+ snappercl15_register_audio();
+diff --git a/arch/arm/mach-ep93xx/vision_ep9307.c b/arch/arm/mach-ep93xx/vision_ep9307.c
+index 1daf9441058c..5a0b6187990a 100644
+--- a/arch/arm/mach-ep93xx/vision_ep9307.c
++++ b/arch/arm/mach-ep93xx/vision_ep9307.c
+@@ -22,7 +22,6 @@
+ #include <linux/io.h>
+ #include <linux/mtd/partitions.h>
+ #include <linux/i2c.h>
+-#include <linux/i2c-gpio.h>
+ #include <linux/platform_data/pca953x.h>
+ #include <linux/spi/spi.h>
+ #include <linux/spi/flash.h>
+@@ -144,10 +143,6 @@ static struct pca953x_platform_data pca953x_77_gpio_data = {
+ /*************************************************************************
+ * I2C Bus
+ *************************************************************************/
+-static struct i2c_gpio_platform_data vision_i2c_gpio_data __initdata = {
+- .sda_pin = EP93XX_GPIO_LINE_EEDAT,
+- .scl_pin = EP93XX_GPIO_LINE_EECLK,
+-};
+
+ static struct i2c_board_info vision_i2c_info[] __initdata = {
+ {
+@@ -289,7 +284,7 @@ static void __init vision_init_machine(void)
+
+ vision_i2c_info[1].irq = gpio_to_irq(EP93XX_GPIO_LINE_F(7));
+
+- ep93xx_register_i2c(&vision_i2c_gpio_data, vision_i2c_info,
++ ep93xx_register_i2c(vision_i2c_info,
+ ARRAY_SIZE(vision_i2c_info));
+ ep93xx_register_spi(&vision_spi_master, vision_spi_board_info,
+ ARRAY_SIZE(vision_spi_board_info));
+diff --git a/arch/arm/mach-ixp4xx/avila-setup.c b/arch/arm/mach-ixp4xx/avila-setup.c
+index 186df64ceae7..c80f02ecfe6d 100644
+--- a/arch/arm/mach-ixp4xx/avila-setup.c
++++ b/arch/arm/mach-ixp4xx/avila-setup.c
+@@ -18,7 +18,7 @@
+ #include <linux/serial.h>
+ #include <linux/tty.h>
+ #include <linux/serial_8250.h>
+-#include <linux/i2c-gpio.h>
++#include <linux/gpio/machine.h>
+ #include <asm/types.h>
+ #include <asm/setup.h>
+ #include <asm/memory.h>
+@@ -50,16 +50,21 @@ static struct platform_device avila_flash = {
+ .resource = &avila_flash_resource,
+ };
+
+-static struct i2c_gpio_platform_data avila_i2c_gpio_data = {
+- .sda_pin = AVILA_SDA_PIN,
+- .scl_pin = AVILA_SCL_PIN,
++static struct gpiod_lookup_table avila_i2c_gpiod_table = {
++ .dev_id = "i2c-gpio",
++ .table = {
++ GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", AVILA_SDA_PIN,
++ NULL, 0, GPIO_ACTIVE_HIGH),
++ GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", AVILA_SCL_PIN,
++ NULL, 1, GPIO_ACTIVE_HIGH),
++ },
+ };
+
+ static struct platform_device avila_i2c_gpio = {
+ .name = "i2c-gpio",
+ .id = 0,
+ .dev = {
+- .platform_data = &avila_i2c_gpio_data,
++ .platform_data = NULL,
+ },
+ };
+
+@@ -148,6 +153,8 @@ static void __init avila_init(void)
+ avila_flash_resource.end =
+ IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
+
++ gpiod_add_lookup_table(&avila_i2c_gpiod_table);
++
+ platform_add_devices(avila_devices, ARRAY_SIZE(avila_devices));
+
+ avila_pata_resources[0].start = IXP4XX_EXP_BUS_BASE(1);
+diff --git a/arch/arm/mach-ixp4xx/dsmg600-setup.c b/arch/arm/mach-ixp4xx/dsmg600-setup.c
+index db488ecc98b5..270b09d0d205 100644
+--- a/arch/arm/mach-ixp4xx/dsmg600-setup.c
++++ b/arch/arm/mach-ixp4xx/dsmg600-setup.c
+@@ -26,7 +26,7 @@
+ #include <linux/leds.h>
+ #include <linux/reboot.h>
+ #include <linux/i2c.h>
+-#include <linux/i2c-gpio.h>
++#include <linux/gpio/machine.h>
+
+ #include <mach/hardware.h>
+
+@@ -69,16 +69,21 @@ static struct platform_device dsmg600_flash = {
+ .resource = &dsmg600_flash_resource,
+ };
+
+-static struct i2c_gpio_platform_data dsmg600_i2c_gpio_data = {
+- .sda_pin = DSMG600_SDA_PIN,
+- .scl_pin = DSMG600_SCL_PIN,
++static struct gpiod_lookup_table dsmg600_i2c_gpiod_table = {
++ .dev_id = "i2c-gpio",
++ .table = {
++ GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", DSMG600_SDA_PIN,
++ NULL, 0, GPIO_ACTIVE_HIGH),
++ GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", DSMG600_SCL_PIN,
++ NULL, 1, GPIO_ACTIVE_HIGH),
++ },
+ };
+
+ static struct platform_device dsmg600_i2c_gpio = {
+ .name = "i2c-gpio",
+ .id = 0,
+ .dev = {
+- .platform_data = &dsmg600_i2c_gpio_data,
++ .platform_data = NULL,
+ },
+ };
+
+@@ -270,6 +275,7 @@ static void __init dsmg600_init(void)
+ dsmg600_flash_resource.end =
+ IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
+
++ gpiod_add_lookup_table(&dsmg600_i2c_gpiod_table);
+ i2c_register_board_info(0, dsmg600_i2c_board_info,
+ ARRAY_SIZE(dsmg600_i2c_board_info));
+
+diff --git a/arch/arm/mach-ixp4xx/fsg-setup.c b/arch/arm/mach-ixp4xx/fsg-setup.c
+index 6e32cbc4f590..73c72eaeb034 100644
+--- a/arch/arm/mach-ixp4xx/fsg-setup.c
++++ b/arch/arm/mach-ixp4xx/fsg-setup.c
+@@ -23,7 +23,7 @@
+ #include <linux/leds.h>
+ #include <linux/reboot.h>
+ #include <linux/i2c.h>
+-#include <linux/i2c-gpio.h>
++#include <linux/gpio/machine.h>
+ #include <linux/io.h>
+ #include <asm/mach-types.h>
+ #include <asm/mach/arch.h>
+@@ -55,16 +55,21 @@ static struct platform_device fsg_flash = {
+ .resource = &fsg_flash_resource,
+ };
+
+-static struct i2c_gpio_platform_data fsg_i2c_gpio_data = {
+- .sda_pin = FSG_SDA_PIN,
+- .scl_pin = FSG_SCL_PIN,
++static struct gpiod_lookup_table fsg_i2c_gpiod_table = {
++ .dev_id = "i2c-gpio",
++ .table = {
++ GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", FSG_SDA_PIN,
++ NULL, 0, GPIO_ACTIVE_HIGH),
++ GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", FSG_SCL_PIN,
++ NULL, 1, GPIO_ACTIVE_HIGH),
++ },
+ };
+
+ static struct platform_device fsg_i2c_gpio = {
+ .name = "i2c-gpio",
+ .id = 0,
+ .dev = {
+- .platform_data = &fsg_i2c_gpio_data,
++ .platform_data = NULL,
+ },
+ };
+
+@@ -197,6 +202,7 @@ static void __init fsg_init(void)
+ /* Configure CS2 for operation, 8bit and writable */
+ *IXP4XX_EXP_CS2 = 0xbfff0002;
+
++ gpiod_add_lookup_table(&fsg_i2c_gpiod_table);
+ i2c_register_board_info(0, fsg_i2c_board_info,
+ ARRAY_SIZE(fsg_i2c_board_info));
+
+diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c
+index 145ec5c1b0eb..4d805080020e 100644
+--- a/arch/arm/mach-ixp4xx/goramo_mlr.c
++++ b/arch/arm/mach-ixp4xx/goramo_mlr.c
+@@ -7,7 +7,6 @@
+ #include <linux/delay.h>
+ #include <linux/gpio.h>
+ #include <linux/hdlc.h>
+-#include <linux/i2c-gpio.h>
+ #include <linux/io.h>
+ #include <linux/irq.h>
+ #include <linux/kernel.h>
+@@ -79,6 +78,12 @@
+ static u32 hw_bits = 0xFFFFFFFD; /* assume all hardware present */;
+ static u8 control_value;
+
++/*
++ * FIXME: this is reimplementing I2C bit-bangining. Move this
++ * over to using driver/i2c/busses/i2c-gpio.c like all other boards
++ * and register proper I2C device(s) on the bus for this. (See
++ * other IXP4xx boards for examples.)
++ */
+ static void set_scl(u8 value)
+ {
+ gpio_set_value(GPIO_SCL, !!value);
+@@ -217,20 +222,6 @@ static struct platform_device device_flash = {
+ .resource = &flash_resource,
+ };
+
+-
+-/* I^2C interface */
+-static struct i2c_gpio_platform_data i2c_data = {
+- .sda_pin = GPIO_SDA,
+- .scl_pin = GPIO_SCL,
+-};
+-
+-static struct platform_device device_i2c = {
+- .name = "i2c-gpio",
+- .id = 0,
+- .dev = { .platform_data = &i2c_data },
+-};
+-
+-
+ /* IXP425 2 UART ports */
+ static struct resource uart_resources[] = {
+ {
+@@ -412,9 +403,6 @@ static void __init gmlr_init(void)
+ if (hw_bits & CFG_HW_HAS_HSS1)
+ device_tab[devices++] = &device_hss_tab[1]; /* max index 5 */
+
+- if (hw_bits & CFG_HW_HAS_EEPROM)
+- device_tab[devices++] = &device_i2c; /* max index 6 */
+-
+ gpio_request(GPIO_SCL, "SCL/clock");
+ gpio_request(GPIO_SDA, "SDA/data");
+ gpio_request(GPIO_STR, "strobe");
+diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c
+index 8f5e01527b1b..917af44c5780 100644
+--- a/arch/arm/mach-ixp4xx/ixdp425-setup.c
++++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c
+@@ -15,7 +15,7 @@
+ #include <linux/serial.h>
+ #include <linux/tty.h>
+ #include <linux/serial_8250.h>
+-#include <linux/i2c-gpio.h>
++#include <linux/gpio/machine.h>
+ #include <linux/io.h>
+ #include <linux/mtd/mtd.h>
+ #include <linux/mtd/rawnand.h>
+@@ -123,16 +123,21 @@ static struct platform_device ixdp425_flash_nand = {
+ };
+ #endif /* CONFIG_MTD_NAND_PLATFORM */
+
+-static struct i2c_gpio_platform_data ixdp425_i2c_gpio_data = {
+- .sda_pin = IXDP425_SDA_PIN,
+- .scl_pin = IXDP425_SCL_PIN,
++static struct gpiod_lookup_table ixdp425_i2c_gpiod_table = {
++ .dev_id = "i2c-gpio",
++ .table = {
++ GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", IXDP425_SDA_PIN,
++ NULL, 0, GPIO_ACTIVE_HIGH),
++ GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", IXDP425_SCL_PIN,
++ NULL, 1, GPIO_ACTIVE_HIGH),
++ },
+ };
+
+ static struct platform_device ixdp425_i2c_gpio = {
+ .name = "i2c-gpio",
+ .id = 0,
+ .dev = {
+- .platform_data = &ixdp425_i2c_gpio_data,
++ .platform_data = NULL,
+ },
+ };
+
+@@ -246,6 +251,7 @@ static void __init ixdp425_init(void)
+ ixdp425_uart_data[1].flags = 0;
+ }
+
++ gpiod_add_lookup_table(&ixdp425_i2c_gpiod_table);
+ platform_add_devices(ixdp425_devices, ARRAY_SIZE(ixdp425_devices));
+ }
+
+diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c
+index 1b8170d65c74..6c57b74cd703 100644
+--- a/arch/arm/mach-ixp4xx/nas100d-setup.c
++++ b/arch/arm/mach-ixp4xx/nas100d-setup.c
+@@ -28,7 +28,7 @@
+ #include <linux/leds.h>
+ #include <linux/reboot.h>
+ #include <linux/i2c.h>
+-#include <linux/i2c-gpio.h>
++#include <linux/gpio/machine.h>
+ #include <linux/io.h>
+ #include <asm/mach-types.h>
+ #include <asm/mach/arch.h>
+@@ -101,16 +101,21 @@ static struct platform_device nas100d_leds = {
+ .dev.platform_data = &nas100d_led_data,
+ };
+
+-static struct i2c_gpio_platform_data nas100d_i2c_gpio_data = {
+- .sda_pin = NAS100D_SDA_PIN,
+- .scl_pin = NAS100D_SCL_PIN,
++static struct gpiod_lookup_table nas100d_i2c_gpiod_table = {
++ .dev_id = "i2c-gpio",
++ .table = {
++ GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", NAS100D_SDA_PIN,
++ NULL, 0, GPIO_ACTIVE_HIGH),
++ GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", NAS100D_SCL_PIN,
++ NULL, 1, GPIO_ACTIVE_HIGH),
++ },
+ };
+
+ static struct platform_device nas100d_i2c_gpio = {
+ .name = "i2c-gpio",
+ .id = 0,
+ .dev = {
+- .platform_data = &nas100d_i2c_gpio_data,
++ .platform_data = NULL,
+ },
+ };
+
+@@ -281,6 +286,7 @@ static void __init nas100d_init(void)
+ nas100d_flash_resource.end =
+ IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
+
++ gpiod_add_lookup_table(&nas100d_i2c_gpiod_table);
+ i2c_register_board_info(0, nas100d_i2c_board_info,
+ ARRAY_SIZE(nas100d_i2c_board_info));
+
+diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c
+index bd8dc65b4ffc..3bc4c69b8479 100644
+--- a/arch/arm/mach-ixp4xx/nslu2-setup.c
++++ b/arch/arm/mach-ixp4xx/nslu2-setup.c
+@@ -25,7 +25,7 @@
+ #include <linux/leds.h>
+ #include <linux/reboot.h>
+ #include <linux/i2c.h>
+-#include <linux/i2c-gpio.h>
++#include <linux/gpio/machine.h>
+ #include <linux/io.h>
+ #include <asm/mach-types.h>
+ #include <asm/mach/arch.h>
+@@ -69,9 +69,14 @@ static struct platform_device nslu2_flash = {
+ .resource = &nslu2_flash_resource,
+ };
+
+-static struct i2c_gpio_platform_data nslu2_i2c_gpio_data = {
+- .sda_pin = NSLU2_SDA_PIN,
+- .scl_pin = NSLU2_SCL_PIN,
++static struct gpiod_lookup_table nslu2_i2c_gpiod_table = {
++ .dev_id = "i2c-gpio",
++ .table = {
++ GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", NSLU2_SDA_PIN,
++ NULL, 0, GPIO_ACTIVE_HIGH),
++ GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", NSLU2_SCL_PIN,
++ NULL, 1, GPIO_ACTIVE_HIGH),
++ },
+ };
+
+ static struct i2c_board_info __initdata nslu2_i2c_board_info [] = {
+@@ -116,7 +121,7 @@ static struct platform_device nslu2_i2c_gpio = {
+ .name = "i2c-gpio",
+ .id = 0,
+ .dev = {
+- .platform_data = &nslu2_i2c_gpio_data,
++ .platform_data = NULL,
+ },
+ };
+
+@@ -251,6 +256,7 @@ static void __init nslu2_init(void)
+ nslu2_flash_resource.end =
+ IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
+
++ gpiod_add_lookup_table(&nslu2_i2c_gpiod_table);
+ i2c_register_board_info(0, nslu2_i2c_board_info,
+ ARRAY_SIZE(nslu2_i2c_board_info));
+
+diff --git a/arch/arm/mach-ks8695/board-acs5k.c b/arch/arm/mach-ks8695/board-acs5k.c
+index e4d709c8ed32..f034724e01e1 100644
+--- a/arch/arm/mach-ks8695/board-acs5k.c
++++ b/arch/arm/mach-ks8695/board-acs5k.c
+@@ -16,7 +16,7 @@
+ #include <linux/interrupt.h>
+ #include <linux/init.h>
+ #include <linux/platform_device.h>
+-
++#include <linux/gpio/machine.h>
+ #include <linux/i2c.h>
+ #include <linux/i2c-algo-bit.h>
+ #include <linux/i2c-gpio.h>
+@@ -38,9 +38,15 @@
+
+ #include "generic.h"
+
++static struct gpiod_lookup_table acs5k_i2c_gpiod_table = {
++ .dev_id = "i2c-gpio",
++ .table = {
++ GPIO_LOOKUP_IDX("KS8695", 4, NULL, 0, GPIO_ACTIVE_HIGH),
++ GPIO_LOOKUP_IDX("KS8695", 5, NULL, 1, GPIO_ACTIVE_HIGH),
++ },
++};
++
+ static struct i2c_gpio_platform_data acs5k_i2c_device_platdata = {
+- .sda_pin = 4,
+- .scl_pin = 5,
+ .udelay = 10,
+ };
+
+@@ -95,6 +101,7 @@ static struct i2c_board_info acs5k_i2c_devs[] __initdata = {
+ static void acs5k_i2c_init(void)
+ {
+ /* The gpio interface */
++ gpiod_add_lookup_table(&acs5k_i2c_gpiod_table);
+ platform_device_register(&acs5k_i2c_device);
+ /* I2C devices */
+ i2c_register_board_info(0, acs5k_i2c_devs,
+diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c
+index 29630061e700..94f75632c007 100644
+--- a/arch/arm/mach-pxa/palmz72.c
++++ b/arch/arm/mach-pxa/palmz72.c
+@@ -31,6 +31,7 @@
+ #include <linux/power_supply.h>
+ #include <linux/usb/gpio_vbus.h>
+ #include <linux/i2c-gpio.h>
++#include <linux/gpio/machine.h>
+
+ #include <asm/mach-types.h>
+ #include <asm/suspend.h>
+@@ -320,9 +321,15 @@ static struct soc_camera_link palmz72_iclink = {
+ .flags = SOCAM_DATAWIDTH_8,
+ };
+
++static struct gpiod_lookup_table palmz72_i2c_gpiod_table = {
++ .dev_id = "i2c-gpio",
++ .table = {
++ GPIO_LOOKUP_IDX("gpio-pxa", 118, NULL, 0, GPIO_ACTIVE_HIGH),
++ GPIO_LOOKUP_IDX("gpio-pxa", 117, NULL, 1, GPIO_ACTIVE_HIGH),
++ },
++};
++
+ static struct i2c_gpio_platform_data palmz72_i2c_bus_data = {
+- .sda_pin = 118,
+- .scl_pin = 117,
+ .udelay = 10,
+ .timeout = 100,
+ };
+@@ -369,6 +376,7 @@ static void __init palmz72_camera_init(void)
+ {
+ palmz72_cam_gpio_init();
+ pxa_set_camera_info(&palmz72_pxacamera_platform_data);
++ gpiod_add_lookup_table(&palmz72_i2c_gpiod_table);
+ platform_device_register(&palmz72_i2c_bus_device);
+ platform_device_register(&palmz72_camera);
+ }
+diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
+index 8e89d91b206b..a680742bee2b 100644
+--- a/arch/arm/mach-pxa/viper.c
++++ b/arch/arm/mach-pxa/viper.c
+@@ -36,6 +36,7 @@
+ #include <linux/gpio.h>
+ #include <linux/jiffies.h>
+ #include <linux/i2c-gpio.h>
++#include <linux/gpio/machine.h>
+ #include <linux/i2c/pxa-i2c.h>
+ #include <linux/serial_8250.h>
+ #include <linux/smc91x.h>
+@@ -458,9 +459,17 @@ static struct platform_device smc91x_device = {
+ };
+
+ /* i2c */
++static struct gpiod_lookup_table viper_i2c_gpiod_table = {
++ .dev_id = "i2c-gpio",
++ .table = {
++ GPIO_LOOKUP_IDX("gpio-pxa", VIPER_RTC_I2C_SDA_GPIO,
++ NULL, 0, GPIO_ACTIVE_HIGH),
++ GPIO_LOOKUP_IDX("gpio-pxa", VIPER_RTC_I2C_SCL_GPIO,
++ NULL, 1, GPIO_ACTIVE_HIGH),
++ },
++};
++
+ static struct i2c_gpio_platform_data i2c_bus_data = {
+- .sda_pin = VIPER_RTC_I2C_SDA_GPIO,
+- .scl_pin = VIPER_RTC_I2C_SCL_GPIO,
+ .udelay = 10,
+ .timeout = HZ,
+ };
+@@ -779,12 +788,20 @@ static int __init viper_tpm_setup(char *str)
+
+ __setup("tpm=", viper_tpm_setup);
+
++struct gpiod_lookup_table viper_tpm_i2c_gpiod_table = {
++ .dev_id = "i2c-gpio",
++ .table = {
++ GPIO_LOOKUP_IDX("gpio-pxa", VIPER_TPM_I2C_SDA_GPIO,
++ NULL, 0, GPIO_ACTIVE_HIGH),
++ GPIO_LOOKUP_IDX("gpio-pxa", VIPER_TPM_I2C_SCL_GPIO,
++ NULL, 1, GPIO_ACTIVE_HIGH),
++ },
++};
++
+ static void __init viper_tpm_init(void)
+ {
+ struct platform_device *tpm_device;
+ struct i2c_gpio_platform_data i2c_tpm_data = {
+- .sda_pin = VIPER_TPM_I2C_SDA_GPIO,
+- .scl_pin = VIPER_TPM_I2C_SCL_GPIO,
+ .udelay = 10,
+ .timeout = HZ,
+ };
+@@ -794,6 +811,7 @@ static void __init viper_tpm_init(void)
+ if (!viper_tpm)
+ return;
+
++ gpiod_add_lookup_table(&viper_tpm_i2c_gpiod_table);
+ tpm_device = platform_device_alloc("i2c-gpio", 2);
+ if (tpm_device) {
+ if (!platform_device_add_data(tpm_device,
+@@ -943,6 +961,7 @@ static void __init viper_init(void)
+ smc91x_device.num_resources--;
+
+ pxa_set_i2c_info(NULL);
++ gpiod_add_lookup_table(&viper_i2c_gpiod_table);
+ pwm_add_table(viper_pwm_lookup, ARRAY_SIZE(viper_pwm_lookup));
+ platform_add_devices(viper_devs, ARRAY_SIZE(viper_devs));
+
+diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c
+index e8d25a7bbcb8..10c7ea426e5b 100644
+--- a/arch/arm/mach-sa1100/simpad.c
++++ b/arch/arm/mach-sa1100/simpad.c
+@@ -17,6 +17,7 @@
+ #include <linux/mtd/partitions.h>
+ #include <linux/io.h>
+ #include <linux/gpio/driver.h>
++#include <linux/gpio/machine.h>
+
+ #include <mach/hardware.h>
+ #include <asm/setup.h>
+@@ -324,9 +325,15 @@ static struct platform_device simpad_gpio_leds = {
+ /*
+ * i2c
+ */
++static struct gpiod_lookup_table simpad_i2c_gpiod_table = {
++ .dev_id = "i2c-gpio",
++ .table = {
++ GPIO_LOOKUP_IDX("gpio", GPIO_GPIO21, NULL, 0, GPIO_ACTIVE_HIGH),
++ GPIO_LOOKUP_IDX("gpio", GPIO_GPIO25, NULL, 1, GPIO_ACTIVE_HIGH),
++ },
++};
++
+ static struct i2c_gpio_platform_data simpad_i2c_data = {
+- .sda_pin = GPIO_GPIO21,
+- .scl_pin = GPIO_GPIO25,
+ .udelay = 10,
+ .timeout = HZ,
+ };
+@@ -381,6 +388,7 @@ static int __init simpad_init(void)
+ ARRAY_SIZE(simpad_flash_resources));
+ sa11x0_register_mcp(&simpad_mcp_data);
+
++ gpiod_add_lookup_table(&simpad_i2c_gpiod_table);
+ ret = platform_add_devices(devices, ARRAY_SIZE(devices));
+ if(ret)
+ printk(KERN_WARNING "simpad: Unable to register mq200 framebuffer device");
+diff --git a/arch/blackfin/mach-bf533/boards/blackstamp.c b/arch/blackfin/mach-bf533/boards/blackstamp.c
+index 0ccf0cf4daaf..d801ca5ca6c4 100644
+--- a/arch/blackfin/mach-bf533/boards/blackstamp.c
++++ b/arch/blackfin/mach-bf533/boards/blackstamp.c
+@@ -22,6 +22,7 @@
+ #include <linux/irq.h>
+ #include <linux/gpio.h>
+ #include <linux/i2c.h>
++#include <linux/gpio/machine.h>
+ #include <asm/dma.h>
+ #include <asm/bfin5xx_spi.h>
+ #include <asm/portmux.h>
+@@ -362,11 +363,17 @@ static struct platform_device bfin_device_gpiokeys = {
+ #if IS_ENABLED(CONFIG_I2C_GPIO)
+ #include <linux/i2c-gpio.h>
+
++static struct gpiod_lookup_table bfin_i2c_gpiod_table = {
++ .dev_id = "i2c-gpio",
++ .table = {
++ GPIO_LOOKUP_IDX("BFIN-GPIO", GPIO_PF8, NULL, 0,
++ GPIO_ACTIVE_HIGH),
++ GPIO_LOOKUP_IDX("BFIN-GPIO", GPIO_PF9, NULL, 1,
++ GPIO_ACTIVE_HIGH),
++ },
++};
++
+ static struct i2c_gpio_platform_data i2c_gpio_data = {
+- .sda_pin = GPIO_PF8,
+- .scl_pin = GPIO_PF9,
+- .sda_is_open_drain = 0,
+- .scl_is_open_drain = 0,
+ .udelay = 40,
+ }; /* This hasn't actually been used these pins
+ * are (currently) free pins on the expansion connector */
+@@ -462,7 +469,9 @@ static int __init blackstamp_init(void)
+ int ret;
+
+ printk(KERN_INFO "%s(): registering device resources\n", __func__);
+-
++#if IS_ENABLED(CONFIG_I2C_GPIO)
++ gpiod_add_lookup_table(&bfin_i2c_gpiod_table);
++#endif
+ i2c_register_board_info(0, bfin_i2c_board_info,
+ ARRAY_SIZE(bfin_i2c_board_info));
+
+diff --git a/arch/blackfin/mach-bf533/boards/ezkit.c b/arch/blackfin/mach-bf533/boards/ezkit.c
+index 3625e9eaa8a8..463a72358b0e 100644
+--- a/arch/blackfin/mach-bf533/boards/ezkit.c
++++ b/arch/blackfin/mach-bf533/boards/ezkit.c
+@@ -19,6 +19,7 @@
+ #endif
+ #include <linux/irq.h>
+ #include <linux/i2c.h>
++#include <linux/gpio/machine.h>
+ #include <asm/dma.h>
+ #include <asm/bfin5xx_spi.h>
+ #include <asm/portmux.h>
+@@ -390,11 +391,17 @@ static struct platform_device bfin_device_gpiokeys = {
+ #if IS_ENABLED(CONFIG_I2C_GPIO)
+ #include <linux/i2c-gpio.h>
+
++static struct gpiod_lookup_table bfin_i2c_gpiod_table = {
++ .dev_id = "i2c-gpio",
++ .table = {
++ GPIO_LOOKUP_IDX("BFIN-GPIO", GPIO_PF1, NULL, 0,
++ GPIO_ACTIVE_HIGH),
++ GPIO_LOOKUP_IDX("BFIN-GPIO", GPIO_PF0, NULL, 1,
++ GPIO_ACTIVE_HIGH),
++ },
++};
++
+ static struct i2c_gpio_platform_data i2c_gpio_data = {
+- .sda_pin = GPIO_PF1,
+- .scl_pin = GPIO_PF0,
+- .sda_is_open_drain = 0,
+- .scl_is_open_drain = 0,
+ .udelay = 40,
+ };
+
+@@ -516,6 +523,9 @@ static struct platform_device *ezkit_devices[] __initdata = {
+ static int __init ezkit_init(void)
+ {
+ printk(KERN_INFO "%s(): registering device resources\n", __func__);
++#if IS_ENABLED(CONFIG_I2C_GPIO)
++ gpiod_add_lookup_table(&bfin_i2c_gpiod_table);
++#endif
+ platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
+ spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
+ i2c_register_board_info(0, bfin_i2c_board_info,
+diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c
+index 23eada79439c..d2479359adb7 100644
+--- a/arch/blackfin/mach-bf533/boards/stamp.c
++++ b/arch/blackfin/mach-bf533/boards/stamp.c
+@@ -21,6 +21,7 @@
+ #include <linux/gpio.h>
+ #include <linux/irq.h>
+ #include <linux/i2c.h>
++#include <linux/gpio/machine.h>
+ #include <asm/dma.h>
+ #include <asm/bfin5xx_spi.h>
+ #include <asm/reboot.h>
+@@ -512,11 +513,17 @@ static struct platform_device bfin_device_gpiokeys = {
+ #if IS_ENABLED(CONFIG_I2C_GPIO)
+ #include <linux/i2c-gpio.h>
+
++static struct gpiod_lookup_table bfin_i2c_gpiod_table = {
++ .dev_id = "i2c-gpio",
++ .table = {
++ GPIO_LOOKUP_IDX("BFIN-GPIO", GPIO_PF2, NULL, 0,
++ GPIO_ACTIVE_HIGH),
++ GPIO_LOOKUP_IDX("BFIN-GPIO", GPIO_PF3, NULL, 1,
++ GPIO_ACTIVE_HIGH),
++ },
++};
++
+ static struct i2c_gpio_platform_data i2c_gpio_data = {
+- .sda_pin = GPIO_PF2,
+- .scl_pin = GPIO_PF3,
+- .sda_is_open_drain = 0,
+- .scl_is_open_drain = 0,
+ .udelay = 10,
+ };
+
+@@ -848,6 +855,9 @@ static int __init stamp_init(void)
+
+ printk(KERN_INFO "%s(): registering device resources\n", __func__);
+
++#if IS_ENABLED(CONFIG_I2C_GPIO)
++ gpiod_add_lookup_table(&bfin_i2c_gpiod_table);
++#endif
+ i2c_register_board_info(0, bfin_i2c_board_info,
+ ARRAY_SIZE(bfin_i2c_board_info));
+
+diff --git a/arch/blackfin/mach-bf561/boards/ezkit.c b/arch/blackfin/mach-bf561/boards/ezkit.c
+index 57d1c43726d9..72f757ebaa84 100644
+--- a/arch/blackfin/mach-bf561/boards/ezkit.c
++++ b/arch/blackfin/mach-bf561/boards/ezkit.c
+@@ -16,6 +16,7 @@
+ #include <linux/interrupt.h>
+ #include <linux/gpio.h>
+ #include <linux/delay.h>
++#include <linux/gpio/machine.h>
+ #include <asm/dma.h>
+ #include <asm/bfin5xx_spi.h>
+ #include <asm/portmux.h>
+@@ -379,11 +380,17 @@ static struct platform_device bfin_device_gpiokeys = {
+ #if IS_ENABLED(CONFIG_I2C_GPIO)
+ #include <linux/i2c-gpio.h>
+
++static struct gpiod_lookup_table bfin_i2c_gpiod_table = {
++ .dev_id = "i2c-gpio",
++ .table = {
++ GPIO_LOOKUP_IDX("BFIN-GPIO", GPIO_PF1, NULL, 0,
++ GPIO_ACTIVE_HIGH),
++ GPIO_LOOKUP_IDX("BFIN-GPIO", GPIO_PF0, NULL, 1,
++ GPIO_ACTIVE_HIGH),
++ },
++};
++
+ static struct i2c_gpio_platform_data i2c_gpio_data = {
+- .sda_pin = GPIO_PF1,
+- .scl_pin = GPIO_PF0,
+- .sda_is_open_drain = 0,
+- .scl_is_open_drain = 0,
+ .udelay = 10,
+ };
+
+@@ -633,6 +640,9 @@ static int __init ezkit_init(void)
+
+ printk(KERN_INFO "%s(): registering device resources\n", __func__);
+
++#if IS_ENABLED(CONFIG_I2C_GPIO)
++ gpiod_add_lookup_table(&bfin_i2c_gpiod_table);
++#endif
+ ret = platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
+ if (ret < 0)
+ return ret;
+diff --git a/arch/mips/alchemy/board-gpr.c b/arch/mips/alchemy/board-gpr.c
+index 6fb6b3faa158..daebc36e5ecb 100644
+--- a/arch/mips/alchemy/board-gpr.c
++++ b/arch/mips/alchemy/board-gpr.c
+@@ -30,6 +30,7 @@
+ #include <linux/gpio.h>
+ #include <linux/i2c.h>
+ #include <linux/i2c-gpio.h>
++#include <linux/gpio/machine.h>
+ #include <asm/bootinfo.h>
+ #include <asm/idle.h>
+ #include <asm/reboot.h>
+@@ -218,10 +219,23 @@ static struct platform_device gpr_led_devices = {
+ /*
+ * I2C
+ */
++static struct gpiod_lookup_table gpr_i2c_gpiod_table = {
++ .dev_id = "i2c-gpio",
++ .table = {
++ /*
++ * This should be on "GPIO2" which has base at 200 so
++ * the global numbers 209 and 210 should correspond to
++ * local offsets 9 and 10.
++ */
++ GPIO_LOOKUP_IDX("alchemy-gpio2", 9, NULL, 0,
++ GPIO_ACTIVE_HIGH),
++ GPIO_LOOKUP_IDX("alchemy-gpio2", 10, NULL, 1,
++ GPIO_ACTIVE_HIGH),
++ },
++};
++
+ static struct i2c_gpio_platform_data gpr_i2c_data = {
+- .sda_pin = 209,
+ .sda_is_open_drain = 1,
+- .scl_pin = 210,
+ .scl_is_open_drain = 1,
+ .udelay = 2, /* ~100 kHz */
+ .timeout = HZ,
+@@ -295,6 +309,7 @@ arch_initcall(gpr_pci_init);
+
+ static int __init gpr_dev_init(void)
+ {
++ gpiod_add_lookup_table(&gpr_i2c_gpiod_table);
+ i2c_register_board_info(0, gpr_i2c_info, ARRAY_SIZE(gpr_i2c_info));
+
+ return platform_add_devices(gpr_devices, ARRAY_SIZE(gpr_devices));
+diff --git a/arch/mips/ath79/mach-pb44.c b/arch/mips/ath79/mach-pb44.c
+index be78298dffb4..a95409063847 100644
+--- a/arch/mips/ath79/mach-pb44.c
++++ b/arch/mips/ath79/mach-pb44.c
+@@ -11,7 +11,7 @@
+ #include <linux/init.h>
+ #include <linux/platform_device.h>
+ #include <linux/i2c.h>
+-#include <linux/i2c-gpio.h>
++#include <linux/gpio/machine.h>
+ #include <linux/platform_data/pcf857x.h>
+
+ #include "machtypes.h"
+@@ -33,16 +33,21 @@
+ #define PB44_KEYS_POLL_INTERVAL 20 /* msecs */
+ #define PB44_KEYS_DEBOUNCE_INTERVAL (3 * PB44_KEYS_POLL_INTERVAL)
+
+-static struct i2c_gpio_platform_data pb44_i2c_gpio_data = {
+- .sda_pin = PB44_GPIO_I2C_SDA,
+- .scl_pin = PB44_GPIO_I2C_SCL,
++static struct gpiod_lookup_table pb44_i2c_gpiod_table = {
++ .dev_id = "i2c-gpio",
++ .table = {
++ GPIO_LOOKUP_IDX("ath79-gpio", PB44_GPIO_I2C_SDA,
++ NULL, 0, GPIO_ACTIVE_HIGH),
++ GPIO_LOOKUP_IDX("ath79-gpio", PB44_GPIO_I2C_SCL,
++ NULL, 1, GPIO_ACTIVE_HIGH),
++ },
+ };
+
+ static struct platform_device pb44_i2c_gpio_device = {
+ .name = "i2c-gpio",
+ .id = 0,
+ .dev = {
+- .platform_data = &pb44_i2c_gpio_data,
++ .platform_data = NULL,
+ }
+ };
+
+@@ -103,6 +108,7 @@ static struct ath79_spi_platform_data pb44_spi_data = {
+
+ static void __init pb44_init(void)
+ {
++ gpiod_add_lookup_table(&pb44_i2c_gpiod_table);
+ i2c_register_board_info(0, pb44_i2c_board_info,
+ ARRAY_SIZE(pb44_i2c_board_info));
+ platform_device_register(&pb44_i2c_gpio_device);
+diff --git a/drivers/i2c/busses/i2c-gpio.c b/drivers/i2c/busses/i2c-gpio.c
+index 0ef8fcc6ac3a..b4664037eded 100644
+--- a/drivers/i2c/busses/i2c-gpio.c
++++ b/drivers/i2c/busses/i2c-gpio.c
+@@ -14,11 +14,12 @@
+ #include <linux/module.h>
+ #include <linux/slab.h>
+ #include <linux/platform_device.h>
+-#include <linux/gpio.h>
++#include <linux/gpio/consumer.h>
+ #include <linux/of.h>
+-#include <linux/of_gpio.h>
+
+ struct i2c_gpio_private_data {
++ struct gpio_desc *sda;
++ struct gpio_desc *scl;
+ struct i2c_adapter adap;
+ struct i2c_algo_bit_data bit_data;
+ struct i2c_gpio_platform_data pdata;
+@@ -27,12 +28,18 @@ struct i2c_gpio_private_data {
+ /* Toggle SDA by changing the direction of the pin */
+ static void i2c_gpio_setsda_dir(void *data, int state)
+ {
+- struct i2c_gpio_platform_data *pdata = data;
+-
++ struct i2c_gpio_private_data *priv = data;
++
++ /*
++ * This is a way of saying "do not drive
++ * me actively high" which means emulating open drain.
++ * The right way to do this is for gpiolib to
++ * handle this, by the function below.
++ */
+ if (state)
+- gpio_direction_input(pdata->sda_pin);
++ gpiod_direction_input(priv->sda);
+ else
+- gpio_direction_output(pdata->sda_pin, 0);
++ gpiod_direction_output(priv->sda, 0);
+ }
+
+ /*
+@@ -42,20 +49,20 @@ static void i2c_gpio_setsda_dir(void *data, int state)
+ */
+ static void i2c_gpio_setsda_val(void *data, int state)
+ {
+- struct i2c_gpio_platform_data *pdata = data;
++ struct i2c_gpio_private_data *priv = data;
+
+- gpio_set_value(pdata->sda_pin, state);
++ gpiod_set_value(priv->sda, state);
+ }
+
+ /* Toggle SCL by changing the direction of the pin. */
+ static void i2c_gpio_setscl_dir(void *data, int state)
+ {
+- struct i2c_gpio_platform_data *pdata = data;
++ struct i2c_gpio_private_data *priv = data;
+
+ if (state)
+- gpio_direction_input(pdata->scl_pin);
++ gpiod_direction_input(priv->scl);
+ else
+- gpio_direction_output(pdata->scl_pin, 0);
++ gpiod_direction_output(priv->scl, 0);
+ }
+
+ /*
+@@ -66,44 +73,23 @@ static void i2c_gpio_setscl_dir(void *data, int state)
+ */
+ static void i2c_gpio_setscl_val(void *data, int state)
+ {
+- struct i2c_gpio_platform_data *pdata = data;
++ struct i2c_gpio_private_data *priv = data;
+
+- gpio_set_value(pdata->scl_pin, state);
++ gpiod_set_value(priv->scl, state);
+ }
+
+ static int i2c_gpio_getsda(void *data)
+ {
+- struct i2c_gpio_platform_data *pdata = data;
++ struct i2c_gpio_private_data *priv = data;
+
+- return gpio_get_value(pdata->sda_pin);
++ return gpiod_get_value(priv->sda);
+ }
+
+ static int i2c_gpio_getscl(void *data)
+ {
+- struct i2c_gpio_platform_data *pdata = data;
++ struct i2c_gpio_private_data *priv = data;
+
+- return gpio_get_value(pdata->scl_pin);
+-}
+-
+-static int of_i2c_gpio_get_pins(struct device_node *np,
+- unsigned int *sda_pin, unsigned int *scl_pin)
+-{
+- if (of_gpio_count(np) < 2)
+- return -ENODEV;
+-
+- *sda_pin = of_get_gpio(np, 0);
+- *scl_pin = of_get_gpio(np, 1);
+-
+- if (*sda_pin == -EPROBE_DEFER || *scl_pin == -EPROBE_DEFER)
+- return -EPROBE_DEFER;
+-
+- if (!gpio_is_valid(*sda_pin) || !gpio_is_valid(*scl_pin)) {
+- pr_err("%pOF: invalid GPIO pins, sda=%d/scl=%d\n",
+- np, *sda_pin, *scl_pin);
+- return -ENODEV;
+- }
+-
+- return 0;
++ return gpiod_get_value(priv->scl);
+ }
+
+ static void of_i2c_gpio_get_props(struct device_node *np,
+@@ -130,64 +116,65 @@ static int i2c_gpio_probe(struct platform_device *pdev)
+ struct i2c_gpio_platform_data *pdata;
+ struct i2c_algo_bit_data *bit_data;
+ struct i2c_adapter *adap;
+- unsigned int sda_pin, scl_pin;
+ int ret;
+
+- /* First get the GPIO pins; if it fails, we'll defer the probe. */
+- if (pdev->dev.of_node) {
+- ret = of_i2c_gpio_get_pins(pdev->dev.of_node,
+- &sda_pin, &scl_pin);
+- if (ret)
+- return ret;
+- } else {
+- if (!dev_get_platdata(&pdev->dev))
+- return -ENXIO;
+- pdata = dev_get_platdata(&pdev->dev);
+- sda_pin = pdata->sda_pin;
+- scl_pin = pdata->scl_pin;
+- }
++ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
++ if (!priv)
++ return -ENOMEM;
+
+- ret = devm_gpio_request(&pdev->dev, sda_pin, "sda");
+- if (ret) {
++ /* First get the GPIO pins; if it fails, we'll defer the probe. */
++ priv->sda = devm_gpiod_get_index(&pdev->dev, NULL, 0, GPIOD_OUT_HIGH);
++ if (IS_ERR(priv->sda)) {
++ ret = PTR_ERR(priv->sda);
++ /* FIXME: hack in the old code, is this really necessary? */
+ if (ret == -EINVAL)
+- ret = -EPROBE_DEFER; /* Try again later */
++ ret = -EPROBE_DEFER;
+ return ret;
+ }
+- ret = devm_gpio_request(&pdev->dev, scl_pin, "scl");
+- if (ret) {
++ priv->scl = devm_gpiod_get_index(&pdev->dev, NULL, 1, GPIOD_OUT_LOW);
++ if (IS_ERR(priv->scl)) {
++ ret = PTR_ERR(priv->scl);
++ /* FIXME: hack in the old code, is this really necessary? */
+ if (ret == -EINVAL)
+- ret = -EPROBE_DEFER; /* Try again later */
++ ret = -EPROBE_DEFER;
+ return ret;
+ }
+
+- priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+- if (!priv)
+- return -ENOMEM;
+ adap = &priv->adap;
+ bit_data = &priv->bit_data;
+ pdata = &priv->pdata;
+
+ if (pdev->dev.of_node) {
+- pdata->sda_pin = sda_pin;
+- pdata->scl_pin = scl_pin;
+ of_i2c_gpio_get_props(pdev->dev.of_node, pdata);
+ } else {
+- memcpy(pdata, dev_get_platdata(&pdev->dev), sizeof(*pdata));
++ /*
++ * If all platform data settings are zero it is OK
++ * to not provide any platform data from the board.
++ */
++ if (dev_get_platdata(&pdev->dev))
++ memcpy(pdata, dev_get_platdata(&pdev->dev),
++ sizeof(*pdata));
+ }
+
++ /*
++ * FIXME: this is a hack emulating the open drain emulation
++ * that gpiolib can already do for us. Make all clients properly
++ * flag their lines as open drain and get rid of this property
++ * and the special callback.
++ */
+ if (pdata->sda_is_open_drain) {
+- gpio_direction_output(pdata->sda_pin, 1);
++ gpiod_direction_output(priv->sda, 1);
+ bit_data->setsda = i2c_gpio_setsda_val;
+ } else {
+- gpio_direction_input(pdata->sda_pin);
++ gpiod_direction_input(priv->sda);
+ bit_data->setsda = i2c_gpio_setsda_dir;
+ }
+
+ if (pdata->scl_is_open_drain || pdata->scl_is_output_only) {
+- gpio_direction_output(pdata->scl_pin, 1);
++ gpiod_direction_output(priv->scl, 1);
+ bit_data->setscl = i2c_gpio_setscl_val;
+ } else {
+- gpio_direction_input(pdata->scl_pin);
++ gpiod_direction_input(priv->scl);
+ bit_data->setscl = i2c_gpio_setscl_dir;
+ }
+
+@@ -207,7 +194,7 @@ static int i2c_gpio_probe(struct platform_device *pdev)
+ else
+ bit_data->timeout = HZ / 10; /* 100 ms */
+
+- bit_data->data = pdata;
++ bit_data->data = priv;
+
+ adap->owner = THIS_MODULE;
+ if (pdev->dev.of_node)
+@@ -227,8 +214,13 @@ static int i2c_gpio_probe(struct platform_device *pdev)
+
+ platform_set_drvdata(pdev, priv);
+
+- dev_info(&pdev->dev, "using pins %u (SDA) and %u (SCL%s)\n",
+- pdata->sda_pin, pdata->scl_pin,
++ /*
++ * FIXME: using global GPIO numbers is not helpful. If/when we
++ * get accessors to get the actual name of the GPIO line,
++ * from the descriptor, then provide that instead.
++ */
++ dev_info(&pdev->dev, "using lines %u (SDA) and %u (SCL%s)\n",
++ desc_to_gpio(priv->sda), desc_to_gpio(priv->scl),
+ pdata->scl_is_output_only
+ ? ", no clock stretching" : "");
+
+diff --git a/drivers/mfd/sm501.c b/drivers/mfd/sm501.c
+index 3270b8dbc949..d67bbb153af4 100644
+--- a/drivers/mfd/sm501.c
++++ b/drivers/mfd/sm501.c
+@@ -20,6 +20,7 @@
+ #include <linux/platform_device.h>
+ #include <linux/pci.h>
+ #include <linux/i2c-gpio.h>
++#include <linux/gpio/machine.h>
+ #include <linux/slab.h>
+
+ #include <linux/sm501.h>
+@@ -1108,14 +1109,6 @@ static void sm501_gpio_remove(struct sm501_devdata *sm)
+ kfree(gpio->regs_res);
+ }
+
+-static inline int sm501_gpio_pin2nr(struct sm501_devdata *sm, unsigned int pin)
+-{
+- struct sm501_gpio *gpio = &sm->gpio;
+- int base = (pin < 32) ? gpio->low.gpio.base : gpio->high.gpio.base;
+-
+- return (pin % 32) + base;
+-}
+-
+ static inline int sm501_gpio_isregistered(struct sm501_devdata *sm)
+ {
+ return sm->gpio.registered;
+@@ -1130,11 +1123,6 @@ static inline void sm501_gpio_remove(struct sm501_devdata *sm)
+ {
+ }
+
+-static inline int sm501_gpio_pin2nr(struct sm501_devdata *sm, unsigned int pin)
+-{
+- return -1;
+-}
+-
+ static inline int sm501_gpio_isregistered(struct sm501_devdata *sm)
+ {
+ return 0;
+@@ -1146,20 +1134,37 @@ static int sm501_register_gpio_i2c_instance(struct sm501_devdata *sm,
+ {
+ struct i2c_gpio_platform_data *icd;
+ struct platform_device *pdev;
++ struct gpiod_lookup_table *lookup;
+
+ pdev = sm501_create_subdev(sm, "i2c-gpio", 0,
+ sizeof(struct i2c_gpio_platform_data));
+ if (!pdev)
+ return -ENOMEM;
+
+- icd = dev_get_platdata(&pdev->dev);
+-
+- /* We keep the pin_sda and pin_scl fields relative in case the
+- * same platform data is passed to >1 SM501.
+- */
++ /* Create a gpiod lookup using gpiochip-local offsets */
++ lookup = devm_kzalloc(&pdev->dev,
++ sizeof(*lookup) + 3 * sizeof(struct gpiod_lookup),
++ GFP_KERNEL);
++ lookup->dev_id = "i2c-gpio";
++ if (iic->pin_sda < 32)
++ lookup->table[0].chip_label = "SM501-LOW";
++ else
++ lookup->table[0].chip_label = "SM501-HIGH";
++ lookup->table[0].chip_hwnum = iic->pin_sda % 32;
++ lookup->table[0].con_id = NULL;
++ lookup->table[0].idx = 0;
++ lookup->table[0].flags = GPIO_ACTIVE_HIGH;
++ if (iic->pin_scl < 32)
++ lookup->table[1].chip_label = "SM501-LOW";
++ else
++ lookup->table[1].chip_label = "SM501-HIGH";
++ lookup->table[1].chip_hwnum = iic->pin_scl % 32;
++ lookup->table[1].con_id = NULL;
++ lookup->table[1].idx = 1;
++ lookup->table[1].flags = GPIO_ACTIVE_HIGH;
++ gpiod_add_lookup_table(lookup);
+
+- icd->sda_pin = sm501_gpio_pin2nr(sm, iic->pin_sda);
+- icd->scl_pin = sm501_gpio_pin2nr(sm, iic->pin_scl);
++ icd = dev_get_platdata(&pdev->dev);
+ icd->timeout = iic->timeout;
+ icd->udelay = iic->udelay;
+
+@@ -1171,9 +1176,9 @@ static int sm501_register_gpio_i2c_instance(struct sm501_devdata *sm,
+
+ pdev->id = iic->bus_num;
+
+- dev_info(sm->dev, "registering i2c-%d: sda=%d (%d), scl=%d (%d)\n",
++ dev_info(sm->dev, "registering i2c-%d: sda=%d, scl=%d\n",
+ iic->bus_num,
+- icd->sda_pin, iic->pin_sda, icd->scl_pin, iic->pin_scl);
++ iic->pin_sda, iic->pin_scl);
+
+ return sm501_register_device(sm, pdev);
+ }
+diff --git a/include/linux/i2c-gpio.h b/include/linux/i2c-gpio.h
+index c1bcb1f1d73b..352c1426fd4d 100644
+--- a/include/linux/i2c-gpio.h
++++ b/include/linux/i2c-gpio.h
+@@ -12,8 +12,6 @@
+
+ /**
+ * struct i2c_gpio_platform_data - Platform-dependent data for i2c-gpio
+- * @sda_pin: GPIO pin ID to use for SDA
+- * @scl_pin: GPIO pin ID to use for SCL
+ * @udelay: signal toggle delay. SCL frequency is (500 / udelay) kHz
+ * @timeout: clock stretching timeout in jiffies. If the slave keeps
+ * SCL low for longer than this, the transfer will time out.
+@@ -26,8 +24,6 @@
+ * @scl_is_output_only: SCL output drivers cannot be turned off.
+ */
+ struct i2c_gpio_platform_data {
+- unsigned int sda_pin;
+- unsigned int scl_pin;
+ int udelay;
+ int timeout;
+ unsigned int sda_is_open_drain:1;
+--
+2.19.0
+
diff --git a/patches/0394-gpio-Make-it-possible-for-consumers-to-enforce-open-.patch b/patches/0394-gpio-Make-it-possible-for-consumers-to-enforce-open-.patch
new file mode 100644
index 0000000..891fdbd
--- /dev/null
+++ b/patches/0394-gpio-Make-it-possible-for-consumers-to-enforce-open-.patch
@@ -0,0 +1,97 @@
+From dfdd0a7f23007b03125d56dd275f67b557b8bdf1 Mon Sep 17 00:00:00 2001
+From: Linus Walleij <linus.walleij@linaro.org>
+Date: Sun, 10 Sep 2017 19:26:22 +0200
+Subject: [PATCH 0394/1795] gpio: Make it possible for consumers to enforce
+ open drain
+
+Some busses, like I2C, strictly need to have the line handled
+as open drain, i.e. not actively driven high. For this reason
+the i2c-gpio.c bit-banged I2C driver is reimplementing open
+drain handling outside of gpiolib.
+
+This is not very optimal. Instead make it possible for a
+consumer to explcitly express that the line must be handled
+as open drain instead of allowing local hacks papering over
+this issue.
+
+The descriptor tables, whether DT, ACPI or board files, should
+of course have flagged these lines as open drain. E.g.:
+enum gpio_lookup_flags GPIO_OPEN_DRAIN for a board file, or
+gpios = <&foo 42 GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN>; in a
+device tree using <dt-bindings/gpio/gpio.h>
+
+But more often than not, these descriptors are wrong. So
+we need to make it possible for consumers to enforce this
+open drain behaviour.
+
+We now have two new enumerated GPIO descriptor config flags:
+GPIOD_OUT_LOW_OPEN_DRAIN and GPIOD_OUT_HIGH_OPEN_DRAIN
+that will set up the lined enforced as open drain as output
+low or high, using open drain (if the driver supports it)
+or using open drain emulation (setting the line as input
+to drive it high) from the gpiolib core.
+
+Cc: linux-gpio@vger.kernel.org
+Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit f926dfc112bc6cf41d7068ee5e3f261e13a5bec8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpio/gpiolib.c | 13 +++++++++++++
+ include/linux/gpio/consumer.h | 6 ++++++
+ 2 files changed, 19 insertions(+)
+
+diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
+index 99d0b3510b54..e7660b708635 100644
+--- a/drivers/gpio/gpiolib.c
++++ b/drivers/gpio/gpiolib.c
+@@ -3268,8 +3268,21 @@ int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
+
+ if (lflags & GPIO_ACTIVE_LOW)
+ set_bit(FLAG_ACTIVE_LOW, &desc->flags);
++
+ if (lflags & GPIO_OPEN_DRAIN)
+ set_bit(FLAG_OPEN_DRAIN, &desc->flags);
++ else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) {
++ /*
++ * This enforces open drain mode from the consumer side.
++ * This is necessary for some busses like I2C, but the lookup
++ * should *REALLY* have specified them as open drain in the
++ * first place, so print a little warning here.
++ */
++ set_bit(FLAG_OPEN_DRAIN, &desc->flags);
++ gpiod_warn(desc,
++ "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n");
++ }
++
+ if (lflags & GPIO_OPEN_SOURCE)
+ set_bit(FLAG_OPEN_SOURCE, &desc->flags);
+ if (lflags & GPIO_SLEEP_MAY_LOOSE_VALUE)
+diff --git a/include/linux/gpio/consumer.h b/include/linux/gpio/consumer.h
+index c4a350d83578..11fb79f3dd24 100644
+--- a/include/linux/gpio/consumer.h
++++ b/include/linux/gpio/consumer.h
+@@ -29,6 +29,7 @@ struct gpio_descs {
+ #define GPIOD_FLAGS_BIT_DIR_SET BIT(0)
+ #define GPIOD_FLAGS_BIT_DIR_OUT BIT(1)
+ #define GPIOD_FLAGS_BIT_DIR_VAL BIT(2)
++#define GPIOD_FLAGS_BIT_OPEN_DRAIN BIT(3)
+
+ /**
+ * Optional flags that can be passed to one of gpiod_* to configure direction
+@@ -40,6 +41,11 @@ enum gpiod_flags {
+ GPIOD_OUT_LOW = GPIOD_FLAGS_BIT_DIR_SET | GPIOD_FLAGS_BIT_DIR_OUT,
+ GPIOD_OUT_HIGH = GPIOD_FLAGS_BIT_DIR_SET | GPIOD_FLAGS_BIT_DIR_OUT |
+ GPIOD_FLAGS_BIT_DIR_VAL,
++ GPIOD_OUT_LOW_OPEN_DRAIN = GPIOD_FLAGS_BIT_DIR_SET |
++ GPIOD_FLAGS_BIT_DIR_OUT | GPIOD_FLAGS_BIT_OPEN_DRAIN,
++ GPIOD_OUT_HIGH_OPEN_DRAIN = GPIOD_FLAGS_BIT_DIR_SET |
++ GPIOD_FLAGS_BIT_DIR_OUT | GPIOD_FLAGS_BIT_DIR_VAL |
++ GPIOD_FLAGS_BIT_OPEN_DRAIN,
+ };
+
+ #ifdef CONFIG_GPIOLIB
+--
+2.19.0
+
diff --git a/patches/0395-i2c-gpio-Enforce-open-drain-through-gpiolib.patch b/patches/0395-i2c-gpio-Enforce-open-drain-through-gpiolib.patch
new file mode 100644
index 0000000..c25c17b
--- /dev/null
+++ b/patches/0395-i2c-gpio-Enforce-open-drain-through-gpiolib.patch
@@ -0,0 +1,195 @@
+From 91fa59090303fbd277bbcde4b459949431802788 Mon Sep 17 00:00:00 2001
+From: Linus Walleij <linus.walleij@linaro.org>
+Date: Sun, 10 Sep 2017 19:54:21 +0200
+Subject: [PATCH 0395/1795] i2c: gpio: Enforce open drain through gpiolib
+
+The I2C GPIO bitbang driver currently emulates open drain
+behaviour by implementing what the gpiolib already does:
+not actively driving the line high, instead setting it to
+input.
+
+This makes no sense. Use the new facility in gpiolib to
+request the lines enforced into open drain mode, and let
+the open drain emulation already present in the gpiolib
+kick in and handle this.
+
+As a bonus: if the GPIO driver in the back-end actually
+supports open drain in hardware using the .set_config()
+callback, it will be utilized. That's correct: we never
+used that hardware feature before, instead relying on
+emulating open drain even if the GPIO controller could
+actually handle this for us.
+
+Users will sometimes get messages like this:
+gpio-485 (?): enforced open drain please flag it properly
+ in DT/ACPI DSDT/board file
+gpio-486 (?): enforced open drain please flag it properly
+ in DT/ACPI DSDT/board file
+i2c-gpio gpio-i2c: using lines 485 (SDA) and 486 (SCL)
+
+Which is completely proper: since the line is used as
+open drain, it should actually be flagged properly with
+e.g.
+
+gpios = <&gpio0 5 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>,
+ <&gpio0 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
+
+Or similar facilities in board file descriptor tables
+or ACPI DSDT.
+
+Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit 7bb75029ef34838604357350b4f24d6535e9d01f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/i2c/busses/i2c-gpio.c | 102 +++++++++++++---------------------
+ 1 file changed, 39 insertions(+), 63 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-gpio.c b/drivers/i2c/busses/i2c-gpio.c
+index b4664037eded..97b9c29e9429 100644
+--- a/drivers/i2c/busses/i2c-gpio.c
++++ b/drivers/i2c/busses/i2c-gpio.c
+@@ -25,23 +25,6 @@ struct i2c_gpio_private_data {
+ struct i2c_gpio_platform_data pdata;
+ };
+
+-/* Toggle SDA by changing the direction of the pin */
+-static void i2c_gpio_setsda_dir(void *data, int state)
+-{
+- struct i2c_gpio_private_data *priv = data;
+-
+- /*
+- * This is a way of saying "do not drive
+- * me actively high" which means emulating open drain.
+- * The right way to do this is for gpiolib to
+- * handle this, by the function below.
+- */
+- if (state)
+- gpiod_direction_input(priv->sda);
+- else
+- gpiod_direction_output(priv->sda, 0);
+-}
+-
+ /*
+ * Toggle SDA by changing the output value of the pin. This is only
+ * valid for pins configured as open drain (i.e. setting the value
+@@ -54,17 +37,6 @@ static void i2c_gpio_setsda_val(void *data, int state)
+ gpiod_set_value(priv->sda, state);
+ }
+
+-/* Toggle SCL by changing the direction of the pin. */
+-static void i2c_gpio_setscl_dir(void *data, int state)
+-{
+- struct i2c_gpio_private_data *priv = data;
+-
+- if (state)
+- gpiod_direction_input(priv->scl);
+- else
+- gpiod_direction_output(priv->scl, 0);
+-}
+-
+ /*
+ * Toggle SCL by changing the output value of the pin. This is used
+ * for pins that are configured as open drain and for output-only
+@@ -116,30 +88,13 @@ static int i2c_gpio_probe(struct platform_device *pdev)
+ struct i2c_gpio_platform_data *pdata;
+ struct i2c_algo_bit_data *bit_data;
+ struct i2c_adapter *adap;
++ enum gpiod_flags gflags;
+ int ret;
+
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+- /* First get the GPIO pins; if it fails, we'll defer the probe. */
+- priv->sda = devm_gpiod_get_index(&pdev->dev, NULL, 0, GPIOD_OUT_HIGH);
+- if (IS_ERR(priv->sda)) {
+- ret = PTR_ERR(priv->sda);
+- /* FIXME: hack in the old code, is this really necessary? */
+- if (ret == -EINVAL)
+- ret = -EPROBE_DEFER;
+- return ret;
+- }
+- priv->scl = devm_gpiod_get_index(&pdev->dev, NULL, 1, GPIOD_OUT_LOW);
+- if (IS_ERR(priv->scl)) {
+- ret = PTR_ERR(priv->scl);
+- /* FIXME: hack in the old code, is this really necessary? */
+- if (ret == -EINVAL)
+- ret = -EPROBE_DEFER;
+- return ret;
+- }
+-
+ adap = &priv->adap;
+ bit_data = &priv->bit_data;
+ pdata = &priv->pdata;
+@@ -157,27 +112,48 @@ static int i2c_gpio_probe(struct platform_device *pdev)
+ }
+
+ /*
+- * FIXME: this is a hack emulating the open drain emulation
+- * that gpiolib can already do for us. Make all clients properly
+- * flag their lines as open drain and get rid of this property
+- * and the special callback.
++ * First get the GPIO pins; if it fails, we'll defer the probe.
++ * If the SDA line is marked from platform data or device tree as
++ * "open drain" it means something outside of our control is making
++ * this line being handled as open drain, and we should just handle
++ * it as any other output. Else we enforce open drain as this is
++ * required for an I2C bus.
+ */
+- if (pdata->sda_is_open_drain) {
+- gpiod_direction_output(priv->sda, 1);
+- bit_data->setsda = i2c_gpio_setsda_val;
+- } else {
+- gpiod_direction_input(priv->sda);
+- bit_data->setsda = i2c_gpio_setsda_dir;
++ if (pdata->sda_is_open_drain)
++ gflags = GPIOD_OUT_HIGH;
++ else
++ gflags = GPIOD_OUT_HIGH_OPEN_DRAIN;
++ priv->sda = devm_gpiod_get_index(&pdev->dev, NULL, 0, gflags);
++ if (IS_ERR(priv->sda)) {
++ ret = PTR_ERR(priv->sda);
++ /* FIXME: hack in the old code, is this really necessary? */
++ if (ret == -EINVAL)
++ ret = -EPROBE_DEFER;
++ return ret;
+ }
+-
+- if (pdata->scl_is_open_drain || pdata->scl_is_output_only) {
+- gpiod_direction_output(priv->scl, 1);
+- bit_data->setscl = i2c_gpio_setscl_val;
+- } else {
+- gpiod_direction_input(priv->scl);
+- bit_data->setscl = i2c_gpio_setscl_dir;
++ /*
++ * If the SCL line is marked from platform data or device tree as
++ * "open drain" it means something outside of our control is making
++ * this line being handled as open drain, and we should just handle
++ * it as any other output. Else we enforce open drain as this is
++ * required for an I2C bus.
++ */
++ if (pdata->scl_is_open_drain)
++ gflags = GPIOD_OUT_LOW;
++ else
++ gflags = GPIOD_OUT_LOW_OPEN_DRAIN;
++ priv->scl = devm_gpiod_get_index(&pdev->dev, NULL, 1, gflags);
++ if (IS_ERR(priv->scl)) {
++ ret = PTR_ERR(priv->scl);
++ /* FIXME: hack in the old code, is this really necessary? */
++ if (ret == -EINVAL)
++ ret = -EPROBE_DEFER;
++ return ret;
+ }
+
++ bit_data->setsda = i2c_gpio_setsda_val;
++ bit_data->setscl = i2c_gpio_setscl_val;
++
+ if (!pdata->scl_is_output_only)
+ bit_data->getscl = i2c_gpio_getscl;
+ bit_data->getsda = i2c_gpio_getsda;
+--
+2.19.0
+
diff --git a/patches/0396-i2c-gpio-Augment-all-boardfiles-to-use-open-drain.patch b/patches/0396-i2c-gpio-Augment-all-boardfiles-to-use-open-drain.patch
new file mode 100644
index 0000000..8428c0c
--- /dev/null
+++ b/patches/0396-i2c-gpio-Augment-all-boardfiles-to-use-open-drain.patch
@@ -0,0 +1,360 @@
+From 68aba523a18ba1aa4cb155f3f6f92733002cbafe Mon Sep 17 00:00:00 2001
+From: Linus Walleij <linus.walleij@linaro.org>
+Date: Sun, 10 Sep 2017 23:03:32 +0200
+Subject: [PATCH 0396/1795] i2c: gpio: Augment all boardfiles to use open drain
+
+We now handle the open drain mode internally in the I2C GPIO
+driver, but we will get warnings from the gpiolib that we
+override the default mode of the line so it becomes open
+drain.
+
+We can fix all in-kernel users by simply passing the right
+flag along in the descriptor table, and we already touched
+all of these files in the series so let's just tidy it up.
+
+Cc: Steven Miao <realmz6@gmail.com>
+Cc: Ralf Baechle <ralf@linux-mips.org>
+Acked-by: Olof Johansson <olof@lixom.net>
+Acked-by: Lee Jones <lee.jones@linaro.org>
+Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
+Acked-by: Ralf Baechle <ralf@linux-mips.org>
+Acked-by: Wu, Aaron <Aaron.Wu@analog.com>
+Acked-by: Arnd Bergmann <arnd@arndb.de>
+Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit 4d0ce62c0a02e41a65cfdcfe277f5be430edc371)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/mach-ep93xx/core.c | 6 ++++--
+ arch/arm/mach-ixp4xx/avila-setup.c | 4 ++--
+ arch/arm/mach-ixp4xx/dsmg600-setup.c | 4 ++--
+ arch/arm/mach-ixp4xx/fsg-setup.c | 4 ++--
+ arch/arm/mach-ixp4xx/ixdp425-setup.c | 4 ++--
+ arch/arm/mach-ixp4xx/nas100d-setup.c | 4 ++--
+ arch/arm/mach-ixp4xx/nslu2-setup.c | 4 ++--
+ arch/arm/mach-ks8695/board-acs5k.c | 6 ++++--
+ arch/arm/mach-pxa/palmz72.c | 6 ++++--
+ arch/arm/mach-pxa/viper.c | 8 ++++----
+ arch/arm/mach-sa1100/simpad.c | 6 ++++--
+ arch/blackfin/mach-bf533/boards/blackstamp.c | 4 ++--
+ arch/blackfin/mach-bf533/boards/ezkit.c | 4 ++--
+ arch/blackfin/mach-bf533/boards/stamp.c | 4 ++--
+ arch/blackfin/mach-bf561/boards/ezkit.c | 4 ++--
+ arch/mips/alchemy/board-gpr.c | 4 ++++
+ arch/mips/ath79/mach-pb44.c | 4 ++--
+ drivers/mfd/sm501.c | 4 ++--
+ 18 files changed, 48 insertions(+), 36 deletions(-)
+
+diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
+index 7e99fe829ad1..e70feec6fad5 100644
+--- a/arch/arm/mach-ep93xx/core.c
++++ b/arch/arm/mach-ep93xx/core.c
+@@ -326,8 +326,10 @@ static struct gpiod_lookup_table ep93xx_i2c_gpiod_table = {
+ .dev_id = "i2c-gpio",
+ .table = {
+ /* Use local offsets on gpiochip/port "G" */
+- GPIO_LOOKUP_IDX("G", 1, NULL, 0, GPIO_ACTIVE_HIGH),
+- GPIO_LOOKUP_IDX("G", 0, NULL, 1, GPIO_ACTIVE_HIGH),
++ GPIO_LOOKUP_IDX("G", 1, NULL, 0,
++ GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
++ GPIO_LOOKUP_IDX("G", 0, NULL, 1,
++ GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ },
+ };
+
+diff --git a/arch/arm/mach-ixp4xx/avila-setup.c b/arch/arm/mach-ixp4xx/avila-setup.c
+index c80f02ecfe6d..77def6169f50 100644
+--- a/arch/arm/mach-ixp4xx/avila-setup.c
++++ b/arch/arm/mach-ixp4xx/avila-setup.c
+@@ -54,9 +54,9 @@ static struct gpiod_lookup_table avila_i2c_gpiod_table = {
+ .dev_id = "i2c-gpio",
+ .table = {
+ GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", AVILA_SDA_PIN,
+- NULL, 0, GPIO_ACTIVE_HIGH),
++ NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", AVILA_SCL_PIN,
+- NULL, 1, GPIO_ACTIVE_HIGH),
++ NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ },
+ };
+
+diff --git a/arch/arm/mach-ixp4xx/dsmg600-setup.c b/arch/arm/mach-ixp4xx/dsmg600-setup.c
+index 270b09d0d205..8751cc273ce0 100644
+--- a/arch/arm/mach-ixp4xx/dsmg600-setup.c
++++ b/arch/arm/mach-ixp4xx/dsmg600-setup.c
+@@ -73,9 +73,9 @@ static struct gpiod_lookup_table dsmg600_i2c_gpiod_table = {
+ .dev_id = "i2c-gpio",
+ .table = {
+ GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", DSMG600_SDA_PIN,
+- NULL, 0, GPIO_ACTIVE_HIGH),
++ NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", DSMG600_SCL_PIN,
+- NULL, 1, GPIO_ACTIVE_HIGH),
++ NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ },
+ };
+
+diff --git a/arch/arm/mach-ixp4xx/fsg-setup.c b/arch/arm/mach-ixp4xx/fsg-setup.c
+index 73c72eaeb034..033f79b35d51 100644
+--- a/arch/arm/mach-ixp4xx/fsg-setup.c
++++ b/arch/arm/mach-ixp4xx/fsg-setup.c
+@@ -59,9 +59,9 @@ static struct gpiod_lookup_table fsg_i2c_gpiod_table = {
+ .dev_id = "i2c-gpio",
+ .table = {
+ GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", FSG_SDA_PIN,
+- NULL, 0, GPIO_ACTIVE_HIGH),
++ NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", FSG_SCL_PIN,
+- NULL, 1, GPIO_ACTIVE_HIGH),
++ NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ },
+ };
+
+diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c
+index 917af44c5780..b168e2fbdbeb 100644
+--- a/arch/arm/mach-ixp4xx/ixdp425-setup.c
++++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c
+@@ -127,9 +127,9 @@ static struct gpiod_lookup_table ixdp425_i2c_gpiod_table = {
+ .dev_id = "i2c-gpio",
+ .table = {
+ GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", IXDP425_SDA_PIN,
+- NULL, 0, GPIO_ACTIVE_HIGH),
++ NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", IXDP425_SCL_PIN,
+- NULL, 1, GPIO_ACTIVE_HIGH),
++ NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ },
+ };
+
+diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c
+index 6c57b74cd703..216a11b0e9b2 100644
+--- a/arch/arm/mach-ixp4xx/nas100d-setup.c
++++ b/arch/arm/mach-ixp4xx/nas100d-setup.c
+@@ -105,9 +105,9 @@ static struct gpiod_lookup_table nas100d_i2c_gpiod_table = {
+ .dev_id = "i2c-gpio",
+ .table = {
+ GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", NAS100D_SDA_PIN,
+- NULL, 0, GPIO_ACTIVE_HIGH),
++ NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", NAS100D_SCL_PIN,
+- NULL, 1, GPIO_ACTIVE_HIGH),
++ NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ },
+ };
+
+diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c
+index 3bc4c69b8479..91da63a7d7b5 100644
+--- a/arch/arm/mach-ixp4xx/nslu2-setup.c
++++ b/arch/arm/mach-ixp4xx/nslu2-setup.c
+@@ -73,9 +73,9 @@ static struct gpiod_lookup_table nslu2_i2c_gpiod_table = {
+ .dev_id = "i2c-gpio",
+ .table = {
+ GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", NSLU2_SDA_PIN,
+- NULL, 0, GPIO_ACTIVE_HIGH),
++ NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", NSLU2_SCL_PIN,
+- NULL, 1, GPIO_ACTIVE_HIGH),
++ NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ },
+ };
+
+diff --git a/arch/arm/mach-ks8695/board-acs5k.c b/arch/arm/mach-ks8695/board-acs5k.c
+index f034724e01e1..937eb1d47e7b 100644
+--- a/arch/arm/mach-ks8695/board-acs5k.c
++++ b/arch/arm/mach-ks8695/board-acs5k.c
+@@ -41,8 +41,10 @@
+ static struct gpiod_lookup_table acs5k_i2c_gpiod_table = {
+ .dev_id = "i2c-gpio",
+ .table = {
+- GPIO_LOOKUP_IDX("KS8695", 4, NULL, 0, GPIO_ACTIVE_HIGH),
+- GPIO_LOOKUP_IDX("KS8695", 5, NULL, 1, GPIO_ACTIVE_HIGH),
++ GPIO_LOOKUP_IDX("KS8695", 4, NULL, 0,
++ GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
++ GPIO_LOOKUP_IDX("KS8695", 5, NULL, 1,
++ GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ },
+ };
+
+diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c
+index 94f75632c007..5877e547cecd 100644
+--- a/arch/arm/mach-pxa/palmz72.c
++++ b/arch/arm/mach-pxa/palmz72.c
+@@ -324,8 +324,10 @@ static struct soc_camera_link palmz72_iclink = {
+ static struct gpiod_lookup_table palmz72_i2c_gpiod_table = {
+ .dev_id = "i2c-gpio",
+ .table = {
+- GPIO_LOOKUP_IDX("gpio-pxa", 118, NULL, 0, GPIO_ACTIVE_HIGH),
+- GPIO_LOOKUP_IDX("gpio-pxa", 117, NULL, 1, GPIO_ACTIVE_HIGH),
++ GPIO_LOOKUP_IDX("gpio-pxa", 118, NULL, 0,
++ GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
++ GPIO_LOOKUP_IDX("gpio-pxa", 117, NULL, 1,
++ GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ },
+ };
+
+diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
+index a680742bee2b..4185e7ff073f 100644
+--- a/arch/arm/mach-pxa/viper.c
++++ b/arch/arm/mach-pxa/viper.c
+@@ -463,9 +463,9 @@ static struct gpiod_lookup_table viper_i2c_gpiod_table = {
+ .dev_id = "i2c-gpio",
+ .table = {
+ GPIO_LOOKUP_IDX("gpio-pxa", VIPER_RTC_I2C_SDA_GPIO,
+- NULL, 0, GPIO_ACTIVE_HIGH),
++ NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ GPIO_LOOKUP_IDX("gpio-pxa", VIPER_RTC_I2C_SCL_GPIO,
+- NULL, 1, GPIO_ACTIVE_HIGH),
++ NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ },
+ };
+
+@@ -792,9 +792,9 @@ struct gpiod_lookup_table viper_tpm_i2c_gpiod_table = {
+ .dev_id = "i2c-gpio",
+ .table = {
+ GPIO_LOOKUP_IDX("gpio-pxa", VIPER_TPM_I2C_SDA_GPIO,
+- NULL, 0, GPIO_ACTIVE_HIGH),
++ NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ GPIO_LOOKUP_IDX("gpio-pxa", VIPER_TPM_I2C_SCL_GPIO,
+- NULL, 1, GPIO_ACTIVE_HIGH),
++ NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ },
+ };
+
+diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c
+index 10c7ea426e5b..9db483a42826 100644
+--- a/arch/arm/mach-sa1100/simpad.c
++++ b/arch/arm/mach-sa1100/simpad.c
+@@ -328,8 +328,10 @@ static struct platform_device simpad_gpio_leds = {
+ static struct gpiod_lookup_table simpad_i2c_gpiod_table = {
+ .dev_id = "i2c-gpio",
+ .table = {
+- GPIO_LOOKUP_IDX("gpio", GPIO_GPIO21, NULL, 0, GPIO_ACTIVE_HIGH),
+- GPIO_LOOKUP_IDX("gpio", GPIO_GPIO25, NULL, 1, GPIO_ACTIVE_HIGH),
++ GPIO_LOOKUP_IDX("gpio", GPIO_GPIO21, NULL, 0,
++ GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
++ GPIO_LOOKUP_IDX("gpio", GPIO_GPIO25, NULL, 1,
++ GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ },
+ };
+
+diff --git a/arch/blackfin/mach-bf533/boards/blackstamp.c b/arch/blackfin/mach-bf533/boards/blackstamp.c
+index d801ca5ca6c4..fab69c736515 100644
+--- a/arch/blackfin/mach-bf533/boards/blackstamp.c
++++ b/arch/blackfin/mach-bf533/boards/blackstamp.c
+@@ -367,9 +367,9 @@ static struct gpiod_lookup_table bfin_i2c_gpiod_table = {
+ .dev_id = "i2c-gpio",
+ .table = {
+ GPIO_LOOKUP_IDX("BFIN-GPIO", GPIO_PF8, NULL, 0,
+- GPIO_ACTIVE_HIGH),
++ GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ GPIO_LOOKUP_IDX("BFIN-GPIO", GPIO_PF9, NULL, 1,
+- GPIO_ACTIVE_HIGH),
++ GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ },
+ };
+
+diff --git a/arch/blackfin/mach-bf533/boards/ezkit.c b/arch/blackfin/mach-bf533/boards/ezkit.c
+index 463a72358b0e..d64d270e9e62 100644
+--- a/arch/blackfin/mach-bf533/boards/ezkit.c
++++ b/arch/blackfin/mach-bf533/boards/ezkit.c
+@@ -395,9 +395,9 @@ static struct gpiod_lookup_table bfin_i2c_gpiod_table = {
+ .dev_id = "i2c-gpio",
+ .table = {
+ GPIO_LOOKUP_IDX("BFIN-GPIO", GPIO_PF1, NULL, 0,
+- GPIO_ACTIVE_HIGH),
++ GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ GPIO_LOOKUP_IDX("BFIN-GPIO", GPIO_PF0, NULL, 1,
+- GPIO_ACTIVE_HIGH),
++ GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ },
+ };
+
+diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c
+index d2479359adb7..27cbf2fa2c62 100644
+--- a/arch/blackfin/mach-bf533/boards/stamp.c
++++ b/arch/blackfin/mach-bf533/boards/stamp.c
+@@ -517,9 +517,9 @@ static struct gpiod_lookup_table bfin_i2c_gpiod_table = {
+ .dev_id = "i2c-gpio",
+ .table = {
+ GPIO_LOOKUP_IDX("BFIN-GPIO", GPIO_PF2, NULL, 0,
+- GPIO_ACTIVE_HIGH),
++ GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ GPIO_LOOKUP_IDX("BFIN-GPIO", GPIO_PF3, NULL, 1,
+- GPIO_ACTIVE_HIGH),
++ GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ },
+ };
+
+diff --git a/arch/blackfin/mach-bf561/boards/ezkit.c b/arch/blackfin/mach-bf561/boards/ezkit.c
+index 72f757ebaa84..acc5363f60c6 100644
+--- a/arch/blackfin/mach-bf561/boards/ezkit.c
++++ b/arch/blackfin/mach-bf561/boards/ezkit.c
+@@ -384,9 +384,9 @@ static struct gpiod_lookup_table bfin_i2c_gpiod_table = {
+ .dev_id = "i2c-gpio",
+ .table = {
+ GPIO_LOOKUP_IDX("BFIN-GPIO", GPIO_PF1, NULL, 0,
+- GPIO_ACTIVE_HIGH),
++ GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ GPIO_LOOKUP_IDX("BFIN-GPIO", GPIO_PF0, NULL, 1,
+- GPIO_ACTIVE_HIGH),
++ GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ },
+ };
+
+diff --git a/arch/mips/alchemy/board-gpr.c b/arch/mips/alchemy/board-gpr.c
+index daebc36e5ecb..328d697e72b4 100644
+--- a/arch/mips/alchemy/board-gpr.c
++++ b/arch/mips/alchemy/board-gpr.c
+@@ -235,6 +235,10 @@ static struct gpiod_lookup_table gpr_i2c_gpiod_table = {
+ };
+
+ static struct i2c_gpio_platform_data gpr_i2c_data = {
++ /*
++ * The open drain mode is hardwired somewhere or an electrical
++ * property of the alchemy GPIO controller.
++ */
+ .sda_is_open_drain = 1,
+ .scl_is_open_drain = 1,
+ .udelay = 2, /* ~100 kHz */
+diff --git a/arch/mips/ath79/mach-pb44.c b/arch/mips/ath79/mach-pb44.c
+index a95409063847..6b2c6f3baefa 100644
+--- a/arch/mips/ath79/mach-pb44.c
++++ b/arch/mips/ath79/mach-pb44.c
+@@ -37,9 +37,9 @@ static struct gpiod_lookup_table pb44_i2c_gpiod_table = {
+ .dev_id = "i2c-gpio",
+ .table = {
+ GPIO_LOOKUP_IDX("ath79-gpio", PB44_GPIO_I2C_SDA,
+- NULL, 0, GPIO_ACTIVE_HIGH),
++ NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ GPIO_LOOKUP_IDX("ath79-gpio", PB44_GPIO_I2C_SCL,
+- NULL, 1, GPIO_ACTIVE_HIGH),
++ NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ },
+ };
+
+diff --git a/drivers/mfd/sm501.c b/drivers/mfd/sm501.c
+index d67bbb153af4..b4063b145d29 100644
+--- a/drivers/mfd/sm501.c
++++ b/drivers/mfd/sm501.c
+@@ -1153,7 +1153,7 @@ static int sm501_register_gpio_i2c_instance(struct sm501_devdata *sm,
+ lookup->table[0].chip_hwnum = iic->pin_sda % 32;
+ lookup->table[0].con_id = NULL;
+ lookup->table[0].idx = 0;
+- lookup->table[0].flags = GPIO_ACTIVE_HIGH;
++ lookup->table[0].flags = GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN;
+ if (iic->pin_scl < 32)
+ lookup->table[1].chip_label = "SM501-LOW";
+ else
+@@ -1161,7 +1161,7 @@ static int sm501_register_gpio_i2c_instance(struct sm501_devdata *sm,
+ lookup->table[1].chip_hwnum = iic->pin_scl % 32;
+ lookup->table[1].con_id = NULL;
+ lookup->table[1].idx = 1;
+- lookup->table[1].flags = GPIO_ACTIVE_HIGH;
++ lookup->table[1].flags = GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN;
+ gpiod_add_lookup_table(lookup);
+
+ icd = dev_get_platdata(&pdev->dev);
+--
+2.19.0
+
diff --git a/patches/0397-i2c-gpio-Local-vars-in-probe.patch b/patches/0397-i2c-gpio-Local-vars-in-probe.patch
new file mode 100644
index 0000000..72095e5
--- /dev/null
+++ b/patches/0397-i2c-gpio-Local-vars-in-probe.patch
@@ -0,0 +1,106 @@
+From 3eee2e832d3ec882cfcf5f06b161a462c1b9d8e3 Mon Sep 17 00:00:00 2001
+From: Linus Walleij <linus.walleij@linaro.org>
+Date: Sun, 10 Sep 2017 23:15:35 +0200
+Subject: [PATCH 0397/1795] i2c: gpio: Local vars in probe
+
+By creating local variables for *dev and *np, the code become
+much easier to read, in my opinion.
+
+Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit b9ab0517efc0111b516878ab872e2b3dd7bb40a9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/i2c/busses/i2c-gpio.c | 27 ++++++++++++++-------------
+ 1 file changed, 14 insertions(+), 13 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-gpio.c b/drivers/i2c/busses/i2c-gpio.c
+index 97b9c29e9429..a702e493275c 100644
+--- a/drivers/i2c/busses/i2c-gpio.c
++++ b/drivers/i2c/busses/i2c-gpio.c
+@@ -88,10 +88,12 @@ static int i2c_gpio_probe(struct platform_device *pdev)
+ struct i2c_gpio_platform_data *pdata;
+ struct i2c_algo_bit_data *bit_data;
+ struct i2c_adapter *adap;
++ struct device *dev = &pdev->dev;
++ struct device_node *np = dev->of_node;
+ enum gpiod_flags gflags;
+ int ret;
+
+- priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
++ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+@@ -99,16 +101,15 @@ static int i2c_gpio_probe(struct platform_device *pdev)
+ bit_data = &priv->bit_data;
+ pdata = &priv->pdata;
+
+- if (pdev->dev.of_node) {
+- of_i2c_gpio_get_props(pdev->dev.of_node, pdata);
++ if (np) {
++ of_i2c_gpio_get_props(np, pdata);
+ } else {
+ /*
+ * If all platform data settings are zero it is OK
+ * to not provide any platform data from the board.
+ */
+- if (dev_get_platdata(&pdev->dev))
+- memcpy(pdata, dev_get_platdata(&pdev->dev),
+- sizeof(*pdata));
++ if (dev_get_platdata(dev))
++ memcpy(pdata, dev_get_platdata(dev), sizeof(*pdata));
+ }
+
+ /*
+@@ -123,7 +124,7 @@ static int i2c_gpio_probe(struct platform_device *pdev)
+ gflags = GPIOD_OUT_HIGH;
+ else
+ gflags = GPIOD_OUT_HIGH_OPEN_DRAIN;
+- priv->sda = devm_gpiod_get_index(&pdev->dev, NULL, 0, gflags);
++ priv->sda = devm_gpiod_get_index(dev, NULL, 0, gflags);
+ if (IS_ERR(priv->sda)) {
+ ret = PTR_ERR(priv->sda);
+ /* FIXME: hack in the old code, is this really necessary? */
+@@ -142,7 +143,7 @@ static int i2c_gpio_probe(struct platform_device *pdev)
+ gflags = GPIOD_OUT_LOW;
+ else
+ gflags = GPIOD_OUT_LOW_OPEN_DRAIN;
+- priv->scl = devm_gpiod_get_index(&pdev->dev, NULL, 1, gflags);
++ priv->scl = devm_gpiod_get_index(dev, NULL, 1, gflags);
+ if (IS_ERR(priv->scl)) {
+ ret = PTR_ERR(priv->scl);
+ /* FIXME: hack in the old code, is this really necessary? */
+@@ -173,15 +174,15 @@ static int i2c_gpio_probe(struct platform_device *pdev)
+ bit_data->data = priv;
+
+ adap->owner = THIS_MODULE;
+- if (pdev->dev.of_node)
+- strlcpy(adap->name, dev_name(&pdev->dev), sizeof(adap->name));
++ if (np)
++ strlcpy(adap->name, dev_name(dev), sizeof(adap->name));
+ else
+ snprintf(adap->name, sizeof(adap->name), "i2c-gpio%d", pdev->id);
+
+ adap->algo_data = bit_data;
+ adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
+- adap->dev.parent = &pdev->dev;
+- adap->dev.of_node = pdev->dev.of_node;
++ adap->dev.parent = dev;
++ adap->dev.of_node = np;
+
+ adap->nr = pdev->id;
+ ret = i2c_bit_add_numbered_bus(adap);
+@@ -195,7 +196,7 @@ static int i2c_gpio_probe(struct platform_device *pdev)
+ * get accessors to get the actual name of the GPIO line,
+ * from the descriptor, then provide that instead.
+ */
+- dev_info(&pdev->dev, "using lines %u (SDA) and %u (SCL%s)\n",
++ dev_info(dev, "using lines %u (SDA) and %u (SCL%s)\n",
+ desc_to_gpio(priv->sda), desc_to_gpio(priv->scl),
+ pdata->scl_is_output_only
+ ? ", no clock stretching" : "");
+--
+2.19.0
+
diff --git a/patches/0398-dt-bindings-i2c-i2c-gpio-Add-support-for-named-gpios.patch b/patches/0398-dt-bindings-i2c-i2c-gpio-Add-support-for-named-gpios.patch
new file mode 100644
index 0000000..b5471a6
--- /dev/null
+++ b/patches/0398-dt-bindings-i2c-i2c-gpio-Add-support-for-named-gpios.patch
@@ -0,0 +1,89 @@
+From b606d8c3f34946f044c550d0e179577c2a4c98d8 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 24 Aug 2017 09:21:12 +0200
+Subject: [PATCH 0398/1795] dt-bindings: i2c: i2c-gpio: Add support for named
+ gpios
+
+The current i2c-gpio DT bindings use a single unnamed "gpios" property
+to refer to the SDA and SCL signal lines by index. This is error-prone
+for the casual DT writer and reviewer, as one has to look up the order
+in the DT bindings.
+
+Fix this by amending the DT bindings to use two separate named gpios
+properties, and deprecate the old unnamed variant.
+
+Take this opportunity to clearly deprecate the "i2c-gpio,sda-open-drain"
+and "i2c-gpio,scl-open-drain" flags as well. The commit describes
+in detail what these flags actually mean, and why they should not be
+used in new device trees.
+
+Cc: devicetree@vger.kernel.org
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+[Augmented to what I and Rob would like]
+Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+
+(cherry picked from commit 7d29f509d2cfd807b2fccc643ac1f7066b9b1949)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ .../devicetree/bindings/i2c/i2c-gpio.txt | 32 +++++++++++++------
+ 1 file changed, 23 insertions(+), 9 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/i2c/i2c-gpio.txt b/Documentation/devicetree/bindings/i2c/i2c-gpio.txt
+index 4f8ec947c6bd..38a05562d1d2 100644
+--- a/Documentation/devicetree/bindings/i2c/i2c-gpio.txt
++++ b/Documentation/devicetree/bindings/i2c/i2c-gpio.txt
+@@ -2,25 +2,39 @@ Device-Tree bindings for i2c gpio driver
+
+ Required properties:
+ - compatible = "i2c-gpio";
+- - gpios: sda and scl gpio
+-
++ - sda-gpios: gpio used for the sda signal, this should be flagged as
++ active high using open drain with (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)
++ from <dt-bindings/gpio/gpio.h> since the signal is by definition
++ open drain.
++ - scl-gpios: gpio used for the scl signal, this should be flagged as
++ active high using open drain with (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)
++ from <dt-bindings/gpio/gpio.h> since the signal is by definition
++ open drain.
+
+ Optional properties:
+- - i2c-gpio,sda-open-drain: sda as open drain
+- - i2c-gpio,scl-open-drain: scl as open drain
+ - i2c-gpio,scl-output-only: scl as output only
+ - i2c-gpio,delay-us: delay between GPIO operations (may depend on each platform)
+ - i2c-gpio,timeout-ms: timeout to get data
+
++Deprecated properties, do not use in new device tree sources:
++ - gpios: sda and scl gpio, alternative for {sda,scl}-gpios
++ - i2c-gpio,sda-open-drain: this means that something outside of our
++ control has put the GPIO line used for SDA into open drain mode, and
++ that something is not the GPIO chip. It is essentially an
++ inconsistency flag.
++ - i2c-gpio,scl-open-drain: this means that something outside of our
++ control has put the GPIO line used for SCL into open drain mode, and
++ that something is not the GPIO chip. It is essentially an
++ inconsistency flag.
++
+ Example nodes:
+
++#include <dt-bindings/gpio/gpio.h>
++
+ i2c@0 {
+ compatible = "i2c-gpio";
+- gpios = <&pioA 23 0 /* sda */
+- &pioA 24 0 /* scl */
+- >;
+- i2c-gpio,sda-open-drain;
+- i2c-gpio,scl-open-drain;
++ sda-gpios = <&pioA 23 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
++ scl-gpios = <&pioA 24 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
+ i2c-gpio,delay-us = <2>; /* ~100 kHz */
+ #address-cells = <1>;
+ #size-cells = <0>;
+--
+2.19.0
+
diff --git a/patches/0399-i2c-gpio-Add-support-for-named-gpios-in-DT.patch b/patches/0399-i2c-gpio-Add-support-for-named-gpios-in-DT.patch
new file mode 100644
index 0000000..f6cf5ea
--- /dev/null
+++ b/patches/0399-i2c-gpio-Add-support-for-named-gpios-in-DT.patch
@@ -0,0 +1,114 @@
+From 1c0061a023205bf2ced3d02a846afa153594ad1e Mon Sep 17 00:00:00 2001
+From: Linus Walleij <linus.walleij@linaro.org>
+Date: Sat, 16 Sep 2017 23:56:49 +0200
+Subject: [PATCH 0399/1795] i2c: gpio: Add support for named gpios in DT
+
+This adds support for using the "sda" and "scl" GPIOs in
+device tree instead of anonymously using index 0 and 1 of
+the "gpios" property.
+
+We add a helper function to retrieve the GPIO descriptors
+and some explicit error handling since the probe may have
+to be deferred. At least this happened to me when moving
+to using named "sda" and "scl" lines (all of a sudden this
+started to probe before the GPIO driver) so we need to
+gracefully defer probe when we ge -ENOENT in the error
+pointer.
+
+Suggested-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit 05c74778858d7d9907d607172fcc9646b70b6364)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/i2c/busses/i2c-gpio.c | 59 +++++++++++++++++++++++++----------
+ 1 file changed, 43 insertions(+), 16 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-gpio.c b/drivers/i2c/busses/i2c-gpio.c
+index a702e493275c..d80ea6ce91bb 100644
+--- a/drivers/i2c/busses/i2c-gpio.c
++++ b/drivers/i2c/busses/i2c-gpio.c
+@@ -82,6 +82,42 @@ static void of_i2c_gpio_get_props(struct device_node *np,
+ of_property_read_bool(np, "i2c-gpio,scl-output-only");
+ }
+
++static struct gpio_desc *i2c_gpio_get_desc(struct device *dev,
++ const char *con_id,
++ unsigned int index,
++ enum gpiod_flags gflags)
++{
++ struct gpio_desc *retdesc;
++ int ret;
++
++ retdesc = devm_gpiod_get(dev, con_id, gflags);
++ if (!IS_ERR(retdesc)) {
++ dev_dbg(dev, "got GPIO from name %s\n", con_id);
++ return retdesc;
++ }
++
++ retdesc = devm_gpiod_get_index(dev, NULL, index, gflags);
++ if (!IS_ERR(retdesc)) {
++ dev_dbg(dev, "got GPIO from index %u\n", index);
++ return retdesc;
++ }
++
++ ret = PTR_ERR(retdesc);
++
++ /* FIXME: hack in the old code, is this really necessary? */
++ if (ret == -EINVAL)
++ retdesc = ERR_PTR(-EPROBE_DEFER);
++
++ /* This happens if the GPIO driver is not yet probed, let's defer */
++ if (ret == -ENOENT)
++ retdesc = ERR_PTR(-EPROBE_DEFER);
++
++ if (ret != -EPROBE_DEFER)
++ dev_err(dev, "error trying to get descriptor: %d\n", ret);
++
++ return retdesc;
++}
++
+ static int i2c_gpio_probe(struct platform_device *pdev)
+ {
+ struct i2c_gpio_private_data *priv;
+@@ -124,14 +160,10 @@ static int i2c_gpio_probe(struct platform_device *pdev)
+ gflags = GPIOD_OUT_HIGH;
+ else
+ gflags = GPIOD_OUT_HIGH_OPEN_DRAIN;
+- priv->sda = devm_gpiod_get_index(dev, NULL, 0, gflags);
+- if (IS_ERR(priv->sda)) {
+- ret = PTR_ERR(priv->sda);
+- /* FIXME: hack in the old code, is this really necessary? */
+- if (ret == -EINVAL)
+- ret = -EPROBE_DEFER;
+- return ret;
+- }
++ priv->sda = i2c_gpio_get_desc(dev, "sda", 0, gflags);
++ if (IS_ERR(priv->sda))
++ return PTR_ERR(priv->sda);
++
+ /*
+ * If the SCL line is marked from platform data or device tree as
+ * "open drain" it means something outside of our control is making
+@@ -143,14 +175,9 @@ static int i2c_gpio_probe(struct platform_device *pdev)
+ gflags = GPIOD_OUT_LOW;
+ else
+ gflags = GPIOD_OUT_LOW_OPEN_DRAIN;
+- priv->scl = devm_gpiod_get_index(dev, NULL, 1, gflags);
+- if (IS_ERR(priv->scl)) {
+- ret = PTR_ERR(priv->scl);
+- /* FIXME: hack in the old code, is this really necessary? */
+- if (ret == -EINVAL)
+- ret = -EPROBE_DEFER;
+- return ret;
+- }
++ priv->scl = i2c_gpio_get_desc(dev, "scl", 1, gflags);
++ if (IS_ERR(priv->scl))
++ return PTR_ERR(priv->scl);
+
+ bit_data->setsda = i2c_gpio_setsda_val;
+ bit_data->setscl = i2c_gpio_setscl_val;
+--
+2.19.0
+
diff --git a/patches/0400-ARM-sa1100-simpad-Correct-I2C-GPIO-offsets.patch b/patches/0400-ARM-sa1100-simpad-Correct-I2C-GPIO-offsets.patch
new file mode 100644
index 0000000..7a9ee0e
--- /dev/null
+++ b/patches/0400-ARM-sa1100-simpad-Correct-I2C-GPIO-offsets.patch
@@ -0,0 +1,108 @@
+From 3d747c153d9a53da489ee304a7226323870f2a0e Mon Sep 17 00:00:00 2001
+From: Linus Walleij <linus.walleij@linaro.org>
+Date: Tue, 7 Nov 2017 21:18:57 +0100
+Subject: [PATCH 0400/1795] ARM: sa1100: simpad: Correct I2C GPIO offsets
+
+Arnd reported the following build bug bug:
+
+In file included from arch/arm/mach-sa1100/simpad.c:20:0:
+arch/arm/mach-sa1100/include/mach/SA-1100.h:1118:18: error: large
+integer implicitly truncated to unsigned type [-Werror=overflow]
+ (0x00000001 << (Nb))
+ ^
+include/linux/gpio/machine.h:56:16: note: in definition of macro
+'GPIO_LOOKUP_IDX'
+.chip_hwnum = _chip_hwnum,
+ ^~~~~~~~~~~
+arch/arm/mach-sa1100/include/mach/SA-1100.h:1140:21: note: in
+expansion of macro 'GPIO_GPIO'
+ ^~~~~~~~~
+arch/arm/mach-sa1100/simpad.c:331:27: note: in expansion of
+macro 'GPIO_GPIO21'
+ GPIO_LOOKUP_IDX("gpio", GPIO_GPIO21, NULL, 0,
+
+This is what happened:
+
+commit b2e63555592f81331c8da3afaa607d8cf83e8138
+"i2c: gpio: Convert to use descriptors"
+commit 4d0ce62c0a02e41a65cfdcfe277f5be430edc371
+"i2c: gpio: Augment all boardfiles to use open drain"
+together uncovered an old bug in the Simpad board
+file: as theGPIO_LOOKUP_IDX() encodes GPIO offsets
+on gpiochips in an u16 (see <linux/gpio/machine.h>)
+these GPIO "numbers" does not fit, since in
+arch/arm/mach-sa1100/include/mach/SA-1100.h it is
+defined as:
+
+ #define GPIO_GPIO(Nb) (0x00000001 << (Nb))
+ (...)
+ #define GPIO_GPIO21 GPIO_GPIO(21) /* GPIO [21] */
+
+This is however provably wrong, since the i2c-gpio
+driver uses proper GPIO numbers, albeit earlier from
+the global number space, whereas this GPIO_GPIO21
+is the local line offset in the GPIO register, which
+is used in other code but certainly not in the
+gpiolib GPIO driver in drivers/gpio/gpio-sa1100.c, which
+has code like this:
+
+static void sa1100_gpio_set(struct gpio_chip *chip,
+ unsigned offset, int value)
+{
+ int reg = value ? R_GPSR : R_GPCR;
+
+ writel_relaxed(BIT(offset),
+ sa1100_gpio_chip(chip)->membase + reg);
+}
+
+So far everything however compiled fine as an unsigned
+int was used to pass the GPIO numbers in
+struct i2c_gpio_platform_data. We can trace the actual error
+back to
+
+commit dbd406f9d0a1d33a1303eb75cbe3f9435513d339
+"ARM: 7025/1: simpad: add GPIO based device definitions."
+This added the i2c_gpio with the wrong offsets.
+
+This commit was before the SA1100 was converted to use
+the gpiolib, but as can be seen from the contemporary
+gpio.c in mach-sa1100, it was already using:
+
+static int sa1100_gpio_get(struct gpio_chip *chip,
+ unsigned offset)
+{
+ return GPLR & GPIO_GPIO(offset);
+}
+
+And GPIO_GPIO() is essentially the BIT() macro.
+
+Reported-by: Arnd Bergmann <arnd@arndb.de>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Acked-by: Arnd Bergmann <arnd@arndb.de>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit d82e99a6f9b38cb1a044b4cd979bd49fd3f67cd2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/mach-sa1100/simpad.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c
+index 9db483a42826..7d4feb8a49ac 100644
+--- a/arch/arm/mach-sa1100/simpad.c
++++ b/arch/arm/mach-sa1100/simpad.c
+@@ -328,9 +328,9 @@ static struct platform_device simpad_gpio_leds = {
+ static struct gpiod_lookup_table simpad_i2c_gpiod_table = {
+ .dev_id = "i2c-gpio",
+ .table = {
+- GPIO_LOOKUP_IDX("gpio", GPIO_GPIO21, NULL, 0,
++ GPIO_LOOKUP_IDX("gpio", 21, NULL, 0,
+ GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+- GPIO_LOOKUP_IDX("gpio", GPIO_GPIO25, NULL, 1,
++ GPIO_LOOKUP_IDX("gpio", 25, NULL, 1,
+ GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ },
+ };
+--
+2.19.0
+
diff --git a/patches/0401-lib-dma-debug.c-fix-incorrect-pfn-calculation.patch b/patches/0401-lib-dma-debug.c-fix-incorrect-pfn-calculation.patch
new file mode 100644
index 0000000..0a5eb97
--- /dev/null
+++ b/patches/0401-lib-dma-debug.c-fix-incorrect-pfn-calculation.patch
@@ -0,0 +1,101 @@
+From cc6073c3c612928080b9d2a8cf9cac97d42d2136 Mon Sep 17 00:00:00 2001
+From: Miles Chen <miles.chen@mediatek.com>
+Date: Fri, 17 Nov 2017 15:26:19 -0800
+Subject: [PATCH 0401/1795] lib/dma-debug.c: fix incorrect pfn calculation
+
+dma-debug reports the following warning:
+
+ WARNING: CPU: 3 PID: 298 at kernel-4.4/lib/dma-debug.c:604
+ debug _dma_assert_idle+0x1a8/0x230()
+ DMA-API: cpu touching an active dma mapped cacheline [cln=0x00000882300]
+ CPU: 3 PID: 298 Comm: vold Tainted: G W O 4.4.22+ #1
+ Hardware name: MT6739 (DT)
+ Call trace:
+ debug_dma_assert_idle+0x1a8/0x230
+ wp_page_copy.isra.96+0x118/0x520
+ do_wp_page+0x4fc/0x534
+ handle_mm_fault+0xd4c/0x1310
+ do_page_fault+0x1c8/0x394
+ do_mem_abort+0x50/0xec
+
+I found that debug_dma_alloc_coherent() and debug_dma_free_coherent()
+assume that dma_alloc_coherent() always returns a linear address.
+
+However it's possible that dma_alloc_coherent() returns a non-linear
+address. In this case, page_to_pfn(virt_to_page(virt)) will return an
+incorrect pfn. If the pfn is valid and mapped as a COW page, we will
+hit the warning when doing wp_page_copy().
+
+Fix this by calculating pfn for linear and non-linear addresses.
+
+[miles.chen@mediatek.com: v4]
+ Link: http://lkml.kernel.org/r/1510872972-23919-1-git-send-email-miles.chen@mediatek.com
+Link: http://lkml.kernel.org/r/1506484087-1177-1-git-send-email-miles.chen@mediatek.com
+Signed-off-by: Miles Chen <miles.chen@mediatek.com>
+Reviewed-by: Robin Murphy <robin.murphy@arm.com>
+Cc: Christoph Hellwig <hch@lst.de>
+Cc: Marek Szyprowski <m.szyprowski@samsung.com>
+Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
+Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
+
+(cherry picked from commit 3aaabbf1c39effa2ac0c11103ed07ef03b0a0d89)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ lib/dma-debug.c | 20 ++++++++++++++++++--
+ 1 file changed, 18 insertions(+), 2 deletions(-)
+
+diff --git a/lib/dma-debug.c b/lib/dma-debug.c
+index ea4cc3dde4f1..1b34d210452c 100644
+--- a/lib/dma-debug.c
++++ b/lib/dma-debug.c
+@@ -1495,14 +1495,22 @@ void debug_dma_alloc_coherent(struct device *dev, size_t size,
+ if (!entry)
+ return;
+
++ /* handle vmalloc and linear addresses */
++ if (!is_vmalloc_addr(virt) && !virt_to_page(virt))
++ return;
++
+ entry->type = dma_debug_coherent;
+ entry->dev = dev;
+- entry->pfn = page_to_pfn(virt_to_page(virt));
+ entry->offset = offset_in_page(virt);
+ entry->size = size;
+ entry->dev_addr = dma_addr;
+ entry->direction = DMA_BIDIRECTIONAL;
+
++ if (is_vmalloc_addr(virt))
++ entry->pfn = vmalloc_to_pfn(virt);
++ else
++ entry->pfn = page_to_pfn(virt_to_page(virt));
++
+ add_dma_entry(entry);
+ }
+ EXPORT_SYMBOL(debug_dma_alloc_coherent);
+@@ -1513,13 +1521,21 @@ void debug_dma_free_coherent(struct device *dev, size_t size,
+ struct dma_debug_entry ref = {
+ .type = dma_debug_coherent,
+ .dev = dev,
+- .pfn = page_to_pfn(virt_to_page(virt)),
+ .offset = offset_in_page(virt),
+ .dev_addr = addr,
+ .size = size,
+ .direction = DMA_BIDIRECTIONAL,
+ };
+
++ /* handle vmalloc and linear addresses */
++ if (!is_vmalloc_addr(virt) && !virt_to_page(virt))
++ return;
++
++ if (is_vmalloc_addr(virt))
++ ref.pfn = vmalloc_to_pfn(virt);
++ else
++ ref.pfn = page_to_pfn(virt_to_page(virt));
++
+ if (unlikely(dma_debug_disabled()))
+ return;
+
+--
+2.19.0
+
diff --git a/patches/0402-include-linux-slab.h-add-kmalloc_array_node-and-kcal.patch b/patches/0402-include-linux-slab.h-add-kmalloc_array_node-and-kcal.patch
new file mode 100644
index 0000000..64e368b
--- /dev/null
+++ b/patches/0402-include-linux-slab.h-add-kmalloc_array_node-and-kcal.patch
@@ -0,0 +1,82 @@
+From cd32c0ac9de45f5317ca81b77aed8021f85b8dd7 Mon Sep 17 00:00:00 2001
+From: Johannes Thumshirn <jthumshirn@suse.de>
+Date: Wed, 15 Nov 2017 17:32:29 -0800
+Subject: [PATCH 0402/1795] include/linux/slab.h: add kmalloc_array_node() and
+ kcalloc_node()
+
+Patch series "Add kmalloc_array_node() and kcalloc_node()".
+
+Our current memeory allocation routines suffer form an API imbalance,
+for one we have kmalloc_array() and kcalloc() which check for overflows
+in size multiplication and we have kmalloc_node() and kzalloc_node()
+which allow for memory allocation on a certain NUMA node but don't check
+for eventual overflows.
+
+This patch (of 6):
+
+We have kmalloc_array() and kcalloc() wrappers on top of kmalloc() which
+ensure us overflow free multiplication for the size of a memory
+allocation but these implementations are not NUMA-aware.
+
+Likewise we have kmalloc_node() which is a NUMA-aware version of
+kmalloc() but the implementation is not aware of any possible overflows
+in eventual size calculations.
+
+Introduce a combination of the two above cases to have a NUMA-node aware
+version of kmalloc_array() and kcalloc().
+
+Link: http://lkml.kernel.org/r/20170927082038.3782-2-jthumshirn@suse.de
+Signed-off-by: Johannes Thumshirn <jthumshirn@suse.de>
+Acked-by: Vlastimil Babka <vbabka@suse.cz>
+Cc: Christoph Hellwig <hch@lst.de>
+Cc: Christoph Lameter <cl@linux.com>
+Cc: Damien Le Moal <damien.lemoal@wdc.com>
+Cc: David Rientjes <rientjes@google.com>
+Cc: "David S. Miller" <davem@davemloft.net>
+Cc: Doug Ledford <dledford@redhat.com>
+Cc: Hal Rosenstock <hal.rosenstock@gmail.com>
+Cc: Jens Axboe <axboe@kernel.dk>
+Cc: Joonsoo Kim <iamjoonsoo.kim@lge.com>
+Cc: Mike Marciniszyn <infinipath@intel.com>
+Cc: Pekka Enberg <penberg@kernel.org>
+Cc: Santosh Shilimkar <santosh.shilimkar@oracle.com>
+Cc: Sean Hefty <sean.hefty@intel.com>
+Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
+Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
+(cherry picked from commit 5799b255c491d853b73fb9e0e1760210315d06cd)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ include/linux/slab.h | 16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+
+diff --git a/include/linux/slab.h b/include/linux/slab.h
+index ae5ed6492d54..28687c296ece 100644
+--- a/include/linux/slab.h
++++ b/include/linux/slab.h
+@@ -630,6 +630,22 @@ extern void *__kmalloc_track_caller(size_t, gfp_t, unsigned long);
+ #define kmalloc_track_caller(size, flags) \
+ __kmalloc_track_caller(size, flags, _RET_IP_)
+
++static inline void *kmalloc_array_node(size_t n, size_t size, gfp_t flags,
++ int node)
++{
++ if (size != 0 && n > SIZE_MAX / size)
++ return NULL;
++ if (__builtin_constant_p(n) && __builtin_constant_p(size))
++ return kmalloc_node(n * size, flags, node);
++ return __kmalloc_node(n * size, flags, node);
++}
++
++static inline void *kcalloc_node(size_t n, size_t size, gfp_t flags, int node)
++{
++ return kmalloc_array_node(n, size, flags | __GFP_ZERO, node);
++}
++
++
+ #ifdef CONFIG_NUMA
+ extern void *__kmalloc_node_track_caller(size_t, gfp_t, int, unsigned long);
+ #define kmalloc_node_track_caller(size, flags, node) \
+--
+2.19.0
+
diff --git a/patches/0403-gpio-pca953x-fix-vendor-prefix-for-PCA9654.patch b/patches/0403-gpio-pca953x-fix-vendor-prefix-for-PCA9654.patch
new file mode 100644
index 0000000..40c6e9b
--- /dev/null
+++ b/patches/0403-gpio-pca953x-fix-vendor-prefix-for-PCA9654.patch
@@ -0,0 +1,53 @@
+From 3318d957d96d8b67fbcdda6b09353394a0f9e8c9 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Thu, 16 Nov 2017 23:18:32 +0300
+Subject: [PATCH 0403/1795] gpio: pca953x: fix vendor prefix for PCA9654
+
+Despite commit 55020c8056a8 ("of: Add vendor prefix for ON Semiconductor
+Corp.") was made long ago, the latter commit 9f49f6dd0473 ("gpio: pca953x:
+add onsemi,pca9654 id") made use of another, undocumented vendor prefix.
+Since such prefix doesn't seem to be used in any device trees, I think we
+can just fix the "compatible" string in the driver and the bindings and be
+done with that...
+
+Fixes: 9f49f6dd0473 ("gpio: pca953x: add onsemi,pca9654 id")
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit 8a64e557f399090f5d1917b2f32a065da2b12be1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/gpio/gpio-pca953x.txt | 2 +-
+ drivers/gpio/gpio-pca953x.c | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/gpio/gpio-pca953x.txt b/Documentation/devicetree/bindings/gpio/gpio-pca953x.txt
+index 7f57271df2bc..0d0158728f89 100644
+--- a/Documentation/devicetree/bindings/gpio/gpio-pca953x.txt
++++ b/Documentation/devicetree/bindings/gpio/gpio-pca953x.txt
+@@ -27,7 +27,7 @@ Required properties:
+ ti,tca6424
+ ti,tca9539
+ ti,tca9554
+- onsemi,pca9654
++ onnn,pca9654
+ exar,xra1202
+
+ Optional properties:
+diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
+index 1b9dbf691ae7..c4795167119b 100644
+--- a/drivers/gpio/gpio-pca953x.c
++++ b/drivers/gpio/gpio-pca953x.c
+@@ -947,7 +947,7 @@ static const struct of_device_id pca953x_dt_ids[] = {
+ { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
+ { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
+
+- { .compatible = "onsemi,pca9654", .data = OF_953X( 8, PCA_INT), },
++ { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), },
+
+ { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
+ { }
+--
+2.19.0
+
diff --git a/patches/0404-i2c-generic-recovery-check-SCL-before-SDA.patch b/patches/0404-i2c-generic-recovery-check-SCL-before-SDA.patch
new file mode 100644
index 0000000..a1f7964
--- /dev/null
+++ b/patches/0404-i2c-generic-recovery-check-SCL-before-SDA.patch
@@ -0,0 +1,60 @@
+From 6d547f3d524fda1f98d3805045bce8825217a2cb Mon Sep 17 00:00:00 2001
+From: Claudio Foellmi <claudio.foellmi@ergon.ch>
+Date: Thu, 5 Oct 2017 14:44:14 +0200
+Subject: [PATCH 0404/1795] i2c: generic recovery: check SCL before SDA
+
+Move the check for a stuck SCL before the check for a high SDA.
+This prevent false positives in the specific case that SDA is fine
+and SCL is stuck, which previously returned 0.
+
+Also check SDA again after the loop, if we can.
+Together, these changes should lead to a lot more failed
+recoveries being caught and returning error codes.
+
+Signed-off-by: Claudio Foellmi <claudio.foellmi@ergon.ch>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit 1f35b8653687b9c08c8d58489c1b5cb9cf961c17)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/i2c/i2c-core-base.c | 10 +++++++---
+ 1 file changed, 7 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/i2c/i2c-core-base.c b/drivers/i2c/i2c-core-base.c
+index 7b961c9c62ef..6334f8837371 100644
+--- a/drivers/i2c/i2c-core-base.c
++++ b/drivers/i2c/i2c-core-base.c
+@@ -205,9 +205,6 @@ static int i2c_generic_recovery(struct i2c_adapter *adap)
+ */
+ while (i++ < RECOVERY_CLK_CNT * 2) {
+ if (val) {
+- /* Break if SDA is high */
+- if (bri->get_sda && bri->get_sda(adap))
+- break;
+ /* SCL shouldn't be low here */
+ if (!bri->get_scl(adap)) {
+ dev_err(&adap->dev,
+@@ -215,6 +212,9 @@ static int i2c_generic_recovery(struct i2c_adapter *adap)
+ ret = -EBUSY;
+ break;
+ }
++ /* Break if SDA is high */
++ if (bri->get_sda && bri->get_sda(adap))
++ break;
+ }
+
+ val = !val;
+@@ -222,6 +222,10 @@ static int i2c_generic_recovery(struct i2c_adapter *adap)
+ ndelay(RECOVERY_NDELAY);
+ }
+
++ /* check if recovery actually succeeded */
++ if (bri->get_sda && !bri->get_sda(adap))
++ ret = -EBUSY;
++
+ if (bri->unprepare_recovery)
+ bri->unprepare_recovery(adap);
+
+--
+2.19.0
+
diff --git a/patches/0405-soc-mediatek-Use-GENPD_FLAG_ACTIVE_WAKEUP.patch b/patches/0405-soc-mediatek-Use-GENPD_FLAG_ACTIVE_WAKEUP.patch
new file mode 100644
index 0000000..5c950da
--- /dev/null
+++ b/patches/0405-soc-mediatek-Use-GENPD_FLAG_ACTIVE_WAKEUP.patch
@@ -0,0 +1,54 @@
+From 5990b15a0ea2af0b547f888eb5bc020e251a86d3 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Tue, 7 Nov 2017 13:48:13 +0100
+Subject: [PATCH 0405/1795] soc: mediatek: Use GENPD_FLAG_ACTIVE_WAKEUP
+
+Set the newly introduced GENPD_FLAG_ACTIVE_WAKEUP, which allows to
+remove the driver's own flag-based callback.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
+Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
+Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+(cherry picked from commit 7534d181a8e60dff0c2a8e12aa6515a87a25b47d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/soc/mediatek/mtk-scpsys.c | 14 ++------------
+ 1 file changed, 2 insertions(+), 12 deletions(-)
+
+diff --git a/drivers/soc/mediatek/mtk-scpsys.c b/drivers/soc/mediatek/mtk-scpsys.c
+index fb2a8b1e7979..102f1c6277a9 100644
+--- a/drivers/soc/mediatek/mtk-scpsys.c
++++ b/drivers/soc/mediatek/mtk-scpsys.c
+@@ -361,17 +361,6 @@ static int scpsys_power_off(struct generic_pm_domain *genpd)
+ return ret;
+ }
+
+-static bool scpsys_active_wakeup(struct device *dev)
+-{
+- struct generic_pm_domain *genpd;
+- struct scp_domain *scpd;
+-
+- genpd = pd_to_genpd(dev->pm_domain);
+- scpd = container_of(genpd, struct scp_domain, genpd);
+-
+- return scpd->data->active_wakeup;
+-}
+-
+ static void init_clks(struct platform_device *pdev, struct clk **clk)
+ {
+ int i;
+@@ -466,7 +455,8 @@ static struct scp *init_scp(struct platform_device *pdev,
+ genpd->name = data->name;
+ genpd->power_off = scpsys_power_off;
+ genpd->power_on = scpsys_power_on;
+- genpd->dev_ops.active_wakeup = scpsys_active_wakeup;
++ if (scpd->data->active_wakeup)
++ genpd->flags |= GENPD_FLAG_ACTIVE_WAKEUP;
+ }
+
+ return scp;
+--
+2.19.0
+
diff --git a/patches/0406-soc-rockchip-power-domain-Use-GENPD_FLAG_ACTIVE_WAKE.patch b/patches/0406-soc-rockchip-power-domain-Use-GENPD_FLAG_ACTIVE_WAKE.patch
new file mode 100644
index 0000000..f50128f
--- /dev/null
+++ b/patches/0406-soc-rockchip-power-domain-Use-GENPD_FLAG_ACTIVE_WAKE.patch
@@ -0,0 +1,56 @@
+From 31c03bb4aba613e1f55e2a979e13f4c6afcfe368 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Tue, 7 Nov 2017 13:48:14 +0100
+Subject: [PATCH 0406/1795] soc: rockchip: power-domain: Use
+ GENPD_FLAG_ACTIVE_WAKEUP
+
+Set the newly introduced GENPD_FLAG_ACTIVE_WAKEUP, which allows to
+remove the driver's own flag-based callback.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
+Acked-by: Heiko Stuebner <heiko@sntech.de>
+Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+(cherry picked from commit 89c7aea915c0c9820191a533e1f304e234074b2d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/soc/rockchip/pm_domains.c | 14 ++------------
+ 1 file changed, 2 insertions(+), 12 deletions(-)
+
+diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c
+index ba009bb9d82b..e89188da1a9d 100644
+--- a/drivers/soc/rockchip/pm_domains.c
++++ b/drivers/soc/rockchip/pm_domains.c
+@@ -358,17 +358,6 @@ static void rockchip_pd_detach_dev(struct generic_pm_domain *genpd,
+ pm_clk_destroy(dev);
+ }
+
+-static bool rockchip_active_wakeup(struct device *dev)
+-{
+- struct generic_pm_domain *genpd;
+- struct rockchip_pm_domain *pd;
+-
+- genpd = pd_to_genpd(dev->pm_domain);
+- pd = container_of(genpd, struct rockchip_pm_domain, genpd);
+-
+- return pd->info->active_wakeup;
+-}
+-
+ static int rockchip_pm_add_one_domain(struct rockchip_pmu *pmu,
+ struct device_node *node)
+ {
+@@ -489,8 +478,9 @@ static int rockchip_pm_add_one_domain(struct rockchip_pmu *pmu,
+ pd->genpd.power_on = rockchip_pd_power_on;
+ pd->genpd.attach_dev = rockchip_pd_attach_dev;
+ pd->genpd.detach_dev = rockchip_pd_detach_dev;
+- pd->genpd.dev_ops.active_wakeup = rockchip_active_wakeup;
+ pd->genpd.flags = GENPD_FLAG_PM_CLK;
++ if (pd_info->active_wakeup)
++ pd->genpd.flags |= GENPD_FLAG_ACTIVE_WAKEUP;
+ pm_genpd_init(&pd->genpd, NULL, false);
+
+ pmu->genpd_data.domains[id] = &pd->genpd;
+--
+2.19.0
+
diff --git a/patches/0407-PM-Domains-Remove-gpd_dev_ops.active_wakeup-callback.patch b/patches/0407-PM-Domains-Remove-gpd_dev_ops.active_wakeup-callback.patch
new file mode 100644
index 0000000..d600ee7
--- /dev/null
+++ b/patches/0407-PM-Domains-Remove-gpd_dev_ops.active_wakeup-callback.patch
@@ -0,0 +1,83 @@
+From de1b4d5b82804ef1f8f2eb74e25bc8004a6a7c67 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Tue, 7 Nov 2017 13:48:15 +0100
+Subject: [PATCH 0407/1795] PM / Domains: Remove gpd_dev_ops.active_wakeup()
+ callback
+
+There are no more users left of the gpd_dev_ops.active_wakeup()
+callback. All have been converted to GENPD_FLAG_ACTIVE_WAKEUP.
+Hence remove the callback.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
+Reviewed-by: Kevin Hilman <khilman@baylibre.com>
+Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+(cherry picked from commit d0af45f1f6528949e05385976eb61c5ebd31854e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/base/power/domain.c | 14 +++-----------
+ include/linux/pm_domain.h | 1 -
+ 2 files changed, 3 insertions(+), 12 deletions(-)
+
+diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
+index 5d63c34e0420..104f3d928b13 100644
+--- a/drivers/base/power/domain.c
++++ b/drivers/base/power/domain.c
+@@ -772,14 +772,6 @@ static bool pm_genpd_present(const struct generic_pm_domain *genpd)
+
+ #ifdef CONFIG_PM_SLEEP
+
+-static bool genpd_dev_active_wakeup(const struct generic_pm_domain *genpd,
+- struct device *dev)
+-{
+- if (genpd_is_active_wakeup(genpd))
+- return true;
+- return GENPD_DEV_CALLBACK(genpd, bool, active_wakeup, dev);
+-}
+-
+ /**
+ * genpd_sync_power_off - Synchronously power off a PM domain and its masters.
+ * @genpd: PM domain to power off, if possible.
+@@ -884,7 +876,7 @@ static bool resume_needed(struct device *dev,
+ if (!device_can_wakeup(dev))
+ return false;
+
+- active_wakeup = genpd_dev_active_wakeup(genpd, dev);
++ active_wakeup = genpd_is_active_wakeup(genpd);
+ return device_may_wakeup(dev) ? active_wakeup : !active_wakeup;
+ }
+
+@@ -954,7 +946,7 @@ static int genpd_finish_suspend(struct device *dev, bool poweroff)
+ if (IS_ERR(genpd))
+ return -EINVAL;
+
+- if (dev->power.wakeup_path && genpd_dev_active_wakeup(genpd, dev))
++ if (dev->power.wakeup_path && genpd_is_active_wakeup(genpd))
+ return 0;
+
+ if (poweroff)
+@@ -1009,7 +1001,7 @@ static int pm_genpd_resume_noirq(struct device *dev)
+ if (IS_ERR(genpd))
+ return -EINVAL;
+
+- if (dev->power.wakeup_path && genpd_dev_active_wakeup(genpd, dev))
++ if (dev->power.wakeup_path && genpd_is_active_wakeup(genpd))
+ return 0;
+
+ genpd_lock(genpd);
+diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h
+index a6688efb29ee..fe23bf0bd985 100644
+--- a/include/linux/pm_domain.h
++++ b/include/linux/pm_domain.h
+@@ -36,7 +36,6 @@ struct dev_power_governor {
+ struct gpd_dev_ops {
+ int (*start)(struct device *dev);
+ int (*stop)(struct device *dev);
+- bool (*active_wakeup)(struct device *dev);
+ };
+
+ struct genpd_power_state {
+--
+2.19.0
+
diff --git a/patches/0408-PM-runtime-Drop-children-check-from-__pm_runtime_set.patch b/patches/0408-PM-runtime-Drop-children-check-from-__pm_runtime_set.patch
new file mode 100644
index 0000000..f636e57
--- /dev/null
+++ b/patches/0408-PM-runtime-Drop-children-check-from-__pm_runtime_set.patch
@@ -0,0 +1,100 @@
+From ebb50b76c08f058dfa56ba5a7bb314474a0a7754 Mon Sep 17 00:00:00 2001
+From: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com>
+Date: Thu, 16 Nov 2017 22:51:22 +0100
+Subject: [PATCH 0408/1795] PM / runtime: Drop children check from
+ __pm_runtime_set_status()
+
+The check for "active" children in __pm_runtime_set_status(), when
+trying to set the parent device status to "suspended", doesn't
+really make sense, because in fact it is not invalid to set the
+status of a device with runtime PM disabled to "suspended" in any
+case. It is invalid to enable runtime PM for a device with its
+status set to "suspended" while its child_count reference counter
+is nonzero, but the check in __pm_runtime_set_status() doesn't
+really cover that situation.
+
+For this reason, drop the children check from __pm_runtime_set_status()
+and add a check against child_count reference counters of "suspended"
+devices to pm_runtime_enable().
+
+Fixes: a8636c89648a (PM / Runtime: Don't allow to suspend a device with an active child)
+Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
+Reviewed-by: Johan Hovold <johan@kernel.org>
+(cherry picked from commit f8817f61e8215b0ff1b73a0d33fa04ef9e6bce8b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/power/runtime_pm.txt | 3 +--
+ drivers/base/power/runtime.c | 31 +++++++++++-------------------
+ 2 files changed, 12 insertions(+), 22 deletions(-)
+
+diff --git a/Documentation/power/runtime_pm.txt b/Documentation/power/runtime_pm.txt
+index 625549d4c74a..0fde3dcf077a 100644
+--- a/Documentation/power/runtime_pm.txt
++++ b/Documentation/power/runtime_pm.txt
+@@ -435,8 +435,7 @@ drivers/base/power/runtime.c and include/linux/pm_runtime.h:
+ PM status to 'suspended' and update its parent's counter of 'active'
+ children as appropriate (it is only valid to use this function if
+ 'power.runtime_error' is set or 'power.disable_depth' is greater than
+- zero); it will fail and return an error code if the device has a child
+- which is active and the 'power.ignore_children' flag is unset
++ zero)
+
+ bool pm_runtime_active(struct device *dev);
+ - return true if the device's runtime PM status is 'active' or its
+diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c
+index b2b1eece0db1..3da090e7ed05 100644
+--- a/drivers/base/power/runtime.c
++++ b/drivers/base/power/runtime.c
+@@ -1102,29 +1102,13 @@ int __pm_runtime_set_status(struct device *dev, unsigned int status)
+ goto out;
+ }
+
+- if (dev->power.runtime_status == status)
++ if (dev->power.runtime_status == status || !parent)
+ goto out_set;
+
+ if (status == RPM_SUSPENDED) {
+- /*
+- * It is invalid to suspend a device with an active child,
+- * unless it has been set to ignore its children.
+- */
+- if (!dev->power.ignore_children &&
+- atomic_read(&dev->power.child_count)) {
+- dev_err(dev, "runtime PM trying to suspend device but active child\n");
+- error = -EBUSY;
+- goto out;
+- }
+-
+- if (parent) {
+- atomic_add_unless(&parent->power.child_count, -1, 0);
+- notify_parent = !parent->power.ignore_children;
+- }
+- goto out_set;
+- }
+-
+- if (parent) {
++ atomic_add_unless(&parent->power.child_count, -1, 0);
++ notify_parent = !parent->power.ignore_children;
++ } else {
+ spin_lock_nested(&parent->power.lock, SINGLE_DEPTH_NESTING);
+
+ /*
+@@ -1308,6 +1292,13 @@ void pm_runtime_enable(struct device *dev)
+ else
+ dev_warn(dev, "Unbalanced %s!\n", __func__);
+
++ WARN(!dev->power.disable_depth &&
++ dev->power.runtime_status == RPM_SUSPENDED &&
++ !dev->power.ignore_children &&
++ atomic_read(&dev->power.child_count) > 0,
++ "Enabling runtime PM for inactive device (%s) with active children\n",
++ dev_name(dev));
++
+ spin_unlock_irqrestore(&dev->power.lock, flags);
+ }
+ EXPORT_SYMBOL_GPL(pm_runtime_enable);
+--
+2.19.0
+
diff --git a/patches/0409-dt-bindings-add-eeprom-size-property.patch b/patches/0409-dt-bindings-add-eeprom-size-property.patch
new file mode 100644
index 0000000..2a69bf2
--- /dev/null
+++ b/patches/0409-dt-bindings-add-eeprom-size-property.patch
@@ -0,0 +1,36 @@
+From 4fc67a9516c3251ba882f86d7257a987b95cccb0 Mon Sep 17 00:00:00 2001
+From: Divagar Mohandass <divagar.mohandass@intel.com>
+Date: Tue, 10 Oct 2017 11:30:35 +0530
+Subject: [PATCH 0409/1795] dt-bindings: add eeprom "size" property
+
+This adds eeprom "size" as optional property for i2c eeproms.
+The "size" property allows explicitly specifying the size of the
+EEPROM chip in bytes.
+
+Acked-by: Rob Herring <robh@kernel.org>
+Reviewed-by: Sakari Ailus <sakari.ailus@linux.intel.com>
+Signed-off-by: Divagar Mohandass <divagar.mohandass@intel.com>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit f2f5afd3845c88e96e863ae31f6a7587906af0e6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/eeprom/eeprom.txt | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/eeprom/eeprom.txt b/Documentation/devicetree/bindings/eeprom/eeprom.txt
+index afc04589eadf..27f2bc15298a 100644
+--- a/Documentation/devicetree/bindings/eeprom/eeprom.txt
++++ b/Documentation/devicetree/bindings/eeprom/eeprom.txt
+@@ -36,6 +36,8 @@ Optional properties:
+
+ - read-only: this parameterless property disables writes to the eeprom
+
++ - size: total eeprom size in bytes
++
+ Example:
+
+ eeprom@52 {
+--
+2.19.0
+
diff --git a/patches/0410-dt-bindings-eeprom-rename-to-at24.txt.patch b/patches/0410-dt-bindings-eeprom-rename-to-at24.txt.patch
new file mode 100644
index 0000000..2a988b4
--- /dev/null
+++ b/patches/0410-dt-bindings-eeprom-rename-to-at24.txt.patch
@@ -0,0 +1,28 @@
+From b60564d4bda2aad5a67eb759eff5476824163483 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa@the-dreams.de>
+Date: Thu, 7 Dec 2017 11:38:28 +0100
+Subject: [PATCH 0410/1795] dt-bindings: eeprom: rename to at24.txt
+
+This binding documentation is for the at24 driver, so the filename
+should reflect it. This avoids confusion because we also have an
+"eeprom" driver in Linux but it doesn't support DT even.
+
+Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+Reviewed-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
+(cherry picked from commit fe06a3fa28917defb70483b2da710d5c54156e52)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/eeprom/{eeprom.txt => at24.txt} | 0
+ 1 file changed, 0 insertions(+), 0 deletions(-)
+ rename Documentation/devicetree/bindings/eeprom/{eeprom.txt => at24.txt} (100%)
+
+diff --git a/Documentation/devicetree/bindings/eeprom/eeprom.txt b/Documentation/devicetree/bindings/eeprom/at24.txt
+similarity index 100%
+rename from Documentation/devicetree/bindings/eeprom/eeprom.txt
+rename to Documentation/devicetree/bindings/eeprom/at24.txt
+--
+2.19.0
+
diff --git a/patches/0411-dt-bindings-add-eeprom-no-read-rollover-property.patch b/patches/0411-dt-bindings-add-eeprom-no-read-rollover-property.patch
new file mode 100644
index 0000000..251eccd
--- /dev/null
+++ b/patches/0411-dt-bindings-add-eeprom-no-read-rollover-property.patch
@@ -0,0 +1,38 @@
+From d2f69f52ffba37a7e4c5fb6b5f68a38ec59d04bf Mon Sep 17 00:00:00 2001
+From: Sven Van Asbroeck <svendev@arcx.com>
+Date: Fri, 8 Dec 2017 11:28:31 -0500
+Subject: [PATCH 0411/1795] dt-bindings: add eeprom "no-read-rollover" property
+
+Adds an optional property for at24 eeproms. This parameterless
+property indicates that the multi-address eeprom does not
+automatically roll over reads to the next slave address.
+
+Signed-off-by: Sven Van Asbroeck <svendev@arcx.com>
+Reviewed-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
+(cherry picked from commit 355dd4ca10b49183272ec54ed9853bb4b95d2391)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/eeprom/at24.txt | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/eeprom/at24.txt b/Documentation/devicetree/bindings/eeprom/at24.txt
+index 27f2bc15298a..a0415b8471bb 100644
+--- a/Documentation/devicetree/bindings/eeprom/at24.txt
++++ b/Documentation/devicetree/bindings/eeprom/at24.txt
+@@ -38,6 +38,11 @@ Optional properties:
+
+ - size: total eeprom size in bytes
+
++ - no-read-rollover:
++ This parameterless property indicates that the multi-address
++ eeprom does not automatically roll over reads to the next
++ slave address. Please consult the manual of your device.
++
+ Example:
+
+ eeprom@52 {
+--
+2.19.0
+
diff --git a/patches/0412-dt-bindings-at24-new-optional-property-wp-gpios.patch b/patches/0412-dt-bindings-at24-new-optional-property-wp-gpios.patch
new file mode 100644
index 0000000..933a768
--- /dev/null
+++ b/patches/0412-dt-bindings-at24-new-optional-property-wp-gpios.patch
@@ -0,0 +1,51 @@
+From cd352f491c0979826b29b1a6d3220d5c6cf8b304 Mon Sep 17 00:00:00 2001
+From: Bartosz Golaszewski <brgl@bgdev.pl>
+Date: Tue, 19 Dec 2017 12:09:23 +0100
+Subject: [PATCH 0412/1795] dt-bindings: at24: new optional property - wp-gpios
+
+AT24 EEPROMs have a write-protect pin, which - when pulled high -
+inhibits writes to the upper quadrant of memory (although it has been
+observed that on some chips it disables writing to the entire memory
+range).
+
+On some boards, this pin is connected to a GPIO and pulled high by
+default, which forces the user to manually change its state before
+writing. On linux this means that we either need to hog the line all
+the time, or set the GPIO value before writing from outside of the
+at24 driver.
+
+Add a new optional property to the device tree binding document, which
+allows to specify the GPIO line to which the write-protect pin is
+connected.
+
+Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
+Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
+Reviewed-by: Rob Herring <robh@kernel.org>
+(cherry picked from commit 3f3d8ef7f4eff5909b0cc996718de81de99af1e6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/eeprom/at24.txt | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/eeprom/at24.txt b/Documentation/devicetree/bindings/eeprom/at24.txt
+index a0415b8471bb..cbc80e194ac6 100644
+--- a/Documentation/devicetree/bindings/eeprom/at24.txt
++++ b/Documentation/devicetree/bindings/eeprom/at24.txt
+@@ -43,10 +43,13 @@ Optional properties:
+ eeprom does not automatically roll over reads to the next
+ slave address. Please consult the manual of your device.
+
++ - wp-gpios: GPIO to which the write-protect pin of the chip is connected.
++
+ Example:
+
+ eeprom@52 {
+ compatible = "atmel,24c32";
+ reg = <0x52>;
+ pagesize = <32>;
++ wp-gpios = <&gpio1 3 0>;
+ };
+--
+2.19.0
+
diff --git a/patches/0413-dt-bindings-at24-consistently-document-the-compatibl.patch b/patches/0413-dt-bindings-at24-consistently-document-the-compatibl.patch
new file mode 100644
index 0000000..c8ff212
--- /dev/null
+++ b/patches/0413-dt-bindings-at24-consistently-document-the-compatibl.patch
@@ -0,0 +1,92 @@
+From 1120188e35e783fab93874b8631720f9dfbe1804 Mon Sep 17 00:00:00 2001
+From: Bartosz Golaszewski <brgl@bgdev.pl>
+Date: Thu, 28 Dec 2017 11:49:10 +0100
+Subject: [PATCH 0413/1795] dt-bindings: at24: consistently document the
+ compatible property
+
+Current description of the compatible property for at24 is quite vague.
+
+State explicitly that any "<manufacturer>,<model>" pair is accepted as
+long as a correct fallback is used for non-atmel chips.
+
+Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
+Reviewed-by: Rob Herring <robh@kernel.org>
+(cherry picked from commit 6da28acf745fe2537d77b9044f78a2a4e100c773)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ .../devicetree/bindings/eeprom/at24.txt | 58 ++++++++++++-------
+ 1 file changed, 36 insertions(+), 22 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/eeprom/at24.txt b/Documentation/devicetree/bindings/eeprom/at24.txt
+index cbc80e194ac6..5ac18ce2e8cd 100644
+--- a/Documentation/devicetree/bindings/eeprom/at24.txt
++++ b/Documentation/devicetree/bindings/eeprom/at24.txt
+@@ -2,28 +2,42 @@ EEPROMs (I2C)
+
+ Required properties:
+
+- - compatible : should be "<manufacturer>,<type>", like these:
+-
+- "atmel,24c00", "atmel,24c01", "atmel,24c02", "atmel,24c04",
+- "atmel,24c08", "atmel,24c16", "atmel,24c32", "atmel,24c64",
+- "atmel,24c128", "atmel,24c256", "atmel,24c512", "atmel,24c1024"
+-
+- "catalyst,24c32"
+-
+- "microchip,24c128"
+-
+- "ramtron,24c64"
+-
+- "renesas,r1ex24002"
+-
+- The following manufacturers values have been deprecated:
+- "at", "at24"
+-
+- If there is no specific driver for <manufacturer>, a generic
+- device with <type> and manufacturer "atmel" should be used.
+- Possible types are:
+- "24c00", "24c01", "24c02", "24c04", "24c08", "24c16", "24c32", "24c64",
+- "24c128", "24c256", "24c512", "24c1024", "spd"
++ - compatible: Must be a "<manufacturer>,<model>" pair. The following <model>
++ values are supported (assuming "atmel" as manufacturer):
++
++ "atmel,24c00",
++ "atmel,24c01",
++ "atmel,24c02",
++ "atmel,spd",
++ "atmel,24c04",
++ "atmel,24c08",
++ "atmel,24c16",
++ "atmel,24c32",
++ "atmel,24c64",
++ "atmel,24c128",
++ "atmel,24c256",
++ "atmel,24c512",
++ "atmel,24c1024",
++
++ If <manufacturer> is not "atmel", then a fallback must be used
++ with the same <model> and "atmel" as manufacturer.
++
++ Example:
++ compatible = "microchip,24c128", "atmel,24c128";
++
++ Supported manufacturers are:
++
++ "catalyst",
++ "microchip",
++ "ramtron",
++ "renesas",
++ "nxp",
++ "st",
++
++ Some vendors use different model names for chips which are just
++ variants of the above. Known such exceptions are listed below:
++
++ "renesas,r1ex24002" - the fallback is "atmel,24c02"
+
+ - reg : the I2C address of the EEPROM
+
+--
+2.19.0
+
diff --git a/patches/0414-dt-bindings-at24-fix-formatting-and-style.patch b/patches/0414-dt-bindings-at24-fix-formatting-and-style.patch
new file mode 100644
index 0000000..8c62d41
--- /dev/null
+++ b/patches/0414-dt-bindings-at24-fix-formatting-and-style.patch
@@ -0,0 +1,61 @@
+From 74e8f1062e610e343783db228bb96a9d71a8038f Mon Sep 17 00:00:00 2001
+From: Bartosz Golaszewski <brgl@bgdev.pl>
+Date: Thu, 28 Dec 2017 11:49:11 +0100
+Subject: [PATCH 0414/1795] dt-bindings: at24: fix formatting and style
+
+Make formatting and style consistent for the entire document.
+
+This patch doesn't change the content of the binding.
+
+Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
+Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
+Reviewed-by: Rob Herring <robh@kernel.org>
+(cherry picked from commit e32a1f30b67521335aa1869263bf9220b5df2b83)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ .../devicetree/bindings/eeprom/at24.txt | 22 +++++++++----------
+ 1 file changed, 11 insertions(+), 11 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/eeprom/at24.txt b/Documentation/devicetree/bindings/eeprom/at24.txt
+index 5ac18ce2e8cd..07a289ba831d 100644
+--- a/Documentation/devicetree/bindings/eeprom/at24.txt
++++ b/Documentation/devicetree/bindings/eeprom/at24.txt
+@@ -39,23 +39,23 @@ Required properties:
+
+ "renesas,r1ex24002" - the fallback is "atmel,24c02"
+
+- - reg : the I2C address of the EEPROM
++ - reg: The I2C address of the EEPROM.
+
+ Optional properties:
+
+- - pagesize : the length of the pagesize for writing. Please consult the
+- manual of your device, that value varies a lot. A wrong value
+- may result in data loss! If not specified, a safety value of
+- '1' is used which will be very slow.
++ - pagesize: The length of the pagesize for writing. Please consult the
++ manual of your device, that value varies a lot. A wrong value
++ may result in data loss! If not specified, a safety value of
++ '1' is used which will be very slow.
+
+- - read-only: this parameterless property disables writes to the eeprom
++ - read-only: This parameterless property disables writes to the eeprom.
+
+- - size: total eeprom size in bytes
++ - size: Total eeprom size in bytes.
+
+- - no-read-rollover:
+- This parameterless property indicates that the multi-address
+- eeprom does not automatically roll over reads to the next
+- slave address. Please consult the manual of your device.
++ - no-read-rollover: This parameterless property indicates that the
++ multi-address eeprom does not automatically roll over
++ reads to the next slave address. Please consult the
++ manual of your device.
+
+ - wp-gpios: GPIO to which the write-protect pin of the chip is connected.
+
+--
+2.19.0
+
diff --git a/patches/0415-dt-bindings-at24-extend-the-list-of-supported-chips.patch b/patches/0415-dt-bindings-at24-extend-the-list-of-supported-chips.patch
new file mode 100644
index 0000000..2a4f913
--- /dev/null
+++ b/patches/0415-dt-bindings-at24-extend-the-list-of-supported-chips.patch
@@ -0,0 +1,49 @@
+From 66f39698215144daa6601104317feb5d488a66de Mon Sep 17 00:00:00 2001
+From: Bartosz Golaszewski <brgl@bgdev.pl>
+Date: Thu, 28 Dec 2017 11:49:12 +0100
+Subject: [PATCH 0415/1795] dt-bindings: at24: extend the list of supported
+ chips
+
+Add other variants of at24 EEPROMs we support in the driver to the
+list of allowed compatible fallbacks.
+
+Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
+Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
+Reviewed-by: Rob Herring <robh@kernel.org>
+(cherry picked from commit e36820425f699e4a4ebefb583df6308d6749eef3)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/eeprom/at24.txt | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/eeprom/at24.txt b/Documentation/devicetree/bindings/eeprom/at24.txt
+index 07a289ba831d..1812c848e369 100644
+--- a/Documentation/devicetree/bindings/eeprom/at24.txt
++++ b/Documentation/devicetree/bindings/eeprom/at24.txt
+@@ -7,13 +7,22 @@ Required properties:
+
+ "atmel,24c00",
+ "atmel,24c01",
++ "atmel,24cs01",
+ "atmel,24c02",
++ "atmel,24cs02",
++ "atmel,24mac402",
++ "atmel,24mac602",
+ "atmel,spd",
+ "atmel,24c04",
++ "atmel,24cs04",
+ "atmel,24c08",
++ "atmel,24cs08",
+ "atmel,24c16",
++ "atmel,24cs16",
+ "atmel,24c32",
++ "atmel,24cs32",
+ "atmel,24c64",
++ "atmel,24cs64",
+ "atmel,24c128",
+ "atmel,24c256",
+ "atmel,24c512",
+--
+2.19.0
+
diff --git a/patches/0416-dt-bindings-at24-sort-manufacturers-alphabetically.patch b/patches/0416-dt-bindings-at24-sort-manufacturers-alphabetically.patch
new file mode 100644
index 0000000..12468b8
--- /dev/null
+++ b/patches/0416-dt-bindings-at24-sort-manufacturers-alphabetically.patch
@@ -0,0 +1,36 @@
+From 0b6a3d9b45ec93af1837b10992a6d389bf6ac55f Mon Sep 17 00:00:00 2001
+From: Peter Rosin <peda@axentia.se>
+Date: Tue, 16 Jan 2018 17:06:15 +0100
+Subject: [PATCH 0416/1795] dt-bindings: at24: sort manufacturers
+ alphabetically
+
+Makes them easier to find.
+
+Signed-off-by: Peter Rosin <peda@axentia.se>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
+(cherry picked from commit 377999caf72233af4abebb511359647f312c4e6e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/eeprom/at24.txt | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/Documentation/devicetree/bindings/eeprom/at24.txt b/Documentation/devicetree/bindings/eeprom/at24.txt
+index 1812c848e369..abfae1beca2b 100644
+--- a/Documentation/devicetree/bindings/eeprom/at24.txt
++++ b/Documentation/devicetree/bindings/eeprom/at24.txt
+@@ -38,9 +38,9 @@ Required properties:
+
+ "catalyst",
+ "microchip",
++ "nxp",
+ "ramtron",
+ "renesas",
+- "nxp",
+ "st",
+
+ Some vendors use different model names for chips which are just
+--
+2.19.0
+
diff --git a/patches/0417-drm-drivers-drop-redundant-drm_edid_to_eld-calls.patch b/patches/0417-drm-drivers-drop-redundant-drm_edid_to_eld-calls.patch
new file mode 100644
index 0000000..71971ac
--- /dev/null
+++ b/patches/0417-drm-drivers-drop-redundant-drm_edid_to_eld-calls.patch
@@ -0,0 +1,244 @@
+From 24ab204442b03b1b39857a26f4e0e879a9f77fd9 Mon Sep 17 00:00:00 2001
+From: Jani Nikula <jani.nikula@intel.com>
+Date: Wed, 1 Nov 2017 16:21:02 +0200
+Subject: [PATCH 0417/1795] drm/drivers: drop redundant drm_edid_to_eld() calls
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+drm_add_edid_modes() now fills in the ELD automatically, so the calls to
+drm_edid_to_eld() are redundant. Remove them.
+
+All the other places are obvious, but nv50 has detached
+drm_edid_to_eld() from the drm_add_edid_modes() call.
+
+Cc: Alex Deucher <alexander.deucher@amd.com>
+Cc: Christian König <christian.koenig@amd.com>
+Cc: Archit Taneja <architt@codeaurora.org>
+Cc: Andrzej Hajda <a.hajda@samsung.com>
+Cc: Russell King <linux@armlinux.org.uk>
+Cc: CK Hu <ck.hu@mediatek.com>
+Cc: Philipp Zabel <p.zabel@pengutronix.de>
+Cc: Ben Skeggs <bskeggs@redhat.com>
+Cc: Mark Yao <mark.yao@rock-chips.com>
+Cc: Benjamin Gaignard <benjamin.gaignard@linaro.org>
+Cc: Vincent Abriou <vincent.abriou@st.com>
+Cc: Thierry Reding <thierry.reding@gmail.com>
+Cc: Eric Anholt <eric@anholt.net>
+Acked-by: Eric Anholt <eric@anholt.net>
+Acked-by: Archit Taneja <architt@codeaurora.org>
+Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Acked-by: Thierry Reding <treding@nvidia.com>
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/0959ca02b983afc9e74dd9acd190ba6e25f21678.1509545641.git.jani.nikula@intel.com
+(cherry picked from commit d471ed04b487c6e66a406bf3763efbfed56baa5b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c | 1 -
+ drivers/gpu/drm/bridge/analogix-anx78xx.c | 2 --
+ drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 2 --
+ drivers/gpu/drm/i2c/tda998x_drv.c | 1 -
+ drivers/gpu/drm/i915/intel_dp.c | 1 -
+ drivers/gpu/drm/i915/intel_modes.c | 1 -
+ drivers/gpu/drm/mediatek/mtk_hdmi.c | 1 -
+ drivers/gpu/drm/nouveau/nv50_display.c | 5 +----
+ drivers/gpu/drm/radeon/radeon_connectors.c | 1 -
+ drivers/gpu/drm/radeon/radeon_dp_mst.c | 1 -
+ drivers/gpu/drm/rockchip/cdn-dp-core.c | 4 +---
+ drivers/gpu/drm/sti/sti_hdmi.c | 1 -
+ drivers/gpu/drm/tegra/output.c | 1 -
+ drivers/gpu/drm/vc4/vc4_hdmi.c | 1 -
+ 14 files changed, 2 insertions(+), 21 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
+index 1eff36a87595..5647af335334 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
+@@ -353,7 +353,6 @@ static int amdgpu_connector_ddc_get_modes(struct drm_connector *connector)
+ if (amdgpu_connector->edid) {
+ drm_mode_connector_update_edid_property(connector, amdgpu_connector->edid);
+ ret = drm_add_edid_modes(connector, amdgpu_connector->edid);
+- drm_edid_to_eld(connector, amdgpu_connector->edid);
+ return ret;
+ }
+ drm_mode_connector_update_edid_property(connector, NULL);
+diff --git a/drivers/gpu/drm/bridge/analogix-anx78xx.c b/drivers/gpu/drm/bridge/analogix-anx78xx.c
+index 9385eb0b1ee4..ed12a7ddd64a 100644
+--- a/drivers/gpu/drm/bridge/analogix-anx78xx.c
++++ b/drivers/gpu/drm/bridge/analogix-anx78xx.c
+@@ -977,8 +977,6 @@ static int anx78xx_get_modes(struct drm_connector *connector)
+ }
+
+ num_modes = drm_add_edid_modes(connector, anx78xx->edid);
+- /* Store the ELD */
+- drm_edid_to_eld(connector, anx78xx->edid);
+
+ unlock:
+ mutex_unlock(&anx78xx->lock);
+diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+index 994f16727458..bc848885735a 100644
+--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+@@ -1914,8 +1914,6 @@ static int dw_hdmi_connector_get_modes(struct drm_connector *connector)
+ drm_mode_connector_update_edid_property(connector, edid);
+ cec_notifier_set_phys_addr_from_edid(hdmi->cec_notifier, edid);
+ ret = drm_add_edid_modes(connector, edid);
+- /* Store the ELD */
+- drm_edid_to_eld(connector, edid);
+ kfree(edid);
+ } else {
+ dev_dbg(hdmi->dev, "failed to get edid\n");
+diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c
+index 54e3255dde13..8c8953e069cd 100644
+--- a/drivers/gpu/drm/i2c/tda998x_drv.c
++++ b/drivers/gpu/drm/i2c/tda998x_drv.c
+@@ -1100,7 +1100,6 @@ static int tda998x_connector_get_modes(struct drm_connector *connector)
+
+ drm_mode_connector_update_edid_property(connector, edid);
+ n = drm_add_edid_modes(connector, edid);
+- drm_edid_to_eld(connector, edid);
+
+ kfree(edid);
+
+diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
+index 76cf68745870..87d04212f0e5 100644
+--- a/drivers/gpu/drm/i915/intel_dp.c
++++ b/drivers/gpu/drm/i915/intel_dp.c
+@@ -5878,7 +5878,6 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
+ if (drm_add_edid_modes(connector, edid)) {
+ drm_mode_connector_update_edid_property(connector,
+ edid);
+- drm_edid_to_eld(connector, edid);
+ } else {
+ kfree(edid);
+ edid = ERR_PTR(-EINVAL);
+diff --git a/drivers/gpu/drm/i915/intel_modes.c b/drivers/gpu/drm/i915/intel_modes.c
+index 28a778b785ac..4e43f873c889 100644
+--- a/drivers/gpu/drm/i915/intel_modes.c
++++ b/drivers/gpu/drm/i915/intel_modes.c
+@@ -57,7 +57,6 @@ int intel_connector_update_modes(struct drm_connector *connector,
+
+ drm_mode_connector_update_edid_property(connector, edid);
+ ret = drm_add_edid_modes(connector, edid);
+- drm_edid_to_eld(connector, edid);
+
+ intel_connector_update_eld_conn_type(connector);
+
+diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi.c b/drivers/gpu/drm/mediatek/mtk_hdmi.c
+index 690c67507cbc..34f84fe3f05e 100644
+--- a/drivers/gpu/drm/mediatek/mtk_hdmi.c
++++ b/drivers/gpu/drm/mediatek/mtk_hdmi.c
+@@ -1222,7 +1222,6 @@ static int mtk_hdmi_conn_get_modes(struct drm_connector *conn)
+ drm_mode_connector_update_edid_property(conn, edid);
+
+ ret = drm_add_edid_modes(conn, edid);
+- drm_edid_to_eld(conn, edid);
+ kfree(edid);
+ return ret;
+ }
+diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c
+index 926ec51ba5be..e558fa480682 100644
+--- a/drivers/gpu/drm/nouveau/nv50_display.c
++++ b/drivers/gpu/drm/nouveau/nv50_display.c
+@@ -2688,7 +2688,6 @@ nv50_audio_enable(struct drm_encoder *encoder, struct drm_display_mode *mode)
+ if (!drm_detect_monitor_audio(nv_connector->edid))
+ return;
+
+- drm_edid_to_eld(&nv_connector->base, nv_connector->edid);
+ memcpy(args.data, nv_connector->base.eld, sizeof(args.data));
+
+ nvif_mthd(disp->disp, 0, &args,
+@@ -3064,10 +3063,8 @@ nv50_mstc_get_modes(struct drm_connector *connector)
+
+ mstc->edid = drm_dp_mst_get_edid(&mstc->connector, mstc->port->mgr, mstc->port);
+ drm_mode_connector_update_edid_property(&mstc->connector, mstc->edid);
+- if (mstc->edid) {
++ if (mstc->edid)
+ ret = drm_add_edid_modes(&mstc->connector, mstc->edid);
+- drm_edid_to_eld(&mstc->connector, mstc->edid);
+- }
+
+ if (!mstc->connector.display_info.bpc)
+ mstc->connector.display_info.bpc = 8;
+diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c
+index 337d3a1c2a40..ff2b4827d743 100644
+--- a/drivers/gpu/drm/radeon/radeon_connectors.c
++++ b/drivers/gpu/drm/radeon/radeon_connectors.c
+@@ -385,7 +385,6 @@ static int radeon_ddc_get_modes(struct drm_connector *connector)
+ if (radeon_connector->edid) {
+ drm_mode_connector_update_edid_property(connector, radeon_connector->edid);
+ ret = drm_add_edid_modes(connector, radeon_connector->edid);
+- drm_edid_to_eld(connector, radeon_connector->edid);
+ return ret;
+ }
+ drm_mode_connector_update_edid_property(connector, NULL);
+diff --git a/drivers/gpu/drm/radeon/radeon_dp_mst.c b/drivers/gpu/drm/radeon/radeon_dp_mst.c
+index 2917ea1b667e..183b4b482138 100644
+--- a/drivers/gpu/drm/radeon/radeon_dp_mst.c
++++ b/drivers/gpu/drm/radeon/radeon_dp_mst.c
+@@ -197,7 +197,6 @@ static int radeon_dp_mst_get_ddc_modes(struct drm_connector *connector)
+ if (radeon_connector->edid) {
+ drm_mode_connector_update_edid_property(&radeon_connector->base, radeon_connector->edid);
+ ret = drm_add_edid_modes(&radeon_connector->base, radeon_connector->edid);
+- drm_edid_to_eld(&radeon_connector->base, radeon_connector->edid);
+ return ret;
+ }
+ drm_mode_connector_update_edid_property(&radeon_connector->base, NULL);
+diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
+index a57da051f516..9841986d0313 100644
+--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
++++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
+@@ -276,11 +276,9 @@ static int cdn_dp_connector_get_modes(struct drm_connector *connector)
+
+ dp->sink_has_audio = drm_detect_monitor_audio(edid);
+ ret = drm_add_edid_modes(connector, edid);
+- if (ret) {
++ if (ret)
+ drm_mode_connector_update_edid_property(connector,
+ edid);
+- drm_edid_to_eld(connector, edid);
+- }
+ }
+ mutex_unlock(&dp->lock);
+
+diff --git a/drivers/gpu/drm/sti/sti_hdmi.c b/drivers/gpu/drm/sti/sti_hdmi.c
+index 30f02d2fdd03..d1902750a85d 100644
+--- a/drivers/gpu/drm/sti/sti_hdmi.c
++++ b/drivers/gpu/drm/sti/sti_hdmi.c
+@@ -976,7 +976,6 @@ static int sti_hdmi_connector_get_modes(struct drm_connector *connector)
+
+ count = drm_add_edid_modes(connector, edid);
+ drm_mode_connector_update_edid_property(connector, edid);
+- drm_edid_to_eld(connector, edid);
+
+ kfree(edid);
+ return count;
+diff --git a/drivers/gpu/drm/tegra/output.c b/drivers/gpu/drm/tegra/output.c
+index 595d1ec3e02e..1480f6aaffe4 100644
+--- a/drivers/gpu/drm/tegra/output.c
++++ b/drivers/gpu/drm/tegra/output.c
+@@ -36,7 +36,6 @@ int tegra_output_connector_get_modes(struct drm_connector *connector)
+
+ if (edid) {
+ err = drm_add_edid_modes(connector, edid);
+- drm_edid_to_eld(connector, edid);
+ kfree(edid);
+ }
+
+diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
+index 8f71157a2b06..111c5b6c3a4a 100644
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
+@@ -287,7 +287,6 @@ static int vc4_hdmi_connector_get_modes(struct drm_connector *connector)
+
+ drm_mode_connector_update_edid_property(connector, edid);
+ ret = drm_add_edid_modes(connector, edid);
+- drm_edid_to_eld(connector, edid);
+ kfree(edid);
+
+ return ret;
+--
+2.19.0
+
diff --git a/patches/0418-i2c-sh_mobile-remove-redundant-initialization.patch b/patches/0418-i2c-sh_mobile-remove-redundant-initialization.patch
new file mode 100644
index 0000000..a8b71b6
--- /dev/null
+++ b/patches/0418-i2c-sh_mobile-remove-redundant-initialization.patch
@@ -0,0 +1,41 @@
+From 168dcb66fc443df0eff60b8842cc4447e35a9ff8 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Thu, 2 Nov 2017 13:47:27 +0100
+Subject: [PATCH 0418/1795] i2c: sh_mobile: remove redundant initialization
+
+Following the documentation, we initialize the HW before each START in
+start_ch(). No need to do the same in activate_ch().
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit f289800af1fd4379403f2630e7e9420401a4cd8e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/i2c/busses/i2c-sh_mobile.c | 10 ----------
+ 1 file changed, 10 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
+index c03acdf71397..0ac152586e74 100644
+--- a/drivers/i2c/busses/i2c-sh_mobile.c
++++ b/drivers/i2c/busses/i2c-sh_mobile.c
+@@ -303,16 +303,6 @@ static void activate_ch(struct sh_mobile_i2c_data *pd)
+ /* Wake up device and enable clock */
+ pm_runtime_get_sync(pd->dev);
+ clk_prepare_enable(pd->clk);
+-
+- /* Enable channel and configure rx ack */
+- iic_set_clr(pd, ICCR, ICCR_ICE, 0);
+-
+- /* Mask all interrupts */
+- iic_wr(pd, ICIC, 0);
+-
+- /* Set the clock */
+- iic_wr(pd, ICCL, pd->iccl & 0xff);
+- iic_wr(pd, ICCH, pd->icch & 0xff);
+ }
+
+ static void deactivate_ch(struct sh_mobile_i2c_data *pd)
+--
+2.19.0
+
diff --git a/patches/0419-i2c-sh_mobile-remove-redundant-deinitialization.patch b/patches/0419-i2c-sh_mobile-remove-redundant-deinitialization.patch
new file mode 100644
index 0000000..bfe35f4
--- /dev/null
+++ b/patches/0419-i2c-sh_mobile-remove-redundant-deinitialization.patch
@@ -0,0 +1,36 @@
+From f6d43419546bc9db4680769b307295bd3cf27903 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Thu, 2 Nov 2017 13:47:28 +0100
+Subject: [PATCH 0419/1795] i2c: sh_mobile: remove redundant deinitialization
+
+No need to clear the interrupt registers because right after that we
+disable the IP core which will reload registers with their initial
+values anyhow.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit 3f3a513985ce55d69922cc9b5a0e095432cdfbc4)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/i2c/busses/i2c-sh_mobile.c | 4 ----
+ 1 file changed, 4 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
+index 0ac152586e74..cbaed24fb18f 100644
+--- a/drivers/i2c/busses/i2c-sh_mobile.c
++++ b/drivers/i2c/busses/i2c-sh_mobile.c
+@@ -307,10 +307,6 @@ static void activate_ch(struct sh_mobile_i2c_data *pd)
+
+ static void deactivate_ch(struct sh_mobile_i2c_data *pd)
+ {
+- /* Clear/disable interrupts */
+- iic_wr(pd, ICSR, 0);
+- iic_wr(pd, ICIC, 0);
+-
+ /* Disable channel */
+ iic_set_clr(pd, ICCR, 0, ICCR_ICE);
+
+--
+2.19.0
+
diff --git a/patches/0420-i2c-sh_mobile-manually-inline-two-short-functions.patch b/patches/0420-i2c-sh_mobile-manually-inline-two-short-functions.patch
new file mode 100644
index 0000000..ff2f5eb
--- /dev/null
+++ b/patches/0420-i2c-sh_mobile-manually-inline-two-short-functions.patch
@@ -0,0 +1,75 @@
+From 98c11ae95939a8529f7b76eda7ed1cd40e8d20da Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Thu, 2 Nov 2017 13:47:29 +0100
+Subject: [PATCH 0420/1795] i2c: sh_mobile: manually "inline" two short
+ functions
+
+Those two functions are very short and only called once. The code
+becomes easier to understand if the code is directly put into the main
+xfer function.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit 91a5e63e3f9879e5030064a3c0d23c3777c4f4d0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/i2c/busses/i2c-sh_mobile.c | 28 +++++++++-------------------
+ 1 file changed, 9 insertions(+), 19 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
+index cbaed24fb18f..02c2912bebb4 100644
+--- a/drivers/i2c/busses/i2c-sh_mobile.c
++++ b/drivers/i2c/busses/i2c-sh_mobile.c
+@@ -298,23 +298,6 @@ static int sh_mobile_i2c_init(struct sh_mobile_i2c_data *pd)
+ return 0;
+ }
+
+-static void activate_ch(struct sh_mobile_i2c_data *pd)
+-{
+- /* Wake up device and enable clock */
+- pm_runtime_get_sync(pd->dev);
+- clk_prepare_enable(pd->clk);
+-}
+-
+-static void deactivate_ch(struct sh_mobile_i2c_data *pd)
+-{
+- /* Disable channel */
+- iic_set_clr(pd, ICCR, 0, ICCR_ICE);
+-
+- /* Disable clock and mark device as idle */
+- clk_disable_unprepare(pd->clk);
+- pm_runtime_put_sync(pd->dev);
+-}
+-
+ static unsigned char i2c_op(struct sh_mobile_i2c_data *pd,
+ enum sh_mobile_i2c_op op, unsigned char data)
+ {
+@@ -717,7 +700,9 @@ static int sh_mobile_i2c_xfer(struct i2c_adapter *adapter,
+ int i;
+ long timeout;
+
+- activate_ch(pd);
++ /* Wake up device and enable clock */
++ pm_runtime_get_sync(pd->dev);
++ clk_prepare_enable(pd->clk);
+
+ /* Process all messages */
+ for (i = 0; i < num; i++) {
+@@ -754,7 +739,12 @@ static int sh_mobile_i2c_xfer(struct i2c_adapter *adapter,
+ break;
+ }
+
+- deactivate_ch(pd);
++ /* Disable channel */
++ iic_set_clr(pd, ICCR, 0, ICCR_ICE);
++
++ /* Disable clock and mark device as idle */
++ clk_disable_unprepare(pd->clk);
++ pm_runtime_put_sync(pd->dev);
+
+ if (!err)
+ err = num;
+--
+2.19.0
+
diff --git a/patches/0421-i2c-sh_mobile-use-direct-writes-when-accessing-ICE-b.patch b/patches/0421-i2c-sh_mobile-use-direct-writes-when-accessing-ICE-b.patch
new file mode 100644
index 0000000..32a28be
--- /dev/null
+++ b/patches/0421-i2c-sh_mobile-use-direct-writes-when-accessing-ICE-b.patch
@@ -0,0 +1,47 @@
+From ae60ed6fbf22f4225061357da8664924668d7769 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Thu, 2 Nov 2017 13:47:30 +0100
+Subject: [PATCH 0421/1795] i2c: sh_mobile: use direct writes when accessing
+ ICE bit
+
+ICE bit is for resetting the module. Other bits don't matter then, so we
+don't need to use the iic_set_clr() function but can use iic_wr().
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit 832a522a3ef5e96b517163ee7d4c249545d88626)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/i2c/busses/i2c-sh_mobile.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
+index 02c2912bebb4..72c9483db769 100644
+--- a/drivers/i2c/busses/i2c-sh_mobile.c
++++ b/drivers/i2c/busses/i2c-sh_mobile.c
+@@ -620,10 +620,10 @@ static int start_ch(struct sh_mobile_i2c_data *pd, struct i2c_msg *usr_msg,
+
+ if (do_init) {
+ /* Initialize channel registers */
+- iic_set_clr(pd, ICCR, 0, ICCR_ICE);
++ iic_wr(pd, ICCR, 0);
+
+ /* Enable channel and configure rx ack */
+- iic_set_clr(pd, ICCR, ICCR_ICE, 0);
++ iic_wr(pd, ICCR, ICCR_ICE);
+
+ /* Set the clock */
+ iic_wr(pd, ICCL, pd->iccl & 0xff);
+@@ -740,7 +740,7 @@ static int sh_mobile_i2c_xfer(struct i2c_adapter *adapter,
+ }
+
+ /* Disable channel */
+- iic_set_clr(pd, ICCR, 0, ICCR_ICE);
++ iic_wr(pd, ICCR, 0);
+
+ /* Disable clock and mark device as idle */
+ clk_disable_unprepare(pd->clk);
+--
+2.19.0
+
diff --git a/patches/0422-i2c-sh_mobile-shorten-exit-of-xfer-routine.patch b/patches/0422-i2c-sh_mobile-shorten-exit-of-xfer-routine.patch
new file mode 100644
index 0000000..f6f67c9
--- /dev/null
+++ b/patches/0422-i2c-sh_mobile-shorten-exit-of-xfer-routine.patch
@@ -0,0 +1,34 @@
+From e099190654238c33c7657f858a5ca8dd3daa6398 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Thu, 2 Nov 2017 13:47:31 +0100
+Subject: [PATCH 0422/1795] i2c: sh_mobile: shorten exit of xfer routine
+
+We can use the ternary operator for easier reading.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit a4d16493be406273320f152814c33ccdb17dcf91)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/i2c/busses/i2c-sh_mobile.c | 4 +---
+ 1 file changed, 1 insertion(+), 3 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
+index 72c9483db769..ebd146ccb244 100644
+--- a/drivers/i2c/busses/i2c-sh_mobile.c
++++ b/drivers/i2c/busses/i2c-sh_mobile.c
+@@ -746,9 +746,7 @@ static int sh_mobile_i2c_xfer(struct i2c_adapter *adapter,
+ clk_disable_unprepare(pd->clk);
+ pm_runtime_put_sync(pd->dev);
+
+- if (!err)
+- err = num;
+- return err;
++ return err ?: num;
+ }
+
+ static u32 sh_mobile_i2c_func(struct i2c_adapter *adapter)
+--
+2.19.0
+
diff --git a/patches/0423-i2c-sh_mobile-let-RuntimePM-do-the-clock-handling.patch b/patches/0423-i2c-sh_mobile-let-RuntimePM-do-the-clock-handling.patch
new file mode 100644
index 0000000..ad1146d
--- /dev/null
+++ b/patches/0423-i2c-sh_mobile-let-RuntimePM-do-the-clock-handling.patch
@@ -0,0 +1,41 @@
+From 7778c156f79a2ce12c021ff8e449b5fda6efa42f Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Wed, 8 Nov 2017 09:50:37 +0100
+Subject: [PATCH 0423/1795] i2c: sh_mobile: let RuntimePM do the clock handling
+
+No need to do it manually.
+
+Reported-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Tested-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit 91701ae85dff9703335b5912673df75f4b6f4c53)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/i2c/busses/i2c-sh_mobile.c | 2 --
+ 1 file changed, 2 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
+index ebd146ccb244..80561ffbcf7b 100644
+--- a/drivers/i2c/busses/i2c-sh_mobile.c
++++ b/drivers/i2c/busses/i2c-sh_mobile.c
+@@ -702,7 +702,6 @@ static int sh_mobile_i2c_xfer(struct i2c_adapter *adapter,
+
+ /* Wake up device and enable clock */
+ pm_runtime_get_sync(pd->dev);
+- clk_prepare_enable(pd->clk);
+
+ /* Process all messages */
+ for (i = 0; i < num; i++) {
+@@ -743,7 +742,6 @@ static int sh_mobile_i2c_xfer(struct i2c_adapter *adapter,
+ iic_wr(pd, ICCR, 0);
+
+ /* Disable clock and mark device as idle */
+- clk_disable_unprepare(pd->clk);
+ pm_runtime_put_sync(pd->dev);
+
+ return err ?: num;
+--
+2.19.0
+
diff --git a/patches/0424-i2c-sh_mobile-avoid-unnecessary-register-read.patch b/patches/0424-i2c-sh_mobile-avoid-unnecessary-register-read.patch
new file mode 100644
index 0000000..866b320
--- /dev/null
+++ b/patches/0424-i2c-sh_mobile-avoid-unnecessary-register-read.patch
@@ -0,0 +1,36 @@
+From afa2b3d18bedd1ceb702cfffd5ab9d8a91bf1210 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Thu, 9 Nov 2017 23:20:53 +0100
+Subject: [PATCH 0424/1795] i2c: sh_mobile: avoid unnecessary register read
+
+There is no data when the first WAIT interrupt arrives. No need to read
+something then.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Tested-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit 2967f9ca8b0dc8d924e0f14c55d1e73d9c6c4975)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/i2c/busses/i2c-sh_mobile.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
+index 80561ffbcf7b..40a66d466c3c 100644
+--- a/drivers/i2c/busses/i2c-sh_mobile.c
++++ b/drivers/i2c/busses/i2c-sh_mobile.c
+@@ -433,8 +433,9 @@ static int sh_mobile_i2c_isr_rx(struct sh_mobile_i2c_data *pd)
+ break;
+ }
+ data = i2c_op(pd, OP_RX_STOP_DATA, 0);
+- } else
++ } else if (real_pos >= 0) {
+ data = i2c_op(pd, OP_RX, 0);
++ }
+
+ if (real_pos >= 0)
+ pd->msg->buf[real_pos] = data;
+--
+2.19.0
+
diff --git a/patches/0425-i2c-sh_mobile-send-STOP-according-to-datasheet.patch b/patches/0425-i2c-sh_mobile-send-STOP-according-to-datasheet.patch
new file mode 100644
index 0000000..b10e7ae
--- /dev/null
+++ b/patches/0425-i2c-sh_mobile-send-STOP-according-to-datasheet.patch
@@ -0,0 +1,111 @@
+From ecde2ad896297eed23d9c78b740ce2b0906e76b9 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Fri, 10 Nov 2017 12:52:10 +0100
+Subject: [PATCH 0425/1795] i2c: sh_mobile: send STOP according to datasheet
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+We initiate STOP (or REP_START) on the second last WAIT interrupt
+currently. This works fine but is not according to the datasheet which
+says to do it on the last WAIT interrupt. This also simplifies the code
+quite a lot, so let's do it.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Tested-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit a4fde7e5c9d6432ba863ee53debf27f10b370678)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/i2c/busses/i2c-sh_mobile.c | 29 ++++++-----------------------
+ 1 file changed, 6 insertions(+), 23 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
+index 40a66d466c3c..c904be631db3 100644
+--- a/drivers/i2c/busses/i2c-sh_mobile.c
++++ b/drivers/i2c/busses/i2c-sh_mobile.c
+@@ -40,21 +40,21 @@
+ /* BUS: S A8 ACK P(*) */
+ /* IRQ: DTE WAIT */
+ /* ICIC: */
+-/* ICCR: 0x94 0x90 */
++/* ICCR: 0x94 0x90 */
+ /* ICDR: A8 */
+ /* */
+ /* 1 byte transmit */
+ /* BUS: S A8 ACK D8(1) ACK P(*) */
+ /* IRQ: DTE WAIT WAIT */
+ /* ICIC: -DTE */
+-/* ICCR: 0x94 0x90 */
++/* ICCR: 0x94 0x90 */
+ /* ICDR: A8 D8(1) */
+ /* */
+ /* 2 byte transmit */
+ /* BUS: S A8 ACK D8(1) ACK D8(2) ACK P(*) */
+ /* IRQ: DTE WAIT WAIT WAIT */
+ /* ICIC: -DTE */
+-/* ICCR: 0x94 0x90 */
++/* ICCR: 0x94 0x90 */
+ /* ICDR: A8 D8(1) D8(2) */
+ /* */
+ /* 3 bytes or more, +---------+ gets repeated */
+@@ -113,7 +113,6 @@ enum sh_mobile_i2c_op {
+ OP_TX_FIRST,
+ OP_TX,
+ OP_TX_STOP,
+- OP_TX_STOP_DATA,
+ OP_TX_TO_RX,
+ OP_RX,
+ OP_RX_STOP,
+@@ -319,10 +318,7 @@ static unsigned char i2c_op(struct sh_mobile_i2c_data *pd,
+ case OP_TX: /* write data */
+ iic_wr(pd, ICDR, data);
+ break;
+- case OP_TX_STOP_DATA: /* write data and issue a stop afterwards */
+- iic_wr(pd, ICDR, data);
+- /* fallthrough */
+- case OP_TX_STOP: /* issue a stop */
++ case OP_TX_STOP: /* issue a stop (or rep_start) */
+ iic_wr(pd, ICCR, pd->send_stop ? ICCR_ICE | ICCR_TRS
+ : ICCR_ICE | ICCR_TRS | ICCR_BBSY);
+ break;
+@@ -356,11 +352,6 @@ static bool sh_mobile_i2c_is_first_byte(struct sh_mobile_i2c_data *pd)
+ return pd->pos == -1;
+ }
+
+-static bool sh_mobile_i2c_is_last_byte(struct sh_mobile_i2c_data *pd)
+-{
+- return pd->pos == pd->msg->len - 1;
+-}
+-
+ static void sh_mobile_i2c_get_data(struct sh_mobile_i2c_data *pd,
+ unsigned char *buf)
+ {
+@@ -378,20 +369,12 @@ static int sh_mobile_i2c_isr_tx(struct sh_mobile_i2c_data *pd)
+ unsigned char data;
+
+ if (pd->pos == pd->msg->len) {
+- /* Send stop if we haven't yet (DMA case) */
+- if (pd->send_stop && pd->stop_after_dma)
+- i2c_op(pd, OP_TX_STOP, 0);
++ i2c_op(pd, OP_TX_STOP, 0);
+ return 1;
+ }
+
+ sh_mobile_i2c_get_data(pd, &data);
+-
+- if (sh_mobile_i2c_is_last_byte(pd))
+- i2c_op(pd, OP_TX_STOP_DATA, data);
+- else if (sh_mobile_i2c_is_first_byte(pd))
+- i2c_op(pd, OP_TX_FIRST, data);
+- else
+- i2c_op(pd, OP_TX, data);
++ i2c_op(pd, sh_mobile_i2c_is_first_byte(pd) ? OP_TX_FIRST : OP_TX, data);
+
+ pd->pos++;
+ return 0;
+--
+2.19.0
+
diff --git a/patches/0426-i2c-sh_mobile-make-sure-to-not-accidently-trigger-ST.patch b/patches/0426-i2c-sh_mobile-make-sure-to-not-accidently-trigger-ST.patch
new file mode 100644
index 0000000..d9b005f
--- /dev/null
+++ b/patches/0426-i2c-sh_mobile-make-sure-to-not-accidently-trigger-ST.patch
@@ -0,0 +1,50 @@
+From c26b8bd9db771ff232f11b9f16f01d79f2c678d5 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Wed, 15 Nov 2017 15:32:21 +0100
+Subject: [PATCH 0426/1795] i2c: sh_mobile: make sure to not accidently trigger
+ STOP
+
+The datasheet was a bit vague, but after consultation with HW designers,
+we came to the conclusion that we should set the SCP bit always when
+dealing only with the ICE bit. A set SCP bit is ignored, and thus fine,
+a cleared one may trigger STOP on the bus.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Tested-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit 4ed152c4daf32d2cd4a5285f3aaca3a4c89a31fb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/i2c/busses/i2c-sh_mobile.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
+index c904be631db3..bc1605a31534 100644
+--- a/drivers/i2c/busses/i2c-sh_mobile.c
++++ b/drivers/i2c/busses/i2c-sh_mobile.c
+@@ -604,10 +604,10 @@ static int start_ch(struct sh_mobile_i2c_data *pd, struct i2c_msg *usr_msg,
+
+ if (do_init) {
+ /* Initialize channel registers */
+- iic_wr(pd, ICCR, 0);
++ iic_wr(pd, ICCR, ICCR_SCP);
+
+ /* Enable channel and configure rx ack */
+- iic_wr(pd, ICCR, ICCR_ICE);
++ iic_wr(pd, ICCR, ICCR_ICE | ICCR_SCP);
+
+ /* Set the clock */
+ iic_wr(pd, ICCL, pd->iccl & 0xff);
+@@ -723,7 +723,7 @@ static int sh_mobile_i2c_xfer(struct i2c_adapter *adapter,
+ }
+
+ /* Disable channel */
+- iic_wr(pd, ICCR, 0);
++ iic_wr(pd, ICCR, ICCR_SCP);
+
+ /* Disable clock and mark device as idle */
+ pm_runtime_put_sync(pd->dev);
+--
+2.19.0
+
diff --git a/patches/0427-iommu-ipmmu-vmsa-Add-r8a7796-DT-binding.patch b/patches/0427-iommu-ipmmu-vmsa-Add-r8a7796-DT-binding.patch
new file mode 100644
index 0000000..bdbd9d8
--- /dev/null
+++ b/patches/0427-iommu-ipmmu-vmsa-Add-r8a7796-DT-binding.patch
@@ -0,0 +1,36 @@
+From 01b27d89150a0e53c8ec2bb1255e1a53d4b2eb1d Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Wed, 20 Dec 2017 09:48:00 -0700
+Subject: [PATCH 0427/1795] iommu/ipmmu-vmsa: Add r8a7796 DT binding
+
+Update the IPMMU DT binding documentation to include the r8a7796 compat
+string for R-Car M3-W.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Acked-by: Rob Herring <robh@kernel.org>
+Acked-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit ca84eaeb3e0520555ee031b5ed26ce1b4b1bbd84)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt b/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt
+index 857df929a654..43cff3e449d0 100644
+--- a/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt
++++ b/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt
+@@ -16,6 +16,7 @@ Required Properties:
+ - "renesas,ipmmu-r8a7793" for the R8A7793 (R-Car M2-N) IPMMU.
+ - "renesas,ipmmu-r8a7794" for the R8A7794 (R-Car E2) IPMMU.
+ - "renesas,ipmmu-r8a7795" for the R8A7795 (R-Car H3) IPMMU.
++ - "renesas,ipmmu-r8a7796" for the R8A7796 (R-Car M3-W) IPMMU.
+ - "renesas,ipmmu-vmsa" for generic R-Car Gen2 VMSA-compatible IPMMU.
+
+ - reg: Base address and size of the IPMMU registers.
+--
+2.19.0
+
diff --git a/patches/0428-iommu-ipmmu-vmsa-Add-r8a779-70-95-DT-bindings.patch b/patches/0428-iommu-ipmmu-vmsa-Add-r8a779-70-95-DT-bindings.patch
new file mode 100644
index 0000000..81b0ad1
--- /dev/null
+++ b/patches/0428-iommu-ipmmu-vmsa-Add-r8a779-70-95-DT-bindings.patch
@@ -0,0 +1,36 @@
+From 546a4e95f3ba2beb2c034247173d8156452f30dc Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Wed, 20 Dec 2017 09:48:01 -0700
+Subject: [PATCH 0428/1795] iommu/ipmmu-vmsa: Add r8a779(70|95) DT bindings
+
+Update the IPMMU DT binding documentation to include the
+r8a77970 (R-Car V3M) and r8a77995 (R-Car D3) compat strings.
+
+Based on work for r8a7796 by Magnus Damm.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
+(cherry picked from commit 9327b810bb7e1f3322fe8ed862a62fe0f2c9f14b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt b/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt
+index 43cff3e449d0..1fd5d69647ca 100644
+--- a/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt
++++ b/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt
+@@ -17,6 +17,8 @@ Required Properties:
+ - "renesas,ipmmu-r8a7794" for the R8A7794 (R-Car E2) IPMMU.
+ - "renesas,ipmmu-r8a7795" for the R8A7795 (R-Car H3) IPMMU.
+ - "renesas,ipmmu-r8a7796" for the R8A7796 (R-Car M3-W) IPMMU.
++ - "renesas,ipmmu-r8a77970" for the R8A77970 (R-Car V3M) IPMMU.
++ - "renesas,ipmmu-r8a77995" for the R8A77995 (R-Car D3) IPMMU.
+ - "renesas,ipmmu-vmsa" for generic R-Car Gen2 VMSA-compatible IPMMU.
+
+ - reg: Base address and size of the IPMMU registers.
+--
+2.19.0
+
diff --git a/patches/0429-iommu-ipmmu-vmsa-Remove-redundant-of_iommu_init_fn-h.patch b/patches/0429-iommu-ipmmu-vmsa-Remove-redundant-of_iommu_init_fn-h.patch
new file mode 100644
index 0000000..31f1d75
--- /dev/null
+++ b/patches/0429-iommu-ipmmu-vmsa-Remove-redundant-of_iommu_init_fn-h.patch
@@ -0,0 +1,48 @@
+From 8bfebd2651ccc99bc7db7a01bcea3371e1b36076 Mon Sep 17 00:00:00 2001
+From: Robin Murphy <robin.murphy@arm.com>
+Date: Tue, 9 Jan 2018 16:17:26 +0000
+Subject: [PATCH 0429/1795] iommu/ipmmu-vmsa: Remove redundant of_iommu_init_fn
+ hook
+
+Having of_iommu_init() call ipmmu_init() via ipmmu_vmsa_iommu_of_setup()
+does nothing that the subsys_initcall wouldn't do slightly later anyway,
+since probe-deferral of masters means it is no longer critical to
+register the driver super-early. Clean it up.
+
+Signed-off-by: Robin Murphy <robin.murphy@arm.com>
+Signed-off-by: Joerg Roedel <jroedel@suse.de>
+(cherry picked from commit e7747d88e05eabed6fd921c3636a9d1f5b4f754f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/iommu/ipmmu-vmsa.c | 14 ++------------
+ 1 file changed, 2 insertions(+), 12 deletions(-)
+
+diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
+index 8dce3a9de9d8..331dad909301 100644
+--- a/drivers/iommu/ipmmu-vmsa.c
++++ b/drivers/iommu/ipmmu-vmsa.c
+@@ -1108,18 +1108,8 @@ static void __exit ipmmu_exit(void)
+ subsys_initcall(ipmmu_init);
+ module_exit(ipmmu_exit);
+
+-#ifdef CONFIG_IOMMU_DMA
+-static int __init ipmmu_vmsa_iommu_of_setup(struct device_node *np)
+-{
+- ipmmu_init();
+- return 0;
+-}
+-
+-IOMMU_OF_DECLARE(ipmmu_vmsa_iommu_of, "renesas,ipmmu-vmsa",
+- ipmmu_vmsa_iommu_of_setup);
+-IOMMU_OF_DECLARE(ipmmu_r8a7795_iommu_of, "renesas,ipmmu-r8a7795",
+- ipmmu_vmsa_iommu_of_setup);
+-#endif
++IOMMU_OF_DECLARE(ipmmu_vmsa_iommu_of, "renesas,ipmmu-vmsa", NULL);
++IOMMU_OF_DECLARE(ipmmu_r8a7795_iommu_of, "renesas,ipmmu-r8a7795", NULL);
+
+ MODULE_DESCRIPTION("IOMMU API for Renesas VMSA-compatible IPMMU");
+ MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
+--
+2.19.0
+
diff --git a/patches/0430-dt-bindings-irqchip-renesas-irqc-Document-R-Car-M3-N.patch b/patches/0430-dt-bindings-irqchip-renesas-irqc-Document-R-Car-M3-N.patch
new file mode 100644
index 0000000..4203db5
--- /dev/null
+++ b/patches/0430-dt-bindings-irqchip-renesas-irqc-Document-R-Car-M3-N.patch
@@ -0,0 +1,44 @@
+From 74ee9b182420b8b95dcdb1ad61da5d13ff62bb44 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 26 Feb 2018 16:25:12 +0100
+Subject: [PATCH 0430/1795] dt-bindings/irqchip/renesas-irqc: Document R-Car
+ M3-N support
+
+Document support for the Interrupt Controller for Externel Devices
+(INTC-EX) in the Renesas M3-N (r8a77965) SoC.
+
+No driver update is needed.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Cc: Mark Rutland <mark.rutland@arm.com>
+Cc: devicetree@vger.kernel.org
+Cc: Jason Cooper <jason@lakedaemon.net>
+Cc: Marc Zyngier <marc.zyngier@arm.com>
+Cc: linux-renesas-soc@vger.kernel.org
+Cc: Rob Herring <robh+dt@kernel.org>
+Link: https://lkml.kernel.org/r/1519658712-22910-1-git-send-email-geert%2Brenesas@glider.be
+
+(cherry picked from commit 7998a4ecc61fbef5547afd379b8953b526709dd2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ .../devicetree/bindings/interrupt-controller/renesas,irqc.txt | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt
+index 33c9a10fdc91..20f121daa910 100644
+--- a/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt
++++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt
+@@ -14,6 +14,7 @@ Required properties:
+ - "renesas,irqc-r8a7794" (R-Car E2)
+ - "renesas,intc-ex-r8a7795" (R-Car H3)
+ - "renesas,intc-ex-r8a7796" (R-Car M3-W)
++ - "renesas,intc-ex-r8a77965" (R-Car M3-N)
+ - "renesas,intc-ex-r8a77970" (R-Car V3M)
+ - "renesas,intc-ex-r8a77995" (R-Car D3)
+ - #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in
+--
+2.19.0
+
diff --git a/patches/0431-PCI-Remove-PCI_REASSIGN_ALL_RSRC-use-on-arm-and-arm6.patch b/patches/0431-PCI-Remove-PCI_REASSIGN_ALL_RSRC-use-on-arm-and-arm6.patch
new file mode 100644
index 0000000..726e28f
--- /dev/null
+++ b/patches/0431-PCI-Remove-PCI_REASSIGN_ALL_RSRC-use-on-arm-and-arm6.patch
@@ -0,0 +1,121 @@
+From 1ca9a01f5b8e699ee2569755e3f7ef17ba3c31cb Mon Sep 17 00:00:00 2001
+From: Bjorn Helgaas <bhelgaas@google.com>
+Date: Thu, 30 Nov 2017 11:21:57 -0600
+Subject: [PATCH 0431/1795] PCI: Remove PCI_REASSIGN_ALL_RSRC use on arm and
+ arm64
+
+On arm, PCI_REASSIGN_ALL_RSRC is used only in pcibios_assign_all_busses(),
+which helps decide whether to reconfigure bridge bus numbers. It has
+nothing to do with BAR assignments. On arm64 and powerpc,
+pcibios_assign_all_busses() tests PCI_REASSIGN_ALL_BUS, which makes more
+sense.
+
+Align arm with arm64 and powerpc, so they all use PCI_REASSIGN_ALL_BUS for
+pcibios_assign_all_busses().
+
+Remove PCI_REASSIGN_ALL_RSRC from the generic, Tegra, Versatile, and
+R-Car drivers. These drivers are used only on arm or arm64, where
+PCI_REASSIGN_ALL_RSRC is not used after this change, so removing it
+should have no effect.
+
+No functional change intended.
+
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Reviewed-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
+Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
+(cherry picked from commit 7153884c088a9500f9379aeec877f3d4d4ec4fba)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/arm/include/asm/pci.h | 5 +----
+ arch/arm/kernel/bios32.c | 2 +-
+ drivers/pci/host/pci-host-common.c | 2 +-
+ drivers/pci/host/pci-tegra.c | 2 +-
+ drivers/pci/host/pci-versatile.c | 2 +-
+ drivers/pci/host/pcie-rcar.c | 2 +-
+ 6 files changed, 6 insertions(+), 9 deletions(-)
+
+diff --git a/arch/arm/include/asm/pci.h b/arch/arm/include/asm/pci.h
+index 960d9dc4f380..1f0de808d111 100644
+--- a/arch/arm/include/asm/pci.h
++++ b/arch/arm/include/asm/pci.h
+@@ -10,10 +10,7 @@ extern unsigned long pcibios_min_io;
+ extern unsigned long pcibios_min_mem;
+ #define PCIBIOS_MIN_MEM pcibios_min_mem
+
+-static inline int pcibios_assign_all_busses(void)
+-{
+- return pci_has_flag(PCI_REASSIGN_ALL_RSRC);
+-}
++#define pcibios_assign_all_busses() pci_has_flag(PCI_REASSIGN_ALL_BUS)
+
+ #ifdef CONFIG_PCI_DOMAINS
+ static inline int pci_proc_domain(struct pci_bus *bus)
+diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
+index 0cd0aefb3a8f..ed46ca69813d 100644
+--- a/arch/arm/kernel/bios32.c
++++ b/arch/arm/kernel/bios32.c
+@@ -527,7 +527,7 @@ void pci_common_init_dev(struct device *parent, struct hw_pci *hw)
+ struct pci_sys_data *sys;
+ LIST_HEAD(head);
+
+- pci_add_flags(PCI_REASSIGN_ALL_RSRC);
++ pci_add_flags(PCI_REASSIGN_ALL_BUS);
+ if (hw->preinit)
+ hw->preinit();
+ pcibios_init_hw(parent, hw, &head);
+diff --git a/drivers/pci/host/pci-host-common.c b/drivers/pci/host/pci-host-common.c
+index 148896f73c06..eabaaa325bd2 100644
+--- a/drivers/pci/host/pci-host-common.c
++++ b/drivers/pci/host/pci-host-common.c
+@@ -142,7 +142,7 @@ int pci_host_common_probe(struct platform_device *pdev,
+
+ /* Do not reassign resources if probe only */
+ if (!pci_has_flag(PCI_PROBE_ONLY))
+- pci_add_flags(PCI_REASSIGN_ALL_RSRC | PCI_REASSIGN_ALL_BUS);
++ pci_add_flags(PCI_REASSIGN_ALL_BUS);
+
+ list_splice_init(&resources, &bridge->windows);
+ bridge->dev.parent = dev;
+diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c
+index 1987fec1f126..5c85bb3e39c4 100644
+--- a/drivers/pci/host/pci-tegra.c
++++ b/drivers/pci/host/pci-tegra.c
+@@ -2278,7 +2278,7 @@ static int tegra_pcie_probe(struct platform_device *pdev)
+
+ tegra_pcie_enable_ports(pcie);
+
+- pci_add_flags(PCI_REASSIGN_ALL_RSRC | PCI_REASSIGN_ALL_BUS);
++ pci_add_flags(PCI_REASSIGN_ALL_BUS);
+ host->busnr = pcie->busn.start;
+ host->dev.parent = &pdev->dev;
+ host->ops = &tegra_pcie_ops;
+diff --git a/drivers/pci/host/pci-versatile.c b/drivers/pci/host/pci-versatile.c
+index aff4cfb555fb..286a79567207 100644
+--- a/drivers/pci/host/pci-versatile.c
++++ b/drivers/pci/host/pci-versatile.c
+@@ -202,7 +202,7 @@ static int versatile_pci_probe(struct platform_device *pdev)
+ writel(0, versatile_cfg_base[0] + PCI_INTERRUPT_LINE);
+
+ pci_add_flags(PCI_ENABLE_PROC_DOMAINS);
+- pci_add_flags(PCI_REASSIGN_ALL_BUS | PCI_REASSIGN_ALL_RSRC);
++ pci_add_flags(PCI_REASSIGN_ALL_BUS);
+
+ list_splice_init(&pci_res, &bridge->windows);
+ bridge->dev.parent = dev;
+diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
+index bab9f24ae70b..0c8b19e6a4c8 100644
+--- a/drivers/pci/host/pcie-rcar.c
++++ b/drivers/pci/host/pcie-rcar.c
+@@ -459,7 +459,7 @@ static int rcar_pcie_enable(struct rcar_pcie *pcie)
+
+ rcar_pcie_setup(&bridge->windows, pcie);
+
+- pci_add_flags(PCI_REASSIGN_ALL_RSRC | PCI_REASSIGN_ALL_BUS);
++ pci_add_flags(PCI_REASSIGN_ALL_BUS);
+
+ bridge->dev.parent = dev;
+ bridge->sysdata = pcie;
+--
+2.19.0
+
diff --git a/patches/0432-net-phy-micrel-Use-strlcpy-for-ethtool-get_strings.patch b/patches/0432-net-phy-micrel-Use-strlcpy-for-ethtool-get_strings.patch
new file mode 100644
index 0000000..29d6aa1
--- /dev/null
+++ b/patches/0432-net-phy-micrel-Use-strlcpy-for-ethtool-get_strings.patch
@@ -0,0 +1,40 @@
+From 9bf4836d8bfe1e2787f9ce8df62b9ddaf8a32556 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <f.fainelli@gmail.com>
+Date: Fri, 2 Mar 2018 15:08:38 -0800
+Subject: [PATCH 0432/1795] net: phy: micrel: Use strlcpy() for
+ ethtool::get_strings
+
+Our statistics strings are allocated at initialization without being
+bound to a specific size, yet, we would copy ETH_GSTRING_LEN bytes using
+memcpy() which would create out of bounds accesses, this was flagged by
+KASAN. Replace this with strlcpy() to make sure we are bound the source
+buffer size and we also always NUL-terminate strings.
+
+Fixes: 2b2427d06426 ("phy: micrel: Add ethtool statistics counters")
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 55f53567afe5f0cd2fd9e006b174c08c31c466f8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/net/phy/micrel.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
+index 422ff6333c52..0bcb51cd95ca 100644
+--- a/drivers/net/phy/micrel.c
++++ b/drivers/net/phy/micrel.c
+@@ -664,8 +664,8 @@ static void kszphy_get_strings(struct phy_device *phydev, u8 *data)
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(kszphy_hw_stats); i++) {
+- memcpy(data + i * ETH_GSTRING_LEN,
+- kszphy_hw_stats[i].string, ETH_GSTRING_LEN);
++ strlcpy(data + i * ETH_GSTRING_LEN,
++ kszphy_hw_stats[i].string, ETH_GSTRING_LEN);
+ }
+ }
+
+--
+2.19.0
+
diff --git a/patches/0433-ravb-kill-redundant-check-in-the-probe-method.patch b/patches/0433-ravb-kill-redundant-check-in-the-probe-method.patch
new file mode 100644
index 0000000..451e8cf
--- /dev/null
+++ b/patches/0433-ravb-kill-redundant-check-in-the-probe-method.patch
@@ -0,0 +1,37 @@
+From 4394fc44808a446efafe1ce41f8257114c0cedf7 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sun, 31 Dec 2017 21:41:35 +0300
+Subject: [PATCH 0433/1795] ravb: kill redundant check in the probe() method
+
+Browsing thru the driver disassembly, I noticed that gcc was able to
+figure out that the 'ndev' pointer is always non-NULL when calling
+free_netdev() on the probe() method's error path and thus skip that
+redundant NULL check... gcc is smart, be like gcc! :-)
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 5d0c100c228b51ce2c14bdbc845ca446e0494689)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/net/ethernet/renesas/ravb_main.c | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c
+index 98e82669d41d..1cc2c266fe9f 100644
+--- a/drivers/net/ethernet/renesas/ravb_main.c
++++ b/drivers/net/ethernet/renesas/ravb_main.c
+@@ -2181,8 +2181,7 @@ static int ravb_probe(struct platform_device *pdev)
+ if (chip_id != RCAR_GEN2)
+ ravb_ptp_stop(ndev);
+ out_release:
+- if (ndev)
+- free_netdev(ndev);
++ free_netdev(ndev);
+
+ pm_runtime_put(&pdev->dev);
+ pm_runtime_disable(&pdev->dev);
+--
+2.19.0
+
diff --git a/patches/0434-ravb-Remove-obsolete-explicit-clock-handling-for-WoL.patch b/patches/0434-ravb-Remove-obsolete-explicit-clock-handling-for-WoL.patch
new file mode 100644
index 0000000..fc84f55
--- /dev/null
+++ b/patches/0434-ravb-Remove-obsolete-explicit-clock-handling-for-WoL.patch
@@ -0,0 +1,56 @@
+From bb222cc5d313a69bb037b8a0368f738e60fe4a0c Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 12 Feb 2018 14:40:00 +0100
+Subject: [PATCH 0434/1795] ravb: Remove obsolete explicit clock handling for
+ WoL
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Currently, if Wake-on-LAN is enabled, the EtherAVB device's module clock
+is manually kept running during system suspend, to make sure the device
+stays active.
+
+Since commit 91c719f5ec6671f7 ("soc: renesas: rcar-sysc: Keep wakeup
+sources active during system suspend") , this workaround is no longer
+needed. Hence remove all explicit clock handling to keep the device
+active.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Reviewed-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit dd62c236c0fe1166d037485494ec5ff6545480eb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/net/ethernet/renesas/ravb_main.c | 6 ------
+ 1 file changed, 6 deletions(-)
+
+diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c
+index 1cc2c266fe9f..e38d25d981e3 100644
+--- a/drivers/net/ethernet/renesas/ravb_main.c
++++ b/drivers/net/ethernet/renesas/ravb_main.c
+@@ -2231,9 +2231,6 @@ static int ravb_wol_setup(struct net_device *ndev)
+ /* Enable MagicPacket */
+ ravb_modify(ndev, ECMR, ECMR_MPDE, ECMR_MPDE);
+
+- /* Increased clock usage so device won't be suspended */
+- clk_enable(priv->clk);
+-
+ return enable_irq_wake(priv->emac_irq);
+ }
+
+@@ -2252,9 +2249,6 @@ static int ravb_wol_restore(struct net_device *ndev)
+ if (ret < 0)
+ return ret;
+
+- /* Restore clock usage count */
+- clk_disable(priv->clk);
+-
+ return disable_irq_wake(priv->emac_irq);
+ }
+
+--
+2.19.0
+
diff --git a/patches/0435-DT-net-renesas-ravb-document-R8A77980-bindings.patch b/patches/0435-DT-net-renesas-ravb-document-R8A77980-bindings.patch
new file mode 100644
index 0000000..56111b3
--- /dev/null
+++ b/patches/0435-DT-net-renesas-ravb-document-R8A77980-bindings.patch
@@ -0,0 +1,35 @@
+From e4a886d786ce255abbc3221fc66a2505bfbcc147 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Thu, 1 Feb 2018 23:13:45 +0300
+Subject: [PATCH 0435/1795] DT: net: renesas,ravb: document R8A77980 bindings
+
+Renesas R-Car V3H (R8A77980) SoC has the R-Car gen3 compatible EtherAVB
+device, so document the SoC specific bindings.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Rob Herring <robh@kernel.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 3a291aa11898bc9577c16339f108aac02ba0d109)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/net/renesas,ravb.txt | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/Documentation/devicetree/bindings/net/renesas,ravb.txt b/Documentation/devicetree/bindings/net/renesas,ravb.txt
+index c902261893b9..92fd4b2f17b2 100644
+--- a/Documentation/devicetree/bindings/net/renesas,ravb.txt
++++ b/Documentation/devicetree/bindings/net/renesas,ravb.txt
+@@ -18,6 +18,7 @@ Required properties:
+ - "renesas,etheravb-r8a7795" for the R8A7795 SoC.
+ - "renesas,etheravb-r8a7796" for the R8A7796 SoC.
+ - "renesas,etheravb-r8a77970" for the R8A77970 SoC.
++ - "renesas,etheravb-r8a77980" for the R8A77980 SoC.
+ - "renesas,etheravb-r8a77995" for the R8A77995 SoC.
+ - "renesas,etheravb-rcar-gen3" as a fallback for the above
+ R-Car Gen3 devices.
+--
+2.19.0
+
diff --git a/patches/0436-dt-bindings-net-renesas-ravb-Make-stream-buffer-opti.patch b/patches/0436-dt-bindings-net-renesas-ravb-Make-stream-buffer-opti.patch
new file mode 100644
index 0000000..f4179fd
--- /dev/null
+++ b/patches/0436-dt-bindings-net-renesas-ravb-Make-stream-buffer-opti.patch
@@ -0,0 +1,46 @@
+From 911eda488b798963cf87c26368eeb497862b9991 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 2 Mar 2018 16:01:48 +0100
+Subject: [PATCH 0436/1795] dt-bindings: net: renesas-ravb: Make stream buffer
+ optional
+
+The Stream Buffer for EtherAVB-IF (STBE) is an optional component, and
+is not present on all SoCs.
+
+Document this in the DT bindings, including a list of SoCs that do have
+it.
+
+Fixes: 785ec87483d1e24a ("ravb: document R8A77970 bindings")
+Fixes: f231c4178a655b09 ("dt-bindings: net: renesas-ravb: Add support for R8A77995 RAVB")
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Rob Herring <robh@kernel.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 25b5cdfcce1b57971840505dfc78556bd12dea6d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/net/renesas,ravb.txt | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/Documentation/devicetree/bindings/net/renesas,ravb.txt b/Documentation/devicetree/bindings/net/renesas,ravb.txt
+index 92fd4b2f17b2..b4dc455eb155 100644
+--- a/Documentation/devicetree/bindings/net/renesas,ravb.txt
++++ b/Documentation/devicetree/bindings/net/renesas,ravb.txt
+@@ -27,7 +27,11 @@ Required properties:
+ SoC-specific version corresponding to the platform first followed by
+ the generic version.
+
+-- reg: offset and length of (1) the register block and (2) the stream buffer.
++- reg: Offset and length of (1) the register block and (2) the stream buffer.
++ The region for the register block is mandatory.
++ The region for the stream buffer is optional, as it is only present on
++ R-Car Gen2 and RZ/G1 SoCs, and on R-Car H3 (R8A7795), M3-W (R8A7796),
++ and M3-N (R8A77965).
+ - interrupts: A list of interrupt-specifiers, one for each entry in
+ interrupt-names.
+ If interrupt-names is not present, an interrupt specifier
+--
+2.19.0
+
diff --git a/patches/0437-dt-bindings-can-rcar_can-document-r8a774-35-can-supp.patch b/patches/0437-dt-bindings-can-rcar_can-document-r8a774-35-can-supp.patch
new file mode 100644
index 0000000..e3a0172
--- /dev/null
+++ b/patches/0437-dt-bindings-can-rcar_can-document-r8a774-35-can-supp.patch
@@ -0,0 +1,48 @@
+From cff3f5acf09430590792756ba59706de212d90ff Mon Sep 17 00:00:00 2001
+From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Date: Tue, 7 Nov 2017 15:10:42 +0000
+Subject: [PATCH 0437/1795] dt-bindings: can: rcar_can: document r8a774[35] can
+ support
+
+Document "renesas,can-r8a7743" and "renesas,can-r8a7745" compatible
+strings. Since the fallback compatible string ("renesas,rcar-gen2-can")
+activates the right code in the driver, no driver change is needed.
+
+Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Reviewed-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
+(cherry picked from commit 216bf2f490c214b8a0702b52cc957138ba24bc3f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/net/can/rcar_can.txt | 7 +++++--
+ 1 file changed, 5 insertions(+), 2 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/net/can/rcar_can.txt b/Documentation/devicetree/bindings/net/can/rcar_can.txt
+index 06bb7cc334c8..94a7f33ac5e9 100644
+--- a/Documentation/devicetree/bindings/net/can/rcar_can.txt
++++ b/Documentation/devicetree/bindings/net/can/rcar_can.txt
+@@ -2,7 +2,9 @@ Renesas R-Car CAN controller Device Tree Bindings
+ -------------------------------------------------
+
+ Required properties:
+-- compatible: "renesas,can-r8a7778" if CAN controller is a part of R8A7778 SoC.
++- compatible: "renesas,can-r8a7743" if CAN controller is a part of R8A7743 SoC.
++ "renesas,can-r8a7745" if CAN controller is a part of R8A7745 SoC.
++ "renesas,can-r8a7778" if CAN controller is a part of R8A7778 SoC.
+ "renesas,can-r8a7779" if CAN controller is a part of R8A7779 SoC.
+ "renesas,can-r8a7790" if CAN controller is a part of R8A7790 SoC.
+ "renesas,can-r8a7791" if CAN controller is a part of R8A7791 SoC.
+@@ -12,7 +14,8 @@ Required properties:
+ "renesas,can-r8a7795" if CAN controller is a part of R8A7795 SoC.
+ "renesas,can-r8a7796" if CAN controller is a part of R8A7796 SoC.
+ "renesas,rcar-gen1-can" for a generic R-Car Gen1 compatible device.
+- "renesas,rcar-gen2-can" for a generic R-Car Gen2 compatible device.
++ "renesas,rcar-gen2-can" for a generic R-Car Gen2 or RZ/G1
++ compatible device.
+ "renesas,rcar-gen3-can" for a generic R-Car Gen3 compatible device.
+ When compatible with the generic version, nodes must list the
+ SoC-specific version corresponding to the platform first
+--
+2.19.0
+
diff --git a/patches/0438-dmaengine-rcar-dmac-ensure-CHCR-DE-bit-is-actually-0.patch b/patches/0438-dmaengine-rcar-dmac-ensure-CHCR-DE-bit-is-actually-0.patch
new file mode 100644
index 0000000..6c50f6d
--- /dev/null
+++ b/patches/0438-dmaengine-rcar-dmac-ensure-CHCR-DE-bit-is-actually-0.patch
@@ -0,0 +1,90 @@
+From a6e1e1c623a59c9b6f01a919ef8d103a08c128c1 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Fri, 17 Nov 2017 11:00:28 +0900
+Subject: [PATCH 0438/1795] dmaengine: rcar-dmac: ensure CHCR DE bit is
+ actually 0 after clearing
+
+DMAC reads data from source device, and buffered it until transferable
+size for sink device. Because of this behavior, DMAC is including
+buffered data .
+
+Now, CHCR DE bit is controlling DMA transfer enable/disable.
+
+If DE bit was cleared during data transferring, or during buffering,
+it will flush buffered data if source device was peripheral device
+(The buffered data will be removed if source device was memory).
+Because of this behavior, driver should ensure that DE bit is actually
+0 after clearing.
+
+This patch adds new rcar_dmac_chcr_de_barrier() and call it after CHCR
+register access.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
+Tested-by: Ryo Kodama <ryo.kodama.vz@renesas.com>
+Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+(cherry picked from commit a8d46a7f5d17ca9cbe9e9c7d1d23dc6ea437e141)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/dma/sh/rcar-dmac.c | 22 ++++++++++++++++++++++
+ 1 file changed, 22 insertions(+)
+
+diff --git a/drivers/dma/sh/rcar-dmac.c b/drivers/dma/sh/rcar-dmac.c
+index 9d6ce5051d8f..01818dc00d46 100644
+--- a/drivers/dma/sh/rcar-dmac.c
++++ b/drivers/dma/sh/rcar-dmac.c
+@@ -10,6 +10,7 @@
+ * published by the Free Software Foundation.
+ */
+
++#include <linux/delay.h>
+ #include <linux/dma-mapping.h>
+ #include <linux/dmaengine.h>
+ #include <linux/interrupt.h>
+@@ -741,6 +742,24 @@ static int rcar_dmac_fill_hwdesc(struct rcar_dmac_chan *chan,
+ /* -----------------------------------------------------------------------------
+ * Stop and reset
+ */
++static void rcar_dmac_chcr_de_barrier(struct rcar_dmac_chan *chan)
++{
++ u32 chcr;
++ unsigned int i;
++
++ /*
++ * Ensure that the setting of the DE bit is actually 0 after
++ * clearing it.
++ */
++ for (i = 0; i < 1024; i++) {
++ chcr = rcar_dmac_chan_read(chan, RCAR_DMACHCR);
++ if (!(chcr & RCAR_DMACHCR_DE))
++ return;
++ udelay(1);
++ }
++
++ dev_err(chan->chan.device->dev, "CHCR DE check error\n");
++}
+
+ static void rcar_dmac_chan_halt(struct rcar_dmac_chan *chan)
+ {
+@@ -749,6 +768,7 @@ static void rcar_dmac_chan_halt(struct rcar_dmac_chan *chan)
+ chcr &= ~(RCAR_DMACHCR_DSE | RCAR_DMACHCR_DSIE | RCAR_DMACHCR_IE |
+ RCAR_DMACHCR_TE | RCAR_DMACHCR_DE);
+ rcar_dmac_chan_write(chan, RCAR_DMACHCR, chcr);
++ rcar_dmac_chcr_de_barrier(chan);
+ }
+
+ static void rcar_dmac_chan_reinit(struct rcar_dmac_chan *chan)
+@@ -1490,6 +1510,8 @@ static irqreturn_t rcar_dmac_isr_channel(int irq, void *dev)
+ if (chcr & RCAR_DMACHCR_TE)
+ mask |= RCAR_DMACHCR_DE;
+ rcar_dmac_chan_write(chan, RCAR_DMACHCR, chcr & ~mask);
++ if (mask & RCAR_DMACHCR_DE)
++ rcar_dmac_chcr_de_barrier(chan);
+
+ if (chcr & RCAR_DMACHCR_DSE)
+ ret |= rcar_dmac_isr_desc_stage_end(chan);
+--
+2.19.0
+
diff --git a/patches/0439-dmaengine-rcar-dmac-use-TCRB-instead-of-TCR-for-resi.patch b/patches/0439-dmaengine-rcar-dmac-use-TCRB-instead-of-TCR-for-resi.patch
new file mode 100644
index 0000000..f5aa8e9
--- /dev/null
+++ b/patches/0439-dmaengine-rcar-dmac-use-TCRB-instead-of-TCR-for-resi.patch
@@ -0,0 +1,112 @@
+From bcae7f43ca3f23210a7aba08fdc5112b74da1255 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Fri, 17 Nov 2017 02:09:32 +0000
+Subject: [PATCH 0439/1795] dmaengine: rcar-dmac: use TCRB instead of TCR for
+ residue
+
+SYS/RT/Audio DMAC includes independent data buffers for reading
+and writing. Therefore, the read transfer counter and write transfer
+counter have different values.
+TCR indicates read counter, and TCRB indicates write counter.
+The relationship is like below.
+
+ TCR TCRB
+ [SOURCE] -> [DMAC] -> [SINK]
+
+In the MEM_TO_DEV direction, what really matters is how much data has
+been written to the device. If the DMA is interrupted between read and
+write, then, the data doesn't end up in the destination, so shouldn't
+be counted. TCRB is thus the register we should use in this cases.
+
+In the DEV_TO_MEM direction, the situation is more complex. Both the
+read and write side are important. What matters from a data consumer
+point of view is how much data has been written to memory.
+On the other hand, if the transfer is interrupted between read and
+write, we'll end up losing data. It can also be important to report.
+
+In the MEM_TO_MEM direction, what matters is of course how much data
+has been written to memory from data consumer point of view.
+Here, because read and write have independent data buffers, it will
+take a while for TCR and TCRB to become equal. Thus we should check
+TCRB in this case, too.
+
+Thus, all cases we should check TCRB instead of TCR.
+
+Without this patch, Sound Capture has noise after PulseAudio support
+(= 07b7acb51d2 ("ASoC: rsnd: update pointer more accurate")), because
+the recorder will use wrong residue counter which indicates transferred
+from sound device, but in reality the data was not yet put to memory
+and recorder will record it.
+
+However, because DMAC is buffering data until it can be transferable
+size, TCRB might not be updated.
+For example, if consumer doesn't know how much data can be received,
+it requests enough size to DMAC. But in reality, it might receive very
+few data. In such case, DMAC just buffered it until transferable size,
+and no TCRB updated.
+
+In such case, this buffered data will be transferred if CHCR::DE bit was
+cleared, and this is happen if rcar_dmac_chan_halt(). In other word, it
+happen when consumer called dmaengine_terminate_all().
+
+Because of this behavior, it need to flush buffered data when it returns
+"residue" (= dmaengine_tx_status()).
+Otherwise, consumer might calculate wrong things if it called
+dmaengine_tx_status() and dmaengine_terminate_all() consecutively.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
+Tested-by: Ryo Kodama <ryo.kodama.vz@renesas.com>
+Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+(cherry picked from commit 73a47bd0da668c99f04e9076f2b02101a5b2749b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/dma/sh/rcar-dmac.c | 22 +++++++++++++++++++++-
+ 1 file changed, 21 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/dma/sh/rcar-dmac.c b/drivers/dma/sh/rcar-dmac.c
+index 01818dc00d46..dfcf8a49c508 100644
+--- a/drivers/dma/sh/rcar-dmac.c
++++ b/drivers/dma/sh/rcar-dmac.c
+@@ -761,6 +761,23 @@ static void rcar_dmac_chcr_de_barrier(struct rcar_dmac_chan *chan)
+ dev_err(chan->chan.device->dev, "CHCR DE check error\n");
+ }
+
++static void rcar_dmac_sync_tcr(struct rcar_dmac_chan *chan)
++{
++ u32 chcr = rcar_dmac_chan_read(chan, RCAR_DMACHCR);
++
++ if (!(chcr & RCAR_DMACHCR_DE))
++ return;
++
++ /* set DE=0 and flush remaining data */
++ rcar_dmac_chan_write(chan, RCAR_DMACHCR, (chcr & ~RCAR_DMACHCR_DE));
++
++ /* make sure all remaining data was flushed */
++ rcar_dmac_chcr_de_barrier(chan);
++
++ /* back DE */
++ rcar_dmac_chan_write(chan, RCAR_DMACHCR, chcr);
++}
++
+ static void rcar_dmac_chan_halt(struct rcar_dmac_chan *chan)
+ {
+ u32 chcr = rcar_dmac_chan_read(chan, RCAR_DMACHCR);
+@@ -1338,8 +1355,11 @@ static unsigned int rcar_dmac_chan_get_residue(struct rcar_dmac_chan *chan,
+ residue += chunk->size;
+ }
+
++ if (desc->direction == DMA_DEV_TO_MEM)
++ rcar_dmac_sync_tcr(chan);
++
+ /* Add the residue for the current chunk. */
+- residue += rcar_dmac_chan_read(chan, RCAR_DMATCR) << desc->xfer_shift;
++ residue += rcar_dmac_chan_read(chan, RCAR_DMATCRB) << desc->xfer_shift;
+
+ return residue;
+ }
+--
+2.19.0
+
diff --git a/patches/0440-dmaengine-rcar-dmac-Make-DMAC-reinit-during-system-r.patch b/patches/0440-dmaengine-rcar-dmac-Make-DMAC-reinit-during-system-r.patch
new file mode 100644
index 0000000..ded68d5
--- /dev/null
+++ b/patches/0440-dmaengine-rcar-dmac-Make-DMAC-reinit-during-system-r.patch
@@ -0,0 +1,73 @@
+From 8a0ee2f2d70c52429cec06b81ce4ae04f45f4f88 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 17 Jan 2018 10:38:28 +0100
+Subject: [PATCH 0440/1795] dmaengine: rcar-dmac: Make DMAC reinit during
+ system resume explicit
+
+The current (empty) system sleep callbacks rely on the PM core to force
+a runtime resume to reinitialize the DMAC registers during system
+resume. Without a reinitialization, e.g. SCIF DMA will hang silently
+after a system resume on R-Car Gen3.
+
+Make this explicit by using pm_runtime_force_{suspend,resume}() as the
+system sleep callbacks instead. Use SET_LATE_SYSTEM_SLEEP_PM_OPS() as
+DMA engines must be initialized before all DMA slave devices.
+
+Fixes: 17218e0092f8 "PM / genpd: Stop/start devices without pm_runtime_force_suspend/resume()"
+Suggested-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
+Acked-by: Vinod Koul <vinod.koul@intel.com>
+Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+(cherry picked from commit 1131b0a4af911de50b22239cabdf6dcd3f15df15)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/dma/sh/rcar-dmac.c | 24 +++++++-----------------
+ 1 file changed, 7 insertions(+), 17 deletions(-)
+
+diff --git a/drivers/dma/sh/rcar-dmac.c b/drivers/dma/sh/rcar-dmac.c
+index dfcf8a49c508..ed8d934d5f48 100644
+--- a/drivers/dma/sh/rcar-dmac.c
++++ b/drivers/dma/sh/rcar-dmac.c
+@@ -1666,22 +1666,6 @@ static struct dma_chan *rcar_dmac_of_xlate(struct of_phandle_args *dma_spec,
+ * Power management
+ */
+
+-#ifdef CONFIG_PM_SLEEP
+-static int rcar_dmac_sleep_suspend(struct device *dev)
+-{
+- /*
+- * TODO: Wait for the current transfer to complete and stop the device.
+- */
+- return 0;
+-}
+-
+-static int rcar_dmac_sleep_resume(struct device *dev)
+-{
+- /* TODO: Resume transfers, if any. */
+- return 0;
+-}
+-#endif
+-
+ #ifdef CONFIG_PM
+ static int rcar_dmac_runtime_suspend(struct device *dev)
+ {
+@@ -1697,7 +1681,13 @@ static int rcar_dmac_runtime_resume(struct device *dev)
+ #endif
+
+ static const struct dev_pm_ops rcar_dmac_pm = {
+- SET_SYSTEM_SLEEP_PM_OPS(rcar_dmac_sleep_suspend, rcar_dmac_sleep_resume)
++ /*
++ * TODO for system sleep/resume:
++ * - Wait for the current transfer to complete and stop the device,
++ * - Resume transfers, if any.
++ */
++ SET_LATE_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
++ pm_runtime_force_resume)
+ SET_RUNTIME_PM_OPS(rcar_dmac_runtime_suspend, rcar_dmac_runtime_resume,
+ NULL)
+ };
+--
+2.19.0
+
diff --git a/patches/0441-dt-bindings-display-rcar-du-Document-R8A774-35-DU.patch b/patches/0441-dt-bindings-display-rcar-du-Document-R8A774-35-DU.patch
new file mode 100644
index 0000000..bca402a
--- /dev/null
+++ b/patches/0441-dt-bindings-display-rcar-du-Document-R8A774-35-DU.patch
@@ -0,0 +1,83 @@
+From 4859c7bc62c1fc26bbf71e7545cec30ffbca28fc Mon Sep 17 00:00:00 2001
+From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Date: Fri, 13 Oct 2017 16:22:19 +0100
+Subject: [PATCH 0441/1795] dt-bindings: display: rcar-du: Document R8A774[35]
+ DU
+
+Add device tree bindings for r8a7743 and r8a7745 DUs.
+r8a7743 DU is similar to the one from r8a7791, r8a7745 DU is similar
+to the one from r8a7794.
+
+Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Reviewed-by: Biju Das <biju.das@bp.renesas.com>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+[Don't reference R8A779[0123456] and R8A774[35] explicitly]
+[Number all DPAD, HDMI and LVDS ports]
+Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+
+(cherry picked from commit faf4a3ff36137aaa8de1a8da99a92f6e712903f1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ .../bindings/display/renesas,du.txt | 30 +++++++++++--------
+ 1 file changed, 17 insertions(+), 13 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/display/renesas,du.txt b/Documentation/devicetree/bindings/display/renesas,du.txt
+index 4bbd1e9bf3be..cd48aba3bc8c 100644
+--- a/Documentation/devicetree/bindings/display/renesas,du.txt
++++ b/Documentation/devicetree/bindings/display/renesas,du.txt
+@@ -3,6 +3,8 @@
+ Required Properties:
+
+ - compatible: must be one of the following.
++ - "renesas,du-r8a7743" for R8A7743 (RZ/G1M) compatible DU
++ - "renesas,du-r8a7745" for R8A7745 (RZ/G1E) compatible DU
+ - "renesas,du-r8a7779" for R8A7779 (R-Car H1) compatible DU
+ - "renesas,du-r8a7790" for R8A7790 (R-Car H2) compatible DU
+ - "renesas,du-r8a7791" for R8A7791 (R-Car M2-W) compatible DU
+@@ -27,10 +29,10 @@ Required Properties:
+ - clock-names: Name of the clocks. This property is model-dependent.
+ - R8A7779 uses a single functional clock. The clock doesn't need to be
+ named.
+- - R8A779[0123456] use one functional clock per channel and one clock per
+- LVDS encoder (if available). The functional clocks must be named "du.x"
+- with "x" being the channel numerical index. The LVDS clocks must be
+- named "lvds.x" with "x" being the LVDS encoder numerical index.
++ - All other DU instances use one functional clock per channel and one
++ clock per LVDS encoder (if available). The functional clocks must be
++ named "du.x" with "x" being the channel numerical index. The LVDS clocks
++ must be named "lvds.x" with "x" being the LVDS encoder numerical index.
+ - In addition to the functional and encoder clocks, all DU versions also
+ support externally supplied pixel clocks. Those clocks are optional.
+ When supplied they must be named "dclkin.x" with "x" being the input
+@@ -49,16 +51,18 @@ bindings specified in Documentation/devicetree/bindings/graph.txt.
+ The following table lists for each supported model the port number
+ corresponding to each DU output.
+
+- Port 0 Port1 Port2 Port3
++ Port0 Port1 Port2 Port3
+ -----------------------------------------------------------------------------
+- R8A7779 (H1) DPAD 0 DPAD 1 - -
+- R8A7790 (H2) DPAD LVDS 0 LVDS 1 -
+- R8A7791 (M2-W) DPAD LVDS 0 - -
+- R8A7792 (V2H) DPAD 0 DPAD 1 - -
+- R8A7793 (M2-N) DPAD LVDS 0 - -
+- R8A7794 (E2) DPAD 0 DPAD 1 - -
+- R8A7795 (H3) DPAD HDMI 0 HDMI 1 LVDS
+- R8A7796 (M3-W) DPAD HDMI LVDS -
++ R8A7743 (RZ/G1M) DPAD 0 LVDS 0 - -
++ R8A7745 (RZ/G1E) DPAD 0 DPAD 1 - -
++ R8A7779 (R-Car H1) DPAD 0 DPAD 1 - -
++ R8A7790 (R-Car H2) DPAD 0 LVDS 0 LVDS 1 -
++ R8A7791 (R-Car M2-W) DPAD 0 LVDS 0 - -
++ R8A7792 (R-Car V2H) DPAD 0 DPAD 1 - -
++ R8A7793 (R-Car M2-N) DPAD 0 LVDS 0 - -
++ R8A7794 (R-Car E2) DPAD 0 DPAD 1 - -
++ R8A7795 (R-Car H3) DPAD 0 HDMI 0 HDMI 1 LVDS 0
++ R8A7796 (R-Car M3-W) DPAD 0 HDMI 0 LVDS 0 -
+
+
+ Example: R8A7795 (R-Car H3) ES2.0 DU
+--
+2.19.0
+
diff --git a/patches/0442-drm-rcar-du-Add-R8A7743-support.patch b/patches/0442-drm-rcar-du-Add-R8A7743-support.patch
new file mode 100644
index 0000000..edf8062
--- /dev/null
+++ b/patches/0442-drm-rcar-du-Add-R8A7743-support.patch
@@ -0,0 +1,61 @@
+From 07084ee18d47e03cb5e7fb976cd1be040eccaffb Mon Sep 17 00:00:00 2001
+From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Date: Fri, 13 Oct 2017 16:22:20 +0100
+Subject: [PATCH 0442/1795] drm: rcar-du: Add R8A7743 support
+
+Add support for the R8A7743 DU (which is very similar to the R8A7791 DU);
+it has 1 DPAD (RGB) output and 1 LVDS output.
+
+Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Reviewed-by: Biju Das <biju.das@bp.renesas.com>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+(cherry picked from commit 36a46da90212ddeeb78c2f902caaca264d8496a9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpu/drm/rcar-du/rcar_du_drv.c | 22 ++++++++++++++++++++++
+ 1 file changed, 22 insertions(+)
+
+diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
+index d2f29e6b1112..3db5e8df4ce6 100644
+--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
++++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
+@@ -34,6 +34,27 @@
+ * Device Information
+ */
+
++static const struct rcar_du_device_info rzg1_du_r8a7743_info = {
++ .gen = 2,
++ .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
++ | RCAR_DU_FEATURE_EXT_CTRL_REGS,
++ .num_crtcs = 2,
++ .routes = {
++ /*
++ * R8A7743 has one RGB output and one LVDS output
++ */
++ [RCAR_DU_OUTPUT_DPAD0] = {
++ .possible_crtcs = BIT(1) | BIT(0),
++ .port = 0,
++ },
++ [RCAR_DU_OUTPUT_LVDS0] = {
++ .possible_crtcs = BIT(0),
++ .port = 1,
++ },
++ },
++ .num_lvds = 1,
++};
++
+ static const struct rcar_du_device_info rcar_du_r8a7779_info = {
+ .gen = 2,
+ .features = 0,
+@@ -207,6 +228,7 @@ static const struct rcar_du_device_info rcar_du_r8a7796_info = {
+ };
+
+ static const struct of_device_id rcar_du_of_table[] = {
++ { .compatible = "renesas,du-r8a7743", .data = &rzg1_du_r8a7743_info },
+ { .compatible = "renesas,du-r8a7779", .data = &rcar_du_r8a7779_info },
+ { .compatible = "renesas,du-r8a7790", .data = &rcar_du_r8a7790_info },
+ { .compatible = "renesas,du-r8a7791", .data = &rcar_du_r8a7791_info },
+--
+2.19.0
+
diff --git a/patches/0443-drm-rcar-du-Add-R8A7745-support.patch b/patches/0443-drm-rcar-du-Add-R8A7745-support.patch
new file mode 100644
index 0000000..e0f46f0
--- /dev/null
+++ b/patches/0443-drm-rcar-du-Add-R8A7745-support.patch
@@ -0,0 +1,61 @@
+From 04678e8faacd542164393a6ed01a998778240013 Mon Sep 17 00:00:00 2001
+From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Date: Fri, 13 Oct 2017 16:22:22 +0100
+Subject: [PATCH 0443/1795] drm: rcar-du: Add R8A7745 support
+
+Add support for the R8A7745 DU (which is very similar to the R8A7794 DU);
+it has 2 RGB outputs.
+
+Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Reviewed-by: Biju Das <biju.das@bp.renesas.com>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+(cherry picked from commit cdd90700157293dc7cb67d932b4f2fc44bd2a623)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpu/drm/rcar-du/rcar_du_drv.c | 22 ++++++++++++++++++++++
+ 1 file changed, 22 insertions(+)
+
+diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
+index 3db5e8df4ce6..faa5b328986a 100644
+--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
++++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
+@@ -55,6 +55,27 @@ static const struct rcar_du_device_info rzg1_du_r8a7743_info = {
+ .num_lvds = 1,
+ };
+
++static const struct rcar_du_device_info rzg1_du_r8a7745_info = {
++ .gen = 2,
++ .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
++ | RCAR_DU_FEATURE_EXT_CTRL_REGS,
++ .num_crtcs = 2,
++ .routes = {
++ /*
++ * R8A7745 has two RGB outputs
++ */
++ [RCAR_DU_OUTPUT_DPAD0] = {
++ .possible_crtcs = BIT(0),
++ .port = 0,
++ },
++ [RCAR_DU_OUTPUT_DPAD1] = {
++ .possible_crtcs = BIT(1),
++ .port = 1,
++ },
++ },
++ .num_lvds = 0,
++};
++
+ static const struct rcar_du_device_info rcar_du_r8a7779_info = {
+ .gen = 2,
+ .features = 0,
+@@ -229,6 +250,7 @@ static const struct rcar_du_device_info rcar_du_r8a7796_info = {
+
+ static const struct of_device_id rcar_du_of_table[] = {
+ { .compatible = "renesas,du-r8a7743", .data = &rzg1_du_r8a7743_info },
++ { .compatible = "renesas,du-r8a7745", .data = &rzg1_du_r8a7745_info },
+ { .compatible = "renesas,du-r8a7779", .data = &rcar_du_r8a7779_info },
+ { .compatible = "renesas,du-r8a7790", .data = &rcar_du_r8a7790_info },
+ { .compatible = "renesas,du-r8a7791", .data = &rcar_du_r8a7791_info },
+--
+2.19.0
+
diff --git a/patches/0444-drm-rcar-du-Don-t-set-connector-DPMS-property.patch b/patches/0444-drm-rcar-du-Don-t-set-connector-DPMS-property.patch
new file mode 100644
index 0000000..ec10d7a
--- /dev/null
+++ b/patches/0444-drm-rcar-du-Don-t-set-connector-DPMS-property.patch
@@ -0,0 +1,46 @@
+From 848186f058e2e86385e8a2508464df6b14806bfb Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 15 Aug 2017 15:36:19 +0300
+Subject: [PATCH 0444/1795] drm: rcar-du: Don't set connector DPMS property
+
+Since commit 4a97a3da420b ("drm: Don't update property values for atomic
+drivers") atomic drivers must not update property values as properties
+are read from the state instead. To catch remaining users, the
+drm_object_property_set_value() function now throws a warning when
+called by atomic drivers on non-immutable properties, and we hit that
+warning when creating connectors.
+
+The easy fix is to just remove the drm_object_property_set_value() as it
+is used here to set the initial value of the connector's DPMS property
+to OFF. The DPMS property applies on top of the connector's state crtc
+pointer (initialized to NULL) that is the main connector on/off control,
+and should thus default to ON.
+
+Fixes: 4a97a3da420b ("drm: Don't update property values for atomic drivers")
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+(cherry picked from commit e2f930aaa3519865bbdfa1a37d4974a717c1fa09)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c | 4 ----
+ 1 file changed, 4 deletions(-)
+
+diff --git a/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c b/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c
+index b373ad48ef5f..e96f2df0c305 100644
+--- a/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c
++++ b/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c
+@@ -79,10 +79,6 @@ int rcar_du_lvds_connector_init(struct rcar_du_device *rcdu,
+
+ drm_connector_helper_add(connector, &connector_helper_funcs);
+
+- connector->dpms = DRM_MODE_DPMS_OFF;
+- drm_object_property_set_value(&connector->base,
+- rcdu->ddev->mode_config.dpms_property, DRM_MODE_DPMS_OFF);
+-
+ ret = drm_mode_connector_attach_encoder(connector, encoder);
+ if (ret < 0)
+ return ret;
+--
+2.19.0
+
diff --git a/patches/0445-drm-rcar-du-Implement-system-suspend-resume-support.patch b/patches/0445-drm-rcar-du-Implement-system-suspend-resume-support.patch
new file mode 100644
index 0000000..c59edfa
--- /dev/null
+++ b/patches/0445-drm-rcar-du-Implement-system-suspend-resume-support.patch
@@ -0,0 +1,83 @@
+From 0de8e6c848876ba932158c6e4123460a4bb9b467 Mon Sep 17 00:00:00 2001
+From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
+Date: Fri, 15 Sep 2017 17:42:06 +0100
+Subject: [PATCH 0445/1795] drm: rcar-du: Implement system suspend/resume
+ support
+
+To support system suspend operations we must ensure the hardware is
+stopped, and resumed explicitly from the suspend and resume handlers.
+
+Implement suspend and resume functions using the DRM atomic helper
+functions.
+
+Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
+Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit 7912dee7775e4c7590c227b4163bdb635bc50dd6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpu/drm/rcar-du/rcar_du_drv.c | 18 +++++++++++++++---
+ drivers/gpu/drm/rcar-du/rcar_du_drv.h | 1 +
+ 2 files changed, 16 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
+index faa5b328986a..6e02c762a557 100644
+--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
++++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
+@@ -22,6 +22,7 @@
+ #include <linux/wait.h>
+
+ #include <drm/drmP.h>
++#include <drm/drm_atomic_helper.h>
+ #include <drm/drm_crtc_helper.h>
+ #include <drm/drm_fb_cma_helper.h>
+ #include <drm/drm_gem_cma_helper.h>
+@@ -309,9 +310,19 @@ static struct drm_driver rcar_du_driver = {
+ static int rcar_du_pm_suspend(struct device *dev)
+ {
+ struct rcar_du_device *rcdu = dev_get_drvdata(dev);
++ struct drm_atomic_state *state;
+
+ drm_kms_helper_poll_disable(rcdu->ddev);
+- /* TODO Suspend the CRTC */
++ drm_fbdev_cma_set_suspend_unlocked(rcdu->fbdev, true);
++
++ state = drm_atomic_helper_suspend(rcdu->ddev);
++ if (IS_ERR(state)) {
++ drm_fbdev_cma_set_suspend_unlocked(rcdu->fbdev, false);
++ drm_kms_helper_poll_enable(rcdu->ddev);
++ return PTR_ERR(state);
++ }
++
++ rcdu->suspend_state = state;
+
+ return 0;
+ }
+@@ -320,9 +331,10 @@ static int rcar_du_pm_resume(struct device *dev)
+ {
+ struct rcar_du_device *rcdu = dev_get_drvdata(dev);
+
+- /* TODO Resume the CRTC */
+-
++ drm_atomic_helper_resume(rcdu->ddev, rcdu->suspend_state);
++ drm_fbdev_cma_set_suspend_unlocked(rcdu->fbdev, false);
+ drm_kms_helper_poll_enable(rcdu->ddev);
++
+ return 0;
+ }
+ #endif
+diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
+index f8cd79488ece..f400fde65a0c 100644
+--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
++++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
+@@ -81,6 +81,7 @@ struct rcar_du_device {
+
+ struct drm_device *ddev;
+ struct drm_fbdev_cma *fbdev;
++ struct drm_atomic_state *suspend_state;
+
+ struct rcar_du_crtc crtcs[RCAR_DU_MAX_CRTCS];
+ unsigned int num_crtcs;
+--
+2.19.0
+
diff --git a/patches/0446-drm-rcar-du-Remove-unused-CRTC-suspend-resume-functi.patch b/patches/0446-drm-rcar-du-Remove-unused-CRTC-suspend-resume-functi.patch
new file mode 100644
index 0000000..29b23d6
--- /dev/null
+++ b/patches/0446-drm-rcar-du-Remove-unused-CRTC-suspend-resume-functi.patch
@@ -0,0 +1,70 @@
+From 33974b9dc235304e04e9858c4ae1965d37a54888 Mon Sep 17 00:00:00 2001
+From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
+Date: Fri, 15 Sep 2017 17:42:07 +0100
+Subject: [PATCH 0446/1795] drm: rcar-du: Remove unused CRTC suspend/resume
+ functions
+
+An early implementation of suspend-resume helpers are available in the
+CRTC module, however they are unused and no longer needed.
+
+With suspend and resume handled by the core DRM atomic helpers, we can
+remove the unused functions.
+
+Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
+Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit cf05f74ef40ed608e554f635799e831995213215)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 35 --------------------------
+ 1 file changed, 35 deletions(-)
+
+diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
+index 301ea1a8018e..b492063a6e1f 100644
+--- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
++++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
+@@ -557,41 +557,6 @@ static void rcar_du_crtc_stop(struct rcar_du_crtc *rcrtc)
+ rcar_du_group_start_stop(rcrtc->group, false);
+ }
+
+-void rcar_du_crtc_suspend(struct rcar_du_crtc *rcrtc)
+-{
+- if (rcar_du_has(rcrtc->group->dev, RCAR_DU_FEATURE_VSP1_SOURCE))
+- rcar_du_vsp_disable(rcrtc);
+-
+- rcar_du_crtc_stop(rcrtc);
+- rcar_du_crtc_put(rcrtc);
+-}
+-
+-void rcar_du_crtc_resume(struct rcar_du_crtc *rcrtc)
+-{
+- unsigned int i;
+-
+- if (!rcrtc->crtc.state->active)
+- return;
+-
+- rcar_du_crtc_get(rcrtc);
+- rcar_du_crtc_setup(rcrtc);
+-
+- /* Commit the planes state. */
+- if (!rcar_du_has(rcrtc->group->dev, RCAR_DU_FEATURE_VSP1_SOURCE)) {
+- for (i = 0; i < rcrtc->group->num_planes; ++i) {
+- struct rcar_du_plane *plane = &rcrtc->group->planes[i];
+-
+- if (plane->plane.state->crtc != &rcrtc->crtc)
+- continue;
+-
+- rcar_du_plane_setup(plane);
+- }
+- }
+-
+- rcar_du_crtc_update_planes(rcrtc);
+- rcar_du_crtc_start(rcrtc);
+-}
+-
+ /* -----------------------------------------------------------------------------
+ * CRTC Functions
+ */
+--
+2.19.0
+
diff --git a/patches/0447-drm-rcar-du-Share-plane-atomic-check-code-between-Ge.patch b/patches/0447-drm-rcar-du-Share-plane-atomic-check-code-between-Ge.patch
new file mode 100644
index 0000000..719f4a9
--- /dev/null
+++ b/patches/0447-drm-rcar-du-Share-plane-atomic-check-code-between-Ge.patch
@@ -0,0 +1,131 @@
+From 30c337e0d6f24d60ee3abfcd894e9a71d40c4304 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 15 Aug 2017 18:45:21 +0300
+Subject: [PATCH 0447/1795] drm: rcar-du: Share plane atomic check code between
+ Gen2 and Gen3
+
+The plane atomic check implementation is identical on Gen2 (DU planes)
+and Gen3 (VSP planes), but two separate functions exist as they operate
+on different data structures. Refactor the code to share the
+implementation.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Tested-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
+Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
+(cherry picked from commit 9c893a61b79d38b8997cc417a6b359222cf92414)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/gpu/drm/rcar-du/rcar_du_plane.c | 27 ++++++++++++++++---------
+ drivers/gpu/drm/rcar-du/rcar_du_plane.h | 4 ++++
+ drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 22 +-------------------
+ 3 files changed, 22 insertions(+), 31 deletions(-)
+
+diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.c b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
+index 61833cc1c699..4f076c364f25 100644
+--- a/drivers/gpu/drm/rcar-du/rcar_du_plane.c
++++ b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
+@@ -565,27 +565,26 @@ void __rcar_du_plane_setup(struct rcar_du_group *rgrp,
+ }
+ }
+
+-static int rcar_du_plane_atomic_check(struct drm_plane *plane,
+- struct drm_plane_state *state)
++int __rcar_du_plane_atomic_check(struct drm_plane *plane,
++ struct drm_plane_state *state,
++ const struct rcar_du_format_info **format)
+ {
+- struct rcar_du_plane_state *rstate = to_rcar_plane_state(state);
+- struct rcar_du_plane *rplane = to_rcar_plane(plane);
+- struct rcar_du_device *rcdu = rplane->group->dev;
++ struct drm_device *dev = plane->dev;
+
+ if (!state->fb || !state->crtc) {
+- rstate->format = NULL;
++ *format = NULL;
+ return 0;
+ }
+
+ if (state->src_w >> 16 != state->crtc_w ||
+ state->src_h >> 16 != state->crtc_h) {
+- dev_dbg(rcdu->dev, "%s: scaling not supported\n", __func__);
++ dev_dbg(dev->dev, "%s: scaling not supported\n", __func__);
+ return -EINVAL;
+ }
+
+- rstate->format = rcar_du_format_info(state->fb->format->format);
+- if (rstate->format == NULL) {
+- dev_dbg(rcdu->dev, "%s: unsupported format %08x\n", __func__,
++ *format = rcar_du_format_info(state->fb->format->format);
++ if (*format == NULL) {
++ dev_dbg(dev->dev, "%s: unsupported format %08x\n", __func__,
+ state->fb->format->format);
+ return -EINVAL;
+ }
+@@ -593,6 +592,14 @@ static int rcar_du_plane_atomic_check(struct drm_plane *plane,
+ return 0;
+ }
+
++static int rcar_du_plane_atomic_check(struct drm_plane *plane,
++ struct drm_plane_state *state)
++{
++ struct rcar_du_plane_state *rstate = to_rcar_plane_state(state);
++
++ return __rcar_du_plane_atomic_check(plane, state, &rstate->format);
++}
++
+ static void rcar_du_plane_atomic_update(struct drm_plane *plane,
+ struct drm_plane_state *old_state)
+ {
+diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.h b/drivers/gpu/drm/rcar-du/rcar_du_plane.h
+index f62e09f195de..890321b4665d 100644
+--- a/drivers/gpu/drm/rcar-du/rcar_du_plane.h
++++ b/drivers/gpu/drm/rcar-du/rcar_du_plane.h
+@@ -73,6 +73,10 @@ to_rcar_plane_state(struct drm_plane_state *state)
+ int rcar_du_atomic_check_planes(struct drm_device *dev,
+ struct drm_atomic_state *state);
+
++int __rcar_du_plane_atomic_check(struct drm_plane *plane,
++ struct drm_plane_state *state,
++ const struct rcar_du_format_info **format);
++
+ int rcar_du_planes_init(struct rcar_du_group *rgrp);
+
+ void __rcar_du_plane_setup(struct rcar_du_group *rgrp,
+diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
+index 2c96147bc444..dd66dcb8da23 100644
+--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
++++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
+@@ -268,28 +268,8 @@ static int rcar_du_vsp_plane_atomic_check(struct drm_plane *plane,
+ struct drm_plane_state *state)
+ {
+ struct rcar_du_vsp_plane_state *rstate = to_rcar_vsp_plane_state(state);
+- struct rcar_du_vsp_plane *rplane = to_rcar_vsp_plane(plane);
+- struct rcar_du_device *rcdu = rplane->vsp->dev;
+-
+- if (!state->fb || !state->crtc) {
+- rstate->format = NULL;
+- return 0;
+- }
+
+- if (state->src_w >> 16 != state->crtc_w ||
+- state->src_h >> 16 != state->crtc_h) {
+- dev_dbg(rcdu->dev, "%s: scaling not supported\n", __func__);
+- return -EINVAL;
+- }
+-
+- rstate->format = rcar_du_format_info(state->fb->format->format);
+- if (rstate->format == NULL) {
+- dev_dbg(rcdu->dev, "%s: unsupported format %08x\n", __func__,
+- state->fb->format->format);
+- return -EINVAL;
+- }
+-
+- return 0;
++ return __rcar_du_plane_atomic_check(plane, state, &rstate->format);
+ }
+
+ static void rcar_du_vsp_plane_atomic_update(struct drm_plane *plane,
+--
+2.19.0
+
diff --git a/patches/0448-dt-bindings-thermal-rcar-Add-device-tree-support-for.patch b/patches/0448-dt-bindings-thermal-rcar-Add-device-tree-support-for.patch
new file mode 100644
index 0000000..f05102a
--- /dev/null
+++ b/patches/0448-dt-bindings-thermal-rcar-Add-device-tree-support-for.patch
@@ -0,0 +1,40 @@
+From 8975d887aab330282d0396b02298f415f7ab73a1 Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Tue, 19 Dec 2017 13:17:28 +0000
+Subject: [PATCH 0448/1795] dt-bindings: thermal: rcar: Add device tree support
+ for r8a7743
+
+Add thermal sensor support for r8a7743 SoC. The Renesas RZ/G1M
+(r8a7743) thermal sensor module is identical to the R-Car Gen2 family.
+
+No driver change is needed due to the fallback compatible value
+"renesas,rcar-gen2-thermal".
+
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Rob Herring <robh@kernel.org>
+Reviewed-by: Simon Horman <simon.horman@netronome.com>
+Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
+(cherry picked from commit 2d14a0ee5e73d5224873777892fd86d3a283b059)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/thermal/rcar-thermal.txt | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/Documentation/devicetree/bindings/thermal/rcar-thermal.txt b/Documentation/devicetree/bindings/thermal/rcar-thermal.txt
+index a8e52c8ccfcc..349e635f2d87 100644
+--- a/Documentation/devicetree/bindings/thermal/rcar-thermal.txt
++++ b/Documentation/devicetree/bindings/thermal/rcar-thermal.txt
+@@ -6,6 +6,7 @@ Required properties:
+ "renesas,rcar-thermal" (without thermal-zone) as fallback.
+ Examples with soctypes are:
+ - "renesas,thermal-r8a73a4" (R-Mobile APE6)
++ - "renesas,thermal-r8a7743" (RZ/G1M)
+ - "renesas,thermal-r8a7779" (R-Car H1)
+ - "renesas,thermal-r8a7790" (R-Car H2)
+ - "renesas,thermal-r8a7791" (R-Car M2-W)
+--
+2.19.0
+
diff --git a/patches/0449-mmc-tmio-use-usleep_range-consistently.patch b/patches/0449-mmc-tmio-use-usleep_range-consistently.patch
new file mode 100644
index 0000000..c0ee5a1
--- /dev/null
+++ b/patches/0449-mmc-tmio-use-usleep_range-consistently.patch
@@ -0,0 +1,60 @@
+From 8ac35c08e71ead0d78a77f77c2fbe5292081cd41 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Tue, 14 Nov 2017 23:51:04 +0100
+Subject: [PATCH 0449/1795] mmc: tmio: use usleep_range consistently
+
+There are a few udelay() left which are in a range that they should be
+usleep_range() these days.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit 754febcc6b749bb05ebb06b0b9cfdda6157e8cfd)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mmc/host/tmio_mmc_core.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c
+index 62217afb51d6..36301e385006 100644
+--- a/drivers/mmc/host/tmio_mmc_core.c
++++ b/drivers/mmc/host/tmio_mmc_core.c
+@@ -806,7 +806,7 @@ static int tmio_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
+ if (ret == 0)
+ set_bit(i, host->taps);
+
+- mdelay(1);
++ usleep_range(1000, 1200);
+ }
+
+ ret = host->select_tuning(host);
+@@ -958,7 +958,7 @@ static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
+ * 100us were not enough. Is this the same 140us delay, as in
+ * tmio_mmc_set_ios()?
+ */
+- udelay(200);
++ usleep_range(200, 300);
+ }
+ /*
+ * It seems, VccQ should be switched on after Vcc, this is also what the
+@@ -966,7 +966,7 @@ static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
+ */
+ if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
+ ret = regulator_enable(mmc->supply.vqmmc);
+- udelay(200);
++ usleep_range(200, 300);
+ }
+
+ if (ret < 0)
+@@ -1059,7 +1059,7 @@ static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
+ }
+
+ /* Let things settle. delay taken from winCE driver */
+- udelay(140);
++ usleep_range(140, 200);
+ if (PTR_ERR(host->mrq) == -EINTR)
+ dev_dbg(&host->pdev->dev,
+ "%s.%d: IOS interrupted: clk %u, mode %u",
+--
+2.19.0
+
diff --git a/patches/0450-dt-bindings-mmc-renesas_sdhi-Add-r8a77995-support.patch b/patches/0450-dt-bindings-mmc-renesas_sdhi-Add-r8a77995-support.patch
new file mode 100644
index 0000000..4021d2f
--- /dev/null
+++ b/patches/0450-dt-bindings-mmc-renesas_sdhi-Add-r8a77995-support.patch
@@ -0,0 +1,34 @@
+From 982e0dcfbb153784cd0a7bdba083b0ec669b0e0d Mon Sep 17 00:00:00 2001
+From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Date: Wed, 15 Nov 2017 16:25:49 +0100
+Subject: [PATCH 0450/1795] dt-bindings: mmc: renesas_sdhi: Add r8a77995
+ support
+
+Adds bindings for the R-Car D3 SoC's SDHI IP.
+
+Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit 448f2f8775d1e8a62a14506b6da38bcedce5eb22)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/devicetree/bindings/mmc/tmio_mmc.txt | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
+index 3c6762430fd9..d8685cb83325 100644
+--- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
++++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
+@@ -26,6 +26,7 @@ Required properties:
+ "renesas,sdhi-r8a7794" - SDHI IP on R8A7794 SoC
+ "renesas,sdhi-r8a7795" - SDHI IP on R8A7795 SoC
+ "renesas,sdhi-r8a7796" - SDHI IP on R8A7796 SoC
++ "renesas,sdhi-r8a77995" - SDHI IP on R8A77995 SoC
+ "renesas,sdhi-shmobile" - a generic sh-mobile SDHI controller
+ "renesas,rcar-gen1-sdhi" - a generic R-Car Gen1 SDHI controller
+ "renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 or RZ/G1
+--
+2.19.0
+
diff --git a/patches/0451-mmc-renesas_sdhi-enable-R-Car-D3-r8a77995-support.patch b/patches/0451-mmc-renesas_sdhi-enable-R-Car-D3-r8a77995-support.patch
new file mode 100644
index 0000000..eb8169b
--- /dev/null
+++ b/patches/0451-mmc-renesas_sdhi-enable-R-Car-D3-r8a77995-support.patch
@@ -0,0 +1,34 @@
+From 08930bda94c5c672bde8a903a82bd3abfa7a16ed Mon Sep 17 00:00:00 2001
+From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Date: Wed, 29 Nov 2017 17:06:45 +0100
+Subject: [PATCH 0451/1795] mmc: renesas_sdhi: enable R-Car D3 (r8a77995)
+ support
+
+Whitelists for internal DMAC implementation.
+
+Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+(cherry picked from commit c14e60963ec1e0595250955271abfe4d5e96b3cb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mmc/host/renesas_sdhi_internal_dmac.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
+index 4c20d368f515..227d613aa250 100644
+--- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c
++++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
+@@ -255,6 +255,7 @@ static const struct soc_device_attribute gen3_soc_whitelist[] = {
+ { .soc_id = "r8a7795", .revision = "ES1.*" },
+ { .soc_id = "r8a7795", .revision = "ES2.0" },
+ { .soc_id = "r8a7796", .revision = "ES1.0" },
++ { .soc_id = "r8a77995", .revision = "ES1.0" },
+ { /* sentinel */ }
+ };
+
+--
+2.19.0
+
diff --git a/patches/0452-mmc-tmio-use-ioread-for-repeated-access-to-a-registe.patch b/patches/0452-mmc-tmio-use-ioread-for-repeated-access-to-a-registe.patch
new file mode 100644
index 0000000..4c68ebd
--- /dev/null
+++ b/patches/0452-mmc-tmio-use-ioread-for-repeated-access-to-a-registe.patch
@@ -0,0 +1,62 @@
+From f3463f9dd8b78f57519a989a954a2b8513be5875 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Mon, 18 Dec 2017 01:00:21 +0100
+Subject: [PATCH 0452/1795] mmc: tmio: use ioread* for repeated access to a
+ register
+
+Not all archs define reads* and writes*. Switch to ioread*_rep and
+friends which is defined everywhere, so we can enable COMPILE_TEST after
+that.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit 0c36fc0dfb4c0fa068d077b9e2806ef87d0221a7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mmc/host/tmio_mmc.h | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
+index 3e6ff8921440..cd3d7c8d24bf 100644
+--- a/drivers/mmc/host/tmio_mmc.h
++++ b/drivers/mmc/host/tmio_mmc.h
+@@ -246,7 +246,7 @@ static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr)
+ static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
+ u16 *buf, int count)
+ {
+- readsw(host->ctl + (addr << host->bus_shift), buf, count);
++ ioread16_rep(host->ctl + (addr << host->bus_shift), buf, count);
+ }
+
+ static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host,
+@@ -259,7 +259,7 @@ static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host,
+ static inline void sd_ctrl_read32_rep(struct tmio_mmc_host *host, int addr,
+ u32 *buf, int count)
+ {
+- readsl(host->ctl + (addr << host->bus_shift), buf, count);
++ ioread32_rep(host->ctl + (addr << host->bus_shift), buf, count);
+ }
+
+ static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr,
+@@ -276,7 +276,7 @@ static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr,
+ static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
+ u16 *buf, int count)
+ {
+- writesw(host->ctl + (addr << host->bus_shift), buf, count);
++ iowrite16_rep(host->ctl + (addr << host->bus_shift), buf, count);
+ }
+
+ static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host,
+@@ -289,7 +289,7 @@ static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host,
+ static inline void sd_ctrl_write32_rep(struct tmio_mmc_host *host, int addr,
+ const u32 *buf, int count)
+ {
+- writesl(host->ctl + (addr << host->bus_shift), buf, count);
++ iowrite32_rep(host->ctl + (addr << host->bus_shift), buf, count);
+ }
+
+ #endif
+--
+2.19.0
+
diff --git a/patches/0453-mmc-renesas_sdhi-remove-eprobe-jump-label.patch b/patches/0453-mmc-renesas_sdhi-remove-eprobe-jump-label.patch
new file mode 100644
index 0000000..bd44c29
--- /dev/null
+++ b/patches/0453-mmc-renesas_sdhi-remove-eprobe-jump-label.patch
@@ -0,0 +1,55 @@
+From 63aae89b0c34a32139dc4428fba416839196b34b Mon Sep 17 00:00:00 2001
+From: Masahiro Yamada <yamada.masahiro@socionext.com>
+Date: Sat, 25 Nov 2017 01:24:38 +0900
+Subject: [PATCH 0453/1795] mmc: renesas_sdhi: remove eprobe jump label
+
+"goto eprobe" does nothing. Return directly.
+
+Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
+Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit 4ce6281791676c134d3ae919edaf76da3cef1d76)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mmc/host/renesas_sdhi_core.c | 10 ++++------
+ 1 file changed, 4 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
+index 157e1d9e7725..2daca2b1066f 100644
+--- a/drivers/mmc/host/renesas_sdhi_core.c
++++ b/drivers/mmc/host/renesas_sdhi_core.c
+@@ -498,7 +498,7 @@ int renesas_sdhi_probe(struct platform_device *pdev,
+ if (IS_ERR(priv->clk)) {
+ ret = PTR_ERR(priv->clk);
+ dev_err(&pdev->dev, "cannot get clock: %d\n", ret);
+- goto eprobe;
++ return ret;
+ }
+
+ /*
+@@ -525,10 +525,8 @@ int renesas_sdhi_probe(struct platform_device *pdev,
+ }
+
+ host = tmio_mmc_host_alloc(pdev);
+- if (!host) {
+- ret = -ENOMEM;
+- goto eprobe;
+- }
++ if (!host)
++ return -ENOMEM;
+
+ if (of_data) {
+ mmc_data->flags |= of_data->tmio_flags;
+@@ -653,7 +651,7 @@ int renesas_sdhi_probe(struct platform_device *pdev,
+ tmio_mmc_host_remove(host);
+ efree:
+ tmio_mmc_host_free(host);
+-eprobe:
++
+ return ret;
+ }
+ EXPORT_SYMBOL_GPL(renesas_sdhi_probe);
+--
+2.19.0
+
diff --git a/patches/0454-mmc-tmio-set-tmio_mmc_host-to-driver-data.patch b/patches/0454-mmc-tmio-set-tmio_mmc_host-to-driver-data.patch
new file mode 100644
index 0000000..a91dd74
--- /dev/null
+++ b/patches/0454-mmc-tmio-set-tmio_mmc_host-to-driver-data.patch
@@ -0,0 +1,95 @@
+From ae430a31f1934f47156894891e8e05d521d03ffb Mon Sep 17 00:00:00 2001
+From: Masahiro Yamada <yamada.masahiro@socionext.com>
+Date: Sat, 25 Nov 2017 01:24:39 +0900
+Subject: [PATCH 0454/1795] mmc: tmio: set tmio_mmc_host to driver data
+
+The remove, suspend, resume hooks need to get tmio_mmc_host. It is
+tedious to call mmc_priv() to convert mmc_host to tmio_mmc_host.
+We can directly set tmio_mmc_host to driver data.
+
+Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
+Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit a3b05373e0e06dcb04adf2c50b58cd3feb5f8294)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mmc/host/renesas_sdhi_core.c | 3 +--
+ drivers/mmc/host/tmio_mmc.c | 12 ++++--------
+ drivers/mmc/host/tmio_mmc_core.c | 8 +++-----
+ 3 files changed, 8 insertions(+), 15 deletions(-)
+
+diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
+index 2daca2b1066f..15845893500b 100644
+--- a/drivers/mmc/host/renesas_sdhi_core.c
++++ b/drivers/mmc/host/renesas_sdhi_core.c
+@@ -658,8 +658,7 @@ EXPORT_SYMBOL_GPL(renesas_sdhi_probe);
+
+ int renesas_sdhi_remove(struct platform_device *pdev)
+ {
+- struct mmc_host *mmc = platform_get_drvdata(pdev);
+- struct tmio_mmc_host *host = mmc_priv(mmc);
++ struct tmio_mmc_host *host = platform_get_drvdata(pdev);
+
+ tmio_mmc_host_remove(host);
+
+diff --git a/drivers/mmc/host/tmio_mmc.c b/drivers/mmc/host/tmio_mmc.c
+index 64b7e9f18361..ccfbc154ee5b 100644
+--- a/drivers/mmc/host/tmio_mmc.c
++++ b/drivers/mmc/host/tmio_mmc.c
+@@ -128,15 +128,11 @@ static int tmio_mmc_probe(struct platform_device *pdev)
+ static int tmio_mmc_remove(struct platform_device *pdev)
+ {
+ const struct mfd_cell *cell = mfd_get_cell(pdev);
+- struct mmc_host *mmc = platform_get_drvdata(pdev);
++ struct tmio_mmc_host *host = platform_get_drvdata(pdev);
+
+- if (mmc) {
+- struct tmio_mmc_host *host = mmc_priv(mmc);
+-
+- tmio_mmc_host_remove(host);
+- if (cell->disable)
+- cell->disable(pdev);
+- }
++ tmio_mmc_host_remove(host);
++ if (cell->disable)
++ cell->disable(pdev);
+
+ return 0;
+ }
+diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c
+index 36301e385006..58947a73c65f 100644
+--- a/drivers/mmc/host/tmio_mmc_core.c
++++ b/drivers/mmc/host/tmio_mmc_core.c
+@@ -1193,7 +1193,7 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
+ return ret;
+
+ _host->pdata = pdata;
+- platform_set_drvdata(pdev, mmc);
++ platform_set_drvdata(pdev, _host);
+
+ _host->set_pwr = pdata->set_pwr;
+ _host->set_clk_div = pdata->set_clk_div;
+@@ -1351,8 +1351,7 @@ EXPORT_SYMBOL_GPL(tmio_mmc_host_remove);
+ #ifdef CONFIG_PM
+ int tmio_mmc_host_runtime_suspend(struct device *dev)
+ {
+- struct mmc_host *mmc = dev_get_drvdata(dev);
+- struct tmio_mmc_host *host = mmc_priv(mmc);
++ struct tmio_mmc_host *host = dev_get_drvdata(dev);
+
+ tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
+
+@@ -1372,8 +1371,7 @@ static bool tmio_mmc_can_retune(struct tmio_mmc_host *host)
+
+ int tmio_mmc_host_runtime_resume(struct device *dev)
+ {
+- struct mmc_host *mmc = dev_get_drvdata(dev);
+- struct tmio_mmc_host *host = mmc_priv(mmc);
++ struct tmio_mmc_host *host = dev_get_drvdata(dev);
+
+ tmio_mmc_reset(host);
+ tmio_mmc_clk_enable(host);
+--
+2.19.0
+
diff --git a/patches/0455-mmc-tmio-use-devm_ioremap_resource-instead-of-devm_i.patch b/patches/0455-mmc-tmio-use-devm_ioremap_resource-instead-of-devm_i.patch
new file mode 100644
index 0000000..c36bf23
--- /dev/null
+++ b/patches/0455-mmc-tmio-use-devm_ioremap_resource-instead-of-devm_i.patch
@@ -0,0 +1,51 @@
+From c8e129b03794916337b98962613dc6c9cfb7c784 Mon Sep 17 00:00:00 2001
+From: Masahiro Yamada <yamada.masahiro@socionext.com>
+Date: Sat, 25 Nov 2017 01:24:40 +0900
+Subject: [PATCH 0455/1795] mmc: tmio: use devm_ioremap_resource() instead of
+ devm_ioremap()
+
+The TMIO core misses to call request_mem_region().
+devm_ioremap_resource() takes care of it and makes the code cleaner.
+
+Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
+Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit 4139696b7978d57ec840b6c9293d4709a46af3bd)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mmc/host/tmio_mmc_core.c | 10 +++-------
+ 1 file changed, 3 insertions(+), 7 deletions(-)
+
+diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c
+index 58947a73c65f..f6f47e1ce6dd 100644
+--- a/drivers/mmc/host/tmio_mmc_core.c
++++ b/drivers/mmc/host/tmio_mmc_core.c
+@@ -1185,8 +1185,9 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
+ _host->write16_hook = NULL;
+
+ res_ctl = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+- if (!res_ctl)
+- return -EINVAL;
++ _host->ctl = devm_ioremap_resource(&pdev->dev, res_ctl);
++ if (IS_ERR(_host->ctl))
++ return PTR_ERR(_host->ctl);
+
+ ret = mmc_of_parse(mmc);
+ if (ret < 0)
+@@ -1202,11 +1203,6 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
+ if (ret < 0)
+ return ret;
+
+- _host->ctl = devm_ioremap(&pdev->dev,
+- res_ctl->start, resource_size(res_ctl));
+- if (!_host->ctl)
+- return -ENOMEM;
+-
+ tmio_mmc_ops.card_busy = _host->card_busy;
+ tmio_mmc_ops.start_signal_voltage_switch =
+ _host->start_signal_voltage_switch;
+--
+2.19.0
+
diff --git a/patches/0456-mmc-tmio-move-mmc_host_ops-to-struct-tmio_mmc_host-f.patch b/patches/0456-mmc-tmio-move-mmc_host_ops-to-struct-tmio_mmc_host-f.patch
new file mode 100644
index 0000000..1fa94d4
--- /dev/null
+++ b/patches/0456-mmc-tmio-move-mmc_host_ops-to-struct-tmio_mmc_host-f.patch
@@ -0,0 +1,78 @@
+From a371362459262d700c37096c53907f39f41302d3 Mon Sep 17 00:00:00 2001
+From: Masahiro Yamada <yamada.masahiro@socionext.com>
+Date: Sat, 25 Nov 2017 01:24:41 +0900
+Subject: [PATCH 0456/1795] mmc: tmio: move mmc_host_ops to struct
+ tmio_mmc_host from static data
+
+Currently, tmio_mmc_ops is static data and tmio_mmc_host_probe()
+updates some hooks in the static data. This is a problem when
+two or more instances call tmio_mmc_host_probe() and each of them
+requests to use its own card_busy/start_signal_voltage_switch.
+
+We can borrow a solution from sdhci_alloc_host(). Copy the whole
+ops structure to host->mmc_host_ops, then override the hooks in
+malloc'ed data. Constify tmio_mmc_ops since it is now a template
+ops used by default.
+
+Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
+Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit c055fc75c1757b220108489038cfe60496b13865)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mmc/host/tmio_mmc.h | 1 +
+ drivers/mmc/host/tmio_mmc_core.c | 9 +++++----
+ 2 files changed, 6 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
+index cd3d7c8d24bf..405547f88421 100644
+--- a/drivers/mmc/host/tmio_mmc.h
++++ b/drivers/mmc/host/tmio_mmc.h
+@@ -134,6 +134,7 @@ struct tmio_mmc_host {
+ struct mmc_request *mrq;
+ struct mmc_data *data;
+ struct mmc_host *mmc;
++ struct mmc_host_ops ops;
+
+ /* Callbacks for clock / power control */
+ void (*set_pwr)(struct platform_device *host, int state);
+diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c
+index f6f47e1ce6dd..5d80055b4bb3 100644
+--- a/drivers/mmc/host/tmio_mmc_core.c
++++ b/drivers/mmc/host/tmio_mmc_core.c
+@@ -1098,7 +1098,7 @@ static int tmio_multi_io_quirk(struct mmc_card *card,
+ return blk_size;
+ }
+
+-static struct mmc_host_ops tmio_mmc_ops = {
++static const struct mmc_host_ops tmio_mmc_ops = {
+ .request = tmio_mmc_request,
+ .set_ios = tmio_mmc_set_ios,
+ .get_ro = tmio_mmc_get_ro,
+@@ -1158,6 +1158,8 @@ tmio_mmc_host_alloc(struct platform_device *pdev)
+ host = mmc_priv(mmc);
+ host->mmc = mmc;
+ host->pdev = pdev;
++ host->ops = tmio_mmc_ops;
++ mmc->ops = &host->ops;
+
+ return host;
+ }
+@@ -1203,10 +1205,9 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
+ if (ret < 0)
+ return ret;
+
+- tmio_mmc_ops.card_busy = _host->card_busy;
+- tmio_mmc_ops.start_signal_voltage_switch =
++ _host->ops.card_busy = _host->card_busy;
++ _host->ops.start_signal_voltage_switch =
+ _host->start_signal_voltage_switch;
+- mmc->ops = &tmio_mmc_ops;
+
+ mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
+ mmc->caps2 |= pdata->capabilities2;
+--
+2.19.0
+
diff --git a/patches/0457-mmc-tmio-renesas_sdhi-set-mmc_host_ops-hooks-directl.patch b/patches/0457-mmc-tmio-renesas_sdhi-set-mmc_host_ops-hooks-directl.patch
new file mode 100644
index 0000000..af983e8
--- /dev/null
+++ b/patches/0457-mmc-tmio-renesas_sdhi-set-mmc_host_ops-hooks-directl.patch
@@ -0,0 +1,69 @@
+From cf5e43a6fe85dc7d230dae0f2edc5ce16ca45335 Mon Sep 17 00:00:00 2001
+From: Masahiro Yamada <yamada.masahiro@socionext.com>
+Date: Sat, 25 Nov 2017 01:24:42 +0900
+Subject: [PATCH 0457/1795] mmc: tmio, renesas_sdhi: set mmc_host_ops hooks
+ directly
+
+Drivers can set any mmc_host_ops hooks between tmio_mmc_host_alloc()
+and tmio_mmc_host_probe(). Remove duplicated hooks in tmio_mmc_host.
+
+Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
+Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit 2aaa3c5193db9cdfe62201aa4eb4e1007a43fdc8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mmc/host/renesas_sdhi_core.c | 4 ++--
+ drivers/mmc/host/tmio_mmc.h | 3 ---
+ drivers/mmc/host/tmio_mmc_core.c | 4 ----
+ 3 files changed, 2 insertions(+), 9 deletions(-)
+
+diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
+index 15845893500b..ae8099690b1a 100644
+--- a/drivers/mmc/host/renesas_sdhi_core.c
++++ b/drivers/mmc/host/renesas_sdhi_core.c
+@@ -550,8 +550,8 @@ int renesas_sdhi_probe(struct platform_device *pdev,
+ /* SDR speeds are only available on Gen2+ */
+ if (mmc_data->flags & TMIO_MMC_MIN_RCAR2) {
+ /* card_busy caused issues on r8a73a4 (pre-Gen2) CD-less SDHI */
+- host->card_busy = renesas_sdhi_card_busy;
+- host->start_signal_voltage_switch =
++ host->ops.card_busy = renesas_sdhi_card_busy;
++ host->ops.start_signal_voltage_switch =
+ renesas_sdhi_start_signal_voltage_switch;
+ }
+
+diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
+index 405547f88421..dd40b9631b3a 100644
+--- a/drivers/mmc/host/tmio_mmc.h
++++ b/drivers/mmc/host/tmio_mmc.h
+@@ -186,9 +186,6 @@ struct tmio_mmc_host {
+ void (*clk_disable)(struct tmio_mmc_host *host);
+ int (*multi_io_quirk)(struct mmc_card *card,
+ unsigned int direction, int blk_size);
+- int (*card_busy)(struct mmc_host *mmc);
+- int (*start_signal_voltage_switch)(struct mmc_host *mmc,
+- struct mmc_ios *ios);
+ int (*write16_hook)(struct tmio_mmc_host *host, int addr);
+ void (*hw_reset)(struct tmio_mmc_host *host);
+ void (*prepare_tuning)(struct tmio_mmc_host *host, unsigned long tap);
+diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c
+index 5d80055b4bb3..8101ca2ca5a9 100644
+--- a/drivers/mmc/host/tmio_mmc_core.c
++++ b/drivers/mmc/host/tmio_mmc_core.c
+@@ -1205,10 +1205,6 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
+ if (ret < 0)
+ return ret;
+
+- _host->ops.card_busy = _host->card_busy;
+- _host->ops.start_signal_voltage_switch =
+- _host->start_signal_voltage_switch;
+-
+ mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
+ mmc->caps2 |= pdata->capabilities2;
+ mmc->max_segs = pdata->max_segs ? : 32;
+--
+2.19.0
+
diff --git a/patches/0458-mmc-tmio-move-mmc_gpio_request_cd-before-mmc_add_hos.patch b/patches/0458-mmc-tmio-move-mmc_gpio_request_cd-before-mmc_add_hos.patch
new file mode 100644
index 0000000..fcfce2a
--- /dev/null
+++ b/patches/0458-mmc-tmio-move-mmc_gpio_request_cd-before-mmc_add_hos.patch
@@ -0,0 +1,55 @@
+From 7973e911d4d74aada0a908f39f0d88631baf592d Mon Sep 17 00:00:00 2001
+From: Masahiro Yamada <yamada.masahiro@socionext.com>
+Date: Sat, 25 Nov 2017 01:24:43 +0900
+Subject: [PATCH 0458/1795] mmc: tmio: move mmc_gpio_request_cd() before
+ mmc_add_host()
+
+Drivers do not need to call mmc_gpiod_request_cd_irq() explicitly
+because mmc_start_host() calls it. To make it work, cd_gpio must
+be set before mmc_add_host().
+
+Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
+Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit cd82cd213bfa532ca368e4333ba6a0f14185ef9c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mmc/host/tmio_mmc_core.c | 14 ++++++--------
+ 1 file changed, 6 insertions(+), 8 deletions(-)
+
+diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c
+index 8101ca2ca5a9..61eac261d3de 100644
+--- a/drivers/mmc/host/tmio_mmc_core.c
++++ b/drivers/mmc/host/tmio_mmc_core.c
+@@ -1205,6 +1205,12 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
+ if (ret < 0)
+ return ret;
+
++ if (pdata->flags & TMIO_MMC_USE_GPIO_CD) {
++ ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio, 0);
++ if (ret)
++ return ret;
++ }
++
+ mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
+ mmc->caps2 |= pdata->capabilities2;
+ mmc->max_segs = pdata->max_segs ? : 32;
+@@ -1300,14 +1306,6 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
+
+ dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
+
+- if (pdata->flags & TMIO_MMC_USE_GPIO_CD) {
+- ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio, 0);
+- if (ret)
+- goto remove_host;
+-
+- mmc_gpiod_request_cd_irq(mmc);
+- }
+-
+ return 0;
+
+ remove_host:
+--
+2.19.0
+
diff --git a/patches/0459-mmc-renesas_sdhi-remove-always-false-condition.patch b/patches/0459-mmc-renesas_sdhi-remove-always-false-condition.patch
new file mode 100644
index 0000000..c04e5ca
--- /dev/null
+++ b/patches/0459-mmc-renesas_sdhi-remove-always-false-condition.patch
@@ -0,0 +1,39 @@
+From dcec28bb471dc3e99bae538472f439623d070607 Mon Sep 17 00:00:00 2001
+From: Masahiro Yamada <yamada.masahiro@socionext.com>
+Date: Sat, 25 Nov 2017 01:24:46 +0900
+Subject: [PATCH 0459/1795] mmc: renesas_sdhi: remove always false condition
+
+renesas_sdhi_probe() always sets host->dma as follows:
+
+ host->dma = dma_priv;
+
+!host->dma is always false.
+
+Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
+Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit 2487e7efc9e13bd11fdc86f1ac12a5a45c4af778)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mmc/host/renesas_sdhi_sys_dmac.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/mmc/host/renesas_sdhi_sys_dmac.c b/drivers/mmc/host/renesas_sdhi_sys_dmac.c
+index 9ab10436e4b8..e210644f1116 100644
+--- a/drivers/mmc/host/renesas_sdhi_sys_dmac.c
++++ b/drivers/mmc/host/renesas_sdhi_sys_dmac.c
+@@ -360,8 +360,8 @@ static void renesas_sdhi_sys_dmac_request_dma(struct tmio_mmc_host *host,
+ struct tmio_mmc_data *pdata)
+ {
+ /* We can only either use DMA for both Tx and Rx or not use it at all */
+- if (!host->dma || (!host->pdev->dev.of_node &&
+- (!pdata->chan_priv_tx || !pdata->chan_priv_rx)))
++ if (!host->pdev->dev.of_node &&
++ (!pdata->chan_priv_tx || !pdata->chan_priv_rx))
+ return;
+
+ if (!host->chan_tx && !host->chan_rx) {
+--
+2.19.0
+
diff --git a/patches/0460-mmc-tmio-renesas_sdhi-move-struct-tmio_mmc_dma-to-re.patch b/patches/0460-mmc-tmio-renesas_sdhi-move-struct-tmio_mmc_dma-to-re.patch
new file mode 100644
index 0000000..30890cc
--- /dev/null
+++ b/patches/0460-mmc-tmio-renesas_sdhi-move-struct-tmio_mmc_dma-to-re.patch
@@ -0,0 +1,207 @@
+From 5863d8232a4cdaa798360e011da0fa2b8a9c21da Mon Sep 17 00:00:00 2001
+From: Masahiro Yamada <yamada.masahiro@socionext.com>
+Date: Sat, 25 Nov 2017 01:24:47 +0900
+Subject: [PATCH 0460/1795] mmc: tmio, renesas_sdhi: move struct tmio_mmc_dma
+ to renesas_sdhi.h
+
+struct tmio_mmc_dma looks like TMIO core data, but in fact, Renesas
+private data. Move it to renesas_sdhi.h (probably, it is better to
+rename it to renesas_sdhi_dma, or squash it into struct renesas_sdhi).
+
+I also moved struct renesas_sdhi and host_to_priv() to that header
+because they are necessary to convert the tmio_mmc_host pointer into
+the renesas_sdhi pointer.
+
+Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
+Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit 058db2868cd88b5474f26974253407fcbe932c22)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mmc/host/renesas_sdhi.h | 19 +++++++++++++++++++
+ drivers/mmc/host/renesas_sdhi_core.c | 14 --------------
+ drivers/mmc/host/renesas_sdhi_internal_dmac.c | 6 ++++--
+ drivers/mmc/host/renesas_sdhi_sys_dmac.c | 16 ++++++++++------
+ drivers/mmc/host/tmio_mmc.h | 7 -------
+ 5 files changed, 33 insertions(+), 29 deletions(-)
+
+diff --git a/drivers/mmc/host/renesas_sdhi.h b/drivers/mmc/host/renesas_sdhi.h
+index b9dfea5d8193..9a507b3a9838 100644
+--- a/drivers/mmc/host/renesas_sdhi.h
++++ b/drivers/mmc/host/renesas_sdhi.h
+@@ -35,6 +35,25 @@ struct renesas_sdhi_of_data {
+ unsigned short max_segs;
+ };
+
++struct tmio_mmc_dma {
++ enum dma_slave_buswidth dma_buswidth;
++ bool (*filter)(struct dma_chan *chan, void *arg);
++ void (*enable)(struct tmio_mmc_host *host, bool enable);
++};
++
++struct renesas_sdhi {
++ struct clk *clk;
++ struct clk *clk_cd;
++ struct tmio_mmc_data mmc_data;
++ struct tmio_mmc_dma dma_priv;
++ struct pinctrl *pinctrl;
++ struct pinctrl_state *pins_default, *pins_uhs;
++ void __iomem *scc_ctl;
++};
++
++#define host_to_priv(host) \
++ container_of((host)->pdata, struct renesas_sdhi, mmc_data)
++
+ int renesas_sdhi_probe(struct platform_device *pdev,
+ const struct tmio_mmc_dma_ops *dma_ops);
+ int renesas_sdhi_remove(struct platform_device *pdev);
+diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
+index ae8099690b1a..0eb62353630f 100644
+--- a/drivers/mmc/host/renesas_sdhi_core.c
++++ b/drivers/mmc/host/renesas_sdhi_core.c
+@@ -47,19 +47,6 @@
+ #define SDHI_VER_GEN3_SD 0xcc10
+ #define SDHI_VER_GEN3_SDMMC 0xcd10
+
+-#define host_to_priv(host) \
+- container_of((host)->pdata, struct renesas_sdhi, mmc_data)
+-
+-struct renesas_sdhi {
+- struct clk *clk;
+- struct clk *clk_cd;
+- struct tmio_mmc_data mmc_data;
+- struct tmio_mmc_dma dma_priv;
+- struct pinctrl *pinctrl;
+- struct pinctrl_state *pins_default, *pins_uhs;
+- void __iomem *scc_ctl;
+-};
+-
+ static void renesas_sdhi_sdbuf_width(struct tmio_mmc_host *host, int width)
+ {
+ u32 val;
+@@ -540,7 +527,6 @@ int renesas_sdhi_probe(struct platform_device *pdev,
+ host->bus_shift = of_data->bus_shift;
+ }
+
+- host->dma = dma_priv;
+ host->write16_hook = renesas_sdhi_write16_hook;
+ host->clk_enable = renesas_sdhi_clk_enable;
+ host->clk_update = renesas_sdhi_clk_update;
+diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
+index 227d613aa250..0afc07ea609b 100644
+--- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c
++++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
+@@ -103,6 +103,8 @@ renesas_sdhi_internal_dmac_dm_write(struct tmio_mmc_host *host,
+ static void
+ renesas_sdhi_internal_dmac_enable_dma(struct tmio_mmc_host *host, bool enable)
+ {
++ struct renesas_sdhi *priv = host_to_priv(host);
++
+ if (!host->chan_tx || !host->chan_rx)
+ return;
+
+@@ -110,8 +112,8 @@ renesas_sdhi_internal_dmac_enable_dma(struct tmio_mmc_host *host, bool enable)
+ renesas_sdhi_internal_dmac_dm_write(host, DM_CM_INFO1,
+ INFO1_CLEAR);
+
+- if (host->dma->enable)
+- host->dma->enable(host, enable);
++ if (priv->dma_priv.enable)
++ priv->dma_priv.enable(host, enable);
+ }
+
+ static void
+diff --git a/drivers/mmc/host/renesas_sdhi_sys_dmac.c b/drivers/mmc/host/renesas_sdhi_sys_dmac.c
+index e210644f1116..aeb3838c05e3 100644
+--- a/drivers/mmc/host/renesas_sdhi_sys_dmac.c
++++ b/drivers/mmc/host/renesas_sdhi_sys_dmac.c
+@@ -117,11 +117,13 @@ MODULE_DEVICE_TABLE(of, renesas_sdhi_sys_dmac_of_match);
+ static void renesas_sdhi_sys_dmac_enable_dma(struct tmio_mmc_host *host,
+ bool enable)
+ {
++ struct renesas_sdhi *priv = host_to_priv(host);
++
+ if (!host->chan_tx || !host->chan_rx)
+ return;
+
+- if (host->dma->enable)
+- host->dma->enable(host, enable);
++ if (priv->dma_priv.enable)
++ priv->dma_priv.enable(host, enable);
+ }
+
+ static void renesas_sdhi_sys_dmac_abort_dma(struct tmio_mmc_host *host)
+@@ -359,6 +361,8 @@ static void renesas_sdhi_sys_dmac_issue_tasklet_fn(unsigned long priv)
+ static void renesas_sdhi_sys_dmac_request_dma(struct tmio_mmc_host *host,
+ struct tmio_mmc_data *pdata)
+ {
++ struct renesas_sdhi *priv = host_to_priv(host);
++
+ /* We can only either use DMA for both Tx and Rx or not use it at all */
+ if (!host->pdev->dev.of_node &&
+ (!pdata->chan_priv_tx || !pdata->chan_priv_rx))
+@@ -378,7 +382,7 @@ static void renesas_sdhi_sys_dmac_request_dma(struct tmio_mmc_host *host,
+ dma_cap_set(DMA_SLAVE, mask);
+
+ host->chan_tx = dma_request_slave_channel_compat(mask,
+- host->dma->filter, pdata->chan_priv_tx,
++ priv->dma_priv.filter, pdata->chan_priv_tx,
+ &host->pdev->dev, "tx");
+ dev_dbg(&host->pdev->dev, "%s: TX: got channel %p\n", __func__,
+ host->chan_tx);
+@@ -389,7 +393,7 @@ static void renesas_sdhi_sys_dmac_request_dma(struct tmio_mmc_host *host,
+ cfg.direction = DMA_MEM_TO_DEV;
+ cfg.dst_addr = res->start +
+ (CTL_SD_DATA_PORT << host->bus_shift);
+- cfg.dst_addr_width = host->dma->dma_buswidth;
++ cfg.dst_addr_width = priv->dma_priv.dma_buswidth;
+ if (!cfg.dst_addr_width)
+ cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
+ cfg.src_addr = 0;
+@@ -398,7 +402,7 @@ static void renesas_sdhi_sys_dmac_request_dma(struct tmio_mmc_host *host,
+ goto ecfgtx;
+
+ host->chan_rx = dma_request_slave_channel_compat(mask,
+- host->dma->filter, pdata->chan_priv_rx,
++ priv->dma_priv.filter, pdata->chan_priv_rx,
+ &host->pdev->dev, "rx");
+ dev_dbg(&host->pdev->dev, "%s: RX: got channel %p\n", __func__,
+ host->chan_rx);
+@@ -408,7 +412,7 @@ static void renesas_sdhi_sys_dmac_request_dma(struct tmio_mmc_host *host,
+
+ cfg.direction = DMA_DEV_TO_MEM;
+ cfg.src_addr = cfg.dst_addr + host->pdata->dma_rx_offset;
+- cfg.src_addr_width = host->dma->dma_buswidth;
++ cfg.src_addr_width = priv->dma_priv.dma_buswidth;
+ if (!cfg.src_addr_width)
+ cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
+ cfg.dst_addr = 0;
+diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
+index dd40b9631b3a..ed375a9056de 100644
+--- a/drivers/mmc/host/tmio_mmc.h
++++ b/drivers/mmc/host/tmio_mmc.h
+@@ -112,12 +112,6 @@
+ struct tmio_mmc_data;
+ struct tmio_mmc_host;
+
+-struct tmio_mmc_dma {
+- enum dma_slave_buswidth dma_buswidth;
+- bool (*filter)(struct dma_chan *chan, void *arg);
+- void (*enable)(struct tmio_mmc_host *host, bool enable);
+-};
+-
+ struct tmio_mmc_dma_ops {
+ void (*start)(struct tmio_mmc_host *host, struct mmc_data *data);
+ void (*enable)(struct tmio_mmc_host *host, bool enable);
+@@ -149,7 +143,6 @@ struct tmio_mmc_host {
+
+ struct platform_device *pdev;
+ struct tmio_mmc_data *pdata;
+- struct tmio_mmc_dma *dma;
+
+ /* DMA support */
+ bool force_pio;
+--
+2.19.0
+
diff --git a/patches/0461-mmc-tmio-renesas_sdhi-move-Renesas-specific-DMA-data.patch b/patches/0461-mmc-tmio-renesas_sdhi-move-Renesas-specific-DMA-data.patch
new file mode 100644
index 0000000..3c403f2
--- /dev/null
+++ b/patches/0461-mmc-tmio-renesas_sdhi-move-Renesas-specific-DMA-data.patch
@@ -0,0 +1,153 @@
+From ece6be389148e8619253c09edb78f0a99078cb49 Mon Sep 17 00:00:00 2001
+From: Masahiro Yamada <yamada.masahiro@socionext.com>
+Date: Sat, 25 Nov 2017 01:24:48 +0900
+Subject: [PATCH 0461/1795] mmc: tmio, renesas_sdhi: move Renesas-specific DMA
+ data to renesas_sdhi.h
+
+struct tmio_mmc_host has "dma_dataend" and "dma_complete", but in fact,
+they are Renesas private data. Move them to renesas_sdhi.h
+
+Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
+Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit 90d9510645765401c56d75f6003d6cb6c1f7ca2a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mmc/host/renesas_sdhi.h | 2 ++
+ drivers/mmc/host/renesas_sdhi_internal_dmac.c | 8 ++++++--
+ drivers/mmc/host/renesas_sdhi_sys_dmac.c | 15 ++++++++++-----
+ drivers/mmc/host/tmio_mmc.h | 2 --
+ 4 files changed, 18 insertions(+), 9 deletions(-)
+
+diff --git a/drivers/mmc/host/renesas_sdhi.h b/drivers/mmc/host/renesas_sdhi.h
+index 9a507b3a9838..3250dbed402f 100644
+--- a/drivers/mmc/host/renesas_sdhi.h
++++ b/drivers/mmc/host/renesas_sdhi.h
+@@ -39,6 +39,8 @@ struct tmio_mmc_dma {
+ enum dma_slave_buswidth dma_buswidth;
+ bool (*filter)(struct dma_chan *chan, void *arg);
+ void (*enable)(struct tmio_mmc_host *host, bool enable);
++ struct completion dma_dataend;
++ struct tasklet_struct dma_complete;
+ };
+
+ struct renesas_sdhi {
+diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
+index 0afc07ea609b..d679f1a28f29 100644
+--- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c
++++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
+@@ -132,7 +132,9 @@ renesas_sdhi_internal_dmac_abort_dma(struct tmio_mmc_host *host) {
+
+ static void
+ renesas_sdhi_internal_dmac_dataend_dma(struct tmio_mmc_host *host) {
+- tasklet_schedule(&host->dma_complete);
++ struct renesas_sdhi *priv = host_to_priv(host);
++
++ tasklet_schedule(&priv->dma_priv.dma_complete);
+ }
+
+ static void
+@@ -222,10 +224,12 @@ static void
+ renesas_sdhi_internal_dmac_request_dma(struct tmio_mmc_host *host,
+ struct tmio_mmc_data *pdata)
+ {
++ struct renesas_sdhi *priv = host_to_priv(host);
++
+ /* Each value is set to non-zero to assume "enabling" each DMA */
+ host->chan_rx = host->chan_tx = (void *)0xdeadbeaf;
+
+- tasklet_init(&host->dma_complete,
++ tasklet_init(&priv->dma_priv.dma_complete,
+ renesas_sdhi_internal_dmac_complete_tasklet_fn,
+ (unsigned long)host);
+ tasklet_init(&host->dma_issue,
+diff --git a/drivers/mmc/host/renesas_sdhi_sys_dmac.c b/drivers/mmc/host/renesas_sdhi_sys_dmac.c
+index aeb3838c05e3..c8a74b2dee00 100644
+--- a/drivers/mmc/host/renesas_sdhi_sys_dmac.c
++++ b/drivers/mmc/host/renesas_sdhi_sys_dmac.c
+@@ -140,12 +140,15 @@ static void renesas_sdhi_sys_dmac_abort_dma(struct tmio_mmc_host *host)
+
+ static void renesas_sdhi_sys_dmac_dataend_dma(struct tmio_mmc_host *host)
+ {
+- complete(&host->dma_dataend);
++ struct renesas_sdhi *priv = host_to_priv(host);
++
++ complete(&priv->dma_priv.dma_dataend);
+ }
+
+ static void renesas_sdhi_sys_dmac_dma_callback(void *arg)
+ {
+ struct tmio_mmc_host *host = arg;
++ struct renesas_sdhi *priv = host_to_priv(host);
+
+ spin_lock_irq(&host->lock);
+
+@@ -163,7 +166,7 @@ static void renesas_sdhi_sys_dmac_dma_callback(void *arg)
+
+ spin_unlock_irq(&host->lock);
+
+- wait_for_completion(&host->dma_dataend);
++ wait_for_completion(&priv->dma_priv.dma_dataend);
+
+ spin_lock_irq(&host->lock);
+ tmio_mmc_do_data_irq(host);
+@@ -173,6 +176,7 @@ static void renesas_sdhi_sys_dmac_dma_callback(void *arg)
+
+ static void renesas_sdhi_sys_dmac_start_dma_rx(struct tmio_mmc_host *host)
+ {
++ struct renesas_sdhi *priv = host_to_priv(host);
+ struct scatterlist *sg = host->sg_ptr, *sg_tmp;
+ struct dma_async_tx_descriptor *desc = NULL;
+ struct dma_chan *chan = host->chan_rx;
+@@ -216,7 +220,7 @@ static void renesas_sdhi_sys_dmac_start_dma_rx(struct tmio_mmc_host *host)
+ DMA_CTRL_ACK);
+
+ if (desc) {
+- reinit_completion(&host->dma_dataend);
++ reinit_completion(&priv->dma_priv.dma_dataend);
+ desc->callback = renesas_sdhi_sys_dmac_dma_callback;
+ desc->callback_param = host;
+
+@@ -247,6 +251,7 @@ static void renesas_sdhi_sys_dmac_start_dma_rx(struct tmio_mmc_host *host)
+
+ static void renesas_sdhi_sys_dmac_start_dma_tx(struct tmio_mmc_host *host)
+ {
++ struct renesas_sdhi *priv = host_to_priv(host);
+ struct scatterlist *sg = host->sg_ptr, *sg_tmp;
+ struct dma_async_tx_descriptor *desc = NULL;
+ struct dma_chan *chan = host->chan_tx;
+@@ -295,7 +300,7 @@ static void renesas_sdhi_sys_dmac_start_dma_tx(struct tmio_mmc_host *host)
+ DMA_CTRL_ACK);
+
+ if (desc) {
+- reinit_completion(&host->dma_dataend);
++ reinit_completion(&priv->dma_priv.dma_dataend);
+ desc->callback = renesas_sdhi_sys_dmac_dma_callback;
+ desc->callback_param = host;
+
+@@ -424,7 +429,7 @@ static void renesas_sdhi_sys_dmac_request_dma(struct tmio_mmc_host *host,
+ if (!host->bounce_buf)
+ goto ebouncebuf;
+
+- init_completion(&host->dma_dataend);
++ init_completion(&priv->dma_priv.dma_dataend);
+ tasklet_init(&host->dma_issue,
+ renesas_sdhi_sys_dmac_issue_tasklet_fn,
+ (unsigned long)host);
+diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
+index ed375a9056de..5972438105a3 100644
+--- a/drivers/mmc/host/tmio_mmc.h
++++ b/drivers/mmc/host/tmio_mmc.h
+@@ -148,8 +148,6 @@ struct tmio_mmc_host {
+ bool force_pio;
+ struct dma_chan *chan_rx;
+ struct dma_chan *chan_tx;
+- struct completion dma_dataend;
+- struct tasklet_struct dma_complete;
+ struct tasklet_struct dma_issue;
+ struct scatterlist bounce_sg;
+ u8 *bounce_buf;
+--
+2.19.0
+
diff --git a/patches/0462-mmc-tmio-renesas_sdhi-move-ssc_tappos-to-renesas_sdh.patch b/patches/0462-mmc-tmio-renesas_sdhi-move-ssc_tappos-to-renesas_sdh.patch
new file mode 100644
index 0000000..3f36c76
--- /dev/null
+++ b/patches/0462-mmc-tmio-renesas_sdhi-move-ssc_tappos-to-renesas_sdh.patch
@@ -0,0 +1,70 @@
+From ad5d7c74ff1601023b5dc2ea1cc9c8294faa8189 Mon Sep 17 00:00:00 2001
+From: Masahiro Yamada <yamada.masahiro@socionext.com>
+Date: Sat, 25 Nov 2017 01:24:49 +0900
+Subject: [PATCH 0462/1795] mmc: tmio,renesas_sdhi: move ssc_tappos to
+ renesas_sdhi.h
+
+struct tmio_mmc_host has "scc_tappos", but in fact, it is Renesas
+private data. Move it to renesas_sdhi.h
+
+Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
+Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit 852d258f8465aa65adcce99f28552dd9b66a14a7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mmc/host/renesas_sdhi.h | 1 +
+ drivers/mmc/host/renesas_sdhi_core.c | 4 ++--
+ drivers/mmc/host/tmio_mmc.h | 1 -
+ 3 files changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/mmc/host/renesas_sdhi.h b/drivers/mmc/host/renesas_sdhi.h
+index 3250dbed402f..f13f798d8506 100644
+--- a/drivers/mmc/host/renesas_sdhi.h
++++ b/drivers/mmc/host/renesas_sdhi.h
+@@ -51,6 +51,7 @@ struct renesas_sdhi {
+ struct pinctrl *pinctrl;
+ struct pinctrl_state *pins_default, *pins_uhs;
+ void __iomem *scc_ctl;
++ u32 scc_tappos;
+ };
+
+ #define host_to_priv(host) \
+diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
+index 0eb62353630f..6a2988bd51a2 100644
+--- a/drivers/mmc/host/renesas_sdhi_core.c
++++ b/drivers/mmc/host/renesas_sdhi_core.c
+@@ -268,7 +268,7 @@ static unsigned int renesas_sdhi_init_tuning(struct tmio_mmc_host *host)
+ ~SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN &
+ sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL));
+
+- sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DT2FF, host->scc_tappos);
++ sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DT2FF, priv->scc_tappos);
+
+ /* Read TAPNUM */
+ return (sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_DTCNTL) >>
+@@ -591,7 +591,7 @@ int renesas_sdhi_probe(struct platform_device *pdev,
+ for (i = 0; i < of_data->taps_num; i++) {
+ if (taps[i].clk_rate == 0 ||
+ taps[i].clk_rate == host->mmc->f_max) {
+- host->scc_tappos = taps->tap;
++ priv->scc_tappos = taps->tap;
+ hit = true;
+ break;
+ }
+diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
+index 5972438105a3..a099fde27026 100644
+--- a/drivers/mmc/host/tmio_mmc.h
++++ b/drivers/mmc/host/tmio_mmc.h
+@@ -166,7 +166,6 @@ struct tmio_mmc_host {
+ struct mutex ios_lock; /* protect set_ios() context */
+ bool native_hotplug;
+ bool sdio_irq_enabled;
+- u32 scc_tappos;
+
+ /* Mandatory callback */
+ int (*clk_enable)(struct tmio_mmc_host *host);
+--
+2.19.0
+
diff --git a/patches/0463-mmc-tmio-change-bus_shift-to-unsigned-int.patch b/patches/0463-mmc-tmio-change-bus_shift-to-unsigned-int.patch
new file mode 100644
index 0000000..155f46f
--- /dev/null
+++ b/patches/0463-mmc-tmio-change-bus_shift-to-unsigned-int.patch
@@ -0,0 +1,38 @@
+From b47fbdaf55d53cd75c10cb7588e0dc4d16dc2b7b Mon Sep 17 00:00:00 2001
+From: Masahiro Yamada <yamada.masahiro@socionext.com>
+Date: Sat, 25 Nov 2017 01:24:50 +0900
+Subject: [PATCH 0463/1795] mmc: tmio: change bus_shift to unsigned int
+
+Sane values for bus_shift are:
+ 0 - for 16 bit bus
+ 1 - for 32 bit bus
+ 2 - for 64 bit bus
+
+"unsigned long" is too much.
+
+Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
+Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit c4ba0e4abda39fb1ca81683be068b4556b2680d4)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mmc/host/tmio_mmc.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
+index a099fde27026..15537c85c51a 100644
+--- a/drivers/mmc/host/tmio_mmc.h
++++ b/drivers/mmc/host/tmio_mmc.h
+@@ -139,7 +139,7 @@ struct tmio_mmc_host {
+ struct scatterlist *sg_orig;
+ unsigned int sg_len;
+ unsigned int sg_off;
+- unsigned long bus_shift;
++ unsigned int bus_shift;
+
+ struct platform_device *pdev;
+ struct tmio_mmc_data *pdata;
+--
+2.19.0
+
diff --git a/patches/0464-mmc-tmio-use-io-accessors-consistently.patch b/patches/0464-mmc-tmio-use-io-accessors-consistently.patch
new file mode 100644
index 0000000..b40f290
--- /dev/null
+++ b/patches/0464-mmc-tmio-use-io-accessors-consistently.patch
@@ -0,0 +1,65 @@
+From d41919cd34219e9c7cb1fe82b9167f032cab8423 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Tue, 19 Dec 2017 14:34:03 +0100
+Subject: [PATCH 0464/1795] mmc: tmio: use io* accessors consistently
+
+Because we started using io*_rep accessors previously because they are
+more widely defined across architectures, let's be consistent and use
+this family for all accessor wrappers.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit d63da8c64bbf800a12fe0a4a2804e5953b8cf35e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mmc/host/tmio_mmc.h | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
+index 15537c85c51a..52198f2929a5 100644
+--- a/drivers/mmc/host/tmio_mmc.h
++++ b/drivers/mmc/host/tmio_mmc.h
+@@ -228,7 +228,7 @@ int tmio_mmc_host_runtime_resume(struct device *dev);
+
+ static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr)
+ {
+- return readw(host->ctl + (addr << host->bus_shift));
++ return ioread16(host->ctl + (addr << host->bus_shift));
+ }
+
+ static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
+@@ -240,8 +240,8 @@ static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
+ static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host,
+ int addr)
+ {
+- return readw(host->ctl + (addr << host->bus_shift)) |
+- readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
++ return ioread16(host->ctl + (addr << host->bus_shift)) |
++ ioread16(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
+ }
+
+ static inline void sd_ctrl_read32_rep(struct tmio_mmc_host *host, int addr,
+@@ -258,7 +258,7 @@ static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr,
+ */
+ if (host->write16_hook && host->write16_hook(host, addr))
+ return;
+- writew(val, host->ctl + (addr << host->bus_shift));
++ iowrite16(val, host->ctl + (addr << host->bus_shift));
+ }
+
+ static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
+@@ -270,8 +270,8 @@ static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
+ static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host,
+ int addr, u32 val)
+ {
+- writew(val & 0xffff, host->ctl + (addr << host->bus_shift));
+- writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
++ iowrite16(val & 0xffff, host->ctl + (addr << host->bus_shift));
++ iowrite16(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
+ }
+
+ static inline void sd_ctrl_write32_rep(struct tmio_mmc_host *host, int addr,
+--
+2.19.0
+
diff --git a/patches/0465-mfd-tmio-Move-register-macros-to-tmio_core.c.patch b/patches/0465-mfd-tmio-Move-register-macros-to-tmio_core.c.patch
new file mode 100644
index 0000000..196bfdf
--- /dev/null
+++ b/patches/0465-mfd-tmio-Move-register-macros-to-tmio_core.c.patch
@@ -0,0 +1,83 @@
+From aeb9d3e5e8c2a20bd5f8618a61620d9640579406 Mon Sep 17 00:00:00 2001
+From: Masahiro Yamada <yamada.masahiro@socionext.com>
+Date: Tue, 7 Nov 2017 17:14:12 +0900
+Subject: [PATCH 0465/1795] mfd: tmio: Move register macros to tmio_core.c
+
+These registers are only used in drivers/mfd/tmio_core.c
+
+Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
+Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Lee Jones <lee.jones@linaro.org>
+(cherry picked from commit 299fad6b9b6e4b50929861c701af64a36cde0f31)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mfd/tmio_core.c | 20 ++++++++++++++++++++
+ include/linux/mfd/tmio.h | 20 --------------------
+ 2 files changed, 20 insertions(+), 20 deletions(-)
+
+diff --git a/drivers/mfd/tmio_core.c b/drivers/mfd/tmio_core.c
+index 83af78c1b0eb..ebf54cc28f7a 100644
+--- a/drivers/mfd/tmio_core.c
++++ b/drivers/mfd/tmio_core.c
+@@ -9,6 +9,26 @@
+ #include <linux/export.h>
+ #include <linux/mfd/tmio.h>
+
++#define CNF_CMD 0x04
++#define CNF_CTL_BASE 0x10
++#define CNF_INT_PIN 0x3d
++#define CNF_STOP_CLK_CTL 0x40
++#define CNF_GCLK_CTL 0x41
++#define CNF_SD_CLK_MODE 0x42
++#define CNF_PIN_STATUS 0x44
++#define CNF_PWR_CTL_1 0x48
++#define CNF_PWR_CTL_2 0x49
++#define CNF_PWR_CTL_3 0x4a
++#define CNF_CARD_DETECT_MODE 0x4c
++#define CNF_SD_SLOT 0x50
++#define CNF_EXT_GCLK_CTL_1 0xf0
++#define CNF_EXT_GCLK_CTL_2 0xf1
++#define CNF_EXT_GCLK_CTL_3 0xf9
++#define CNF_SD_LED_EN_1 0xfa
++#define CNF_SD_LED_EN_2 0xfe
++
++#define SDCREN 0x2 /* Enable access to MMC CTL regs. (flag in COMMAND_REG)*/
++
+ int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base)
+ {
+ /* Enable the MMC/SD Control registers */
+diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h
+index e1cfe9194129..396a103c8bc6 100644
+--- a/include/linux/mfd/tmio.h
++++ b/include/linux/mfd/tmio.h
+@@ -25,26 +25,6 @@
+ writew((val) >> 16, (addr) + 2); \
+ } while (0)
+
+-#define CNF_CMD 0x04
+-#define CNF_CTL_BASE 0x10
+-#define CNF_INT_PIN 0x3d
+-#define CNF_STOP_CLK_CTL 0x40
+-#define CNF_GCLK_CTL 0x41
+-#define CNF_SD_CLK_MODE 0x42
+-#define CNF_PIN_STATUS 0x44
+-#define CNF_PWR_CTL_1 0x48
+-#define CNF_PWR_CTL_2 0x49
+-#define CNF_PWR_CTL_3 0x4a
+-#define CNF_CARD_DETECT_MODE 0x4c
+-#define CNF_SD_SLOT 0x50
+-#define CNF_EXT_GCLK_CTL_1 0xf0
+-#define CNF_EXT_GCLK_CTL_2 0xf1
+-#define CNF_EXT_GCLK_CTL_3 0xf9
+-#define CNF_SD_LED_EN_1 0xfa
+-#define CNF_SD_LED_EN_2 0xfe
+-
+-#define SDCREN 0x2 /* Enable access to MMC CTL regs. (flag in COMMAND_REG)*/
+-
+ #define sd_config_write8(base, shift, reg, val) \
+ tmio_iowrite8((val), (base) + ((reg) << (shift)))
+ #define sd_config_write16(base, shift, reg, val) \
+--
+2.19.0
+
diff --git a/patches/0466-mmc-tmio-renesas_sdhi-Remove-unneeded-NULL-check.patch b/patches/0466-mmc-tmio-renesas_sdhi-Remove-unneeded-NULL-check.patch
new file mode 100644
index 0000000..a58c3af
--- /dev/null
+++ b/patches/0466-mmc-tmio-renesas_sdhi-Remove-unneeded-NULL-check.patch
@@ -0,0 +1,39 @@
+From c5d2b7e202ffd497dbc27e250cd7b109ea049a26 Mon Sep 17 00:00:00 2001
+From: Dan Carpenter <dan.carpenter@oracle.com>
+Date: Tue, 9 Jan 2018 12:39:10 +0300
+Subject: [PATCH 0466/1795] mmc: tmio, renesas_sdhi: Remove unneeded NULL check
+
+The inconsistent NULL checking in this function causes static checker
+warnings.
+
+ drivers/mmc/host/renesas_sdhi_sys_dmac.c:360 renesas_sdhi_sys_dmac_issue_tasklet_fn()
+ error: we previously assumed 'host' could be null (see line 351)
+
+On reviewing this code, "host" can't ever be NULL so we can just remove
+the check.
+
+Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit b8155d3ff3ebbdfa10c6ec6c5f04b263670727e6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mmc/host/renesas_sdhi_sys_dmac.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/mmc/host/renesas_sdhi_sys_dmac.c b/drivers/mmc/host/renesas_sdhi_sys_dmac.c
+index c8a74b2dee00..82d757c480b2 100644
+--- a/drivers/mmc/host/renesas_sdhi_sys_dmac.c
++++ b/drivers/mmc/host/renesas_sdhi_sys_dmac.c
+@@ -348,7 +348,7 @@ static void renesas_sdhi_sys_dmac_issue_tasklet_fn(unsigned long priv)
+
+ spin_lock_irq(&host->lock);
+
+- if (host && host->data) {
++ if (host->data) {
+ if (host->data->flags & MMC_DATA_READ)
+ chan = host->chan_rx;
+ else
+--
+2.19.0
+
diff --git a/patches/0467-mmc-tmio-use-mmc_can_gpio_cd-instead-of-checking-TMI.patch b/patches/0467-mmc-tmio-use-mmc_can_gpio_cd-instead-of-checking-TMI.patch
new file mode 100644
index 0000000..d9e7350
--- /dev/null
+++ b/patches/0467-mmc-tmio-use-mmc_can_gpio_cd-instead-of-checking-TMI.patch
@@ -0,0 +1,43 @@
+From 12bc63872ef77bdcee59c259e199c43f977cddd0 Mon Sep 17 00:00:00 2001
+From: Masahiro Yamada <yamada.masahiro@socionext.com>
+Date: Sat, 25 Nov 2017 01:24:44 +0900
+Subject: [PATCH 0467/1795] mmc: tmio: use mmc_can_gpio_cd() instead of
+ checking TMIO_MMC_USE_GPIO_CD
+
+To use a GPIO line for card detection, TMIO_MMC_USE_GPIO_CD is set
+by a legacy board (arch/sh/boards/mach-ecovec24).
+
+For DT platforms, the "cd-gpios" property is a legitimate way for that
+in case the IP-builtin card detection can not be used for some reason.
+mmc_of_parse() calls mmc_gpiod_request_cd() to set up ctx->cd_gpio if
+the "cd-gpios" property is specified.
+
+To cater to both cases, mmc_can_gpio_cd() is a correct way to check
+which card detection logic is used.
+
+Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
+Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit de21dc1d9a2a9fc5023c1fe3a24ba21e68c34928)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mmc/host/tmio_mmc_core.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c
+index 61eac261d3de..ef70322d76be 100644
+--- a/drivers/mmc/host/tmio_mmc_core.c
++++ b/drivers/mmc/host/tmio_mmc_core.c
+@@ -1232,7 +1232,7 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
+ }
+ mmc->max_seg_size = mmc->max_req_size;
+
+- _host->native_hotplug = !(pdata->flags & TMIO_MMC_USE_GPIO_CD ||
++ _host->native_hotplug = !(mmc_can_gpio_cd(mmc) ||
+ mmc->caps & MMC_CAP_NEEDS_POLL ||
+ !mmc_card_is_removable(mmc));
+
+--
+2.19.0
+
diff --git a/patches/0468-mmc-tmio-ioremap-memory-resource-in-tmio_mmc_host_al.patch b/patches/0468-mmc-tmio-ioremap-memory-resource-in-tmio_mmc_host_al.patch
new file mode 100644
index 0000000..196bf95
--- /dev/null
+++ b/patches/0468-mmc-tmio-ioremap-memory-resource-in-tmio_mmc_host_al.patch
@@ -0,0 +1,112 @@
+From 7d4dcf125b09a939d67a326d956ac8d533bfa266 Mon Sep 17 00:00:00 2001
+From: Masahiro Yamada <yamada.masahiro@socionext.com>
+Date: Thu, 18 Jan 2018 01:28:01 +0900
+Subject: [PATCH 0468/1795] mmc: tmio: ioremap memory resource in
+ tmio_mmc_host_alloc()
+
+The register region is ioremap'ed in the tmio_mmc_host_probe(), i.e.
+drivers cannot get access to the hardware before mmc_add_host().
+
+Actually, renesas_sdhi_core.c reads out the CTL_VERSION register to
+complete the platform-specific settings. However, at this point,
+the MMC host is already running.
+
+Move the register ioremap to tmio_mmc_host_alloc() so that drivers
+can perform platform-specific settings between tmio_mmc_host_alloc()
+and tmio_mmc_host_probe().
+
+I changed tmio_mmc_host_alloc() to return an error pointer to
+propagate the return code from devm_ioremap_resource().
+
+Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
+Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit 8d09a13386ccdee8fb6d66aa2cfedbbc9255f892)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mmc/host/renesas_sdhi_core.c | 4 ++--
+ drivers/mmc/host/tmio_mmc.c | 4 +++-
+ drivers/mmc/host/tmio_mmc_core.c | 16 +++++++++-------
+ 3 files changed, 14 insertions(+), 10 deletions(-)
+
+diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
+index 6a2988bd51a2..ccdde2735f68 100644
+--- a/drivers/mmc/host/renesas_sdhi_core.c
++++ b/drivers/mmc/host/renesas_sdhi_core.c
+@@ -512,8 +512,8 @@ int renesas_sdhi_probe(struct platform_device *pdev,
+ }
+
+ host = tmio_mmc_host_alloc(pdev);
+- if (!host)
+- return -ENOMEM;
++ if (IS_ERR(host))
++ return PTR_ERR(host);
+
+ if (of_data) {
+ mmc_data->flags |= of_data->tmio_flags;
+diff --git a/drivers/mmc/host/tmio_mmc.c b/drivers/mmc/host/tmio_mmc.c
+index ccfbc154ee5b..d660816bdf89 100644
+--- a/drivers/mmc/host/tmio_mmc.c
++++ b/drivers/mmc/host/tmio_mmc.c
+@@ -93,8 +93,10 @@ static int tmio_mmc_probe(struct platform_device *pdev)
+ pdata->flags |= TMIO_MMC_HAVE_HIGH_REG;
+
+ host = tmio_mmc_host_alloc(pdev);
+- if (!host)
++ if (IS_ERR(host)) {
++ ret = PTR_ERR(host);
+ goto cell_disable;
++ }
+
+ /* SD control register space size is 0x200, 0x400 for bus_shift=1 */
+ host->bus_shift = resource_size(res) >> 10;
+diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c
+index ef70322d76be..4582c9a3bfb6 100644
+--- a/drivers/mmc/host/tmio_mmc_core.c
++++ b/drivers/mmc/host/tmio_mmc_core.c
+@@ -1150,12 +1150,20 @@ tmio_mmc_host_alloc(struct platform_device *pdev)
+ {
+ struct tmio_mmc_host *host;
+ struct mmc_host *mmc;
++ struct resource *res;
++ void __iomem *ctl;
++
++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ ctl = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(ctl))
++ return ERR_CAST(ctl);
+
+ mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
+ if (!mmc)
+- return NULL;
++ return ERR_PTR(-ENOMEM);
+
+ host = mmc_priv(mmc);
++ host->ctl = ctl;
+ host->mmc = mmc;
+ host->pdev = pdev;
+ host->ops = tmio_mmc_ops;
+@@ -1177,7 +1185,6 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
+ {
+ struct platform_device *pdev = _host->pdev;
+ struct mmc_host *mmc = _host->mmc;
+- struct resource *res_ctl;
+ int ret;
+ u32 irq_mask = TMIO_MASK_CMD;
+
+@@ -1186,11 +1193,6 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
+ if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
+ _host->write16_hook = NULL;
+
+- res_ctl = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+- _host->ctl = devm_ioremap_resource(&pdev->dev, res_ctl);
+- if (IS_ERR(_host->ctl))
+- return PTR_ERR(_host->ctl);
+-
+ ret = mmc_of_parse(mmc);
+ if (ret < 0)
+ return ret;
+--
+2.19.0
+
diff --git a/patches/0469-mmc-tmio-move-clk_enable-disable-out-of-tmio_mmc_hos.patch b/patches/0469-mmc-tmio-move-clk_enable-disable-out-of-tmio_mmc_hos.patch
new file mode 100644
index 0000000..4aecdb4
--- /dev/null
+++ b/patches/0469-mmc-tmio-move-clk_enable-disable-out-of-tmio_mmc_hos.patch
@@ -0,0 +1,208 @@
+From 23c06b239ca2faeabdd41628b6f357aec453ce3e Mon Sep 17 00:00:00 2001
+From: Masahiro Yamada <yamada.masahiro@socionext.com>
+Date: Thu, 18 Jan 2018 01:28:02 +0900
+Subject: [PATCH 0469/1795] mmc: tmio: move clk_enable/disable out of
+ tmio_mmc_host_probe()
+
+The clock is enabled in the tmio_mmc_host_probe(). It also prevents
+drivers from performing platform-specific settings before mmc_add_host()
+because the register access generally requires a clock.
+
+Enable/disable the clock in drivers' probe/remove. Also, I passed
+tmio_mmc_data to tmio_mmc_host_alloc() because renesas_sdhi_clk_enable()
+needs it to get the private data from tmio_mmc_host.
+
+Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
+Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit b21fc294387e4cf7916c132f7d6aaeebd4483a16)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mmc/host/renesas_sdhi_core.c | 13 ++++++++---
+ drivers/mmc/host/tmio_mmc.c | 7 ++++--
+ drivers/mmc/host/tmio_mmc.h | 4 ++--
+ drivers/mmc/host/tmio_mmc_core.c | 33 +++++++++++-----------------
+ 4 files changed, 30 insertions(+), 27 deletions(-)
+
+diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
+index ccdde2735f68..e18a1c553df6 100644
+--- a/drivers/mmc/host/renesas_sdhi_core.c
++++ b/drivers/mmc/host/renesas_sdhi_core.c
+@@ -511,7 +511,7 @@ int renesas_sdhi_probe(struct platform_device *pdev,
+ "state_uhs");
+ }
+
+- host = tmio_mmc_host_alloc(pdev);
++ host = tmio_mmc_host_alloc(pdev, mmc_data);
+ if (IS_ERR(host))
+ return PTR_ERR(host);
+
+@@ -571,10 +571,14 @@ int renesas_sdhi_probe(struct platform_device *pdev,
+ /* All SDHI have SDIO status bits which must be 1 */
+ mmc_data->flags |= TMIO_MMC_SDIO_STATUS_SETBITS;
+
+- ret = tmio_mmc_host_probe(host, mmc_data, dma_ops);
+- if (ret < 0)
++ ret = renesas_sdhi_clk_enable(host);
++ if (ret)
+ goto efree;
+
++ ret = tmio_mmc_host_probe(host, dma_ops);
++ if (ret < 0)
++ goto edisclk;
++
+ /* One Gen2 SDHI incarnation does NOT have a CBSY bit */
+ if (sd_ctrl_read16(host, CTL_VERSION) == SDHI_VER_GEN2_SDR50)
+ mmc_data->flags &= ~TMIO_MMC_HAVE_CBSY;
+@@ -635,6 +639,8 @@ int renesas_sdhi_probe(struct platform_device *pdev,
+
+ eirq:
+ tmio_mmc_host_remove(host);
++edisclk:
++ renesas_sdhi_clk_disable(host);
+ efree:
+ tmio_mmc_host_free(host);
+
+@@ -647,6 +653,7 @@ int renesas_sdhi_remove(struct platform_device *pdev)
+ struct tmio_mmc_host *host = platform_get_drvdata(pdev);
+
+ tmio_mmc_host_remove(host);
++ renesas_sdhi_clk_disable(host);
+
+ return 0;
+ }
+diff --git a/drivers/mmc/host/tmio_mmc.c b/drivers/mmc/host/tmio_mmc.c
+index d660816bdf89..11b87ce54764 100644
+--- a/drivers/mmc/host/tmio_mmc.c
++++ b/drivers/mmc/host/tmio_mmc.c
+@@ -92,7 +92,7 @@ static int tmio_mmc_probe(struct platform_device *pdev)
+
+ pdata->flags |= TMIO_MMC_HAVE_HIGH_REG;
+
+- host = tmio_mmc_host_alloc(pdev);
++ host = tmio_mmc_host_alloc(pdev, pdata);
+ if (IS_ERR(host)) {
+ ret = PTR_ERR(host);
+ goto cell_disable;
+@@ -101,7 +101,10 @@ static int tmio_mmc_probe(struct platform_device *pdev)
+ /* SD control register space size is 0x200, 0x400 for bus_shift=1 */
+ host->bus_shift = resource_size(res) >> 10;
+
+- ret = tmio_mmc_host_probe(host, pdata, NULL);
++ host->mmc->f_max = pdata->hclk;
++ host->mmc->f_min = pdata->hclk / 512;
++
++ ret = tmio_mmc_host_probe(host, NULL);
+ if (ret)
+ goto host_free;
+
+diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
+index 52198f2929a5..b52d7368818d 100644
+--- a/drivers/mmc/host/tmio_mmc.h
++++ b/drivers/mmc/host/tmio_mmc.h
+@@ -195,10 +195,10 @@ struct tmio_mmc_host {
+ const struct tmio_mmc_dma_ops *dma_ops;
+ };
+
+-struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev);
++struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
++ struct tmio_mmc_data *pdata);
+ void tmio_mmc_host_free(struct tmio_mmc_host *host);
+ int tmio_mmc_host_probe(struct tmio_mmc_host *host,
+- struct tmio_mmc_data *pdata,
+ const struct tmio_mmc_dma_ops *dma_ops);
+ void tmio_mmc_host_remove(struct tmio_mmc_host *host);
+ void tmio_mmc_do_data_irq(struct tmio_mmc_host *host);
+diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c
+index 4582c9a3bfb6..411c6111e267 100644
+--- a/drivers/mmc/host/tmio_mmc_core.c
++++ b/drivers/mmc/host/tmio_mmc_core.c
+@@ -1145,8 +1145,8 @@ static void tmio_mmc_of_parse(struct platform_device *pdev,
+ pdata->flags |= TMIO_MMC_WRPROTECT_DISABLE;
+ }
+
+-struct tmio_mmc_host*
+-tmio_mmc_host_alloc(struct platform_device *pdev)
++struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
++ struct tmio_mmc_data *pdata)
+ {
+ struct tmio_mmc_host *host;
+ struct mmc_host *mmc;
+@@ -1166,9 +1166,12 @@ tmio_mmc_host_alloc(struct platform_device *pdev)
+ host->ctl = ctl;
+ host->mmc = mmc;
+ host->pdev = pdev;
++ host->pdata = pdata;
+ host->ops = tmio_mmc_ops;
+ mmc->ops = &host->ops;
+
++ platform_set_drvdata(pdev, host);
++
+ return host;
+ }
+ EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);
+@@ -1180,14 +1183,21 @@ void tmio_mmc_host_free(struct tmio_mmc_host *host)
+ EXPORT_SYMBOL_GPL(tmio_mmc_host_free);
+
+ int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
+- struct tmio_mmc_data *pdata,
+ const struct tmio_mmc_dma_ops *dma_ops)
+ {
+ struct platform_device *pdev = _host->pdev;
++ struct tmio_mmc_data *pdata = _host->pdata;
+ struct mmc_host *mmc = _host->mmc;
+ int ret;
+ u32 irq_mask = TMIO_MASK_CMD;
+
++ /*
++ * Check the sanity of mmc->f_min to prevent tmio_mmc_set_clock() from
++ * looping forever...
++ */
++ if (mmc->f_min == 0)
++ return -EINVAL;
++
+ tmio_mmc_of_parse(pdev, pdata);
+
+ if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
+@@ -1197,9 +1207,6 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
+ if (ret < 0)
+ return ret;
+
+- _host->pdata = pdata;
+- platform_set_drvdata(pdev, _host);
+-
+ _host->set_pwr = pdata->set_pwr;
+ _host->set_clk_div = pdata->set_clk_div;
+
+@@ -1247,18 +1254,6 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
+ if (pdata->flags & TMIO_MMC_MIN_RCAR2)
+ _host->native_hotplug = true;
+
+- if (tmio_mmc_clk_enable(_host) < 0) {
+- mmc->f_max = pdata->hclk;
+- mmc->f_min = mmc->f_max / 512;
+- }
+-
+- /*
+- * Check the sanity of mmc->f_min to prevent tmio_mmc_set_clock() from
+- * looping forever...
+- */
+- if (mmc->f_min == 0)
+- return -EINVAL;
+-
+ /*
+ * While using internal tmio hardware logic for card detection, we need
+ * to ensure it stays powered for it to work.
+@@ -1336,8 +1331,6 @@ void tmio_mmc_host_remove(struct tmio_mmc_host *host)
+
+ pm_runtime_put_sync(&pdev->dev);
+ pm_runtime_disable(&pdev->dev);
+-
+- tmio_mmc_clk_disable(host);
+ }
+ EXPORT_SYMBOL_GPL(tmio_mmc_host_remove);
+
+--
+2.19.0
+
diff --git a/patches/0470-mmc-tmio-move-tmio_-mmc_of_parse-to-tmio_mmc_host_al.patch b/patches/0470-mmc-tmio-move-tmio_-mmc_of_parse-to-tmio_mmc_host_al.patch
new file mode 100644
index 0000000..c52ff5a
--- /dev/null
+++ b/patches/0470-mmc-tmio-move-tmio_-mmc_of_parse-to-tmio_mmc_host_al.patch
@@ -0,0 +1,77 @@
+From 0b0a368ec3f116562422f43a5d991ab9e606b29f Mon Sep 17 00:00:00 2001
+From: Masahiro Yamada <yamada.masahiro@socionext.com>
+Date: Thu, 18 Jan 2018 01:28:03 +0900
+Subject: [PATCH 0470/1795] mmc: tmio: move {tmio_}mmc_of_parse() to
+ tmio_mmc_host_alloc()
+
+mmc_of_parse() parses various DT properties and sets capability flags
+accordingly. However, drivers have no chance to run platform init
+code depending on such flags because mmc_of_parse() is called from
+tmio_mmc_host_probe().
+
+Move mmc_of_parse() to tmio_mmc_host_alloc() so that drivers can
+handle capabilities before mmc_add_host(). Move tmio_mmc_of_parse()
+likewise.
+
+Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
+Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit 6fb294f791af8f491812d4eef6b13a57c9c1de34)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mmc/host/tmio_mmc_core.c | 19 +++++++++++++------
+ 1 file changed, 13 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c
+index 411c6111e267..679bd96f4c14 100644
+--- a/drivers/mmc/host/tmio_mmc_core.c
++++ b/drivers/mmc/host/tmio_mmc_core.c
+@@ -1152,6 +1152,7 @@ struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
+ struct mmc_host *mmc;
+ struct resource *res;
+ void __iomem *ctl;
++ int ret;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ ctl = devm_ioremap_resource(&pdev->dev, res);
+@@ -1170,8 +1171,20 @@ struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
+ host->ops = tmio_mmc_ops;
+ mmc->ops = &host->ops;
+
++ ret = mmc_of_parse(host->mmc);
++ if (ret) {
++ host = ERR_PTR(ret);
++ goto free;
++ }
++
++ tmio_mmc_of_parse(pdev, pdata);
++
+ platform_set_drvdata(pdev, host);
+
++ return host;
++free:
++ mmc_free_host(mmc);
++
+ return host;
+ }
+ EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);
+@@ -1198,15 +1211,9 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
+ if (mmc->f_min == 0)
+ return -EINVAL;
+
+- tmio_mmc_of_parse(pdev, pdata);
+-
+ if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
+ _host->write16_hook = NULL;
+
+- ret = mmc_of_parse(mmc);
+- if (ret < 0)
+- return ret;
+-
+ _host->set_pwr = pdata->set_pwr;
+ _host->set_clk_div = pdata->set_clk_div;
+
+--
+2.19.0
+
diff --git a/patches/0471-mmc-tmio-remove-dma_ops-from-tmio_mmc_host_probe-arg.patch b/patches/0471-mmc-tmio-remove-dma_ops-from-tmio_mmc_host_probe-arg.patch
new file mode 100644
index 0000000..dd6976d
--- /dev/null
+++ b/patches/0471-mmc-tmio-remove-dma_ops-from-tmio_mmc_host_probe-arg.patch
@@ -0,0 +1,96 @@
+From 614593ab2ae7da722c9da5b08ca0c6c452912fcd Mon Sep 17 00:00:00 2001
+From: Masahiro Yamada <yamada.masahiro@socionext.com>
+Date: Thu, 18 Jan 2018 01:28:04 +0900
+Subject: [PATCH 0471/1795] mmc: tmio: remove dma_ops from
+ tmio_mmc_host_probe() argument
+
+Drivers need to set up various struct members for tmio_mmc_host before
+calling tmio_mmc_host_probe(). Do likewise for host->dma_ops instead
+of passing it as a function argument.
+
+Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
+Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit bc45719c1b1a56047246d44c7e4ed88a8ae702c1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mmc/host/renesas_sdhi_core.c | 3 ++-
+ drivers/mmc/host/tmio_mmc.c | 2 +-
+ drivers/mmc/host/tmio_mmc.h | 3 +--
+ drivers/mmc/host/tmio_mmc_core.c | 4 +---
+ 4 files changed, 5 insertions(+), 7 deletions(-)
+
+diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
+index e18a1c553df6..80943fa07db6 100644
+--- a/drivers/mmc/host/renesas_sdhi_core.c
++++ b/drivers/mmc/host/renesas_sdhi_core.c
+@@ -532,6 +532,7 @@ int renesas_sdhi_probe(struct platform_device *pdev,
+ host->clk_update = renesas_sdhi_clk_update;
+ host->clk_disable = renesas_sdhi_clk_disable;
+ host->multi_io_quirk = renesas_sdhi_multi_io_quirk;
++ host->dma_ops = dma_ops;
+
+ /* SDR speeds are only available on Gen2+ */
+ if (mmc_data->flags & TMIO_MMC_MIN_RCAR2) {
+@@ -575,7 +576,7 @@ int renesas_sdhi_probe(struct platform_device *pdev,
+ if (ret)
+ goto efree;
+
+- ret = tmio_mmc_host_probe(host, dma_ops);
++ ret = tmio_mmc_host_probe(host);
+ if (ret < 0)
+ goto edisclk;
+
+diff --git a/drivers/mmc/host/tmio_mmc.c b/drivers/mmc/host/tmio_mmc.c
+index 11b87ce54764..43a2ea5cff24 100644
+--- a/drivers/mmc/host/tmio_mmc.c
++++ b/drivers/mmc/host/tmio_mmc.c
+@@ -104,7 +104,7 @@ static int tmio_mmc_probe(struct platform_device *pdev)
+ host->mmc->f_max = pdata->hclk;
+ host->mmc->f_min = pdata->hclk / 512;
+
+- ret = tmio_mmc_host_probe(host, NULL);
++ ret = tmio_mmc_host_probe(host);
+ if (ret)
+ goto host_free;
+
+diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
+index b52d7368818d..e7d651352dc9 100644
+--- a/drivers/mmc/host/tmio_mmc.h
++++ b/drivers/mmc/host/tmio_mmc.h
+@@ -198,8 +198,7 @@ struct tmio_mmc_host {
+ struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
+ struct tmio_mmc_data *pdata);
+ void tmio_mmc_host_free(struct tmio_mmc_host *host);
+-int tmio_mmc_host_probe(struct tmio_mmc_host *host,
+- const struct tmio_mmc_dma_ops *dma_ops);
++int tmio_mmc_host_probe(struct tmio_mmc_host *host);
+ void tmio_mmc_host_remove(struct tmio_mmc_host *host);
+ void tmio_mmc_do_data_irq(struct tmio_mmc_host *host);
+
+diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c
+index 679bd96f4c14..1417574a47e7 100644
+--- a/drivers/mmc/host/tmio_mmc_core.c
++++ b/drivers/mmc/host/tmio_mmc_core.c
+@@ -1195,8 +1195,7 @@ void tmio_mmc_host_free(struct tmio_mmc_host *host)
+ }
+ EXPORT_SYMBOL_GPL(tmio_mmc_host_free);
+
+-int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
+- const struct tmio_mmc_dma_ops *dma_ops)
++int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
+ {
+ struct platform_device *pdev = _host->pdev;
+ struct tmio_mmc_data *pdata = _host->pdata;
+@@ -1296,7 +1295,6 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
+ INIT_WORK(&_host->done, tmio_mmc_done_work);
+
+ /* See if we also get DMA */
+- _host->dma_ops = dma_ops;
+ tmio_mmc_request_dma(_host, pdata);
+
+ pm_runtime_set_active(&pdev->dev);
+--
+2.19.0
+
diff --git a/patches/0472-soc-renesas-Identify-R-Car-M3-W-ES1.1.patch b/patches/0472-soc-renesas-Identify-R-Car-M3-W-ES1.1.patch
new file mode 100644
index 0000000..acb41d4
--- /dev/null
+++ b/patches/0472-soc-renesas-Identify-R-Car-M3-W-ES1.1.patch
@@ -0,0 +1,34 @@
+From b95d3374f2030ac0667bf8a32cad3926fa8fec7c Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 30 Oct 2017 18:29:58 +0100
+Subject: [PATCH 0472/1795] soc: renesas: Identify R-Car M3-W ES1.1
+
+The Product Register of R-Car M3-W ES1.1 incorrectly identifies the SoC
+revision as ES2.0. Add a workaround to fix this.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 90f0d2b344313a8a4c366ef60d0df33008d2be84)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/soc/renesas/renesas-soc.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/drivers/soc/renesas/renesas-soc.c b/drivers/soc/renesas/renesas-soc.c
+index 9f4ee2567c72..926b7fd6db2d 100644
+--- a/drivers/soc/renesas/renesas-soc.c
++++ b/drivers/soc/renesas/renesas-soc.c
+@@ -250,6 +250,9 @@ static int __init renesas_soc_init(void)
+ if (chipid) {
+ product = readl(chipid);
+ iounmap(chipid);
++ /* R-Car M3-W ES1.1 incorrectly identifies as ES2.0 */
++ if ((product & 0x7fff) == 0x5210)
++ product ^= 0x11;
+ if (soc->id && ((product >> 8) & 0xff) != soc->id) {
+ pr_warn("SoC mismatch (product = 0x%x)\n", product);
+ return -ENODEV;
+--
+2.19.0
+
diff --git a/patches/0473-sata_rcar-Reset-SATA-PHY-when-Salvator-X-board-resum.patch b/patches/0473-sata_rcar-Reset-SATA-PHY-when-Salvator-X-board-resum.patch
new file mode 100644
index 0000000..57fbabd
--- /dev/null
+++ b/patches/0473-sata_rcar-Reset-SATA-PHY-when-Salvator-X-board-resum.patch
@@ -0,0 +1,145 @@
+From 135b65f7e72d46116a5afb9325f320e1fca07b11 Mon Sep 17 00:00:00 2001
+From: Khiem Nguyen <khiem.nguyen.xt@rvc.renesas.com>
+Date: Mon, 5 Feb 2018 04:18:51 +0900
+Subject: [PATCH 0473/1795] sata_rcar: Reset SATA PHY when Salvator-X board
+ resumes
+
+Because power of Salvator-X board is cut off in suspend,
+it needs to reset SATA PHY state in resume.
+Otherwise, SATA partition could not be accessed anymore.
+
+Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@rvc.renesas.com>
+Signed-off-by: Hien Dang <hien.dang.eb@rvc.renesas.com>
+[reinit phy in sata_rcar_resume() function on R-Car Gen3 only]
+[factor out SATA module init sequence]
+[fixed the prefix for the subject]
+Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
+Signed-off-by: Tejun Heo <tj@kernel.org>
+
+(cherry picked from commit da77d76b95a0e8940793f4f7fe12a4a2d2048e39)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/ata/sata_rcar.c | 63 ++++++++++++++++++++++++++---------------
+ 1 file changed, 40 insertions(+), 23 deletions(-)
+
+diff --git a/drivers/ata/sata_rcar.c b/drivers/ata/sata_rcar.c
+index 80ee2f2a50d0..6f47ca34767d 100644
+--- a/drivers/ata/sata_rcar.c
++++ b/drivers/ata/sata_rcar.c
+@@ -146,6 +146,7 @@
+ enum sata_rcar_type {
+ RCAR_GEN1_SATA,
+ RCAR_GEN2_SATA,
++ RCAR_GEN3_SATA,
+ RCAR_R8A7790_ES1_SATA,
+ };
+
+@@ -784,26 +785,11 @@ static void sata_rcar_setup_port(struct ata_host *host)
+ ioaddr->command_addr = ioaddr->cmd_addr + (ATA_REG_CMD << 2);
+ }
+
+-static void sata_rcar_init_controller(struct ata_host *host)
++static void sata_rcar_init_module(struct sata_rcar_priv *priv)
+ {
+- struct sata_rcar_priv *priv = host->private_data;
+ void __iomem *base = priv->base;
+ u32 val;
+
+- /* reset and setup phy */
+- switch (priv->type) {
+- case RCAR_GEN1_SATA:
+- sata_rcar_gen1_phy_init(priv);
+- break;
+- case RCAR_GEN2_SATA:
+- case RCAR_R8A7790_ES1_SATA:
+- sata_rcar_gen2_phy_init(priv);
+- break;
+- default:
+- dev_warn(host->dev, "SATA phy is not initialized\n");
+- break;
+- }
+-
+ /* SATA-IP reset state */
+ val = ioread32(base + ATAPI_CONTROL1_REG);
+ val |= ATAPI_CONTROL1_RESET;
+@@ -824,10 +810,34 @@ static void sata_rcar_init_controller(struct ata_host *host)
+ /* ack and mask */
+ iowrite32(0, base + SATAINTSTAT_REG);
+ iowrite32(0x7ff, base + SATAINTMASK_REG);
++
+ /* enable interrupts */
+ iowrite32(ATAPI_INT_ENABLE_SATAINT, base + ATAPI_INT_ENABLE_REG);
+ }
+
++static void sata_rcar_init_controller(struct ata_host *host)
++{
++ struct sata_rcar_priv *priv = host->private_data;
++ void __iomem *base = priv->base;
++
++ /* reset and setup phy */
++ switch (priv->type) {
++ case RCAR_GEN1_SATA:
++ sata_rcar_gen1_phy_init(priv);
++ break;
++ case RCAR_GEN2_SATA:
++ case RCAR_GEN3_SATA:
++ case RCAR_R8A7790_ES1_SATA:
++ sata_rcar_gen2_phy_init(priv);
++ break;
++ default:
++ dev_warn(host->dev, "SATA phy is not initialized\n");
++ break;
++ }
++
++ sata_rcar_init_module(priv);
++}
++
+ static const struct of_device_id sata_rcar_match[] = {
+ {
+ /* Deprecated by "renesas,sata-r8a7779" */
+@@ -856,7 +866,7 @@ static const struct of_device_id sata_rcar_match[] = {
+ },
+ {
+ .compatible = "renesas,sata-r8a7795",
+- .data = (void *)RCAR_GEN2_SATA
++ .data = (void *)RCAR_GEN3_SATA
+ },
+ {
+ .compatible = "renesas,rcar-gen2-sata",
+@@ -864,7 +874,7 @@ static const struct of_device_id sata_rcar_match[] = {
+ },
+ {
+ .compatible = "renesas,rcar-gen3-sata",
+- .data = (void *)RCAR_GEN2_SATA
++ .data = (void *)RCAR_GEN3_SATA
+ },
+ { },
+ };
+@@ -982,11 +992,18 @@ static int sata_rcar_resume(struct device *dev)
+ if (ret)
+ return ret;
+
+- /* ack and mask */
+- iowrite32(0, base + SATAINTSTAT_REG);
+- iowrite32(0x7ff, base + SATAINTMASK_REG);
+- /* enable interrupts */
+- iowrite32(ATAPI_INT_ENABLE_SATAINT, base + ATAPI_INT_ENABLE_REG);
++ if (priv->type == RCAR_GEN3_SATA) {
++ sata_rcar_gen2_phy_init(priv);
++ sata_rcar_init_module(priv);
++ } else {
++ /* ack and mask */
++ iowrite32(0, base + SATAINTSTAT_REG);
++ iowrite32(0x7ff, base + SATAINTMASK_REG);
++
++ /* enable interrupts */
++ iowrite32(ATAPI_INT_ENABLE_SATAINT,
++ base + ATAPI_INT_ENABLE_REG);
++ }
+
+ ata_host_resume(host);
+
+--
+2.19.0
+
diff --git a/patches/0474-ata-sata_rcar-Remove-unused-variable-in-sata_rcar_in.patch b/patches/0474-ata-sata_rcar-Remove-unused-variable-in-sata_rcar_in.patch
new file mode 100644
index 0000000..d08d6c1
--- /dev/null
+++ b/patches/0474-ata-sata_rcar-Remove-unused-variable-in-sata_rcar_in.patch
@@ -0,0 +1,34 @@
+From dd1ad9c7e92fe96c501dac157575166493874d13 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Tue, 13 Feb 2018 13:43:23 +0100
+Subject: [PATCH 0474/1795] ata: sata_rcar: Remove unused variable in
+ sata_rcar_init_controller()
+
+drivers/ata/sata_rcar.c: In function 'sata_rcar_init_controller':
+drivers/ata/sata_rcar.c:821:8: warning: unused variable 'base' [-Wunused-variable]
+
+Fixes: da77d76b95a0e894 ("sata_rcar: Reset SATA PHY when Salvator-X board resumes")
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Tejun Heo <tj@kernel.org>
+(cherry picked from commit 8f8ca51dbb4da0457f57f83d94aea81931b0707a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/ata/sata_rcar.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/drivers/ata/sata_rcar.c b/drivers/ata/sata_rcar.c
+index 6f47ca34767d..6456e07db72a 100644
+--- a/drivers/ata/sata_rcar.c
++++ b/drivers/ata/sata_rcar.c
+@@ -818,7 +818,6 @@ static void sata_rcar_init_module(struct sata_rcar_priv *priv)
+ static void sata_rcar_init_controller(struct ata_host *host)
+ {
+ struct sata_rcar_priv *priv = host->private_data;
+- void __iomem *base = priv->base;
+
+ /* reset and setup phy */
+ switch (priv->type) {
+--
+2.19.0
+
diff --git a/patches/0475-cpufreq-Add-and-use-cpufreq_for_each_-valid_-entry_i.patch b/patches/0475-cpufreq-Add-and-use-cpufreq_for_each_-valid_-entry_i.patch
new file mode 100644
index 0000000..359c675
--- /dev/null
+++ b/patches/0475-cpufreq-Add-and-use-cpufreq_for_each_-valid_-entry_i.patch
@@ -0,0 +1,454 @@
+From 60d839c1679a9ea08ff5825785cea57569e32126 Mon Sep 17 00:00:00 2001
+From: Dominik Brodowski <linux@dominikbrodowski.net>
+Date: Tue, 30 Jan 2018 06:42:37 +0100
+Subject: [PATCH 0475/1795] cpufreq: Add and use
+ cpufreq_for_each_{valid_,}entry_idx()
+
+Pointer subtraction is slow and tedious. Therefore, replace all instances
+where cpufreq_for_each_{valid_,}entry loops contained such substractions
+with an iteration macro providing an index to the frequency_table entry.
+
+Suggested-by: Al Viro <viro@ZenIV.linux.org.uk>
+Link: http://lkml.kernel.org/r/20180120020237.GM13338@ZenIV.linux.org.uk
+Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
+Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
+Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+(cherry picked from commit ffd81dcfef85a33729f90e4acd2f61a68e56b993)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ Documentation/cpu-freq/cpu-drivers.txt | 4 +
+ drivers/cpufreq/exynos5440-cpufreq.c | 7 +-
+ drivers/cpufreq/freq_table.c | 8 +-
+ drivers/cpufreq/longhaul.c | 4 +-
+ drivers/cpufreq/pasemi-cpufreq.c | 6 +-
+ drivers/sh/clk/core.c | 5 +-
+ drivers/staging/irda/drivers/sh_sir.c | 4 +-
+ include/linux/cpufreq.h | 125 ++++++++++++++++---------
+ 8 files changed, 100 insertions(+), 63 deletions(-)
+
+diff --git a/Documentation/cpu-freq/cpu-drivers.txt b/Documentation/cpu-freq/cpu-drivers.txt
+index 434c49cc7330..61546ac578d6 100644
+--- a/Documentation/cpu-freq/cpu-drivers.txt
++++ b/Documentation/cpu-freq/cpu-drivers.txt
+@@ -291,3 +291,7 @@ For example:
+ /* Do something with pos */
+ pos->frequency = ...
+ }
++
++If you need to work with the position of pos within driver_freq_table,
++do not subtract the pointers, as it is quite costly. Instead, use the
++macros cpufreq_for_each_entry_idx() and cpufreq_for_each_valid_entry_idx().
+diff --git a/drivers/cpufreq/exynos5440-cpufreq.c b/drivers/cpufreq/exynos5440-cpufreq.c
+index b6b369c22272..932caa386ece 100644
+--- a/drivers/cpufreq/exynos5440-cpufreq.c
++++ b/drivers/cpufreq/exynos5440-cpufreq.c
+@@ -115,10 +115,10 @@ static struct cpufreq_freqs freqs;
+ static int init_div_table(void)
+ {
+ struct cpufreq_frequency_table *pos, *freq_tbl = dvfs_info->freq_table;
+- unsigned int tmp, clk_div, ema_div, freq, volt_id;
++ unsigned int tmp, clk_div, ema_div, freq, volt_id, idx;
+ struct dev_pm_opp *opp;
+
+- cpufreq_for_each_entry(pos, freq_tbl) {
++ cpufreq_for_each_entry_idx(pos, freq_tbl, idx) {
+ opp = dev_pm_opp_find_freq_exact(dvfs_info->dev,
+ pos->frequency * 1000, true);
+ if (IS_ERR(opp)) {
+@@ -154,8 +154,7 @@ static int init_div_table(void)
+ tmp = (clk_div | ema_div | (volt_id << P0_7_VDD_SHIFT)
+ | ((freq / FREQ_UNIT) << P0_7_FREQ_SHIFT));
+
+- __raw_writel(tmp, dvfs_info->base + XMU_PMU_P0_7 + 4 *
+- (pos - freq_tbl));
++ __raw_writel(tmp, dvfs_info->base + XMU_PMU_P0_7 + 4 * idx);
+ dev_pm_opp_put(opp);
+ }
+
+diff --git a/drivers/cpufreq/freq_table.c b/drivers/cpufreq/freq_table.c
+index 3bbbf9e6960c..6d007f824ca7 100644
+--- a/drivers/cpufreq/freq_table.c
++++ b/drivers/cpufreq/freq_table.c
+@@ -143,10 +143,9 @@ int cpufreq_table_index_unsorted(struct cpufreq_policy *policy,
+ break;
+ }
+
+- cpufreq_for_each_valid_entry(pos, table) {
++ cpufreq_for_each_valid_entry_idx(pos, table, i) {
+ freq = pos->frequency;
+
+- i = pos - table;
+ if ((freq < policy->min) || (freq > policy->max))
+ continue;
+ if (freq == target_freq) {
+@@ -211,15 +210,16 @@ int cpufreq_frequency_table_get_index(struct cpufreq_policy *policy,
+ unsigned int freq)
+ {
+ struct cpufreq_frequency_table *pos, *table = policy->freq_table;
++ int idx;
+
+ if (unlikely(!table)) {
+ pr_debug("%s: Unable to find frequency table\n", __func__);
+ return -ENOENT;
+ }
+
+- cpufreq_for_each_valid_entry(pos, table)
++ cpufreq_for_each_valid_entry_idx(pos, table, idx)
+ if (pos->frequency == freq)
+- return pos - table;
++ return idx;
+
+ return -EINVAL;
+ }
+diff --git a/drivers/cpufreq/longhaul.c b/drivers/cpufreq/longhaul.c
+index 859a62ea6120..f730b6528c18 100644
+--- a/drivers/cpufreq/longhaul.c
++++ b/drivers/cpufreq/longhaul.c
+@@ -600,7 +600,7 @@ static void longhaul_setup_voltagescaling(void)
+ /* Calculate kHz for one voltage step */
+ kHz_step = (highest_speed - min_vid_speed) / numvscales;
+
+- cpufreq_for_each_entry(freq_pos, longhaul_table) {
++ cpufreq_for_each_entry_idx(freq_pos, longhaul_table, j) {
+ speed = freq_pos->frequency;
+ if (speed > min_vid_speed)
+ pos = (speed - min_vid_speed) / kHz_step + minvid.pos;
+@@ -609,7 +609,7 @@ static void longhaul_setup_voltagescaling(void)
+ freq_pos->driver_data |= mV_vrm_table[pos] << 8;
+ vid = vrm_mV_table[mV_vrm_table[pos]];
+ pr_info("f: %d kHz, index: %d, vid: %d mV\n",
+- speed, (int)(freq_pos - longhaul_table), vid.mV);
++ speed, j, vid.mV);
+ }
+
+ can_scale_voltage = 1;
+diff --git a/drivers/cpufreq/pasemi-cpufreq.c b/drivers/cpufreq/pasemi-cpufreq.c
+index b257fc7d5204..75dfbd2a58ea 100644
+--- a/drivers/cpufreq/pasemi-cpufreq.c
++++ b/drivers/cpufreq/pasemi-cpufreq.c
+@@ -139,7 +139,7 @@ static int pas_cpufreq_cpu_init(struct cpufreq_policy *policy)
+ struct cpufreq_frequency_table *pos;
+ const u32 *max_freqp;
+ u32 max_freq;
+- int cur_astate;
++ int cur_astate, idx;
+ struct resource res;
+ struct device_node *cpu, *dn;
+ int err = -ENODEV;
+@@ -198,9 +198,9 @@ static int pas_cpufreq_cpu_init(struct cpufreq_policy *policy)
+ pr_debug("initializing frequency table\n");
+
+ /* initialize frequency table */
+- cpufreq_for_each_entry(pos, pas_freqs) {
++ cpufreq_for_each_entry_idx(pos, pas_freqs, idx) {
+ pos->frequency = get_astate_freq(pos->driver_data) * 100000;
+- pr_debug("%d: %d\n", (int)(pos - pas_freqs), pos->frequency);
++ pr_debug("%d: %d\n", idx, pos->frequency);
+ }
+
+ cur_astate = get_cur_astate(policy->cpu);
+diff --git a/drivers/sh/clk/core.c b/drivers/sh/clk/core.c
+index 92863e3818e5..9475353f49d6 100644
+--- a/drivers/sh/clk/core.c
++++ b/drivers/sh/clk/core.c
+@@ -197,10 +197,11 @@ int clk_rate_table_find(struct clk *clk,
+ unsigned long rate)
+ {
+ struct cpufreq_frequency_table *pos;
++ int idx;
+
+- cpufreq_for_each_valid_entry(pos, freq_table)
++ cpufreq_for_each_valid_entry_idx(pos, freq_table, idx)
+ if (pos->frequency == rate)
+- return pos - freq_table;
++ return idx;
+
+ return -ENOENT;
+ }
+diff --git a/drivers/staging/irda/drivers/sh_sir.c b/drivers/staging/irda/drivers/sh_sir.c
+index fede6864c737..0d0687cc454a 100644
+--- a/drivers/staging/irda/drivers/sh_sir.c
++++ b/drivers/staging/irda/drivers/sh_sir.c
+@@ -226,7 +226,7 @@ static u32 sh_sir_find_sclk(struct clk *irda_clk)
+ clk_put(pclk);
+
+ /* IrDA can not set over peripheral_clk */
+- cpufreq_for_each_valid_entry(pos, freq_table) {
++ cpufreq_for_each_valid_entry_idx(pos, freq_table, index) {
+ u32 freq = pos->frequency;
+
+ /* IrDA should not over peripheral_clk */
+@@ -236,7 +236,7 @@ static u32 sh_sir_find_sclk(struct clk *irda_clk)
+ tmp = freq % SCLK_BASE;
+ if (tmp < min) {
+ min = tmp;
+- index = pos - freq_table;
++ break;
+ }
+ }
+
+diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h
+index cbf85c4c745f..919295a0b859 100644
+--- a/include/linux/cpufreq.h
++++ b/include/linux/cpufreq.h
+@@ -628,6 +628,18 @@ static inline void dev_pm_opp_free_cpufreq_table(struct device *dev,
+ #define cpufreq_for_each_entry(pos, table) \
+ for (pos = table; pos->frequency != CPUFREQ_TABLE_END; pos++)
+
++/*
++ * cpufreq_for_each_entry_idx - iterate over a cpufreq_frequency_table
++ * with index
++ * @pos: the cpufreq_frequency_table * to use as a loop cursor.
++ * @table: the cpufreq_frequency_table * to iterate over.
++ * @idx: the table entry currently being processed
++ */
++
++#define cpufreq_for_each_entry_idx(pos, table, idx) \
++ for (pos = table, idx = 0; pos->frequency != CPUFREQ_TABLE_END; \
++ pos++, idx++)
++
+ /*
+ * cpufreq_for_each_valid_entry - iterate over a cpufreq_frequency_table
+ * excluding CPUFREQ_ENTRY_INVALID frequencies.
+@@ -641,6 +653,21 @@ static inline void dev_pm_opp_free_cpufreq_table(struct device *dev,
+ continue; \
+ else
+
++/*
++ * cpufreq_for_each_valid_entry_idx - iterate with index over a cpufreq
++ * frequency_table excluding CPUFREQ_ENTRY_INVALID frequencies.
++ * @pos: the cpufreq_frequency_table * to use as a loop cursor.
++ * @table: the cpufreq_frequency_table * to iterate over.
++ * @idx: the table entry currently being processed
++ */
++
++#define cpufreq_for_each_valid_entry_idx(pos, table, idx) \
++ cpufreq_for_each_entry_idx(pos, table, idx) \
++ if (pos->frequency == CPUFREQ_ENTRY_INVALID) \
++ continue; \
++ else
++
++
+ int cpufreq_frequency_table_cpuinfo(struct cpufreq_policy *policy,
+ struct cpufreq_frequency_table *table);
+
+@@ -667,19 +694,20 @@ static inline int cpufreq_table_find_index_al(struct cpufreq_policy *policy,
+ unsigned int target_freq)
+ {
+ struct cpufreq_frequency_table *table = policy->freq_table;
+- struct cpufreq_frequency_table *pos, *best = table - 1;
++ struct cpufreq_frequency_table *pos;
+ unsigned int freq;
++ int idx, best = -1;
+
+- cpufreq_for_each_valid_entry(pos, table) {
++ cpufreq_for_each_valid_entry_idx(pos, table, idx) {
+ freq = pos->frequency;
+
+ if (freq >= target_freq)
+- return pos - table;
++ return idx;
+
+- best = pos;
++ best = idx;
+ }
+
+- return best - table;
++ return best;
+ }
+
+ /* Find lowest freq at or above target in a table in descending order */
+@@ -687,28 +715,29 @@ static inline int cpufreq_table_find_index_dl(struct cpufreq_policy *policy,
+ unsigned int target_freq)
+ {
+ struct cpufreq_frequency_table *table = policy->freq_table;
+- struct cpufreq_frequency_table *pos, *best = table - 1;
++ struct cpufreq_frequency_table *pos;
+ unsigned int freq;
++ int idx, best = -1;
+
+- cpufreq_for_each_valid_entry(pos, table) {
++ cpufreq_for_each_valid_entry_idx(pos, table, idx) {
+ freq = pos->frequency;
+
+ if (freq == target_freq)
+- return pos - table;
++ return idx;
+
+ if (freq > target_freq) {
+- best = pos;
++ best = idx;
+ continue;
+ }
+
+ /* No freq found above target_freq */
+- if (best == table - 1)
+- return pos - table;
++ if (best == -1)
++ return idx;
+
+- return best - table;
++ return best;
+ }
+
+- return best - table;
++ return best;
+ }
+
+ /* Works only on sorted freq-tables */
+@@ -728,28 +757,29 @@ static inline int cpufreq_table_find_index_ah(struct cpufreq_policy *policy,
+ unsigned int target_freq)
+ {
+ struct cpufreq_frequency_table *table = policy->freq_table;
+- struct cpufreq_frequency_table *pos, *best = table - 1;
++ struct cpufreq_frequency_table *pos;
+ unsigned int freq;
++ int idx, best = -1;
+
+- cpufreq_for_each_valid_entry(pos, table) {
++ cpufreq_for_each_valid_entry_idx(pos, table, idx) {
+ freq = pos->frequency;
+
+ if (freq == target_freq)
+- return pos - table;
++ return idx;
+
+ if (freq < target_freq) {
+- best = pos;
++ best = idx;
+ continue;
+ }
+
+ /* No freq found below target_freq */
+- if (best == table - 1)
+- return pos - table;
++ if (best == -1)
++ return idx;
+
+- return best - table;
++ return best;
+ }
+
+- return best - table;
++ return best;
+ }
+
+ /* Find highest freq at or below target in a table in descending order */
+@@ -757,19 +787,20 @@ static inline int cpufreq_table_find_index_dh(struct cpufreq_policy *policy,
+ unsigned int target_freq)
+ {
+ struct cpufreq_frequency_table *table = policy->freq_table;
+- struct cpufreq_frequency_table *pos, *best = table - 1;
++ struct cpufreq_frequency_table *pos;
+ unsigned int freq;
++ int idx, best = -1;
+
+- cpufreq_for_each_valid_entry(pos, table) {
++ cpufreq_for_each_valid_entry_idx(pos, table, idx) {
+ freq = pos->frequency;
+
+ if (freq <= target_freq)
+- return pos - table;
++ return idx;
+
+- best = pos;
++ best = idx;
+ }
+
+- return best - table;
++ return best;
+ }
+
+ /* Works only on sorted freq-tables */
+@@ -789,32 +820,33 @@ static inline int cpufreq_table_find_index_ac(struct cpufreq_policy *policy,
+ unsigned int target_freq)
+ {
+ struct cpufreq_frequency_table *table = policy->freq_table;
+- struct cpufreq_frequency_table *pos, *best = table - 1;
++ struct cpufreq_frequency_table *pos;
+ unsigned int freq;
++ int idx, best = -1;
+
+- cpufreq_for_each_valid_entry(pos, table) {
++ cpufreq_for_each_valid_entry_idx(pos, table, idx) {
+ freq = pos->frequency;
+
+ if (freq == target_freq)
+- return pos - table;
++ return idx;
+
+ if (freq < target_freq) {
+- best = pos;
++ best = idx;
+ continue;
+ }
+
+ /* No freq found below target_freq */
+- if (best == table - 1)
+- return pos - table;
++ if (best == -1)
++ return idx;
+
+ /* Choose the closest freq */
+- if (target_freq - best->frequency > freq - target_freq)
+- return pos - table;
++ if (target_freq - table[best].frequency > freq - target_freq)
++ return idx;
+
+- return best - table;
++ return best;
+ }
+
+- return best - table;
++ return best;
+ }
+
+ /* Find closest freq to target in a table in descending order */
+@@ -822,32 +854,33 @@ static inline int cpufreq_table_find_index_dc(struct cpufreq_policy *policy,
+ unsigned int target_freq)
+ {
+ struct cpufreq_frequency_table *table = policy->freq_table;
+- struct cpufreq_frequency_table *pos, *best = table - 1;
++ struct cpufreq_frequency_table *pos;
+ unsigned int freq;
++ int idx, best = -1;
+
+- cpufreq_for_each_valid_entry(pos, table) {
++ cpufreq_for_each_valid_entry_idx(pos, table, idx) {
+ freq = pos->frequency;
+
+ if (freq == target_freq)
+- return pos - table;
++ return idx;
+
+ if (freq > target_freq) {
+- best = pos;
++ best = idx;
+ continue;
+ }
+
+ /* No freq found above target_freq */
+- if (best == table - 1)
+- return pos - table;
++ if (best == -1)
++ return idx;
+
+ /* Choose the closest freq */
+- if (best->frequency - target_freq > target_freq - freq)
+- return pos - table;
++ if (table[best].frequency - target_freq > target_freq - freq)
++ return idx;
+
+- return best - table;
++ return best;
+ }
+
+- return best - table;
++ return best;
+ }
+
+ /* Works only on sorted freq-tables */
+--
+2.19.0
+
diff --git a/patches/0476-sh_eth-kill-redundant-check-in-the-probe-method.patch b/patches/0476-sh_eth-kill-redundant-check-in-the-probe-method.patch
new file mode 100644
index 0000000..6e1310a
--- /dev/null
+++ b/patches/0476-sh_eth-kill-redundant-check-in-the-probe-method.patch
@@ -0,0 +1,37 @@
+From 9ef47f4fa90319e6b33d0ead11ec4e7da4ad8998 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sun, 31 Dec 2017 21:41:36 +0300
+Subject: [PATCH 0476/1795] sh_eth: kill redundant check in the probe() method
+
+Browsing thru the driver disassembly, I noticed that gcc was able to
+figure out that the 'ndev' pointer is always non-NULL when calling
+free_netdev() on the probe() method's error path and thus skip that
+redundant NULL check... gcc is smart, be like gcc! :-)
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 4282fc47c01262fdda55a9d63a4e25173fd9afb4)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/net/ethernet/renesas/sh_eth.c | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
+index 007f54b5766b..d7216bcace03 100644
+--- a/drivers/net/ethernet/renesas/sh_eth.c
++++ b/drivers/net/ethernet/renesas/sh_eth.c
+@@ -3278,8 +3278,7 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
+
+ out_release:
+ /* net_dev free */
+- if (ndev)
+- free_netdev(ndev);
++ free_netdev(ndev);
+
+ pm_runtime_put(&pdev->dev);
+ pm_runtime_disable(&pdev->dev);
+--
+2.19.0
+
diff --git a/patches/0477-sh_eth-remove-sh_eth_plat_data-edmac_endian.patch b/patches/0477-sh_eth-remove-sh_eth_plat_data-edmac_endian.patch
new file mode 100644
index 0000000..e672163
--- /dev/null
+++ b/patches/0477-sh_eth-remove-sh_eth_plat_data-edmac_endian.patch
@@ -0,0 +1,143 @@
+From db1ab7fcf45142b8ee7f464f5cf5f1adeb22cffa Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 5 Jan 2018 00:26:46 +0300
+Subject: [PATCH 0477/1795] sh_eth: remove sh_eth_plat_data::edmac_endian
+
+Since the commit 888cc8c20cf ("sh_eth: remove EDMAC_BIG_ENDIAN") (geez,
+I didn't realize that was 2 years ago!) the initializers in the SuperH
+platform code for the 'sh_eth_plat_data::edmac_endian' stopped to matter,
+so we can remove that field for good (not sure if it was ever useful --
+SH7786 Ether has been reported to have the same EDMAC descriptor/register
+endiannes as configured for the SuperH CPU)...
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit e3e49ca9b033adbc99aca25db4b46b0eadd7cfb9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ arch/sh/boards/board-espt.c | 1 -
+ arch/sh/boards/board-sh7757lcr.c | 4 ----
+ arch/sh/boards/mach-ecovec24/setup.c | 1 -
+ arch/sh/boards/mach-se/7724/setup.c | 1 -
+ arch/sh/boards/mach-sh7763rdp/setup.c | 1 -
+ arch/sh/kernel/cpu/sh2/setup-sh7619.c | 1 -
+ include/linux/sh_eth.h | 3 ---
+ 7 files changed, 12 deletions(-)
+
+diff --git a/arch/sh/boards/board-espt.c b/arch/sh/boards/board-espt.c
+index 7291e2f11a47..4d6be53058d6 100644
+--- a/arch/sh/boards/board-espt.c
++++ b/arch/sh/boards/board-espt.c
+@@ -79,7 +79,6 @@ static struct resource sh_eth_resources[] = {
+
+ static struct sh_eth_plat_data sh7763_eth_pdata = {
+ .phy = 0,
+- .edmac_endian = EDMAC_LITTLE_ENDIAN,
+ .phy_interface = PHY_INTERFACE_MODE_MII,
+ };
+
+diff --git a/arch/sh/boards/board-sh7757lcr.c b/arch/sh/boards/board-sh7757lcr.c
+index 0104c8199c48..1bde08dc067d 100644
+--- a/arch/sh/boards/board-sh7757lcr.c
++++ b/arch/sh/boards/board-sh7757lcr.c
+@@ -76,7 +76,6 @@ static struct resource sh_eth0_resources[] = {
+
+ static struct sh_eth_plat_data sh7757_eth0_pdata = {
+ .phy = 1,
+- .edmac_endian = EDMAC_LITTLE_ENDIAN,
+ .set_mdio_gate = sh7757_eth_set_mdio_gate,
+ };
+
+@@ -104,7 +103,6 @@ static struct resource sh_eth1_resources[] = {
+
+ static struct sh_eth_plat_data sh7757_eth1_pdata = {
+ .phy = 1,
+- .edmac_endian = EDMAC_LITTLE_ENDIAN,
+ .set_mdio_gate = sh7757_eth_set_mdio_gate,
+ };
+
+@@ -148,7 +146,6 @@ static struct resource sh_eth_giga0_resources[] = {
+
+ static struct sh_eth_plat_data sh7757_eth_giga0_pdata = {
+ .phy = 18,
+- .edmac_endian = EDMAC_LITTLE_ENDIAN,
+ .set_mdio_gate = sh7757_eth_giga_set_mdio_gate,
+ .phy_interface = PHY_INTERFACE_MODE_RGMII_ID,
+ };
+@@ -182,7 +179,6 @@ static struct resource sh_eth_giga1_resources[] = {
+
+ static struct sh_eth_plat_data sh7757_eth_giga1_pdata = {
+ .phy = 19,
+- .edmac_endian = EDMAC_LITTLE_ENDIAN,
+ .set_mdio_gate = sh7757_eth_giga_set_mdio_gate,
+ .phy_interface = PHY_INTERFACE_MODE_RGMII_ID,
+ };
+diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
+index 1faf6cb93dcb..6f929abe0b50 100644
+--- a/arch/sh/boards/mach-ecovec24/setup.c
++++ b/arch/sh/boards/mach-ecovec24/setup.c
+@@ -159,7 +159,6 @@ static struct resource sh_eth_resources[] = {
+
+ static struct sh_eth_plat_data sh_eth_plat = {
+ .phy = 0x1f, /* SMSC LAN8700 */
+- .edmac_endian = EDMAC_LITTLE_ENDIAN,
+ .phy_interface = PHY_INTERFACE_MODE_MII,
+ .ether_link_active_low = 1
+ };
+diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c
+index f1fecd395679..255952555656 100644
+--- a/arch/sh/boards/mach-se/7724/setup.c
++++ b/arch/sh/boards/mach-se/7724/setup.c
+@@ -374,7 +374,6 @@ static struct resource sh_eth_resources[] = {
+
+ static struct sh_eth_plat_data sh_eth_plat = {
+ .phy = 0x1f, /* SMSC LAN8187 */
+- .edmac_endian = EDMAC_LITTLE_ENDIAN,
+ .phy_interface = PHY_INTERFACE_MODE_MII,
+ };
+
+diff --git a/arch/sh/boards/mach-sh7763rdp/setup.c b/arch/sh/boards/mach-sh7763rdp/setup.c
+index 2c8fb04685d4..6e62686b81b1 100644
+--- a/arch/sh/boards/mach-sh7763rdp/setup.c
++++ b/arch/sh/boards/mach-sh7763rdp/setup.c
+@@ -87,7 +87,6 @@ static struct resource sh_eth_resources[] = {
+
+ static struct sh_eth_plat_data sh7763_eth_pdata = {
+ .phy = 1,
+- .edmac_endian = EDMAC_LITTLE_ENDIAN,
+ .phy_interface = PHY_INTERFACE_MODE_MII,
+ };
+
+diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+index 95796ad00fbe..d08db08dec38 100644
+--- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c
++++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+@@ -122,7 +122,6 @@ static struct platform_device scif2_device = {
+
+ static struct sh_eth_plat_data eth_platform_data = {
+ .phy = 1,
+- .edmac_endian = EDMAC_LITTLE_ENDIAN,
+ .phy_interface = PHY_INTERFACE_MODE_MII,
+ };
+
+diff --git a/include/linux/sh_eth.h b/include/linux/sh_eth.h
+index 94081e9a5010..6dfda97a6c1a 100644
+--- a/include/linux/sh_eth.h
++++ b/include/linux/sh_eth.h
+@@ -5,12 +5,9 @@
+ #include <linux/phy.h>
+ #include <linux/if_ether.h>
+
+-enum {EDMAC_LITTLE_ENDIAN};
+-
+ struct sh_eth_plat_data {
+ int phy;
+ int phy_irq;
+- int edmac_endian;
+ phy_interface_t phy_interface;
+ void (*set_mdio_gate)(void *addr);
+
+--
+2.19.0
+
diff --git a/patches/0478-sh_eth-gather-all-TSU-init-code-in-one-place.patch b/patches/0478-sh_eth-gather-all-TSU-init-code-in-one-place.patch
new file mode 100644
index 0000000..26abe9e
--- /dev/null
+++ b/patches/0478-sh_eth-gather-all-TSU-init-code-in-one-place.patch
@@ -0,0 +1,62 @@
+From f311c039bd50c16666bc7a558602d1f83b04bf71 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sun, 14 Jan 2018 20:47:43 +0300
+Subject: [PATCH 0478/1795] sh_eth: gather all TSU init code in one place
+
+The sh_eth_cpu_data::chip_reset() method always resets using ARSTR and
+this register is always located at the start of the TSU register region.
+Therefore, we can only call this method if we know TSU is there and thus
+simplify the probing code a bit...
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 3e14c969a4ecdb4b4a05fb5c806d4f525fe56cff)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/net/ethernet/renesas/sh_eth.c | 12 +++++-------
+ 1 file changed, 5 insertions(+), 7 deletions(-)
+
+diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
+index d7216bcace03..7a56c59476d6 100644
+--- a/drivers/net/ethernet/renesas/sh_eth.c
++++ b/drivers/net/ethernet/renesas/sh_eth.c
+@@ -3199,7 +3199,6 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
+ eth_hw_addr_random(ndev);
+ }
+
+- /* ioremap the TSU registers */
+ if (mdp->cd->tsu) {
+ struct resource *rtsu;
+
+@@ -3220,6 +3219,7 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
+ ret = -EBUSY;
+ goto out_release;
+ }
++ /* ioremap the TSU registers */
+ mdp->tsu_addr = devm_ioremap(&pdev->dev, rtsu->start,
+ resource_size(rtsu));
+ if (!mdp->tsu_addr) {
+@@ -3229,14 +3229,12 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
+ }
+ mdp->port = devno % 2;
+ ndev->features = NETIF_F_HW_VLAN_CTAG_FILTER;
+- }
+
+- /* Need to init only the first port of the two sharing a TSU */
+- if (devno % 2 == 0) {
+- if (mdp->cd->chip_reset)
+- mdp->cd->chip_reset(ndev);
++ /* Need to init only the first port of the two sharing a TSU */
++ if (devno % 2 == 0) {
++ if (mdp->cd->chip_reset)
++ mdp->cd->chip_reset(ndev);
+
+- if (mdp->cd->tsu) {
+ /* TSU init (Init only)*/
+ sh_eth_tsu_init(mdp);
+ }
+--
+2.19.0
+
diff --git a/patches/0479-sh_eth-get-Ether-port-only-when-needed.patch b/patches/0479-sh_eth-get-Ether-port-only-when-needed.patch
new file mode 100644
index 0000000..2a41aec
--- /dev/null
+++ b/patches/0479-sh_eth-get-Ether-port-only-when-needed.patch
@@ -0,0 +1,78 @@
+From b9465449b4bf3becd1713292c7908a9e642377e7 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sun, 14 Jan 2018 20:47:44 +0300
+Subject: [PATCH 0479/1795] sh_eth: get Ether port # only when needed
+
+The dual-port Ether configurations always have a shared TSU to e.g. pass
+the packets between those ports. With the TSU init. code gathered under
+the single *if*, we now can only get the port # from 'platform_device::id'
+only when we actually need it (and not recalculate it each time)...
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 9662ec19229c89825acac1d62a9d78fb89f8dda5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/net/ethernet/renesas/sh_eth.c | 13 +++++--------
+ 1 file changed, 5 insertions(+), 8 deletions(-)
+
+diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
+index 7a56c59476d6..f17cb74c03e9 100644
+--- a/drivers/net/ethernet/renesas/sh_eth.c
++++ b/drivers/net/ethernet/renesas/sh_eth.c
+@@ -3102,7 +3102,7 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
+ const struct platform_device_id *id = platform_get_device_id(pdev);
+ struct sh_eth_private *mdp;
+ struct net_device *ndev;
+- int ret, devno;
++ int ret;
+
+ /* get base addr */
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+@@ -3114,10 +3114,6 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
+ pm_runtime_enable(&pdev->dev);
+ pm_runtime_get_sync(&pdev->dev);
+
+- devno = pdev->id;
+- if (devno < 0)
+- devno = 0;
+-
+ ret = platform_get_irq(pdev, 0);
+ if (ret < 0)
+ goto out_release;
+@@ -3200,6 +3196,7 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
+ }
+
+ if (mdp->cd->tsu) {
++ int port = pdev->id < 0 ? 0 : pdev->id % 2;
+ struct resource *rtsu;
+
+ rtsu = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+@@ -3211,7 +3208,7 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
+ /* We can only request the TSU region for the first port
+ * of the two sharing this TSU for the probe to succeed...
+ */
+- if (devno % 2 == 0 &&
++ if (port == 0 &&
+ !devm_request_mem_region(&pdev->dev, rtsu->start,
+ resource_size(rtsu),
+ dev_name(&pdev->dev))) {
+@@ -3227,11 +3224,11 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
+ ret = -ENOMEM;
+ goto out_release;
+ }
+- mdp->port = devno % 2;
++ mdp->port = port;
+ ndev->features = NETIF_F_HW_VLAN_CTAG_FILTER;
+
+ /* Need to init only the first port of the two sharing a TSU */
+- if (devno % 2 == 0) {
++ if (port == 0) {
+ if (mdp->cd->chip_reset)
+ mdp->cd->chip_reset(ndev);
+
+--
+2.19.0
+
diff --git a/patches/0480-sh_eth-Remove-obsolete-explicit-clock-handling-for-W.patch b/patches/0480-sh_eth-Remove-obsolete-explicit-clock-handling-for-W.patch
new file mode 100644
index 0000000..bd7b543
--- /dev/null
+++ b/patches/0480-sh_eth-Remove-obsolete-explicit-clock-handling-for-W.patch
@@ -0,0 +1,104 @@
+From 90c9f12af837b6abfe59a523af195c77f699bcd7 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 12 Feb 2018 14:42:36 +0100
+Subject: [PATCH 0480/1795] sh_eth: Remove obsolete explicit clock handling for
+ WoL
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Currently, if Wake-on-LAN is enabled, the SH-ETH device's module clock
+is manually kept running during system suspend, to make sure the device
+stays active.
+
+Since commits 91c719f5ec6671f7 ("soc: renesas: rcar-sysc: Keep wakeup
+sources active during system suspend") and 744dddcae84441b1 ("clk:
+renesas: mstp: Keep wakeup sources active during system suspend"), this
+workaround is no longer needed. Hence remove all explicit clock
+handling to keep the device active.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Reviewed-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit b4580c952e89a332f077038ef19a7582950c082d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/net/ethernet/renesas/sh_eth.c | 18 +++---------------
+ 1 file changed, 3 insertions(+), 15 deletions(-)
+
+diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
+index f17cb74c03e9..cffd58af7c45 100644
+--- a/drivers/net/ethernet/renesas/sh_eth.c
++++ b/drivers/net/ethernet/renesas/sh_eth.c
+@@ -40,7 +40,6 @@
+ #include <linux/slab.h>
+ #include <linux/ethtool.h>
+ #include <linux/if_vlan.h>
+-#include <linux/clk.h>
+ #include <linux/sh_eth.h>
+ #include <linux/of_mdio.h>
+
+@@ -2281,7 +2280,7 @@ static void sh_eth_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
+ wol->supported = 0;
+ wol->wolopts = 0;
+
+- if (mdp->cd->magic && mdp->clk) {
++ if (mdp->cd->magic) {
+ wol->supported = WAKE_MAGIC;
+ wol->wolopts = mdp->wol_enabled ? WAKE_MAGIC : 0;
+ }
+@@ -2291,7 +2290,7 @@ static int sh_eth_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
+ {
+ struct sh_eth_private *mdp = netdev_priv(ndev);
+
+- if (!mdp->cd->magic || !mdp->clk || wol->wolopts & ~WAKE_MAGIC)
++ if (!mdp->cd->magic || wol->wolopts & ~WAKE_MAGIC)
+ return -EOPNOTSUPP;
+
+ mdp->wol_enabled = !!(wol->wolopts & WAKE_MAGIC);
+@@ -3130,11 +3129,6 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
+ goto out_release;
+ }
+
+- /* Get clock, if not found that's OK but Wake-On-Lan is unavailable */
+- mdp->clk = devm_clk_get(&pdev->dev, NULL);
+- if (IS_ERR(mdp->clk))
+- mdp->clk = NULL;
+-
+ ndev->base_addr = res->start;
+
+ spin_lock_init(&mdp->lock);
+@@ -3255,7 +3249,7 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
+ if (ret)
+ goto out_napi_del;
+
+- if (mdp->cd->magic && mdp->clk)
++ if (mdp->cd->magic)
+ device_set_wakeup_capable(&pdev->dev, 1);
+
+ /* print device information */
+@@ -3308,9 +3302,6 @@ static int sh_eth_wol_setup(struct net_device *ndev)
+ /* Enable MagicPacket */
+ sh_eth_modify(ndev, ECMR, ECMR_MPDE, ECMR_MPDE);
+
+- /* Increased clock usage so device won't be suspended */
+- clk_enable(mdp->clk);
+-
+ return enable_irq_wake(ndev->irq);
+ }
+
+@@ -3336,9 +3327,6 @@ static int sh_eth_wol_restore(struct net_device *ndev)
+ if (ret < 0)
+ return ret;
+
+- /* Restore clock usage count */
+- clk_disable(mdp->clk);
+-
+ return disable_irq_wake(ndev->irq);
+ }
+
+--
+2.19.0
+
diff --git a/patches/0481-sh_eth-uninline-TSU-register-accessors.patch b/patches/0481-sh_eth-uninline-TSU-register-accessors.patch
new file mode 100644
index 0000000..9739e98
--- /dev/null
+++ b/patches/0481-sh_eth-uninline-TSU-register-accessors.patch
@@ -0,0 +1,66 @@
+From af86024a481a94c4a02452ab29dfe47e0a31835d Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Tue, 27 Feb 2018 14:58:16 +0300
+Subject: [PATCH 0481/1795] sh_eth: uninline TSU register accessors
+
+We have uninlined the sh_eth_{read|write}() functions introduced in the
+commit 4a55530f38e ("net: sh_eth: modify the definitions of register").
+Now remove *inline* from sh_eth_tsu_{read|write}() as well and move
+these functions from the header to the driver itself. This saves 684
+more bytes of object code (ARM gcc 4.8.5)...
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 55ea874306ea28e6be9e07b7e89bbb9fb674e8eb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/net/ethernet/renesas/sh_eth.c | 11 +++++++++++
+ drivers/net/ethernet/renesas/sh_eth.h | 11 -----------
+ 2 files changed, 11 insertions(+), 11 deletions(-)
+
+diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
+index cffd58af7c45..4e2f46fa8353 100644
+--- a/drivers/net/ethernet/renesas/sh_eth.c
++++ b/drivers/net/ethernet/renesas/sh_eth.c
+@@ -439,6 +439,17 @@ static void sh_eth_modify(struct net_device *ndev, int enum_index, u32 clear,
+ enum_index);
+ }
+
++static void sh_eth_tsu_write(struct sh_eth_private *mdp, u32 data,
++ int enum_index)
++{
++ iowrite32(data, mdp->tsu_addr + mdp->reg_offset[enum_index]);
++}
++
++static u32 sh_eth_tsu_read(struct sh_eth_private *mdp, int enum_index)
++{
++ return ioread32(mdp->tsu_addr + mdp->reg_offset[enum_index]);
++}
++
+ static bool sh_eth_is_gether(struct sh_eth_private *mdp)
+ {
+ return mdp->reg_offset == sh_eth_offset_gigabit;
+diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h
+index 6ab3d46d4f28..fdd6d71c03d1 100644
+--- a/drivers/net/ethernet/renesas/sh_eth.h
++++ b/drivers/net/ethernet/renesas/sh_eth.h
+@@ -568,15 +568,4 @@ static inline void *sh_eth_tsu_get_offset(struct sh_eth_private *mdp,
+ return mdp->tsu_addr + mdp->reg_offset[enum_index];
+ }
+
+-static inline void sh_eth_tsu_write(struct sh_eth_private *mdp, u32 data,
+- int enum_index)
+-{
+- iowrite32(data, mdp->tsu_addr + mdp->reg_offset[enum_index]);
+-}
+-
+-static inline u32 sh_eth_tsu_read(struct sh_eth_private *mdp, int enum_index)
+-{
+- return ioread32(mdp->tsu_addr + mdp->reg_offset[enum_index]);
+-}
+-
+ #endif /* #ifndef __SH_ETH_H__ */
+--
+2.19.0
+
diff --git a/patches/0482-mmc-sh_mmcif-remove-redundant-initialization-of-opc.patch b/patches/0482-mmc-sh_mmcif-remove-redundant-initialization-of-opc.patch
new file mode 100644
index 0000000..4395741
--- /dev/null
+++ b/patches/0482-mmc-sh_mmcif-remove-redundant-initialization-of-opc.patch
@@ -0,0 +1,39 @@
+From 0014ec0a6b614c9bb2cd2e4ba1701a989bf1e9f7 Mon Sep 17 00:00:00 2001
+From: Colin Ian King <colin.king@canonical.com>
+Date: Wed, 17 Jan 2018 13:41:57 +0000
+Subject: [PATCH 0482/1795] mmc: sh_mmcif: remove redundant initialization of
+ 'opc'
+
+Variable opc is initialized with a value that is never read, opc
+is later re-assigned a newer value, hence the initialization can
+be removed.
+
+Cleans up clang warning:
+drivers/mmc/host/sh_mmcif.c:919:6: warning: Value stored to 'opc'
+during its initialization is never read
+
+Signed-off-by: Colin Ian King <colin.king@canonical.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit 659032dcb9f11c3bd2a3a23db76e6a70b3ddec79)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/mmc/host/sh_mmcif.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c
+index 53fb18bb7bee..7bb00c68a756 100644
+--- a/drivers/mmc/host/sh_mmcif.c
++++ b/drivers/mmc/host/sh_mmcif.c
+@@ -916,7 +916,7 @@ static void sh_mmcif_start_cmd(struct sh_mmcif_host *host,
+ struct mmc_request *mrq)
+ {
+ struct mmc_command *cmd = mrq->cmd;
+- u32 opc = cmd->opcode;
++ u32 opc;
+ u32 mask = 0;
+ unsigned long flags;
+
+--
+2.19.0
+
diff --git a/patches/0483-media-v4l-sh_mobile_ceu-Return-buffers-on-streamoff.patch b/patches/0483-media-v4l-sh_mobile_ceu-Return-buffers-on-streamoff.patch
new file mode 100644
index 0000000..c8b8baa
--- /dev/null
+++ b/patches/0483-media-v4l-sh_mobile_ceu-Return-buffers-on-streamoff.patch
@@ -0,0 +1,51 @@
+From 1a0db1b0acff0861fec8c2b242d5231f81a285bd Mon Sep 17 00:00:00 2001
+From: Jacopo Mondi <jacopo+renesas@jmondi.org>
+Date: Wed, 15 Nov 2017 12:59:12 -0500
+Subject: [PATCH 0483/1795] media: v4l: sh_mobile_ceu: Return buffers on
+ streamoff()
+
+videobuf2 core reports an error when not all buffers have been returned
+to the framework:
+
+drivers/media/v4l2-core/videobuf2-core.c:1651
+WARN_ON(atomic_read(&q->owned_by_drv_count))
+
+Fix this returning all buffers currently in capture queue.
+
+Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
+Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit 866a6eccdd998418065ff28fd280252bfa63e43c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c | 7 ++++++-
+ 1 file changed, 6 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c b/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
+index 36762ec954e7..9180a1d96acb 100644
+--- a/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
++++ b/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
+@@ -451,13 +451,18 @@ static void sh_mobile_ceu_stop_streaming(struct vb2_queue *q)
+ struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
+ struct sh_mobile_ceu_dev *pcdev = ici->priv;
+ struct list_head *buf_head, *tmp;
++ struct vb2_v4l2_buffer *vbuf;
+
+ spin_lock_irq(&pcdev->lock);
+
+ pcdev->active = NULL;
+
+- list_for_each_safe(buf_head, tmp, &pcdev->capture)
++ list_for_each_safe(buf_head, tmp, &pcdev->capture) {
++ vbuf = &list_entry(buf_head, struct sh_mobile_ceu_buffer,
++ queue)->vb;
++ vb2_buffer_done(&vbuf->vb2_buf, VB2_BUF_STATE_DONE);
+ list_del_init(buf_head);
++ }
+
+ spin_unlock_irq(&pcdev->lock);
+
+--
+2.19.0
+
diff --git a/patches/0484-pinctrl-sh-pfc-r8a7745-Add-CAN-01-support.patch b/patches/0484-pinctrl-sh-pfc-r8a7745-Add-CAN-01-support.patch
new file mode 100644
index 0000000..1483cb8
--- /dev/null
+++ b/patches/0484-pinctrl-sh-pfc-r8a7745-Add-CAN-01-support.patch
@@ -0,0 +1,199 @@
+From a456a4346b326c870d6b14ff12af2b2d29028f1d Mon Sep 17 00:00:00 2001
+From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Date: Tue, 7 Nov 2017 15:10:43 +0000
+Subject: [PATCH 0484/1795] pinctrl: sh-pfc: r8a7745: Add CAN[01] support
+
+This patch adds PFC CAN0 and CAN1 pin groups and functions, enabling CAN
+bus on the RZ/G1E.
+
+Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Reviewed-by: Biju Das <biju.das@bp.renesas.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 3f35221842305e82494e10fcfc1f5750c8bc682a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7794.c | 146 +++++++++++++++++++++++++++
+ 1 file changed, 146 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7794.c b/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
+index 333a3470e842..e5b3d5fa4aa0 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
+@@ -1608,6 +1608,116 @@ static const unsigned int avb_gmii_mux[] = {
+ AVB_TX_EN_MARK, AVB_TX_ER_MARK, AVB_TX_CLK_MARK,
+ AVB_COL_MARK,
+ };
++
++/* - CAN -------------------------------------------------------------------- */
++static const unsigned int can0_data_pins[] = {
++ /* TX, RX */
++ RCAR_GP_PIN(6, 15), RCAR_GP_PIN(6, 14),
++};
++
++static const unsigned int can0_data_mux[] = {
++ CAN0_TX_MARK, CAN0_RX_MARK,
++};
++
++static const unsigned int can0_data_b_pins[] = {
++ /* TX, RX */
++ RCAR_GP_PIN(3, 16), RCAR_GP_PIN(3, 15),
++};
++
++static const unsigned int can0_data_b_mux[] = {
++ CAN0_TX_B_MARK, CAN0_RX_B_MARK,
++};
++
++static const unsigned int can0_data_c_pins[] = {
++ /* TX, RX */
++ RCAR_GP_PIN(2, 17), RCAR_GP_PIN(2, 16),
++};
++
++static const unsigned int can0_data_c_mux[] = {
++ CAN0_TX_C_MARK, CAN0_RX_C_MARK,
++};
++
++static const unsigned int can0_data_d_pins[] = {
++ /* TX, RX */
++ RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 11),
++};
++
++static const unsigned int can0_data_d_mux[] = {
++ CAN0_TX_D_MARK, CAN0_RX_D_MARK,
++};
++
++static const unsigned int can1_data_pins[] = {
++ /* TX, RX */
++ RCAR_GP_PIN(6, 25), RCAR_GP_PIN(6, 24),
++};
++
++static const unsigned int can1_data_mux[] = {
++ CAN1_TX_MARK, CAN1_RX_MARK,
++};
++
++static const unsigned int can1_data_b_pins[] = {
++ /* TX, RX */
++ RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 1),
++};
++
++static const unsigned int can1_data_b_mux[] = {
++ CAN1_TX_B_MARK, CAN1_RX_B_MARK,
++};
++
++static const unsigned int can1_data_c_pins[] = {
++ /* TX, RX */
++ RCAR_GP_PIN(5, 6), RCAR_GP_PIN(5, 5),
++};
++
++static const unsigned int can1_data_c_mux[] = {
++ CAN1_TX_C_MARK, CAN1_RX_C_MARK,
++};
++
++static const unsigned int can1_data_d_pins[] = {
++ /* TX, RX */
++ RCAR_GP_PIN(3, 31), RCAR_GP_PIN(3, 30),
++};
++
++static const unsigned int can1_data_d_mux[] = {
++ CAN1_TX_D_MARK, CAN1_RX_D_MARK,
++};
++
++static const unsigned int can_clk_pins[] = {
++ /* CLK */
++ RCAR_GP_PIN(3, 31),
++};
++
++static const unsigned int can_clk_mux[] = {
++ CAN_CLK_MARK,
++};
++
++static const unsigned int can_clk_b_pins[] = {
++ /* CLK */
++ RCAR_GP_PIN(1, 23),
++};
++
++static const unsigned int can_clk_b_mux[] = {
++ CAN_CLK_B_MARK,
++};
++
++static const unsigned int can_clk_c_pins[] = {
++ /* CLK */
++ RCAR_GP_PIN(1, 0),
++};
++
++static const unsigned int can_clk_c_mux[] = {
++ CAN_CLK_C_MARK,
++};
++
++static const unsigned int can_clk_d_pins[] = {
++ /* CLK */
++ RCAR_GP_PIN(5, 0),
++};
++
++static const unsigned int can_clk_d_mux[] = {
++ CAN_CLK_D_MARK,
++};
++
+ /* - DU --------------------------------------------------------------------- */
+ static const unsigned int du0_rgb666_pins[] = {
+ /* R[7:2], G[7:2], B[7:2] */
+@@ -3459,6 +3569,18 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(avb_mdio),
+ SH_PFC_PIN_GROUP(avb_mii),
+ SH_PFC_PIN_GROUP(avb_gmii),
++ SH_PFC_PIN_GROUP(can0_data),
++ SH_PFC_PIN_GROUP(can0_data_b),
++ SH_PFC_PIN_GROUP(can0_data_c),
++ SH_PFC_PIN_GROUP(can0_data_d),
++ SH_PFC_PIN_GROUP(can1_data),
++ SH_PFC_PIN_GROUP(can1_data_b),
++ SH_PFC_PIN_GROUP(can1_data_c),
++ SH_PFC_PIN_GROUP(can1_data_d),
++ SH_PFC_PIN_GROUP(can_clk),
++ SH_PFC_PIN_GROUP(can_clk_b),
++ SH_PFC_PIN_GROUP(can_clk_c),
++ SH_PFC_PIN_GROUP(can_clk_d),
+ SH_PFC_PIN_GROUP(du0_rgb666),
+ SH_PFC_PIN_GROUP(du0_rgb888),
+ SH_PFC_PIN_GROUP(du0_clk0_out),
+@@ -3731,6 +3853,28 @@ static const char * const avb_groups[] = {
+ "avb_gmii",
+ };
+
++static const char * const can0_groups[] = {
++ "can0_data",
++ "can0_data_b",
++ "can0_data_c",
++ "can0_data_d",
++ "can_clk",
++ "can_clk_b",
++ "can_clk_c",
++ "can_clk_d",
++};
++
++static const char * const can1_groups[] = {
++ "can1_data",
++ "can1_data_b",
++ "can1_data_c",
++ "can1_data_d",
++ "can_clk",
++ "can_clk_b",
++ "can_clk_c",
++ "can_clk_d",
++};
++
+ static const char * const du0_groups[] = {
+ "du0_rgb666",
+ "du0_rgb888",
+@@ -4102,6 +4246,8 @@ static const char * const vin1_groups[] = {
+ static const struct sh_pfc_function pinmux_functions[] = {
+ SH_PFC_FUNCTION(audio_clk),
+ SH_PFC_FUNCTION(avb),
++ SH_PFC_FUNCTION(can0),
++ SH_PFC_FUNCTION(can1),
+ SH_PFC_FUNCTION(du0),
+ SH_PFC_FUNCTION(du1),
+ SH_PFC_FUNCTION(eth),
+--
+2.19.0
+
diff --git a/patches/0485-pinctrl-sh-pfc-r8a7795-Add-CAN-support.patch b/patches/0485-pinctrl-sh-pfc-r8a7795-Add-CAN-support.patch
new file mode 100644
index 0000000..116169e
--- /dev/null
+++ b/patches/0485-pinctrl-sh-pfc-r8a7795-Add-CAN-support.patch
@@ -0,0 +1,105 @@
+From fac8feab0c97ae451fa002343583bff4725d3f9d Mon Sep 17 00:00:00 2001
+From: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
+Date: Fri, 10 Nov 2017 13:58:49 +0000
+Subject: [PATCH 0485/1795] pinctrl: sh-pfc: r8a7795: Add CAN support
+
+This patch adds CAN[0-1] pinmux support for R-Car H3 ES2.0. The pin
+config is identical to H3 ES1.*.
+
+Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
+Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit a678abfee7ab5d2dcfc2079158ec799c7f4cf204)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 52 ++++++++++++++++++++++++++++
+ 1 file changed, 52 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+index d1cec6d12e81..59249a990cef 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+@@ -1781,6 +1781,38 @@ static const unsigned int avb_avtp_capture_b_mux[] = {
+ AVB_AVTP_CAPTURE_B_MARK,
+ };
+
++/* - CAN ------------------------------------------------------------------ */
++static const unsigned int can0_data_a_pins[] = {
++ /* TX, RX */
++ RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24),
++};
++static const unsigned int can0_data_a_mux[] = {
++ CAN0_TX_A_MARK, CAN0_RX_A_MARK,
++};
++static const unsigned int can0_data_b_pins[] = {
++ /* TX, RX */
++ RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1),
++};
++static const unsigned int can0_data_b_mux[] = {
++ CAN0_TX_B_MARK, CAN0_RX_B_MARK,
++};
++static const unsigned int can1_data_pins[] = {
++ /* TX, RX */
++ RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 26),
++};
++static const unsigned int can1_data_mux[] = {
++ CAN1_TX_MARK, CAN1_RX_MARK,
++};
++
++/* - CAN Clock -------------------------------------------------------------- */
++static const unsigned int can_clk_pins[] = {
++ /* CLK */
++ RCAR_GP_PIN(1, 25),
++};
++static const unsigned int can_clk_mux[] = {
++ CAN_CLK_MARK,
++};
++
+ /* - DRIF0 --------------------------------------------------------------- */
+ static const unsigned int drif0_ctrl_a_pins[] = {
+ /* CLK, SYNC */
+@@ -3843,6 +3875,10 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(avb_avtp_capture_a),
+ SH_PFC_PIN_GROUP(avb_avtp_match_b),
+ SH_PFC_PIN_GROUP(avb_avtp_capture_b),
++ SH_PFC_PIN_GROUP(can0_data_a),
++ SH_PFC_PIN_GROUP(can0_data_b),
++ SH_PFC_PIN_GROUP(can1_data),
++ SH_PFC_PIN_GROUP(can_clk),
+ SH_PFC_PIN_GROUP(drif0_ctrl_a),
+ SH_PFC_PIN_GROUP(drif0_data0_a),
+ SH_PFC_PIN_GROUP(drif0_data1_a),
+@@ -4154,6 +4190,19 @@ static const char * const avb_groups[] = {
+ "avb_avtp_capture_b",
+ };
+
++static const char * const can0_groups[] = {
++ "can0_data_a",
++ "can0_data_b",
++};
++
++static const char * const can1_groups[] = {
++ "can1_data",
++};
++
++static const char * const can_clk_groups[] = {
++ "can_clk",
++};
++
+ static const char * const drif0_groups[] = {
+ "drif0_ctrl_a",
+ "drif0_data0_a",
+@@ -4559,6 +4608,9 @@ static const char * const usb30_groups[] = {
+ static const struct sh_pfc_function pinmux_functions[] = {
+ SH_PFC_FUNCTION(audio_clk),
+ SH_PFC_FUNCTION(avb),
++ SH_PFC_FUNCTION(can0),
++ SH_PFC_FUNCTION(can1),
++ SH_PFC_FUNCTION(can_clk),
+ SH_PFC_FUNCTION(drif0),
+ SH_PFC_FUNCTION(drif1),
+ SH_PFC_FUNCTION(drif2),
+--
+2.19.0
+
diff --git a/patches/0486-pinctrl-sh-pfc-r8a7795-Add-CAN-FD-support.patch b/patches/0486-pinctrl-sh-pfc-r8a7795-Add-CAN-FD-support.patch
new file mode 100644
index 0000000..0426ea8
--- /dev/null
+++ b/patches/0486-pinctrl-sh-pfc-r8a7795-Add-CAN-FD-support.patch
@@ -0,0 +1,90 @@
+From a1fe3648730f5085c2f66d8951f4a672dac7a601 Mon Sep 17 00:00:00 2001
+From: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
+Date: Fri, 10 Nov 2017 13:58:50 +0000
+Subject: [PATCH 0486/1795] pinctrl: sh-pfc: r8a7795: Add CAN FD support
+
+This patch adds CAN FD[0-1] pinmux support for R-Car H3 ES2.0. The pin
+config is identical to H3 ES1.*.
+
+Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
+Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 0e1c7a94c6def25fa2458ad4577b0b9b40443c3b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 37 ++++++++++++++++++++++++++++
+ 1 file changed, 37 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+index 59249a990cef..34a2dc471e5a 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+@@ -1813,6 +1813,29 @@ static const unsigned int can_clk_mux[] = {
+ CAN_CLK_MARK,
+ };
+
++/* - CAN FD --------------------------------------------------------------- */
++static const unsigned int canfd0_data_a_pins[] = {
++ /* TX, RX */
++ RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24),
++};
++static const unsigned int canfd0_data_a_mux[] = {
++ CANFD0_TX_A_MARK, CANFD0_RX_A_MARK,
++};
++static const unsigned int canfd0_data_b_pins[] = {
++ /* TX, RX */
++ RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1),
++};
++static const unsigned int canfd0_data_b_mux[] = {
++ CANFD0_TX_B_MARK, CANFD0_RX_B_MARK,
++};
++static const unsigned int canfd1_data_pins[] = {
++ /* TX, RX */
++ RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 26),
++};
++static const unsigned int canfd1_data_mux[] = {
++ CANFD1_TX_MARK, CANFD1_RX_MARK,
++};
++
+ /* - DRIF0 --------------------------------------------------------------- */
+ static const unsigned int drif0_ctrl_a_pins[] = {
+ /* CLK, SYNC */
+@@ -3879,6 +3902,9 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(can0_data_b),
+ SH_PFC_PIN_GROUP(can1_data),
+ SH_PFC_PIN_GROUP(can_clk),
++ SH_PFC_PIN_GROUP(canfd0_data_a),
++ SH_PFC_PIN_GROUP(canfd0_data_b),
++ SH_PFC_PIN_GROUP(canfd1_data),
+ SH_PFC_PIN_GROUP(drif0_ctrl_a),
+ SH_PFC_PIN_GROUP(drif0_data0_a),
+ SH_PFC_PIN_GROUP(drif0_data1_a),
+@@ -4203,6 +4229,15 @@ static const char * const can_clk_groups[] = {
+ "can_clk",
+ };
+
++static const char * const canfd0_groups[] = {
++ "canfd0_data_a",
++ "canfd0_data_b",
++};
++
++static const char * const canfd1_groups[] = {
++ "canfd1_data",
++};
++
+ static const char * const drif0_groups[] = {
+ "drif0_ctrl_a",
+ "drif0_data0_a",
+@@ -4611,6 +4646,8 @@ static const struct sh_pfc_function pinmux_functions[] = {
+ SH_PFC_FUNCTION(can0),
+ SH_PFC_FUNCTION(can1),
+ SH_PFC_FUNCTION(can_clk),
++ SH_PFC_FUNCTION(canfd0),
++ SH_PFC_FUNCTION(canfd1),
+ SH_PFC_FUNCTION(drif0),
+ SH_PFC_FUNCTION(drif1),
+ SH_PFC_FUNCTION(drif2),
+--
+2.19.0
+
diff --git a/patches/0487-pinctrl-sh-pfc-Add-PORT_GP_CFG_-6-22-helper-macros.patch b/patches/0487-pinctrl-sh-pfc-Add-PORT_GP_CFG_-6-22-helper-macros.patch
new file mode 100644
index 0000000..f97cdf8
--- /dev/null
+++ b/patches/0487-pinctrl-sh-pfc-Add-PORT_GP_CFG_-6-22-helper-macros.patch
@@ -0,0 +1,62 @@
+From ea706063ca81a887b331105bbdf5142288077c7a Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 10 Nov 2017 20:59:00 +0300
+Subject: [PATCH 0487/1795] pinctrl: sh-pfc: Add PORT_GP_CFG_{6|22}() helper
+ macros
+
+They follow the style of the existing PORT_GP_CFG_<n>() macros and
+will be used by a follow-up patch for the R8A77970 SoC.
+
+Based on the original (and large) patch by Daisuke Matsushita
+<daisuke.matsushita.ns@hitachi.com>.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 5a0e698876479b71de885fdc181c00ecee5a61a9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ drivers/pinctrl/sh-pfc/sh_pfc.h | 16 ++++++++++++----
+ 1 file changed, 12 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
+index 213108a058fe..efe07bcca8d0 100644
+--- a/drivers/pinctrl/sh-pfc/sh_pfc.h
++++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
+@@ -389,10 +389,14 @@ extern const struct sh_pfc_soc_info shx3_pinmux_info;
+ PORT_GP_CFG_1(bank, 3, fn, sfx, cfg)
+ #define PORT_GP_4(bank, fn, sfx) PORT_GP_CFG_4(bank, fn, sfx, 0)
+
+-#define PORT_GP_CFG_8(bank, fn, sfx, cfg) \
++#define PORT_GP_CFG_6(bank, fn, sfx, cfg) \
+ PORT_GP_CFG_4(bank, fn, sfx, cfg), \
+ PORT_GP_CFG_1(bank, 4, fn, sfx, cfg), \
+- PORT_GP_CFG_1(bank, 5, fn, sfx, cfg), \
++ PORT_GP_CFG_1(bank, 5, fn, sfx, cfg)
++#define PORT_GP_6(bank, fn, sfx) PORT_GP_CFG_6(bank, fn, sfx, 0)
++
++#define PORT_GP_CFG_8(bank, fn, sfx, cfg) \
++ PORT_GP_CFG_6(bank, fn, sfx, cfg), \
+ PORT_GP_CFG_1(bank, 6, fn, sfx, cfg), \
+ PORT_GP_CFG_1(bank, 7, fn, sfx, cfg)
+ #define PORT_GP_8(bank, fn, sfx) PORT_GP_CFG_8(bank, fn, sfx, 0)
+@@ -450,9 +454,13 @@ extern const struct sh_pfc_soc_info shx3_pinmux_info;
+ PORT_GP_CFG_1(bank, 20, fn, sfx, cfg)
+ #define PORT_GP_21(bank, fn, sfx) PORT_GP_CFG_21(bank, fn, sfx, 0)
+
+-#define PORT_GP_CFG_23(bank, fn, sfx, cfg) \
++#define PORT_GP_CFG_22(bank, fn, sfx, cfg) \
+ PORT_GP_CFG_21(bank, fn, sfx, cfg), \
+- PORT_GP_CFG_1(bank, 21, fn, sfx, cfg), \
++ PORT_GP_CFG_1(bank, 21, fn, sfx, cfg)
++#define PORT_GP_22(bank, fn, sfx) PORT_GP_CFG_22(bank, fn, sfx, 0)
++
++#define PORT_GP_CFG_23(bank, fn, sfx, cfg) \
++ PORT_GP_CFG_22(bank, fn, sfx, cfg), \
+ PORT_GP_CFG_1(bank, 22, fn, sfx, cfg)
+ #define PORT_GP_23(bank, fn, sfx) PORT_GP_CFG_23(bank, fn, sfx, 0)
+
+--
+2.19.0
+
diff --git a/patches/0488-pinctrl-sh-pfc-Add-R8A77970-PFC-support.patch b/patches/0488-pinctrl-sh-pfc-Add-R8A77970-PFC-support.patch
new file mode 100644
index 0000000..c430a57
--- /dev/null
+++ b/patches/0488-pinctrl-sh-pfc-Add-R8A77970-PFC-support.patch
@@ -0,0 +1,2438 @@
+From 290e5355e1d7496c295761d2bb8a6b0683cd8a0a Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 10 Nov 2017 20:59:01 +0300
+Subject: [PATCH 0488/1795] pinctrl: sh-pfc: Add R8A77970 PFC support
+
+Add the PFC support for the R8A77970 SoC including pin groups for some
+on-chip devices such as CAN-FD, [H]SCIF, I2C, INTC-EX, MMC, MSIOF, PWM,
+VIN...
+
+Based on the original (and large) patch by Daisuke Matsushita
+<daisuke.matsushita.ns@hitachi.com>.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Acked-by: Rob Herring <robh@kernel.org>
+[geert: Drop EtherAVB for now]
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+
+(cherry picked from commit b92ac66a1819602b1427ac72d4a70c10ba7640ad)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+---
+ .../bindings/pinctrl/renesas,pfc-pinctrl.txt | 1 +
+ drivers/pinctrl/sh-pfc/Kconfig | 5 +
+ drivers/pinctrl/sh-pfc/Makefile | 1 +
+ drivers/pinctrl/sh-pfc/core.c | 6 +
+ drivers/pinctrl/sh-pfc/pfc-r8a77970.c | 2329 +++++++++++++++++
+ drivers/pinctrl/sh-pfc/sh_pfc.h | 1 +
+ 6 files changed, 2343 insertions(+)
+ create mode 100644 drivers/pinctrl/sh-pfc/pfc-r8a77970.c
+
+diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
+index 9b4f8041c36a..bb1790e0b176 100644
+--- a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
++++ b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
+@@ -24,6 +24,7 @@ Required Properties:
+ - "renesas,pfc-r8a7794": for R8A7794 (R-Car E2) compatible pin-controller.
+ - "renesas,pfc-r8a7795": for R8A7795 (R-Car H3) compatible pin-controller.
+ - "renesas,pfc-r8a7796": for R8A7796 (R-Car M3-W) compatible pin-controller.
++ - "renesas,pfc-r8a77970": for R8A77970 (R-Car V3M) compatible pin-controller.
+ - "renesas,pfc-r8a77995": for R8A77995 (R-Car D3) compatible pin-controller.
+ - "renesas,pfc-sh73a0": for SH73A0 (SH-Mobile AG5) compatible pin-controller.
+
+diff --git a/drivers/pinctrl/sh-pfc/Kconfig b/drivers/pinctrl/sh-pfc/Kconfig
+index 5d5312eb7102..4ed3761418f9 100644
+--- a/drivers/pinctrl/sh-pfc/Kconfig
++++ b/drivers/pinctrl/sh-pfc/Kconfig
+@@ -89,6 +89,11 @@ config PINCTRL_PFC_R8A7796
+ depends on ARCH_R8A7796
+ select PINCTRL_SH_PFC
+
++config PINCTRL_PFC_R8A77970
++ def_bool y
++ depends on ARCH_R8A77970
++ select PINCTRL_SH_PFC
++
+ config PINCTRL_PFC_R8A77995
+ def_bool y
+ depends on ARCH_R8A77995
+diff --git a/drivers/pinctrl/sh-pfc/Makefile b/drivers/pinctrl/sh-pfc/Makefile
+index a7903904b64e..22e758ce1fc2 100644
+--- a/drivers/pinctrl/sh-pfc/Makefile
++++ b/drivers/pinctrl/sh-pfc/Makefile
+@@ -16,6 +16,7 @@ obj-$(CONFIG_PINCTRL_PFC_R8A7794) += pfc-r8a7794.o
+ obj-$(CONFIG_PINCTRL_PFC_R8A7795) += pfc-r8a7795.o
+ obj-$(CONFIG_PINCTRL_PFC_R8A7795) += pfc-r8a7795-es1.o
+ obj-$(CONFIG_PINCTRL_PFC_R8A7796) += pfc-r8a7796.o
++obj-$(CONFIG_PINCTRL_PFC_R8A77970) += pfc-r8a77970.o
+ obj-$(CONFIG_PINCTRL_PFC_R8A77995) += pfc-r8a77995.o
+ obj-$(CONFIG_PINCTRL_PFC_SH7203) += pfc-sh7203.o
+ obj-$(CONFIG_PINCTRL_PFC_SH7264) += pfc-sh7264.o
+diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
+index cf4ae4bc9115..e9eb7a7c6fac 100644
+--- a/drivers/pinctrl/sh-pfc/core.c
++++ b/drivers/pinctrl/sh-pfc/core.c
+@@ -557,6 +557,12 @@ static const struct of_device_id sh_pfc_of_table[] = {
+ .data = &r8a7796_pinmux_info,
+ },
+ #endif
++#ifdef CONFIG_PINCTRL_PFC_R8A77970
++ {
++ .compatible = "renesas,pfc-r8a77970",
++ .data = &r8a77970_pinmux_info,
++ },
++#endif
+ #ifdef CONFIG_PINCTRL_PFC_R8A77995
+ {
+ .compatible = "renesas,pfc-r8a77995",
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77970.c b/drivers/pinctrl/sh-pfc/pfc-r8a77970.c
+new file mode 100644
+index 000000000000..794f12d74449
+--- /dev/null
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a77970.c
+@@ -0,0 +1,2329 @@
++/*
++ * R8A77970 processor support - PFC hardware block.
++ *
++ * Copyright (C) 2016 Renesas Electronics Corp.
++ * Copyright (C) 2017 Cogent Embedded, Inc. <source@cogentembedded.com>
++ *
++ * This file is based on the drivers/pinctrl/sh-pfc/pfc-r8a7795.c
++ *
++ * R-Car Gen3 processor support - PFC hardware block.
++ *
++ * Copyright (C) 2015 Renesas Electronics Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; version 2 of the License.
++ */
++
++#include <linux/io.h>
++#include <linux/kernel.h>
++
++#include "core.h"
++#include "sh_pfc.h"
++
++#define CPU_ALL_PORT(fn, sfx) \
++ PORT_GP_CFG_22(0, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH), \
++ PORT_GP_CFG_28(1, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH), \
++ PORT_GP_CFG_17(2, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH), \
++ PORT_GP_CFG_17(3, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH), \
++ PORT_GP_CFG_6(4, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH), \
++ PORT_GP_CFG_15(5, fn, sfx, SH_PFC_PIN_CFG_DRIVE_STRENGTH)
++/*
++ * F_() : just information
++ * FM() : macro for FN_xxx / xxx_MARK
++ */
++
++/* GPSR0 */
++#define GPSR0_21 F_(DU_EXODDF_DU_ODDF_DISP_CDE, IP2_23_20)
++#define GPSR0_20 F_(DU_EXVSYNC_DU_VSYNC, IP2_19_16)
++#define GPSR0_19 F_(DU_EXHSYNC_DU_HSYNC, IP2_15_12)
++#define GPSR0_18 F_(DU_DOTCLKOUT, IP2_11_8)
++#define GPSR0_17 F_(DU_DB7, IP2_7_4)
++#define GPSR0_16 F_(DU_DB6, IP2_3_0)
++#define GPSR0_15 F_(DU_DB5, IP1_31_28)
++#define GPSR0_14 F_(DU_DB4, IP1_27_24)
++#define GPSR0_13 F_(DU_DB3, IP1_23_20)
++#define GPSR0_12 F_(DU_DB2, IP1_19_16)
++#define GPSR0_11 F_(DU_DG7, IP1_15_12)
++#define GPSR0_10 F_(DU_DG6, IP1_11_8)
++#define GPSR0_9 F_(DU_DG5, IP1_7_4)
++#define GPSR0_8 F_(DU_DG4, IP1_3_0)
++#define GPSR0_7 F_(DU_DG3, IP0_31_28)
++#define GPSR0_6 F_(DU_DG2, IP0_27_24)
++#define GPSR0_5 F_(DU_DR7, IP0_23_20)
++#define GPSR0_4 F_(DU_DR6, IP0_19_16)
++#define GPSR0_3 F_(DU_DR5, IP0_15_12)
++#define GPSR0_2 F_(DU_DR4, IP0_11_8)
++#define GPSR0_1 F_(DU_DR3, IP0_7_4)
++#define GPSR0_0 F_(DU_DR2, IP0_3_0)
++
++/* GPSR1 */
++#define GPSR1_27 F_(DIGRF_CLKOUT, IP8_27_24)
++#define GPSR1_26 F_(DIGRF_CLKIN, IP8_23_20)
++#define GPSR1_25 F_(CANFD_CLK_A, IP8_19_16)
++#define GPSR1_24 F_(CANFD1_RX, IP8_15_12)
++#define GPSR1_23 F_(CANFD1_TX, IP8_11_8)
++#define GPSR1_22 F_(CANFD0_RX_A, IP8_7_4)
++#define GPSR1_21 F_(CANFD0_TX_A, IP8_3_0)
++#define GPSR1_20 F_(AVB0_AVTP_CAPTURE, IP7_31_28)
++#define GPSR1_19 FM(AVB0_AVTP_MATCH)
++#define GPSR1_18 FM(AVB0_LINK)
++#define GPSR1_17 FM(AVB0_PHY_INT)
++#define GPSR1_16 FM(AVB0_MAGIC)
++#define GPSR1_15 FM(AVB0_MDC)
++#define GPSR1_14 FM(AVB0_MDIO)
++#define GPSR1_13 FM(AVB0_TXCREFCLK)
++#define GPSR1_12 FM(AVB0_TD3)
++#define GPSR1_11 FM(AVB0_TD2)
++#define GPSR1_10 FM(AVB0_TD1)
++#define GPSR1_9 FM(AVB0_TD0)
++#define GPSR1_8 FM(AVB0_TXC)
++#define GPSR1_7 FM(AVB0_TX_CTL)
++#define GPSR1_6 FM(AVB0_RD3)
++#define GPSR1_5 FM(AVB0_RD2)
++#define GPSR1_4 FM(AVB0_RD1)
++#define GPSR1_3 FM(AVB0_RD0)
++#define GPSR1_2 FM(AVB0_RXC)
++#define GPSR1_1 FM(AVB0_RX_CTL)
++#define GPSR1_0 F_(IRQ0, IP2_27_24)
++
++/* GPSR2 */
++#define GPSR2_16 F_(VI0_FIELD, IP4_31_28)
++#define GPSR2_15 F_(VI0_DATA11, IP4_27_24)
++#define GPSR2_14 F_(VI0_DATA10, IP4_23_20)
++#define GPSR2_13 F_(VI0_DATA9, IP4_19_16)
++#define GPSR2_12 F_(VI0_DATA8, IP4_15_12)
++#define GPSR2_11 F_(VI0_DATA7, IP4_11_8)
++#define GPSR2_10 F_(VI0_DATA6, IP4_7_4)
++#define GPSR2_9 F_(VI0_DATA5, IP4_3_0)
++#define GPSR2_8 F_(VI0_DATA4, IP3_31_28)
++#define GPSR2_7 F_(VI0_DATA3, IP3_27_24)
++#define GPSR2_6 F_(VI0_DATA2, IP3_23_20)
++#define GPSR2_5 F_(VI0_DATA1, IP3_19_16)
++#define GPSR2_4 F_(VI0_DATA0, IP3_15_12)
++#define GPSR2_3 F_(VI0_VSYNC_N, IP3_11_8)
++#define GPSR2_2 F_(VI0_HSYNC_N, IP3_7_4)
++#define GPSR2_1 F_(VI0_CLKENB, IP3_3_0)
++#define GPSR2_0 F_(VI0_CLK, IP2_31_28)
++
++/* GPSR3 */
++#define GPSR3_16 F_(VI1_FIELD, IP7_3_0)
++#define GPSR3_15 F_(VI1_DATA11, IP6_31_28)
++#define GPSR3_14 F_(VI1_DATA10, IP6_27_24)
++#define GPSR3_13 F_(VI1_DATA9, IP6_23_20)
++#define GPSR3_12 F_(VI1_DATA8, IP6_19_16)
++#define GPSR3_11 F_(VI1_DATA7, IP6_15_12)
++#define GPSR3_10 F_(VI1_DATA6, IP6_11_8)
++#define GPSR3_9 F_(VI1_DATA5, IP6_7_4)
++#define GPSR3_8 F_(VI1_DATA4, IP6_3_0)
++#define GPSR3_7 F_(VI1_DATA3, IP5_31_28)
++#define GPSR3_6 F_(VI1_DATA2, IP5_27_24)
++#define GPSR3_5 F_(VI1_DATA1, IP5_23_20)
++#define GPSR3_4 F_(VI1_DATA0, IP5_19_16)
++#define GPSR3_3 F_(VI1_VSYNC_N, IP5_15_12)
++#define GPSR3_2 F_(VI1_HSYNC_N, IP5_11_8)
++#define GPSR3_1 F_(VI1_CLKENB, IP5_7_4)
++#define GPSR3_0 F_(VI1_CLK, IP5_3_0)
++
++/* GPSR4 */
++#define GPSR4_5 F_(SDA2, IP7_27_24)
++#define GPSR4_4 F_(SCL2, IP7_23_20)
++#define GPSR4_3 F_(SDA1, IP7_19_16)
++#define GPSR4_2 F_(SCL1, IP7_15_12)
++#define GPSR4_1 F_(SDA0, IP7_11_8)
++#define GPSR4_0 F_(SCL0, IP7_7_4)
++
++/* GPSR5 */
++#define GPSR5_14 FM(RPC_INT_N)
++#define GPSR5_13 FM(RPC_WP_N)
++#define GPSR5_12 FM(RPC_RESET_N)
++#define GPSR5_11 FM(QSPI1_SSL)
++#define GPSR5_10 FM(QSPI1_IO3)
++#define GPSR5_9 FM(QSPI1_IO2)
++#define GPSR5_8 FM(QSPI1_MISO_IO1)
++#define GPSR5_7 FM(QSPI1_MOSI_IO0)
++#define GPSR5_6 FM(QSPI1_SPCLK)
++#define GPSR5_5 FM(QSPI0_SSL)
++#define GPSR5_4 FM(QSPI0_IO3)
++#define GPSR5_3 FM(QSPI0_IO2)
++#define GPSR5_2 FM(QSPI0_MISO_IO1)
++#define GPSR5_1 FM(QSPI0_MOSI_IO0)
++#define GPSR5_0 FM(QSPI0_SPCLK)
++
++
++/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 - F */
++#define IP0_3_0 FM(DU_DR2) FM(HSCK0) F_(0, 0) FM(A0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP0_7_4 FM(DU_DR3) FM(HRTS0_N) F_(0, 0) FM(A1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP0_11_8 FM(DU_DR4) FM(HCTS0_N) F_(0, 0) FM(A2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP0_15_12 FM(DU_DR5) FM(HTX0) F_(0, 0) FM(A3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP0_19_16 FM(DU_DR6) FM(MSIOF3_RXD) F_(0, 0) FM(A4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP0_23_20 FM(DU_DR7) FM(MSIOF3_TXD) F_(0, 0) FM(A5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP0_27_24 FM(DU_DG2) FM(MSIOF3_SS1) F_(0, 0) FM(A6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP0_31_28 FM(DU_DG3) FM(MSIOF3_SS2) F_(0, 0) FM(A7) FM(PWMFSW0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP1_3_0 FM(DU_DG4) F_(0, 0) F_(0, 0) FM(A8) FM(FSO_CFE_0_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP1_7_4 FM(DU_DG5) F_(0, 0) F_(0, 0) FM(A9) FM(FSO_CFE_1_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP1_11_8 FM(DU_DG6) F_(0, 0) F_(0, 0) FM(A10) FM(FSO_TOE_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP1_15_12 FM(DU_DG7) F_(0, 0) F_(0, 0) FM(A11) FM(IRQ1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP1_19_16 FM(DU_DB2) F_(0, 0) F_(0, 0) FM(A12) FM(IRQ2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP1_23_20 FM(DU_DB3) F_(0, 0) F_(0, 0) FM(A13) FM(FXR_CLKOUT1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP1_27_24 FM(DU_DB4) F_(0, 0) F_(0, 0) FM(A14) FM(FXR_CLKOUT2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP1_31_28 FM(DU_DB5) F_(0, 0) F_(0, 0) FM(A15) FM(FXR_TXENA_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP2_3_0 FM(DU_DB6) F_(0, 0) F_(0, 0) FM(A16) FM(FXR_TXENB_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP2_7_4 FM(DU_DB7) F_(0, 0) F_(0, 0) FM(A17) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP2_11_8 FM(DU_DOTCLKOUT) FM(SCIF_CLK_A) F_(0, 0) FM(A18) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP2_15_12 FM(DU_EXHSYNC_DU_HSYNC) FM(HRX0) F_(0, 0) FM(A19) FM(IRQ3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP2_19_16 FM(DU_EXVSYNC_DU_VSYNC) FM(MSIOF3_SCK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP2_23_20 FM(DU_EXODDF_DU_ODDF_DISP_CDE) FM(MSIOF3_SYNC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP2_27_24 FM(IRQ0) FM(CC5_OSCOUT) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP2_31_28 FM(VI0_CLK) FM(MSIOF2_SCK) FM(SCK3) F_(0, 0) FM(HSCK3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP3_3_0 FM(VI0_CLKENB) FM(MSIOF2_RXD) FM(RX3) FM(RD_WR_N) FM(HCTS3_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP3_7_4 FM(VI0_HSYNC_N) FM(MSIOF2_TXD) FM(TX3) F_(0, 0) FM(HRTS3_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP3_11_8 FM(VI0_VSYNC_N) FM(MSIOF2_SYNC) FM(CTS3_N) F_(0, 0) FM(HTX3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP3_15_12 FM(VI0_DATA0) FM(MSIOF2_SS1) FM(RTS3_N_TANS) F_(0, 0) FM(HRX3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP3_19_16 FM(VI0_DATA1) FM(MSIOF2_SS2) FM(SCK1) F_(0, 0) FM(SPEEDIN_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP3_23_20 FM(VI0_DATA2) FM(AVB0_AVTP_PPS) FM(SDA3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP3_27_24 FM(VI0_DATA3) FM(HSCK1) FM(SCL3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP3_31_28 FM(VI0_DATA4) FM(HRTS1_N) FM(RX1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP4_3_0 FM(VI0_DATA5) FM(HCTS1_N) FM(TX1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP4_7_4 FM(VI0_DATA6) FM(HTX1) FM(CTS1_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP4_11_8 FM(VI0_DATA7) FM(HRX1) FM(RTS1_N_TANS) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP4_15_12 FM(VI0_DATA8) FM(HSCK2) FM(PWM0_A) FM(A22) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP4_19_16 FM(VI0_DATA9) FM(HCTS2_N) FM(PWM1_A) FM(A23) FM(FSO_CFE_0_N_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP4_23_20 FM(VI0_DATA10) FM(HRTS2_N) FM(PWM2_A) FM(A24) FM(FSO_CFE_1_N_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP4_27_24 FM(VI0_DATA11) FM(HTX2) FM(PWM3_A) FM(A25) FM(FSO_TOE_N_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP4_31_28 FM(VI0_FIELD) FM(HRX2) FM(PWM4_A) FM(CS1_N) FM(FSCLKST2_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP5_3_0 FM(VI1_CLK) FM(MSIOF1_RXD) F_(0, 0) FM(CS0_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP5_7_4 FM(VI1_CLKENB) FM(MSIOF1_TXD) F_(0, 0) FM(D0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP5_11_8 FM(VI1_HSYNC_N) FM(MSIOF1_SCK) F_(0, 0) FM(D1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP5_15_12 FM(VI1_VSYNC_N) FM(MSIOF1_SYNC) F_(0, 0) FM(D2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP5_19_16 FM(VI1_DATA0) FM(MSIOF1_SS1) F_(0, 0) FM(D3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP5_23_20 FM(VI1_DATA1) FM(MSIOF1_SS2) F_(0, 0) FM(D4) FM(MMC_CMD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP5_27_24 FM(VI1_DATA2) FM(CANFD0_TX_B) F_(0, 0) FM(D5) FM(MMC_D0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP5_31_28 FM(VI1_DATA3) FM(CANFD0_RX_B) F_(0, 0) FM(D6) FM(MMC_D1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP6_3_0 FM(VI1_DATA4) FM(CANFD_CLK_B) F_(0, 0) FM(D7) FM(MMC_D2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP6_7_4 FM(VI1_DATA5) F_(0,0) FM(SCK4) FM(D8) FM(MMC_D3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP6_11_8 FM(VI1_DATA6) F_(0,0) FM(RX4) FM(D9) FM(MMC_CLK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP6_15_12 FM(VI1_DATA7) F_(0,0) FM(TX4) FM(D10) FM(MMC_D4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP6_19_16 FM(VI1_DATA8) F_(0,0) FM(CTS4_N) FM(D11) FM(MMC_D5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP6_23_20 FM(VI1_DATA9) F_(0,0) FM(RTS4_N_TANS) FM(D12) FM(MMC_D6) FM(SCL3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP6_27_24 FM(VI1_DATA10) F_(0,0) F_(0, 0) FM(D13) FM(MMC_D7) FM(SDA3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP6_31_28 FM(VI1_DATA11) FM(SCL4) FM(IRQ4) FM(D14) FM(MMC_WP) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP7_3_0 FM(VI1_FIELD) FM(SDA4) FM(IRQ5) FM(D15) FM(MMC_CD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP7_7_4 FM(SCL0) FM(DU_DR0) FM(TPU0TO0) FM(CLKOUT) F_(0, 0) FM(MSIOF0_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP7_11_8 FM(SDA0) FM(DU_DR1) FM(TPU0TO1) FM(BS_N) FM(SCK0) FM(MSIOF0_TXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP7_15_12 FM(SCL1) FM(DU_DG0) FM(TPU0TO2) FM(RD_N) FM(CTS0_N) FM(MSIOF0_SCK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP7_19_16 FM(SDA1) FM(DU_DG1) FM(TPU0TO3) FM(WE0_N) FM(RTS0_N_TANS) FM(MSIOF0_SYNC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP7_23_20 FM(SCL2) FM(DU_DB0) FM(TCLK1_A) FM(WE1_N) FM(RX0) FM(MSIOF0_SS1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP7_27_24 FM(SDA2) FM(DU_DB1) FM(TCLK2_A) FM(EX_WAIT0) FM(TX0) FM(MSIOF0_SS2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP7_31_28 FM(AVB0_AVTP_CAPTURE) F_(0, 0) F_(0, 0) F_(0, 0) FM(FSCLKST2_N_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP8_3_0 FM(CANFD0_TX_A) FM(FXR_TXDA) FM(PWM0_B) FM(DU_DISP) FM(FSCLKST2_N_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP8_7_4 FM(CANFD0_RX_A) FM(RXDA_EXTFXR) FM(PWM1_B) FM(DU_CDE) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP8_11_8 FM(CANFD1_TX) FM(FXR_TXDB) FM(PWM2_B) FM(TCLK1_B) FM(TX1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP8_15_12 FM(CANFD1_RX) FM(RXDB_EXTFXR) FM(PWM3_B) FM(TCLK2_B) FM(RX1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP8_19_16 FM(CANFD_CLK_A) FM(CLK_EXTFXR) FM(PWM4_B) FM(SPEEDIN_B) FM(SCIF_CLK_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP8_23_20 FM(DIGRF_CLKIN) FM(DIGRF_CLKEN_IN) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP8_27_24 FM(DIGRF_CLKOUT) FM(DIGRF_CLKEN_OUT) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++#define IP8_31_28 F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
++
++#define PINMUX_GPSR \
++\
++ GPSR1_27 \
++ GPSR1_26 \
++ GPSR1_25 \
++ GPSR1_24 \
++ GPSR1_23 \
++ GPSR1_22 \
++GPSR0_21 GPSR1_21 \
++GPSR0_20 GPSR1_20 \
++GPSR0_19 GPSR1_19 \
++GPSR0_18 GPSR1_18 \
++GPSR0_17 GPSR1_17 \
++GPSR0_16 GPSR1_16 GPSR2_16 GPSR3_16 \
++GPSR0_15 GPSR1_15 GPSR2_15 GPSR3_15 \
++GPSR0_14 GPSR1_14 GPSR2_14 GPSR3_14 GPSR5_14 \
++GPSR0_13 GPSR1_13 GPSR2_13 GPSR3_13 GPSR5_13 \
++GPSR0_12 GPSR1_12 GPSR2_12 GPSR3_12 GPSR5_12 \
++GPSR0_11 GPSR1_11 GPSR2_11 GPSR3_11 GPSR5_11 \
++GPSR0_10 GPSR1_10 GPSR2_10 GPSR3_10 GPSR5_10 \
++GPSR0_9 GPSR1_9 GPSR2_9 GPSR3_9 GPSR5_9 \
++GPSR0_8 GPSR1_8 GPSR2_8 GPSR3_8 GPSR5_8 \
++GPSR0_7 GPSR1_7 GPSR2_7 GPSR3_7 GPSR5_7 \
++GPSR0_6 GPSR1_6 GPSR2_6 GPSR3_6 GPSR5_6 \
++GPSR0_5 GPSR1_5 GPSR2_5 GPSR3_5 GPSR4_5 GPSR5_5 \
++GPSR0_4 GPSR1_4 GPSR2_4 GPSR3_4 GPSR4_4 GPSR5_4 \
++GPSR0_3 GPSR1_3 GPSR2_3 GPSR3_3 GPSR4_3 GPSR5_3 \
++GPSR0_2 GPSR1_2 GPSR2_2 GPSR3_2 GPSR4_2 GPSR5_2 \
++GPSR0_1 GPSR1_1 GPSR2_1 GPSR3_1 GPSR4_1 GPSR5_1 \
++GPSR0_0 GPSR1_0 GPSR2_0 GPSR3_0 GPSR4_0 GPSR5_0
++
++#define PINMUX_IPSR \
++\
++FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
++FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
++FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
++FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
++FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
++FM(IP0_23_20) IP0_23_20 FM(IP1_23_20) IP1_23_20 FM(IP2_23_20) IP2_23_20 FM(IP3_23_20) IP3_23_20 \
++FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
++FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \
++\
++FM(IP4_3_0) IP4_3_0 FM(IP5_3_0) IP5_3_0 FM(IP6_3_0) IP6_3_0 FM(IP7_3_0) IP7_3_0 \
++FM(IP4_7_4) IP4_7_4 FM(IP5_7_4) IP5_7_4 FM(IP6_7_4) IP6_7_4 FM(IP7_7_4) IP7_7_4 \
++FM(IP4_11_8) IP4_11_8 FM(IP5_11_8) IP5_11_8 FM(IP6_11_8) IP6_11_8 FM(IP7_11_8) IP7_11_8 \
++FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \
++FM(IP4_19_16) IP4_19_16 FM(IP5_19_16) IP5_19_16 FM(IP6_19_16) IP6_19_16 FM(IP7_19_16) IP7_19_16 \
++FM(IP4_23_20) IP4_23_20 FM(IP5_23_20) IP5_23_20 FM(IP6_23_20) IP6_23_20 FM(IP7_23_20) IP7_23_20 \
++FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
++FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \
++\
++FM(IP8_3_0) IP8_3_0 \
++FM(IP8_7_4) IP8_7_4 \
++FM(IP8_11_8) IP8_11_8 \
++FM(IP8_15_12) IP8_15_12 \
++FM(IP8_19_16) IP8_19_16 \
++FM(IP8_23_20) IP8_23_20 \
++FM(IP8_27_24) IP8_27_24 \
++FM(IP8_31_28) IP8_31_28
++
++/* MOD_SEL0 */ /* 0 */ /* 1 */
++#define MOD_SEL0_11 FM(SEL_I2C3_0) FM(SEL_I2C3_1)
++#define MOD_SEL0_10 FM(SEL_HSCIF0_0) FM(SEL_HSCIF0_1)
++#define MOD_SEL0_9 FM(SEL_SCIF1_0) FM(SEL_SCIF1_1)
++#define MOD_SEL0_8 FM(SEL_CANFD0_0) FM(SEL_CANFD0_1)
++#define MOD_SEL0_7 FM(SEL_PWM4_0) FM(SEL_PWM4_1)
++#define MOD_SEL0_6 FM(SEL_PWM3_0) FM(SEL_PWM3_1)
++#define MOD_SEL0_5 FM(SEL_PWM2_0) FM(SEL_PWM2_1)
++#define MOD_SEL0_4 FM(SEL_PWM1_0) FM(SEL_PWM1_1)
++#define MOD_SEL0_3 FM(SEL_PWM0_0) FM(SEL_PWM0_1)
++#define MOD_SEL0_2 FM(SEL_RFSO_0) FM(SEL_RFSO_1)
++#define MOD_SEL0_1 FM(SEL_RSP_0) FM(SEL_RSP_1)
++#define MOD_SEL0_0 FM(SEL_TMU_0) FM(SEL_TMU_1)
++
++#define PINMUX_MOD_SELS \
++\
++MOD_SEL0_11 \
++MOD_SEL0_10 \
++MOD_SEL0_9 \
++MOD_SEL0_8 \
++MOD_SEL0_7 \
++MOD_SEL0_6 \
++MOD_SEL0_5 \
++MOD_SEL0_4 \
++MOD_SEL0_3 \
++MOD_SEL0_2 \
++MOD_SEL0_1 \
++MOD_SEL0_0
++
++enum {
++ PINMUX_RESERVED = 0,
++
++ PINMUX_DATA_BEGIN,
++ GP_ALL(DATA),
++ PINMUX_DATA_END,
++
++#define F_(x, y)
++#define FM(x) FN_##x,
++ PINMUX_FUNCTION_BEGIN,
++ GP_ALL(FN),
++ PINMUX_GPSR
++ PINMUX_IPSR
++ PINMUX_MOD_SELS
++ PINMUX_FUNCTION_END,
++#undef F_
++#undef FM
++
++#define F_(x, y)
++#define FM(x) x##_MARK,
++ PINMUX_MARK_BEGIN,
++ PINMUX_GPSR
++ PINMUX_IPSR
++ PINMUX_MOD_SELS
++ PINMUX_MARK_END,
++#undef F_
++#undef FM
++};
++
++static const u16 pinmux_data[] = {
++ PINMUX_DATA_GP_ALL(),
++
++ PINMUX_SINGLE(AVB0_RX_CTL),
++ PINMUX_SINGLE(AVB0_RXC),
++ PINMUX_SINGLE(AVB0_RD0),
++ PINMUX_SINGLE(AVB0_RD1),
++ PINMUX_SINGLE(AVB0_RD2),
++ PINMUX_SINGLE(AVB0_RD3),
++ PINMUX_SINGLE(AVB0_TX_CTL),
++ PINMUX_SINGLE(AVB0_TXC),
++ PINMUX_SINGLE(AVB0_TD0),
++ PINMUX_SINGLE(AVB0_TD1),
++ PINMUX_SINGLE(AVB0_TD2),
++ PINMUX_SINGLE(AVB0_TD3),
++ PINMUX_SINGLE(AVB0_TXCREFCLK),
++ PINMUX_SINGLE(AVB0_MDIO),
++ PINMUX_SINGLE(AVB0_MDC),
++ PINMUX_SINGLE(AVB0_MAGIC),
++ PINMUX_SINGLE(AVB0_PHY_INT),
++ PINMUX_SINGLE(AVB0_LINK),
++ PINMUX_SINGLE(AVB0_AVTP_MATCH),
++
++ PINMUX_SINGLE(QSPI0_SPCLK),
++ PINMUX_SINGLE(QSPI0_MOSI_IO0),
++ PINMUX_SINGLE(QSPI0_MISO_IO1),
++ PINMUX_SINGLE(QSPI0_IO2),
++ PINMUX_SINGLE(QSPI0_IO3),
++ PINMUX_SINGLE(QSPI0_SSL),
++ PINMUX_SINGLE(QSPI1_SPCLK),
++ PINMUX_SINGLE(QSPI1_MOSI_IO0),
++ PINMUX_SINGLE(QSPI1_MISO_IO1),
++ PINMUX_SINGLE(QSPI1_IO2),
++ PINMUX_SINGLE(QSPI1_IO3),
++ PINMUX_SINGLE(QSPI1_SSL),
++ PINMUX_SINGLE(RPC_RESET_N),
++ PINMUX_SINGLE(RPC_WP_N),
++ PINMUX_SINGLE(RPC_INT_N),
++
++ /* IPSR0 */
++ PINMUX_IPSR_GPSR(IP0_3_0, DU_DR2),
++ PINMUX_IPSR_GPSR(IP0_3_0, HSCK0),
++ PINMUX_IPSR_GPSR(IP0_3_0, A0),
++
++ PINMUX_IPSR_GPSR(IP0_7_4, DU_DR3),
++ PINMUX_IPSR_GPSR(IP0_7_4, HRTS0_N),
++ PINMUX_IPSR_GPSR(IP0_7_4, A1),
++
++ PINMUX_IPSR_GPSR(IP0_11_8, DU_DR4),
++ PINMUX_IPSR_GPSR(IP0_11_8, HCTS0_N),
++ PINMUX_IPSR_GPSR(IP0_11_8, A2),
++
++ PINMUX_IPSR_GPSR(IP0_15_12, DU_DR5),
++ PINMUX_IPSR_GPSR(IP0_15_12, HTX0),
++ PINMUX_IPSR_GPSR(IP0_15_12, A3),
++
++ PINMUX_IPSR_GPSR(IP0_19_16, DU_DR6),
++ PINMUX_IPSR_GPSR(IP0_19_16, MSIOF3_RXD),
++ PINMUX_IPSR_GPSR(IP0_19_16, A4),
++
++ PINMUX_IPSR_GPSR(IP0_23_20, DU_DR7),
++ PINMUX_IPSR_GPSR(IP0_23_20, MSIOF3_TXD),
++ PINMUX_IPSR_GPSR(IP0_23_20, A5),
++
++ PINMUX_IPSR_GPSR(IP0_27_24, DU_DG2),
++ PINMUX_IPSR_GPSR(IP0_27_24, MSIOF3_SS1),
++ PINMUX_IPSR_GPSR(IP0_27_24, A6),
++
++ PINMUX_IPSR_GPSR(IP0_31_28, DU_DG3),
++ PINMUX_IPSR_GPSR(IP0_31_28, MSIOF3_SS2),
++ PINMUX_IPSR_GPSR(IP0_31_28, A7),
++ PINMUX_IPSR_GPSR(IP0_31_28, PWMFSW0),
++
++ /* IPSR1 */
++ PINMUX_IPSR_GPSR(IP1_3_0, DU_DG4),
++ PINMUX_IPSR_GPSR(IP1_3_0, A8),
++ PINMUX_IPSR_MSEL(IP1_3_0, FSO_CFE_0_N_A, SEL_RFSO_0),
++
++ PINMUX_IPSR_GPSR(IP1_7_4, DU_DG5),
++ PINMUX_IPSR_GPSR(IP1_7_4, A9),
++ PINMUX_IPSR_MSEL(IP1_7_4, FSO_CFE_1_N_A, SEL_RFSO_0),
++
++ PINMUX_IPSR_GPSR(IP1_11_8, DU_DG6),
++ PINMUX_IPSR_GPSR(IP1_11_8, A10),
++ PINMUX_IPSR_MSEL(IP1_11_8, FSO_TOE_N_A, SEL_RFSO_0),
++
++ PINMUX_IPSR_GPSR(IP1_15_12, DU_DG7),
++ PINMUX_IPSR_GPSR(IP1_15_12, A11),
++ PINMUX_IPSR_GPSR(IP1_15_12, IRQ1),
++
++ PINMUX_IPSR_GPSR(IP1_19_16, DU_DB2),
++ PINMUX_IPSR_GPSR(IP1_19_16, A12),
++ PINMUX_IPSR_GPSR(IP1_19_16, IRQ2),
++
++ PINMUX_IPSR_GPSR(IP1_23_20, DU_DB3),
++ PINMUX_IPSR_GPSR(IP1_23_20, A13),
++ PINMUX_IPSR_GPSR(IP1_23_20, FXR_CLKOUT1),
++
++ PINMUX_IPSR_GPSR(IP1_27_24, DU_DB4),
++ PINMUX_IPSR_GPSR(IP1_27_24, A14),
++ PINMUX_IPSR_GPSR(IP1_27_24, FXR_CLKOUT2),
++
++ PINMUX_IPSR_GPSR(IP1_31_28, DU_DB5),
++ PINMUX_IPSR_GPSR(IP1_31_28, A15),
++ PINMUX_IPSR_GPSR(IP1_31_28, FXR_TXENA_N),
++
++ /* IPSR2 */
++ PINMUX_IPSR_GPSR(IP2_3_0, DU_DB6),
++ PINMUX_IPSR_GPSR(IP2_3_0, A16),
++ PINMUX_IPSR_GPSR(IP2_3_0, FXR_TXENB_N),
++
++ PINMUX_IPSR_GPSR(IP2_7_4, DU_DB7),
++ PINMUX_IPSR_GPSR(IP2_7_4, A17),
++
++ PINMUX_IPSR_GPSR(IP2_11_8, DU_DOTCLKOUT),
++ PINMUX_IPSR_MSEL(IP2_11_8, SCIF_CLK_A, SEL_HSCIF0_0),
++ PINMUX_IPSR_GPSR(IP2_11_8, A18),
++
++ PINMUX_IPSR_GPSR(IP2_15_12, DU_EXHSYNC_DU_HSYNC),
++ PINMUX_IPSR_GPSR(IP2_15_12, HRX0),
++ PINMUX_IPSR_GPSR(IP2_15_12, A19),
++ PINMUX_IPSR_GPSR(IP2_15_12, IRQ3),
++
++ PINMUX_IPSR_GPSR(IP2_19_16, DU_EXVSYNC_DU_VSYNC),
++ PINMUX_IPSR_GPSR(IP2_19_16, MSIOF3_SCK),
++
++ PINMUX_IPSR_GPSR(IP2_23_20, DU_EXODDF_DU_ODDF_DISP_CDE),
++ PINMUX_IPSR_GPSR(IP2_23_20, MSIOF3_SYNC),
++
++ PINMUX_IPSR_GPSR(IP2_27_24, IRQ0),
++ PINMUX_IPSR_GPSR(IP2_27_24, CC5_OSCOUT),
++
++ PINMUX_IPSR_GPSR(IP2_31_28, VI0_CLK),
++ PINMUX_IPSR_GPSR(IP2_31_28, MSIOF2_SCK),
++ PINMUX_IPSR_GPSR(IP2_31_28, SCK3),
++ PINMUX_IPSR_GPSR(IP2_31_28, HSCK3),
++
++ /* IPSR3 */
++ PINMUX_IPSR_GPSR(IP3_3_0, VI0_CLKENB),
++ PINMUX_IPSR_GPSR(IP3_3_0, MSIOF2_RXD),
++ PINMUX_IPSR_GPSR(IP3_3_0, RX3),
++ PINMUX_IPSR_GPSR(IP3_3_0, RD_WR_N),
++ PINMUX_IPSR_GPSR(IP3_3_0, HCTS3_N),
++
++ PINMUX_IPSR_GPSR(IP3_7_4, VI0_HSYNC_N),
++ PINMUX_IPSR_GPSR(IP3_7_4, MSIOF2_TXD),
++ PINMUX_IPSR_GPSR(IP3_7_4, TX3),
++ PINMUX_IPSR_GPSR(IP3_7_4, HRTS3_N),
++
++ PINMUX_IPSR_GPSR(IP3_11_8, VI0_VSYNC_N),
++ PINMUX_IPSR_GPSR(IP3_11_8, MSIOF2_SYNC),
++ PINMUX_IPSR_GPSR(IP3_11_8, CTS3_N),
++ PINMUX_IPSR_GPSR(IP3_11_8, HTX3),
++
++ PINMUX_IPSR_GPSR(IP3_15_12, VI0_DATA0),
++ PINMUX_IPSR_GPSR(IP3_15_12, MSIOF2_SS1),
++ PINMUX_IPSR_GPSR(IP3_15_12, RTS3_N_TANS),
++ PINMUX_IPSR_GPSR(IP3_15_12, HRX3),
++
++ PINMUX_IPSR_GPSR(IP3_19_16, VI0_DATA1),
++ PINMUX_IPSR_GPSR(IP3_19_16, MSIOF2_SS2),
++ PINMUX_IPSR_GPSR(IP3_19_16, SCK1),
++ PINMUX_IPSR_MSEL(IP3_19_16, SPEEDIN_A, SEL_RSP_0),
++
++ PINMUX_IPSR_GPSR(IP3_23_20, VI0_DATA2),
++ PINMUX_IPSR_GPSR(IP3_23_20, AVB0_AVTP_PPS),
++ PINMUX_IPSR_MSEL(IP3_23_20, SDA3_A, SEL_I2C3_0),
++
++ PINMUX_IPSR_GPSR(IP3_27_24, VI0_DATA3),
++ PINMUX_IPSR_GPSR(IP3_27_24, HSCK1),
++ PINMUX_IPSR_MSEL(IP3_27_24, SCL3_A, SEL_I2C3_0),
++
++ PINMUX_IPSR_GPSR(IP3_31_28, VI0_DATA4),
++ PINMUX_IPSR_GPSR(IP3_31_28, HRTS1_N),
++ PINMUX_IPSR_MSEL(IP3_31_28, RX1_A, SEL_SCIF1_0),
++
++ /* IPSR4 */
++ PINMUX_IPSR_GPSR(IP4_3_0, VI0_DATA5),
++ PINMUX_IPSR_GPSR(IP4_3_0, HCTS1_N),
++ PINMUX_IPSR_MSEL(IP4_3_0, TX1_A, SEL_SCIF1_0),
++
++ PINMUX_IPSR_GPSR(IP4_7_4, VI0_DATA6),
++ PINMUX_IPSR_GPSR(IP4_7_4, HTX1),
++ PINMUX_IPSR_GPSR(IP4_7_4, CTS1_N),
++
++ PINMUX_IPSR_GPSR(IP4_11_8, VI0_DATA7),
++ PINMUX_IPSR_GPSR(IP4_11_8, HRX1),
++ PINMUX_IPSR_GPSR(IP4_11_8, RTS1_N_TANS),
++
++ PINMUX_IPSR_GPSR(IP4_15_12, VI0_DATA8),
++ PINMUX_IPSR_GPSR(IP4_15_12, HSCK2),
++ PINMUX_IPSR_MSEL(IP4_15_12, PWM0_A, SEL_PWM0_0),
++
++ PINMUX_IPSR_GPSR(IP4_19_16, VI0_DATA9),
++ PINMUX_IPSR_GPSR(IP4_19_16, HCTS2_N),
++ PINMUX_IPSR_MSEL(IP4_19_16, PWM1_A, SEL_PWM1_0),
++ PINMUX_IPSR_MSEL(IP4_19_16, FSO_CFE_0_N_B, SEL_RFSO_1),
++
++ PINMUX_IPSR_GPSR(IP4_23_20, VI0_DATA10),
++ PINMUX_IPSR_GPSR(IP4_23_20, HRTS2_N),
++ PINMUX_IPSR_MSEL(IP4_23_20, PWM2_A, SEL_PWM2_0),
++ PINMUX_IPSR_MSEL(IP4_23_20, FSO_CFE_1_N_B, SEL_RFSO_1),
++
++ PINMUX_IPSR_GPSR(IP4_27_24, VI0_DATA11),
++ PINMUX_IPSR_GPSR(IP4_27_24, HTX2),
++ PINMUX_IPSR_MSEL(IP4_27_24, PWM3_A, SEL_PWM3_0),
++ PINMUX_IPSR_MSEL(IP4_27_24, FSO_TOE_N_B, SEL_RFSO_1),
++
++ PINMUX_IPSR_GPSR(IP4_31_28, VI0_FIELD),
++ PINMUX_IPSR_GPSR(IP4_31_28, HRX2),
++ PINMUX_IPSR_MSEL(IP4_31_28, PWM4_A, SEL_PWM4_0),
++ PINMUX_IPSR_GPSR(IP4_31_28, CS1_N),
++ PINMUX_IPSR_GPSR(IP4_31_28, FSCLKST2_N_A),
++
++ /* IPSR5 */
++ PINMUX_IPSR_GPSR(IP5_3_0, VI1_CLK),
++ PINMUX_IPSR_GPSR(IP5_3_0, MSIOF1_RXD),
++ PINMUX_IPSR_GPSR(IP5_3_0, CS0_N),
++
++ PINMUX_IPSR_GPSR(IP5_7_4, VI1_CLKENB),
++ PINMUX_IPSR_GPSR(IP5_7_4, MSIOF1_TXD),
++ PINMUX_IPSR_GPSR(IP5_7_4, D0),
++
++ PINMUX_IPSR_GPSR(IP5_11_8, VI1_HSYNC_N),
++ PINMUX_IPSR_GPSR(IP5_11_8, MSIOF1_SCK),
++ PINMUX_IPSR_GPSR(IP5_11_8, D1),
++
++ PINMUX_IPSR_GPSR(IP5_15_12, VI1_VSYNC_N),
++ PINMUX_IPSR_GPSR(IP5_15_12, MSIOF1_SYNC),
++ PINMUX_IPSR_GPSR(IP5_15_12, D2),
++
++ PINMUX_IPSR_GPSR(IP5_19_16, VI1_DATA0),
++ PINMUX_IPSR_GPSR(IP5_19_16, MSIOF1_SS1),
++ PINMUX_IPSR_GPSR(IP5_19_16, D3),
++
++ PINMUX_IPSR_GPSR(IP5_23_20, VI1_DATA1),
++ PINMUX_IPSR_GPSR(IP5_23_20, MSIOF1_SS2),
++ PINMUX_IPSR_GPSR(IP5_23_20, D4),
++ PINMUX_IPSR_GPSR(IP5_23_20, MMC_CMD),
++
++ PINMUX_IPSR_GPSR(IP5_27_24, VI1_DATA2),
++ PINMUX_IPSR_MSEL(IP5_27_24, CANFD0_TX_B, SEL_CANFD0_1),
++ PINMUX_IPSR_GPSR(IP5_27_24, D5),
++ PINMUX_IPSR_GPSR(IP5_27_24, MMC_D0),
++
++ PINMUX_IPSR_GPSR(IP5_31_28, VI1_DATA3),
++ PINMUX_IPSR_MSEL(IP5_31_28, CANFD0_RX_B, SEL_CANFD0_1),
++ PINMUX_IPSR_GPSR(IP5_31_28, D6),
++ PINMUX_IPSR_GPSR(IP5_31_28, MMC_D1),
++
++ /* IPSR6 */
++ PINMUX_IPSR_GPSR(IP6_3_0, VI1_DATA4),
++ PINMUX_IPSR_MSEL(IP6_3_0, CANFD_CLK_B, SEL_CANFD0_1),
++ PINMUX_IPSR_GPSR(IP6_3_0, D7),
++ PINMUX_IPSR_GPSR(IP6_3_0, MMC_D2),
++
++ PINMUX_IPSR_GPSR(IP6_7_4, VI1_DATA5),
++ PINMUX_IPSR_GPSR(IP6_7_4, SCK4),
++ PINMUX_IPSR_GPSR(IP6_7_4, D8),
++ PINMUX_IPSR_GPSR(IP6_7_4, MMC_D3),
++
++ PINMUX_IPSR_GPSR(IP6_11_8, VI1_DATA6),
++ PINMUX_IPSR_GPSR(IP6_11_8, RX4),
++ PINMUX_IPSR_GPSR(IP6_11_8, D9),
++ PINMUX_IPSR_GPSR(IP6_11_8, MMC_CLK),
++
++ PINMUX_IPSR_GPSR(IP6_15_12, VI1_DATA7),
++ PINMUX_IPSR_GPSR(IP6_15_12, TX4),
++ PINMUX_IPSR_GPSR(IP6_15_12, D10),
++ PINMUX_IPSR_GPSR(IP6_15_12, MMC_D4),
++
++ PINMUX_IPSR_GPSR(IP6_19_16, VI1_DATA8),
++ PINMUX_IPSR_GPSR(IP6_19_16, CTS4_N),
++ PINMUX_IPSR_GPSR(IP6_19_16, D11),
++ PINMUX_IPSR_GPSR(IP6_19_16, MMC_D5),
++
++ PINMUX_IPSR_GPSR(IP6_23_20, VI1_DATA9),
++ PINMUX_IPSR_GPSR(IP6_23_20, RTS4_N_TANS),
++ PINMUX_IPSR_GPSR(IP6_23_20, D12),
++ PINMUX_IPSR_GPSR(IP6_23_20, MMC_D6),
++ PINMUX_IPSR_MSEL(IP6_23_20, SCL3_B, SEL_I2C3_1),
++
++ PINMUX_IPSR_GPSR(IP6_27_24, VI1_DATA10),
++ PINMUX_IPSR_GPSR(IP6_27_24, D13),
++ PINMUX_IPSR_GPSR(IP6_27_24, MMC_D7),
++ PINMUX_IPSR_MSEL(IP6_27_24, SDA3_B, SEL_I2C3_1),
++
++ PINMUX_IPSR_GPSR(IP6_31_28, VI1_DATA11),
++ PINMUX_IPSR_GPSR(IP6_31_28, SCL4),
++ PINMUX_IPSR_GPSR(IP6_31_28, IRQ4),
++ PINMUX_IPSR_GPSR(IP6_31_28, D14),
++ PINMUX_IPSR_GPSR(IP6_31_28, MMC_WP),
++
++ /* IPSR7 */
++ PINMUX_IPSR_GPSR(IP7_3_0, VI1_FIELD),
++ PINMUX_IPSR_GPSR(IP7_3_0, SDA4),
++ PINMUX_IPSR_GPSR(IP7_3_0, IRQ5),
++ PINMUX_IPSR_GPSR(IP7_3_0, D15),
++ PINMUX_IPSR_GPSR(IP7_3_0, MMC_CD),
++
++ PINMUX_IPSR_GPSR(IP7_7_4, SCL0),
++ PINMUX_IPSR_GPSR(IP7_7_4, DU_DR0),
++ PINMUX_IPSR_GPSR(IP7_7_4, TPU0TO0),
++ PINMUX_IPSR_GPSR(IP7_7_4, CLKOUT),
++ PINMUX_IPSR_GPSR(IP7_7_4, MSIOF0_RXD),
++
++ PINMUX_IPSR_GPSR(IP7_11_8, SDA0),
++ PINMUX_IPSR_GPSR(IP7_11_8, DU_DR1),
++ PINMUX_IPSR_GPSR(IP7_11_8, TPU0TO1),
++ PINMUX_IPSR_GPSR(IP7_11_8, BS_N),
++ PINMUX_IPSR_GPSR(IP7_11_8, SCK0),
++ PINMUX_IPSR_GPSR(IP7_11_8, MSIOF0_TXD),
++
++ PINMUX_IPSR_GPSR(IP7_15_12, SCL1),
++ PINMUX_IPSR_GPSR(IP7_15_12, DU_DG0),
++ PINMUX_IPSR_GPSR(IP7_15_12, TPU0TO2),
++ PINMUX_IPSR_GPSR(IP7_15_12, RD_N),
++ PINMUX_IPSR_GPSR(IP7_15_12, CTS0_N),
++ PINMUX_IPSR_GPSR(IP7_15_12, MSIOF0_SCK),
++
++ PINMUX_IPSR_GPSR(IP7_19_16, SDA1),
++ PINMUX_IPSR_GPSR(IP7_19_16, DU_DG1),
++ PINMUX_IPSR_GPSR(IP7_19_16, TPU0TO3),
++ PINMUX_IPSR_GPSR(IP7_19_16, WE0_N),
++ PINMUX_IPSR_GPSR(IP7_19_16, RTS0_N_TANS),
++ PINMUX_IPSR_GPSR(IP7_19_16, MSIOF0_SYNC),
++
++ PINMUX_IPSR_GPSR(IP7_23_20, SCL2),
++ PINMUX_IPSR_GPSR(IP7_23_20, DU_DB0),
++ PINMUX_IPSR_MSEL(IP7_23_20, TCLK1_A, SEL_TMU_0),
++ PINMUX_IPSR_GPSR(IP7_23_20, WE1_N),
++ PINMUX_IPSR_GPSR(IP7_23_20, RX0),
++ PINMUX_IPSR_GPSR(IP7_23_20, MSIOF0_SS1),
++
++ PINMUX_IPSR_GPSR(IP7_27_24, SDA2),
++ PINMUX_IPSR_GPSR(IP7_27_24, DU_DB1),
++ PINMUX_IPSR_MSEL(IP7_27_24, TCLK2_A, SEL_TMU_0),
++ PINMUX_IPSR_GPSR(IP7_27_24, EX_WAIT0),
++ PINMUX_IPSR_GPSR(IP7_27_24, TX0),
++ PINMUX_IPSR_GPSR(IP7_27_24, MSIOF0_SS2),
++
++ PINMUX_IPSR_GPSR(IP7_31_28, AVB0_AVTP_CAPTURE),
++ PINMUX_IPSR_GPSR(IP7_31_28, FSCLKST2_N_B),
++
++ /* IPSR8 */
++ PINMUX_IPSR_MSEL(IP8_3_0, CANFD0_TX_A, SEL_CANFD0_0),
++ PINMUX_IPSR_GPSR(IP8_3_0, FXR_TXDA),
++ PINMUX_IPSR_MSEL(IP8_3_0, PWM0_B, SEL_PWM0_1),
++ PINMUX_IPSR_GPSR(IP8_3_0, DU_DISP),
++ PINMUX_IPSR_GPSR(IP8_3_0, FSCLKST2_N_C),
++
++ PINMUX_IPSR_MSEL(IP8_7_4, CANFD0_RX_A, SEL_CANFD0_0),
++ PINMUX_IPSR_GPSR(IP8_7_4, RXDA_EXTFXR),
++ PINMUX_IPSR_MSEL(IP8_7_4, PWM1_B, SEL_PWM1_1),
++ PINMUX_IPSR_GPSR(IP8_7_4, DU_CDE),
++
++ PINMUX_IPSR_GPSR(IP8_11_8, CANFD1_TX),
++ PINMUX_IPSR_GPSR(IP8_11_8, FXR_TXDB),
++ PINMUX_IPSR_MSEL(IP8_11_8, PWM2_B, SEL_PWM2_1),
++ PINMUX_IPSR_MSEL(IP8_11_8, TCLK1_B, SEL_TMU_1),
++ PINMUX_IPSR_MSEL(IP8_11_8, TX1_B, SEL_SCIF1_1),
++
++ PINMUX_IPSR_GPSR(IP8_15_12, CANFD1_RX),
++ PINMUX_IPSR_GPSR(IP8_15_12, RXDB_EXTFXR),
++ PINMUX_IPSR_MSEL(IP8_15_12, PWM3_B, SEL_PWM3_1),
++ PINMUX_IPSR_MSEL(IP8_15_12, TCLK2_B, SEL_TMU_1),
++ PINMUX_IPSR_MSEL(IP8_15_12, RX1_B, SEL_SCIF1_1),
++
++ PINMUX_IPSR_MSEL(IP8_19_16, CANFD_CLK_A, SEL_CANFD0_0),
++ PINMUX_IPSR_GPSR(IP8_19_16, CLK_EXTFXR),
++ PINMUX_IPSR_MSEL(IP8_19_16, PWM4_B, SEL_PWM4_1),
++ PINMUX_IPSR_MSEL(IP8_19_16, SPEEDIN_B, SEL_RSP_1),
++ PINMUX_IPSR_MSEL(IP8_19_16, SCIF_CLK_B, SEL_HSCIF0_1),
++
++ PINMUX_IPSR_GPSR(IP8_23_20, DIGRF_CLKIN),
++ PINMUX_IPSR_GPSR(IP8_23_20, DIGRF_CLKEN_IN),
++
++ PINMUX_IPSR_GPSR(IP8_27_24, DIGRF_CLKOUT),
++ PINMUX_IPSR_GPSR(IP8_27_24, DIGRF_CLKEN_OUT),
++};
++
++static const struct sh_pfc_pin pinmux_pins[] = {
++ PINMUX_GPIO_GP_ALL(),
++};
++
++/* - CANFD Clock ------------------------------------------------------------ */
++static const unsigned int canfd_clk_a_pins[] = {
++ /* CANFD_CLK */
++ RCAR_GP_PIN(1, 25),
++};
++static const unsigned int canfd_clk_a_mux[] = {
++ CANFD_CLK_A_MARK,
++};
++static const unsigned int canfd_clk_b_pins[] = {
++ /* CANFD_CLK */
++ RCAR_GP_PIN(3, 8),
++};
++static const unsigned int canfd_clk_b_mux[] = {
++ CANFD_CLK_B_MARK,
++};
++
++/* - CANFD0 ----------------------------------------------------------------- */
++static const unsigned int canfd0_data_a_pins[] = {
++ /* TX, RX */
++ RCAR_GP_PIN(1, 21), RCAR_GP_PIN(1, 22),
++};
++static const unsigned int canfd0_data_a_mux[] = {
++ CANFD0_TX_A_MARK, CANFD0_RX_A_MARK,
++};
++static const unsigned int canfd0_data_b_pins[] = {
++ /* TX, RX */
++ RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
++};
++static const unsigned int canfd0_data_b_mux[] = {
++ CANFD0_TX_B_MARK, CANFD0_RX_B_MARK,
++};
++
++/* - CANFD1 ----------------------------------------------------------------- */
++static const unsigned int canfd1_data_pins[] = {
++ /* TX, RX */
++ RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24),
++};
++static const unsigned int canfd1_data_mux[] = {
++ CANFD1_TX_MARK, CANFD1_RX_MARK,
++};
++
++/* - DU --------------------------------------------------------------------- */
++static const unsigned int du_rgb666_pins[] = {
++ /* R[7:2], G[7:2], B[7:2] */
++ RCAR_GP_PIN(0, 5), RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 3),
++ RCAR_GP_PIN(0, 2), RCAR_GP_PIN(0, 1), RCAR_GP_PIN(0, 0),
++ RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 9),
++ RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 7), RCAR_GP_PIN(0, 6),
++ RCAR_GP_PIN(0, 17), RCAR_GP_PIN(0, 16), RCAR_GP_PIN(0, 15),
++ RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 13), RCAR_GP_PIN(0, 12),
++};
++static const unsigned int du_rgb666_mux[] = {
++ DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK,
++ DU_DR4_MARK, DU_DR3_MARK, DU_DR2_MARK,
++ DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK,
++ DU_DG4_MARK, DU_DG3_MARK, DU_DG2_MARK,
++ DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK,
++ DU_DB4_MARK, DU_DB3_MARK, DU_DB2_MARK,
++};
++static const unsigned int du_clk_out_pins[] = {
++ /* DOTCLKOUT */
++ RCAR_GP_PIN(0, 18),
++};
++static const unsigned int du_clk_out_mux[] = {
++ DU_DOTCLKOUT_MARK,
++};
++static const unsigned int du_sync_pins[] = {
++ /* EXVSYNC/VSYNC, EXHSYNC/HSYNC */
++ RCAR_GP_PIN(0, 20), RCAR_GP_PIN(0, 19),
++};
++static const unsigned int du_sync_mux[] = {
++ DU_EXVSYNC_DU_VSYNC_MARK, DU_EXHSYNC_DU_HSYNC_MARK
++};
++static const unsigned int du_oddf_pins[] = {
++ /* EXODDF/ODDF/DISP/CDE */
++ RCAR_GP_PIN(0, 21),
++};
++static const unsigned int du_oddf_mux[] = {
++ DU_EXODDF_DU_ODDF_DISP_CDE_MARK,
++};
++static const unsigned int du_cde_pins[] = {
++ /* CDE */
++ RCAR_GP_PIN(1, 22),
++};
++static const unsigned int du_cde_mux[] = {
++ DU_CDE_MARK,
++};
++static const unsigned int du_disp_pins[] = {
++ /* DISP */
++ RCAR_GP_PIN(1, 21),
++};
++static const unsigned int du_disp_mux[] = {
++ DU_DISP_MARK,
++};
++
++/* - HSCIF0 ----------------------------------------------------------------- */
++static const unsigned int hscif0_data_pins[] = {
++ /* HRX, HTX */
++ RCAR_GP_PIN(0, 19), RCAR_GP_PIN(0, 3),
++};
++static const unsigned int hscif0_data_mux[] = {
++ HRX0_MARK, HTX0_MARK,
++};
++static const unsigned int hscif0_clk_pins[] = {
++ /* HSCK */
++ RCAR_GP_PIN(0, 0),
++};
++static const unsigned int hscif0_clk_mux[] = {
++ HSCK0_MARK,
++};
++static const unsigned int hscif0_ctrl_pins[] = {
++ /* HRTS#, HCTS# */
++ RCAR_GP_PIN(0, 1), RCAR_GP_PIN(0, 2),
++};
++static const unsigned int hscif0_ctrl_mux[] = {
++ HRTS0_N_MARK, HCTS0_N_MARK,
++};
++
++/* - HSCIF1 ----------------------------------------------------------------- */
++static const unsigned int hscif1_data_pins[] = {
++ /* HRX, HTX */
++ RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 10),
++};
++static const unsigned int hscif1_data_mux[] = {
++ HRX1_MARK, HTX1_MARK,
++};
++static const unsigned int hscif1_clk_pins[] = {
++ /* HSCK */
++ RCAR_GP_PIN(2, 7),
++};
++static const unsigned int hscif1_clk_mux[] = {
++ HSCK1_MARK,
++};
++static const unsigned int hscif1_ctrl_pins[] = {
++ /* HRTS#, HCTS# */
++ RCAR_GP_PIN(2, 8), RCAR_GP_PIN(2, 9),
++};
++static const unsigned int hscif1_ctrl_mux[] = {
++ HRTS1_N_MARK, HCTS1_N_MARK,
++};
++
++/* - HSCIF2 ----------------------------------------------------------------- */
++static const unsigned int hscif2_data_pins[] = {
++ /* HRX, HTX */
++ RCAR_GP_PIN(2, 16), RCAR_GP_PIN(2, 15),
++};
++static const unsigned int hscif2_data_mux[] = {
++ HRX2_MARK, HTX2_MARK,
++};
++static const unsigned int hscif2_clk_pins[] = {
++ /* HSCK */
++ RCAR_GP_PIN(2, 12),
++};
++static const unsigned int hscif2_clk_mux[] = {
++ HSCK2_MARK,
++};
++static const unsigned int hscif2_ctrl_pins[] = {
++ /* HRTS#, HCTS# */
++ RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 13),
++};
++static const unsigned int hscif2_ctrl_mux[] = {
++ HRTS2_N_MARK, HCTS2_N_MARK,
++};
++
++/* - HSCIF3 ----------------------------------------------------------------- */
++static const unsigned int hscif3_data_pins[] = {
++ /* HRX, HTX */
++ RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 3),
++};
++static const unsigned int hscif3_data_mux[] = {
++ HRX3_MARK, HTX3_MARK,
++};
++static const unsigned int hscif3_clk_pins[] = {
++ /* HSCK */
++ RCAR_GP_PIN(2, 0),
++};
++static const unsigned int hscif3_clk_mux[] = {
++ HSCK3_MARK,
++};
++static const unsigned int hscif3_ctrl_pins[] = {
++ /* HRTS#, HCTS# */
++ RCAR_GP_PIN(2, 2), RCAR_GP_PIN(2, 1),
++};
++static const unsigned int hscif3_ctrl_mux[] = {
++ HRTS3_N_MARK, HCTS3_N_MARK,
++};
++
++/* - I2C0 ------------------------------------------------------------------- */
++static const unsigned int i2c0_pins[] = {
++ /* SDA, SCL */
++ RCAR_GP_PIN(4, 1), RCAR_GP_PIN(4, 0),
++};
++static const unsigned int i2c0_mux[] = {
++ SDA0_MARK, SCL0_MARK,
++};
++
++/* - I2C1 ------------------------------------------------------------------- */
++static const unsigned int i2c1_pins[] = {
++ /* SDA, SCL */
++ RCAR_GP_PIN(4, 3), RCAR_GP_PIN(4, 2),
++};
++static const unsigned int i2c1_mux[] = {
++ SDA1_MARK, SCL1_MARK,
++};
++
++/* - I2C2 ------------------------------------------------------------------- */
++static const unsigned int i2c2_pins[] = {
++ /* SDA, SCL */
++ RCAR_GP_PIN(4, 5), RCAR_GP_PIN(4, 4),
++};
++static const unsigned int i2c2_mux[] = {
++ SDA2_MARK, SCL2_MARK,
++};
++
++/* - I2C3 ------------------------------------------------------------------- */
++static const unsigned int i2c3_a_pins[] = {
++ /* SDA, SCL */
++ RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 7),
++};
++static const unsigned int i2c3_a_mux[] = {
++ SDA3_A_MARK, SCL3_A_MARK,
++};
++static const unsigned int i2c3_b_pins[] = {
++ /* SDA, SCL */
++ RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 13),
++};
++static const unsigned int i2c3_b_mux[] = {
++ SDA3_B_MARK, SCL3_B_MARK,
++};
++
++/* - I2C4 ------------------------------------------------------------------- */
++static const unsigned int i2c4_pins[] = {
++ /* SDA, SCL */
++ RCAR_GP_PIN(3, 16), RCAR_GP_PIN(3, 15),
++};
++static const unsigned int i2c4_mux[] = {
++ SDA4_MARK, SCL4_MARK,
++};
++
++/* - INTC-EX ---------------------------------------------------------------- */
++static const unsigned int intc_ex_irq0_pins[] = {
++ /* IRQ0 */
++ RCAR_GP_PIN(1, 0),
++};
++static const unsigned int intc_ex_irq0_mux[] = {
++ IRQ0_MARK,
++};
++static const unsigned int intc_ex_irq1_pins[] = {
++ /* IRQ1 */
++ RCAR_GP_PIN(0, 11),
++};
++static const unsigned int intc_ex_irq1_mux[] = {
++ IRQ1_MARK,
++};
++static const unsigned int intc_ex_irq2_pins[] = {
++ /* IRQ2 */
++ RCAR_GP_PIN(0, 12),
++};
++static const unsigned int intc_ex_irq2_mux[] = {
++ IRQ2_MARK,
++};
++static const unsigned int intc_ex_irq3_pins[] = {
++ /* IRQ3 */
++ RCAR_GP_PIN(0, 19),
++};
++static const unsigned int intc_ex_irq3_mux[] = {
++ IRQ3_MARK,
++};
++static const unsigned int intc_ex_irq4_pins[] = {
++ /* IRQ4 */
++ RCAR_GP_PIN(3, 15),
++};
++static const unsigned int intc_ex_irq4_mux[] = {
++ IRQ4_MARK,
++};
++static const unsigned int intc_ex_irq5_pins[] = {
++ /* IRQ5 */
++ RCAR_GP_PIN(3, 16),
++};
++static const unsigned int intc_ex_irq5_mux[] = {
++ IRQ5_MARK,
++};
++
++/* - MMC -------------------------------------------------------------------- */
++static const unsigned int mmc_data1_pins[] = {
++ /* D0 */
++ RCAR_GP_PIN(3, 6),
++};
++static const unsigned int mmc_data1_mux[] = {
++ MMC_D0_MARK,
++};
++static const unsigned int mmc_data4_pins[] = {
++ /* D[0:3] */
++ RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
++ RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9),
++};
++static const unsigned int mmc_data4_mux[] = {
++ MMC_D0_MARK, MMC_D1_MARK,
++ MMC_D2_MARK, MMC_D3_MARK,
++};
++static const unsigned int mmc_data8_pins[] = {
++ /* D[0:7] */
++ RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
++ RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9),
++ RCAR_GP_PIN(3, 11), RCAR_GP_PIN(3, 12),
++ RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 14),
++};
++static const unsigned int mmc_data8_mux[] = {
++ MMC_D0_MARK, MMC_D1_MARK,
++ MMC_D2_MARK, MMC_D3_MARK,
++ MMC_D4_MARK, MMC_D5_MARK,
++ MMC_D6_MARK, MMC_D7_MARK,
++};
++static const unsigned int mmc_ctrl_pins[] = {
++ /* CLK, CMD */
++ RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 5),
++};
++static const unsigned int mmc_ctrl_mux[] = {
++ MMC_CLK_MARK, MMC_CMD_MARK,
++};
++static const unsigned int mmc_cd_pins[] = {
++ /* CD */
++ RCAR_GP_PIN(3, 16),
++};
++static const unsigned int mmc_cd_mux[] = {
++ MMC_CD_MARK,
++};
++static const unsigned int mmc_wp_pins[] = {
++ /* WP */
++ RCAR_GP_PIN(3, 15),
++};
++static const unsigned int mmc_wp_mux[] = {
++ MMC_WP_MARK,
++};
++
++/* - MSIOF0 ----------------------------------------------------------------- */
++static const unsigned int msiof0_clk_pins[] = {
++ /* SCK */
++ RCAR_GP_PIN(4, 2),
++};
++static const unsigned int msiof0_clk_mux[] = {
++ MSIOF0_SCK_MARK,
++};
++static const unsigned int msiof0_sync_pins[] = {
++ /* SYNC */
++ RCAR_GP_PIN(4, 3),
++};
++static const unsigned int msiof0_sync_mux[] = {
++ MSIOF0_SYNC_MARK,
++};
++static const unsigned int msiof0_ss1_pins[] = {
++ /* SS1 */
++ RCAR_GP_PIN(4, 4),
++};
++static const unsigned int msiof0_ss1_mux[] = {
++ MSIOF0_SS1_MARK,
++};
++static const unsigned int msiof0_ss2_pins[] = {
++ /* SS2 */
++ RCAR_GP_PIN(4, 5),
++};
++static const unsigned int msiof0_ss2_mux[] = {
++ MSIOF0_SS2_MARK,
++};
++static const unsigned int msiof0_txd_pins[] = {
++ /* TXD */
++ RCAR_GP_PIN(4, 1),
++};
++static const unsigned int msiof0_txd_mux[] = {
++ MSIOF0_TXD_MARK,
++};
++static const unsigned int msiof0_rxd_pins[] = {
++ /* RXD */
++ RCAR_GP_PIN(4, 0),
++};
++static const unsigned int msiof0_rxd_mux[] = {
++ MSIOF0_RXD_MARK,
++};
++
++/* - MSIOF1 ----------------------------------------------------------------- */
++static const unsigned int msiof1_clk_pins[] = {
++ /* SCK */
++ RCAR_GP_PIN(3, 2),
++};
++static const unsigned int msiof1_clk_mux[] = {
++ MSIOF1_SCK_MARK,
++};
++static const unsigned int msiof1_sync_pins[] = {
++ /* SYNC */
++ RCAR_GP_PIN(3, 3),
++};
++static const unsigned int msiof1_sync_mux[] = {
++ MSIOF1_SYNC_MARK,
++};
++static const unsigned int msiof1_ss1_pins[] = {
++ /* SS1 */
++ RCAR_GP_PIN(3, 4),
++};
++static const unsigned int msiof1_ss1_mux[] = {
++ MSIOF1_SS1_MARK,
++};
++static const unsigned int msiof1_ss2_pins[] = {
++ /* SS2 */
++ RCAR_GP_PIN(3, 5),
++};
++static const unsigned int msiof1_ss2_mux[] = {
++ MSIOF1_SS2_MARK,
++};
++static const unsigned int msiof1_txd_pins[] = {
++ /* TXD */
++ RCAR_GP_PIN(3, 1),
++};
++static const unsigned int msiof1_txd_mux[] = {
++ MSIOF1_TXD_MARK,
++};
++static const unsigned int msiof1_rxd_pins[] = {
++ /* RXD */
++ RCAR_GP_PIN(3, 0),
++};
++static const unsigned int msiof1_rxd_mux[] = {
++ MSIOF1_RXD_MARK,
++};
++
++/* - MSIOF2 ----------------------------------------------------------------- */
++static const unsigned int msiof2_clk_pins[] = {
++ /* SCK */
++ RCAR_GP_PIN(2, 0),
++};
++static const unsigned int msiof2_clk_mux[] = {
++ MSIOF2_SCK_MARK,
++};
++static const unsigned int msiof2_sync_pins[] = {
++ /* SYNC */
++ RCAR_GP_PIN(2, 3),
++};
++static const unsigned int msiof2_sync_mux[] = {
++ MSIOF2_SYNC_MARK,
++};
++static const unsigned int msiof2_ss1_pins[] = {
++ /* SS1 */
++ RCAR_GP_PIN(2, 4),
++};
++static const unsigned int msiof2_ss1_mux[] = {
++ MSIOF2_SS1_MARK,
++};
++static const unsigned int msiof2_ss2_pins[] = {
++ /* SS2 */
++ RCAR_GP_PIN(2, 5),
++};
++static const unsigned int msiof2_ss2_mux[] = {
++ MSIOF2_SS2_MARK,
++};
++static const unsigned int msiof2_txd_pins[] = {
++ /* TXD */
++ RCAR_GP_PIN(2, 2),
++};
++static const unsigned int msiof2_txd_mux[] = {
++ MSIOF2_TXD_MARK,
++};
++static const unsigned int msiof2_rxd_pins[] = {
++ /* RXD */
++ RCAR_GP_PIN(2, 1),
++};
++static const unsigned int msiof2_rxd_mux[] = {
++ MSIOF2_RXD_MARK,
++};
++
++/* - MSIOF3 ----------------------------------------------------------------- */
++static const unsigned int msiof3_clk_pins[] = {
++ /* SCK */
++ RCAR_GP_PIN(0, 20),
++};
++static const unsigned int msiof3_clk_mux[] = {
++ MSIOF3_SCK_MARK,
++};
++static const unsigned int msiof3_sync_pins[] = {
++ /* SYNC */
++ RCAR_GP_PIN(0, 21),
++};
++static const unsigned int msiof3_sync_mux[] = {
++ MSIOF3_SYNC_MARK,
++};
++static const unsigned int msiof3_ss1_pins[] = {
++ /* SS1 */
++ RCAR_GP_PIN(0, 6),
++};
++static const unsigned int msiof3_ss1_mux[] = {
++ MSIOF3_SS1_MARK,
++};
++static const unsigned int msiof3_ss2_pins[] = {
++ /* SS2 */
++ RCAR_GP_PIN(0, 7),
++};
++static const unsigned int msiof3_ss2_mux[] = {
++ MSIOF3_SS2_MARK,
++};
++static const unsigned int msiof3_txd_pins[] = {
++ /* TXD */
++ RCAR_GP_PIN(0, 5),
++};
++static const unsigned int msiof3_txd_mux[] = {
++ MSIOF3_TXD_MARK,
++};
++static const unsigned int msiof3_rxd_pins[] = {
++ /* RXD */
++ RCAR_GP_PIN(0, 4),
++};
++static const unsigned int msiof3_rxd_mux[] = {
++ MSIOF3_RXD_MARK,
++};
++
++/* - PWM0 ------------------------------------------------------------------- */
++static const unsigned int pwm0_a_pins[] = {
++ RCAR_GP_PIN(2, 12),
++};
++static const unsigned int pwm0_a_mux[] = {
++ PWM0_A_MARK,
++};
++static const unsigned int pwm0_b_pins[] = {
++ RCAR_GP_PIN(1, 21),
++};
++static const unsigned int pwm0_b_mux[] = {
++ PWM0_B_MARK,
++};
++
++/* - PWM1 ------------------------------------------------------------------- */
++static const unsigned int pwm1_a_pins[] = {
++ RCAR_GP_PIN(2, 13),
++};
++static const unsigned int pwm1_a_mux[] = {
++ PWM1_A_MARK,
++};
++static const unsigned int pwm1_b_pins[] = {
++ RCAR_GP_PIN(1, 22),
++};
++static const unsigned int pwm1_b_mux[] = {
++ PWM1_B_MARK,
++};
++
++/* - PWM2 ------------------------------------------------------------------- */
++static const unsigned int pwm2_a_pins[] = {
++ RCAR_GP_PIN(2, 14),
++};
++static const unsigned int pwm2_a_mux[] = {
++ PWM2_A_MARK,
++};
++static const unsigned int pwm2_b_pins[] = {
++ RCAR_GP_PIN(1, 23),
++};
++static const unsigned int pwm2_b_mux[] = {
++ PWM2_B_MARK,
++};
++
++/* - PWM3 ------------------------------------------------------------------- */
++static const unsigned int pwm3_a_pins[] = {
++ RCAR_GP_PIN(2, 15),
++};
++static const unsigned int pwm3_a_mux[] = {
++ PWM3_A_MARK,
++};
++static const unsigned int pwm3_b_pins[] = {
++ RCAR_GP_PIN(1, 24),
++};
++static const unsigned int pwm3_b_mux[] = {
++ PWM3_B_MARK,
++};
++
++/* - PWM4 ------------------------------------------------------------------- */
++static const unsigned int pwm4_a_pins[] = {
++ RCAR_GP_PIN(2, 16),
++};
++static const unsigned int pwm4_a_mux[] = {
++ PWM4_A_MARK,
++};
++static const unsigned int pwm4_b_pins[] = {
++ RCAR_GP_PIN(1, 25),
++};
++static const unsigned int pwm4_b_mux[] = {
++ PWM4_B_MARK,
++};
++
++/* - SCIF Clock ------------------------------------------------------------- */
++static const unsigned int scif_clk_a_pins[] = {
++ /* SCIF_CLK */
++ RCAR_GP_PIN(0, 18),
++};
++static const unsigned int scif_clk_a_mux[] = {
++ SCIF_CLK_A_MARK,
++};
++static const unsigned int scif_clk_b_pins[] = {
++ /* SCIF_CLK */
++ RCAR_GP_PIN(1, 25),
++};
++static const unsigned int scif_clk_b_mux[] = {
++ SCIF_CLK_B_MARK,
++};
++
++/* - SCIF0 ------------------------------------------------------------------ */
++static const unsigned int scif0_data_pins[] = {
++ /* RX, TX */
++ RCAR_GP_PIN(4, 4), RCAR_GP_PIN(4, 5),
++};
++static const unsigned int scif0_data_mux[] = {
++ RX0_MARK, TX0_MARK,
++};
++static const unsigned int scif0_clk_pins[] = {
++ /* SCK */
++ RCAR_GP_PIN(4, 1),
++};
++static const unsigned int scif0_clk_mux[] = {
++ SCK0_MARK,
++};
++static const unsigned int scif0_ctrl_pins[] = {
++ /* RTS#, CTS# */
++ RCAR_GP_PIN(4, 3), RCAR_GP_PIN(4, 2),
++};
++static const unsigned int scif0_ctrl_mux[] = {
++ RTS0_N_TANS_MARK, CTS0_N_MARK,
++};
++
++/* - SCIF1 ------------------------------------------------------------------ */
++static const unsigned int scif1_data_a_pins[] = {
++ /* RX, TX */
++ RCAR_GP_PIN(2, 8), RCAR_GP_PIN(2, 9),
++};
++static const unsigned int scif1_data_a_mux[] = {
++ RX1_A_MARK, TX1_A_MARK,
++};
++static const unsigned int scif1_clk_pins[] = {
++ /* SCK */
++ RCAR_GP_PIN(2, 5),
++};
++static const unsigned int scif1_clk_mux[] = {
++ SCK1_MARK,
++};
++static const unsigned int scif1_ctrl_pins[] = {
++ /* RTS#, CTS# */
++ RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 10),
++};
++static const unsigned int scif1_ctrl_mux[] = {
++ RTS1_N_TANS_MARK, CTS1_N_MARK,
++};
++static const unsigned int scif1_data_b_pins[] = {
++ /* RX, TX */
++ RCAR_GP_PIN(1, 24), RCAR_GP_PIN(1, 23),
++};
++static const unsigned int scif1_data_b_mux[] = {
++ RX1_B_MARK, TX1_B_MARK,
++};
++
++/* - SCIF3 ------------------------------------------------------------------ */
++static const unsigned int scif3_data_pins[] = {
++ /* RX, TX */
++ RCAR_GP_PIN(2, 1), RCAR_GP_PIN(2, 2),
++};
++static const unsigned int scif3_data_mux[] = {
++ RX3_MARK, TX3_MARK,
++};
++static const unsigned int scif3_clk_pins[] = {
++ /* SCK */
++ RCAR_GP_PIN(2, 0),
++};
++static const unsigned int scif3_clk_mux[] = {
++ SCK3_MARK,
++};
++static const unsigned int scif3_ctrl_pins[] = {
++ /* RTS#, CTS# */
++ RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 3),
++};
++static const unsigned int scif3_ctrl_mux[] = {
++ RTS3_N_TANS_MARK, CTS3_N_MARK,
++};
++
++/* - SCIF4 ------------------------------------------------------------------ */
++static const unsigned int scif4_data_pins[] = {
++ /* RX, TX */
++ RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11),
++};
++static const unsigned int scif4_data_mux[] = {
++ RX4_MARK, TX4_MARK,
++};
++static const unsigned int scif4_clk_pins[] = {
++ /* SCK */
++ RCAR_GP_PIN(3, 9),
++};
++static const unsigned int scif4_clk_mux[] = {
++ SCK4_MARK,
++};
++static const unsigned int scif4_ctrl_pins[] = {
++ /* RTS#, CTS# */
++ RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 12),
++};
++static const unsigned int scif4_ctrl_mux[] = {
++ RTS4_N_TANS_MARK, CTS4_N_MARK,
++};
++
++/* - TMU -------------------------------------------------------------------- */
++static const unsigned int tmu_tclk1_a_pins[] = {
++ /* TCLK1 */
++ RCAR_GP_PIN(4, 4),
++};
++static const unsigned int tmu_tclk1_a_mux[] = {
++ TCLK1_A_MARK,
++};
++static const unsigned int tmu_tclk1_b_pins[] = {
++ /* TCLK1 */
++ RCAR_GP_PIN(1, 23),
++};
++static const unsigned int tmu_tclk1_b_mux[] = {
++ TCLK1_B_MARK,
++};
++static const unsigned int tmu_tclk2_a_pins[] = {
++ /* TCLK2 */
++ RCAR_GP_PIN(4, 5),
++};
++static const unsigned int tmu_tclk2_a_mux[] = {
++ TCLK2_A_MARK,
++};
++static const unsigned int tmu_tclk2_b_pins[] = {
++ /* TCLK2 */
++ RCAR_GP_PIN(1, 24),
++};
++static const unsigned int tmu_tclk2_b_mux[] = {
++ TCLK2_B_MARK,
++};
++
++/* - VIN0 ------------------------------------------------------------------- */
++static const unsigned int vin0_data8_pins[] = {
++ RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 5),
++ RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 7),
++ RCAR_GP_PIN(2, 8), RCAR_GP_PIN(2, 9),
++ RCAR_GP_PIN(2, 10), RCAR_GP_PIN(2, 11),
++};
++static const unsigned int vin0_data8_mux[] = {
++ VI0_DATA0_MARK, VI0_DATA1_MARK,
++ VI0_DATA2_MARK, VI0_DATA3_MARK,
++ VI0_DATA4_MARK, VI0_DATA5_MARK,
++ VI0_DATA6_MARK, VI0_DATA7_MARK,
++};
++static const unsigned int vin0_data10_pins[] = {
++ RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 5),
++ RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 7),
++ RCAR_GP_PIN(2, 8), RCAR_GP_PIN(2, 9),
++ RCAR_GP_PIN(2, 10), RCAR_GP_PIN(2, 11),
++ RCAR_GP_PIN(2, 12), RCAR_GP_PIN(2, 13),
++};
++static const unsigned int vin0_data10_mux[] = {
++ VI0_DATA0_MARK, VI0_DATA1_MARK,
++ VI0_DATA2_MARK, VI0_DATA3_MARK,
++ VI0_DATA4_MARK, VI0_DATA5_MARK,
++ VI0_DATA6_MARK, VI0_DATA7_MARK,
++ VI0_DATA8_MARK, VI0_DATA9_MARK,
++};
++static const unsigned int vin0_data12_pins[] = {
++ RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 5),
++ RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 7),
++ RCAR_GP_PIN(2, 8), RCAR_GP_PIN(2, 9),
++ RCAR_GP_PIN(2, 10), RCAR_GP_PIN(2, 11),
++ RCAR_GP_PIN(2, 12), RCAR_GP_PIN(2, 13),
++ RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 15),
++};
++static const unsigned int vin0_data12_mux[] = {
++ VI0_DATA0_MARK, VI0_DATA1_MARK,
++ VI0_DATA2_MARK, VI0_DATA3_MARK,
++ VI0_DATA4_MARK, VI0_DATA5_MARK,
++ VI0_DATA6_MARK, VI0_DATA7_MARK,
++ VI0_DATA8_MARK, VI0_DATA9_MARK,
++ VI0_DATA10_MARK, VI0_DATA11_MARK,
++};
++static const unsigned int vin0_sync_pins[] = {
++ /* HSYNC#, VSYNC# */
++ RCAR_GP_PIN(2, 2), RCAR_GP_PIN(2, 3),
++};
++static const unsigned int vin0_sync_mux[] = {
++ VI0_HSYNC_N_MARK, VI0_VSYNC_N_MARK,
++};
++static const unsigned int vin0_field_pins[] = {
++ /* FIELD */
++ RCAR_GP_PIN(2, 16),
++};
++static const unsigned int vin0_field_mux[] = {
++ VI0_FIELD_MARK,
++};
++static const unsigned int vin0_clkenb_pins[] = {
++ /* CLKENB */
++ RCAR_GP_PIN(2, 1),
++};
++static const unsigned int vin0_clkenb_mux[] = {
++ VI0_CLKENB_MARK,
++};
++static const unsigned int vin0_clk_pins[] = {
++ /* CLK */
++ RCAR_GP_PIN(2, 0),
++};
++static const unsigned int vin0_clk_mux[] = {
++ VI0_CLK_MARK,
++};
++
++/* - VIN1 ------------------------------------------------------------------- */
++static const unsigned int vin1_data8_pins[] = {
++ RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5),
++ RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
++ RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9),
++ RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11),
++};
++static const unsigned int vin1_data8_mux[] = {
++ VI1_DATA0_MARK, VI1_DATA1_MARK,
++ VI1_DATA2_MARK, VI1_DATA3_MARK,
++ VI1_DATA4_MARK, VI1_DATA5_MARK,
++ VI1_DATA6_MARK, VI1_DATA7_MARK,
++};
++static const unsigned int vin1_data10_pins[] = {
++ RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5),
++ RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
++ RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9),
++ RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11),
++ RCAR_GP_PIN(3, 12), RCAR_GP_PIN(3, 13),
++};
++static const unsigned int vin1_data10_mux[] = {
++ VI1_DATA0_MARK, VI1_DATA1_MARK,
++ VI1_DATA2_MARK, VI1_DATA3_MARK,
++ VI1_DATA4_MARK, VI1_DATA5_MARK,
++ VI1_DATA6_MARK, VI1_DATA7_MARK,
++ VI1_DATA8_MARK, VI1_DATA9_MARK,
++};
++static const unsigned int vin1_data12_pins[] = {
++ RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5),
++ RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
++ RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9),
++ RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11),
++ RCAR_GP_PIN(3, 12), RCAR_GP_PIN(3, 13),
++ RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 15),
++};
++static const unsigned int vin1_data12_mux[] = {
++ VI1_DATA0_MARK, VI1_DATA1_MARK,
++ VI1_DATA2_MARK, VI1_DATA3_MARK,
++ VI1_DATA4_MARK, VI1_DATA5_MARK,
++ VI1_DATA6_MARK, VI1_DATA7_MARK,
++ VI1_DATA8_MARK, VI1_DATA9_MARK,
++ VI1_DATA10_MARK, VI1_DATA11_MARK,
++};
++static const unsigned int vin1_sync_pins[] = {
++ /* HSYNC#, VSYNC# */
++ RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3),
++};
++static const unsigned int vin1_sync_mux[] = {
++ VI1_HSYNC_N_MARK, VI1_VSYNC_N_MARK,
++};
++static const unsigned int vin1_field_pins[] = {
++ RCAR_GP_PIN(3, 16),
++};
++static const unsigned int vin1_field_mux[] = {
++ /* FIELD */
++ VI1_FIELD_MARK,
++};
++static const unsigned int vin1_clkenb_pins[] = {
++ RCAR_GP_PIN(3, 1),
++};
++static const unsigned int vin1_clkenb_mux[] = {
++ /* CLKENB */
++ VI1_CLKENB_MARK,
++};
++static const unsigned int vin1_clk_pins[] = {
++ RCAR_GP_PIN(3, 0),
++};
++static const unsigned int vin1_clk_mux[] = {
++ /* CLK */
++ VI1_CLK_MARK,
++};
++
++static const struct sh_pfc_pin_group pinmux_groups[] = {
++ SH_PFC_PIN_GROUP(canfd_clk_a),
++ SH_PFC_PIN_GROUP(canfd_clk_b),
++ SH_PFC_PIN_GROUP(canfd0_data_a),
++ SH_PFC_PIN_GROUP(canfd0_data_b),
++ SH_PFC_PIN_GROUP(canfd1_data),
++ SH_PFC_PIN_GROUP(du_rgb666),
++ SH_PFC_PIN_GROUP(du_clk_out),
++ SH_PFC_PIN_GROUP(du_sync),
++ SH_PFC_PIN_GROUP(du_oddf),
++ SH_PFC_PIN_GROUP(du_cde),
++ SH_PFC_PIN_GROUP(du_disp),
++ SH_PFC_PIN_GROUP(hscif0_data),
++ SH_PFC_PIN_GROUP(hscif0_clk),
++ SH_PFC_PIN_GROUP(hscif0_ctrl),
++ SH_PFC_PIN_GROUP(hscif1_data),
++ SH_PFC_PIN_GROUP(hscif1_clk),
++ SH_PFC_PIN_GROUP(hscif1_ctrl),
++ SH_PFC_PIN_GROUP(hscif2_data),
++ SH_PFC_PIN_GROUP(hscif2_clk),
++ SH_PFC_PIN_GROUP(hscif2_ctrl),
++ SH_PFC_PIN_GROUP(hscif3_data),
++ SH_PFC_PIN_GROUP(hscif3_clk),
++ SH_PFC_PIN_GROUP(hscif3_ctrl),
++ SH_PFC_PIN_GROUP(i2c0),
++ SH_PFC_PIN_GROUP(i2c1),
++ SH_PFC_PIN_GROUP(i2c2),
++ SH_PFC_PIN_GROUP(i2c3_a),
++ SH_PFC_PIN_GROUP(i2c3_b),
++ SH_PFC_PIN_GROUP(i2c4),
++ SH_PFC_PIN_GROUP(intc_ex_irq0),
++ SH_PFC_PIN_GROUP(intc_ex_irq1),
++ SH_PFC_PIN_GROUP(intc_ex_irq2),
++ SH_PFC_PIN_GROUP(intc_ex_irq3),
++ SH_PFC_PIN_GROUP(intc_ex_irq4),
++ SH_PFC_PIN_GROUP(intc_ex_irq5),
++ SH_PFC_PIN_GROUP(mmc_data1),
++ SH_PFC_PIN_GROUP(mmc_data4),
++ SH_PFC_PIN_GROUP(mmc_data8),
++ SH_PFC_PIN_GROUP(mmc_ctrl),
++ SH_PFC_PIN_GROUP(mmc_cd),
++ SH_PFC_PIN_GROUP(mmc_wp),
++ SH_PFC_PIN_GROUP(msiof0_clk),
++ SH_PFC_PIN_GROUP(msiof0_sync),
++ SH_PFC_PIN_GROUP(msiof0_ss1),
++ SH_PFC_PIN_GROUP(msiof0_ss2),
++ SH_PFC_PIN_GROUP(msiof0_txd),
++ SH_PFC_PIN_GROUP(msiof0_rxd),
++ SH_PFC_PIN_GROUP(msiof1_clk),
++ SH_PFC_PIN_GROUP(msiof1_sync),
++ SH_PFC_PIN_GROUP(msiof1_ss1),
++ SH_PFC_PIN_GROUP(msiof1_ss2),
++ SH_PFC_PIN_GROUP(msiof1_txd),
++ SH_PFC_PIN_GROUP(msiof1_rxd),
++ SH_PFC_PIN_GROUP(msiof2_clk),
++ SH_PFC_PIN_GROUP(msiof2_sync),
++ SH_PFC_PIN_GROUP(msiof2_ss1),
++ SH_PFC_PIN_GROUP(msiof2_ss2),
++ SH_PFC_PIN_GROUP(msiof2_txd),
++ SH_PFC_PIN_GROUP(msiof2_rxd),
++ SH_PFC_PIN_GROUP(msiof3_clk),
++ SH_PFC_PIN_GROUP(msiof3_sync),
++ SH_PFC_PIN_GROUP(msiof3_ss1),
++ SH_PFC_PIN_GROUP(msiof3_ss2),
++ SH_PFC_PIN_GROUP(msiof3_txd),
++ SH_PFC_PIN_GROUP(msiof3_rxd),
++ SH_PFC_PIN_GROUP(pwm0_a),
++ SH_PFC_PIN_GROUP(pwm0_b),
++ SH_PFC_PIN_GROUP(pwm1_a),
++ SH_PFC_PIN_GROUP(pwm1_b),
++ SH_PFC_PIN_GROUP(pwm2_a),
++ SH_PFC_PIN_GROUP(pwm2_b),
++ SH_PFC_PIN_GROUP(pwm3_a),
++ SH_PFC_PIN_GROUP(pwm3_b),
++ SH_PFC_PIN_GROUP(pwm4_a),
++ SH_PFC_PIN_GROUP(pwm4_b),
++ SH_PFC_PIN_GROUP(scif_clk_a),
++ SH_PFC_PIN_GROUP(scif_clk_b),
++ SH_PFC_PIN_GROUP(scif0_data),
++ SH_PFC_PIN_GROUP(scif0_clk),
++ SH_PFC_PIN_GROUP(scif0_ctrl),
++ SH_PFC_PIN_GROUP(scif1_data_a),
++ SH_PFC_PIN_GROUP(scif1_clk),
++ SH_PFC_PIN_GROUP(scif1_ctrl),
++ SH_PFC_PIN_GROUP(scif1_data_b),
++ SH_PFC_PIN_GROUP(scif3_data),
++ SH_PFC_PIN_GROUP(scif3_clk),
++ SH_PFC_PIN_GROUP(scif3_ctrl),
++ SH_PFC_PIN_GROUP(scif4_data),
++ SH_PFC_PIN_GROUP(scif4_clk),
++ SH_PFC_PIN_GROUP(scif4_ctrl),
++ SH_PFC_PIN_GROUP(tmu_tclk1_a),
++ SH_PFC_PIN_GROUP(tmu_tclk1_b),
++ SH_PFC_PIN_GROUP(tmu_tclk2_a),
++ SH_PFC_PIN_GROUP(tmu_tclk2_b),
++ SH_PFC_PIN_GROUP(vin0_data8),
++ SH_PFC_PIN_GROUP(vin0_data10),
++ SH_PFC_PIN_GROUP(vin0_data12),
++ SH_PFC_PIN_GROUP(vin0_sync),
++ SH_PFC_PIN_GROUP(vin0_field),
++ SH_PFC_PIN_GROUP(vin0_clkenb),
++ SH_PFC_PIN_GROUP(vin0_clk),
++ SH_PFC_PIN_GROUP(vin1_data8),
++ SH_PFC_PIN_GROUP(vin1_data10),
++ SH_PFC_PIN_GROUP(vin1_data12),
++ SH_PFC_PIN_GROUP(vin1_sync),
++ SH_PFC_PIN_GROUP(vin1_field),
++ SH_PFC_PIN_GROUP(vin1_clkenb),
++ SH_PFC_PIN_GROUP(vin1_clk),
++};
++
++static const char * const canfd_clk_groups[] = {
++ "canfd_clk_a",
++ "canfd_clk_b",
++};
++
++static const char * const canfd0_groups[] = {
++ "canfd0_data_a",
++ "canfd0_data_b",
++};
++
++static const char * const canfd1_groups[] = {
++ "canfd1_data",
++};
++
++static const char * const du_groups[] = {
++ "du_rgb666",
++ "du_clk_out",
++ "du_sync",
++ "du_oddf",
++ "du_cde",
++ "du_disp",
++};
++
++static const char * const hscif0_groups[] = {
++ "hscif0_data",
++ "hscif0_clk",
++ "hscif0_ctrl",
++};
++
++static const char * const hscif1_groups[] = {
++ "hscif1_data",
++ "hscif1_clk",
++ "hscif1_ctrl",
++};
++
++static const char * const hscif2_groups[] = {
++ "hscif2_data",
++ "hscif2_clk",
++ "hscif2_ctrl",
++};
++
++static const char * const hscif3_groups[] = {
++ "hscif3_data",
++ "hscif3_clk",
++ "hscif3_ctrl",
++};
++
++static const char * const i2c0_groups[] = {
++ "i2c0",
++};
++
++static const char * const i2c1_groups[] = {
++ "i2c1",
++};
++
++static const char * const i2c2_groups[] = {
++ "i2c2",
++};
++
++static const char * const i2c3_groups[] = {
++ "i2c3_a",
++ "i2c3_b",
++};
++
++static const char * const i2c4_groups[] = {
++ "i2c4",
++};
++
++static const char * const intc_ex_groups[] = {
++ "intc_ex_irq0",
++ "intc_ex_irq1",
++ "intc_ex_irq2",
++ "intc_ex_irq3",
++ "intc_ex_irq4",
++ "intc_ex_irq5",
++};
++
++static const char * const mmc_groups[] = {
++ "mmc_data1",
++ "mmc_data4",
++ "mmc_data8",
++ "mmc_ctrl",
++ "mmc_cd",
++ "mmc_wp",
++};
++
++static const char * const msiof0_groups[] = {
++ "msiof0_clk",
++ "msiof0_sync",
++ "msiof0_ss1",
++ "msiof0_ss2",
++ "msiof0_txd",
++ "msiof0_rxd",
++};
++
++static const char * const msiof1_groups[] = {
++ "msiof1_clk",
++ "msiof1_sync",
++ "msiof1_ss1",
++ "msiof1_ss2",
++ "msiof1_txd",
++ "msiof1_rxd",
++};
++
++static const char * const msiof2_groups[] = {
++ "msiof2_clk",
++ "msiof2_sync",
++ "msiof2_ss1",
++ "msiof2_ss2",
++ "msiof2_txd",
++ "msiof2_rxd",
++};
++
++static const char * const msiof3_groups[] = {
++ "msiof3_clk",
++ "msiof3_sync",
++ "msiof3_ss1",
++ "msiof3_ss2",
++ "msiof3_txd",
++ "msiof3_rxd",
++};
++
++static const char * const pwm0_groups[] = {
++ "pwm0_a",
++ "pwm0_b",
++};
++
++static const char * const pwm1_groups[] = {
++ "pwm1_a",
++ "pwm1_b",
++};
++
++static const char * const pwm2_groups[] = {
++ "pwm2_a",
++ "pwm2_b",
++};
++
++static const char * const pwm3_groups[] = {
++ "pwm3_a",
++ "pwm3_b",
++};
++
++static const char * const pwm4_groups[] = {
++ "pwm4_a",
++ "pwm4_b",
++};
++
++static const char * const scif_clk_groups[] = {
++ "scif_clk_a",
++ "scif_clk_b",
++};
++
++static const char * const scif0_groups[] = {
++ "scif0_data",
++ "scif0_clk",
++ "scif0_ctrl",
++};
++
++static const char * const scif1_groups[] = {
++ "scif1_data_a",
++ "scif1_clk",
++ "scif1_ctrl",
++ "scif1_data_b",
++};
++
++static const char * const scif3_groups[] = {
++ "scif3_data",
++ "scif3_clk",
++ "scif3_ctrl",
++};
++
++static const char * const scif4_groups[] = {
++ "scif4_data",
++ "scif4_clk",
++ "scif4_ctrl",
++};
++
++static const char * const tmu_groups[] = {
++ "tmu_tclk1_a",
++ "tmu_tclk1_b",
++ "tmu_tclk2_a",
++ "tmu_tclk2_b",
++};
++
++static const char * const vin0_groups[] = {
++ "vin0_data8",
++ "vin0_data10",
++ "vin0_data12",
++ "vin0_sync",
++ "vin0_field",
++ "vin0_clkenb",
++ "vin0_clk",
++};
++
++static const char * const vin1_groups[] = {
++ "vin1_data8",
++ "vin1_data10",
++ "vin1_data12",
++ "vin1_sync",
++ "vin1_field",
++ "vin1_clkenb",
++ "vin1_clk",
++};
++
++static const struct sh_pfc_function pinmux_functions[] = {
++ SH_PFC_FUNCTION(canfd_clk),
++ SH_PFC_FUNCTION(canfd0),
++ SH_PFC_FUNCTION(canfd1),
++ SH_PFC_FUNCTION(du),
++ SH_PFC_FUNCTION(hscif0),
++ SH_PFC_FUNCTION(hscif1),
++ SH_PFC_FUNCTION(hscif2),
++ SH_PFC_FUNCTION(hscif3),
++ SH_PFC_FUNCTION(i2c0),
++ SH_PFC_FUNCTION(i2c1),
++ SH_PFC_FUNCTION(i2c2),
++ SH_PFC_FUNCTION(i2c3),
++ SH_PFC_FUNCTION(i2c4),
++ SH_PFC_FUNCTION(intc_ex),
++ SH_PFC_FUNCTION(mmc),
++ SH_PFC_FUNCTION(msiof0),
++ SH_PFC_FUNCTION(msiof1),
++ SH_PFC_FUNCTION(msiof2),
++ SH_PFC_FUNCTION(msiof3),
++ SH_PFC_FUNCTION(pwm0),
++ SH_PFC_FUNCTION(pwm1),
++ SH_PFC_FUNCTION(pwm2),
++ SH_PFC_FUNCTION(pwm3),
++ SH_PFC_FUNCTION(pwm4),
++ SH_PFC_FUNCTION(scif_clk),
++ SH_PFC_FUNCTION(scif0),
++ SH_PFC_FUNCTION(scif1),
++ SH_PFC_FUNCTION(scif3),
++ SH_PFC_FUNCTION(scif4),
++ SH_PFC_FUNCTION(tmu),
++ SH_PFC_FUNCTION(vin0),
++ SH_PFC_FUNCTION(vin1),
++};
++
++static const struct pinmux_cfg_reg pinmux_config_regs[] = {
++#define F_(x, y) FN_##y
++#define FM(x) FN_##x
++ { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1) {
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ GP_0_21_FN, GPSR0_21,
++ GP_0_20_FN, GPSR0_20,
++ GP_0_19_FN, GPSR0_19,
++ GP_0_18_FN, GPSR0_18,
++ GP_0_17_FN, GPSR0_17,
++ GP_0_16_FN, GPSR0_16,
++ GP_0_15_FN, GPSR0_15,
++ GP_0_14_FN, GPSR0_14,
++ GP_0_13_FN, GPSR0_13,
++ GP_0_12_FN, GPSR0_12,
++ GP_0_11_FN, GPSR0_11,
++ GP_0_10_FN, GPSR0_10,
++ GP_0_9_FN, GPSR0_9,
++ GP_0_8_FN, GPSR0_8,
++ GP_0_7_FN, GPSR0_7,
++ GP_0_6_FN, GPSR0_6,
++ GP_0_5_FN, GPSR0_5,
++ GP_0_4_FN, GPSR0_4,
++ GP_0_3_FN, GPSR0_3,
++ GP_0_2_FN, GPSR0_2,
++ GP_0_1_FN, GPSR0_1,
++ GP_0_0_FN, GPSR0_0, }
++ },
++ { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1) {
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ GP_1_27_FN, GPSR1_27,
++ GP_1_26_FN, GPSR1_26,
++ GP_1_25_FN, GPSR1_25,
++ GP_1_24_FN, GPSR1_24,
++ GP_1_23_FN, GPSR1_23,
++ GP_1_22_FN, GPSR1_22,
++ GP_1_21_FN, GPSR1_21,
++ GP_1_20_FN, GPSR1_20,
++ GP_1_19_FN, GPSR1_19,
++ GP_1_18_FN, GPSR1_18,
++ GP_1_17_FN, GPSR1_17,
++ GP_1_16_FN, GPSR1_16,
++ GP_1_15_FN, GPSR1_15,
++ GP_1_14_FN, GPSR1_14,
++ GP_1_13_FN, GPSR1_13,
++ GP_1_12_FN, GPSR1_12,
++ GP_1_11_FN, GPSR1_11,
++ GP_1_10_FN, GPSR1_10,
++ GP_1_9_FN, GPSR1_9,
++ GP_1_8_FN, GPSR1_8,
++ GP_1_7_FN, GPSR1_7,
++ GP_1_6_FN, GPSR1_6,
++ GP_1_5_FN, GPSR1_5,
++ GP_1_4_FN, GPSR1_4,
++ GP_1_3_FN, GPSR1_3,
++ GP_1_2_FN, GPSR1_2,
++ GP_1_1_FN, GPSR1_1,
++ GP_1_0_FN, GPSR1_0, }
++ },
++ { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1) {
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ GP_2_16_FN, GPSR2_16,
++ GP_2_15_FN, GPSR2_15,
++ GP_2_14_FN, GPSR2_14,
++ GP_2_13_FN, GPSR2_13,
++ GP_2_12_FN, GPSR2_12,
++ GP_2_11_FN, GPSR2_11,
++ GP_2_10_FN, GPSR2_10,
++ GP_2_9_FN, GPSR2_9,
++ GP_2_8_FN, GPSR2_8,
++ GP_2_7_FN, GPSR2_7,
++ GP_2_6_FN, GPSR2_6,
++ GP_2_5_FN, GPSR2_5,
++ GP_2_4_FN, GPSR2_4,
++ GP_2_3_FN, GPSR2_3,
++ GP_2_2_FN, GPSR2_2,
++ GP_2_1_FN, GPSR2_1,
++ GP_2_0_FN, GPSR2_0, }
++ },
++ { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1) {
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ GP_3_16_FN, GPSR3_16,
++ GP_3_15_FN, GPSR3_15,
++ GP_3_14_FN, GPSR3_14,
++ GP_3_13_FN, GPSR3_13,
++ GP_3_12_FN, GPSR3_12,
++ GP_3_11_FN, GPSR3_11,
++ GP_3_10_FN, GPSR3_10,
++ GP_3_9_FN, GPSR3_9,
++ GP_3_8_FN, GPSR3_8,
++ GP_3_7_FN, GPSR3_7,
++ GP_3_6_FN, GPSR3_6,
++ GP_3_5_FN, GPSR3_5,
++ GP_3_4_FN, GPSR3_4,
++ GP_3_3_FN, GPSR3_3,
++ GP_3_2_FN, GPSR3_2,
++ GP_3_1_FN, GPSR3_1,
++ GP_3_0_FN, GPSR3_0, }
++ },
++ { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1) {
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ GP_4_5_FN, GPSR4_5,
++ GP_4_4_FN, GPSR4_4,
++ GP_4_3_FN, GPSR4_3,
++ GP_4_2_FN, GPSR4_2,
++ GP_4_1_FN, GPSR4_1,
++ GP_4_0_FN, GPSR4_0, }
++ },
++ { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1) {
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ 0, 0,
++ GP_5_14_FN, GPSR5_14,
++ GP_5_13_FN, GPSR5_13,
++ GP_5_12_FN, GPSR5_12,
++ GP_5_11_FN, GPSR5_11,
++ GP_5_10_FN, GPSR5_10,
++ GP_5_9_FN, GPSR5_9,
++ GP_5_8_FN, GPSR5_8,
++ GP_5_7_FN, GPSR5_7,
++ GP_5_6_FN, GPSR5_6,
++ GP_5_5_FN, GPSR5_5,
++ GP_5_4_FN, GPSR5_4,
++ GP_5_3_FN, GPSR5_3,
++ GP_5_2_FN, GPSR5_2,
++ GP_5_1_FN, GPSR5_1,
++ GP_5_0_FN, GPSR5_0, }
++ },
++#undef F_
++#undef FM
++
++#define F_(x, y) x,
++#define FM(x) FN_##x,
++ { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4) {
++ IP0_31_28
++ IP0_27_24
++ IP0_23_20
++ IP0_19_16
++ IP0_15_12
++ IP0_11_8
++ IP0_7_4
++ IP0_3_0 }
++ },
++ { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4) {
++ IP1_31_28
++ IP1_27_24
++ IP1_23_20
++ IP1_19_16
++ IP1_15_12
++ IP1_11_8
++ IP1_7_4
++ IP1_3_0 }
++ },
++ { PINMUX_CFG_REG("IPSR2", 0xe6060208, 32, 4) {
++ IP2_31_28
++ IP2_27_24
++ IP2_23_20
++ IP2_19_16
++ IP2_15_12
++ IP2_11_8
++ IP2_7_4
++ IP2_3_0 }
++ },
++ { PINMUX_CFG_REG("IPSR3", 0xe606020c, 32, 4) {
++ IP3_31_28
++ IP3_27_24
++ IP3_23_20
++ IP3_19_16
++ IP3_15_12
++ IP3_11_8
++ IP3_7_4
++ IP3_3_0 }
++ },
++ { PINMUX_CFG_REG("IPSR4", 0xe6060210, 32, 4) {
++ IP4_31_28
++ IP4_27_24
++ IP4_23_20
++ IP4_19_16
++ IP4_15_12
++ IP4_11_8
++ IP4_7_4
++ IP4_3_0 }
++ },
++ { PINMUX_CFG_REG("IPSR5", 0xe6060214, 32, 4) {
++ IP5_31_28
++ IP5_27_24
++ IP5_23_20
++ IP5_19_16
++ IP5_15_12
++ IP5_11_8
++ IP5_7_4
++ IP5_3_0 }
++ },
++ { PINMUX_CFG_REG("IPSR6", 0xe6060218, 32, 4) {
++ IP6_31_28
++ IP6_27_24
++ IP6_23_20
++ IP6_19_16
++ IP6_15_12
++ IP6_11_8
++ IP6_7_4
++ IP6_3_0 }
++ },
++ { PINMUX_CFG_REG("IPSR7", 0xe606021c, 32, 4) {
++ IP7_31_28
++ IP7_27_24
++ IP7_23_20
++ IP7_19_16
++ IP7_15_12
++ IP7_11_8
++ IP7_7_4
++ IP7_3_0 }
++ },
++ { PINMUX_CFG_REG("IPSR8", 0xe6060220, 32, 4) {
++ IP8_31_28
++ IP8_27_24
++ IP8_23_20
++ IP8_19_16
++ IP8_15_12
++ IP8_11_8
++ IP8_7_4
++ IP8_3_0 }
++ },
++#undef F_
++#undef FM
++
++#define F_(x, y) x,
++#define FM(x) FN_##x,
++ { PINMUX_CFG_REG_VAR("MOD_SEL0", 0xe6060500, 32,
++ 4, 4, 4, 4,
++ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) {
++ /* RESERVED 31, 30, 29, 28 */
++ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
++ /* RESERVED 27, 26, 25, 24 */
++ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
++ /* RESERVED 23, 22, 21, 20 */
++ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
++ /* RESERVED 19, 18, 17, 16 */
++ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
++ /* RESERVED 15, 14, 13, 12 */
++ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
++ MOD_SEL0_11
++ MOD_SEL0_10
++ MOD_SEL0_9
++ MOD_SEL0_8
++ MOD_SEL0_7
++ MOD_SEL0_6
++ MOD_SEL0_5
++ MOD_SEL0_4
++ MOD_SEL0_3
++ MOD_SEL0_2
++ MOD_SEL0_1
++ MOD_SEL0_0 }
++ },
++ { },
++};
++
++static int r8a77970_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin,
++ u32 *pocctrl)
++{
++ int bit = pin & 0x1f;
++
++ *pocctrl = 0xe6060380;
++ if (pin >= RCAR_GP_PIN(0, 0) && pin <= RCAR_GP_PIN(0, 21))
++ return bit;
++ if (pin >= RCAR_GP_PIN(2, 0) && pin <= RCAR_GP_PIN(2, 9))
++ return bit + 22;
++
++ *pocctrl += 4;
++ if (pin >= RCAR_GP_PIN(2, 10) && pin <= RCAR_GP_PIN(2, 16))
++ return bit - 10;
++ if (pin >= RCAR_GP_PIN(3, 0) && pin <= RCAR_GP_PIN(3, 16))
++ return bit + 7;
++
++ return -EINVAL;
++}
++
++static const struct sh_pfc_soc_operations pinmux_ops = {
++ .pin_to_pocctrl = r8a77970_pin_to_pocctrl,
++};
++
++const struct sh_pfc_soc_info r8a77970_pinmux_info = {
++ .name = "r8a77970_pfc",
++ .ops = &pinmux_ops,
++ .unlock_reg = 0xe6060000, /* PMMR */
++
++ .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
++
++ .pins = pinmux_pins,
++ .nr_pins = ARRAY_SIZE(pinmux_pins),
++ .groups = pinmux_groups,
++ .nr_groups = ARRAY_SIZE(pinmux_groups),
++ .functions = pinmux_functions,
++ .nr_functions = ARRAY_SIZE(pinmux_functions),
++
++ .cfg_regs = pinmux_config_regs,
++
++ .pinmux_data = pinmux_data,
++ .pinmux_data_size = ARRAY_SIZE(pinmux_data),
++};
+diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
+index efe07bcca8d0..5747ab0472df 100644
+--- a/drivers/pinctrl/sh-pfc/sh_pfc.h
++++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
+@@ -283,6 +283,7 @@ extern co