| From b2c2d51c4efb8cf132a559b035b5c7f9cb5efaf0 Mon Sep 17 00:00:00 2001 |
| From: Vladimir Barinov <vladimir.barinov@cogentembedded.com> |
| Date: Fri, 6 Oct 2017 05:43:59 +0300 |
| Subject: [PATCH 0058/1795] arm64: dts: ulcb-kf: enable PCIE0/1 |
| |
| This supports PCIE0/1 on ULCB Kingfisher board |
| |
| Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> |
| Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| (cherry picked from commit e0304a365bf07b4a0bb2d56ece5b52f3347d5a01) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| --- |
| arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 12 ++++++++++++ |
| 1 file changed, 12 insertions(+) |
| |
| diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi |
| index 83284eace174..ae970da51fa1 100644 |
| --- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi |
| +++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi |
| @@ -48,6 +48,18 @@ |
| status = "okay"; |
| }; |
| |
| +&pcie_bus_clk { |
| + clock-frequency = <100000000>; |
| +}; |
| + |
| +&pciec0 { |
| + status = "okay"; |
| +}; |
| + |
| +&pciec1 { |
| + status = "okay"; |
| +}; |
| + |
| &pfc { |
| can0_pins: can0 { |
| groups = "can0_data_a"; |
| -- |
| 2.19.0 |
| |
