blob: 3d270a9d1d387256ee5b4c60b7ba4b8f7de98eb7 [file] [log] [blame]
From e2ee43525f2ee23bf71338f47976ec277949cfc5 Mon Sep 17 00:00:00 2001
From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Date: Wed, 15 Nov 2017 16:25:21 +0100
Subject: [PATCH 0490/1795] pinctrl: sh-pfc: r8a77995: Add missing pins SCL0
and SDA0 to pinmux data
Required for I2C0 operation.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
(cherry picked from commit af4b609e6f7010094a8f14ff620588fad87e8553)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
drivers/pinctrl/sh-pfc/pfc-r8a77995.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
index 89b7541ab1ed..2c9a71a59fc3 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
@@ -518,6 +518,8 @@ static const u16 pinmux_data[] = {
PINMUX_SINGLE(QSPI0_MISO_IO1),
PINMUX_SINGLE(QSPI0_MOSI_IO0),
PINMUX_SINGLE(QSPI0_SPCLK),
+ PINMUX_SINGLE(SCL0),
+ PINMUX_SINGLE(SDA0),
/* IPSR0 */
PINMUX_IPSR_MSEL(IP0_3_0, IRQ0_A, SEL_IRQ_0_0),
--
2.19.0