| From f87e2479cd0afe0065244c6640f600111900841c Mon Sep 17 00:00:00 2001 |
| From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> |
| Date: Thu, 3 May 2018 22:36:37 +0300 |
| Subject: [PATCH 1429/1795] PCI: rcar: Poll PHYRDY in rcar_pcie_hw_init() |
| |
| In all the R-Car gen1/2/3 manuals, we are instructed to poll PCIEPHYSR |
| for PHYRDY=1 at an early stage of the PCIEC initialization -- while |
| the driver only does this on R-Car H1 (polling a PHY specific register). |
| Add the PHYRDY polling to rcar_pcie_hw_init(). Note that without the |
| special PHY driver on the R-Car V3H (R8A77980) the PCIEC initialization |
| just freezes the kernel -- adding the PHYRDY polling allows the init code |
| to exit gracefully on timeout (PHY starts powered down after reset on this |
| SoC). |
| |
| Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> |
| Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> |
| Reviewed-by: Rob Herring <robh@kernel.org> |
| Reviewed-by: Simon Horman <horms+renesas@verge.net.au> |
| (cherry picked from commit 3ad1d32744ef4f0eb92b1989ef7b488cb7dc740d) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| --- |
| drivers/pci/host/pcie-rcar.c | 20 ++++++++++++++++++++ |
| 1 file changed, 20 insertions(+) |
| |
| diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c |
| index 3fb9fb4ac2e7..93f83fb65940 100644 |
| --- a/drivers/pci/host/pcie-rcar.c |
| +++ b/drivers/pci/host/pcie-rcar.c |
| @@ -40,6 +40,8 @@ |
| #define PCIECDR 0x000020 |
| #define PCIEMSR 0x000028 |
| #define PCIEINTXR 0x000400 |
| +#define PCIEPHYSR 0x0007f0 |
| +#define PHYRDY BIT(0) |
| #define PCIEMSITXR 0x000840 |
| |
| /* Transfer control */ |
| @@ -530,6 +532,20 @@ static void phy_write_reg(struct rcar_pcie *pcie, |
| phy_wait_for_ack(pcie); |
| } |
| |
| +static int rcar_pcie_wait_for_phyrdy(struct rcar_pcie *pcie) |
| +{ |
| + unsigned int timeout = 10; |
| + |
| + while (timeout--) { |
| + if (rcar_pci_read_reg(pcie, PCIEPHYSR) & PHYRDY) |
| + return 0; |
| + |
| + msleep(5); |
| + } |
| + |
| + return -ETIMEDOUT; |
| +} |
| + |
| static int rcar_pcie_wait_for_dl(struct rcar_pcie *pcie) |
| { |
| unsigned int timeout = 10; |
| @@ -554,6 +570,10 @@ static int rcar_pcie_hw_init(struct rcar_pcie *pcie) |
| /* Set mode */ |
| rcar_pci_write_reg(pcie, 1, PCIEMSR); |
| |
| + err = rcar_pcie_wait_for_phyrdy(pcie); |
| + if (err) |
| + return err; |
| + |
| /* |
| * Initial header for port config space is type 1, set the device |
| * class to match. Hardware takes care of propagating the IDSETR |
| -- |
| 2.19.0 |
| |