| From 8a58d139b3646032b301487d2d743e9b693c5152 Mon Sep 17 00:00:00 2001 |
| From: Marc Zyngier <marc.zyngier@arm.com> |
| Date: Wed, 23 May 2018 18:41:36 +0100 |
| Subject: [PATCH 1452/1795] xhci: Allow more than 32 quirks |
| |
| We now have 32 different quirks, and the field that holds them |
| is full. Let's bump it up to the next stage so that we can handle |
| some more... The type is now an unsigned long long, which is 64bit |
| on most architectures. |
| |
| We take this opportunity to change the quirks from using (1 << x) |
| to BIT_ULL(x). |
| |
| Tested-by: Domenico Andreoli <domenico.andreoli@linux.com> |
| Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
| Tested-by: Faiz Abbas <faiz_abbas@ti.com> |
| Tested-by: Domenico Andreoli <domenico.andreoli@linux.com> |
| Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| (cherry picked from commit 36b6857932f380fcb55c31ac75857e3e81dd583a) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| --- |
| drivers/usb/host/xhci.c | 6 ++-- |
| drivers/usb/host/xhci.h | 66 ++++++++++++++++++++--------------------- |
| 2 files changed, 36 insertions(+), 36 deletions(-) |
| |
| diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c |
| index 57d6fe654712..eb16066906a6 100644 |
| --- a/drivers/usb/host/xhci.c |
| +++ b/drivers/usb/host/xhci.c |
| @@ -33,8 +33,8 @@ static int link_quirk; |
| module_param(link_quirk, int, S_IRUGO | S_IWUSR); |
| MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB"); |
| |
| -static unsigned int quirks; |
| -module_param(quirks, uint, S_IRUGO); |
| +static unsigned long long quirks; |
| +module_param(quirks, ullong, S_IRUGO); |
| MODULE_PARM_DESC(quirks, "Bit flags for quirks to be enabled as default"); |
| |
| /* TODO: copied from ehci-hcd.c - can this be refactored? */ |
| @@ -4999,7 +4999,7 @@ int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks) |
| return retval; |
| xhci_dbg(xhci, "Called HCD init\n"); |
| |
| - xhci_info(xhci, "hcc params 0x%08x hci version 0x%x quirks 0x%08x\n", |
| + xhci_info(xhci, "hcc params 0x%08x hci version 0x%x quirks 0x%016llx\n", |
| xhci->hcc_params, xhci->hci_version, xhci->quirks); |
| |
| return 0; |
| diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h |
| index e195b745a2a7..d985210dda2d 100644 |
| --- a/drivers/usb/host/xhci.h |
| +++ b/drivers/usb/host/xhci.h |
| @@ -1801,12 +1801,12 @@ struct xhci_hcd { |
| #define XHCI_STATE_DYING (1 << 0) |
| #define XHCI_STATE_HALTED (1 << 1) |
| #define XHCI_STATE_REMOVING (1 << 2) |
| - unsigned int quirks; |
| -#define XHCI_LINK_TRB_QUIRK (1 << 0) |
| -#define XHCI_RESET_EP_QUIRK (1 << 1) |
| -#define XHCI_NEC_HOST (1 << 2) |
| -#define XHCI_AMD_PLL_FIX (1 << 3) |
| -#define XHCI_SPURIOUS_SUCCESS (1 << 4) |
| + unsigned long long quirks; |
| +#define XHCI_LINK_TRB_QUIRK BIT_ULL(0) |
| +#define XHCI_RESET_EP_QUIRK BIT_ULL(1) |
| +#define XHCI_NEC_HOST BIT_ULL(2) |
| +#define XHCI_AMD_PLL_FIX BIT_ULL(3) |
| +#define XHCI_SPURIOUS_SUCCESS BIT_ULL(4) |
| /* |
| * Certain Intel host controllers have a limit to the number of endpoint |
| * contexts they can handle. Ideally, they would signal that they can't handle |
| @@ -1816,35 +1816,35 @@ struct xhci_hcd { |
| * commands, reset device commands, disable slot commands, and address device |
| * commands. |
| */ |
| -#define XHCI_EP_LIMIT_QUIRK (1 << 5) |
| -#define XHCI_BROKEN_MSI (1 << 6) |
| -#define XHCI_RESET_ON_RESUME (1 << 7) |
| -#define XHCI_SW_BW_CHECKING (1 << 8) |
| -#define XHCI_AMD_0x96_HOST (1 << 9) |
| -#define XHCI_TRUST_TX_LENGTH (1 << 10) |
| -#define XHCI_LPM_SUPPORT (1 << 11) |
| -#define XHCI_INTEL_HOST (1 << 12) |
| -#define XHCI_SPURIOUS_REBOOT (1 << 13) |
| -#define XHCI_COMP_MODE_QUIRK (1 << 14) |
| -#define XHCI_AVOID_BEI (1 << 15) |
| -#define XHCI_PLAT (1 << 16) |
| -#define XHCI_SLOW_SUSPEND (1 << 17) |
| -#define XHCI_SPURIOUS_WAKEUP (1 << 18) |
| +#define XHCI_EP_LIMIT_QUIRK BIT_ULL(5) |
| +#define XHCI_BROKEN_MSI BIT_ULL(6) |
| +#define XHCI_RESET_ON_RESUME BIT_ULL(7) |
| +#define XHCI_SW_BW_CHECKING BIT_ULL(8) |
| +#define XHCI_AMD_0x96_HOST BIT_ULL(9) |
| +#define XHCI_TRUST_TX_LENGTH BIT_ULL(10) |
| +#define XHCI_LPM_SUPPORT BIT_ULL(11) |
| +#define XHCI_INTEL_HOST BIT_ULL(12) |
| +#define XHCI_SPURIOUS_REBOOT BIT_ULL(13) |
| +#define XHCI_COMP_MODE_QUIRK BIT_ULL(14) |
| +#define XHCI_AVOID_BEI BIT_ULL(15) |
| +#define XHCI_PLAT BIT_ULL(16) |
| +#define XHCI_SLOW_SUSPEND BIT_ULL(17) |
| +#define XHCI_SPURIOUS_WAKEUP BIT_ULL(18) |
| /* For controllers with a broken beyond repair streams implementation */ |
| -#define XHCI_BROKEN_STREAMS (1 << 19) |
| -#define XHCI_PME_STUCK_QUIRK (1 << 20) |
| -#define XHCI_MTK_HOST (1 << 21) |
| -#define XHCI_SSIC_PORT_UNUSED (1 << 22) |
| -#define XHCI_NO_64BIT_SUPPORT (1 << 23) |
| -#define XHCI_MISSING_CAS (1 << 24) |
| +#define XHCI_BROKEN_STREAMS BIT_ULL(19) |
| +#define XHCI_PME_STUCK_QUIRK BIT_ULL(20) |
| +#define XHCI_MTK_HOST BIT_ULL(21) |
| +#define XHCI_SSIC_PORT_UNUSED BIT_ULL(22) |
| +#define XHCI_NO_64BIT_SUPPORT BIT_ULL(23) |
| +#define XHCI_MISSING_CAS BIT_ULL(24) |
| /* For controller with a broken Port Disable implementation */ |
| -#define XHCI_BROKEN_PORT_PED (1 << 25) |
| -#define XHCI_LIMIT_ENDPOINT_INTERVAL_7 (1 << 26) |
| -#define XHCI_U2_DISABLE_WAKE (1 << 27) |
| -#define XHCI_ASMEDIA_MODIFY_FLOWCONTROL (1 << 28) |
| -#define XHCI_HW_LPM_DISABLE (1 << 29) |
| -#define XHCI_SUSPEND_DELAY (1 << 30) |
| -#define XHCI_INTEL_USB_ROLE_SW (1 << 31) |
| +#define XHCI_BROKEN_PORT_PED BIT_ULL(25) |
| +#define XHCI_LIMIT_ENDPOINT_INTERVAL_7 BIT_ULL(26) |
| +#define XHCI_U2_DISABLE_WAKE BIT_ULL(27) |
| +#define XHCI_ASMEDIA_MODIFY_FLOWCONTROL BIT_ULL(28) |
| +#define XHCI_HW_LPM_DISABLE BIT_ULL(29) |
| +#define XHCI_SUSPEND_DELAY BIT_ULL(30) |
| +#define XHCI_INTEL_USB_ROLE_SW BIT_ULL(31) |
| |
| unsigned int num_active_eps; |
| unsigned int limit_active_eps; |
| -- |
| 2.19.0 |
| |
