| From 2d7a37327007bfa848c5eb4cdbc6e9b7bf4cc6af Mon Sep 17 00:00:00 2001 |
| From: Takeshi Kihara <takeshi.kihara.df@renesas.com> |
| Date: Thu, 14 Dec 2017 22:34:07 +0900 |
| Subject: [PATCH 1596/1795] clk: renesas: r8a77965: Add MSIOF controller clocks |
| |
| This patch adds MSIOF{0,1,2,3} clocks to the R8A77965 SoC. |
| |
| Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| Reviewed-by: Simon Horman <horms+renesas@verge.net.au> |
| (cherry picked from commit cdc749e22925d5b370cb51ace3cace940bd76cb5) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| --- |
| drivers/clk/renesas/r8a77965-cpg-mssr.c | 4 ++++ |
| 1 file changed, 4 insertions(+) |
| |
| diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c |
| index b1acfb60351c..8fae5e9c4a77 100644 |
| --- a/drivers/clk/renesas/r8a77965-cpg-mssr.c |
| +++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c |
| @@ -116,6 +116,10 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = { |
| DEF_MOD("scif3", 204, R8A77965_CLK_S3D4), |
| DEF_MOD("scif1", 206, R8A77965_CLK_S3D4), |
| DEF_MOD("scif0", 207, R8A77965_CLK_S3D4), |
| + DEF_MOD("msiof3", 208, R8A77965_CLK_MSO), |
| + DEF_MOD("msiof2", 209, R8A77965_CLK_MSO), |
| + DEF_MOD("msiof1", 210, R8A77965_CLK_MSO), |
| + DEF_MOD("msiof0", 211, R8A77965_CLK_MSO), |
| DEF_MOD("sys-dmac2", 217, R8A77965_CLK_S0D3), |
| DEF_MOD("sys-dmac1", 218, R8A77965_CLK_S0D3), |
| DEF_MOD("sys-dmac0", 219, R8A77965_CLK_S0D3), |
| -- |
| 2.19.0 |
| |
