blob: a9e68d64c743e360c64f5d5306b038106f0d4fff [file] [log] [blame]
From b8614a1b54c9b3a868502412377dd4a80fac7973 Mon Sep 17 00:00:00 2001
From: Graham Moore <graham.moore@linux.intel.com>
Date: Tue, 20 Feb 2018 09:38:47 -0600
Subject: [PATCH 1651/1795] arm64: dts: stratix10: Add PL330 DMAC to Stratix10
dts
The Stratix10 SoCFPGA uses the PL330 DMAC. This patch adds the PL330
DMAC to the Stratix10 device tree.
Signed-off-by: Graham Moore <graham.moore@linux.intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
(cherry picked from commit ab50a44404a53b12554005ed4c5a1b3547ac9492)
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
.../boot/dts/altera/socfpga_stratix10.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index 21d906e164fa..0b28f1fbe486 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -275,6 +275,25 @@
reg = <0xffe00000 0x100000>;
};
+ pdma: pdma@ffda0000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0xffda0000 0x1000>;
+ interrupts = <0 81 4>,
+ <0 82 4>,
+ <0 83 4>,
+ <0 84 4>,
+ <0 85 4>,
+ <0 86 4>,
+ <0 87 4>,
+ <0 88 4>,
+ <0 89 4>;
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <32>;
+ clocks = <&clkmgr STRATIX10_L4_MAIN_CLK>;
+ clock-names = "apb_pclk";
+ };
+
rst: rstmgr@ffd11000 {
#reset-cells = <1>;
compatible = "altr,rst-mgr";
--
2.19.0