aarch64: Enable access into FEAT_PMUv3p9 registers from EL2 and below
FEAT_PMUv3p9 adds system register PMUACR_EL1 and similarly FEAT_PMUv3_ICNTR
adds system registers PMICFILTR_EL0 and PMICNTR_EL0. But access into these
system registers from EL2 and below exception levels, will trap into EL3
unless MDCR_EL3.EnPM2 is set.
Enable access to FEAT_PMUv3p9 registers when they are implemented.
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/20250227041603.2029058-1-anshuman.khandual@arm.com
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2 files changed
