commit 0ea43b9c34fecdd0252754bd0e08123214edc52c
author Marc Zyngier <maz@kernel.org> Sun Feb 28 19:35:00 2021 +0000
committer Marc Zyngier <maz@kernel.org> Sat Mar 13 10:59:19 2021 +0000
tree 6b3e1f17369c087895a9a782080f06ac45b38fa9
parent c08fe4d30201b91f070ffe332062c95604f59c1a

KVM: arm64: vgic: Fix reading pending state of HW-based PPI/SPI

Signed-off-by: Marc Zyngier <maz@kernel.org>

arch/arm64/kvm/vgic/vgic-mmio.c

diff --git a/arch/arm64/kvm/vgic/vgic-mmio.c b/arch/arm64/kvm/vgic/vgic-mmio.c
index b2d73fc..33f48bf 100644
--- a/arch/arm64/kvm/vgic/vgic-mmio.c
+++ b/arch/arm64/kvm/vgic/vgic-mmio.c
@@ -240,14 +240,10 @@ unsigned long vgic_mmio_read_pending(struct kvm_vcpu *vcpu,
 		bool val;
 
 		raw_spin_lock_irqsave(&irq->irq_lock, flags);
-		if (irq->hw && vgic_irq_is_sgi(irq->intid)) {
-			int err;
-
-			val = false;
-			err = irq_get_irqchip_state(irq->host_irq,
-						    IRQCHIP_STATE_PENDING,
-						    &val);
-			WARN_RATELIMIT(err, "IRQ %d", irq->host_irq);
+		/* for HW interrupts, directly fetch the HW state */
+		if (vgic_irq_is_mapped_level(irq) ||
+		    (irq->hw && vgic_irq_is_sgi(irq->intid))) {
+			val = vgic_get_phys_line_level(irq);
 		} else {
 			val = irq_is_pending(irq);
 		}