tree 5f524480bf632bb8705a5a2316c9ecea31bded70
parent 9a0bec95cbcfbe50011a6656a70997de05e90a9d
author Marc Zyngier <marc.zyngier@arm.com> 1470725444 +0100
committer Marc Zyngier <marc.zyngier@arm.com> 1470730630 +0100

irqchip/gic: Allow self-SGIs for SMP on UP configurations

On systems where a single CPU is present, the GIC may not support
having SGIs delivered to a target list. In that case, we use the
self-SGI mechanism to allow the interrupt to be delivered locally.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>