| commit | 6b2748ada244c7597e9b677a0bdda4e8781a8d8f | [log] [tgz] |
|---|---|---|
| author | Liu Peibao <liupeibao@loongson.cn> | Mon Nov 14 19:38:24 2022 +0800 |
| committer | Marc Zyngier <maz@kernel.org> | Sat Nov 26 11:54:11 2022 +0000 |
| tree | 88d42dda6f6ed3777d6e0b206dfdc1b8eec1bc38 | |
| parent | 855d4ca4bdb366aab3d43408b74e02ab629d1d55 [diff] |
dt-bindings: interrupt-controller: add yaml for LoongArch CPU interrupt controller Current LoongArch compatible CPUs support 14 CPU IRQs. We can describe how the 14 IRQs are wired to the platform's internal interrupt controller by devicetree. Signed-off-by: Liu Peibao <liupeibao@loongson.cn> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20221114113824.1880-3-liupeibao@loongson.cn