tag a5916170430aaffa351333fdbb10bf4b6c20f9ad
tagger Marc Zyngier <maz@kernel.org> Fri Jun 10 09:12:01 2022 +0100
object 6fac824f40987a54a08dfbcc36145869d02e45b1

irqchip/genirq fixes for 5.19, take #1

- Invoke runtime PM for chained interrupts, aligning the behaviour
  with that of 'normal' interrupts

- A flurry of of_node refcounting fixes

- A fix for the recently merged loongarch that broke UP MIPS

- A configuration fix for the Xilinx interrupt controller

- Yet another new compat string for the Uniphier interrupt controller

commit 6fac824f40987a54a08dfbcc36145869d02e45b1
author Jiaxun Yang <jiaxun.yang@flygoat.com> Thu Jun 09 18:52:41 2022 +0100
committer Marc Zyngier <maz@kernel.org> Fri Jun 10 08:57:19 2022 +0100
tree d7df6acbca838aa85962b0544a45cf13b0128362
parent e3f056a7aafabe4ac3ad4b7465ba821b44a7e639

irqchip/loongson-liointc: Use architecture register to get coreid

fa84f89395e0 ("irqchip/loongson-liointc: Fix build error for
LoongArch") replaced get_ebase_cpunum with physical processor
id from SMP facilities. However that breaks MIPS non-SMP build
and makes booting from other cores inpossible on non-SMP kernel.

Thus we revert get_ebase_cpunum back and use get_csr_cpuid for
LoongArch.

Fixes: fa84f89395e0 ("irqchip/loongson-liointc: Fix build error for LoongArch")
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20220609175242.977-1-jiaxun.yang@flygoat.com