clk: x86: add "ether_clk" alias for Bay Trail / Cherry Trail

Commit d31fd43c0f9a ("clk: x86: Do not gate clocks enabled by the
firmware") causes all unclaimed PMC clocks on Cherry Trail devices to be on
all the time, resulting on the device not being able to reach S0i2 or S0i3
when suspended.

The reason for this commit is that on some Bay Trail / Cherry Trail devices
the ethernet controller uses pmc_plt_clk_4. This commit adds an "ether_clk"
alias, so that the relevant ethernet drivers can try to (optionally) use
this, without needing X86 specific code / hacks, thus fixing ethernet on
these devices without breaking S0i3 support.

This commit uses clkdev_hw_create() to create the alias, mirroring the code
for the already existing "mclk" alias for pmc_plt_clk_3.

Cc: Johannes Stezenbach <>
Cc: Carlo Caione <>
Reported-by: Johannes Stezenbach <>
Acked-by: Stephen Boyd <>
Reviewed-by: Andy Shevchenko <>
Signed-off-by: Hans de Goede <>
Signed-off-by: David S. Miller <>
1 file changed