/*
 * Copyright 2013 Freescale Semiconductor, Inc.
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License
 *     version 2 as published by the Free Software Foundation.
 *
 *     This file is distributed in the hope that it will be useful
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

#include "skeleton.dtsi"
#include "vfxxx.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>

/ {
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		a5_cpu: cpu@0 {
			compatible = "arm,cortex-a5";
			device_type = "cpu";
			reg = <0x0>;
		};
	};

	soc {
		aips-bus@40000000 {

			intc: interrupt-controller@40002000 {
				compatible = "arm,cortex-a9-gic";
				#interrupt-cells = <3>;
				interrupt-controller;
				interrupt-parent = <&intc>;
				reg = <0x40003000 0x1000>,
				      <0x40002100 0x100>;
			};

			global_timer: timer@40002200 {
				compatible = "arm,cortex-a9-global-timer";
				reg = <0x40002200 0x20>;
				interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
				interrupt-parent = <&intc>;
				clocks = <&clks VF610_CLK_PLATFORM_BUS>;
			};
		};

		aips-bus@40080000 {
			pmu@40089000 {
				compatible = "arm,cortex-a5-pmu";
				interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-affinity = <&a5_cpu>;
				reg = <0x40089000 0x1000>;
			};
		};

	};
};

&mscm_ir {
	interrupt-parent = <&intc>;
};

&wdoga5 {
	status = "okay";
};