clk: tegra: Fix wrong value written to PLLE_AUX

The value written to PLLE_AUX was incorrect due to a wrong variable
being used. Without this fix SATA does not work.

Signed-off-by: Tuomas Tynkkynen <>
Tested-by: Mikko Perttunen <>
Reviewed-by: Thierry Reding <>
Tested-by: Thierry Reding <>
Acked-by: Thierry Reding <>
Signed-off-by: Mike Turquette <>
[ improved changelog]
1 file changed