)]}' { "log": [ { "commit": "eb2db85dd01f6840e3157e3e9ca20f2c98e0e09d", "tree": "c93c89fa159654abad6a4a7ede5ad0d967bfd2e8", "parents": [ "950f6bcc79112c8ab748d0f25a89d9cfdebc0813" ], "author": { "name": "Nadav Amit", "email": "namit@vmware.com", "time": "Fri Jul 10 11:33:20 2020 -0700" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Fri Jul 10 16:46:34 2020 -0400" }, "message": "x86: Allow to limit maximum RAM address\n\nWhile there is a feature to limit RAM memory, we should also be able to\nlimit the maximum RAM address. Specifically, svm can only work when the\nmaximum RAM address is lower than 4G, as it does not map the rest of the\nmemory into the NPT.\n\nAllow to do so using the firmware, when in fact the expected use-case is\nto provide this infomation on bare-metal using the MEMLIMIT parameter in\ninitrd.\n\nSigned-off-by: Nadav Amit \u003cnamit@vmware.com\u003e\nMessage-Id: \u003c20200710183320.27266-5-namit@vmware.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "950f6bcc79112c8ab748d0f25a89d9cfdebc0813", "tree": "de1c5737fbf9dabf99f4b1e79b6f66004ad872a0", "parents": [ "a6051f06a15c2d69cadcae565648247663a9e72e" ], "author": { "name": "Nadav Amit", "email": "namit@vmware.com", "time": "Fri Jul 10 11:33:19 2020 -0700" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Fri Jul 10 16:46:18 2020 -0400" }, "message": "x86: remove dead writes from setup_mmu()\n\nRecent changes cause end_of_memory to be disregarded in 32-bit. Remove\nthe dead writes to it.\n\nSigned-off-by: Nadav Amit \u003cnamit@vmware.com\u003e\nMessage-Id: \u003c20200710183320.27266-4-namit@vmware.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "a6051f06a15c2d69cadcae565648247663a9e72e", "tree": "48ea153211881c8b65b8c61d44c29da54042610c", "parents": [ "d86ef5851964521c4558e73e43187912718e6746" ], "author": { "name": "Nadav Amit", "email": "namit@vmware.com", "time": "Fri Jul 10 11:33:18 2020 -0700" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Fri Jul 10 16:45:07 2020 -0400" }, "message": "x86: svm: present bit is set on nested page-faults\n\nOn nested page-faults due to write-protect or reserved bits, the\npresent-bit in EXITINFO1 is set, as confirmed on bare-metal. Set the\nexpected result accordingly.\n\nThis indicates that KVM has a bug.\n\nSigned-off-by: Nadav Amit \u003cnamit@vmware.com\u003e\nMessage-Id: \u003c20200710183320.27266-3-namit@vmware.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "d86ef5851964521c4558e73e43187912718e6746", "tree": "87822ac233419190178e164eceec6a63cd5aa8bf", "parents": [ "a79c949573d8ee436cbee70c26aada8785329684" ], "author": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Fri Jul 10 16:44:18 2020 -0400" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Fri Jul 10 16:44:18 2020 -0400" }, "message": "cstart: do not assume CR4 starts as zero\n\nThe BIOS might leave some bits set in CR4; for example, CR4.DE\u003d1 would\ncause the SVM test for the DR intercept to fail, because DR4/DR5\ncan only be written when CR4.DE is clear, and otherwise trigger\na #GP exception.\n\nReported-by: Nadav Amit \u003cnamit@vmware.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "a79c949573d8ee436cbee70c26aada8785329684", "tree": "518f8d8ce529481849f0e50d9a2c584064075b95", "parents": [ "7b87cad0a5010e00bc59812a8aeba79a862af8be" ], "author": { "name": "Krish Sadhukhan", "email": "krish.sadhukhan@oracle.com", "time": "Wed Jul 08 00:39:57 2020 +0000" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Wed Jul 08 07:48:36 2020 -0400" }, "message": "kvm-unit-tests: nSVM: Test that MBZ bits in CR3 and CR4 are not set on vmrun of nested guests\n\nAccording to section \"Canonicalization and Consistency Checks\" in APM vol. 2,\nthe following guest state is illegal:\n\n\t\"Any MBZ bit of CR3 is set.\"\n\t\"Any MBZ bit of CR4 is set.\"\n\nSigned-off-by: Krish Sadhukhan \u003ckrish.sadhukhan@oracle.com\u003e\nMessage-Id: \u003c1594168797-29444-4-git-send-email-krish.sadhukhan@oracle.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "7b87cad0a5010e00bc59812a8aeba79a862af8be", "tree": "061a16e667072329bc7860b7feee312188d4eaac", "parents": [ "0d622fcb2ba0ac8e9c7f7a282badac694a3592c5" ], "author": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Wed Jul 08 06:35:13 2020 -0400" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Wed Jul 08 07:48:36 2020 -0400" }, "message": "svm: fix clobbers for svm_vmrun\n\nr15 is used by ASM_VMRUN_CMD, so we need to mark it as clobbered.\n\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "0d622fcb2ba0ac8e9c7f7a282badac694a3592c5", "tree": "47663daadf773b746f457363355dc435f169ea21", "parents": [ "9e801bd9d2d4b37bfad26123bcd58548adb0d82c" ], "author": { "name": "Claudio Imbrenda", "email": "imbrenda@linux.ibm.com", "time": "Mon Jul 06 18:43:24 2020 +0200" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jul 06 13:03:52 2020 -0400" }, "message": "lib/vmalloc: allow vm_memalign with alignment \u003e PAGE_SIZE\n\nAllow allocating aligned virtual memory with alignment larger than only\none page.\n\nAdd a check that the backing pages were actually allocated.\n\nExport the alloc_vpages_aligned function to allow users to allocate\nnon-backed aligned virtual addresses.\n\nSigned-off-by: Claudio Imbrenda \u003cimbrenda@linux.ibm.com\u003e\nReviewed-by: Andrew Jones \u003cdrjones@redhat.com\u003e\nMessage-Id: \u003c20200706164324.81123-5-imbrenda@linux.ibm.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "9e801bd9d2d4b37bfad26123bcd58548adb0d82c", "tree": "03b1c96270ec66cd257f020b44b8779fd876a055", "parents": [ "73f4b202beb399976fcd184bac1a6b7a88373581" ], "author": { "name": "Claudio Imbrenda", "email": "imbrenda@linux.ibm.com", "time": "Mon Jul 06 18:43:23 2020 +0200" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jul 06 13:03:51 2020 -0400" }, "message": "lib/alloc_page: move get_order and is_power_of_2 to a bitops.h\n\nThe functions get_order and is_power_of_2 are simple and should\nprobably be in a header, like similar simple functions in bitops.h\n\nSince they concern bit manipulation, the logical place for them is in\nbitops.h\n\nSigned-off-by: Claudio Imbrenda \u003cimbrenda@linux.ibm.com\u003e\nReviewed-by: Andrew Jones \u003cdrjones@redhat.com\u003e\nMessage-Id: \u003c20200706164324.81123-4-imbrenda@linux.ibm.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "73f4b202beb399976fcd184bac1a6b7a88373581", "tree": "76674fd018b98d605dee69635c64c1f2855fd7e0", "parents": [ "3874bb46f1258062b8e7c4f8fe1d6c84f38a436f" ], "author": { "name": "Claudio Imbrenda", "email": "imbrenda@linux.ibm.com", "time": "Mon Jul 06 18:43:22 2020 +0200" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jul 06 13:03:42 2020 -0400" }, "message": "lib/alloc_page: change some parameter types\n\nFor size parameters, size_t is probably semantically more appropriate\nthan unsigned long (although they map to the same value).\n\nFor order, unsigned long is just too big. Also, get_order returns an\nunsigned int anyway.\n\nSigned-off-by: Claudio Imbrenda \u003cimbrenda@linux.ibm.com\u003e\nReviewed-by: Andrew Jones \u003cdrjones@redhat.com\u003e\nReviewed-by: Jim Mattson \u003cjmattson@google.com\u003e\nMessage-Id: \u003c20200706164324.81123-3-imbrenda@linux.ibm.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "3874bb46f1258062b8e7c4f8fe1d6c84f38a436f", "tree": "ef1fbdd7c544c3eeb89d60784b15b5a5026d23ca", "parents": [ "e03cc11801d4da19f93401352682c864f506cd3c" ], "author": { "name": "Claudio Imbrenda", "email": "imbrenda@linux.ibm.com", "time": "Mon Jul 06 18:43:21 2020 +0200" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jul 06 13:03:30 2020 -0400" }, "message": "lib/vmalloc: fix pages count local variable to be size_t\n\nSince size is of type size_t, size \u003e\u003e PAGE_SHIFT might still be too big\nfor a normal unsigned int.\n\nSigned-off-by: Claudio Imbrenda \u003cimbrenda@linux.ibm.com\u003e\nReviewed-by: Andrew Jones \u003cdrjones@redhat.com\u003e\nReviewed-by: Jim Mattson \u003cjmattson@google.com\u003e\nMessage-Id: \u003c20200706164324.81123-2-imbrenda@linux.ibm.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "e03cc11801d4da19f93401352682c864f506cd3c", "tree": "8bc06cb9f7cd952971edf7ba2b312a3f3594e256", "parents": [ "af7af811618fc4d88d5091fefa3eac683b1a6748" ], "author": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Tue Jun 23 05:20:39 2020 -0400" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jul 06 12:47:52 2020 -0400" }, "message": "vmx: remove unnecessary #ifdef __x86_64__\n\nThe VMX tests are 64-bit only, so checking the architecture is\nunnecessary. Also, if the tests supported 32-bits environments\nthe #ifdef would probably go in test_canonical.\n\nReported-by: Sean Christopherson \u003csean.j.christopherson@intel.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "af7af811618fc4d88d5091fefa3eac683b1a6748", "tree": "b7c2e75450ada036b566a2ab98e4e822fb8ddea3", "parents": [ "02ce1789f41c227b740f8c495a3548160d62a144" ], "author": { "name": "Krish Sadhukhan", "email": "krish.sadhukhan@oracle.com", "time": "Fri May 22 20:26:03 2020 -0400" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jul 06 12:47:52 2020 -0400" }, "message": "kvm-unit-tests: nVMX: Test GUEST_LIMIT_GDTR and GUEST_LIMIT_IDTR on vmentry of nested guests\n\nAccording to section \"Checks on Guest Descriptor-Table Registers\" in Intel\nSDM vol 3C, the following checks are performed on the Guest Descriptor-Table\nRegisters on vmentry of nested guests:\n\n - Bits 31:16 of each limit field must be 0.\n\nSigned-off-by: Krish Sadhukhan \u003ckrish.sadhukhan@oracle.com\u003e\nMessage-Id: \u003c20200523002603.32450-4-krish.sadhukhan@oracle.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "02ce1789f41c227b740f8c495a3548160d62a144", "tree": "76b841bafd31d2f61da20e83860769b113f5f498", "parents": [ "479a139a237328875360efd74b5a3c71aa9044c4" ], "author": { "name": "Krish Sadhukhan", "email": "krish.sadhukhan@oracle.com", "time": "Fri May 22 20:26:01 2020 -0400" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jul 06 12:47:52 2020 -0400" }, "message": "kvm-unit-tests: nVMX: Test GUEST_BASE_GDTR and GUEST_BASE_IDTR on vmentry of nested guests\n\nAccording to section \"Checks on Guest Descriptor-Table Registers\" in Intel\nSDM vol 3C, the following check is performed on the Guest Descriptor-Table\nRegisters on vmentry of nested guests:\n\n - On processors that support Intel 64 architecture, the base-address\n fields must contain canonical addresses.\n\nSigned-off-by: Krish Sadhukhan \u003ckrish.sadhukhan@oracle.com\u003e\nMessage-Id: \u003c20200523002603.32450-2-krish.sadhukhan@oracle.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "479a139a237328875360efd74b5a3c71aa9044c4", "tree": "38be13f4584afc2b33c5d95cd59117b20fe60e80", "parents": [ "63f684f36485c60f396ba4a098e50e48cde621e1" ], "author": { "name": "Krish Sadhukhan", "email": "krish.sadhukhan@oracle.com", "time": "Fri May 22 18:19:54 2020 -0400" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jul 06 12:47:51 2020 -0400" }, "message": "kvm-unit-tests: x86: Remove duplicate instance of \u0027vmcb\u0027\n\nSigned-off-by: Krish Sadhukhan \u003ckrish.sadhukhan@oracle.com\u003e\nMessage-Id: \u003c20200522221954.32131-5-krish.sadhukhan@oracle.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "63f684f36485c60f396ba4a098e50e48cde621e1", "tree": "7321a4bb3c30f9ac03804f6afc1950076fa04c04", "parents": [ "c83858a4e0b3b6d9554c866cb5163a27fa5964bf" ], "author": { "name": "Sean Christopherson", "email": "sean.j.christopherson@intel.com", "time": "Thu Jul 02 19:19:03 2020 -0700" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Fri Jul 03 12:16:12 2020 -0400" }, "message": "x86: access: Add test for illegal toggling of CR4.LA57 in 64-bit mode\n\nAdd a test to verify that KVM correctly injects a #GP if the guest\nattempts to toggle CR4.LA57 while 64-bit mode is active. Use two\nversions of the toggling, one to toggle only LA57 and a second to toggle\nPSE in addition to LA57. KVM doesn\u0027t intercept LA57, i.e. toggling only\nLA57 effectively tests the CPU, not KVM. Use PSE as the whipping boy as\nit will not trigger a #GP on its own, is universally available, is\nignored in 64-bit mode, and most importantly is trapped by KVM.\n\nSigned-off-by: Sean Christopherson \u003csean.j.christopherson@intel.com\u003e\nMessage-Id: \u003c20200703021903.5683-1-sean.j.christopherson@intel.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "c83858a4e0b3b6d9554c866cb5163a27fa5964bf", "tree": "58de92ac70af1876eb96fd73b8a752d8609d1e71", "parents": [ "eae10e8f3d7fbb539af8dcfdab4df2a4f70fab05" ], "author": { "name": "Nadav Amit", "email": "namit@vmware.com", "time": "Wed Jul 01 12:30:45 2020 -0700" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Thu Jul 02 05:41:57 2020 -0400" }, "message": "x86: realmode: fix serial_init()\n\nIn some setups serial output from the real-mode tests is corrupted.\n\nI do not know the serial port initialization code well, but the\nprotected mode initialization code is different than the real-mode code.\nUsing the protected mode serial port initialization fixes the problem.\n\nKeeping the tradition of code duplication between real-mode and\nprotected mode, this patch copies the missing initialization into\nreal-mode serial port initialization.\n\nSigned-off-by: Nadav Amit \u003cnamit@vmware.com\u003e\nMessage-Id: \u003c20200701193045.31247-1-namit@vmware.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "eae10e8f3d7fbb539af8dcfdab4df2a4f70fab05", "tree": "ed90ebe90bee4e8b46fd8a3bc775fd8a41bc2a9a", "parents": [ "84a43d344a5c70df847521b2a4e1a736ca97d922" ], "author": { "name": "Krish Sadhukhan", "email": "krish.sadhukhan@oracle.com", "time": "Fri May 22 18:19:53 2020 -0400" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Wed Jul 01 12:00:04 2020 -0400" }, "message": "kvm-unit-tests: nSVM: Test that DR6[63:32], DR7[63:32] and EFER reserved bits are not set on vmrun of nested guests\n\nAccording to section \"Canonicalization and Consistency Checks\" in APM vol. 2\nthe following guest state is illegal:\n\n \"DR6[63:32] are not zero.\"\n \"DR7[63:32] are not zero.\"\n \"Any MBZ bit of EFER is set.\"\n\nSigned-off-by: Krish Sadhukhan \u003ckrish.sadhukhan@oracle.com\u003e\nMessage-Id: \u003c20200522221954.32131-4-krish.sadhukhan@oracle.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "84a43d344a5c70df847521b2a4e1a736ca97d922", "tree": "be668170c08a3926ce7905e701c04685eaa1003f", "parents": [ "2c1ca866799879072d95122759fc81fb34ba6306" ], "author": { "name": "Sean Christopherson", "email": "sean.j.christopherson@intel.com", "time": "Fri Jan 24 15:46:08 2020 -0800" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Wed Jul 01 11:59:41 2020 -0400" }, "message": "x86: nVMX: Print more (accurate) info if RDTSC diff test fails\n\nSnapshot the delta of the last run and display it in the report if the\ntest fails. Abort the run loop as soon as the threshold is reached so\nthat the displayed delta is guaranteed to a failed delta. Displaying\nthe delta helps triage failures, e.g. is my system completely broken or\ndid I get unlucky, and aborting the loop early saves 99900 runs when\nthe system is indeed broken.\n\nCc: Nadav Amit \u003cnadav.amit@gmail.com\u003e\nCc: Aaron Lewis \u003caaronlewis@google.com\u003e\nSigned-off-by: Sean Christopherson \u003csean.j.christopherson@intel.com\u003e\nMessage-Id: \u003c20200124234608.10754-1-sean.j.christopherson@intel.com\u003e\nReviewed-by: Krish Sadhukhan \u003ckrish.sadhukhan@oracle.com\u003e\nReviewed-by: Aaron Lewis \u003caaronlewis@google.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "2c1ca866799879072d95122759fc81fb34ba6306", "tree": "f3bee01366ba5c4ee4b81c29466a0fa7b9e9ed62", "parents": [ "c6405e37295930dbb545be178d18a46adcae629f" ], "author": { "name": "Nadav Amit", "email": "namit@vmware.com", "time": "Tue Jun 30 02:45:16 2020 -0700" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Wed Jul 01 08:10:30 2020 -0400" }, "message": "x86: svm: avoid advancing rip incorrectly on exc_inject\n\nexc_inject advances the ripon every stage, so it can do so 3 times, but\nthere are only 2 vmmcall instructions that the guest runs. So, if a\nfailure happens on the last test, there is no vmmcall instruction to\ntrigger an exit.\n\nAdvance the rip only in the two stages in which vmmcall is expected to\nrun.\n\nSigned-off-by: Nadav Amit \u003cnamit@vmware.com\u003e\nMessage-Id: \u003c20200630094516.22983-6-namit@vmware.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "c6405e37295930dbb545be178d18a46adcae629f", "tree": "68fb052550c7e462b8a4349ed66c6d62bda10ab8", "parents": [ "c803b19b843ff13d052fca76cb8685e8d5d564d9" ], "author": { "name": "Nadav Amit", "email": "namit@vmware.com", "time": "Tue Jun 30 02:45:15 2020 -0700" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Wed Jul 01 08:10:30 2020 -0400" }, "message": "x86: svm: use PML4E in npt_rsvd_pfwalk_prepare\n\nAccording to AMD manual bit 8 of the PDPE is not reserved, but it is in PML4E.\n\nReported-by: Nadav Amit \u003cnamit@vmware.com\u003e\nMessage-Id: \u003c20200630094516.22983-5-namit@vmware.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "c803b19b843ff13d052fca76cb8685e8d5d564d9", "tree": "bd870c576d811a5ef648ab2a8cbd2e842eb97c9f", "parents": [ "10a65fc45419b7859bb6dd0a7f568eea45cbedb2" ], "author": { "name": "Nadav Amit", "email": "namit@vmware.com", "time": "Tue Jun 30 02:45:14 2020 -0700" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Wed Jul 01 08:10:29 2020 -0400" }, "message": "x86: svm: flush TLB on each test\n\nSeveral svm tests change PTEs but do not flush the TLB. To avoid messing\naround or encountering new bugs in the future, flush the TLB on every\ntest.\n\nSigned-off-by: Nadav Amit \u003cnamit@vmware.com\u003e\nMessage-Id: \u003c20200630094516.22983-4-namit@vmware.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "10a65fc45419b7859bb6dd0a7f568eea45cbedb2", "tree": "b025dc4a1588c0b4491cfddd0b30d3a9ceaaa915", "parents": [ "ec4fed57aa932c2ad869f61464af203b0f119d5a" ], "author": { "name": "Nadav Amit", "email": "namit@vmware.com", "time": "Tue Jun 30 02:45:13 2020 -0700" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Wed Jul 01 08:10:29 2020 -0400" }, "message": "x86: svm: check TSC adjust support\n\nMSR_IA32_TSC_ADJUST may be supported by KVM on AMD machines, but it does\nnot show on AMD manual. Check CPUID to see if it supported before\nrunning the relevant tests.\n\nSigned-off-by: Nadav Amit \u003cnamit@vmware.com\u003e\nMessage-Id: \u003c20200630094516.22983-3-namit@vmware.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "ec4fed57aa932c2ad869f61464af203b0f119d5a", "tree": "ecef4ec5bddc41d3a357fe47542cdc0090076415", "parents": [ "c3df00e36bd46770777b674b28bf83a52180c184" ], "author": { "name": "Nadav Amit", "email": "namit@vmware.com", "time": "Tue Jun 30 02:45:12 2020 -0700" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Wed Jul 01 08:10:29 2020 -0400" }, "message": "x86: Remove boot_idt assembly assignment\n\nboot_idt is now a symbol.\n\nSigned-off-by: Nadav Amit \u003cnamit@vmware.com\u003e\nMessage-Id: \u003c20200630094516.22983-2-namit@vmware.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "c3df00e36bd46770777b674b28bf83a52180c184", "tree": "1b31bc8fc4d2d11d486a5111bb8c85ec3942a1e1", "parents": [ "b373304853a072b2aed720ecd45e752cda223465" ], "author": { "name": "Thomas Huth", "email": "thuth@redhat.com", "time": "Wed Jul 01 12:06:15 2020 +0200" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Wed Jul 01 12:37:38 2020 +0200" }, "message": "gitlab-ci.yml: Extend the lists of tests that we run with TCG\n\nThank to the recent fixes, there are now quite a lot of additional 32-bit\nx86 tests that we can run in the CI.\nAnd thanks to the update to Fedora 32 (that introduced a newer version of\nQEMU), there are now also some additional tests that we can run with TCG\nfor the other architectures.\nNote that for arm/aarch64, we now also set the MAX_SMP to be able to run\nSMP-tests with TCG in the single-threaded CI containers, too.\n\nSigned-off-by: Thomas Huth \u003cthuth@redhat.com\u003e\nMessage-Id: \u003c20200701100615.7975-1-thuth@redhat.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "b373304853a072b2aed720ecd45e752cda223465", "tree": "f67cae980048b5a34cee347ae576671492c453bf", "parents": [ "a4ff5dcebf2f666aeff4d67d3a1fcffa076e736c" ], "author": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Wed Jul 01 11:43:07 2020 +0200" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Wed Jul 01 12:37:38 2020 +0200" }, "message": "scripts: Fix the check whether testname is in the only_tests list\n\nWhen you currently run\n\n ./run_tests.sh ioapic-split\n\nthe kvm-unit-tests run scripts do not only execute the \"ioapic-split\"\ntest, but also the \"ioapic\" test, which is quite surprising. This\nhappens because we use \"grep -w\" for checking whether a test should\nbe run or not. Because \"grep -w\" does not consider the \"-\" character as\npart of a word, \"ioapic\" successfully matches against \"ioapic-split\".\n\nTo fix the issue, use spaces as the only delimiter when running \"grep\",\nremoving the problematic \"-w\" flag from the invocation. While at it,\nadd \"-F\" to avoid unintended use of regular expression metacharacters.\n\nReported-by: Thomas Huth \u003cthuth@redhat.com\u003e\nTested-by: Thomas Huth \u003cthuth@redhat.com\u003e\nReviewed-by: Thomas Huth \u003cthuth@redhat.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "a4ff5dcebf2f666aeff4d67d3a1fcffa076e736c", "tree": "b27832a078ffdc9c6b7489afe7a42b98b4672221", "parents": [ "d7903be60ba61792d7edb69126e82629ab43e60d" ], "author": { "name": "Nadav Amit", "email": "namit@vmware.com", "time": "Fri Jun 19 12:39:09 2020 -0700" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jun 29 11:27:23 2020 -0400" }, "message": "x86: pmu: fix failures on 32-bit due to wrong masks\n\nSome mask computation are using long constants instead of long long\nconstants, which causes test failures on x86-32.\n\nSigned-off-by: Nadav Amit \u003cnamit@vmware.com\u003e\nMessage-Id: \u003c20200619193909.18949-1-namit@vmware.com\u003e\nReviewed-by: Jim Mattson \u003cjmattson@google.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "d7903be60ba61792d7edb69126e82629ab43e60d", "tree": "6adff3a48f3475841debc523d413893dafc0c569", "parents": [ "3b9b2d554aeed680ac44daaf13c04a6cdb19c6a8" ], "author": { "name": "Nadav Amit", "email": "namit@vmware.com", "time": "Fri Jun 26 02:23:33 2020 -0700" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Fri Jun 26 06:42:20 2020 -0400" }, "message": "x86: realmode: fix lss test\n\nRunning lss with some random descriptor and then performing pop does not\nwork so well. Use mov instructions instead of push/pop pair.\n\nSigned-off-by: Nadav Amit \u003cnamit@vmware.com\u003e\nMessage-Id: \u003c20200626092333.2830-4-namit@vmware.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "3b9b2d554aeed680ac44daaf13c04a6cdb19c6a8", "tree": "4fcce0cff78d6c577df5f505391becf53614137a", "parents": [ "a529af7c46ad7705663b281b07c6e80a290b0e55" ], "author": { "name": "Nadav Amit", "email": "namit@vmware.com", "time": "Fri Jun 26 02:23:32 2020 -0700" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Fri Jun 26 06:42:05 2020 -0400" }, "message": "x86: realmode: hlt loop as fallback on exit\n\nFor systems without emulated devices (e.g., bare-metal), use halt-loop\nwhen exiting the realmode test.\n\nSigned-off-by: Nadav Amit \u003cnamit@vmware.com\u003e\nMessage-Id: \u003c20200626092333.2830-3-namit@vmware.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "a529af7c46ad7705663b281b07c6e80a290b0e55", "tree": "af99a46a1ca8c66e483bb02680f16a850db578c3", "parents": [ "6b9334e77ab0ad367ab0e8995d5d8d329ea125a3" ], "author": { "name": "Nadav Amit", "email": "namit@vmware.com", "time": "Fri Jun 26 02:23:31 2020 -0700" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Fri Jun 26 06:41:51 2020 -0400" }, "message": "x86: realmode: initialize idtr\n\nThe realmode test does not initialize the IDTR, assuming that its base\nis zero and its limit 0x3ff. Initialize it, as the bootloader might not\nset it as such.\n\nSigned-off-by: Nadav Amit \u003cnamit@vmware.com\u003e\nMessage-Id: \u003c20200626092333.2830-2-namit@vmware.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "6b9334e77ab0ad367ab0e8995d5d8d329ea125a3", "tree": "c8fd0211a9231f096df732fede9c0b7d5342848d", "parents": [ "ded410576a6ee8ca021575cd7d9309b2a819878a" ], "author": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Fri Jun 26 03:18:46 2020 -0400" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Fri Jun 26 03:18:46 2020 -0400" }, "message": "x86: map bottom 2G 1:1 into page tables\n\nRight now only addresses up to the highest RAM memory address are\nare mapped 1:1 into the 32-bit page tables, but this also excludes\nACPI-reserved areas that are higher than the highest RAM memory\naddress. Depending on the memory layout, this may prevent the\ntests from accessing the ACPI tables after setup_vm. Unconditionally\nincluding the bottom 2G of memory fixes that. We do rely on the\nACPI tables being in the first 2GB of memory, which is not necessarily\ntrue on bare metal; fixing that requires adding calls to something like\nLinux\u0027s kmap/kunmap.\n\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "ded410576a6ee8ca021575cd7d9309b2a819878a", "tree": "c1d6b157fa5cd04def57daeb3908c94f2d4975e5", "parents": [ "d589407ff95f6fc121f167c6fddb851934b15697" ], "author": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Thu Jun 25 07:10:06 2020 -0400" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Thu Jun 25 08:20:46 2020 -0400" }, "message": "x86: setup segment registers before percpu areas\n\nThe base of the percpu area is stored in the %gs base, and writing\nto %gs destroys it. Move setup_segments earlier, before the %gs\nbase is written, and keep setup_percpu_area close so that the base\nis updated close to the selector.\n\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "d589407ff95f6fc121f167c6fddb851934b15697", "tree": "26dce6e99b00c08719422df4355372a2d9352841", "parents": [ "4108903c9df13e5b25bcfa7be11a9fbc83c94b82" ], "author": { "name": "Nadav Amit", "email": "namit@vmware.com", "time": "Wed Jun 24 13:36:02 2020 -0700" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Thu Jun 25 08:20:46 2020 -0400" }, "message": "x86: fix smp_stacktop on 32-bit\n\nsmp_stacktop in 32-bit is fixed to some magic address. Use the address\nof the memory that was reserved for the stack instead.\n\nSigned-off-by: Nadav Amit \u003cnamit@vmware.com\u003e\nMessage-Id: \u003c20200624203602.44659-1-namit@vmware.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "4108903c9df13e5b25bcfa7be11a9fbc83c94b82", "tree": "a7be9bdc58543d449bb11c39d79509bd7d259678", "parents": [ "f8203b59c7b20154ff08e90fca438f8939fca4bf" ], "author": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Thu Jun 25 07:14:52 2020 -0400" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Thu Jun 25 08:20:46 2020 -0400" }, "message": "x86: fix stack pointer after call\n\nSince setup_multiboot has a C calling convention, the stack pointer must\nbe adjusted after the call. Without this change, the bottom of the\npercpu area would be 4 bytes below the bottom of the stack and overlap\nthe top 4 bytes of CPU 1\u0027s stack.\n\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "f8203b59c7b20154ff08e90fca438f8939fca4bf", "tree": "158b6968667c9bfcb0919ff036fd0023dda1171a", "parents": [ "2d3ecdfec9514907084b29b1fb08932da5a5ec7e" ], "author": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Wed Jun 24 12:54:40 2020 -0400" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Thu Jun 25 06:40:39 2020 -0400" }, "message": "x86: move IDT away from address 0\n\nAddress 0 is also used for the SIPI vector (which is probably something worth\nchanging as well), and now that we call setup_idt very early the SIPI vector\noverwrites the first few bytes of the IDT, and in particular the #DE handler.\n\nFix this for both 32-bit and 64-bit, even though the different form of the\ndescriptors meant that only 32-bit showed a failure.\n\nReported-by: Thomas Huth \u003cthuth@redhat.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "2d3ecdfec9514907084b29b1fb08932da5a5ec7e", "tree": "e2dfde0bfe001bbaba1b7f759b462f6372139879", "parents": [ "d68a795a213ddcd224a80fb9e5015b57582bc625" ], "author": { "name": "Vitaly Kuznetsov", "email": "vkuznets@redhat.com", "time": "Tue Jun 23 10:27:11 2020 +0200" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Wed Jun 24 02:50:23 2020 -0400" }, "message": "Revert \"SVM: move guest past HLT\"\n\n\u0027nmi_hlt\u0027 test returns somewhat weird result:\n\n...\nPASS: direct NMI + hlt\nPASS: NMI intercept while running guest\nPASS: intercepted NMI + hlt\nPASS: nmi_hlt\nSUMMARY: 4 tests, 1 unexpected failures\n\nTrying to investigate where the failure is coming from I was tweaking\nthe code around and with tiny meaningless changes I was able to observe\n #PF, #GP, #UD and other \u0027interesting\u0027 results. Compiler optimization\nflags also change the outcome so there\u0027s obviously a corruption somewhere.\nAdding a meaningless \u0027nop\u0027 to the second \u0027asm volatile (\"hlt\");\u0027 in\nnmi_hlt_test() saves the day so it seems we erroneously advance RIP\ntwice, the advancement in nmi_hlt_finished() is not needed.\n\nThe outcome, however, contradicts with the commit message in 7e7aa86f74\n(\"SVM: move guest past HLT\"). With that commit reverted, all tests seem\nto pass but I\u0027m not sure what issue the commit was trying to fix, thus\nRFC.\n\nThis reverts commit 7e7aa86f7418a8343de46583977f631e55fd02ed.\n\nSigned-off-by: Vitaly Kuznetsov \u003cvkuznets@redhat.com\u003e\nMessage-Id: \u003c20200623082711.803916-1-vkuznets@redhat.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "d68a795a213ddcd224a80fb9e5015b57582bc625", "tree": "cf068c6dd6752b041efbd221578aa8b926b0e905", "parents": [ "1b9d2ef25d1758d3f1a12da0e43517e8e5e2ac78" ], "author": { "name": "Nadav Amit", "email": "namit@vmware.com", "time": "Tue Jun 23 01:41:32 2020 -0700" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Wed Jun 24 02:47:10 2020 -0400" }, "message": "x86: Initialize segment selectors\n\nCurrently, the BSP\u0027s segment selectors are not initialized in 32-bit\n(cstart.S). As a result the tests implicitly rely on the segment\nselector values that are set by the BIOS. If this assumption is not\nkept, the task-switch test fails.\n\nFix it by initializing them.\n\nSigned-off-by: Nadav Amit \u003cnamit@vmware.com\u003e\nMessage-Id: \u003c20200623084132.36213-1-namit@vmware.com\u003e\nReviewed-by: Jim Mattson \u003cjmattson@redhat.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "1b9d2ef25d1758d3f1a12da0e43517e8e5e2ac78", "tree": "37f3788460f8c21da557dc8407f0c481e88429a2", "parents": [ "ca5efa6a3ed3b94776383eccfca3255f9745a8d7" ], "author": { "name": "Vitaly Kuznetsov", "email": "vkuznets@redhat.com", "time": "Wed Jun 17 17:21:39 2020 +0200" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Wed Jun 24 02:47:09 2020 -0400" }, "message": "x86: skip hyperv_clock test when host clocksource is not TSC\n\nHyper-V TSC page clocksource is TSC based so it requires host to use TSC\nfor clocksource. While TSC is more or less standard for x86 hardware\nnowadays, when kvm-unit-tests are run in a VM the clocksource tends to be\ndifferent (e.g. kvm-clock).\n\nSigned-off-by: Vitaly Kuznetsov \u003cvkuznets@redhat.com\u003e\nMessage-Id: \u003c20200617152139.402827-1-vkuznets@redhat.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "ca5efa6a3ed3b94776383eccfca3255f9745a8d7", "tree": "ab7aae006386627d9f16bf6410e229cf855d5ea0", "parents": [ "c88b7beaafd711e0ca98529a56c9d35eedc60b5f", "9d7f9a2f0b3427bbeda242c64f698d14e21d2a42" ], "author": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Tue Jun 23 03:29:56 2020 -0400" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Tue Jun 23 03:29:56 2020 -0400" }, "message": "Merge tag \u0027pull-request-2020-06-16\u0027 of https://gitlab.com/huth/kvm-unit-tests\n\n* Lots of CI-related fixes and improvements\n* Update the gitlab-CI to Fedora 32\n* Test compilation with Clang\n" }, { "commit": "c88b7beaafd711e0ca98529a56c9d35eedc60b5f", "tree": "e7e8cfa88d4e89afa3fbd52b5db48d2c518a1ab6", "parents": [ "49efa0e0494d982c422842a63d2228fafe1181a3" ], "author": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Tue Jun 23 03:28:43 2020 -0400" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Tue Jun 23 03:28:43 2020 -0400" }, "message": "lib/alloc.c: fix missing include\n\nInclude bitops.h to get BITS_PER_LONG and avoid errors such as\n\nlib/alloc.c: In function mult_overflow:\nlib/alloc.c:24:9: error: right shift count \u003e\u003d width of type\n[-Werror\u003dshift-count-overflow]\n 24 | if ((a \u003e\u003e 32) \u0026\u0026 (b \u003e\u003e 32))\n | ^~\n\nFixes: cde8415e1 (\"lib/alloc.c: add overflow check for calloc\")\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "49efa0e0494d982c422842a63d2228fafe1181a3", "tree": "40642d4d4f1a4527df48df8659c407eea247f02a", "parents": [ "1a31ffab16864b9aa1806bae8fd483555f1b989f" ], "author": { "name": "Thomas Huth", "email": "thuth@redhat.com", "time": "Tue May 12 11:44:38 2020 +0200" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jun 22 20:34:29 2020 -0400" }, "message": "Fixes for the umip test\n\nWhen compiling umip.c with -O2 instead of -O1, there are currently\ntwo problems. First, the compiler complains:\n\n x86/umip.c: In function ‘do_ring3’:\n x86/umip.c:162:37: error: array subscript 4096 is above array bounds of\n ‘unsigned char[4096]’ [-Werror\u003darray-bounds]\n [user_stack_top]\"m\"(user_stack[sizeof user_stack]),\n ~~~~~~~~~~^~~~~~~~~~~~~~~~~~~\n\nThis can be fixed by initializing the stack to point to one of the last\nbytes of the array instead.\n\nThe second problem is that some tests are failing - and this is due\nto the fact that the GP_ASM macro uses inline asm without the \"volatile\"\nkeyword - so that the compiler reorders this code in certain cases\nwhere it should not. Fix it by adding \"volatile\" here.\n\nReviewed-by: Vitaly Kuznetsov \u003cvkuznets@redhat.com\u003e\nSigned-off-by: Thomas Huth \u003cthuth@redhat.com\u003e\nMessage-Id: \u003c20200512094438.17998-1-thuth@redhat.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "1a31ffab16864b9aa1806bae8fd483555f1b989f", "tree": "eff8abca2b66f33909ef7ce11de1b03f8aafbd53", "parents": [ "17b9f93e15e2a77cc868288072ac4d39c33fff3b" ], "author": { "name": "Andrew Jones", "email": "drjones@redhat.com", "time": "Mon May 11 09:06:41 2020 +0200" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jun 22 20:33:55 2020 -0400" }, "message": "Fix out-of-tree builds\n\nSince b16df9ee5f3b out-of-tree builds have been broken because we\nstarted validating the newly user-configurable $erratatxt file\nbefore linking it into the build dir. We fix this not by moving\nthe validation, but by removing the linking and instead using the\nfull path of the $erratatxt file. This allows one to keep that file\nseparate from the src and build dirs.\n\nFixes: b16df9ee5f3b (\"arch-run: Add reserved variables to the default environ\")\nReported-by: Thomas Huth \u003cthuth@redhat.com\u003e\nSigned-off-by: Andrew Jones \u003cdrjones@redhat.com\u003e\nMessage-Id: \u003c20200511070641.23492-1-drjones@redhat.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "17b9f93e15e2a77cc868288072ac4d39c33fff3b", "tree": "4ecad51438796aaf976ceb583d28cef3972de36f", "parents": [ "4a4f8af26f3c1491843ca700d05a534c0e767980" ], "author": { "name": "Claudio Imbrenda", "email": "imbrenda@linux.ibm.com", "time": "Mon Jun 22 18:21:41 2020 +0200" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jun 22 13:49:56 2020 -0400" }, "message": "lib/vmalloc: add locking and a check for initialization\n\nMake sure init_alloc_vpage is never called when vmalloc is in use.\n\nGet both init_alloc_vpage and setup_vm to use the lock.\n\nFor setup_vm we only check at the end because at least on some\narchitectures setup_mmu can call init_alloc_vpage, which would cause\na deadlock.\n\nSigned-off-by: Claudio Imbrenda \u003cimbrenda@linux.ibm.com\u003e\nMessage-Id: \u003c20200622162141.279716-9-imbrenda@linux.ibm.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "4a4f8af26f3c1491843ca700d05a534c0e767980", "tree": "69768a1441febd6c1a0bda307d7dcc6bc48d23f2", "parents": [ "4aabe7c09a6be56ca6a115b5f4775ae3050be06e" ], "author": { "name": "Claudio Imbrenda", "email": "imbrenda@linux.ibm.com", "time": "Mon Jun 22 18:21:40 2020 +0200" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jun 22 13:49:43 2020 -0400" }, "message": "lib/alloc_page: make get_order return unsigned int\n\nSince get_order never returns a negative value, it makes sense to make\nit return an unsigned int.\n\nThe returned value will be in practice always very small, a u8 would\nprobably also do the trick.\n\nSigned-off-by: Claudio Imbrenda \u003cimbrenda@linux.ibm.com\u003e\nMessage-Id: \u003c20200622162141.279716-8-imbrenda@linux.ibm.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "4aabe7c09a6be56ca6a115b5f4775ae3050be06e", "tree": "43641861fe295d514e7e695255151772826944c7", "parents": [ "dee4223b46b90103b2fd953764e3e430802a9624" ], "author": { "name": "Claudio Imbrenda", "email": "imbrenda@linux.ibm.com", "time": "Mon Jun 22 18:21:39 2020 +0200" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jun 22 13:49:05 2020 -0400" }, "message": "lib/vmalloc: fix potential race and non-standard pointer arithmetic\n\nThe pointer vfree_top should only be accessed with the lock held, so\nmake sure we return a local copy of the pointer taken safely inside the\nlock.\n\nAlso avoid doing pointer arithmetic on void pointers. Gcc allows it but\nit is ugly. Use uintptr_t for doing maths on the pointer.\n\nThis will also come useful in upcoming patches.\n\nSigned-off-by: Claudio Imbrenda \u003cimbrenda@linux.ibm.com\u003e\nMessage-Id: \u003c20200622162141.279716-7-imbrenda@linux.ibm.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "dee4223b46b90103b2fd953764e3e430802a9624", "tree": "27bdf7f683a7b246cc113ec502165472cf37c943", "parents": [ "cde8415e148df178726a2d6913f4299dcaa65f11" ], "author": { "name": "Claudio Imbrenda", "email": "imbrenda@linux.ibm.com", "time": "Mon Jun 22 18:21:38 2020 +0200" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jun 22 13:48:50 2020 -0400" }, "message": "lib: Fix a typo and add documentation comments\n\nFix a typo in lib/alloc_phys.h and add documentation comments to all\nfunctions in lib/vmalloc.h\n\nSigned-off-by: Claudio Imbrenda \u003cimbrenda@linux.ibm.com\u003e\nMessage-Id: \u003c20200622162141.279716-6-imbrenda@linux.ibm.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "cde8415e148df178726a2d6913f4299dcaa65f11", "tree": "5a93a6795c6b3fd28367b9a64a51947673824314", "parents": [ "6ea7326a9de006edca66e342959b78c1fb4b776f" ], "author": { "name": "Claudio Imbrenda", "email": "imbrenda@linux.ibm.com", "time": "Mon Jun 22 18:21:37 2020 +0200" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jun 22 13:48:04 2020 -0400" }, "message": "lib/alloc.c: add overflow check for calloc\n\nAdd an overflow check for calloc to prevent potential multiplication overflow.\n\nSigned-off-by: Claudio Imbrenda \u003cimbrenda@linux.ibm.com\u003e\nMessage-Id: \u003c20200622162141.279716-5-imbrenda@linux.ibm.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "6ea7326a9de006edca66e342959b78c1fb4b776f", "tree": "865f74ee72d048d07eed3e2adf2d6837966bc32b", "parents": [ "5b70cbdb7bc2ea65096b51565c75815cc95945b8" ], "author": { "name": "Claudio Imbrenda", "email": "imbrenda@linux.ibm.com", "time": "Mon Jun 22 18:21:36 2020 +0200" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jun 22 13:47:43 2020 -0400" }, "message": "lib: use PAGE_ALIGN\n\nSince now PAGE_ALIGN is available in all architectures, start using it in\ncommon code to improve readability.\n\nSigned-off-by: Claudio Imbrenda \u003cimbrenda@linux.ibm.com\u003e\nMessage-Id: \u003c20200622162141.279716-4-imbrenda@linux.ibm.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "5b70cbdb7bc2ea65096b51565c75815cc95945b8", "tree": "456c649769b28fcfd0b15e481a918ea623741dbb", "parents": [ "cae10b5b5bdc53480bd2e985f1e43eb8910e40f8" ], "author": { "name": "Claudio Imbrenda", "email": "imbrenda@linux.ibm.com", "time": "Mon Jun 22 18:21:35 2020 +0200" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jun 22 13:47:32 2020 -0400" }, "message": "x86: add missing PAGE_ALIGN macro from page.h\n\nThe PAGE_ALIGN macro is present in all other page.h headers, including\nthe generic one.\n\nThis patch adds the missing PAGE_ALIGN macro to ib/x86/asm/page.h\n\nSigned-off-by: Claudio Imbrenda \u003cimbrenda@linux.ibm.com\u003e\nMessage-Id: \u003c20200622162141.279716-3-imbrenda@linux.ibm.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "cae10b5b5bdc53480bd2e985f1e43eb8910e40f8", "tree": "9a2ee91254e2daebc1e358f7d0011d272ff325ee", "parents": [ "a434c431d8eb20f9363a8d74e91f21a8faf13e0f" ], "author": { "name": "Claudio Imbrenda", "email": "imbrenda@linux.ibm.com", "time": "Mon Jun 22 18:21:34 2020 +0200" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jun 22 13:45:58 2020 -0400" }, "message": "x86/cstart.S: initialize stack before using it\n\nIt seems the 32-bit initialization code uses the stack before actually\ninitializing it.\n\nProbably the boot loader leaves a reasonable value in the stack pointer so\nthis issue has not been noticed before.\n\nSigned-off-by: Claudio Imbrenda \u003cimbrenda@linux.ibm.com\u003e\nMessage-Id: \u003c20200622162141.279716-2-imbrenda@linux.ibm.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "a434c431d8eb20f9363a8d74e91f21a8faf13e0f", "tree": "f0edb589f0607ded8bd02ae6be8d49a365111396", "parents": [ "0f54d5d6bd6a713f696c33050353b81ba7971360" ], "author": { "name": "Sean Christopherson", "email": "sean.j.christopherson@intel.com", "time": "Fri Feb 07 09:42:44 2020 -0800" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jun 22 13:43:15 2020 -0400" }, "message": "nVMX: Extend EPT cap MSR test to allow 5-level EPT\n\nModify the EMSR_IA32_VMX_EPT_VPID_CAP test to mark the 5-level EPT cap\nbit as allowed-1. KVM is in the process of gaining support for 5-level\nnested EPT[*].\n\n[*] https://lkml.kernel.org/r/20200206220836.22743-1-sean.j.christopherson@intel.com\n\nSigned-off-by: Sean Christopherson \u003csean.j.christopherson@intel.com\u003e\nMessage-Id: \u003c20200207174244.6590-5-sean.j.christopherson@intel.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "0f54d5d6bd6a713f696c33050353b81ba7971360", "tree": "b14fb49e30eaf34ad129d9fd5a6b0a7d45b8c2c2", "parents": [ "592cb377db48620178575ca3cf6d9bbca8fb144e" ], "author": { "name": "Sean Christopherson", "email": "sean.j.christopherson@intel.com", "time": "Fri Feb 07 09:42:43 2020 -0800" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jun 22 13:43:05 2020 -0400" }, "message": "nVMX: Mark bit 39 of MSR_IA32_VMX_EPT_VPID_CAP as reserved\n\nRemove bit 39, which is defined as reserved in Intel\u0027s SDM, from the set\nof allowed-1 bits in MSR_IA32_VMX_EPT_VPID_CAP.\n\nFixes: 69c8d31 (\"VMX: Validate capability MSRs\")\nSigned-off-by: Sean Christopherson \u003csean.j.christopherson@intel.com\u003e\nMessage-Id: \u003c20200207174244.6590-4-sean.j.christopherson@intel.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "592cb377db48620178575ca3cf6d9bbca8fb144e", "tree": "dd38c9f44f80dc02a655b1dc7f316482ed720f00", "parents": [ "d86e74112c20a8ee9149bfd62adf2228db4466dc" ], "author": { "name": "Sean Christopherson", "email": "sean.j.christopherson@intel.com", "time": "Fri Feb 07 09:42:42 2020 -0800" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jun 22 13:42:54 2020 -0400" }, "message": "nVMX: Refactor the EPT/VPID MSR cap check to make it readable\n\nUse the EPT_CAP_* and VPID_CAP_* defines to declare which bits are\nreserved in MSR_IA32_VMX_EPT_VPID_CAP. Encoding the reserved bits in\na 64-bit literal is difficult to read, even more difficult to update,\nand error prone, as evidenced by the check allowing bit 39 to be \u00271\u0027,\ndespite it being reserved to zero in Intel\u0027s SDM.\n\nNo functional change intended.\n\nSigned-off-by: Sean Christopherson \u003csean.j.christopherson@intel.com\u003e\nMessage-Id: \u003c20200207174244.6590-3-sean.j.christopherson@intel.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "d86e74112c20a8ee9149bfd62adf2228db4466dc", "tree": "190d331ed0992b7730846b8ad86a8332b6896da2", "parents": [ "da338a317cacd3ce6cab8c88a32c6ab025e8d443" ], "author": { "name": "Sean Christopherson", "email": "sean.j.christopherson@intel.com", "time": "Fri Feb 07 09:42:41 2020 -0800" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jun 22 13:42:47 2020 -0400" }, "message": "nVMX: Extend EPTP test to allow 5-level EPT\n\nModify the EPTP test to expect success when the EPTP is configured for\n5-level page walks and 5-level walks are enumerated as supported by the\nEPT capabilities MSR. KVM is in the process of gaining support for\n5-level nested EPT[*].\n\n[*] https://lkml.kernel.org/r/20200206220836.22743-1-sean.j.christopherson@intel.com\n\nSigned-off-by: Sean Christopherson \u003csean.j.christopherson@intel.com\u003e\nMessage-Id: \u003c20200207174244.6590-2-sean.j.christopherson@intel.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "da338a317cacd3ce6cab8c88a32c6ab025e8d443", "tree": "20b6dcad4b7cdb60e6aebacbd0be22c64799fad6", "parents": [ "e743729c1861570e680a44facfdf1b96da416856" ], "author": { "name": "Maxim Levitsky", "email": "mlevitsk@redhat.com", "time": "Mon Jun 22 19:55:33 2020 +0300" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jun 22 13:32:01 2020 -0400" }, "message": "SVM: add test for nested guest RIP corruption\n\nThis adds a unit test for SVM nested register corruption that happened when\nL0 emulated an instruction and just before injecting a vmexit, and upon\nvmexit the VMCB contained pre-emulation values of RAX, RIP and RSP.\nThis test detects RIP corruption when RIP is at the start of\nthe emulated instruction but the instruction was already executed.\n\nThe upstream commit that fixed this bug is b6162e82aef19fee9c32cb3fe9ac30d9116a8c73\n KVM: nSVM: Preserve registers modifications done before nested_svm_vmexit()\n\nSigned-off-by: Maxim Levitsky \u003cmlevitsk@redhat.com\u003e\nMessage-Id: \u003c20200622165533.145882-1-mlevitsk@redhat.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "e743729c1861570e680a44facfdf1b96da416856", "tree": "11277ebb5a7a5a9e5b49b60ebb5e3b7faa199456", "parents": [ "3d4f48f950c2b7ec4610548e1d7dc3cb3ef9c42d" ], "author": { "name": "Vitaly Kuznetsov", "email": "vkuznets@redhat.com", "time": "Wed Jun 17 17:21:24 2020 +0200" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jun 22 13:22:01 2020 -0400" }, "message": "x86: fix build with GCC10\n\nkvm-unit-tests fail to build with GCC10:\n\n/usr/bin/ld: lib/libcflat.a(usermode.o):\n ./kvm-unit-tests/lib/x86/usermode.c:17: multiple definition of `jmpbuf\u0027;\n lib/libcflat.a(fault_test.o):\n ./kvm-unit-tests/lib/x86/fault_test.c:3: first defined here\n\nIt seems that \u0027jmpbuf\u0027 doesn\u0027t need to be global in either of these files,\nmake it static in both.\n\nSigned-off-by: Vitaly Kuznetsov \u003cvkuznets@redhat.com\u003e\nMessage-Id: \u003c20200617152124.402765-1-vkuznets@redhat.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "9d7f9a2f0b3427bbeda242c64f698d14e21d2a42", "tree": "df7b6905c61355f8f8d9bbb24e0fa74d1b1848f0", "parents": [ "f86fb6cbf292d48ab78205dc7acab1a380561639" ], "author": { "name": "Janosch Frank", "email": "frankja@linux.ibm.com", "time": "Mon May 25 10:43:40 2020 +0200" }, "committer": { "name": "Thomas Huth", "email": "thuth@redhat.com", "time": "Tue Jun 16 20:22:14 2020 +0200" }, "message": "s390x: stsi: Make output tap13 compatible\n\nIn tap13 output # is a special character and only \"skip\" and \"todo\"\nare allowed to come after it. Let\u0027s appease our CI environment and\nreplace # with \"count\".\n\nSigned-off-by: Janosch Frank \u003cfrankja@linux.ibm.com\u003e\nMessage-Id: \u003c20200525084340.1454-1-frankja@linux.ibm.com\u003e\nSigned-off-by: Thomas Huth \u003cthuth@redhat.com\u003e\n" }, { "commit": "f86fb6cbf292d48ab78205dc7acab1a380561639", "tree": "5b1be93613e7b907f840bdcd6d2f1927cb8f0d4c", "parents": [ "417ecf40bad5b6e753bb9f5cd4dff45cd90c2f28" ], "author": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Tue Jun 16 10:02:17 2020 -0400" }, "committer": { "name": "Thomas Huth", "email": "thuth@redhat.com", "time": "Tue Jun 16 20:15:15 2020 +0200" }, "message": "x86: disable SSE on 32-bit hosts\n\nOn 64-bit hosts we are disabling SSE and SSE2. Depending on the\ncompiler however it may use movq instructions for 64-bit transfers\neven when targeting 32-bit processors; when CR4.OSFXSR is not set,\nthis results in an undefined opcode exception, so tell the compiler\nto avoid those instructions on 32-bit hosts as well.\n\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\nMessage-Id: \u003c20200616140217.104362-1-pbonzini@redhat.com\u003e\nSigned-off-by: Thomas Huth \u003cthuth@redhat.com\u003e\n" }, { "commit": "3d4f48f950c2b7ec4610548e1d7dc3cb3ef9c42d", "tree": "4f626bfdc5042d5f1234c95593a7ecd22d0adef7", "parents": [ "4b74c718c57d1697e3228e2c699b0fe9c1d24e97" ], "author": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Tue Jun 16 10:00:01 2020 -0400" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Tue Jun 16 10:00:08 2020 -0400" }, "message": "x86: disable SSE on 32-bit hosts\n\nOn 64-bit hosts we are disabling SSE and SSE2. Depending on the\ncompiler however it may use movq instructions for 64-bit transfers\neven when targeting 32-bit processors; when CR4.OSFXSR is not set,\nthis results in an undefined opcode exception, so tell the compiler\nto avoid those instructions on 32-bit hosts as well.\n\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "417ecf40bad5b6e753bb9f5cd4dff45cd90c2f28", "tree": "91cc2d5d1562600ea508dbc373208712772aaf90", "parents": [ "951f9b82e24cac87374179cbb13016609ecd6ff0" ], "author": { "name": "Thomas Huth", "email": "thuth@redhat.com", "time": "Wed May 13 11:54:46 2020 +0200" }, "committer": { "name": "Thomas Huth", "email": "thuth@redhat.com", "time": "Tue Jun 16 15:00:07 2020 +0200" }, "message": "Compile the kvm-unit-tests also with Clang\n\nTo get some more test coverage, let\u0027s check compilation with Clang, too.\n\nMessage-Id: \u003c20200514192626.9950-12-thuth@redhat.com\u003e\nSigned-off-by: Thomas Huth \u003cthuth@redhat.com\u003e\n" }, { "commit": "951f9b82e24cac87374179cbb13016609ecd6ff0", "tree": "a12d01baeb0b8d8e4ce7077dd5c972c2f71e898c", "parents": [ "2d9e3a376b9adcc93f9b9874f7bc5408a1269a22" ], "author": { "name": "Thomas Huth", "email": "thuth@redhat.com", "time": "Wed May 13 13:05:06 2020 +0200" }, "committer": { "name": "Thomas Huth", "email": "thuth@redhat.com", "time": "Tue Jun 16 15:00:07 2020 +0200" }, "message": "vmx_tests: Silence warning from Clang\n\nClang complains:\n\nx86/vmx_tests.c:8429:40: error: converting the result of \u0027\u003c\u003c\u0027 to a boolean\n always evaluates to true [-Werror,-Wtautological-constant-compare]\n vmx_preemption_timer_zero_inject_db(1 \u003c\u003c DB_VECTOR);\n ^\n\nLooking at the code, the \"1 \u003c\u003c DB_VECTOR\" is done within the function\nvmx_preemption_timer_zero_inject_db() indeed:\n\n\tvmcs_write(EXC_BITMAP, intercept_db ? 1 \u003c\u003c DB_VECTOR : 0);\n\n... so using \"true\" as parameter for the function should be appropriate\nhere.\n\nMessage-Id: \u003c20200514192626.9950-11-thuth@redhat.com\u003e\nSigned-off-by: Thomas Huth \u003cthuth@redhat.com\u003e\n" }, { "commit": "2d9e3a376b9adcc93f9b9874f7bc5408a1269a22", "tree": "e5e4408ec315d22873520fc450b7edc73065f2fa", "parents": [ "f3154609b29ad92746c77d46bca03e3b79431437" ], "author": { "name": "Bill Wendling", "email": "morbo@google.com", "time": "Wed Oct 30 14:04:19 2019 -0700" }, "committer": { "name": "Thomas Huth", "email": "thuth@redhat.com", "time": "Tue Jun 16 15:00:07 2020 +0200" }, "message": "x86: use inline asm to retrieve stack pointer\n\nAccording to GCC\u0027s documentation, the only supported use for specifying\nregisters for local variables is \"to specify registers for input and\noutput operands when calling Extended asm.\" Using it as a shortcut to\nget the value in a register isn\u0027t guaranteed to work, and clang\ncomplains that the variable is uninitialized.\n\nSigned-off-by: Bill Wendling \u003cmorbo@google.com\u003e\nMessage-Id: \u003c20191030210419.213407-7-morbo@google.com\u003e\nSigned-off-by: Thomas Huth \u003cthuth@redhat.com\u003e\n" }, { "commit": "f3154609b29ad92746c77d46bca03e3b79431437", "tree": "09c586c0a8ba790c1ec46895111e73d15e09e741", "parents": [ "41a7f56bf5d1c9106106ca7f496c070fbd1b68f9" ], "author": { "name": "Bill Wendling", "email": "morbo@google.com", "time": "Wed Oct 30 14:04:18 2019 -0700" }, "committer": { "name": "Thomas Huth", "email": "thuth@redhat.com", "time": "Tue Jun 16 15:00:07 2020 +0200" }, "message": "x86: use a non-negative number in shift\n\nShifting a negative number is undefined. Clang complains about it:\n\nx86/svm.c:1131:38: error: shifting a negative signed value is undefined [-Werror,-Wshift-negative-value]\n test-\u003evmcb-\u003econtrol.tsc_offset \u003d TSC_OFFSET_VALUE;\n\nUsing \"~0ull\" results in identical asm code:\n\n\tbefore: movabsq $-281474976710656, %rsi\n\tafter: movabsq $-281474976710656, %rsi\n\nSigned-off-by: Bill Wendling \u003cmorbo@google.com\u003e\n[thuth: Rebased to master - code is in svm_tests.c instead of svm.c now]\nMessage-Id: \u003c20200514192626.9950-9-thuth@redhat.com\u003e\nSigned-off-by: Thomas Huth \u003cthuth@redhat.com\u003e\n" }, { "commit": "41a7f56bf5d1c9106106ca7f496c070fbd1b68f9", "tree": "8beed1e0170e77db96d8ed59c4264b4f6b263914", "parents": [ "5126732d73aa75a0bc84f898042bfe35640624b8" ], "author": { "name": "Thomas Huth", "email": "thuth@redhat.com", "time": "Wed May 13 11:50:50 2020 +0200" }, "committer": { "name": "Thomas Huth", "email": "thuth@redhat.com", "time": "Tue Jun 16 15:00:07 2020 +0200" }, "message": "Update the gitlab-ci to Fedora 32\n\nFedora 30 is end of life, let\u0027s use the version 32 instead.\n\nUnfortunately, we have to disable taskswitch2 in the gitlab-ci now.\nIt does not seem to work anymore with the latest version of gcc and/or\nQEMU. We still check it in the travis-ci, though, so until somebody has\nsome spare time to debug this issue, it should be ok to disable it here.\n\nMessage-Id: \u003c20200514192626.9950-8-thuth@redhat.com\u003e\nSigned-off-by: Thomas Huth \u003cthuth@redhat.com\u003e\n" }, { "commit": "5126732d73aa75a0bc84f898042bfe35640624b8", "tree": "74c520dad03b1aa5e3e4b77c071397ae146a1871", "parents": [ "ac9e075980a0be4cbaa70671de25462070af5adf" ], "author": { "name": "Thomas Huth", "email": "thuth@redhat.com", "time": "Wed May 13 13:14:46 2020 +0200" }, "committer": { "name": "Thomas Huth", "email": "thuth@redhat.com", "time": "Tue Jun 16 15:00:07 2020 +0200" }, "message": "Fix powerpc issue with the linker from Fedora 32\n\nThe linker from Fedora 32 complains:\n\npowerpc64-linux-gnu-ld: powerpc/selftest.elf: error: PHDR segment not\n covered by LOAD segment\n\nLet\u0027s introduce some fake PHDRs to the linker script to get this\nworking again.\n\nMessage-Id: \u003c20200514192626.9950-7-thuth@redhat.com\u003e\nSigned-off-by: Thomas Huth \u003cthuth@redhat.com\u003e\n" }, { "commit": "ac9e075980a0be4cbaa70671de25462070af5adf", "tree": "ad9dd43335a002c57128ef3d3148550d9fde5c7d", "parents": [ "24a4a7c96a3b1c60d0785118a7ba61c442d621df" ], "author": { "name": "Thomas Huth", "email": "thuth@redhat.com", "time": "Tue May 12 11:50:48 2020 +0200" }, "committer": { "name": "Thomas Huth", "email": "thuth@redhat.com", "time": "Tue Jun 16 15:00:07 2020 +0200" }, "message": "Always compile the kvm-unit-tests with -fno-common\n\nThe new GCC v10 uses -fno-common by default. To avoid that we commit\ncode that declares global variables twice and thus fails to link with\nthe latest version, we should also compile with -fno-common when using\nolder versions of the compiler. However, this now also means that we\ncan not play the trick with the common auxinfo struct anymore. Thus\ndeclare it as extern in the header now and link auxinfo.c on x86, too.\n\nMessage-Id: \u003c20200514192626.9950-6-thuth@redhat.com\u003e\nSigned-off-by: Thomas Huth \u003cthuth@redhat.com\u003e\n" }, { "commit": "24a4a7c96a3b1c60d0785118a7ba61c442d621df", "tree": "460c56c07fd0f6a0b9ac00808dbe356512f1f007", "parents": [ "a488ef738797861178105e53cccf8106404c8d09" ], "author": { "name": "Thomas Huth", "email": "thuth@redhat.com", "time": "Wed Jan 22 16:38:36 2020 +0100" }, "committer": { "name": "Thomas Huth", "email": "thuth@redhat.com", "time": "Tue Jun 16 15:00:07 2020 +0200" }, "message": "Fixes for the umip test\n\nWhen compiling umip.c with -O2 instead of -O1, there are currently\ntwo problems. First, the compiler complains:\n\n x86/umip.c: In function ‘do_ring3’:\n x86/umip.c:162:37: error: array subscript 4096 is above array bounds of\n ‘unsigned char[4096]’ [-Werror\u003darray-bounds]\n [user_stack_top]\"m\"(user_stack[sizeof user_stack]),\n ~~~~~~~~~~^~~~~~~~~~~~~~~~~~~\n\nThis can be fixed by initializing the stack to point to one of the last\nbytes of the array instead.\n\nThe second problem is that some tests are failing - and this is due\nto the fact that the GP_ASM macro uses inline asm without the \"volatile\"\nkeyword - so that the compiler reorders this code in certain cases\nwhere it should not. Fix it by adding \"volatile\" here.\n\nMessage-Id: \u003c20200122160944.29750-1-thuth@redhat.com\u003e\nReviewed-by: Vitaly Kuznetsov \u003cvkuznets@redhat.com\u003e\nSigned-off-by: Thomas Huth \u003cthuth@redhat.com\u003e\n" }, { "commit": "a488ef738797861178105e53cccf8106404c8d09", "tree": "6d5e6ddb296721c195ba795928d82a0f20ec0896", "parents": [ "75a7ac3089e07511231d3fd7b612cd9e243edd7b" ], "author": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon May 11 18:59:59 2020 +0200" }, "committer": { "name": "Thomas Huth", "email": "thuth@redhat.com", "time": "Tue Jun 16 15:00:07 2020 +0200" }, "message": "x86: avoid multiple defined symbol\n\nFedora 32 croaks about a symbol that is defined twice, fix it.\n\nReported-by: Dr. David Alan Gilbert \u003cdgilbert@redhat.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\nMessage-Id: \u003c20200511165959.42442-1-pbonzini@redhat.com\u003e\nSigned-off-by: Thomas Huth \u003cthuth@redhat.com\u003e\n" }, { "commit": "75a7ac3089e07511231d3fd7b612cd9e243edd7b", "tree": "353534a4cfaacbfa62425d608977a6ae4c1af54c", "parents": [ "4b74c718c57d1697e3228e2c699b0fe9c1d24e97" ], "author": { "name": "Andrew Jones", "email": "drjones@redhat.com", "time": "Mon May 11 09:06:41 2020 +0200" }, "committer": { "name": "Thomas Huth", "email": "thuth@redhat.com", "time": "Tue Jun 16 15:00:07 2020 +0200" }, "message": "Fix out-of-tree builds\n\nSince b16df9ee5f3b out-of-tree builds have been broken because we\nstarted validating the newly user-configurable $erratatxt file\nbefore linking it into the build dir. We fix this not by moving\nthe validation, but by removing the linking and instead using the\nfull path of the $erratatxt file. This allows one to keep that file\nseparate from the src and build dirs.\n\nFixes: b16df9ee5f3b (\"arch-run: Add reserved variables to the default environ\")\nReported-by: Thomas Huth \u003cthuth@redhat.com\u003e\nSigned-off-by: Andrew Jones \u003cdrjones@redhat.com\u003e\nMessage-Id: \u003c20200511070641.23492-1-drjones@redhat.com\u003e\nSigned-off-by: Thomas Huth \u003cthuth@redhat.com\u003e\n" }, { "commit": "4b74c718c57d1697e3228e2c699b0fe9c1d24e97", "tree": "4bf919ef627f5661edffdd4b694019ef447cb26e", "parents": [ "31e68df7c38220f4144a45b8e3d1663f6348ee7e" ], "author": { "name": "Thomas Huth", "email": "thuth@redhat.com", "time": "Tue Jun 16 12:59:40 2020 +0200" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Tue Jun 16 08:29:34 2020 -0400" }, "message": "x86/pmu: Fix compilation on 32-bit hosts\n\nWhen building for 32-bit hosts, the compiler currently complains:\n\n x86/pmu.c: In function \u0027check_gp_counters_write_width\u0027:\n x86/pmu.c:490:30: error: left shift count \u003e\u003d width of type\n\nUse the correct suffix to avoid this problem.\n\nSigned-off-by: Thomas Huth \u003cthuth@redhat.com\u003e\nMessage-Id: \u003c20200616105940.2907-1-thuth@redhat.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "31e68df7c38220f4144a45b8e3d1663f6348ee7e", "tree": "d1f2088f0d868618f079e6be1799677281a409b0", "parents": [ "dc81845eced420580709dbebb9d2ef1ccfc3cd4b" ], "author": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jun 08 11:59:00 2020 -0400" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Wed Jun 10 11:29:40 2020 -0400" }, "message": "x86: always set up SMP\n\nCurrently setup_vm cannot assume that it can invoke IPIs, and therefore\nonly initializes CR0/CR3/CR4 on the CPU it runs on. In order to keep the\ninitialization code clean, let\u0027s just call smp_init (and therefore\nsetup_idt) unconditionally.\n\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "dc81845eced420580709dbebb9d2ef1ccfc3cd4b", "tree": "29d70d66b89046b8c395912db4b0265c8d36d2a4", "parents": [ "231b4c3b57dab2b0733e77a8cffab5064f248dbf" ], "author": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jun 08 08:42:08 2020 -0400" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Wed Jun 10 11:29:23 2020 -0400" }, "message": "remove unused file\n\nReviewed-by: Thomas Huth \u003cthuth@redhat.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "231b4c3b57dab2b0733e77a8cffab5064f248dbf", "tree": "ced16a188baf49c3e81df2edbdbad8b0eb659e31", "parents": [ "22f2901a0ea2dd5b5a32e51c51135e84a3da38ee" ], "author": { "name": "Roman Bolshakov", "email": "r.bolshakov@yadro.com", "time": "Sat May 30 00:26:37 2020 +0300" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon Jun 01 04:47:11 2020 -0400" }, "message": "x86: realmode: Add suffixes for push, pop and iret\n\nbinutils 2.33 and 2.34 changed generation of PUSH and POP for segment\nregisters and IRET in \u0027.code16gcc\u0027 [1][2][3][4]. gas also yields the\nfollowing warnings during the build of realmode.c:\n\nsnip.s: Assembler messages:\nsnip.s:2279: Warning: generating 32-bit `push\u0027, unlike earlier gas versions\nsnip.s:2296: Warning: generating 32-bit `pop\u0027, unlike earlier gas versions\nsnip.s:3633: Warning: generating 16-bit `iret\u0027 for .code16gcc directive\n\nThis change fixes warnings and failures of the tests:\n\n push/pop 3\n push/pop 4\n iret 1\n iret 3\n\n1. https://sourceware.org/bugzilla/show_bug.cgi?id\u003d24485\n2. https://sourceware.org/git/?p\u003dbinutils-gdb.git;h\u003d7cb22ff84745\n3. https://sourceware.org/git/?p\u003dbinutils-gdb.git;h\u003d06f74c5cb868\n4. https://sourceware.org/git/?p\u003dbinutils-gdb.git;h\u003d13e600d0f560\n\nCc: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\nSigned-off-by: Roman Bolshakov \u003cr.bolshakov@yadro.com\u003e\nMessage-Id: \u003c20200529212637.5034-1-r.bolshakov@yadro.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "22f2901a0ea2dd5b5a32e51c51135e84a3da38ee", "tree": "8a8b4ad590d24a7bc4f43bad8e29d0175b191231", "parents": [ "71de9c93fbdb15978ffa2f290dd120d3005a9292" ], "author": { "name": "Like Xu", "email": "like.xu@linux.intel.com", "time": "Fri May 29 15:43:46 2020 +0800" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Fri May 29 06:20:51 2020 -0400" }, "message": "x86: pmu: Test full-width counter writes support\n\nWhen the full-width writes capability is set, use the alternative MSR\nrange to write larger sign counter values (up to GP counter width).\n\nSigned-off-by: Like Xu \u003clike.xu@linux.intel.com\u003e\nMessage-Id: \u003c20200529074347.124619-4-like.xu@linux.intel.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "71de9c93fbdb15978ffa2f290dd120d3005a9292", "tree": "e4efc110fbe322377249041032ba6f793440595a", "parents": [ "d875ed4d1614f84903167ff038bdd9e677f460c2" ], "author": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Thu May 28 08:47:35 2020 -0400" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Fri May 29 05:50:09 2020 -0400" }, "message": "access: disable phys-bits\u003d36 for now\n\nSupport for guest-MAXPHYADDR \u003c host-MAXPHYADDR is not upstream yet,\nit should not be enabled. Otherwise, all the pde.36 and pte.36\nfail and the test takes so long that it times out.\n\nReported-by: Vitaly Kuznetsov \u003cvkuznets@redhat.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "d875ed4d1614f84903167ff038bdd9e677f460c2", "tree": "064e492e3a91a9b8e6c8a78fcca40089c4868959", "parents": [ "7edd698ed003e3c4d64868208c30d33fd97168b7" ], "author": { "name": "Roman Bolshakov", "email": "r.bolshakov@yadro.com", "time": "Fri Mar 20 17:55:41 2020 +0300" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon May 18 06:46:32 2020 -0400" }, "message": "README: Document steps to run the tests on macOS\n\nWhile at it, mention that hvf is a valid accel parameter.\n\nCc: Cameron Esfahani \u003cdirty@apple.com\u003e\nSigned-off-by: Roman Bolshakov \u003cr.bolshakov@yadro.com\u003e\nReviewed-by: Cameron Esfahani \u003cdirty@apple.com\u003e\nMessage-Id: \u003c20200320145541.38578-3-r.bolshakov@yadro.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "7edd698ed003e3c4d64868208c30d33fd97168b7", "tree": "e00ae964580bd13204d5105b820b6bd57ba5d761", "parents": [ "8202cf8424d2f1da6f67f6e825431e8159303ccc" ], "author": { "name": "Roman Bolshakov", "email": "r.bolshakov@yadro.com", "time": "Fri Mar 20 17:55:40 2020 +0300" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon May 18 06:46:32 2020 -0400" }, "message": "scripts/arch-run: Support testing of hvf accel\n\nThe tests can be run if Hypervisor.framework API is available:\n\n https://developer.apple.com/documentation/hypervisor?language\u003dobjc#1676667\n\nCc: Cameron Esfahani \u003cdirty@apple.com\u003e\nSigned-off-by: Roman Bolshakov \u003cr.bolshakov@yadro.com\u003e\nReviewed-by: Cameron Esfahani \u003cdirty@apple.com\u003e\nMessage-Id: \u003c20200320145541.38578-2-r.bolshakov@yadro.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "8202cf8424d2f1da6f67f6e825431e8159303ccc", "tree": "e0312854d7abc791de5fa48f69946a1dd6391154", "parents": [ "401299a581d7b255a615de482c3a9e97e090fd8a" ], "author": { "name": "Roman Bolshakov", "email": "r.bolshakov@yadro.com", "time": "Sun Mar 29 10:11:25 2020 +0300" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon May 18 06:45:15 2020 -0400" }, "message": "x86: realmode: Test interrupt delivery after STI\n\nIf interrupts are disabled, STI is inhibiting interrupts for the\ninstruction following it. If STI is followed by HLT, the CPU is going to\nhandle all pending or new interrupts as soon as HLT is executed.\n\nTest if emulator properly clears inhibition state and allows the\nscenario outlined above.\n\nCc: Cameron Esfahani \u003cdirty@apple.com\u003e\nSigned-off-by: Roman Bolshakov \u003cr.bolshakov@yadro.com\u003e\nMessage-Id: \u003c20200329071125.79253-1-r.bolshakov@yadro.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "401299a581d7b255a615de482c3a9e97e090fd8a", "tree": "5f50a21c213161de0260ceaf7cd477bd2e1af5e9", "parents": [ "b49a1a6d4e234a60211805b7cb0db06c9b293209" ], "author": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Sat May 09 10:06:02 2020 -0400" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Sat May 09 10:06:02 2020 -0400" }, "message": "svm_tests: add RSM intercept test\n\nThis test is currently broken, but it passes under QEMU.\n\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "b49a1a6d4e234a60211805b7cb0db06c9b293209", "tree": "083a9c88bfacbdc95ff8c0645955bba23a873496", "parents": [ "9c8389546e1fbb6e25cc5bc22bc2f2765e9dbfbe" ], "author": { "name": "Jim Mattson", "email": "jmattson@google.com", "time": "Fri May 08 13:39:38 2020 -0700" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Sat May 09 09:26:31 2020 -0400" }, "message": "x86: VMX: Add a VMX-preemption timer expiration test\n\nWhen the VMX-preemption timer is activated, code executing in VMX\nnon-root operation should never be able to record a TSC value beyond\nthe deadline imposed by adding the scaled VMX-preemption timer value\nto the first TSC value observed by the guest after VM-entry.\n\nSigned-off-by: Jim Mattson \u003cjmattson@google.com\u003e\nReviewed-by: Peter Shier \u003cpshier@google.com\u003e\nMessage-Id: \u003c20200508203938.88508-1-jmattson@google.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "9c8389546e1fbb6e25cc5bc22bc2f2765e9dbfbe", "tree": "c8258d72c4c8560c11fa268cfe36f8102bcf7cff", "parents": [ "8a06a5bb165baf1c7b407d093470dd71bb0608a8" ], "author": { "name": "Cathy Avery", "email": "cavery@redhat.com", "time": "Sat May 09 07:16:22 2020 -0400" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Sat May 09 08:56:50 2020 -0400" }, "message": "svm: Test V_IRQ injection\n\nTest V_IRQ injection from L1 to L2 with V_TPR less\nthan or greater than V_INTR_PRIO. Also test VINTR\nintercept with differing V_TPR and V_INTR_PRIO.\n\nSigned-off-by: Cathy Avery \u003ccavery@redhat.com\u003e\nMessage-Id: \u003c20200509111622.2184-1-cavery@redhat.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "8a06a5bb165baf1c7b407d093470dd71bb0608a8", "tree": "7b8acdc086aa88b047fb12cab061a2b24c9cee21", "parents": [ "74e79380f900368bf7f8c9aaac5ac1aba962d63e" ], "author": { "name": "Cathy Avery", "email": "cavery@redhat.com", "time": "Tue May 05 12:04:18 2020 -0400" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Wed May 06 10:47:46 2020 -0400" }, "message": "KVM: VMX: add test for NMI delivery during HLT\n\nSigned-off-by: Cathy Avery \u003ccavery@redhat.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "74e79380f900368bf7f8c9aaac5ac1aba962d63e", "tree": "5787e383ce750fa712abe1d7c03e3912e1c4ee2b", "parents": [ "a3307eb5dbdba6b657a0d9b19eb9bc0c05d04add" ], "author": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Tue May 05 12:01:48 2020 -0400" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Tue May 05 12:01:48 2020 -0400" }, "message": "VMX: use xAPIC mode on all processors\n\nResults are undefined if xAPIC/x2APIC mode is not homogeneous on all processors.\nSo far things seemed to have mostly worked, but if you end up calling xapic_icr_write\nfrom an x2APIC-mode processor the write is eaten and the IPI is not delivered.\n\nReported-by: Cathy Avery \u003ccavery@redhat.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "a3307eb5dbdba6b657a0d9b19eb9bc0c05d04add", "tree": "dbb6b24ca3676ac0ee7b0a5ea022ae44988a2417", "parents": [ "7e7d93578f02bba2e484ba49a08fa6b2ebbdc4a8", "f7df29115f736b9ffe8e529ba9c2b418d2f5e736" ], "author": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon May 04 12:44:33 2020 -0400" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon May 04 12:44:33 2020 -0400" }, "message": "Merge tag \u0027s390x-2020-04-30\u0027 of https://github.com/davidhildenbrand/kvm-unit-tests\n\nNew maintainer, reviewer, and cc list. New STSI test. Lots of minor fixes\nand cleanups\n" }, { "commit": "7e7d93578f02bba2e484ba49a08fa6b2ebbdc4a8", "tree": "84f3797ebaeeda0a4b3754a3561959a52d419b3c", "parents": [ "8feb8cfb0e31fe2ad7ebd101828a4d957ee52739" ], "author": { "name": "Cathy Avery", "email": "cavery@redhat.com", "time": "Tue Apr 28 14:41:00 2020 -0400" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon May 04 12:35:48 2020 -0400" }, "message": "svm: Fix nmi hlt test to fail test correctly\n\nThe last test does not return vmmcall on fail resulting\nin passing the entire test.\n\nSigned-off-by: Cathy Avery \u003ccavery@redhat.com\u003e\nMessage-Id: \u003c20200428184100.5426-1-cavery@redhat.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "8feb8cfb0e31fe2ad7ebd101828a4d957ee52739", "tree": "652132fb188853498d1858431e7f7595004c8818", "parents": [ "149c2513efc820a4d4a8dd1a3827f8310e95d5be" ], "author": { "name": "Sean Christopherson", "email": "sean.j.christopherson@intel.com", "time": "Tue Apr 28 16:11:35 2020 -0700" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon May 04 12:34:55 2020 -0400" }, "message": "x86: msr: Don\u0027t test bits 63:32 of SYSENTER MSRs on 32-bit builds\n\nSquish the \"address\" stuffed into SYSENTER_EIP/ESP into an unsigned long\nso as to drop bits 63:32 on 32-bit builds. VMX diverges from bare metal\nin the sense that the associated VMCS fields are natural width fields,\nwhereas the actual MSRs hold 64-bit values, even on CPUs that don\u0027t\nsupport 64-bit mode. This causes the tests to fail if bits 63:32 are\nnon-zero and a VM-Exit/VM-Enter occurs on and/or between WRMSR/RDMSR,\ne.g. when running the tests in L1 or deeper.\n\nDon\u0027t bother trying to actually test that bits 63:32 are dropped, the\nbehavior depends on the (virtual) CPU capabilities, not the build, and\nthe behavior is specific to VMX as both SVM and bare metal preserve the\nfull 64-bit values. And because practically no one cares about 32-bit\nKVM, let alone an obscure architectural quirk that doesn\u0027t affect real\nworld kernels.\n\nSigned-off-by: Sean Christopherson \u003csean.j.christopherson@intel.com\u003e\nMessage-Id: \u003c20200428231135.12903-1-sean.j.christopherson@intel.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "149c2513efc820a4d4a8dd1a3827f8310e95d5be", "tree": "4a6685b0aefc29cb26dc41d68149e52e3bcd9d27", "parents": [ "dd3974c00f423165d9022a10f5769e1b9a213f3a" ], "author": { "name": "Sean Christopherson", "email": "sean.j.christopherson@intel.com", "time": "Fri Apr 24 10:40:25 2020 -0700" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon May 04 12:33:56 2020 -0400" }, "message": "nVMX: Check EXIT_QUALIFICATION on VM-Enter failures due to bad guest state\n\nAssert that vmcs.EXIT_QUALIFICATION contains the correct failure code on\nfailed VM-Enter due to invalid guest state. Hardcode the expected code\nto the default code, \u00270\u0027, rather than passing in the expected code to\nminimize churn and boilerplate code, which works for all existing tests.\n\nSigned-off-by: Sean Christopherson \u003csean.j.christopherson@intel.com\u003e\nMessage-Id: \u003c20200424174025.1379-1-sean.j.christopherson@intel.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "dd3974c00f423165d9022a10f5769e1b9a213f3a", "tree": "10264fd605537c11b8d7c422086a9f077ac0bc81", "parents": [ "3652250b7cc28b54ac997062882f97058f2a8488" ], "author": { "name": "Sean Christopherson", "email": "sean.j.christopherson@intel.com", "time": "Thu Apr 23 12:50:50 2020 -0700" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon May 04 12:33:27 2020 -0400" }, "message": "x86: ioapic: Run physical destination mode test iff cpu_count() \u003e 1\n\nMake test_ioapic_physical_destination_mode() depending on having at\nleast two CPUs as it sets -\u003edest_id to \u00271\u0027, i.e. expects CPU0 and CPU1\nto exist. This analysis is backed up by the fact that the test was\noriginally gated by cpu_count() \u003e 1.\n\nFixes: dcf27dc5b5499 (\"x86: Fix the logical destination mode test\")\nCc: Nitesh Narayan Lal \u003cnitesh@redhat.com\u003e\nSigned-off-by: Sean Christopherson \u003csean.j.christopherson@intel.com\u003e\nMessage-Id: \u003c20200423195050.26310-1-sean.j.christopherson@intel.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "3652250b7cc28b54ac997062882f97058f2a8488", "tree": "cd3fb7861ddd790dce9222e17df1dd316fa04873", "parents": [ "7e7aa86f7418a8343de46583977f631e55fd02ed" ], "author": { "name": "Simon Smith", "email": "brigidsmith@google.com", "time": "Mon Apr 20 10:58:34 2020 -0700" }, "committer": { "name": "Paolo Bonzini", "email": "pbonzini@redhat.com", "time": "Mon May 04 12:30:41 2020 -0400" }, "message": "x86: nVMX: add new test for vmread/vmwrite flags preservation\n\nThis commit adds new unit tests for commit a4d956b93904 (\"KVM: nVMX:\nvmread should not set rflags to specify success in case of #PF\")\n\nThe two new tests force a vmread and a vmwrite on an unmapped\naddress to cause a #PF and verify that the low byte of %rflags is\npreserved and that %rip is not advanced. The commit fixed a\nbug in vmread, but we include a test for vmwrite as well for\ncompleteness.\n\nBefore the aforementioned commit, the ALU flags would be incorrectly\ncleared and %rip would be advanced (for vmread).\n\nSigned-off-by: Simon Smith \u003cbrigidsmith@google.com\u003e\nReviewed-by: Jim Mattson \u003cjmattson@google.com\u003e\nReviewed-by: Peter Shier \u003cpshier@google.com\u003e\nReviewed-by: Krish Sadhukhan \u003ckrish.sadhukhan@oracle.com\u003e\nReviewed-by: Oliver Upton \u003coupton@google.com\u003e\nMessage-Id: \u003c20200420175834.258122-1-brigidsmith@google.com\u003e\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n" }, { "commit": "f7df29115f736b9ffe8e529ba9c2b418d2f5e736", "tree": "386bbdaaca2a789b6e689bcbb50ccc54345acc36", "parents": [ "166da884ddd1bb93446b932209b92195700606f5" ], "author": { "name": "Janosch Frank", "email": "frankja@linux.ibm.com", "time": "Wed Apr 29 10:35:18 2020 -0400" }, "committer": { "name": "David Hildenbrand", "email": "david@redhat.com", "time": "Thu Apr 30 16:52:14 2020 +0200" }, "message": "s390x: Fix library constant definitions\n\nSeems like I uppercased the whole region instead of only the ULs when\nI added those definitions. Let\u0027s make the x lowercase again.\n\nSigned-off-by: Janosch Frank \u003cfrankja@linux.ibm.com\u003e\nReviewed-by: Christian Borntraeger \u003cborntraeger@de.ibm.com\u003e\nReviewed-by: Cornelia Huck \u003ccohuck@redhat.com\u003e\nReviewed-by: David Hildenbrand \u003cdavid@redhat.com\u003e\nMessage-Id: \u003c20200429143518.1360468-11-frankja@linux.ibm.com\u003e\nSigned-off-by: David Hildenbrand \u003cdavid@redhat.com\u003e\n" }, { "commit": "166da884ddd1bb93446b932209b92195700606f5", "tree": "16379d6aae17eaef44c62c37e6b26bf1384763f6", "parents": [ "ccf6dd34be8b999bc9be5799baa7a841b54cbfbb" ], "author": { "name": "Janosch Frank", "email": "frankja@linux.ibm.com", "time": "Wed Apr 29 10:35:17 2020 -0400" }, "committer": { "name": "David Hildenbrand", "email": "david@redhat.com", "time": "Thu Apr 30 16:52:14 2020 +0200" }, "message": "s390x: smp: Add restart when running test\n\nLet\u0027s make sure we can restart a cpu that is already running.\nRestarting it if it is stopped is implicitely tested by the the other\nrestart calls in the smp test.\n\nSigned-off-by: Janosch Frank \u003cfrankja@linux.ibm.com\u003e\nReviewed-by: Cornelia Huck \u003ccohuck@redhat.com\u003e\nReviewed-by: David Hildenbrand \u003cdavid@redhat.com\u003e\nMessage-Id: \u003c20200429143518.1360468-10-frankja@linux.ibm.com\u003e\nSigned-off-by: David Hildenbrand \u003cdavid@redhat.com\u003e\n" }, { "commit": "ccf6dd34be8b999bc9be5799baa7a841b54cbfbb", "tree": "d01ea9cf4cf03accad5a619c49901455c27c0a4b", "parents": [ "af9d06870cd43092c6f70bfa4d76ae7ace5d329c" ], "author": { "name": "Janosch Frank", "email": "frankja@linux.ibm.com", "time": "Wed Apr 29 10:35:15 2020 -0400" }, "committer": { "name": "David Hildenbrand", "email": "david@redhat.com", "time": "Thu Apr 30 16:52:14 2020 +0200" }, "message": "s390x: smp: Use full PSW to bringup new cpu\n\nUp to now we ignored the psw mask and only used the psw address when\nbringing up a new cpu. For DAT we need to also load the mask, so let\u0027s\ndo that.\n\nSigned-off-by: Janosch Frank \u003cfrankja@linux.ibm.com\u003e\nReviewed-by: Cornelia Huck \u003ccohuck@redhat.com\u003e\nReviewed-by: David Hildenbrand \u003cdavid@redhat.com\u003e\nMessage-Id: \u003c20200429143518.1360468-8-frankja@linux.ibm.com\u003e\nSigned-off-by: David Hildenbrand \u003cdavid@redhat.com\u003e\n" }, { "commit": "af9d06870cd43092c6f70bfa4d76ae7ace5d329c", "tree": "df16a0f21b18a9069f2e4acac5294020abda8a28", "parents": [ "deb791fde6d2663ba9a48389b9da3ab14dd1fe2f" ], "author": { "name": "Janosch Frank", "email": "frankja@linux.ibm.com", "time": "Wed Apr 29 10:35:14 2020 -0400" }, "committer": { "name": "David Hildenbrand", "email": "david@redhat.com", "time": "Thu Apr 30 16:52:14 2020 +0200" }, "message": "s390x: smp: Remove unneeded cpu loops\n\nNow that we have a loop which is executed after we return from the\nmain function of a secondary cpu, we can remove the surplus loops.\n\nSigned-off-by: Janosch Frank \u003cfrankja@linux.ibm.com\u003e\nReviewed-by: Cornelia Huck \u003ccohuck@redhat.com\u003e\nAcked-by: David Hildenbrand \u003cdavid@redhat.com\u003e\nMessage-Id: \u003c20200429143518.1360468-7-frankja@linux.ibm.com\u003e\nSigned-off-by: David Hildenbrand \u003cdavid@redhat.com\u003e\n" }, { "commit": "deb791fde6d2663ba9a48389b9da3ab14dd1fe2f", "tree": "9b1359c301a0ac8b33dcc96ec50ec2b53d99c622", "parents": [ "1916fbead27a55df916f1c46f789a76d5837e384" ], "author": { "name": "Janosch Frank", "email": "frankja@linux.ibm.com", "time": "Wed Apr 29 10:35:13 2020 -0400" }, "committer": { "name": "David Hildenbrand", "email": "david@redhat.com", "time": "Thu Apr 30 16:52:14 2020 +0200" }, "message": "s390x: smp: Loop if secondary cpu returns into cpu setup again\n\nUp to now a secondary cpu could have returned from the function it was\nexecuting and ending up somewhere in cstart64.S. This was mostly\ncircumvented by an endless loop in the function that it executed.\n\nLet\u0027s add a loop to the end of the cpu setup, so we don\u0027t have to rely\non added loops in the tests.\n\nSigned-off-by: Janosch Frank \u003cfrankja@linux.ibm.com\u003e\nReviewed-by: Cornelia Huck \u003ccohuck@redhat.com\u003e\nMessage-Id: \u003c20200429143518.1360468-6-frankja@linux.ibm.com\u003e\nSigned-off-by: David Hildenbrand \u003cdavid@redhat.com\u003e\n" }, { "commit": "1916fbead27a55df916f1c46f789a76d5837e384", "tree": "339570b157b4d727746e43bd2b59af1bbe4e9156", "parents": [ "fc67b07a4b5183a336f254bc886f9032f603bd5b" ], "author": { "name": "Janosch Frank", "email": "frankja@linux.ibm.com", "time": "Wed Apr 29 10:35:12 2020 -0400" }, "committer": { "name": "David Hildenbrand", "email": "david@redhat.com", "time": "Thu Apr 30 16:52:14 2020 +0200" }, "message": "s390x: smp: Test local interrupts after cpu reset\n\nLocal interrupts (external and emergency call) should be cleared after\nany cpu reset.\n\nSigned-off-by: Janosch Frank \u003cfrankja@linux.ibm.com\u003e\nReviewed-by: Cornelia Huck \u003ccohuck@redhat.com\u003e\nMessage-Id: \u003c20200429143518.1360468-5-frankja@linux.ibm.com\u003e\nSigned-off-by: David Hildenbrand \u003cdavid@redhat.com\u003e\n" }, { "commit": "fc67b07a4b5183a336f254bc886f9032f603bd5b", "tree": "00d38a97bc2c1447a6c338efacf35ddad8b3c130", "parents": [ "3947751d9189946da7486eb765178616d6473745" ], "author": { "name": "Janosch Frank", "email": "frankja@linux.ibm.com", "time": "Wed Apr 29 10:35:11 2020 -0400" }, "committer": { "name": "David Hildenbrand", "email": "david@redhat.com", "time": "Thu Apr 30 16:52:14 2020 +0200" }, "message": "s390x: smp: Test stop and store status on a running and stopped cpu\n\nLet\u0027s also test the stop portion of the \"stop and store status\" sigp\norder.\n\nSigned-off-by: Janosch Frank \u003cfrankja@linux.ibm.com\u003e\nReviewed-by: Cornelia Huck \u003ccohuck@redhat.com\u003e\nReviewed-by: David Hildenbrand \u003cdavid@redhat.com\u003e\nMessage-Id: \u003c20200429143518.1360468-4-frankja@linux.ibm.com\u003e\nSigned-off-by: David Hildenbrand \u003cdavid@redhat.com\u003e\n" }, { "commit": "3947751d9189946da7486eb765178616d6473745", "tree": "6c1bf8e6250b9636c432ae7654b3ddf301e15010", "parents": [ "dedae8c54f8ac6cb3eb9fef4159d2ac82f641114" ], "author": { "name": "Janosch Frank", "email": "frankja@linux.ibm.com", "time": "Wed Apr 29 10:35:10 2020 -0400" }, "committer": { "name": "David Hildenbrand", "email": "david@redhat.com", "time": "Thu Apr 30 16:52:14 2020 +0200" }, "message": "s390x: smp: Dirty fpc before initial reset test\n\nLet\u0027s dirty the fpc, before we test if the initial reset sets it to 0.\n\nSigned-off-by: Janosch Frank \u003cfrankja@linux.ibm.com\u003e\nReviewed-by: Thomas Huth \u003cthuth@redhat.com\u003e\nReviewed-by: Cornelia Huck \u003ccohuck@redhat.com\u003e\nReviewed-by: David Hildenbrand \u003cdavid@redhat.com\u003e\nMessage-Id: \u003c20200429143518.1360468-3-frankja@linux.ibm.com\u003e\nSigned-off-by: David Hildenbrand \u003cdavid@redhat.com\u003e\n" }, { "commit": "dedae8c54f8ac6cb3eb9fef4159d2ac82f641114", "tree": "a8025facf6471d654f24028f8e3eac96bd76e8d5", "parents": [ "55ddfbb065b428f737dc549918cb822f6d866b21" ], "author": { "name": "Janosch Frank", "email": "frankja@linux.ibm.com", "time": "Fri Apr 24 05:33:56 2020 -0400" }, "committer": { "name": "David Hildenbrand", "email": "david@redhat.com", "time": "Fri Apr 24 11:55:57 2020 +0200" }, "message": "s390x: smp: Test all CRs on initial reset\n\nAll CRs are set to 0 and CRs 0 and 14 are set to pre-defined values,\nso we also need to test 1-13 and 15 for 0.\n\nAnd while we\u0027re at it, let\u0027s also set some values to cr 1, 7 and 13, so\nwe can actually be sure that they will be zeroed.\n\nSigned-off-by: Janosch Frank \u003cfrankja@linux.ibm.com\u003e\nReviewed-by: Cornelia Huck \u003ccohuck@redhat.com\u003e\nReviewed-by: Christian Borntraeger \u003cborntraeger@de.ibm.com\u003e\nReviewed-by: David Hildenbrand \u003cdavid@redhat.com\u003e\nMessage-Id: \u003c20200424093356.11931-1-frankja@linux.ibm.com\u003e\nSigned-off-by: David Hildenbrand \u003cdavid@redhat.com\u003e\n" }, { "commit": "55ddfbb065b428f737dc549918cb822f6d866b21", "tree": "2b6e7eb3c0fe833cb81dc646212850bdfca4bb32", "parents": [ "9753bf43fcd0d581356d62ae9289cdda8d61846a" ], "author": { "name": "Andrew Jones", "email": "drjones@redhat.com", "time": "Fri Apr 03 11:40:15 2020 +0200" }, "committer": { "name": "David Hildenbrand", "email": "david@redhat.com", "time": "Fri Apr 24 11:53:00 2020 +0200" }, "message": "s390x: unittests: Use smp parameter\n\nSigned-off-by: Andrew Jones \u003cdrjones@redhat.com\u003e\nReviewed-by: David Hildenbrand \u003cdavid@redhat.com\u003e\nReviewed-by: Janosch Frank \u003cfrankja@linux.ibm.com\u003e\nMessage-Id: \u003c20200403094015.506838-1-drjones@redhat.com\u003e\nSigned-off-by: David Hildenbrand \u003cdavid@redhat.com\u003e\n" }, { "commit": "9753bf43fcd0d581356d62ae9289cdda8d61846a", "tree": "260a4e745e8fdb78df9eb0677cdd3a05e34fe94c", "parents": [ "6abbd4f0ed2ce1cdf092c11e108896e4a1517047" ], "author": { "name": "Christian Borntraeger", "email": "borntraeger@de.ibm.com", "time": "Thu Apr 02 11:44:41 2020 -0400" }, "committer": { "name": "David Hildenbrand", "email": "david@redhat.com", "time": "Fri Apr 24 11:53:00 2020 +0200" }, "message": "s390x/smp: add minimal test for sigp sense running status\n\nTwo minimal tests:\n- our own CPU should be running when we check ourselves\n- a CPU should at least have some times with a not running\nindication. To speed things up we stop CPU1\n\nAlso rename smp_cpu_running to smp_sense_running_status.\n\nReviewed-by: Janosch Frank \u003cfrankja@linux.ibm.com\u003e\nReviewed-by: Cornelia Huck \u003ccohuck@redhat.com\u003e\nSigned-off-by: Christian Borntraeger \u003cborntraeger@de.ibm.com\u003e\nMessage-Id: \u003c20200402154441.13063-1-borntraeger@de.ibm.com\u003e\nSigned-off-by: David Hildenbrand \u003cdavid@redhat.com\u003e\n" }, { "commit": "6abbd4f0ed2ce1cdf092c11e108896e4a1517047", "tree": "80194e6a3da7f519c92fbc5dc29048b7fa6e7fdf", "parents": [ "7e62c95250d2710779601269e0d7b57839b38130" ], "author": { "name": "David Hildenbrand", "email": "david@redhat.com", "time": "Wed Apr 01 18:26:59 2020 +0200" }, "committer": { "name": "David Hildenbrand", "email": "david@redhat.com", "time": "Fri Apr 24 11:53:00 2020 +0200" }, "message": "s390x: STFLE operates on doublewords\n\nSTFLE operates on doublewords, not bytes. Passing in \"256\" resulted in\nsome ignored bits getting set. Not bad, but also not clean.\n\nLet\u0027s just convert our stfle handling code to operate on doublewords.\n\nReviewed-by: Christian Borntraeger \u003cborntraeger@de.ibm.com\u003e\nReviewed-by: Janosch Frank \u003cfrankja@linux.ibm.com\u003e\nMessage-Id: \u003c20200401163305.31550-1-david@redhat.com\u003e\nSigned-off-by: David Hildenbrand \u003cdavid@redhat.com\u003e\n" } ], "next": "7e62c95250d2710779601269e0d7b57839b38130" }