)]}'
{
  "commit": "2f478b60118f48bf66eaddcca0d23e80f87a682d",
  "tree": "9a4e6341f103e0e758f58b9db3e3d3a325145737",
  "parents": [
    "6e625a1a3f471d63989d3a66cdf6a0c307654848",
    "69703eb9a8ae28a46cd5bce7d69ceeef6273a104"
  ],
  "author": {
    "name": "Linus Torvalds",
    "email": "torvalds@linux-foundation.org",
    "time": "Sat Aug 17 10:36:47 2019 -0700"
  },
  "committer": {
    "name": "Linus Torvalds",
    "email": "torvalds@linux-foundation.org",
    "time": "Sat Aug 17 10:36:47 2019 -0700"
  },
  "message": "Merge tag \u0027riscv/for-v5.3-rc5\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux\n\nPull RISC-V fixes from Paul Walmsley:\n\n - Two patches to fix significant bugs in floating point register\n   context handling\n\n - A minor fix in RISC-V flush_tlb_page(), to supply a valid end address\n   to flush_tlb_range()\n\n - Two minor defconfig additions: to build the virtio hwrng driver by\n   default (for QEMU targets), and to partially synchronize the 32-bit\n   defconfig with the 64-bit defconfig\n\n* tag \u0027riscv/for-v5.3-rc5\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:\n  riscv: Make __fstate_clean() work correctly.\n  riscv: Correct the initialized flow of FP register\n  riscv: defconfig: Update the defconfig\n  riscv: rv32_defconfig: Update the defconfig\n  riscv: fix flush_tlb_range() end address for flush_tlb_page()\n",
  "tree_diff": []
}