| commit | 6de7abfbad1c6a45893a47a17c2ac91b551aa90d | [log] [tgz] |
|---|---|---|
| author | Vineet Gupta <vgupta@synopsys.com> | Mon Aug 03 18:27:56 2015 +0530 |
| committer | Vineet Gupta <vgupta@synopsys.com> | Tue Aug 04 09:26:30 2015 +0530 |
| tree | 11d53df8337ba1f498dcfb4d08a10c41d5e638ed | |
| parent | e13c42ecbe580509451e021ba2586871e5b47640 [diff] |
ARCv2: [axs103_smp] Reduce clk for Quad FPGA configs Signed-off-by: Vineet Gupta <vgupta@synopsys.com>