)]}'
{
  "commit": "026b6e781c5525336f8133fee2c42b5969b2e04e",
  "tree": "3bc0f34c8795937aba3f9514dfdc2b26e5b6d89d",
  "parents": [
    "651edc63b22437846ee736349a6d22cc8976444d"
  ],
  "author": {
    "name": "Suman Anna",
    "email": "s-anna@ti.com",
    "time": "Wed Jun 05 11:34:33 2019 -0500"
  },
  "committer": {
    "name": "Tero Kristo",
    "email": "t-kristo@ti.com",
    "time": "Tue Jun 18 14:47:52 2019 +0300"
  },
  "message": "arm64: dts: ti: k3-j721e: Add the MCU SRAM node\n\nAdd the on-chip SRAM present within the MCU domain as a mmio-sram node.\nThe K3 J721E SoCs have 1 MB of such memory. Any specific memory range\nwithin this RAM needed by a driver/software module ought to be reserved\nusing an appropriate child node.\n\nSigned-off-by: Suman Anna \u003cs-anna@ti.com\u003e\nSigned-off-by: Tero Kristo \u003ct-kristo@ti.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "285f5b4412ebf77605c98c6dc129043248bfbb1b",
      "old_mode": 33188,
      "old_path": "arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi",
      "new_id": "07b58eeebceb0ba91e8845c608e4fb8f25cec11f",
      "new_mode": 33188,
      "new_path": "arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi"
    }
  ]
}