Tegra 30 SMP support

I did this as a separate topic branch because it depends on both the
soc and the soc-drivers branch, so it brings both of those in as a base.

This branch contains work to enable SMP support on Tegra30 and reworks
some of the SMP bringup for T20 as well.

It also contains a device tree patch that builds on top of the SMP/clock
changes in the rest of the branch, so it made more sense to apply it
here than deal with the merge conflicts back and forth.
ARM: dt: Explicitly configure all serial ports on Tegra Cardhu

The ports are used as follows:
UART1/A: Routed to debug dongle
UART3/C: Bluetooth
UART4/D: Routed to debug dongle
UART5/E: Not connected

The debug dongle has jumpers to connect either UART1/A or UART4/D to
the DB-9 connector. UART1/A is typically used on Cardhu, and is the option
we assume here.

For now, only enable UART1/A, and explicitly disable all other ports.

The explicit disable prevents the message "of_serial 70006040.serial:
no clock-frequency property set" being printed during boot.

Enabling the other ports requires their clocks to be enabled, or accesses
to the registers will hang. At present, this requires adding entries into
board-dt-tegra30.c's tegra_dt_clk_init_table[]. Lets punt on that and wait
for the common clock bindings to set this all up, although that will also
requiring adding clock support to 8250.c.

While we're at it, fix board-dt-tegra30.c to enable the correct clock for
the debug UART. We got away with this before, because the bootloader already
enabled it.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2 files changed