)]}'
{
  "commit": "8b986c1ccf06984fa03e00ce5d6ba654141aafae",
  "tree": "26a5470b97356f9b5e29f5fb4dfc34ef703af484",
  "parents": [
    "c36c49eb673c5d78bcbf1831ecac8cdd425d152e"
  ],
  "author": {
    "name": "Heiko Stuebner",
    "email": "heiko@sntech.de",
    "time": "Wed Oct 12 01:18:41 2022 +0200"
  },
  "committer": {
    "name": "Palmer Dabbelt",
    "email": "palmer@rivosinc.com",
    "time": "Wed Oct 26 20:18:50 2022 -0700"
  },
  "message": "drivers/perf: riscv_pmu_sbi: add support for PMU variant on T-Head C9xx cores\n\nWith the T-HEAD C9XX cores being designed before or during the ratification\nto the SSCOFPMF extension, it implements functionality very similar but\nnot equal to it.\n\nIt implements overflow handling and also some privilege-mode filtering.\nWhile SSCOFPMF supports this for all modes, the C9XX only implements the\nfiltering for M-mode and S-mode but not user-mode.\n\nSo add some adaptions to allow the C9XX to still handle\nits PMU through the regular SBI PMU interface instead of defining new\ninterfaces or drivers.\n\nTo work properly, this requires a matching change in SBI, though the actual\ninterface between kernel and SBI does not change.\n\nThe main differences are a the overflow CSR and irq number.\n\nAs the reading of the overflow-csr is in the hot-path during irq handling,\nuse an errata and alternatives to not introduce new conditionals there.\n\nReviewed-by: Andrew Jones \u003cajones@ventanamicro.com\u003e\nReviewed-by: Conor Dooley \u003cconor.dooley@microchip.com\u003e\nSigned-off-by: Heiko Stuebner \u003cheiko@sntech.de\u003e\nSigned-off-by: Palmer Dabbelt \u003cpalmer@rivosinc.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "f3623df23b5fcd902339552e303c257a4dd6efa4",
      "old_mode": 33188,
      "old_path": "arch/riscv/Kconfig.erratas",
      "new_id": "69621ae6d647aa369cee22c5751d3a55ec93e0b6",
      "new_mode": 33188,
      "new_path": "arch/riscv/Kconfig.erratas"
    },
    {
      "type": "modify",
      "old_id": "21546937db39bf5fb968af60a7ee5b096242925b",
      "old_mode": 33188,
      "old_path": "arch/riscv/errata/thead/errata.c",
      "new_id": "fac5742d1c1e6f8e34771291b783ed58c7710251",
      "new_mode": 33188,
      "new_path": "arch/riscv/errata/thead/errata.c"
    },
    {
      "type": "modify",
      "old_id": "19a771085781a69da552b1daaa31b6b325a17a9a",
      "old_mode": 33188,
      "old_path": "arch/riscv/include/asm/errata_list.h",
      "new_id": "4180312d2a70107cd532c1eb2a3bf7ed96f56b37",
      "new_mode": 33188,
      "new_path": "arch/riscv/include/asm/errata_list.h"
    },
    {
      "type": "modify",
      "old_id": "3852c18362f53ec2630a7f10c5a6d6e6baf59a9c",
      "old_mode": 33188,
      "old_path": "drivers/perf/riscv_pmu_sbi.c",
      "new_id": "f6507efe2a5846d8180b1baf1047424fd65303bb",
      "new_mode": 33188,
      "new_path": "drivers/perf/riscv_pmu_sbi.c"
    }
  ]
}