| From 7f02e07706c0501847a14eac8d9cb95474361754 Mon Sep 17 00:00:00 2001 |
| From: Boris Brezillon <boris.brezillon@free-electrons.com> |
| Date: Tue, 22 Nov 2016 12:45:28 -0800 |
| Subject: [PATCH] clk: bcm2835: Fix ->fixed_divider of pllh_aux |
| |
| commit f2a46926aba1f0c33944901d2420a6a887455ddc upstream. |
| |
| There is no fixed divider on pllh_aux. |
| |
| Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> |
| Signed-off-by: Eric Anholt <eric@anholt.net> |
| Reviewed-by: Eric Anholt <eric@anholt.net> |
| Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
| Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> |
| |
| diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c |
| index 3250694fd793..da13ff04982a 100644 |
| --- a/drivers/clk/bcm/clk-bcm2835.c |
| +++ b/drivers/clk/bcm/clk-bcm2835.c |
| @@ -1584,7 +1584,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = { |
| .a2w_reg = A2W_PLLH_AUX, |
| .load_mask = CM_PLLH_LOADAUX, |
| .hold_mask = 0, |
| - .fixed_divider = 10), |
| + .fixed_divider = 1), |
| [BCM2835_PLLH_PIX] = REGISTER_PLL_DIV( |
| .name = "pllh_pix", |
| .source_pll = "pllh", |
| -- |
| 2.12.0 |
| |