blob: e8cada91cfc624f039ba38f72f8273a6dd6cdc14 [file] [log] [blame]
From c48ebb2c9848da2a27642e6b437e5ef37033659e Mon Sep 17 00:00:00 2001
From: Kenneth Graunke <>
Date: Tue, 10 Sep 2019 18:48:01 -0700
Subject: [PATCH] drm/i915: Whitelist COMMON_SLICE_CHICKEN2
commit 282b7fd5f5ab4eba499e1162c1e2802c6d0bb82e upstream.
This allows userspace to use "legacy" mode for push constants, where
they are committed at 3DPRIMITIVE or flush time, rather than being
committed at 3DSTATE_BINDING_TABLE_POINTERS_XS time. Gen6-8 and Gen11
both use the "legacy" behavior - only Gen9 works in the "new" way.
Conflating push constants with binding tables is painful for userspace,
we would like to be able to avoid doing so.
Signed-off-by: Kenneth Graunke <>
Reviewed-by: Chris Wilson <>
Signed-off-by: Chris Wilson <>
(cherry picked from commit 0606259e3b3a1220a0f04a92a1654a3f674f47ee)
Signed-off-by: Rodrigo Vivi <>
Signed-off-by: Paul Gortmaker <>
diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
index b50a7c3f22bf..372d213eb00f 100644
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -1005,6 +1005,9 @@ static void gen9_whitelist_build(struct i915_wa_list *w)
/* WaAllowUMDToModifyHDCChicken1:skl,bxt,kbl,glk,cfl */
whitelist_reg(w, GEN8_HDC_CHICKEN1);
+ /* WaSendPushConstantsFromMMIO:skl,bxt */
+ whitelist_reg(w, COMMON_SLICE_CHICKEN2);
static void skl_whitelist_build(struct intel_engine_cs *engine)