| From 9a61c23028d291addf85f51bccd9a5b5eca085d5 Mon Sep 17 00:00:00 2001 |
| From: Jernej Skrabec <jernej.skrabec@siol.net> |
| Date: Sun, 29 Sep 2019 10:52:59 +0200 |
| Subject: [PATCH] arm64: dts: allwinner: a64: sopine-baseboard: Add PHY |
| regulator delay |
| |
| commit ccdf3aaa27ded6db9a93eed3ca7468bb2353b8fe upstream. |
| |
| It turns out that sopine-baseboard needs same fix as pine64-plus |
| for ethernet PHY. Here too Realtek ethernet PHY chip needs additional |
| power on delay to properly initialize. Datasheet mentions that chip |
| needs 30 ms to be properly powered on and that it needs some more time |
| to be initialized. |
| |
| Fix that by adding 100ms ramp delay to regulator responsible for |
| powering PHY. |
| |
| Note that issue was found out and fix tested on pine64-lts, but it's |
| basically the same as sopine-baseboard, only layout and connectors |
| differ. |
| |
| Fixes: bdfe4cebea11 ("arm64: allwinner: a64: add Ethernet PHY regulator for several boards") |
| Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> |
| Signed-off-by: Maxime Ripard <mripard@kernel.org> |
| Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> |
| |
| diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts |
| index e6fb9683f213..25099202c52c 100644 |
| --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts |
| +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts |
| @@ -159,6 +159,12 @@ |
| }; |
| |
| ®_dc1sw { |
| + /* |
| + * Ethernet PHY needs 30ms to properly power up and some more |
| + * to initialize. 100ms should be plenty of time to finish |
| + * whole process. |
| + */ |
| + regulator-enable-ramp-delay = <100000>; |
| regulator-name = "vcc-phy"; |
| }; |
| |
| -- |
| 2.7.4 |
| |
