| From 483d12c1569902c17b58c0b59a7e79ad2c25f6b2 Mon Sep 17 00:00:00 2001 |
| From: Alex Deucher <alexander.deucher@amd.com> |
| Date: Wed, 12 Feb 2020 08:51:29 -0500 |
| Subject: [PATCH] drm/amdgpu/gfx9: disable gfxoff when reading rlc clock |
| |
| commit 120cf959308e1bda984e40a9edd25ee2d6262efd upstream. |
| |
| Otherwise we readback all ones. Fixes rlc counter |
| readback while gfxoff is active. |
| |
| Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com> |
| Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
| Cc: stable@vger.kernel.org |
| Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> |
| |
| diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c |
| index f4332c69dc42..c244cb14088e 100644 |
| --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c |
| +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c |
| @@ -3495,11 +3495,13 @@ static uint64_t gfx_v9_0_get_gpu_clock_counter(struct amdgpu_device *adev) |
| { |
| uint64_t clock; |
| |
| + amdgpu_gfx_off_ctrl(adev, false); |
| mutex_lock(&adev->gfx.gpu_clock_mutex); |
| WREG32_SOC15(GC, 0, mmRLC_CAPTURE_GPU_CLOCK_COUNT, 1); |
| clock = (uint64_t)RREG32_SOC15(GC, 0, mmRLC_GPU_CLOCK_COUNT_LSB) | |
| ((uint64_t)RREG32_SOC15(GC, 0, mmRLC_GPU_CLOCK_COUNT_MSB) << 32ULL); |
| mutex_unlock(&adev->gfx.gpu_clock_mutex); |
| + amdgpu_gfx_off_ctrl(adev, true); |
| return clock; |
| } |
| |
| -- |
| 2.7.4 |
| |
