| From ace1aca6d9ef9fbc745f616dcf94cf352ea41eb1 Mon Sep 17 00:00:00 2001 |
| From: Alex Deucher <alexander.deucher@amd.com> |
| Date: Tue, 28 Jan 2020 13:19:51 -0500 |
| Subject: [PATCH] drm/amdgpu/smu10: fix smu10_get_clock_by_type_with_latency |
| |
| commit 4d0a72b66065dd7e274bad6aa450196d42fd8f84 upstream. |
| |
| Only send non-0 clocks to DC for validation. This mirrors |
| what the windows driver does. |
| |
| Bug: https://gitlab.freedesktop.org/drm/amd/issues/963 |
| Reviewed-by: Evan Quan <evan.quan@amd.com> |
| Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
| Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> |
| |
| diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c |
| index e32ae9d3373c..6d00bec5ce06 100644 |
| --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c |
| +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c |
| @@ -1026,12 +1026,15 @@ static int smu10_get_clock_by_type_with_latency(struct pp_hwmgr *hwmgr, |
| |
| clocks->num_levels = 0; |
| for (i = 0; i < pclk_vol_table->count; i++) { |
| - clocks->data[i].clocks_in_khz = pclk_vol_table->entries[i].clk * 10; |
| - clocks->data[i].latency_in_us = latency_required ? |
| - smu10_get_mem_latency(hwmgr, |
| - pclk_vol_table->entries[i].clk) : |
| - 0; |
| - clocks->num_levels++; |
| + if (pclk_vol_table->entries[i].clk) { |
| + clocks->data[clocks->num_levels].clocks_in_khz = |
| + pclk_vol_table->entries[i].clk * 10; |
| + clocks->data[clocks->num_levels].latency_in_us = latency_required ? |
| + smu10_get_mem_latency(hwmgr, |
| + pclk_vol_table->entries[i].clk) : |
| + 0; |
| + clocks->num_levels++; |
| + } |
| } |
| |
| return 0; |
| -- |
| 2.7.4 |
| |
