| From e527fa0b598d421fd8977ced3bc8239b94a17200 Mon Sep 17 00:00:00 2001 |
| From: Nicolas Belin <nbelin@baylibre.com> |
| Date: Thu, 20 Feb 2020 14:15:12 +0100 |
| Subject: [PATCH] pinctrl: meson-gxl: fix GPIOX sdio pins |
| |
| commit dc7a06b0dbbafac8623c2b7657e61362f2f479a7 upstream. |
| |
| In the gxl driver, the sdio cmd and clk pins are inverted. It has not caused |
| any issue so far because devices using these pins always take both pins |
| so the resulting configuration is OK. |
| |
| Fixes: 0f15f500ff2c ("pinctrl: meson: Add GXL pinctrl definitions") |
| Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> |
| Signed-off-by: Nicolas Belin <nbelin@baylibre.com> |
| Link: https://lore.kernel.org/r/1582204512-7582-1-git-send-email-nbelin@baylibre.com |
| Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
| Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> |
| |
| diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c |
| index 72c5373c8dc1..e8d1f3050487 100644 |
| --- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c |
| +++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c |
| @@ -147,8 +147,8 @@ static const unsigned int sdio_d0_pins[] = { GPIOX_0 }; |
| static const unsigned int sdio_d1_pins[] = { GPIOX_1 }; |
| static const unsigned int sdio_d2_pins[] = { GPIOX_2 }; |
| static const unsigned int sdio_d3_pins[] = { GPIOX_3 }; |
| -static const unsigned int sdio_cmd_pins[] = { GPIOX_4 }; |
| -static const unsigned int sdio_clk_pins[] = { GPIOX_5 }; |
| +static const unsigned int sdio_clk_pins[] = { GPIOX_4 }; |
| +static const unsigned int sdio_cmd_pins[] = { GPIOX_5 }; |
| static const unsigned int sdio_irq_pins[] = { GPIOX_7 }; |
| |
| static const unsigned int nand_ce0_pins[] = { BOOT_8 }; |
| -- |
| 2.7.4 |
| |
