blob: c41c90dd9287aee1f763ac19058658fdde957ac0 [file] [log] [blame]
From 18f28a86a9cee92ff58febba8f3c853f7933af31 Mon Sep 17 00:00:00 2001
From: Niklas Schnelle <>
Date: Thu, 27 Feb 2020 12:17:18 +0100
Subject: [PATCH] s390/pci: Fix unexpected write combine on resource
commit df057c914a9c219ac8b8ed22caf7da2f80c1fe26 upstream.
In the initial MIO support introduced in
commit 71ba41c9b1d9 ("s390/pci: provide support for MIO instructions")
zpci_map_resource() and zpci_setup_resources() default to using the
mio_wb address as the resource's start address. This means users of the
mapping, which includes most drivers, will get write combining on PCI
Stores. This may lead to problems when drivers expect write through
behavior when not using an explicit ioremap_wc().
Fixes: 71ba41c9b1d9 ("s390/pci: provide support for MIO instructions")
Signed-off-by: Niklas Schnelle <>
Reviewed-by: Pierre Morel <>
Signed-off-by: Vasily Gorbik <>
Signed-off-by: Paul Gortmaker <>
diff --git a/arch/s390/pci/pci.c b/arch/s390/pci/pci.c
index a61348b96ad2..ce34da5d9848 100644
--- a/arch/s390/pci/pci.c
+++ b/arch/s390/pci/pci.c
@@ -423,7 +423,7 @@ static void zpci_map_resources(struct pci_dev *pdev)
if (static_branch_likely(&have_mio))
pdev->resource[i].start =
- (resource_size_t __force) zdev->bars[i].mio_wb;
+ (resource_size_t __force) zdev->bars[i].mio_wt;
pdev->resource[i].start =
(resource_size_t __force) pci_iomap(pdev, i, 0);
@@ -529,7 +529,7 @@ static int zpci_setup_bus_resources(struct zpci_dev *zdev,
flags |= IORESOURCE_MEM_64;
if (static_branch_likely(&have_mio))
- addr = (unsigned long) zdev->bars[i].mio_wb;
+ addr = (unsigned long) zdev->bars[i].mio_wt;
addr = ZPCI_ADDR(entry);
size = 1UL << zdev->bars[i].size;