| From 5d1e1dfd09a6f184e9eca41a04d253c7827faba9 Mon Sep 17 00:00:00 2001 |
| From: Jernej Skrabec <jernej.skrabec@siol.net> |
| Date: Sat, 25 Jan 2020 00:20:09 +0100 |
| Subject: [PATCH] ARM: dts: sunxi: Fix DE2 clocks register range |
| |
| commit da180322582bd9db07f29e6d4a2d170afde0703f upstream. |
| |
| As it can be seen from DE2 manual, clock range is 0x10000. |
| |
| Fix it. |
| |
| Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> |
| Fixes: 73f122c82775 ("ARM: dts: sun8i: a83t: Add display pipeline") |
| Fixes: 05a43a262d03 ("ARM: dts: sun8i: r40: Add HDMI pipeline") |
| Fixes: 21b299209330 ("ARM: sun8i: v3s: add device nodes for DE2 display pipeline") |
| Fixes: d8c6f1f0295c ("ARM: sun8i: h3/h5: add DE2 CCU device node for H3") |
| [wens@csie.org: added fixes tags] |
| Signed-off-by: Chen-Yu Tsai <wens@csie.org> |
| Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> |
| |
| diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi |
| index ba24a2dd0f7a..364bec39c621 100644 |
| --- a/arch/arm/boot/dts/sun8i-a83t.dtsi |
| +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi |
| @@ -313,7 +313,7 @@ |
| |
| display_clocks: clock@1000000 { |
| compatible = "allwinner,sun8i-a83t-de2-clk"; |
| - reg = <0x01000000 0x100000>; |
| + reg = <0x01000000 0x10000>; |
| clocks = <&ccu CLK_BUS_DE>, |
| <&ccu CLK_PLL_DE>; |
| clock-names = "bus", |
| diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi |
| index 39def6844282..ee8a70d84c40 100644 |
| --- a/arch/arm/boot/dts/sun8i-r40.dtsi |
| +++ b/arch/arm/boot/dts/sun8i-r40.dtsi |
| @@ -118,7 +118,7 @@ |
| display_clocks: clock@1000000 { |
| compatible = "allwinner,sun8i-r40-de2-clk", |
| "allwinner,sun8i-h3-de2-clk"; |
| - reg = <0x01000000 0x100000>; |
| + reg = <0x01000000 0x10000>; |
| clocks = <&ccu CLK_BUS_DE>, |
| <&ccu CLK_DE>; |
| clock-names = "bus", |
| diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi |
| index c755b84c4647..98d1920a7620 100644 |
| --- a/arch/arm/boot/dts/sun8i-v3s.dtsi |
| +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi |
| @@ -103,7 +103,7 @@ |
| |
| display_clocks: clock@1000000 { |
| compatible = "allwinner,sun8i-v3s-de2-clk"; |
| - reg = <0x01000000 0x100000>; |
| + reg = <0x01000000 0x10000>; |
| clocks = <&ccu CLK_BUS_DE>, |
| <&ccu CLK_DE>; |
| clock-names = "bus", |
| diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi |
| index b1d8c8228a37..18ba7956bf9d 100644 |
| --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi |
| +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi |
| @@ -113,7 +113,7 @@ |
| |
| display_clocks: clock@1000000 { |
| /* compatible is in per SoC .dtsi file */ |
| - reg = <0x01000000 0x100000>; |
| + reg = <0x01000000 0x10000>; |
| clocks = <&ccu CLK_BUS_DE>, |
| <&ccu CLK_DE>; |
| clock-names = "bus", |
| -- |
| 2.7.4 |
| |
