| From 41b4442c01563ff1540e9110d20342f5cf138dd7 Mon Sep 17 00:00:00 2001 |
| From: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com> |
| Date: Mon, 7 Oct 2019 19:00:22 +0000 |
| Subject: [PATCH] x86/asm: Fix MWAITX C-state hint value |
| |
| commit 454de1e7d970d6bc567686052329e4814842867c upstream. |
| |
| As per "AMD64 Architecture Programmer's Manual Volume 3: General-Purpose |
| and System Instructions", MWAITX EAX[7:4]+1 specifies the optional hint |
| of the optimized C-state. For C0 state, EAX[7:4] should be set to 0xf. |
| |
| Currently, a value of 0xf is set for EAX[3:0] instead of EAX[7:4]. Fix |
| this by changing MWAITX_DISABLE_CSTATES from 0xf to 0xf0. |
| |
| This hasn't had any implications so far because setting reserved bits in |
| EAX is simply ignored by the CPU. |
| |
| [ bp: Fixup comment in delay_mwaitx() and massage. ] |
| |
| Signed-off-by: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com> |
| Signed-off-by: Borislav Petkov <bp@suse.de> |
| Cc: Frederic Weisbecker <frederic@kernel.org> |
| Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| Cc: "H. Peter Anvin" <hpa@zytor.com> |
| Cc: Ingo Molnar <mingo@redhat.com> |
| Cc: Thomas Gleixner <tglx@linutronix.de> |
| Cc: "x86@kernel.org" <x86@kernel.org> |
| Cc: Zhenzhong Duan <zhenzhong.duan@oracle.com> |
| Cc: <stable@vger.kernel.org> |
| Link: https://lkml.kernel.org/r/20191007190011.4859-1-Janakarajan.Natarajan@amd.com |
| Signed-off-by: Ingo Molnar <mingo@kernel.org> |
| Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> |
| |
| diff --git a/arch/x86/include/asm/mwait.h b/arch/x86/include/asm/mwait.h |
| index eb0f80ce8524..3aa82deeab5a 100644 |
| --- a/arch/x86/include/asm/mwait.h |
| +++ b/arch/x86/include/asm/mwait.h |
| @@ -21,7 +21,7 @@ |
| #define MWAIT_ECX_INTERRUPT_BREAK 0x1 |
| #define MWAITX_ECX_TIMER_ENABLE BIT(1) |
| #define MWAITX_MAX_LOOPS ((u32)-1) |
| -#define MWAITX_DISABLE_CSTATES 0xf |
| +#define MWAITX_DISABLE_CSTATES 0xf0 |
| |
| static inline void __monitor(const void *eax, unsigned long ecx, |
| unsigned long edx) |
| diff --git a/arch/x86/lib/delay.c b/arch/x86/lib/delay.c |
| index b7375dc6898f..c126571e5e2e 100644 |
| --- a/arch/x86/lib/delay.c |
| +++ b/arch/x86/lib/delay.c |
| @@ -113,8 +113,8 @@ static void delay_mwaitx(unsigned long __loops) |
| __monitorx(raw_cpu_ptr(&cpu_tss_rw), 0, 0); |
| |
| /* |
| - * AMD, like Intel, supports the EAX hint and EAX=0xf |
| - * means, do not enter any deep C-state and we use it |
| + * AMD, like Intel's MWAIT version, supports the EAX hint and |
| + * EAX=0xf0 means, do not enter any deep C-state and we use it |
| * here in delay() to minimize wakeup latency. |
| */ |
| __mwaitx(MWAITX_DISABLE_CSTATES, delay, MWAITX_ECX_TIMER_ENABLE); |
| -- |
| 2.7.4 |
| |
