| From c72f8dd573ede23df9e4e176401337a21348b822 Mon Sep 17 00:00:00 2001 |
| From: Pelle van Gils <pelle@vangils.xyz> |
| Date: Thu, 24 Oct 2019 16:04:31 +0200 |
| Subject: [PATCH] drm/amdgpu/powerplay/vega10: allow undervolting in p7 |
| |
| commit e6f4e274c1e52d1f0bfe293fb44ddf59de6c0374 upstream. |
| |
| The vega10_odn_update_soc_table() function does not allow the SCLK |
| dependent voltage to be set for power-state 7 to a value below the default |
| in pptable. Change the for-loop condition to allow undervolting in the |
| highest state. |
| |
| Bug: https://bugzilla.kernel.org/show_bug.cgi?id=205277 |
| Signed-off-by: Pelle van Gils <pelle@vangils.xyz> |
| Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
| Cc: stable@vger.kernel.org |
| Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> |
| |
| diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c |
| index 384c37875cd0..a566aeda619b 100644 |
| --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c |
| +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c |
| @@ -5005,9 +5005,7 @@ static void vega10_odn_update_soc_table(struct pp_hwmgr *hwmgr, |
| |
| if (type == PP_OD_EDIT_SCLK_VDDC_TABLE) { |
| podn_vdd_dep = &data->odn_dpm_table.vdd_dep_on_sclk; |
| - for (i = 0; i < podn_vdd_dep->count - 1; i++) |
| - od_vddc_lookup_table->entries[i].us_vdd = podn_vdd_dep->entries[i].vddc; |
| - if (od_vddc_lookup_table->entries[i].us_vdd < podn_vdd_dep->entries[i].vddc) |
| + for (i = 0; i < podn_vdd_dep->count; i++) |
| od_vddc_lookup_table->entries[i].us_vdd = podn_vdd_dep->entries[i].vddc; |
| } else if (type == PP_OD_EDIT_MCLK_VDDC_TABLE) { |
| podn_vdd_dep = &data->odn_dpm_table.vdd_dep_on_mclk; |
| -- |
| 2.7.4 |
| |
