| From 2752e320601264f2fac6f14627c1fc29bdbe9da3 Mon Sep 17 00:00:00 2001 |
| From: Shengjiu Wang <shengjiu.wang@nxp.com> |
| Date: Fri, 25 Oct 2019 16:39:23 +0800 |
| Subject: [PATCH] arm64: dts: imx8mm: fix compatible string for sdma |
| |
| commit e346ff93f02b1ba81e976d4e67ec56582dbdf7f1 upstream. |
| |
| SDMA in i.MX8MM should use same configuration as i.MX8MQ |
| So need to change compatible string to be "fsl,imx8mq-sdma". |
| |
| Fixes: a05ea40eb384 ("arm64: dts: imx: Add i.mx8mm dtsi support") |
| Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> |
| Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
| Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> |
| |
| diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi |
| index 6e0026881f56..85b11d7b9e49 100644 |
| --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi |
| +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi |
| @@ -281,7 +281,7 @@ |
| }; |
| |
| sdma2: dma-controller@302c0000 { |
| - compatible = "fsl,imx8mm-sdma", "fsl,imx7d-sdma"; |
| + compatible = "fsl,imx8mm-sdma", "fsl,imx8mq-sdma"; |
| reg = <0x302c0000 0x10000>; |
| interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&clk IMX8MM_CLK_SDMA2_ROOT>, |
| @@ -292,7 +292,7 @@ |
| }; |
| |
| sdma3: dma-controller@302b0000 { |
| - compatible = "fsl,imx8mm-sdma", "fsl,imx7d-sdma"; |
| + compatible = "fsl,imx8mm-sdma", "fsl,imx8mq-sdma"; |
| reg = <0x302b0000 0x10000>; |
| interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&clk IMX8MM_CLK_SDMA3_ROOT>, |
| @@ -597,7 +597,7 @@ |
| }; |
| |
| sdma1: dma-controller@30bd0000 { |
| - compatible = "fsl,imx8mm-sdma", "fsl,imx7d-sdma"; |
| + compatible = "fsl,imx8mm-sdma", "fsl,imx8mq-sdma"; |
| reg = <0x30bd0000 0x10000>; |
| interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&clk IMX8MM_CLK_SDMA1_ROOT>, |
| -- |
| 2.7.4 |
| |