| From a92ac588ba05c91c69820e4b820d12ebb034eccb Mon Sep 17 00:00:00 2001 |
| From: Mathias Kresin <dev@kresin.me> |
| Date: Sun, 7 Jul 2019 16:22:01 +0200 |
| Subject: [PATCH] usb: dwc2: use a longer core rest timeout in |
| dwc2_core_reset() |
| |
| commit 6689f0f4bb14e50917ba42eb9b41c25e0184970c upstream. |
| |
| Testing on different generations of Lantiq MIPS SoC based boards, showed |
| that it takes up to 1500 us until the core reset bit is cleared. |
| |
| The driver from the vendor SDK (ifxhcd) uses a 1 second timeout. Use the |
| same timeout to fix wrong hang detections and make the driver work for |
| Lantiq MIPS SoCs. |
| |
| At least till kernel 4.14 the hanging reset only caused a warning but |
| the driver was probed successful. With kernel 4.19 errors out with |
| EBUSY. |
| |
| Cc: linux-stable <stable@vger.kernel.org> # 4.19+ |
| Signed-off-by: Mathias Kresin <dev@kresin.me> |
| Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> |
| Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> |
| |
| diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c |
| index 8e41d70fd298..78a4925aa118 100644 |
| --- a/drivers/usb/dwc2/core.c |
| +++ b/drivers/usb/dwc2/core.c |
| @@ -524,7 +524,7 @@ int dwc2_core_reset(struct dwc2_hsotg *hsotg, bool skip_wait) |
| greset |= GRSTCTL_CSFTRST; |
| dwc2_writel(hsotg, greset, GRSTCTL); |
| |
| - if (dwc2_hsotg_wait_bit_clear(hsotg, GRSTCTL, GRSTCTL_CSFTRST, 50)) { |
| + if (dwc2_hsotg_wait_bit_clear(hsotg, GRSTCTL, GRSTCTL_CSFTRST, 10000)) { |
| dev_warn(hsotg->dev, "%s: HANG! Soft Reset timeout GRSTCTL GRSTCTL_CSFTRST\n", |
| __func__); |
| return -EBUSY; |
| -- |
| 2.7.4 |
| |
