| From 4756a225e23352e4604511c42863ce7bb28395ac Mon Sep 17 00:00:00 2001 |
| From: Sharat Masetty <smasetty@codeaurora.org> |
| Date: Wed, 6 Nov 2019 17:19:23 +0530 |
| Subject: [PATCH] drm: msm: a6xx: fix debug bus register configuration |
| |
| commit 7f4009c4bbea4438b50f3b12d1c57da3f5cd8db3 upstream. |
| |
| Fix the cx debugbus related register configuration, to collect accurate |
| bus data during gpu snapshot. This helps with complete snapshot dump |
| and also complete proper GPU recovery. |
| |
| Fixes: 1707add81551 ("drm/msm/a6xx: Add a6xx gpu state") |
| Reviewed-by: Rob Clark <robdclark@gmail.com> |
| Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> |
| Signed-off-by: Sean Paul <seanpaul@chromium.org> |
| Link: https://patchwork.freedesktop.org/patch/339165 |
| Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> |
| |
| diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c |
| index e686331fa089..691c1a277d91 100644 |
| --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c |
| +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c |
| @@ -352,26 +352,26 @@ static void a6xx_get_debugbus(struct msm_gpu *gpu, |
| cxdbg = ioremap(res->start, resource_size(res)); |
| |
| if (cxdbg) { |
| - cxdbg_write(cxdbg, REG_A6XX_DBGC_CFG_DBGBUS_CNTLT, |
| + cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_CNTLT, |
| A6XX_DBGC_CFG_DBGBUS_CNTLT_SEGT(0xf)); |
| |
| - cxdbg_write(cxdbg, REG_A6XX_DBGC_CFG_DBGBUS_CNTLM, |
| + cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_CNTLM, |
| A6XX_DBGC_CFG_DBGBUS_CNTLM_ENABLE(0xf)); |
| |
| - cxdbg_write(cxdbg, REG_A6XX_DBGC_CFG_DBGBUS_IVTL_0, 0); |
| - cxdbg_write(cxdbg, REG_A6XX_DBGC_CFG_DBGBUS_IVTL_1, 0); |
| - cxdbg_write(cxdbg, REG_A6XX_DBGC_CFG_DBGBUS_IVTL_2, 0); |
| - cxdbg_write(cxdbg, REG_A6XX_DBGC_CFG_DBGBUS_IVTL_3, 0); |
| + cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_IVTL_0, 0); |
| + cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_IVTL_1, 0); |
| + cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_IVTL_2, 0); |
| + cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_IVTL_3, 0); |
| |
| - cxdbg_write(cxdbg, REG_A6XX_DBGC_CFG_DBGBUS_BYTEL_0, |
| + cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_0, |
| 0x76543210); |
| - cxdbg_write(cxdbg, REG_A6XX_DBGC_CFG_DBGBUS_BYTEL_1, |
| + cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_1, |
| 0xFEDCBA98); |
| |
| - cxdbg_write(cxdbg, REG_A6XX_DBGC_CFG_DBGBUS_MASKL_0, 0); |
| - cxdbg_write(cxdbg, REG_A6XX_DBGC_CFG_DBGBUS_MASKL_1, 0); |
| - cxdbg_write(cxdbg, REG_A6XX_DBGC_CFG_DBGBUS_MASKL_2, 0); |
| - cxdbg_write(cxdbg, REG_A6XX_DBGC_CFG_DBGBUS_MASKL_3, 0); |
| + cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_MASKL_0, 0); |
| + cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_MASKL_1, 0); |
| + cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_MASKL_2, 0); |
| + cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_MASKL_3, 0); |
| } |
| |
| a6xx_state->debugbus = state_kcalloc(a6xx_state, |
| -- |
| 2.7.4 |
| |
