| From bfb6cb93b81ede889000874783a3cbc3bab83f3f Mon Sep 17 00:00:00 2001 |
| From: Sean Christopherson <sean.j.christopherson@intel.com> |
| Date: Fri, 7 Feb 2020 09:37:41 -0800 |
| Subject: [PATCH] KVM: nVMX: Use correct root level for nested EPT shadow page |
| tables |
| |
| commit 148d735eb55d32848c3379e460ce365f2c1cbe4b upstream. |
| |
| Hardcode the EPT page-walk level for L2 to be 4 levels, as KVM's MMU |
| currently also hardcodes the page walk level for nested EPT to be 4 |
| levels. The L2 guest is all but guaranteed to soft hang on its first |
| instruction when L1 is using EPT, as KVM will construct 4-level page |
| tables and then tell hardware to use 5-level page tables. |
| |
| Fixes: 855feb673640 ("KVM: MMU: Add 5 level EPT & Shadow page table support.") |
| Cc: stable@vger.kernel.org |
| Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> |
| Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
| Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> |
| |
| diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c |
| index 01fd05462edc..58ab535d4687 100644 |
| --- a/arch/x86/kvm/vmx/vmx.c |
| +++ b/arch/x86/kvm/vmx/vmx.c |
| @@ -2829,6 +2829,9 @@ void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) |
| |
| static int get_ept_level(struct kvm_vcpu *vcpu) |
| { |
| + /* Nested EPT currently only supports 4-level walks. */ |
| + if (is_guest_mode(vcpu) && nested_cpu_has_ept(get_vmcs12(vcpu))) |
| + return 4; |
| if (cpu_has_vmx_ept_5levels() && (cpuid_maxphyaddr(vcpu) > 48)) |
| return 5; |
| return 4; |
| -- |
| 2.7.4 |
| |