docs/memory-barriers.txt: Enforce heavy ordering for port I/O accesses
David Laight explains:
| A long time ago there was a document from Intel that said that
| inb/outb weren't necessarily synchronised wrt memory accesses.
| (Might be P-pro era). However no processors actually behaved that
| way and more recent docs say that inb/outb are fully ordered.
This also reflects the situation on other architectures, the the port
accessor macros tend to be implemented in terms of readX/writeX.
Update Documentation/memory-barriers.txt to reflect reality.
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: David Laight <David.Laight@ACULAB.COM>
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: <linux-arch@vger.kernel.org>
Cc: <linux-doc@vger.kernel.org>
Cc: <linux-kernel@vger.kernel.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Paul E. McKenney <paulmck@linux.ibm.com>
1 file changed
